uart.c 14 KB

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  1. #include "uart.h"
  2. static INT8U uart1_tx_buf[UART1_TX_LEN] = {0};
  3. static INT8U uart1_rx_buf[UART1_REC_LEN] = {0};
  4. // static INT8U uart5_tx_buf[UART3_TX_LEN] = {0};
  5. // static INT8U uart5_rx_buf[UART3_REC_LEN] = {0};
  6. UartFrame_TypeDef Uart1FrameStruct[MAX_MSG_NUM];
  7. // UartFrame_TypeDef Uart5FrameStruct[MAX_MSG_NUM];
  8. extern OS_EVENT *uart1_mbox;
  9. // extern OS_EVENT *uart5_mbox;
  10. /*!
  11. \brief configure DMA interrupt
  12. \param[in] none
  13. \param[out] none
  14. \retval none
  15. */
  16. void uart1_nvic_config(void)
  17. {
  18. NVIC_InitTypeDef NVIC_InitStructure;
  19. // Usart1 NVIC 配置
  20. NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; //串口1中断通道
  21. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //抢占优先级
  22. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //子优先级3
  23. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; // IRQ通道使能
  24. NVIC_Init(&NVIC_InitStructure); //根据指定的参数初始化VIC寄存器
  25. }
  26. /*!
  27. \brief configure DMA
  28. \param[in] none
  29. \param[out] none
  30. \retval none
  31. */
  32. void uart1_dma_init(void)
  33. {
  34. DMA_InitTypeDef DMA_InitStructure;
  35. /* deinitialize UART0_DMA channel7(USART0 tx) */
  36. DMA_DeInit(DMA1_Stream7);
  37. /* 配置 DMA Stream */
  38. DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(USART1->DR)); // DMA外设地址
  39. DMA_InitStructure.DMA_BufferSize = UART1_TX_LEN; //数据传输量
  40. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //外设非增量模式
  41. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //存储器增量模式
  42. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //外设数据长度:8位
  43. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; //存储器数据长度:8位
  44. DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; // 使用普通模式
  45. DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; //中等优先级
  46. DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
  47. DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
  48. DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //存储器突发单次传输
  49. DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //外设突发单次传输
  50. DMA_InitStructure.DMA_Channel = DMA_Channel_4; //通道选择
  51. DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; //存储器到外设模式
  52. DMA_InitStructure.DMA_Memory0BaseAddr = (u32)uart1_tx_buf; // DMA 存储器0地址
  53. DMA_Init(DMA1_Stream7, &DMA_InitStructure); //初始化DMA Stream
  54. /* deinitialize UART0_DMA channel2 (USART0 rx) */
  55. DMA_DeInit(DMA1_Stream2);
  56. /* 配置 DMA Stream */
  57. DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(USART1->DR)); // DMA外设地址
  58. DMA_InitStructure.DMA_BufferSize = UART1_REC_LEN; //数据传输量
  59. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //外设非增量模式
  60. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //存储器增量模式
  61. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //外设数据长度:8位
  62. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; //存储器数据长度:8位
  63. DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; // 使用循环模式
  64. DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; //中等优先级
  65. DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
  66. DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
  67. DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //存储器突发单次传输
  68. DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //外设突发单次传输
  69. /* 配置 RX DMA */
  70. DMA_InitStructure.DMA_Channel = DMA_Channel_4; /* 配置接收通道 */
  71. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; /* 设置从外设到内存 */
  72. DMA_InitStructure.DMA_Memory0BaseAddr = (u32)uart1_rx_buf; /* 设置内存地址 */
  73. DMA_Init(DMA1_Stream2, &DMA_InitStructure);
  74. /* 使能 DMA USART TX Stream */
  75. USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE); // 使能串口DMA接收数据
  76. }
  77. void uart1_config(void)
  78. {
  79. USART_InitTypeDef USART_InitStructure;
  80. // USART1 初始化设置
  81. USART_InitStructure.USART_BaudRate = 9600U; //波特率设置
  82. USART_InitStructure.USART_WordLength = USART_WordLength_8b; //字长为8位数据格式
  83. USART_InitStructure.USART_StopBits = USART_StopBits_1; //一个停止位
  84. USART_InitStructure.USART_Parity = USART_Parity_No; //无奇偶校验位
  85. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; //无硬件数据流控制
  86. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; //收发模式
  87. USART_Init(USART1, &USART_InitStructure); //初始化串口1
  88. USART_Cmd(USART1, ENABLE); //使能串口1
  89. }
  90. void uart1_init(void)
  91. {
  92. uart1_config();
  93. uart1_dma_init();
  94. uart1_nvic_config();
  95. // /* USART DMA enable*/
  96. USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);
  97. /*configure DMA0 interrupt*/
  98. USART_ITConfig(USART1, USART_IT_IDLE, ENABLE); //开启空闲中断
  99. USART_ITConfig(USART1, USART_IT_TC, ENABLE);
  100. UART1_RX_ENABLE;
  101. }
  102. //开启一次DMA传输
  103. // DMA_Streamx:DMA数据流,DMA1_Stream0~7/DMA2_Stream0~7
  104. // count:数据传输量
  105. void Uart1DMA_Enable(DMA_Stream_TypeDef *DMA_Streamx, u16 count)
  106. {
  107. DMA_Cmd(DMA_Streamx, DISABLE); //关闭DMA传输
  108. while (DMA_GetCmdStatus(DMA_Streamx) != DISABLE)
  109. {
  110. } //确保DMA可以被设置
  111. DMA_SetCurrDataCounter(DMA_Streamx, count); //数据传输量
  112. DMA_Cmd(DMA_Streamx, ENABLE); //开启DMA传输
  113. }
  114. void Uart1_dma_Send_Data(const INT8U *buf, INT16U len)
  115. {
  116. // INT16U cnt = 0;
  117. if (RESET != USART_GetFlagStatus(UART1_DMA, USART_FLAG_TC))
  118. {
  119. DMA_ClearFlag(DMA1_Stream2, DMA_FLAG_TCIF5);
  120. }
  121. UART1_TX_ENABLE;
  122. if (len > UART1_TX_LEN)
  123. {
  124. len = UART1_TX_LEN;
  125. }
  126. memcpy(uart1_tx_buf, buf, len);
  127. USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE); // 使能DMA串口发送数据
  128. Uart1DMA_Enable(DMA1_Stream7, len);
  129. }
  130. void USART1_IRQHandler(void)
  131. {
  132. static INT8U u0_index = 0;
  133. volatile INT8U clear = 0;
  134. INT8U rec_cnt = 0;
  135. if (RESET != USART_GetITStatus(USART1, USART_IT_IDLE))
  136. {
  137. clear = USART1->SR;
  138. clear = USART1->DR; // 先读SR, 再读DR, 就是为了消除IDLE中断
  139. DMA_Cmd(DMA1_Stream2, DISABLE);
  140. DMA_ClearFlag(DMA1_Stream2, DMA_FLAG_TCIF5);
  141. rec_cnt = UART1_REC_LEN - DMA_GetCurrDataCounter(DMA1_Stream2); // 获得接收帧帧长 特别注意: 帧长不是DMA_GetCurrDataCounter(DMA2_Stream5)
  142. // dma_channel_disable(UART0_DMA, UART0_DMA_RXCH);
  143. // dma_flag_clear(UART0_DMA, UART0_DMA_RXCH, DMA_FLAG_FTF);
  144. // rec_cnt = dma_transfer_number_get(UART0_DMA, UART0_DMA_RXCH);
  145. // rec_cnt = UART0_REC_LEN - rec_cnt;
  146. memcpy(Uart1FrameStruct[u0_index].buf, uart1_rx_buf, rec_cnt);
  147. Uart1FrameStruct[u0_index].len = rec_cnt;
  148. OSMboxPost(uart1_mbox, &Uart1FrameStruct[u0_index]);
  149. if (u0_index < MAX_MSG_NUM - 1)
  150. {
  151. u0_index++;
  152. }
  153. else
  154. {
  155. u0_index = 0;
  156. }
  157. DMA_SetCurrDataCounter(DMA1_Stream7, UART1_REC_LEN);
  158. DMA_Cmd(DMA1_Stream7, ENABLE);
  159. // dma_channel_enable(UART0_DMA, UART0_DMA_RXCH);
  160. }
  161. else if (RESET != USART_GetITStatus(USART1, USART_IT_TC))
  162. {
  163. USART_ClearITPendingBit(USART1, USART_IT_TC); // 清除发送完成标标志位
  164. UART1_RX_ENABLE; // 485接收使能
  165. Uart1DMA_Enable(DMA1_Stream2, UART1_REC_LEN); // DMA接收使能
  166. DMA_Cmd(DMA1_Stream7, DISABLE); // 关闭发送DMA
  167. DMA_SetCurrDataCounter(DMA1_Stream7, 0); // 清除发送数据长度
  168. // usart_interrupt_flag_clear(USART0, USART_INT_FLAG_TC);
  169. // UART1_RX_ENABLE;
  170. // dma_channel_enable(UART0_DMA, UART0_DMA_RXCH);
  171. // usart_dma_transmit_config(USART0, USART_DENT_DISABLE);
  172. // dma_channel_disable(UART0_DMA, UART0_DMA_TXCH);
  173. }
  174. }
  175. // //uart5
  176. // /*!
  177. // \brief configure DMA interrupt
  178. // \param[in] none
  179. // \param[out] none
  180. // \retval none
  181. // */
  182. // void uart5_nvic_config(void)
  183. // {
  184. // nvic_irq_enable(USART5_IRQn, 0, 0);
  185. // }
  186. // /*!
  187. // \brief configure DMA
  188. // \param[in] none
  189. // \param[out] none
  190. // \retval none
  191. // */
  192. // void uart5_dma_init(void)
  193. // {
  194. // dma_single_data_parameter_struct dma_init_struct;
  195. // /* deinitialize UART5_DMA channel6(USART5 tx) */
  196. // dma_single_data_para_struct_init(&dma_init_struct);
  197. // dma_deinit(UART5_DMA, UART5_DMA_TXCH);
  198. // dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
  199. // dma_init_struct.memory0_addr = (uint32_t)uart5_tx_buf;
  200. // dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  201. // dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
  202. // dma_init_struct.number = UART5_TX_LEN;//ARRAYNUM(uart0_tx_buf);
  203. // dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART5);
  204. // dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  205. // dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  206. // dma_single_data_mode_init(UART5_DMA, UART5_DMA_TXCH, &dma_init_struct);
  207. // /* configure DMA mode */
  208. // dma_circulation_disable(UART5_DMA, UART5_DMA_TXCH);
  209. // dma_channel_subperipheral_select(UART5_DMA, UART5_DMA_TXCH, DMA_SUBPERI5);
  210. // /* enable UART5_DMA channel7 */
  211. // dma_channel_enable(UART5_DMA, UART5_DMA_TXCH);
  212. // /* deinitialize UART5_DMA channel2 (USART5 rx) */
  213. // dma_deinit(UART5_DMA, UART5_DMA_RXCH);
  214. // dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
  215. // dma_init_struct.memory0_addr = (uint32_t)uart5_rx_buf;
  216. // dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  217. // dma_init_struct.number = UART5_REC_LEN;//10;
  218. // dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART5);
  219. // dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  220. // dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
  221. // dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  222. // dma_single_data_mode_init(UART5_DMA, UART5_DMA_RXCH, &dma_init_struct);
  223. // /* configure DMA mode */
  224. // dma_circulation_disable(UART5_DMA, UART5_DMA_RXCH);
  225. // dma_channel_subperipheral_select(UART5_DMA, UART5_DMA_RXCH, DMA_SUBPERI5);
  226. // /* enable UART5_DMA channel2 */
  227. // dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
  228. // }
  229. // void uart5_config(void)
  230. // {
  231. // /* USART configure */
  232. // usart_deinit(USART5);
  233. // usart_baudrate_set(USART5,115200U);
  234. // usart_parity_config(USART5, USART_PM_NONE);
  235. // usart_word_length_set(USART5, USART_WL_8BIT);
  236. // usart_stop_bit_set(USART5, USART_STB_1BIT);
  237. // usart_receive_config(USART5, USART_RECEIVE_ENABLE);
  238. // usart_transmit_config(USART5, USART_TRANSMIT_ENABLE);
  239. // usart_enable(USART5);
  240. // }
  241. // void uart5_init(void)
  242. // {
  243. // uart5_config();
  244. // uart5_dma_init();
  245. // uart5_nvic_config();
  246. // /* USART DMA enable*/
  247. // usart_dma_receive_config(USART5, USART_DENR_ENABLE);
  248. // // usart_dma_transmit_config(USART5, USART_DENT_ENABLE);
  249. // /*configure DMA5 interrupt*/
  250. // usart_interrupt_enable(USART5, USART_INT_IDLE);
  251. // usart_interrupt_enable(USART5, USART_INT_TC);
  252. // UART5_RX_ENABLE;
  253. // }
  254. // void Uart5_Send_Data(const INT8U *buf, INT16U len)
  255. // {
  256. // INT8U i;
  257. // UART5_TX_ENABLE; // 485 发送使能
  258. // for(i=0; i<len; i++) //循环发送数据
  259. // {
  260. // while(usart_flag_get(USART5, USART_FLAG_TC) == RESET);
  261. // usart_data_transmit(USART5, buf[i]);
  262. // }
  263. // while(usart_flag_get(USART5, USART_FLAG_TC) == RESET);
  264. // UART5_RX_ENABLE; // 接收使能
  265. // }
  266. // void Uart5_dma_Send_Data(const INT8U *buf, INT16U len)
  267. // {
  268. // if(dma_flag_get(UART5_DMA, UART5_DMA_TXCH, DMA_FLAG_FTF)){
  269. // dma_flag_clear(UART5_DMA, UART5_DMA_TXCH, DMA_FLAG_FTF);
  270. // }
  271. // UART5_TX_ENABLE; // 485 发送使能
  272. // if(len > UART5_TX_LEN)
  273. // {
  274. // len = UART5_TX_LEN;
  275. // }
  276. // memcpy(uart5_tx_buf, buf, len);
  277. // uart_dma_enable(UART5_DMA, UART5_DMA_TXCH, len);
  278. // usart_dma_transmit_config(USART5, USART_DENT_ENABLE);
  279. // }
  280. // void USART5_IRQHandler(void)
  281. // {
  282. // static INT8U u5_index = 0;
  283. // volatile INT8U clear = 0;
  284. // INT8U rec_cnt = 0;
  285. // if(RESET != usart_interrupt_flag_get(USART5, USART_INT_FLAG_IDLE))
  286. // {
  287. // clear = USART_STAT0(USART5);
  288. // // clear = usart_data_receive(USART5);
  289. // clear = USART_DATA(USART5);
  290. // dma_channel_disable(UART5_DMA, UART5_DMA_RXCH);
  291. // // dma_interrupt_flag_clear(UART5_DMA, UART5_DMA_RXCH, DMA_INT_FLAG_FTF);
  292. // dma_flag_clear(UART5_DMA, UART5_DMA_RXCH, DMA_FLAG_FTF);
  293. // rec_cnt = dma_transfer_number_get(UART5_DMA, UART5_DMA_RXCH);
  294. // rec_cnt = UART5_REC_LEN - rec_cnt;
  295. // memcpy(Uart5FrameStruct[u5_index].buf, uart5_rx_buf, rec_cnt);
  296. // Uart5FrameStruct[u5_index].len = rec_cnt;
  297. // OSMboxPost(uart5_mbox, &Uart5FrameStruct[u5_index]);
  298. // if(u5_index < MAX_MSG_NUM - 1)
  299. // {
  300. // u5_index++;
  301. // }
  302. // else
  303. // {
  304. // u5_index = 0;
  305. // }
  306. // // dma_transfer_number_config(UART5_DMA, UART5_DMA_RXCH, 0);
  307. // dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
  308. // }
  309. // else if(RESET != usart_interrupt_flag_get(USART5, USART_INT_FLAG_TC))
  310. // {
  311. // usart_interrupt_flag_clear(USART5, USART_INT_FLAG_TC);
  312. // UART5_RX_ENABLE;
  313. // dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
  314. // usart_dma_transmit_config(USART5, USART_DENT_DISABLE);
  315. // dma_channel_disable(UART5_DMA, UART5_DMA_TXCH);
  316. // }
  317. // }