格式化代码

.clang-format

@@ -1,30 +1,59 @@
+---
+# 语言: None, Cpp, Java, JavaScript, ObjC, Proto, TableGen, TextProto
 Language:        Cpp
 # BasedOnStyle:  LLVM
+# 访问说明符(public、private等)的偏移
 AccessModifierOffset: -4
+# 开括号(开圆括号、开尖括号、开方括号)后的对齐: Align, DontAlign, AlwaysBreak(总是在开括号后换行)
 AlignAfterOpenBracket: Align
+# 对齐数组列
+AlignArrayOfStructures: None
+# 对齐连续宏定义
 AlignConsecutiveMacros: true
+# 连续赋值时，对齐所有等号
 AlignConsecutiveAssignments: true
+# 对齐连续位字段
 AlignConsecutiveBitFields: true
+# 连续声明时，对齐所有声明的变量名
 AlignConsecutiveDeclarations: true
+# 左对齐逃脱换行(使用反斜杠换行)的反斜杠
 AlignEscapedNewlines: Right
-AlignOperands:   Align
-AlignTrailingComments: true
+# 水平对齐二元和三元表达式的操作数
 AllowAllArgumentsOnNextLine: true
 AllowAllConstructorInitializersOnNextLine: true
+AlwaysBreakAfterDefinitionReturnType: None
+AlignOperands:   Align
+# 对齐连续的尾随的注释
+AlignTrailingComments: true
+# 允许函数声明的所有参数在放在下一行
 AllowAllParametersOfDeclarationOnNextLine: true
+# 允许短的枚举放在同一行
 AllowShortEnumsOnASingleLine: true
+# 允许短的块放在同一行
 AllowShortBlocksOnASingleLine: Never
+# 允许短的case标签放在同一行
 AllowShortCaseLabelsOnASingleLine: false
-AllowShortFunctionsOnASingleLine: false
+# 允许短的函数放在同一行
+AllowShortFunctionsOnASingleLine: All
+# 允许短的匿名函数放在同一行
 AllowShortLambdasOnASingleLine: All
+# 允许短的if语句保持在同一行
 AllowShortIfStatementsOnASingleLine: Never
+# 允许短的循环保持在同一行
 AllowShortLoopsOnASingleLine: false
-AlwaysBreakAfterDefinitionReturnType: None
+# 总是在返回类型后换行
 AlwaysBreakAfterReturnType: None
+# 总是在多行string字面量前换行
 AlwaysBreakBeforeMultilineStrings: false
+# 总是在template声明后换行
 AlwaysBreakTemplateDeclarations: MultiLine
+AttributeMacros:
+  - __capability
+# false表示函数实参要么都在同一行，要么都各自一行
 BinPackArguments: true
+# false表示所有形参要么都在同一行，要么都各自一行
 BinPackParameters: true
+# 大括号换行，只有当BreakBeforeBraces设置为Custom时才有效
 BraceWrapping:
   AfterCaseLabel:  false
   AfterClass:      false
@@ -44,63 +73,115 @@ BraceWrapping:
   SplitEmptyFunction: true
   SplitEmptyRecord: true
   SplitEmptyNamespace: true
+# 在二元运算符前换行
 BreakBeforeBinaryOperators: None
+# 在concept前换行
+BreakBeforeConceptDeclarations: true
+# 在大括号前换行: Attach(始终将大括号附加到周围的上下文)
 BreakBeforeBraces: Allman
 BreakBeforeInheritanceComma: false
-BreakInheritanceList: BeforeColon
+# 继承列表样式
+BreakInheritanceList: AfterComma
+# 在三元运算符前换行
 BreakBeforeTernaryOperators: true
-BreakConstructorInitializersBeforeComma: false
-BreakConstructorInitializers: BeforeColon
+# 构造函数初始值设定项换行样式
+BreakConstructorInitializers: BeforeComma
+# 在java字段的注释后换行
 BreakAfterJavaFieldAnnotations: false
-BreakStringLiterals: true
-ColumnLimit:     120
+# 每行字符的限制，0表示没有限制
+ColumnLimit:     0
+# 描述具有特殊意义的注释的正则表达式，它不应该被分割为多行或以其它方式改变
 CommentPragmas:  '^ IWYU pragma:'
+# 在新行上声明每个命名空间
 CompactNamespaces: false
-ConstructorInitializerAllOnOneLineOrOnePerLine: false
+# 构造函数的初始化列表的缩进宽度
 ConstructorInitializerIndentWidth: 4
+# 延续的行的缩进宽度
 ContinuationIndentWidth: 4
+# 去除C++11的列表初始化的大括号{后和}前的空格
 Cpp11BracedListStyle: true
+# 继承最常用的换行方式
 DeriveLineEnding: true
+# 继承最常用的指针和引用的对齐方式
 DerivePointerAlignment: false
+# 关闭格式化
 DisableFormat:   false
+# 删除访问修饰符后的所有空行
+EmptyLineAfterAccessModifier: Never
+# 仅当访问修饰符开始一个新的逻辑块时才添加空行
+EmptyLineBeforeAccessModifier: LogicalBlock
+# 自动检测函数的调用和定义是否被格式为每行一个参数(Experimental)
 ExperimentalAutoDetectBinPacking: false
+# 自动补充namespace注释
 FixNamespaceComments: true
+# 需要被解读为foreach循环而不是函数调用的宏
 ForEachMacros:
   - foreach
   - Q_FOREACH
   - BOOST_FOREACH
-IncludeBlocks:   Preserve
+IfMacros:
+  - KJ_IF_MAYBE
+# 多个#include块合并在一起并排序为一个
+IncludeBlocks:   Merge
+# 可以定义负数优先级从而保证某些#include永远在最前面
 IncludeCategories:
   - Regex:           '^"(llvm|llvm-c|clang|clang-c)/'
     Priority:        2
     SortPriority:    0
+    CaseSensitive:   false
   - Regex:           '^(<|"(gtest|gmock|isl|json)/)'
     Priority:        3
     SortPriority:    0
+    CaseSensitive:   false
   - Regex:           '.*'
     Priority:        1
     SortPriority:    0
+    CaseSensitive:   false
 IncludeIsMainRegex: '(Test)?$'
 IncludeIsMainSourceRegex: ''
+# 缩进访问修饰符
+IndentAccessModifiers: false
+# 缩进case标签
 IndentCaseLabels: false
+# case 标签后面的块使用与 case 标签相同的缩进级别
 IndentCaseBlocks: false
-IndentGotoLabels: true
+# 缩进goto标签。
+IndentGotoLabels: false
+# 缩进预处理器指令
 IndentPPDirectives: None
+# 向后兼容缩进外部块
 IndentExternBlock: AfterExternBlock
+# 缩进模板中的requires子句
+IndentRequires:  false
+# 缩进宽度
 IndentWidth:     4
+# 函数返回类型换行时，缩进函数声明或函数定义的函数名
 IndentWrappedFunctionNames: false
+# 插入尾随逗号
 InsertTrailingCommas: None
+# 保留JavaScript字符串引号
 JavaScriptQuotes: Leave
+# 包装 JavaScript 导入/导出语句
 JavaScriptWrapImports: true
+# 保留在块开始处的空行
 KeepEmptyLinesAtTheStartOfBlocks: true
+# 相对于 lambda 签名对齐 lambda 主体
+LambdaBodyIndentation: Signature
+# 开始一个块的宏的正则表达式
 MacroBlockBegin: ''
+# 结束一个块的宏的正则表达式
 MacroBlockEnd:   ''
+# 连续空行的最大数量
 MaxEmptyLinesToKeep: 1
+# 命名空间的缩进
 NamespaceIndentation: None
 ObjCBinPackProtocolList: Auto
-ObjCBlockIndentWidth: 2
+# 使用ObjC块时缩进宽度
+ObjCBlockIndentWidth: 4
 ObjCBreakBeforeNestedBlockParam: true
+# 在ObjC的@property后添加一个空格
 ObjCSpaceAfterProperty: false
+# 在ObjC的protocol列表前添加一个空格
 ObjCSpaceBeforeProtocolList: true
 PenaltyBreakAssignment: 2
 PenaltyBreakBeforeFirstCallParameter: 19
@@ -110,37 +191,90 @@ PenaltyBreakString: 1000
 PenaltyBreakTemplateDeclaration: 10
 PenaltyExcessCharacter: 1000000
 PenaltyReturnTypeOnItsOwnLine: 60
+PenaltyIndentedWhitespace: 0
+# 指针的对齐: Left, Right, Middle
 PointerAlignment: Right
+# 缩进预处理器语句的列数
+PPIndentWidth:   -1
+# 引用的对齐
+ReferenceAlignment: Pointer
+# 允许重新排版注释
 ReflowComments:  true
+# 短命名空间跨越的最大展开行数
+ShortNamespaceLines: 1
+# 允许排序#include
 SortIncludes:    true
+# java静态导入放在非静态导入之前
+SortJavaStaticImport: Before
+# 对using声明排序
 SortUsingDeclarations: true
+# 在C风格类型转换后添加空格
 SpaceAfterCStyleCast: false
+# 在!后添加空格
 SpaceAfterLogicalNot: false
+# 在Template关键字后添加空格
 SpaceAfterTemplateKeyword: true
+# 在赋值运算符之前添加空格
 SpaceBeforeAssignmentOperators: true
+# 不在case冒号之前添加空格
+SpaceBeforeCaseColon: false
+# 不在C++11大括号列表之前添加空格
 SpaceBeforeCpp11BracedList: false
+# 在构造函数初始化器冒号之前添加空格
 SpaceBeforeCtorInitializerColon: true
+# 在继承冒号前添加空格
 SpaceBeforeInheritanceColon: true
+# 开圆括号之前添加一个空格: Never, ControlStatements, Always
 SpaceBeforeParens: ControlStatements
+# 不要确保指针限定符周围有空格，而是使用 PointerAlignment
+SpaceAroundPointerQualifiers: Default
+# 在基于范围的for循环冒号之前添加空格
 SpaceBeforeRangeBasedForLoopColon: true
+# {}中间不添加空格
 SpaceInEmptyBlock: false
+# 在空的圆括号中添加空格
 SpaceInEmptyParentheses: false
+# 在尾随的评论前添加的空格数(只适用于//)
 SpacesBeforeTrailingComments: 1
-SpacesInAngles:  false
+# 在尖括号的<后和>前添加空格
+SpacesInAngles:  Never
+# 不在if/for/switch/while条件周围插入空格
 SpacesInConditionalStatement: false
+# 在容器(ObjC和JavaScript的数组和字典等)字面量中添加空格
 SpacesInContainerLiterals: true
+# 在C风格类型转换的括号中添加空格
 SpacesInCStyleCastParentheses: false
+# 行注释开头允许有多少个空格。要禁用最大值，请将其设置为-1，除此之外，最大值优先于最小值
+SpacesInLineCommentPrefix:
+  Minimum:         1
+  Maximum:         -1
+# 在圆括号的(后和)前添加空格
 SpacesInParentheses: false
+# 在方括号的[后和]前添加空格，lamda表达式和未指明大小的数组的声明不受影响
 SpacesInSquareBrackets: false
+# 不在[前添加空格
 SpaceBeforeSquareBrackets: false
+# 位域:每边都添加空格
+BitFieldColonSpacing: Both
+# 标准
 Standard:        Latest
+# 在语句前面被忽略的宏定义，就好像它们是一个属性一样
+StatementAttributeLikeMacros:
+  - Q_EMIT
+# 应该被解释为完整语句的宏定义
 StatementMacros:
   - Q_UNUSED
   - QT_REQUIRE_VERSION
+# tab宽度
 TabWidth:        4
+# 使用\n换行
 UseCRLF:         false
+# 使用tab字符：ForIndentation——仅将制表符用于缩进
 UseTab:          Never
+# 对空格敏感的宏定义
 WhitespaceSensitiveMacros:
   - STRINGIZE
   - PP_STRINGIZE
-  - BOOST_PP_STRINGIZE
+  - BOOST_PP_STRINGIZE
+  - NS_SWIFT_NAME
+  - CF_SWIFT_NAME

User/Bsp/armfly_bsp.c

@@ -1,10 +1,4 @@
 #include "armfly_bsp.h"
-// #include "param.h"
-// #include "interface.h"
-// #include "queue.h"
-// #include "can.h"
-// #include "netconf.h"
-// #include "dm9161.h"
 
 void bsp_init(void)
 {
@@ -16,6 +10,7 @@ void bsp_init(void)
     gpio_clock_init();
     interface_init();
 
+    uart1_init();
     enet_system_setup();
     lwip_stack_init();
     // can初始化

User/Bsp/armfly_bsp.h

@@ -1,11 +1,12 @@
 #ifndef _ARMFLY_H__
 #define _ARMFLY_H__
 
-#include "param.h"
-#include "interface.h"
-#include "queue.h"
 #include "can.h"
-#include "netconf.h"
 #include "dm9161.h"
+#include "fly_param.h"
+#include "interface.h"
+#include "netconf.h"
+#include "queue.h"
+#include "uart.h"
 
 #endif

User/Bsp/can/can.c

@@ -1,6 +1,6 @@
 #include "can.h"
+#include "fly_param.h"
 #include <string.h>
-#include "param.h"
 
 CanRxMsg can1_recv_msg;
 CanRxMsg can2_recv_msg;
@@ -10,7 +10,7 @@ CanData_TypeDef CanDataCan2; // CAN2数据
 
 void can_network_init(void)
 {
-    CAN_InitTypeDef can_parameter;
+    CAN_InitTypeDef       can_parameter;
     CAN_FilterInitTypeDef can_filter;
 
     CAN_StructInit(&can_parameter);
@@ -28,9 +28,9 @@ void can_network_init(void)
     can_parameter.CAN_RFLM = DISABLE;
     can_parameter.CAN_TXFP = DISABLE;
     can_parameter.CAN_Mode = CAN_Mode_Normal;
-    can_parameter.CAN_SJW = CAN_SJW_1tq;
-    can_parameter.CAN_BS1 = CAN_BS1_10tq; // CAN_BT_BS1_6TQ;
-    can_parameter.CAN_BS2 = CAN_BS2_3tq;  // CAN_BT_BS2_4TQ;
+    can_parameter.CAN_SJW  = CAN_SJW_1tq;
+    can_parameter.CAN_BS1  = CAN_BS1_10tq; // CAN_BT_BS1_6TQ;
+    can_parameter.CAN_BS2  = CAN_BS2_3tq;  // CAN_BT_BS2_4TQ;
 
     /* 1MBps */
 #if CAN_BAUDRATE == 1000
@@ -61,28 +61,28 @@ void can_network_init(void)
     CAN_Init(CAN2, &can_parameter);
 
     /* initialize filter */
-    can_filter.CAN_FilterNumber = 0;
-    can_filter.CAN_FilterMode = CAN_FilterMode_IdMask;
-    can_filter.CAN_FilterScale = CAN_FilterScale_32bit;
-    can_filter.CAN_FilterIdHigh = 0x0000;
-    can_filter.CAN_FilterIdLow = 0x0000;
-    can_filter.CAN_FilterMaskIdHigh = 0x0000;
-    can_filter.CAN_FilterMaskIdLow = 0x0000;
+    can_filter.CAN_FilterNumber         = 0;
+    can_filter.CAN_FilterMode           = CAN_FilterMode_IdMask;
+    can_filter.CAN_FilterScale          = CAN_FilterScale_32bit;
+    can_filter.CAN_FilterIdHigh         = 0x0000;
+    can_filter.CAN_FilterIdLow          = 0x0000;
+    can_filter.CAN_FilterMaskIdHigh     = 0x0000;
+    can_filter.CAN_FilterMaskIdLow      = 0x0000;
     can_filter.CAN_FilterFIFOAssignment = CAN_FIFO0;
-    can_filter.CAN_FilterActivation = ENABLE;
+    can_filter.CAN_FilterActivation     = ENABLE;
 
     CAN_FilterInit(&can_filter);
 
     /* CAN1 filter number */
-    can_filter.CAN_FilterNumber = 15;
-    can_filter.CAN_FilterMode = CAN_FilterMode_IdMask;
-    can_filter.CAN_FilterScale = CAN_FilterScale_32bit;
-    can_filter.CAN_FilterIdHigh = 0x0000;
-    can_filter.CAN_FilterIdLow = 0x0000;
-    can_filter.CAN_FilterMaskIdHigh = 0x0000;
-    can_filter.CAN_FilterMaskIdLow = 0x0000;
+    can_filter.CAN_FilterNumber         = 15;
+    can_filter.CAN_FilterMode           = CAN_FilterMode_IdMask;
+    can_filter.CAN_FilterScale          = CAN_FilterScale_32bit;
+    can_filter.CAN_FilterIdHigh         = 0x0000;
+    can_filter.CAN_FilterIdLow          = 0x0000;
+    can_filter.CAN_FilterMaskIdHigh     = 0x0000;
+    can_filter.CAN_FilterMaskIdLow      = 0x0000;
     can_filter.CAN_FilterFIFOAssignment = CAN_FIFO0;
-    can_filter.CAN_FilterActivation = ENABLE;
+    can_filter.CAN_FilterActivation     = ENABLE;
 
     CAN_FilterInit(&can_filter);
 
@@ -104,15 +104,15 @@ void can_nvic_config(void)
     NVIC_InitStructure.NVIC_IRQChannel = CAN1_RX0_IRQn;
     ;
     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;
-    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;
-    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0x0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;
     NVIC_Init(&NVIC_InitStructure);
 
     /* configure CAN1 NVIC */
     NVIC_InitStructure.NVIC_IRQChannel = CAN2_RX0_IRQn;
     ;
     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x1;
-    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x1;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0x1;
     NVIC_Init(&NVIC_InitStructure);
 }
 

User/Bsp/can/can.h

@@ -1,9 +1,9 @@
 #ifndef __CAN_H
 #define __CAN_H
 
-#include "stm32f4xx_can.h"
 #include "includes.h"
 #include "queue.h"
+#include "stm32f4xx_can.h"
 
 #define CAN_BAUDRATE 250
 

User/Bsp/interface/interface.c

@@ -1,102 +1,100 @@
 #include "interface.h"
 #include "stm32f4xx_gpio.h"
 
-Gpio_Clock clock_info[] =
-    {
-        // {.type = kI2C0, .AXBPeriph_Clock = RCC_I2C0},
-        // {.type = kI2C1, .AXBPeriph_Clock = RCU_I2C1},
-        // {.type = kI2C2, .AXBPeriph_Clock = RCU_I2C2},
-        // {.type = kADC0, .AXBPeriph_Clock = RCU_ADC0},
-        // {.type = kADC2, .AXBPeriph_Clock = RCU_ADC2},
-        // {.type = kSPI2, .AXBPeriph_Clock = RCU_SPI2},
-        // {.type = kUart0, .AXBPeriph_Clock = RCU_USART0},
-        // {.type = kUart5, .AXBPeriph_Clock = RCU_USART5},
-        {.type = kCAN1, .AXBPeriph_Clock = RCC_APB1Periph_CAN1},
-        {.type = kCAN2, .AXBPeriph_Clock = RCC_APB1Periph_CAN2},
-        {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC},
-        {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Tx},
-        {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Rx},
-        // //    {.type = kEthernet, .AXBPeriph_Clock = RCU_ENETPTP},
-        // {.type = kPMU, .AXBPeriph_Clock = RCU_PMU},
-        // {.type = kDMA1, .AXBPeriph_Clock = RCU_DMA1},
-        // //    {.type = kTIMER1,   .AXBPeriph_Clock = RCU_TIMER1},
+Gpio_Clock clock_info[] = {
+    // {.type = kI2C0, .AXBPeriph_Clock = RCC_I2C0},
+    // {.type = kI2C1, .AXBPeriph_Clock = RCU_I2C1},
+    // {.type = kI2C2, .AXBPeriph_Clock = RCU_I2C2},
+    // {.type = kADC0, .AXBPeriph_Clock = RCU_ADC0},
+    // {.type = kADC2, .AXBPeriph_Clock = RCU_ADC2},
+    // {.type = kSPI2, .AXBPeriph_Clock = RCU_SPI2},
+    {.type = kUart1, .AXBPeriph_Clock = RCC_APB2Periph_USART1},
+    {.type = kUart3, .AXBPeriph_Clock = RCC_APB1Periph_USART3},
+    {.type = kCAN1, .AXBPeriph_Clock = RCC_APB1Periph_CAN1},
+    {.type = kCAN2, .AXBPeriph_Clock = RCC_APB1Periph_CAN2},
+    {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC},
+    {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Tx},
+    {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Rx},
+    // //    {.type = kEthernet, .AXBPeriph_Clock = RCU_ENETPTP},
+    // {.type = kPMU, .AXBPeriph_Clock = RCU_PMU},
+    {.type = kDMA1, .AXBPeriph_Clock = RCC_AHB1Periph_DMA1},
+    // //    {.type = kTIMER1,   .AXBPeriph_Clock = RCU_TIMER1},
 };
 
-Interface_struct interface_info[] =
-    {
-        //         // I2C
-        //         {.type = kI2C0, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_6, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kI2C0, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kI2C1, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_0, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_0, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kI2C1, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kI2C2, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kI2C2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+Interface_struct interface_info[] = {
+    //         // I2C
+    //         {.type = kI2C0, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_6, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kI2C0, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kI2C1, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_0, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_0, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kI2C1, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kI2C2, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kI2C2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
 
-        // can
-        {.type = kCAN1, .GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        {.type = kCAN1, .GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // can
+    {.type = kCAN1, .GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kCAN1, .GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
 
-        //         // spi
-        //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_11, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_12, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kSPI2, .GPIOx = SPI2_CS_PORT, .GPIO_Pin = SPI2_CS_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         // spi
+    //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_11, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_12, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kSPI2, .GPIOx = SPI2_CS_PORT, .GPIO_Pin = SPI2_CS_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
 
-        //         // ADC
-        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_3, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_0, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         // ADC
+    //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_3, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_0, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
 
-        // // uart
-        // {.type = kUart0, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_7}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        // {.type = kUart0, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_7}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        // {.type = kUart0, .GPIOx = UART0_ENABLE_PORT, .GPIO_Pin = UART0_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        // {.type = kUart5, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_AF = GPIO_AF_8}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        // {.type = kUart5, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_8}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        // {.type = kUart5, .GPIOx = UART5_ENABLE_PORT, .GPIO_Pin = UART5_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // uart
+    {.type = kUart1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_USART1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kUart1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_USART1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kUart1, .GPIOx = UART1_ENABLE_PORT, .GPIO_Pin = UART1_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // {.type = kUart3, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_AF = GPIO_AF_USART3}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // {.type = kUart3, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_USART3}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // {.type = kUart3, .GPIOx = UART5_ENABLE_PORT, .GPIO_Pin = UART5_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
 
-        // ethernet
-        {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-        {.type = kEthernet, .GPIOx = ETH_RESET_PORT, .GPIO_Pin = ETH_RESET_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         //    {.type = kEthernet, .GPIOx = ETH_RXER_PORT,  .GPIO_Pin = ETH_RXER_PIN,  .GPIO_Mode = GPIO_MODE_INPUT,  .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    // ethernet
+    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = ETH_RESET_PORT, .GPIO_Pin = ETH_RESET_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         //    {.type = kEthernet, .GPIOx = ETH_RXER_PORT,  .GPIO_Pin = ETH_RXER_PIN,  .GPIO_Mode = GPIO_MODE_INPUT,  .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
 
-        //         // input
-        //         {.type = kInput, .In_Type = kLDetect, .GPIOx = LDetect1_PORT, .GPIO_Pin = LDetect1_PIN, .GPIO_Mode = GPIO_MODE_INPUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    //         // input
+    //         {.type = kInput, .In_Type = kLDetect, .GPIOx = LDetect1_PORT, .GPIO_Pin = LDetect1_PIN, .GPIO_Mode = GPIO_MODE_INPUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
 
-        // output
-        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED0_RUN_PORT, .GPIO_Pin = LED0_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED1_RUN_PORT, .GPIO_Pin = LED1_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED2_RUN_PORT, .GPIO_Pin = LED2_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED3_RUN_PORT, .GPIO_Pin = LED3_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kPRelayCtr, .GPIOx = PRelayCtr_PORT, .GPIO_Pin = PRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kNRelayCtr, .GPIOx = NRelayCtr_PORT, .GPIO_Pin = NRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kPreRelayCtr, .GPIOx = PreRelayCtr_PORT, .GPIO_Pin = PreRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kFanCtr, .GPIOx = Fan_PORT, .GPIO_Pin = Fan_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kOut1Ctr, .GPIOx = OUT1CTR_PORT, .GPIO_Pin = OUT1CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kOut2Ctr, .GPIOx = OUT2CTR_PORT, .GPIO_Pin = OUT2CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kExtWatchDog, .GPIOx = OUT2CTR_PORT, .GPIO_Pin = OUT2CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kOutput, .Out_Type = kExtRelayLed, .GPIOx = ExtRelayLed_PORT, .GPIO_Pin = ExtRelayLed_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kExtFaultLed, .GPIOx = ExtFaultLed_PORT, .GPIO_Pin = ExtFaultLed_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kISOPRelayCtr, .GPIOx = ISOPRelayCtr_PORT, .GPIO_Pin = ISOPRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kISONRelayCtr, .GPIOx = ISONRelayCtr_PORT, .GPIO_Pin = ISONRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
-        //         {.type = kOutput, .Out_Type = kSoftI2C3_SDA, .GPIOx = SI2C3_SDA_PORT, .GPIO_Pin = SI2C3_SDA_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kOutput, .Out_Type = kSoftI2C3_SCL, .GPIOx = SI2C3_SCL_PORT, .GPIO_Pin = SI2C3_SCL_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        //         {.type = kOutput, .Out_Type = kSoftI2C4_SDA, .GPIOx = SI2C4_SDA_PORT, .GPIO_Pin = SI2C4_SDA_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-        // {.type = kOutput, .Out_Type = kSoftI2C4_SCL, .GPIOx = SI2C4_SCL_PORT, .GPIO_Pin = SI2C4_SCL_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // output
+    {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED0_RUN_PORT, .GPIO_Pin = LED0_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED1_RUN_PORT, .GPIO_Pin = LED1_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED2_RUN_PORT, .GPIO_Pin = LED2_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED3_RUN_PORT, .GPIO_Pin = LED3_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kPRelayCtr, .GPIOx = PRelayCtr_PORT, .GPIO_Pin = PRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kNRelayCtr, .GPIOx = NRelayCtr_PORT, .GPIO_Pin = NRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kPreRelayCtr, .GPIOx = PreRelayCtr_PORT, .GPIO_Pin = PreRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kFanCtr, .GPIOx = Fan_PORT, .GPIO_Pin = Fan_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kOut1Ctr, .GPIOx = OUT1CTR_PORT, .GPIO_Pin = OUT1CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kOut2Ctr, .GPIOx = OUT2CTR_PORT, .GPIO_Pin = OUT2CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kExtWatchDog, .GPIOx = OUT2CTR_PORT, .GPIO_Pin = OUT2CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kOutput, .Out_Type = kExtRelayLed, .GPIOx = ExtRelayLed_PORT, .GPIO_Pin = ExtRelayLed_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kExtFaultLed, .GPIOx = ExtFaultLed_PORT, .GPIO_Pin = ExtFaultLed_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kISOPRelayCtr, .GPIOx = ISOPRelayCtr_PORT, .GPIO_Pin = ISOPRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kISONRelayCtr, .GPIOx = ISONRelayCtr_PORT, .GPIO_Pin = ISONRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+    //         {.type = kOutput, .Out_Type = kSoftI2C3_SDA, .GPIOx = SI2C3_SDA_PORT, .GPIO_Pin = SI2C3_SDA_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kOutput, .Out_Type = kSoftI2C3_SCL, .GPIOx = SI2C3_SCL_PORT, .GPIO_Pin = SI2C3_SCL_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    //         {.type = kOutput, .Out_Type = kSoftI2C4_SDA, .GPIOx = SI2C4_SDA_PORT, .GPIO_Pin = SI2C4_SDA_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // {.type = kOutput, .Out_Type = kSoftI2C4_SCL, .GPIOx = SI2C4_SCL_PORT, .GPIO_Pin = SI2C4_SCL_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
 };
 
 void interface_init(void)
@@ -108,11 +106,11 @@ void interface_init(void)
         /* 定义GPIO外设初始化结构体 */
         GPIO_InitTypeDef GPIO_StructInit;
         /* 配置GPIO初始化结构成员*/
-        GPIO_StructInit.GPIO_Mode = interface_info[index].GPIO_Mode;
+        GPIO_StructInit.GPIO_Mode  = interface_info[index].GPIO_Mode;
         GPIO_StructInit.GPIO_OType = interface_info[index].GPIO_OType;
         GPIO_StructInit.GPIO_Speed = interface_info[index].GPIO_Speed;
-        GPIO_StructInit.GPIO_PuPd = interface_info[index].GPIO_PuPd;
-        GPIO_StructInit.GPIO_Pin = interface_info[index].GPIO_Pin;
+        GPIO_StructInit.GPIO_PuPd  = interface_info[index].GPIO_PuPd;
+        GPIO_StructInit.GPIO_Pin   = interface_info[index].GPIO_Pin;
         GPIO_Init(interface_info[index].GPIOx, &GPIO_StructInit);
 
         if (interface_info[index].GPIO_Mode == GPIO_Mode_AF)
@@ -136,6 +134,11 @@ void gpio_clock_init(void)
     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOI, ENABLE);
     for (index = 0; index < sizeof(clock_info) / sizeof(Gpio_Clock); index++)
     {
+        if (clock_info[index].AXBPeriph_Clock == RCC_APB2Periph_USART1)
+        {
+            RCC_AHB2PeriphClockCmd(clock_info[index].AXBPeriph_Clock, ENABLE);
+            continue;
+        }
         RCC_AHB1PeriphClockCmd(clock_info[index].AXBPeriph_Clock, ENABLE);
     }
     // adc_clock_config(ADC_ADCCK_PCLK2_DIV8);

User/Bsp/interface/interface.h

@@ -1,9 +1,9 @@
 #ifndef __INTERFACE_H
 #define __INTERFACE_H
 
-#include <stm32f4xx.h>
-#include "stm32f4xx_rcc.h"
 #include "includes.h"
+#include "stm32f4xx_rcc.h"
+#include <stm32f4xx.h>
 
 typedef enum
 {
@@ -13,8 +13,8 @@ typedef enum
     kADC0,
     kADC2,
     kSPI2,
-    kUart0,
-    kUart5,
+    kUart1,
+    kUart3,
     kCAN1,
     kCAN2,
     kEthernet,
@@ -29,7 +29,7 @@ typedef enum
 typedef struct
 {
     interface_type type;
-    uint32_t AXBPeriph_Clock;
+    uint32_t       AXBPeriph_Clock;
 } Gpio_Clock;
 
 typedef enum
@@ -62,22 +62,22 @@ typedef enum
 typedef struct
 {
     GPIO_TypeDef *GPIOx;
-    INT32U GPIO_Pin;
-    INT8U GPIO_AF;
+    INT32U        GPIO_Pin;
+    INT8U         GPIO_AF;
 } GPIO_AF_Info;
 
 typedef struct
 {
     interface_type type;
-    Output_Type Out_Type;
-    Input_type In_Type;
-    GPIO_TypeDef *GPIOx;
-    INT32U GPIO_Pin;
-    INT32U GPIO_Mode;
-    GPIO_AF_Info AF_Info;
-    INT8U GPIO_OType;
-    INT32U GPIO_Speed;
-    INT32U GPIO_PuPd;
+    Output_Type    Out_Type;
+    Input_type     In_Type;
+    GPIO_TypeDef  *GPIOx;
+    INT32U         GPIO_Pin;
+    INT32U         GPIO_Mode;
+    GPIO_AF_Info   AF_Info;
+    INT8U          GPIO_OType;
+    INT32U         GPIO_Speed;
+    INT32U         GPIO_PuPd;
 } Interface_struct;
 
 // typedef struct
@@ -112,13 +112,13 @@ typedef struct
 // #define SI2C4_SDA_IN gpio_mode_set(SI2C4_SDA_PORT, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, SI2C4_SDA_PIN)
 // #define SI2C4_SDA_READ gpio_input_bit_get(SI2C4_SDA_PORT, SI2C4_SDA_PIN)
 
-// // uart
-// #define UART0_ENABLE_PORT GPIOE
-// #define UART0_ENABLE_PIN GPIO_PIN_5
+// uart
+#define UART1_ENABLE_PORT GPIOA
+#define UART1_ENABLE_PIN  GPIO_Pin_15
 // #define UART5_ENABLE_PORT GPIOE
 // #define UART5_ENABLE_PIN GPIO_PIN_6
-// #define UART0_TX_ENABLE GPIO_SetBits(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
-// #define UART0_RX_ENABLE GPIO_ResetBits(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
+#define UART1_TX_ENABLE GPIO_SetBits(UART1_ENABLE_PORT, UART1_ENABLE_PIN)
+#define UART1_RX_ENABLE GPIO_ResetBits(UART1_ENABLE_PORT, UART1_ENABLE_PIN)
 // #define UART5_TX_ENABLE GPIO_SetBits(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
 // #define UART5_RX_ENABLE GPIO_ResetBits(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
 
@@ -129,42 +129,42 @@ typedef struct
 // #define SPI2_CS_LOW GPIO_ResetBits(SPI2_CS_PORT, SPI2_CS_PIN)
 
 // // ethernet
-// //#define		ENET_REF_CLK					GPIO_PIN_1
-// //#define		ENET_REF_CLK_Port			GPIOA
-// //#define		ENET_MDC							GPIO_PIN_1
-// //#define		ENET_MDC_Port					GPIOC
-// //#define		ENET_MDIO							GPIO_PIN_2
-// //#define		ENET_MDIO_Port				GPIOA
-// //#define		ENET_CRSDV						GPIO_PIN_7
-// //#define		ENET_CRSDV_Port				GPIOA
-// //#define		ENET_RXD0							GPIO_PIN_4
-// //#define		ENET_RXD0_Port				GPIOC
-// //#define		ENET_RXD1							GPIO_PIN_5
-// //#define		ENET_RXD1_Port				GPIOC
-// //#define		ENET_TXEN							GPIO_PIN_11
-// //#define		ENET_TXEN_Port				GPIOG
-// //#define		ENET_RXER							GPIO_PIN_12
-// //#define		ENET_RXER_Port				GPIOG
-// //#define		ENET_TXD0							GPIO_PIN_13
-// //#define		ENET_TXD0_Port				GPIOG
-// //#define		ENET_TXD1							GPIO_PIN_14
-// //#define		ENET_TXD1_Port				GPIOG
+// //#define        ENET_REF_CLK                    GPIO_PIN_1
+// //#define        ENET_REF_CLK_Port           GPIOA
+// //#define        ENET_MDC                            GPIO_PIN_1
+// //#define        ENET_MDC_Port                   GPIOC
+// //#define        ENET_MDIO                           GPIO_PIN_2
+// //#define        ENET_MDIO_Port              GPIOA
+// //#define        ENET_CRSDV                      GPIO_PIN_7
+// //#define        ENET_CRSDV_Port             GPIOA
+// //#define        ENET_RXD0                           GPIO_PIN_4
+// //#define        ENET_RXD0_Port              GPIOC
+// //#define        ENET_RXD1                           GPIO_PIN_5
+// //#define        ENET_RXD1_Port              GPIOC
+// //#define        ENET_TXEN                           GPIO_PIN_11
+// //#define        ENET_TXEN_Port              GPIOG
+// //#define        ENET_RXER                           GPIO_PIN_12
+// //#define        ENET_RXER_Port              GPIOG
+// //#define        ENET_TXD0                           GPIO_PIN_13
+// //#define        ENET_TXD0_Port              GPIOG
+// //#define        ENET_TXD1                           GPIO_PIN_14
+// //#define        ENET_TXD1_Port              GPIOG
 #define ETH_RESET_PORT GPIOH
-#define ETH_RESET_PIN GPIO_Pin_6
+#define ETH_RESET_PIN  GPIO_Pin_6
 // #define ETH_RXER_PORT GPIOG
 // #define ETH_RXER_PIN GPIO_PIN_12
-#define ETH_RESET_ON GPIO_ResetBits(ETH_RESET_PORT, ETH_RESET_PIN)
+#define ETH_RESET_ON  GPIO_ResetBits(ETH_RESET_PORT, ETH_RESET_PIN)
 #define ETH_RESET_OFF GPIO_SetBits(ETH_RESET_PORT, ETH_RESET_PIN)
 
 // output
 #define LED0_RUN_PORT GPIOC
-#define LED0_RUN_PIN GPIO_Pin_2
+#define LED0_RUN_PIN  GPIO_Pin_2
 #define LED1_RUN_PORT GPIOF
-#define LED1_RUN_PIN GPIO_Pin_7
+#define LED1_RUN_PIN  GPIO_Pin_7
 #define LED2_RUN_PORT GPIOF
-#define LED2_RUN_PIN GPIO_Pin_8
+#define LED2_RUN_PIN  GPIO_Pin_8
 #define LED3_RUN_PORT GPIOI
-#define LED3_RUN_PIN GPIO_Pin_10
+#define LED3_RUN_PIN  GPIO_Pin_10
 // #define PRelayCtr_PORT GPIOD
 // #define PRelayCtr_PIN GPIO_PIN_6
 // #define NRelayCtr_PORT GPIOD
@@ -193,17 +193,17 @@ typedef struct
 // #define LDetect1_PIN GPIO_PIN_13
 
 // output operation
-#define LED0_RUN_ON GPIO_SetBits(LED0_RUN_PORT, LED0_RUN_PIN)
-#define LED0_RUN_OFF GPIO_ResetBits(LED0_RUN_PORT, LED0_RUN_PIN)
+#define LED0_RUN_ON     GPIO_SetBits(LED0_RUN_PORT, LED0_RUN_PIN)
+#define LED0_RUN_OFF    GPIO_ResetBits(LED0_RUN_PORT, LED0_RUN_PIN)
 #define LED0_RUN_TOGGLE GPIO_ToggleBits(LED0_RUN_PORT, LED0_RUN_PIN)
-#define LED1_RUN_ON GPIO_SetBits(LED1_RUN_PORT, LED1_RUN_PIN)
-#define LED1_RUN_OFF GPIO_ResetBits(LED1_RUN_PORT, LED1_RUN_PIN)
+#define LED1_RUN_ON     GPIO_SetBits(LED1_RUN_PORT, LED1_RUN_PIN)
+#define LED1_RUN_OFF    GPIO_ResetBits(LED1_RUN_PORT, LED1_RUN_PIN)
 #define LED1_RUN_TOGGLE GPIO_ToggleBits(LED1_RUN_PORT, LED1_RUN_PIN)
-#define LED2_RUN_ON GPIO_SetBits(LED2_RUN_PORT, LED2_RUN_PIN)
-#define LED2_RUN_OFF GPIO_ResetBits(LED2_RUN_PORT, LED2_RUN_PIN)
+#define LED2_RUN_ON     GPIO_SetBits(LED2_RUN_PORT, LED2_RUN_PIN)
+#define LED2_RUN_OFF    GPIO_ResetBits(LED2_RUN_PORT, LED2_RUN_PIN)
 #define LED2_RUN_TOGGLE GPIO_ToggleBits(LED2_RUN_PORT, LED2_RUN_PIN)
-#define LED3_RUN_ON GPIO_SetBits(LED3_RUN_PORT, LED3_RUN_PIN)
-#define LED3_RUN_OFF GPIO_ResetBits(LED3_RUN_PORT, LED3_RUN_PIN)
+#define LED3_RUN_ON     GPIO_SetBits(LED3_RUN_PORT, LED3_RUN_PIN)
+#define LED3_RUN_OFF    GPIO_ResetBits(LED3_RUN_PORT, LED3_RUN_PIN)
 #define LED3_RUN_TOGGLE GPIO_ToggleBits(LED3_RUN_PORT, LED3_RUN_PIN)
 // #define PRelayCtr_ON GPIO_SetBits(PRelayCtr_PORT, PRelayCtr_PIN)
 // #define PRelayCtr_OFF GPIO_ResetBits(PRelayCtr_PORT, PRelayCtr_PIN)

User/Bsp/iwdg/iwdg.c

@@ -0,0 +1,44 @@
+#include "iwdg.h"
+
+INT32U    g_dog      = 0;
+OS_EVENT *iwdg_mutex = NULL;
+
+//初始化独立看门狗
+// prer:分频数:0~7(只有低3位有效!)
+// rlr:自动重装载值,0~0XFFF.
+//分频因子=4*2^prer.但最大值只能是256!
+// rlr:重装载寄存器值:低11位有效.
+//时间计算(大概):Tout=((4*2^prer)*rlr)/32 (ms).
+void iwdg_init(void)
+{
+    IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); //使能对IWDG->PR IWDG->RLR的写
+
+    IWDG_SetPrescaler(IWDG_Prescaler_128); //设置IWDG分频系数
+
+    IWDG_SetReload(0XFFF); //设置IWDG装载值
+
+    IWDG_ReloadCounter(); // reload
+
+    IWDG_Enable(); //使能看门狗
+}
+
+void iwdg_feed(INT32U dog)
+{
+    INT8U  err     = 0;
+    INT32U all_dog = CURRENT_DOG | SOC_DOG | ADC_DOG | INCAN_RX_DOG | INCAN_TX_DOG | INCAN_INFO_DOG | CAN2_TX_DOG | CAN2_RX_DOG | FAULT_DIG_DOG | UART1_DOG | UART5_DOG | BALANCE_DOG | MISC_DOG | PROCESS_DOG;
+    OSMutexPend(iwdg_mutex, 0, &err);
+    g_dog |= dog;
+    OSMutexPost(iwdg_mutex);
+    if (g_dog == all_dog)
+    {
+        /* 重载IWDG计数 */
+        IWDG_ReloadCounter();
+        OSMutexPend(iwdg_mutex, 0, &err);
+        g_dog = 0;
+        OSMutexPost(iwdg_mutex);
+    }
+}
+
+void iwdg_disable(void)
+{
+}

User/Bsp/iwdg/iwdg.h

@@ -0,0 +1,26 @@
+#ifndef __WTDG_H
+#define __WTDG_H
+#include "includes.h"
+#include "stm32f4xx_iwdg.h"
+
+#define CURRENT_DOG    0x00000001
+#define SOC_DOG        0x00000002
+#define ADC_DOG        0x00000004
+#define INCAN_RX_DOG   0x00000008
+#define INCAN_TX_DOG   0x00000010
+#define INCAN_INFO_DOG 0x00000020
+#define CAN2_TX_DOG    0x00000040
+#define CAN2_RX_DOG    0x00000080
+#define FAULT_DIG_DOG  0x00000100
+#define UART1_DOG      0x00000200
+#define UART5_DOG      0x00000400
+#define BALANCE_DOG    0x00000800
+#define MISC_DOG       0x00001000
+#define PROCESS_DOG    0x00002000
+
+extern OS_EVENT *wtdg_mutex;
+
+void iwdg_init(void);
+void iwdg_feed(INT32U dog);
+
+#endif

User/Bsp/uart/uart.c

@@ -0,0 +1,357 @@
+#include "uart.h"
+
+static INT8U uart1_tx_buf[UART1_TX_LEN]  = {0};
+static INT8U uart1_rx_buf[UART1_REC_LEN] = {0};
+// static INT8U uart5_tx_buf[UART3_TX_LEN]  = {0};
+// static INT8U uart5_rx_buf[UART3_REC_LEN] = {0};
+
+UartFrame_TypeDef Uart1FrameStruct[MAX_MSG_NUM];
+// UartFrame_TypeDef Uart5FrameStruct[MAX_MSG_NUM];
+
+extern OS_EVENT *uart1_mbox;
+// extern OS_EVENT *uart5_mbox;
+
+/*!
+    \brief      configure DMA interrupt
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void uart1_nvic_config(void)
+{
+    NVIC_InitTypeDef NVIC_InitStructure;
+    // Usart1 NVIC 配置
+    NVIC_InitStructure.NVIC_IRQChannel                   = USART1_IRQn; //串口1中断通道
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;           //抢占优先级
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;           //子优先级3
+    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;      // IRQ通道使能
+    NVIC_Init(&NVIC_InitStructure);                                     //根据指定的参数初始化VIC寄存器
+}
+
+/*!
+    \brief      configure DMA
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void uart1_dma_init(void)
+{
+    DMA_InitTypeDef DMA_InitStructure;
+
+    /* deinitialize UART0_DMA channel7(USART0 tx) */
+    DMA_DeInit(DMA1_Stream7);
+    /* 配置 DMA Stream */
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(USART1->DR));   // DMA外设地址
+    DMA_InitStructure.DMA_BufferSize         = UART1_TX_LEN;                //数据传输量
+    DMA_InitStructure.DMA_PeripheralInc      = DMA_PeripheralInc_Disable;   //外设非增量模式
+    DMA_InitStructure.DMA_MemoryInc          = DMA_MemoryInc_Enable;        //存储器增量模式
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //外设数据长度:8位
+    DMA_InitStructure.DMA_MemoryDataSize     = DMA_MemoryDataSize_Byte;     //存储器数据长度:8位
+    DMA_InitStructure.DMA_Mode               = DMA_Mode_Normal;             // 使用普通模式
+    DMA_InitStructure.DMA_Priority           = DMA_Priority_Medium;         //中等优先级
+    DMA_InitStructure.DMA_FIFOMode           = DMA_FIFOMode_Disable;
+    DMA_InitStructure.DMA_FIFOThreshold      = DMA_FIFOThreshold_Full;
+    DMA_InitStructure.DMA_MemoryBurst        = DMA_MemoryBurst_Single;     //存储器突发单次传输
+    DMA_InitStructure.DMA_PeripheralBurst    = DMA_PeripheralBurst_Single; //外设突发单次传输
+    DMA_InitStructure.DMA_Channel            = DMA_Channel_4;              //通道选择
+    DMA_InitStructure.DMA_DIR                = DMA_DIR_MemoryToPeripheral; //存储器到外设模式
+    DMA_InitStructure.DMA_Memory0BaseAddr    = (u32)uart1_tx_buf;          // DMA 存储器0地址
+    DMA_Init(DMA1_Stream7, &DMA_InitStructure);                            //初始化DMA Stream
+
+    /* deinitialize UART0_DMA channel2 (USART0 rx) */
+    DMA_DeInit(DMA1_Stream2);
+    /* 配置 DMA Stream */
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(USART1->DR));   // DMA外设地址
+    DMA_InitStructure.DMA_BufferSize         = UART1_REC_LEN;               //数据传输量
+    DMA_InitStructure.DMA_PeripheralInc      = DMA_PeripheralInc_Disable;   //外设非增量模式
+    DMA_InitStructure.DMA_MemoryInc          = DMA_MemoryInc_Enable;        //存储器增量模式
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //外设数据长度:8位
+    DMA_InitStructure.DMA_MemoryDataSize     = DMA_MemoryDataSize_Byte;     //存储器数据长度:8位
+    DMA_InitStructure.DMA_Mode               = DMA_Mode_Circular;           // 使用循环模式
+    DMA_InitStructure.DMA_Priority           = DMA_Priority_Medium;         //中等优先级
+    DMA_InitStructure.DMA_FIFOMode           = DMA_FIFOMode_Disable;
+    DMA_InitStructure.DMA_FIFOThreshold      = DMA_FIFOThreshold_Full;
+    DMA_InitStructure.DMA_MemoryBurst        = DMA_MemoryBurst_Single;     //存储器突发单次传输
+    DMA_InitStructure.DMA_PeripheralBurst    = DMA_PeripheralBurst_Single; //外设突发单次传输
+    /* 配置 RX DMA */
+    DMA_InitStructure.DMA_Channel         = DMA_Channel_4;              /* 配置接收通道 */
+    DMA_InitStructure.DMA_DIR             = DMA_DIR_PeripheralToMemory; /* 设置从外设到内存 */
+    DMA_InitStructure.DMA_Memory0BaseAddr = (u32)uart1_rx_buf;          /* 设置内存地址 */
+    DMA_Init(DMA1_Stream2, &DMA_InitStructure);
+
+    /* 使能 DMA USART TX Stream */
+    USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE); // 使能串口DMA接收数据
+}
+
+void uart1_config(void)
+{
+    USART_InitTypeDef USART_InitStructure;
+    // USART1 初始化设置
+    USART_InitStructure.USART_BaudRate            = 9600U;                          //波特率设置
+    USART_InitStructure.USART_WordLength          = USART_WordLength_8b;            //字长为8位数据格式
+    USART_InitStructure.USART_StopBits            = USART_StopBits_1;               //一个停止位
+    USART_InitStructure.USART_Parity              = USART_Parity_No;                //无奇偶校验位
+    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; //无硬件数据流控制
+    USART_InitStructure.USART_Mode                = USART_Mode_Rx | USART_Mode_Tx;  //收发模式
+    USART_Init(USART1, &USART_InitStructure);                                       //初始化串口1
+
+    USART_Cmd(USART1, ENABLE); //使能串口1
+}
+
+void uart1_init(void)
+{
+    uart1_config();
+    uart1_dma_init();
+    uart1_nvic_config();
+    //    /* USART DMA enable*/
+    USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);
+
+    /*configure DMA0 interrupt*/
+    USART_ITConfig(USART1, USART_IT_IDLE, ENABLE); //开启空闲中断
+    USART_ITConfig(USART1, USART_IT_TC, ENABLE);
+
+    UART1_RX_ENABLE;
+}
+
+//开启一次DMA传输
+// DMA_Streamx:DMA数据流,DMA1_Stream0~7/DMA2_Stream0~7
+// count:数据传输量
+void Uart1DMA_Enable(DMA_Stream_TypeDef *DMA_Streamx, u16 count)
+{
+    DMA_Cmd(DMA_Streamx, DISABLE); //关闭DMA传输
+    while (DMA_GetCmdStatus(DMA_Streamx) != DISABLE)
+    {
+    } //确保DMA可以被设置
+
+    DMA_SetCurrDataCounter(DMA_Streamx, count); //数据传输量
+    DMA_Cmd(DMA_Streamx, ENABLE);               //开启DMA传输
+}
+
+void Uart1_dma_Send_Data(const INT8U *buf, INT16U len)
+{
+    //    INT16U cnt = 0;
+    if (RESET != USART_GetFlagStatus(UART1_DMA, USART_FLAG_TC))
+    {
+        DMA_ClearFlag(DMA1_Stream2, DMA_FLAG_TCIF5);
+    }
+    UART1_TX_ENABLE;
+    if (len > UART1_TX_LEN)
+    {
+        len = UART1_TX_LEN;
+    }
+    memcpy(uart1_tx_buf, buf, len);
+
+    USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE); // 使能DMA串口发送数据
+    Uart1DMA_Enable(DMA1_Stream7, len);
+}
+
+void USART1_IRQHandler(void)
+{
+    static INT8U   u0_index = 0;
+    volatile INT8U clear    = 0;
+    INT8U          rec_cnt  = 0;
+    if (RESET != USART_GetITStatus(USART1, USART_IT_IDLE))
+    {
+        clear = USART1->SR;
+        clear = USART1->DR; // 先读SR, 再读DR, 就是为了消除IDLE中断
+
+        DMA_Cmd(DMA1_Stream2, DISABLE);
+        DMA_ClearFlag(DMA1_Stream2, DMA_FLAG_TCIF5);
+        rec_cnt = UART1_REC_LEN - DMA_GetCurrDataCounter(DMA1_Stream2); // 获得接收帧帧长  特别注意: 帧长不是DMA_GetCurrDataCounter(DMA2_Stream5)
+        // dma_channel_disable(UART0_DMA, UART0_DMA_RXCH);
+        // dma_flag_clear(UART0_DMA, UART0_DMA_RXCH, DMA_FLAG_FTF);
+        // rec_cnt = dma_transfer_number_get(UART0_DMA, UART0_DMA_RXCH);
+        // rec_cnt = UART0_REC_LEN - rec_cnt;
+        memcpy(Uart1FrameStruct[u0_index].buf, uart1_rx_buf, rec_cnt);
+        Uart1FrameStruct[u0_index].len = rec_cnt;
+        OSMboxPost(uart1_mbox, &Uart1FrameStruct[u0_index]);
+        if (u0_index < MAX_MSG_NUM - 1)
+        {
+            u0_index++;
+        }
+        else
+        {
+            u0_index = 0;
+        }
+        DMA_SetCurrDataCounter(DMA1_Stream7, UART1_REC_LEN);
+        DMA_Cmd(DMA1_Stream7, ENABLE);
+        // dma_channel_enable(UART0_DMA, UART0_DMA_RXCH);
+    }
+    else if (RESET != USART_GetITStatus(USART1, USART_IT_TC))
+    {
+        USART_ClearITPendingBit(USART1, USART_IT_TC); // 清除发送完成标标志位
+        UART1_RX_ENABLE;                              // 485接收使能
+        Uart1DMA_Enable(DMA1_Stream2, UART1_REC_LEN); // DMA接收使能
+        DMA_Cmd(DMA1_Stream7, DISABLE);               // 关闭发送DMA
+        DMA_SetCurrDataCounter(DMA1_Stream7, 0);      // 清除发送数据长度
+
+        // usart_interrupt_flag_clear(USART0, USART_INT_FLAG_TC);
+        // UART1_RX_ENABLE;
+        // dma_channel_enable(UART0_DMA, UART0_DMA_RXCH);
+        // usart_dma_transmit_config(USART0, USART_DENT_DISABLE);
+        // dma_channel_disable(UART0_DMA, UART0_DMA_TXCH);
+    }
+}
+
+// //uart5
+// /*!
+//     \brief      configure DMA interrupt
+//     \param[in]  none
+//     \param[out] none
+//     \retval     none
+// */
+// void uart5_nvic_config(void)
+// {
+//     nvic_irq_enable(USART5_IRQn, 0, 0);
+// }
+
+// /*!
+//     \brief      configure DMA
+//     \param[in]  none
+//     \param[out] none
+//     \retval     none
+// */
+// void uart5_dma_init(void)
+// {
+//     dma_single_data_parameter_struct dma_init_struct;
+
+//     /* deinitialize UART5_DMA channel6(USART5 tx) */
+//     dma_single_data_para_struct_init(&dma_init_struct);
+//     dma_deinit(UART5_DMA, UART5_DMA_TXCH);
+//     dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
+//     dma_init_struct.memory0_addr = (uint32_t)uart5_tx_buf;
+//     dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
+//     dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
+//     dma_init_struct.number = UART5_TX_LEN;//ARRAYNUM(uart0_tx_buf);
+//     dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART5);
+//     dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
+//     dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
+//     dma_single_data_mode_init(UART5_DMA, UART5_DMA_TXCH, &dma_init_struct);
+
+//     /* configure DMA mode */
+//     dma_circulation_disable(UART5_DMA, UART5_DMA_TXCH);
+//     dma_channel_subperipheral_select(UART5_DMA, UART5_DMA_TXCH, DMA_SUBPERI5);
+
+//     /* enable UART5_DMA channel7 */
+//     dma_channel_enable(UART5_DMA, UART5_DMA_TXCH);
+
+//     /* deinitialize UART5_DMA channel2 (USART5 rx) */
+//     dma_deinit(UART5_DMA, UART5_DMA_RXCH);
+//     dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
+//     dma_init_struct.memory0_addr = (uint32_t)uart5_rx_buf;
+//     dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
+//     dma_init_struct.number = UART5_REC_LEN;//10;
+//     dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART5);
+//     dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
+//     dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
+//     dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
+//     dma_single_data_mode_init(UART5_DMA, UART5_DMA_RXCH, &dma_init_struct);
+
+//     /* configure DMA mode */
+//     dma_circulation_disable(UART5_DMA, UART5_DMA_RXCH);
+//     dma_channel_subperipheral_select(UART5_DMA, UART5_DMA_RXCH, DMA_SUBPERI5);
+
+//     /* enable UART5_DMA channel2 */
+//     dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
+
+// }
+
+// void uart5_config(void)
+// {
+//     /* USART configure */
+//     usart_deinit(USART5);
+//     usart_baudrate_set(USART5,115200U);
+//     usart_parity_config(USART5, USART_PM_NONE);
+//     usart_word_length_set(USART5, USART_WL_8BIT);
+//     usart_stop_bit_set(USART5, USART_STB_1BIT);
+//     usart_receive_config(USART5, USART_RECEIVE_ENABLE);
+//     usart_transmit_config(USART5, USART_TRANSMIT_ENABLE);
+//     usart_enable(USART5);
+// }
+
+// void uart5_init(void)
+// {
+//     uart5_config();
+//     uart5_dma_init();
+//     uart5_nvic_config();
+//     /* USART DMA enable*/
+//     usart_dma_receive_config(USART5, USART_DENR_ENABLE);
+// //    usart_dma_transmit_config(USART5, USART_DENT_ENABLE);
+
+//     /*configure DMA5 interrupt*/
+//     usart_interrupt_enable(USART5, USART_INT_IDLE);
+//     usart_interrupt_enable(USART5, USART_INT_TC);
+
+//     UART5_RX_ENABLE;
+// }
+
+// void Uart5_Send_Data(const INT8U *buf, INT16U len)
+// {
+//     INT8U i;
+
+//     UART5_TX_ENABLE;  // 485 发送使能
+//     for(i=0; i<len; i++)		                                                      //循环发送数据
+//     {
+//         while(usart_flag_get(USART5, USART_FLAG_TC) == RESET);
+//         usart_data_transmit(USART5, buf[i]);
+//     }
+//     while(usart_flag_get(USART5, USART_FLAG_TC) == RESET);
+
+//     UART5_RX_ENABLE;  // 接收使能
+// }
+
+// void Uart5_dma_Send_Data(const INT8U *buf, INT16U len)
+// {
+//     if(dma_flag_get(UART5_DMA, UART5_DMA_TXCH, DMA_FLAG_FTF)){
+//         dma_flag_clear(UART5_DMA, UART5_DMA_TXCH, DMA_FLAG_FTF);
+//     }
+
+//     UART5_TX_ENABLE;  // 485 发送使能
+//     if(len > UART5_TX_LEN)
+//     {
+//         len = UART5_TX_LEN;
+//     }
+//     memcpy(uart5_tx_buf, buf, len);
+//     uart_dma_enable(UART5_DMA, UART5_DMA_TXCH, len);
+
+//     usart_dma_transmit_config(USART5, USART_DENT_ENABLE);
+// }
+
+// void USART5_IRQHandler(void)
+// {
+//     static INT8U u5_index = 0;
+//     volatile INT8U clear   = 0;
+//     INT8U rec_cnt = 0;
+//     if(RESET != usart_interrupt_flag_get(USART5, USART_INT_FLAG_IDLE))
+//     {
+//         clear = USART_STAT0(USART5);
+// //        clear = usart_data_receive(USART5);
+//         clear = USART_DATA(USART5);
+//         dma_channel_disable(UART5_DMA, UART5_DMA_RXCH);
+// //        dma_interrupt_flag_clear(UART5_DMA, UART5_DMA_RXCH, DMA_INT_FLAG_FTF);
+//         dma_flag_clear(UART5_DMA, UART5_DMA_RXCH, DMA_FLAG_FTF);
+//         rec_cnt = dma_transfer_number_get(UART5_DMA, UART5_DMA_RXCH);
+//         rec_cnt = UART5_REC_LEN - rec_cnt;
+//         memcpy(Uart5FrameStruct[u5_index].buf, uart5_rx_buf, rec_cnt);
+//         Uart5FrameStruct[u5_index].len = rec_cnt;
+//         OSMboxPost(uart5_mbox, &Uart5FrameStruct[u5_index]);
+//         if(u5_index < MAX_MSG_NUM - 1)
+//         {
+//             u5_index++;
+//         }
+//         else
+//         {
+//             u5_index = 0;
+//         }
+// //        dma_transfer_number_config(UART5_DMA, UART5_DMA_RXCH, 0);
+//         dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
+//     }
+//     else if(RESET != usart_interrupt_flag_get(USART5, USART_INT_FLAG_TC))
+//     {
+//         usart_interrupt_flag_clear(USART5, USART_INT_FLAG_TC);
+//         UART5_RX_ENABLE;
+//         dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
+//         usart_dma_transmit_config(USART5, USART_DENT_DISABLE);
+//         dma_channel_disable(UART5_DMA, UART5_DMA_TXCH);
+//     }
+// }

User/Bsp/uart/uart.h

@@ -0,0 +1,32 @@
+#ifndef __UART_H
+#define __UART_H
+#include "includes.h"
+#include "interface.h"
+#include "stm32f4xx_usart.h"
+#include "string.h"
+#define UART1_REC_LEN 128
+#define UART1_TX_LEN  128
+#define UART3_REC_LEN 128
+#define UART3_TX_LEN  128
+
+#define UART1_DMA      DMA2
+#define UART1_DMA_RXCH DMA_CH5
+#define UART1_DMA_TXCH DMA_CH7
+
+#define UART3_DMA      DMA2
+#define UART3_DMA_RXCH DMA_CH2
+#define UART3_DMA_TXCH DMA_CH6
+
+#define MAX_MSG_NUM 10
+
+typedef struct
+{
+    INT8U buf[128];
+    INT8U len;
+} UartFrame_TypeDef;
+
+void uart1_init(void);
+// void uart3_init(void);
+void Uart1_dma_Send_Data(const INT8U *buf, INT16U len);
+// void Uart3_dma_Send_Data(const INT8U *buf, INT16U len);
+#endif

User/app/dm9000/dm9000.h

@@ -1,12 +1,12 @@
 /****************************************************************************
- * Copyright (C), 2009-2010, www.armfly.com  安富莱电子
+ * Copyright (C), 2009-2010, www.armfly.com  瀹夊瘜鑾辩數瀛�
  *
- * 文件名: dm9k_uip.c
- * 内容简述: Davicom DM9000A uP NIC fast Ethernet driver for uIP.
+ * 鏂囦欢鍚�: dm9k_uip.c
+ * 鍐呭�绠€杩�: Davicom DM9000A uP NIC fast Ethernet driver for uIP.
  *
- * 文件历史:
- * 版本号  日期       作者    说明
- * v0.1    2010-01-18 armfly  创建该文件
+ * 鏂囦欢鍘嗗彶:
+ * 鐗堟湰鍙�  鏃ユ湡       浣滆€�    璇存槑
+ * v0.1    2010-01-18 armfly  鍒涘缓璇ユ枃浠�
  *
  */
 
@@ -16,84 +16,84 @@
 #include <inttypes.h>
 
 /* DM9000 REGISTER LIST */
-#define DM9000_REG_NCR 0x00
-#define DM9000_REG_NSR 0x01
-#define DM9000_REG_TCR 0x02
-#define DM9000_REG_TSR1 0x03
-#define DM9000_REG_TSR2 0x04
-#define DM9000_REG_RCR 0x05
-#define DM9000_REG_RSR 0x06
-#define DM9000_REG_ROCR 0x07
-#define DM9000_REG_BPTR 0x08
-#define DM9000_REG_FCTR 0x09
-#define DM9000_REG_FCR 0x0A
-#define DM9000_REG_EPCR 0x0B
-#define DM9000_REG_EPAR 0x0C
-#define DM9000_REG_EPDRL 0x0D
-#define DM9000_REG_EPDRH 0x0E
-#define DM9000_REG_WAR 0x0F
-#define DM9000_REG_PAR 0x10
-#define DM9000_REG_MAR 0x16
-#define DM9000_REG_GPCR 0x1E
-#define DM9000_REG_GPR 0x1F
-#define DM9000_REG_VID_L 0x28
-#define DM9000_REG_VID_H 0x29
-#define DM9000_REG_PID_L 0x2A
-#define DM9000_REG_PID_H 0x2B
-#define DM9000_REG_CHIPR 0x2C
-#define DM9000_REG_TCR2 0x2D
-#define DM9000_REG_OTCR 0x2E
-#define DM9000_REG_SMCR 0x2F
+#define DM9000_REG_NCR    0x00
+#define DM9000_REG_NSR    0x01
+#define DM9000_REG_TCR    0x02
+#define DM9000_REG_TSR1   0x03
+#define DM9000_REG_TSR2   0x04
+#define DM9000_REG_RCR    0x05
+#define DM9000_REG_RSR    0x06
+#define DM9000_REG_ROCR   0x07
+#define DM9000_REG_BPTR   0x08
+#define DM9000_REG_FCTR   0x09
+#define DM9000_REG_FCR    0x0A
+#define DM9000_REG_EPCR   0x0B
+#define DM9000_REG_EPAR   0x0C
+#define DM9000_REG_EPDRL  0x0D
+#define DM9000_REG_EPDRH  0x0E
+#define DM9000_REG_WAR    0x0F
+#define DM9000_REG_PAR    0x10
+#define DM9000_REG_MAR    0x16
+#define DM9000_REG_GPCR   0x1E
+#define DM9000_REG_GPR    0x1F
+#define DM9000_REG_VID_L  0x28
+#define DM9000_REG_VID_H  0x29
+#define DM9000_REG_PID_L  0x2A
+#define DM9000_REG_PID_H  0x2B
+#define DM9000_REG_CHIPR  0x2C
+#define DM9000_REG_TCR2   0x2D
+#define DM9000_REG_OTCR   0x2E
+#define DM9000_REG_SMCR   0x2F
 #define DM9000_REG_ETXCSR 0x30
-#define DM9000_REG_TCSCR 0x31
+#define DM9000_REG_TCSCR  0x31
 #define DM9000_REG_RCSCSR 0x32
 #define DM9000_REG_MRCMDX 0xF0
-#define DM9000_REG_MRCMD 0xF2
-#define DM9000_REG_MRRL 0xF4
-#define DM9000_REG_MRRH 0xF5
+#define DM9000_REG_MRCMD  0xF2
+#define DM9000_REG_MRRL   0xF4
+#define DM9000_REG_MRRH   0xF5
 #define DM9000_REG_MWCMDX 0xF6
-#define DM9000_REG_MWCMD 0xF8
-#define DM9000_REG_MWRL 0xFA
-#define DM9000_REG_MWRH 0xFB
-#define DM9000_REG_TXPLL 0xFC
-#define DM9000_REG_TXPLH 0xFD
-#define DM9000_REG_ISR 0xFE
-#define DM9000_REG_IMR 0xFF
+#define DM9000_REG_MWCMD  0xF8
+#define DM9000_REG_MWRL   0xFA
+#define DM9000_REG_MWRH   0xFB
+#define DM9000_REG_TXPLL  0xFC
+#define DM9000_REG_TXPLH  0xFD
+#define DM9000_REG_ISR    0xFE
+#define DM9000_REG_IMR    0xFF
 
-/* 相关宏设置 */
+/* 鐩稿叧瀹忚�缃� */
 #define DM9000A_ID_OK 0x0A469000
 
 #define DM9000_BYTE_MODE 0x01
 #define DM9000_WORD_MODE 0x00
-#define DM9000_PHY 0x40
-#define DM9000_PKT_RDY 0x01
+#define DM9000_PHY       0x40
+#define DM9000_PKT_RDY   0x01
 #define DM9000_PKT_NORDY 0x00
 #define DM9000_REG_RESET 0x03
 
-#define DM9000_RX_INTR 0x01       /* 接收中断判断 bit */
-#define DM9000_TX_INTR 0x02       /* 传送中断判断 bit */
-#define DM9000_OVERFLOW_INTR 0x04 /* 内存溢出中断判断 bit */
-#define DM9000_LINK_CHANG 0x20    /* 连接变动中断判断 bit */
+#define DM9000_RX_INTR       0x01 /* 鎺ユ敹涓�柇鍒ゆ柇 bit */
+#define DM9000_TX_INTR       0x02 /* 浼犻€佷腑鏂�垽鏂� bit */
+#define DM9000_OVERFLOW_INTR 0x04 /* 鍐呭瓨婧㈠嚭涓�柇鍒ゆ柇 bit */
+#define DM9000_LINK_CHANG    0x20 /* 杩炴帴鍙樺姩涓�柇鍒ゆ柇 bit */
 
-#define DM9000_PHY_ON 0x00     /* 设定 PHY 开启 */
-#define DM9000_PHY_OFF 0x01    /* 设定 PHY 关闭 */
-#define DM9000_RCR_SET 0x31    /* 设定 接收功能 (不收 CRC 及 超长包) */
-#define DM9000_TCR_SET 0x01    /* 设定 传送功能 */
-#define DM9000_RCR_OFF 0x00    /* 设定 接收功能关关闭设置 */
-#define DM9000_BPTR_SET 0x37   /* 设定 Back Pressure 条件设置 */
-#define DM9000_FCTR_SET 0x38   /* 设定 Flow Control 条件设置 */
-#define DM9000_TCR2_SET 0x80   /* 设置 LED 显示模式 */
-#define DM9000_OTCR_SET 0x80   /* 设置 DM9000 工作频率 0x80 = 100Mhz */
-#define DM9000_ETXCSR_SET 0x83 /* 设置 Early Tramsmit 条件设置 */
-#define DM9000_FCR_SET 0x28    /* 开启 网络流控功能设置 */
-#define DM9000_TCSCR_SET 0x07  /* 设定 CHECKSUM 传送运算 设置 */
-#define DM9000_RCSCSR_SET 0x03 /* 设定 CHECKSUM 接收检查 设置 */
-#define DM9000_IMR_SET 0x81    /* 设定 启用中断使能 条件设置 */
-#define DM9000_IMR_OFF 0x80    /* 设定 关闭中断使能 条件设置 */
+#define DM9000_PHY_ON     0x00 /* 璁惧畾 PHY 寮€鍚� */
+#define DM9000_PHY_OFF    0x01 /* 璁惧畾 PHY 鍏抽棴 */
+#define DM9000_RCR_SET    0x31 /* 璁惧畾 鎺ユ敹鍔熻兘 (涓嶆敹 CRC 鍙� 瓒呴暱鍖�) */
+#define DM9000_TCR_SET    0x01 /* 璁惧畾 浼犻€佸姛鑳� */
+#define DM9000_RCR_OFF    0x00 /* 璁惧畾 鎺ユ敹鍔熻兘鍏冲叧闂��缃� */
+#define DM9000_BPTR_SET   0x37 /* 璁惧畾 Back Pressure 鏉′欢璁剧疆 */
+#define DM9000_FCTR_SET   0x38 /* 璁惧畾 Flow Control 鏉′欢璁剧疆 */
+#define DM9000_TCR2_SET   0x80 /* 璁剧疆 LED 鏄剧ず妯″紡 */
+#define DM9000_OTCR_SET   0x80 /* 璁剧疆 DM9000 宸ヤ綔棰戠巼 0x80 = 100Mhz */
+#define DM9000_ETXCSR_SET 0x83 /* 璁剧疆 Early Tramsmit 鏉′欢璁剧疆 */
+#define DM9000_FCR_SET    0x28 /* 寮€鍚� 缃戠粶娴佹帶鍔熻兘璁剧疆 */
+#define DM9000_TCSCR_SET  0x07 /* 璁惧畾 CHECKSUM 浼犻€佽繍绠� 璁剧疆 */
+#define DM9000_RCSCSR_SET 0x03 /* 璁惧畾 CHECKSUM 鎺ユ敹妫€鏌� 璁剧疆 */
+#define DM9000_IMR_SET    0x81 /* 璁惧畾 鍚�敤涓�柇浣胯兘 鏉′欢璁剧疆 */
+#define DM9000_IMR_OFF    0x80 /* 璁惧畾 鍏抽棴涓�柇浣胯兘 鏉′欢璁剧疆 */
 
 /* EXPORTED SUBPROGRAM SPECIFICATIONS */
-void dm9000_init(void);
-void dm9000_send_packet(uint8_t *p_char, uint16_t length);
+void     dm9000_init(void);
+void     dm9000_send_packet(uint8_t *p_char, uint16_t length);
 uint16_t dm9000_receive_packet(uint8_t *_uip_buf);
 
 uint32_t dm9000_ReadID(void);

User/app/dm9161/dm9161.c

@@ -9,18 +9,18 @@
     2016-08-15, V1.0.0, firmware for GD32F4xx
 */
 
-#include "stm32f4x7_eth.h"
 #include "dm9161.h"
-#include "netconf.h"
 #include "interface.h"
-#include "lwip/sockets.h"
 #include "lwip/api.h"
+#include "lwip/sockets.h"
+#include "netconf.h"
+#include "stm32f4x7_eth.h"
 
 static __IO uint32_t enet_init_status = 0;
 
-static void dm9161_gpio_config(void);
-static void dm9161_mac_dma_config(void);
-static void nvic_configuration(void);
+static void     dm9161_gpio_config(void);
+static void     dm9161_mac_dma_config(void);
+static void     nvic_configuration(void);
 static uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress);
 
 /*!
@@ -98,14 +98,14 @@ static void dm9161_mac_dma_config(void)
     //  ETH_InitStructure.ETH_Speed = ETH_Speed_10M;
     //  ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
 
-    ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
-    ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
-    ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
-    ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
+    ETH_InitStructure.ETH_LoopbackMode             = ETH_LoopbackMode_Disable;
+    ETH_InitStructure.ETH_RetryTransmission        = ETH_RetryTransmission_Disable;
+    ETH_InitStructure.ETH_AutomaticPadCRCStrip     = ETH_AutomaticPadCRCStrip_Disable;
+    ETH_InitStructure.ETH_ReceiveAll               = ETH_ReceiveAll_Disable;
     ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
-    ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
-    ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
-    ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
+    ETH_InitStructure.ETH_PromiscuousMode          = ETH_PromiscuousMode_Disable;
+    ETH_InitStructure.ETH_MulticastFramesFilter    = ETH_MulticastFramesFilter_Perfect;
+    ETH_InitStructure.ETH_UnicastFramesFilter      = ETH_UnicastFramesFilter_Perfect;
 #ifdef CHECKSUM_BY_HARDWARE
     ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
 #endif
@@ -115,17 +115,17 @@ static void dm9161_mac_dma_config(void)
     the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
     if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
     ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
-    ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
-    ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
+    ETH_InitStructure.ETH_ReceiveStoreForward         = ETH_ReceiveStoreForward_Enable;
+    ETH_InitStructure.ETH_TransmitStoreForward        = ETH_TransmitStoreForward_Enable;
 
-    ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
+    ETH_InitStructure.ETH_ForwardErrorFrames          = ETH_ForwardErrorFrames_Disable;
     ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
-    ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
-    ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
-    ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
-    ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
-    ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
-    ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
+    ETH_InitStructure.ETH_SecondFrameOperate          = ETH_SecondFrameOperate_Enable;
+    ETH_InitStructure.ETH_AddressAlignedBeats         = ETH_AddressAlignedBeats_Enable;
+    ETH_InitStructure.ETH_FixedBurst                  = ETH_FixedBurst_Enable;
+    ETH_InitStructure.ETH_RxDMABurstLength            = ETH_RxDMABurstLength_32Beat;
+    ETH_InitStructure.ETH_TxDMABurstLength            = ETH_TxDMABurstLength_32Beat;
+    ETH_InitStructure.ETH_DMAArbitration              = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
 
     /* Configure Ethernet */
     enet_init_status = ETH_Init(&ETH_InitStructure, 0x01);
@@ -140,9 +140,9 @@ static void dm9161_mac_dma_config(void)
 static void nvic_configuration(void)
 {
     NVIC_InitTypeDef NVIC_InitStructure;
-    NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannel                   = ETH_IRQn;
     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
-    NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
+    NVIC_InitStructure.NVIC_IRQChannelCmd                = DISABLE;
     NVIC_Init(&NVIC_InitStructure);
 }
 
@@ -154,13 +154,13 @@ static void nvic_configuration(void)
 */
 static void dm9161_gpio_config(void)
 {
-    INT16U i = 0;
+    INT16U           i = 0;
     GPIO_InitTypeDef GPIO_StructInit;
     GPIO_StructInit.GPIO_Mode = GPIO_Mode_OUT;
     // GPIO_StructInit.GPIO_OType = interface_info[index].GPIO_OType;
     GPIO_StructInit.GPIO_Speed = GPIO_High_Speed;
-    GPIO_StructInit.GPIO_PuPd = GPIO_PuPd_DOWN;
-    GPIO_StructInit.GPIO_Pin = ETH_RESET_PIN;
+    GPIO_StructInit.GPIO_PuPd  = GPIO_PuPd_DOWN;
+    GPIO_StructInit.GPIO_Pin   = ETH_RESET_PIN;
     GPIO_Init(ETH_RESET_PORT, &GPIO_StructInit);
     ETH_RESET_ON;
     while (i < 1000)
@@ -229,14 +229,14 @@ static err_t bms_net_process(int fd, void *data, int len)
 
 void dm9161_task(void)
 {
-    INT8U buf[50];
-    INT32S ret = 0;
-    INT32S sockfd = -1, newfd = -1;
-    INT32U len = 0;
+    INT8U              buf[50];
+    INT32S             ret    = 0;
+    INT32S             sockfd = -1, newfd = -1;
+    INT32U             len = 0;
     struct sockaddr_in svr_addr, clt_addr;
 
-    svr_addr.sin_family = AF_INET;
-    svr_addr.sin_port = htons(TCP_PORT);
+    svr_addr.sin_family      = AF_INET;
+    svr_addr.sin_port        = htons(TCP_PORT);
     svr_addr.sin_addr.s_addr = htons(INADDR_ANY);
 
     while (1)

User/app/dm9161/dm9161.h

@@ -1,10 +1,10 @@
 #ifndef __DM_9161_H
 #define __DM_9161_H
+#include "fly_param.h"
 #include "includes.h"
+#include "interface.h"
 #include "lwip/netif.h"
 #include "netconf.h"
-#include "interface.h"
-#include "param.h"
 
 #define TCP_PORT 8080
 

User/app/param.c → User/app/fly_param.c

@@ -1,5 +1,5 @@
 #define _VAR_FUNC_IMPL
-#include "param.h"
+#include "fly_param.h"
 
 OS_EVENT *bmu_mutex    = NULL;
 OS_EVENT *bms_mutex    = NULL;
@@ -7,14 +7,15 @@ OS_EVENT *config_mutex = NULL;
 OS_EVENT *can1_sem     = NULL;
 OS_EVENT *can2_sem     = NULL;
 OS_EVENT *net_sem      = NULL;
-OS_EVENT *uart0_mbox   = NULL;
+OS_EVENT *uart1_mbox   = NULL;
 OS_EVENT *uart5_mbox   = NULL;
 
 SqQueue CanQueueCan1;
 SqQueue CanQueueCan2;
 
+CPU_STK uart1_task_stk[UART1_TASK_STK_SIZE];
+
 CPU_STK init_task_stk[INIT_STK_SIZE];
 CPU_STK net_task_stk[NET_TASK_STK_SIZE];
 CPU_STK misc_task_stk[MISC_TASK_STK_SIZE];
-CPU_STK LED0_TASK_STK[LED0_STK_SIZE];
-CPU_STK LED1_TASK_STK[LED1_STK_SIZE];
+CPU_STK LED_TASK_STK[LED0_STK_SIZE];

User/app/fly_param.h

@@ -0,0 +1,39 @@
+#ifndef __FLY_PARAM_H
+#define __FLY_PARAM_H
+#include "includes.h"
+// #include "ext_flash.h"
+#include "queue.h"
+// #include "soc_out.h"
+// #include "bms_config.h"
+#include <string.h>
+
+#define CAN_MSG_LEN 8
+
+#define LED_RX_PRIO     7
+#define UART1_TASK_PRIO 23
+#define MISC_PRIO       28
+#define NET_PRIO        30
+#define INIT_TASK_PRIO  35
+
+#define INIT_STK_SIZE       128
+#define MISC_TASK_STK_SIZE  512
+#define NET_TASK_STK_SIZE   512
+#define LED0_STK_SIZE       512
+#define LED1_STK_SIZE       512
+#define UART1_TASK_STK_SIZE 256
+#define UART5_TASK_STK_SIZE 256
+
+extern OS_EVENT *can1_sem;
+extern OS_EVENT *can2_sem;
+extern OS_EVENT *uart1_mbox;
+
+extern SqQueue CanQueueCan1;
+extern SqQueue CanQueueCan2;
+
+extern CPU_STK init_task_stk[INIT_STK_SIZE];
+extern CPU_STK uart1_task_stk[UART1_TASK_STK_SIZE];
+extern CPU_STK misc_task_stk[MISC_TASK_STK_SIZE];
+extern CPU_STK net_task_stk[NET_TASK_STK_SIZE];
+extern CPU_STK LED_TASK_STK[LED0_STK_SIZE];
+
+#endif

User/app/fly_uart/fly_uart.c

@@ -0,0 +1,355 @@
+/*-------------------------------------------------------------------------------------------------
+** module: samkoon communication
+** com   : 485\Modbus Rtu
+** data  : 2022-4-15
+** by    : xie
+-------------------------------------------------------------------------------------------------*/
+#include "fly_uart.h"
+
+INT16U misc_info_buf[BUF_LEN_128] = {0};
+INT16U cell_temp_buf[BUF_LEN_512] = {0};
+INT16U samkoon_txbuf[BUF_LEN_128] = {0};
+
+/*---------------------------------------
+** func ：Count_CRC
+** brief：CRC cal
+** para ：addr: 数据指针   num: 数量
+---------------------------------------*/
+unsigned short Count_CRC(const INT8U *addr, int num)
+{
+    unsigned short crc = 0xFFFF;
+    int            i;
+    while (num--)
+    {
+        crc ^= *addr++;
+        for (i = 0; i < 8; i++)
+        {
+            crc = (crc & 0x0001) ? ((crc >> 1) ^ 0xA001) : (crc >> 1);
+        }
+    }
+    return crc;
+}
+
+/*--------------------------------------------
+** func ：ImportantData_TxGet
+** brief：copy send data;
+          soc 1th start from 0x4001;
+** para : samkoon_txbuf\misc_info_buf for use
+--------------------------------------------*/
+void ImportantData_TxGet(INT16U pos, INT16U cnt, INT8U *des_data, INT8U *src_data)
+{
+    INT8U i  = 0;
+    pos      = pos - 0x4001; // addr offset 4300 hex
+    src_data = src_data + pos;
+    des_data = des_data + 6; // cell txbuf offset:6
+
+    for (i = pos; i < cnt; i++)
+    {
+        *des_data++ = *src_data++;
+    }
+}
+
+/*---------------------------------------
+** func ：Cell_Info_ReadOut
+** brief：copy cell data
+          1th start from 0x4301
+** para ：none
+---------------------------------------*/
+void Cell_Info_ReadOut(INT16U *p)
+{
+    INT8U i, j;
+
+    for (i = 0; i < 6; i++)
+    {
+        for (j = 0; j < 6; j++)
+        {
+            *p++ = 3300;
+        }
+    }
+
+    //	for(i = 0;i < config_get_slave_num(); i++)   // without offset
+    //  {
+    //		 for(j = 0;j < bmu_get_cell_num(i); j++)
+    //	   {
+    //			 *p++ = 3300; //bmu_get_cell_vol(i,j);
+    //		 }
+    //	}
+}
+/*---------------------------------------
+** func ：Cell_Info_TxGet
+** brief: none
+** para ：position \ cnt
+---------------------------------------*/
+
+void Cell_Info_TxGet(INT16U pos, INT16U cnt, INT8U *des_data, INT8U *src_data)
+{
+    INT8U i  = 0;
+    pos      = pos - 0x4300; // addr offset 4300 hex
+    src_data = src_data + pos;
+    des_data = des_data + 6; // cell txbuf offset:6
+
+    for (i = pos; i < cnt; i++)
+    {
+        *des_data++ = *src_data++;
+    }
+}
+
+/*---------------------------------------
+** func ：Temperature_ReadOut
+** brief：copy temperature data,
+          1th start from 0x55C1
+          offset -40
+** para ：none
+---------------------------------------*/
+void Temperature_ReadOut(INT16U *p)
+{
+    INT8U i, j;
+    for (i = 0; i < 6; i++)
+    {
+        for (j = 0; j < 6; j++)
+        {
+            *p++ = 20;
+        }
+    }
+
+    //	for(i = 0;i < config_get_slave_num(); i++)   // without offset     //PackNum = (total + (singleNum - 1))/singleNum
+    //  {
+    //		 for(j = 0;j < bmu_get_temp_num(i); j++)
+    //	   {
+    //		    *p++ = bmu_get_cell_temp(i,j);
+    //		 }
+    //	}
+}
+
+/*---------------------------------------
+** func ：Cell_Info_TxGet
+** brief: none
+** para ：position \ cnt
+---------------------------------------*/
+void Temperature_TxGet(INT16U pos, INT16U cnt, INT8U *des_data, INT8U *src_data)
+{
+    INT8U i  = 0;
+    pos      = pos - 0x55c0; // addr offset 55c0 hex
+    src_data = src_data + pos;
+    des_data = des_data + 6; // tmp txbuf offset:6
+
+    for (i = pos; i < cnt; i++)
+    {
+        *des_data++ = *src_data++;
+    }
+}
+/*---------------------------------------
+** func ：Rtu_TxData_Get()
+** brief: none
+** para ：position \ cnt
+---------------------------------------*/
+void Rtu_TxData_Get(INT16U pos,
+                    INT16U cnt,
+                    INT16U addr_start,
+                    INT8U  fotmat_offset, // fotmat_offset:3
+                    INT8U *des_data,
+                    INT8U *src_data)
+{
+    INT8U i = 0;
+    if (pos < addr_start)
+        return;
+
+    pos      = pos - addr_start; // addr offset 55c0 hex
+    src_data = src_data + pos * 2;
+    //	des_data = des_data + fotmat_offset;
+    des_data = (INT8U *)des_data + fotmat_offset;
+    for (i = 2 * pos; i < 2 * cnt; i++)
+    {
+        *des_data++ = *src_data++;
+    }
+}
+/*---------------------------------------
+** func ：Crc_Write()
+** brief: none
+** para ：
+---------------------------------------*/
+void Crc_Write(INT8U *p, INT16U data, INT8U count)
+{
+    p    = p + (2 * count + 3);
+    *p++ = (INT8U)data;
+    *p++ = (INT8U)(data >> 8);
+}
+/*---------------------------------------
+** func ：Small2Big()
+** brief: none
+** para ：
+---------------------------------------*/
+void Small2Big(INT16U *buf, INT16U count)
+{
+    INT8U  i      = 0;
+    INT8U *p      = (INT8U *)buf;
+    INT8U *p_next = (INT8U *)buf + 1;
+    char   tmp;
+    for (i = 0; i < 2 * count; i++)
+    {
+        tmp     = *p;
+        *p      = *p_next;
+        *p_next = tmp;
+        p       = p + 2;
+        p_next  = p_next + 2;
+    }
+}
+
+/*---------------------------------------
+** func ：Modbus_Head_Copy
+** brief: none
+** para ：
+---------------------------------------*/
+void Modbus_Head_Copy(INT8U *des_data, INT8U *src_data)
+{
+    INT8U i = 0;
+    for (i = 0; i < 2; i++)
+    {
+        *des_data++ = *src_data++; // addr fun_code
+    }
+    src_data  = src_data + 3;
+    *des_data = (*src_data) * 2;
+    //	for(i = 0; i < 1; i++)
+    //	{
+    //	  *des_data++ = *src_data++;   //count
+    //	}
+}
+/*----------------------------------------------
+** @func  : samkoon_com_work
+** @brief : BMS with samkoon communication
+** format :  xx     xx   xx xx   xx xx    xx xx
+             addr  func  -reg-  -count-   -crc-
+      ans:   xx     xx   xx xx   xx....xx    xx xx
+             addr  func  count-  --data--    -crc-
+
+crc:small  other:big
+-----------------------------------------------*/
+void samkoon_com_work(INT8U *rec_data, void (*tx_p)(const INT8U *buf, INT16U len))
+{
+    INT16U          register_addr_hmi;
+    INT16U          tmp_crc;
+    volatile INT16U register_count;
+    volatile INT8U  illegal_flag  = 0;
+    INT8U           function_code = 0;
+
+    register_addr_hmi = (rec_data[REGISTER_ADDR_H] << 8) + rec_data[REGISTER_ADDR_L];
+    register_count    = (rec_data[COUNT_INDEX_H] << 8) + rec_data[COUNT_INDEX_L];
+    function_code     = rec_data[FUNCTION_CODE_INDEX];
+
+    switch (function_code)
+    {
+    case FUNC_03:
+        if ((register_addr_hmi >= MODBUS_ADDR_RACK_REMOTE) && (register_addr_hmi < MODBUS_ADDR_RACK_REMOTE_END))
+        {
+            Modbus_Head_Copy((INT8U *)samkoon_txbuf, rec_data);
+            // Important_Bin_ReadOut(misc_info_buf);
+            Small2Big(misc_info_buf, register_count);
+            Rtu_TxData_Get(register_addr_hmi, register_count, 0xc9, 3, (INT8U *)samkoon_txbuf, (INT8U *)misc_info_buf);
+            tmp_crc = Count_CRC((INT8U *)samkoon_txbuf, 2 * register_count + 3);
+            Crc_Write((INT8U *)samkoon_txbuf, tmp_crc, register_count);
+            //				samkoon_txbuf[register_count + 2] = tmp_crc;
+            tx_p((INT8U *)samkoon_txbuf, (2 * register_count + 5));
+        }
+        else if ((register_addr_hmi >= MODBUS_ADDR_SOC) && (register_addr_hmi < MODBUS_RACK_END))
+        {
+            Modbus_Head_Copy((INT8U *)samkoon_txbuf, rec_data);
+            // ImportantData_Readout(misc_info_buf);
+            Small2Big(misc_info_buf, register_count);
+            Rtu_TxData_Get(register_addr_hmi, register_count, 0x4101, 3, (INT8U *)samkoon_txbuf, (INT8U *)misc_info_buf);
+            tmp_crc = Count_CRC((INT8U *)samkoon_txbuf, 2 * register_count + 3);
+            Crc_Write((INT8U *)samkoon_txbuf, tmp_crc, register_count);
+            //			   	samkoon_txbuf[register_count + 2] = tmp_crc;
+            tx_p((INT8U *)samkoon_txbuf, (2 * register_count + 5));
+        }
+        else if ((register_addr_hmi >= MODBUS_ADDR_CELL) && (register_addr_hmi < MODBUS_CELL_END))
+        {
+            Modbus_Head_Copy((INT8U *)samkoon_txbuf, rec_data);
+            Cell_Info_ReadOut(cell_temp_buf); // read all cell data
+            Small2Big(cell_temp_buf, register_count);
+            Rtu_TxData_Get(register_addr_hmi, register_count, 0x4301, 3, (INT8U *)samkoon_txbuf, (INT8U *)cell_temp_buf);
+            tmp_crc = Count_CRC((INT8U *)samkoon_txbuf, 2 * register_count + 3);
+            Crc_Write((INT8U *)samkoon_txbuf, tmp_crc, register_count);
+            //			     samkoon_txbuf[register_count + 2] = tmp_crc;
+            tx_p((INT8U *)samkoon_txbuf, (2 * register_count + 5));
+        }
+        else if ((register_addr_hmi >= MODBUS_ADDR_TEMP) && (register_addr_hmi < MODBUS_TEMP_END))
+        {
+            Modbus_Head_Copy((INT8U *)samkoon_txbuf, rec_data);
+            Temperature_ReadOut(cell_temp_buf); // read all temp data
+            Small2Big(cell_temp_buf, register_count);
+            Rtu_TxData_Get(register_addr_hmi, register_count, 0x55c1, 3, (INT8U *)samkoon_txbuf, (INT8U *)cell_temp_buf);
+            tmp_crc = Count_CRC((INT8U *)samkoon_txbuf, 2 * register_count + 3);
+            Crc_Write((INT8U *)samkoon_txbuf, tmp_crc, register_count);
+            //			     samkoon_txbuf[register_count + 2] = tmp_crc;
+            tx_p((INT8U *)samkoon_txbuf, (2 * register_count + 5));
+        }
+        else if ((register_addr_hmi >= MODBUS_ADDR_READ_KA) && (register_addr_hmi < MODBUS_KA_END))
+        {
+            Modbus_Head_Copy((INT8U *)samkoon_txbuf, rec_data);
+            // Relay_Bin_Readout(misc_info_buf);
+            Small2Big(misc_info_buf, register_count);
+            Rtu_TxData_Get(register_addr_hmi, register_count, 0x1001, 3, (INT8U *)samkoon_txbuf, (INT8U *)misc_info_buf);
+            tmp_crc = Count_CRC((INT8U *)samkoon_txbuf, 2 * register_count + 3);
+            Crc_Write((INT8U *)samkoon_txbuf, tmp_crc, register_count);
+            //			   	 samkoon_txbuf[register_count + 2] = tmp_crc;
+            tx_p((INT8U *)samkoon_txbuf, (2 * register_count + 5));
+        }
+        break;
+    /* do other work... */
+    case FUNC_05:
+        break;
+
+    default:
+        illegal_flag = 1;
+        break;
+    }
+}
+
+void fly_uart1_task(void)
+{
+    INT8U err = 0;
+    //    INT8U test_buf[20] = {0};
+    UartFrame_TypeDef *msg;
+    INT16U             crc_check       = 0;
+    INT16U             rcv_crc         = 0;
+    txfun_p            Modbus_RTU_Send = Uart1_dma_Send_Data;
+    while (1)
+    {
+        OSTimeDly(200);
+        iwdg_feed(UART1_DOG);
+        msg = (UartFrame_TypeDef *)OSMboxPend(uart1_mbox, 50, &err);
+        if ((err == OS_ERR_NONE) && (msg->len >= 2))
+        {
+            crc_check = Count_CRC(msg->buf, 6);
+            rcv_crc   = ((msg->buf[7] << 8) | msg->buf[6]);
+            if (crc_check != rcv_crc)
+            {
+                continue;
+            }
+
+            samkoon_com_work(&(msg->buf[0]), Modbus_RTU_Send);
+        }
+    }
+}
+
+// void bms_uart0_task(void)
+//{
+//     INT8U err = 0;
+//     INT8U test_buf[20] = {0};
+//     UartFrame_TypeDef *msg;
+//     while(1)
+//     {
+//         wtdg_feed(UART0_DOG);
+//         msg = (UartFrame_TypeDef *)OSMboxPend(uart0_mbox, 50, &err);
+//         if((err == OS_ERR_NONE) && (msg->len >= 2))
+//         {
+//             if((msg->buf[0] == 0x00) && (msg->buf[1] == 0xAA) && (msg->buf[2] == 0xBB))
+//             {
+//                 test_buf[0] = 0x00;
+//                 test_buf[1] = 0xBB;
+//                 test_buf[2] = 0xAA;
+//                 Uart0_dma_Send_Data(test_buf, 3);
+//             }
+//         }
+//     }
+// }

User/app/fly_uart/fly_uart.h

@@ -0,0 +1,69 @@
+#ifndef __BMS_UART_H
+#define __BMS_UART_H
+
+// #include "bms_config.h"
+#include "fly_param.h"
+// #include "bmu_param.h"
+#include "includes.h"
+#include "iwdg.h"
+#include "uart.h"
+
+typedef unsigned char  MODBUS_INT8U;
+typedef signed char    MODBUS_INT8S;
+typedef unsigned short MODBUS_INT16U;
+typedef signed short   MODBUS_INT16S;
+typedef unsigned int   MODBUS_INT32U;
+typedef signed int     MODBUS_INT32S;
+
+typedef void (*txfun_p)(const INT8U *buf, INT16U len);
+
+#define MODBUS_GAIN(VALUE1, VALUE2)        ((MODBUS_INT32U)(VALUE1) * (VALUE2))
+#define MODBUS_SUBTRACT(VALUE1, VALUE2)    ((MODBUS_INT32U)(VALUE1) - (VALUE2))
+#define MODBUS_DIVISION(DIVISOR, DIVIDEND) (((MODBUS_INT32U)(DIVISOR) + (DIVIDEND) / 2) / (DIVIDEND))
+#define MODBUS_ABS(VALUE1)                 (((VALUE1) < 0) ? (-(VALUE1)) : (VALUE1))
+
+#define BUF_LEN_128      128
+#define BUF_LEN_256      256
+#define BUF_LEN_512      512
+#define RACK_NUM         1u
+#define BUF_LEN_768      768
+#define GROUP_NUMBER_MAX 15
+#define VOL_TMP_PAGE_NUM 32
+
+#define BUF_LEN_256      256
+#define BUF_LEN_512      512
+#define RACK_NUM         1u
+#define BUF_LEN_768      768
+#define GROUP_NUMBER_MAX 15
+#define VOL_TMP_PAGE_NUM 32
+
+#define FUNC_03 3
+#define FUNC_05 5
+#define FUNC_06 6
+#define FUNC_10 16
+
+// samkoon COM def
+#define COUNT_INDEX_H       4
+#define COUNT_INDEX_L       5
+#define REGISTER_ADDR_H     2
+#define REGISTER_ADDR_L     3
+#define FUNCTION_CODE_INDEX 1
+
+// samkoon address def
+
+#define MODBUS_ADDR_SOC         0x4101 // 电池簇SOC寄存器地址
+#define MODBUS_ADDR_CELL        0x4301 // 单体电压寄存器地址
+#define MODBUS_ADDR_TEMP        0x55c1 // 单体温度寄存器地址
+#define MODBUS_ADDR_READ_KA     0x1001 // 继电器状态读地址
+#define MODBUS_ADDR_RACK_REMOTE 0xC9   //
+
+#define MODBUS_RACK_END             0x4120 // 电池簇SOC寄存器地址
+#define MODBUS_CELL_END             0x4490
+#define MODBUS_TEMP_END             0x5750
+#define MODBUS_KA_END               0x1009
+#define MODBUS_ADDR_RACK_REMOTE_END 0xE7
+
+void fly_uart1_task(void);
+// void bms_uart1_task(void);
+
+#endif

User/app/param.h

@@ -1,35 +0,0 @@
-#ifndef __PARAM_H
-#define __PARAM_H
-#include "includes.h"
-// #include "ext_flash.h"
-#include "queue.h"
-// #include "soc_out.h"
-// #include "bms_config.h"
-#include <string.h>
-
-#define CAN_MSG_LEN 8
-
-#define LED0_RX_PRIO   7
-#define MISC_PRIO      28
-#define NET_PRIO       30
-#define INIT_TASK_PRIO 35
-
-#define INIT_STK_SIZE      128
-#define MISC_TASK_STK_SIZE 512
-#define NET_TASK_STK_SIZE  512
-#define LED0_STK_SIZE      512
-#define LED1_STK_SIZE      512
-
-extern OS_EVENT *can1_sem;
-extern OS_EVENT *can2_sem;
-
-extern SqQueue CanQueueCan1;
-extern SqQueue CanQueueCan2;
-
-extern CPU_STK init_task_stk[INIT_STK_SIZE];
-extern CPU_STK misc_task_stk[MISC_TASK_STK_SIZE];
-extern CPU_STK net_task_stk[NET_TASK_STK_SIZE];
-extern CPU_STK LED0_TASK_STK[LED0_STK_SIZE];
-extern CPU_STK LED1_TASK_STK[LED1_STK_SIZE];
-
-#endif

User/app/queue/queue.c

@@ -66,6 +66,6 @@ INT8U InsertQueue(SqQueue *Q, CanData_TypeDef e)
     if ((Q->rear + 1) % MAX_QSIZE == Q->front) /* 队列满 */
         return ERROR;
     Q->CanBuf[Q->rear] = e;
-    Q->rear = (Q->rear + 1) % MAX_QSIZE;
+    Q->rear            = (Q->rear + 1) % MAX_QSIZE;
     return SUCCESS;
 }

User/app/queue/queue.h

@@ -6,18 +6,18 @@
 
 typedef struct
 {
-    INT8U buf[8];
+    INT8U  buf[8];
     INT32U can_id;
 } CanData_TypeDef;
 
 typedef struct
 {
     CanData_TypeDef CanBuf[MAX_QSIZE];
-    INT16U front;
-    INT16U rear;
+    INT16U          front;
+    INT16U          rear;
 } SqQueue;
 
-void InitQueue(SqQueue *Q);                       // 初始化队列
+void  InitQueue(SqQueue *Q);                      // 初始化队列
 INT8U GetHead(SqQueue *Q, CanData_TypeDef *e);    // 获取对头数据
 INT8U InsertQueue(SqQueue *Q, CanData_TypeDef e); // 队列插入数据
 INT8U IsQueueEmpty(const SqQueue *Q);             // 查询队列是否为空

User/lwipopts.h

@@ -13,9 +13,9 @@
 #define LWIPOPTS_H
 
 #define ETHARP_TRUST_IP_MAC 0
-#define IP_REASSEMBLY 0
-#define IP_FRAG 0
-#define ARP_QUEUEING 0
+#define IP_REASSEMBLY       0
+#define IP_FRAG             0
+#define ARP_QUEUEING        0
 
 #define SYS_LIGHTWEIGHT_PROT 1 /* SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection \
                                   for certain critical regions during buffer allocation,     \
@@ -51,12 +51,12 @@
 #define MEMP_NUM_NETBUF 8 /* the number of struct netbufs */
 
 /* Pbuf options */
-#define PBUF_POOL_SIZE 20     /* the number of buffers in the pbuf pool */
+#define PBUF_POOL_SIZE    20  /* the number of buffers in the pbuf pool */
 #define PBUF_POOL_BUFSIZE 512 /* the size of each pbuf in the pbuf pool */
 
 /* TCP options */
 #define LWIP_TCP 1
-#define TCP_TTL 255
+#define TCP_TTL  255
 
 #define TCP_QUEUE_OOSEQ 0 /* controls if TCP should queue segments that arrive out of \
                              order, Define to 0 if your device is low on memory. */
@@ -94,10 +94,10 @@
 
 /* UDP options */
 #define LWIP_UDP 1
-#define UDP_TTL 255
+#define UDP_TTL  255
 
 /* statistics options */
-#define LWIP_STATS 0
+#define LWIP_STATS         0
 #define LWIP_PROVIDE_ERRNO 1
 
 /* checksum options */
@@ -131,21 +131,21 @@
 #define CHECKSUM_CHECK_UDP 0
 /* CHECKSUM_CHECK_TCP==0: check checksums by hardware for incoming TCP packets.*/
 #define CHECKSUM_CHECK_TCP 0
-#define CHECKSUM_GEN_ICMP 0
+#define CHECKSUM_GEN_ICMP  0
 #else
 /* CHECKSUM_GEN_IP==1: generate checksums in software for outgoing IP packets.*/
-#define CHECKSUM_GEN_IP 1
+#define CHECKSUM_GEN_IP    1
 /* CHECKSUM_GEN_UDP==1: generate checksums in software for outgoing UDP packets.*/
-#define CHECKSUM_GEN_UDP 1
+#define CHECKSUM_GEN_UDP   1
 /* CHECKSUM_GEN_TCP==1: generate checksums in software for outgoing TCP packets.*/
-#define CHECKSUM_GEN_TCP 1
+#define CHECKSUM_GEN_TCP   1
 /* CHECKSUM_CHECK_IP==1: check checksums in software for incoming IP packets.*/
-#define CHECKSUM_CHECK_IP 1
+#define CHECKSUM_CHECK_IP  1
 /* CHECKSUM_CHECK_UDP==1: check checksums in software for incoming UDP packets.*/
 #define CHECKSUM_CHECK_UDP 1
 /* CHECKSUM_CHECK_TCP==1: check checksums in software for incoming TCP packets.*/
 #define CHECKSUM_CHECK_TCP 1
-#define CHECKSUM_GEN_ICMP 1
+#define CHECKSUM_GEN_ICMP  1
 #endif
 
 /*
@@ -153,10 +153,10 @@
    ---------- OS options ----------
    ---------------------------------
 */
-#define TCPIP_THREAD_STACKSIZE 1000
+#define TCPIP_THREAD_STACKSIZE   1000
 #define DEFAULT_THREAD_STACKSIZE 512
-#define LWIP_COMPAT_MUTEX 1
-#define TCPIP_THREAD_PRIO 5
-#define DEFAULT_THREAD_PRIO 2
+#define LWIP_COMPAT_MUTEX        1
+#define TCPIP_THREAD_PRIO        5
+#define DEFAULT_THREAD_PRIO      2
 
 #endif /* LWIPOPTS_H */

User/main.c

@@ -58,13 +58,14 @@ int main(void)
     OSTaskCreateExt(init_task,                                   /* 启动任务函数指针 */
                     (void *)0,                                   /* 传递给任务的参数 */
                     (OS_STK *)&init_task_stk[INIT_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
-                    INIT_TASK_PRIO,              /* 任务的优先级，必须唯一，数字越低优先级越高 */
-                    INIT_TASK_PRIO,              /* 任务ID，一般和任务优先级相同 */
-                    (OS_STK *)&init_task_stk[0], /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
-                    INIT_STK_SIZE,               /* 任务栈大小 */
-                    (void *)0, /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-                      （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
-                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); /* 任务选项字 */
+                    INIT_TASK_PRIO,                              /* 任务的优先级，必须唯一，数字越低优先级越高 */
+                    INIT_TASK_PRIO,                              /* 任务ID，一般和任务优先级相同 */
+                    (OS_STK *)&init_task_stk[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH
+                                                                    决定堆栈增长方向 */
+                    INIT_STK_SIZE,                               /* 任务栈大小 */
+                    (void *)0,                                   /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
+                                                                （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
+                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* 任务选项字 */
 
     OSStart();
 
@@ -83,34 +84,63 @@ void init_task(void *pvParameters)
     /* configure the systick handler priority */
     NVIC_SetPriority(SysTick_IRQn, 0x00U);
 
-    OSTaskCreateExt((void (*)(void *))led_task,                  /* 启动任务函数指针 */
-                    (void *)0,                                   /* 传递给任务的参数 */
-                    (OS_STK *)&LED0_TASK_STK[LED0_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
-                    LED0_RX_PRIO,                /* 任务的优先级，必须唯一，数字越低优先级越高 */
-                    LED0_RX_PRIO,                /* 任务ID，一般和任务优先级相同 */
-                    (OS_STK *)&LED0_TASK_STK[0], /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
-                    LED0_STK_SIZE,               /* 任务栈大小 */
-                    (void *)0, /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-                      （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
+    OSTaskCreateExt((void (*)(void *))led_task,                 /* 启动任务函数指针 */
+                    (void *)0,                                  /* 传递给任务的参数 */
+                    (OS_STK *)&LED_TASK_STK[LED0_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
+                    LED_RX_PRIO,                                /* 任务的优先级，必须唯一，数字越低优先级越高 */
+                    LED_RX_PRIO,                                /* 任务ID，一般和任务优先级相同 */
+                    (OS_STK *)&LED_TASK_STK[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
+                    LED0_STK_SIZE,                              /* 任务栈大小 */
+                    (void *)0,                                  /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
+                                                                （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
                     OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); /* 任务选项字 */
 
-    OSTaskCreateExt((void (*)(void *))misc_task, (void *)0, (OS_STK *)&misc_task_stk[MISC_TASK_STK_SIZE - 1],
-                    (INT8U)MISC_PRIO, (INT16U)MISC_PRIO, (OS_STK *)&misc_task_stk[0], (INT32U)MISC_TASK_STK_SIZE,
-                    (void *)0, (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
-
-    // OSTaskCreateExt((void (*)(void *))led1_task,                 /* 启动任务函数指针 */
-    //                 (void *)0,                                   /* 传递给任务的参数 */
-    //                 (OS_STK *)&LED1_TASK_STK[LED1_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
-    //                 LED1_RX_PRIO,                                /* 任务的优先级，必须唯一，数字越低优先级越高 */
-    //                 LED1_RX_PRIO,                                /* 任务ID，一般和任务优先级相同 */
-    //                 (OS_STK *)&LED1_TASK_STK[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH
-    //                 决定堆栈增长方向 */ LED1_STK_SIZE,                               /* 任务栈大小 */ (void *)0, /*
-    //                 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-    //                                                     （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
-    //                 OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* 任务选项字 */
+    OSTaskCreateExt((void (*)(void *))misc_task,
+                    (void *)0,
+                    (OS_STK *)&misc_task_stk[MISC_TASK_STK_SIZE - 1],
+                    (INT8U)MISC_PRIO,
+                    (INT16U)MISC_PRIO,
+                    (OS_STK *)&misc_task_stk[0],
+                    (INT32U)MISC_TASK_STK_SIZE,
+                    (void *)0,
+                    (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
 
-    OSTaskCreateExt((void (*)(void *))dm9161_task, (void *)0, (OS_STK *)&net_task_stk[NET_TASK_STK_SIZE - 1],
-                    (INT8U)NET_PRIO, (INT16U)NET_PRIO, (OS_STK *)&net_task_stk[0], (INT32U)NET_TASK_STK_SIZE, (void *)0,
+    OSTaskCreateExt((void (*)(void *))fly_uart1_task,
+                    (void *)0,
+                    (OS_STK *)&uart1_task_stk[UART1_TASK_STK_SIZE - 1],
+                    (INT8U)UART1_TASK_PRIO,
+                    (INT16U)UART1_TASK_PRIO,
+                    (OS_STK *)&uart1_task_stk[0],
+                    (INT32U)UART1_TASK_STK_SIZE,
+                    (void *)0,
+                    (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
+    // OSTaskCreateExt((void (*)(void *))led1_task,                 /*
+    // 启动任务函数指针 */
+    //                 (void *)0,                                   /*
+    //                 传递给任务的参数 */ (OS_STK
+    //                 *)&LED1_TASK_STK[LED1_STK_SIZE - 1], /*
+    //                 指向任务栈栈顶的指针 */ LED1_RX_PRIO, /*
+    //                 任务的优先级，必须唯一，数字越低优先级越高 */
+    //                 LED1_RX_PRIO,                                /*
+    //                 任务ID，一般和任务优先级相同 */ (OS_STK
+    //                 *)&LED1_TASK_STK[0],                 /*
+    //                 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
+    //                 LED1_STK_SIZE,                               /*
+    //                 任务栈大小 */ (void *)0, /*
+    //                 一块用户内存区的指针，用于任务控制块TCB的扩展功能
+    //                                                     （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可
+    //                                                     */
+    //                 OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /*
+    //                 任务选项字 */
+
+    OSTaskCreateExt((void (*)(void *))dm9161_task,
+                    (void *)0,
+                    (OS_STK *)&net_task_stk[NET_TASK_STK_SIZE - 1],
+                    (INT8U)NET_PRIO,
+                    (INT16U)NET_PRIO,
+                    (OS_STK *)&net_task_stk[0],
+                    (INT32U)NET_TASK_STK_SIZE,
+                    (void *)0,
                     (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
 }
 
@@ -118,6 +148,7 @@ void misc_task(void)
 {
     while (1)
     {
+        iwdg_feed(MISC_DOG);
         // LED_RUN_TOGGLE;
         OSTimeDly(500);
         LED3_RUN_TOGGLE;

User/main.h

@@ -2,10 +2,11 @@
 #define __MAIN_H
 
 #include "dm9161.h"
+#include "fly_param.h"
+#include "fly_uart.h"
 #include "includes.h"
 #include "interface.h"
 #include "led.h"
-#include "param.h"
 #include "stm32f4xx.h"
 #include <stdio.h>
 

User/netconf.c

@@ -22,10 +22,10 @@
 
 typedef enum
 {
-  DHCP_START = 0,
-  DHCP_WAIT_ADDRESS,
-  DHCP_ADDRESS_ASSIGNED,
-  DHCP_TIMEOUT
+    DHCP_START = 0,
+    DHCP_WAIT_ADDRESS,
+    DHCP_ADDRESS_ASSIGNED,
+    DHCP_TIMEOUT
 } dhcp_state_enum;
 
 #ifdef USE_DHCP
@@ -43,44 +43,44 @@ struct netif xnetif;
 */
 void lwip_stack_init(void)
 {
-  ip4_addr_t ipaddr;
-  ip4_addr_t netmask;
-  ip4_addr_t gw;
+    ip4_addr_t ipaddr;
+    ip4_addr_t netmask;
+    ip4_addr_t gw;
 
-  /* create tcp_ip stack thread */
-  tcpip_init(NULL, NULL);
+    /* create tcp_ip stack thread */
+    tcpip_init(NULL, NULL);
 
-  /* IP address setting */
+    /* IP address setting */
 #ifdef USE_DHCP
-  ipaddr.addr = 0;
-  netmask.addr = 0;
-  gw.addr = 0;
+    ipaddr.addr = 0;
+    netmask.addr = 0;
+    gw.addr = 0;
 #else
-  IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
-  IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
-  IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
+    IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
+    IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
+    IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
 
 #endif /* USE_DHCP */
 
-  /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
-            struct ip_addr *netmask, struct ip_addr *gw,
-            void *state, err_t (* init)(struct netif *netif),
-            err_t (* input)(struct pbuf *p, struct netif *netif))
+    /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
+              struct ip_addr *netmask, struct ip_addr *gw,
+              void *state, err_t (* init)(struct netif *netif),
+              err_t (* input)(struct pbuf *p, struct netif *netif))
 
-   Adds your network interface to the netif_list. Allocate a struct
-  netif and pass a pointer to this structure as the first argument.
-  Give pointers to cleared ip_addr structures when using DHCP,
-  or fill them with sane numbers otherwise. The state pointer may be NULL.
+     Adds your network interface to the netif_list. Allocate a struct
+    netif and pass a pointer to this structure as the first argument.
+    Give pointers to cleared ip_addr structures when using DHCP,
+    or fill them with sane numbers otherwise. The state pointer may be NULL.
 
-  The init function pointer must point to a initialization function for
-  your ethernet netif interface. The following code illustrates it's use. */
-  netif_add(&xnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
+    The init function pointer must point to a initialization function for
+    your ethernet netif interface. The following code illustrates it's use. */
+    netif_add(&xnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
 
-  /* registers the default network interface */
-  netif_set_default(&xnetif);
+    /* registers the default network interface */
+    netif_set_default(&xnetif);
 
-  /* when the netif is fully configured this function must be called */
-  netif_set_up(&xnetif);
+    /* when the netif is fully configured this function must be called */
+    netif_set_up(&xnetif);
 }
 
 #ifdef USE_DHCP
@@ -92,61 +92,61 @@ void lwip_stack_init(void)
 */
 void dhcp_task(void *pvParameters)
 {
-  ip4_addr_t ipaddr;
-  ip4_addr_t netmask;
-  ip4_addr_t gw;
-  struct dhcp *dhcp_client;
+    ip4_addr_t ipaddr;
+    ip4_addr_t netmask;
+    ip4_addr_t gw;
+    struct dhcp *dhcp_client;
 
-  dhcp_client = netif_dhcp_data(&xnetif);
+    dhcp_client = netif_dhcp_data(&xnetif);
 
-  for (;;)
-  {
-    switch (dhcp_state)
+    for (;;)
     {
-    case DHCP_START:
-      dhcp_start(&xnetif);
-      ip_address.addr = 0;
-      dhcp_state = DHCP_WAIT_ADDRESS;
-      break;
-
-    case DHCP_WAIT_ADDRESS:
-      /* read the new IP address */
-      ip_address.addr = xnetif.ip_addr.u_addr.ip4.addr;
-
-      if (ip_address.addr != 0)
-      {
-        dhcp_state = DHCP_ADDRESS_ASSIGNED;
-        /* stop DHCP */
-        dhcp_stop(&xnetif);
-
-        printf("\r\nDHCP -- eval board ip address: %d.%d.%d.%d \r\n", ip4_addr1_16(&ip_address),
-               ip4_addr2_16(&ip_address), ip4_addr3_16(&ip_address), ip4_addr4_16(&ip_address));
-        OSTaskSuspend(OS_PRIO_SELF);
-      }
-      else
-      {
-        /* DHCP timeout */
-        if (dhcp_client->tries > MAX_DHCP_TRIES)
+        switch (dhcp_state)
         {
-          dhcp_state = DHCP_TIMEOUT;
-          /* stop DHCP */
-          dhcp_stop(&xnetif);
-
-          /* static address used */
-          IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
-          IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
-          IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
-          netif_set_addr(&xnetif, &ipaddr, &netmask, &gw);
-          OSTaskSuspend(OS_PRIO_SELF);
+        case DHCP_START:
+            dhcp_start(&xnetif);
+            ip_address.addr = 0;
+            dhcp_state = DHCP_WAIT_ADDRESS;
+            break;
+
+        case DHCP_WAIT_ADDRESS:
+            /* read the new IP address */
+            ip_address.addr = xnetif.ip_addr.u_addr.ip4.addr;
+
+            if (ip_address.addr != 0)
+            {
+                dhcp_state = DHCP_ADDRESS_ASSIGNED;
+                /* stop DHCP */
+                dhcp_stop(&xnetif);
+
+                printf("\r\nDHCP -- eval board ip address: %d.%d.%d.%d \r\n", ip4_addr1_16(&ip_address),
+                       ip4_addr2_16(&ip_address), ip4_addr3_16(&ip_address), ip4_addr4_16(&ip_address));
+                OSTaskSuspend(OS_PRIO_SELF);
+            }
+            else
+            {
+                /* DHCP timeout */
+                if (dhcp_client->tries > MAX_DHCP_TRIES)
+                {
+                    dhcp_state = DHCP_TIMEOUT;
+                    /* stop DHCP */
+                    dhcp_stop(&xnetif);
+
+                    /* static address used */
+                    IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
+                    IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
+                    IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
+                    netif_set_addr(&xnetif, &ipaddr, &netmask, &gw);
+                    OSTaskSuspend(OS_PRIO_SELF);
+                }
+            }
+            break;
+
+        default:
+            break;
         }
-      }
-      break;
-
-    default:
-      break;
+        /* wait 500 ms */
+        OSTimeDlyHMSM(0, 0, 0, 500);
     }
-    /* wait 500 ms */
-    OSTimeDlyHMSM(0, 0, 0, 500);
-  }
 }
 #endif /* USE_DHCP */

User/stm32f4x7_eth_conf.h

@@ -43,15 +43,15 @@ extern "C"
 /* Uncomment the line below when using time stamping and/or IPv4 checksum offload */
 #define USE_ENHANCED_DMA_DESCRIPTORS
 
-  /* Uncomment the line below if you want to use user defined Delay function
-     (for precise timing), otherwise default _eth_delay_ function defined within
-     the Ethernet driver is used (less precise timing) */
+    /* Uncomment the line below if you want to use user defined Delay function
+       (for precise timing), otherwise default _eth_delay_ function defined within
+       the Ethernet driver is used (less precise timing) */
 
 #ifdef USE_Delay
-  //  #include "main.h"              /* Header file where the Delay function prototype is exported */
+    //  #include "main.h"              /* Header file where the Delay function prototype is exported */
 #define _eth_delay_ ETH_Delay10ms /* User can provide more timing precise _eth_delay_ function \
                             in this example Systick is configured with an interrupt every 10 ms*/
-  extern void ETH_Delay10ms(uint32_t nCount);
+    extern void ETH_Delay10ms(uint32_t nCount);
 #else
 #define _eth_delay_ ETH_Delay /* Default _eth_delay_ function with less precise timing */
 #endif
@@ -60,11 +60,11 @@ extern "C"
 #define CUSTOM_DRIVER_BUFFERS_CONFIG
 
 #ifdef CUSTOM_DRIVER_BUFFERS_CONFIG
-  /* Redefinition of the Ethernet driver buffers size and count */
+    /* Redefinition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
-#define ETH_RXBUFNB 4                       /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
-#define ETH_TXBUFNB 4                       /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
+#define ETH_RXBUFNB     4                   /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
+#define ETH_TXBUFNB     4                   /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
 #endif
 
 /* PHY configuration section **************************************************/
@@ -77,9 +77,9 @@ extern "C"
 #define ETH_REG_WRITE_DELAY ((uint32_t)0x00000001)
 #else
 /* PHY Reset delay */
-#define PHY_RESET_DELAY ((uint32_t)0x000FFFFF)
+#define PHY_RESET_DELAY     ((uint32_t)0x000FFFFF)
 /* PHY Configuration delay */
-#define PHY_CONFIG_DELAY ((uint32_t)0x00FFFFFF)
+#define PHY_CONFIG_DELAY    ((uint32_t)0x00FFFFFF)
 /* Delay when writing to Ethernet registers*/
 #define ETH_REG_WRITE_DELAY ((uint32_t)0x0000FFFF)
 #endif
@@ -90,24 +90,24 @@ extern "C"
    so the user have to update this value depending on the used external PHY */
 
 /* The DP83848 PHY status register  */
-#define PHY_SR ((uint16_t)0x10)              /* PHY status register Offset */
-#define PHY_SPEED_STATUS ((uint16_t)0x0002)  /* PHY Speed mask */
+#define PHY_SR            ((uint16_t)0x10)   /* PHY status register Offset */
+#define PHY_SPEED_STATUS  ((uint16_t)0x0002) /* PHY Speed mask */
 #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /* PHY Duplex mask */
 
 /* The DP83848 PHY: MII Interrupt Control Register  */
-#define PHY_MICR ((uint16_t)0x11)          /* MII Interrupt Control Register */
+#define PHY_MICR        ((uint16_t)0x11)   /* MII Interrupt Control Register */
 #define PHY_MICR_INT_EN ((uint16_t)0x0002) /* PHY Enable interrupts */
 #define PHY_MICR_INT_OE ((uint16_t)0x0001) /* PHY Enable output interrupt events */
 
 /* The DP83848 PHY: MII Interrupt Status and Misc. Control Register */
-#define PHY_MISR ((uint16_t)0x12)               /* MII Interrupt Status and Misc. Control Register */
+#define PHY_MISR             ((uint16_t)0x12)   /* MII Interrupt Status and Misc. Control Register */
 #define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /* Enable Interrupt on change of link status */
-#define PHY_LINK_STATUS ((uint16_t)0x2000)      /* PHY link status interrupt mask */
+#define PHY_LINK_STATUS      ((uint16_t)0x2000) /* PHY link status interrupt mask */
 
-  /* Note : Common PHY registers are defined in stm32f4x7_eth.h file */
+    /* Note : Common PHY registers are defined in stm32f4x7_eth.h file */
 
-  /* Exported macro ------------------------------------------------------------*/
-  /* Exported functions ------------------------------------------------------- */
+    /* Exported macro ------------------------------------------------------------*/
+    /* Exported functions ------------------------------------------------------- */
 
 #ifdef __cplusplus
 }

User/stm32f4xx_conf.h

@@ -1,29 +1,29 @@
 /**
-  ******************************************************************************
-  * @file    Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_conf.h  
-  * @author  MCD Application Team
-  * @version V1.5.0
-  * @date    06-March-2015
-  * @brief   Library configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
+ ******************************************************************************
+ * @file    Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_conf.h
+ * @author  MCD Application Team
+ * @version V1.5.0
+ * @date    06-March-2015
+ * @brief   Library configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ *        http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_CONF_H
@@ -31,6 +31,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /* Uncomment the line below to enable peripheral header file inclusion */
+#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
 #include "stm32f4xx_adc.h"
 #include "stm32f4xx_crc.h"
 #include "stm32f4xx_dbgmcu.h"
@@ -49,84 +50,81 @@
 #include "stm32f4xx_tim.h"
 #include "stm32f4xx_usart.h"
 #include "stm32f4xx_wwdg.h"
-#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
 
-#if defined (STM32F429_439xx) || defined(STM32F446xx)
-#include "stm32f4xx_cryp.h"
-#include "stm32f4xx_hash.h"
-#include "stm32f4xx_rng.h"
+#if defined(STM32F429_439xx) || defined(STM32F446xx)
 #include "stm32f4xx_can.h"
+#include "stm32f4xx_cryp.h"
 #include "stm32f4xx_dac.h"
 #include "stm32f4xx_dcmi.h"
 #include "stm32f4xx_dma2d.h"
 #include "stm32f4xx_fmc.h"
+#include "stm32f4xx_hash.h"
 #include "stm32f4xx_ltdc.h"
+#include "stm32f4xx_rng.h"
 #include "stm32f4xx_sai.h"
 #endif /* STM32F429_439xx || STM32F446xx */
 
-#if defined (STM32F427_437xx)
-#include "stm32f4xx_cryp.h"
-#include "stm32f4xx_hash.h"
-#include "stm32f4xx_rng.h"
+#if defined(STM32F427_437xx)
 #include "stm32f4xx_can.h"
+#include "stm32f4xx_cryp.h"
 #include "stm32f4xx_dac.h"
 #include "stm32f4xx_dcmi.h"
 #include "stm32f4xx_dma2d.h"
 #include "stm32f4xx_fmc.h"
+#include "stm32f4xx_hash.h"
+#include "stm32f4xx_rng.h"
 #include "stm32f4xx_sai.h"
 #endif /* STM32F427_437xx */
 
-#if defined (STM32F40_41xxx)
-#include "stm32f4xx_cryp.h"
-#include "stm32f4xx_hash.h"
-#include "stm32f4xx_rng.h"
+#if defined(STM32F40_41xxx)
 #include "stm32f4xx_can.h"
+#include "stm32f4xx_cryp.h"
 #include "stm32f4xx_dac.h"
 #include "stm32f4xx_dcmi.h"
 #include "stm32f4xx_fsmc.h"
+#include "stm32f4xx_hash.h"
+#include "stm32f4xx_rng.h"
 #endif /* STM32F40_41xxx */
 
-#if defined (STM32F411xE)
+#if defined(STM32F411xE)
 #include "stm32f4xx_flash_ramfunc.h"
 #endif /* STM32F411xE */
 
-#if defined (STM32F446xx)
-#include "stm32f4xx_qspi.h"
+#if defined(STM32F446xx)
+#include "stm32f4xx_cec.h"
 #include "stm32f4xx_fmpi2c.h"
+#include "stm32f4xx_qspi.h"
 #include "stm32f4xx_spdifrx.h"
-#include "stm32f4xx_cec.h"
 #endif /* STM32F446xx */
 
-
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
 
-/* If an external clock source is used, then the value of the following define 
-   should be set to the value of the external clock source, else, if no external 
+/* If an external clock source is used, then the value of the following define
+   should be set to the value of the external clock source, else, if no external
    clock is used, keep this define commented */
 /*#define I2S_EXTERNAL_CLOCK_VAL   12288000 */ /* Value of the external clock in Hz */
 
-
-/* Uncomment the line below to expanse the "assert_param" macro in the 
+/* Uncomment the line below to expanse the "assert_param" macro in the
    Standard Peripheral Library drivers code */
 /* #define USE_FULL_ASSERT    1 */
 
 /* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
+#ifdef USE_FULL_ASSERT
 
 /**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *   which reports the name of the source file and the source
-  *   line number of the call that failed. 
-  *   If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+ * @brief  The assert_param macro is used for function's parameters check.
+ * @param  expr: If expr is false, it calls assert_failed function
+ *   which reports the name of the source file and the source
+ *   line number of the call that failed.
+ *   If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
+void assert_failed(uint8_t *file, uint32_t line);
 #else
-  #define assert_param(expr) ((void)0)
+#define assert_param(expr) ((void)0)
 #endif /* USE_FULL_ASSERT */
 
 #endif /* __STM32F4xx_CONF_H */

User/stm32f4xx_it.c

@@ -28,11 +28,11 @@
  */
 
 /* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
 #include "stm32f4xx_it.h"
 #include "includes.h"
 #include "netconf.h"
 #include "stm32f4x7_eth.h"
+#include "stm32f4xx.h"
 
 extern OS_EVENT *p_semaphore;
 extern OS_EVENT *g_enet_rx_sem;

User/stm32f4xx_it.h

@@ -37,20 +37,20 @@ extern "C"
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f4xx.h"
 
-  /* Exported types ------------------------------------------------------------*/
-  /* Exported constants --------------------------------------------------------*/
-  /* Exported macro ------------------------------------------------------------*/
-  /* Exported functions ------------------------------------------------------- */
-
-  void NMI_Handler(void);
-  void HardFault_Handler(void);
-  void MemManage_Handler(void);
-  void BusFault_Handler(void);
-  void UsageFault_Handler(void);
-  void SVC_Handler(void);
-  void DebugMon_Handler(void);
-  void PendSV_Handler(void);
-  void SysTick_Handler(void);
+    /* Exported types ------------------------------------------------------------*/
+    /* Exported constants --------------------------------------------------------*/
+    /* Exported macro ------------------------------------------------------------*/
+    /* Exported functions ------------------------------------------------------- */
+
+    void NMI_Handler(void);
+    void HardFault_Handler(void);
+    void MemManage_Handler(void);
+    void BusFault_Handler(void);
+    void UsageFault_Handler(void);
+    void SVC_Handler(void);
+    void DebugMon_Handler(void);
+    void PendSV_Handler(void);
+    void SysTick_Handler(void);
 
 #ifdef __cplusplus
 }

User/system_stm32f4xx.c

@@ -476,40 +476,40 @@ void SystemInit(void)
 {
 /* FPU settings ------------------------------------------------------------*/
 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
+    SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
 #endif
-  /* Reset the RCC clock configuration to the default reset state ------------*/
-  /* Set HSION bit */
-  RCC->CR |= (uint32_t)0x00000001;
+    /* Reset the RCC clock configuration to the default reset state ------------*/
+    /* Set HSION bit */
+    RCC->CR |= (uint32_t)0x00000001;
 
-  /* Reset CFGR register */
-  RCC->CFGR = 0x00000000;
+    /* Reset CFGR register */
+    RCC->CFGR = 0x00000000;
 
-  /* Reset HSEON, CSSON and PLLON bits */
-  RCC->CR &= (uint32_t)0xFEF6FFFF;
+    /* Reset HSEON, CSSON and PLLON bits */
+    RCC->CR &= (uint32_t)0xFEF6FFFF;
 
-  /* Reset PLLCFGR register */
-  RCC->PLLCFGR = 0x24003010;
+    /* Reset PLLCFGR register */
+    RCC->PLLCFGR = 0x24003010;
 
-  /* Reset HSEBYP bit */
-  RCC->CR &= (uint32_t)0xFFFBFFFF;
+    /* Reset HSEBYP bit */
+    RCC->CR &= (uint32_t)0xFFFBFFFF;
 
-  /* Disable all interrupts */
-  RCC->CIR = 0x00000000;
+    /* Disable all interrupts */
+    RCC->CIR = 0x00000000;
 
 #if defined(DATA_IN_ExtSRAM) || defined(DATA_IN_ExtSDRAM)
-  SystemInit_ExtMemCtl();
+    SystemInit_ExtMemCtl();
 #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
 
-  /* Configure the System clock source, PLL Multiplier and Divider factors,
-     AHB/APBx prescalers and Flash settings ----------------------------------*/
-  SetSysClock();
+    /* Configure the System clock source, PLL Multiplier and Divider factors,
+       AHB/APBx prescalers and Flash settings ----------------------------------*/
+    SetSysClock();
 
-  /* Configure the Vector Table location add offset address ------------------*/
+    /* Configure the Vector Table location add offset address ------------------*/
 #ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+    SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+    SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
 #endif
 }
 
@@ -551,88 +551,88 @@ void SystemInit(void)
  */
 void SystemCoreClockUpdate(void)
 {
-  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+    uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
 #if defined(STM32F446xx)
-  uint32_t pllr = 2;
+    uint32_t pllr = 2;
 #endif /* STM32F446xx */
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-
-  switch (tmp)
-  {
-  case 0x00: /* HSI used as system clock source */
-    SystemCoreClock = HSI_VALUE;
-    break;
-  case 0x04: /* HSE used as system clock source */
-    SystemCoreClock = HSE_VALUE;
-    break;
-  case 0x08: /* PLL P used as system clock source */
-             /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
-               SYSCLK = PLL_VCO / PLL_P
-               */
-    pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
-    pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+    /* Get SYSCLK source -------------------------------------------------------*/
+    tmp = RCC->CFGR & RCC_CFGR_SWS;
 
-#if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || defined(STM32F446xx)
-    if (pllsource != 0)
-    {
-      /* HSE used as PLL clock source */
-      pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-    }
-    else
+    switch (tmp)
     {
-      /* HSI used as PLL clock source */
-      pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-    }
+    case 0x00: /* HSI used as system clock source */
+        SystemCoreClock = HSI_VALUE;
+        break;
+    case 0x04: /* HSE used as system clock source */
+        SystemCoreClock = HSE_VALUE;
+        break;
+    case 0x08: /* PLL P used as system clock source */
+               /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+                 SYSCLK = PLL_VCO / PLL_P
+                 */
+        pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+        pllm      = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+
+#if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || defined(STM32F446xx)
+        if (pllsource != 0)
+        {
+            /* HSE used as PLL clock source */
+            pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+        }
+        else
+        {
+            /* HSI used as PLL clock source */
+            pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+        }
 #elif defined(STM32F411xE)
 #if defined(USE_HSE_BYPASS)
-    if (pllsource != 0)
-    {
-      /* HSE used as PLL clock source */
-      pllvco = (HSE_BYPASS_INPUT_FREQUENCY / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-    }
+        if (pllsource != 0)
+        {
+            /* HSE used as PLL clock source */
+            pllvco = (HSE_BYPASS_INPUT_FREQUENCY / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+        }
 #else
-    if (pllsource == 0)
-    {
-      /* HSI used as PLL clock source */
-      pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-    }
+        if (pllsource == 0)
+        {
+            /* HSI used as PLL clock source */
+            pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+        }
 #endif /* USE_HSE_BYPASS */
 #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx || STM32F446xx */
-    pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> 16) + 1) * 2;
-    SystemCoreClock = pllvco / pllp;
-    break;
+        pllp            = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> 16) + 1) * 2;
+        SystemCoreClock = pllvco / pllp;
+        break;
 #if defined(STM32F446xx)
-  case 0x0C: /* PLL R used as system clock source */
-             /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
-               SYSCLK = PLL_VCO / PLL_R
-               */
-    pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
-    pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
-    if (pllsource != 0)
-    {
-      /* HSE used as PLL clock source */
-      pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-    }
-    else
-    {
-      /* HSI used as PLL clock source */
-      pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-    }
-
-    pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28) + 1) * 2;
-    SystemCoreClock = pllvco / pllr;
-    break;
+    case 0x0C: /* PLL R used as system clock source */
+               /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+                 SYSCLK = PLL_VCO / PLL_R
+                 */
+        pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+        pllm      = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+        if (pllsource != 0)
+        {
+            /* HSE used as PLL clock source */
+            pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+        }
+        else
+        {
+            /* HSI used as PLL clock source */
+            pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+        }
+
+        pllr            = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28) + 1) * 2;
+        SystemCoreClock = pllvco / pllr;
+        break;
 #endif /* STM32F446xx */
-  default:
-    SystemCoreClock = HSI_VALUE;
-    break;
-  }
-  /* Compute HCLK frequency --------------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
-  /* HCLK frequency */
-  SystemCoreClock >>= tmp;
+    default:
+        SystemCoreClock = HSI_VALUE;
+        break;
+    }
+    /* Compute HCLK frequency --------------------------------------------------*/
+    /* Get HCLK prescaler */
+    tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+    /* HCLK frequency */
+    SystemCoreClock >>= tmp;
 }
 
 /**
@@ -646,140 +646,183 @@ void SystemCoreClockUpdate(void)
 static void SetSysClock(void)
 {
 #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || defined(STM32F446xx)
-  /******************************************************************************/
-  /*            PLL (clocked by HSE) used as System clock source                */
-  /******************************************************************************/
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-
-  /* Enable HSE */
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
-
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;
-  } while ((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Select regulator voltage output Scale 1 mode */
-    RCC->APB1ENR |= RCC_APB1ENR_PWREN;
-    PWR->CR |= PWR_CR_VOS;
+    /******************************************************************************/
+    /*            PLL (clocked by HSE) used as System clock source                */
+    /******************************************************************************/
+    __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
 
-    /* HCLK = SYSCLK / 1*/
-    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
+    /* Enable HSE */
+    RCC->CR |= ((uint32_t)RCC_CR_HSEON);
+
+    /* Wait till HSE is ready and if Time out is reached exit */
+    do
+    {
+        HSEStatus = RCC->CR & RCC_CR_HSERDY;
+        StartUpCounter++;
+    } while ((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
+
+    if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+    {
+        HSEStatus = (uint32_t)0x01;
+    }
+    else
+    {
+        HSEStatus = (uint32_t)0x00;
+    }
+
+    if (HSEStatus == (uint32_t)0x01)
+    {
+        /* Select regulator voltage output Scale 1 mode */
+        RCC->APB1ENR |= RCC_APB1ENR_PWREN;
+        PWR->CR |= PWR_CR_VOS;
+
+        /* HCLK = SYSCLK / 1*/
+        RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
 
 #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx)
-    /* PCLK2 = HCLK / 2*/
-    RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
+        /* PCLK2 = HCLK / 2*/
+        RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
 
-    /* PCLK1 = HCLK / 4*/
-    RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
+        /* PCLK1 = HCLK / 4*/
+        RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
 #endif /* STM32F40_41xxx || STM32F427_437x || STM32F429_439xx || STM32F446xx */
 
 #if defined(STM32F401xx)
-    /* PCLK2 = HCLK / 2*/
-    RCC->CFGR |= RCC_CFGR_PPRE2_DIV1;
+        /* PCLK2 = HCLK / 2*/
+        RCC->CFGR |= RCC_CFGR_PPRE2_DIV1;
 
-    /* PCLK1 = HCLK / 4*/
-    RCC->CFGR |= RCC_CFGR_PPRE1_DIV2;
+        /* PCLK1 = HCLK / 4*/
+        RCC->CFGR |= RCC_CFGR_PPRE1_DIV2;
 #endif /* STM32F401xx */
 
 #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx)
-    /* Configure the main PLL */
-    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
-                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+        /* Configure the main PLL */
+        RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
+                       (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
 #endif /* STM32F40_41xxx || STM32F427_437x || STM32F429_439xx || STM32F401xx */
 
 #if defined(STM32F446xx)
-    /* Configure the main PLL */
-    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
-                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24) | (PLL_R << 28);
+        /* Configure the main PLL */
+        RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
+                       (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24) | (PLL_R << 28);
 #endif /* STM32F446xx */
 
-    /* Enable the main PLL */
-    RCC->CR |= RCC_CR_PLLON;
+        /* Enable the main PLL */
+        RCC->CR |= RCC_CR_PLLON;
 
-    /* Wait till the main PLL is ready */
-    while ((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
+        /* Wait till the main PLL is ready */
+        while ((RCC->CR & RCC_CR_PLLRDY) == 0)
+        {
+        }
 
 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx)
-    /* Enable the Over-drive to extend the clock frequency to 180 Mhz */
-    PWR->CR |= PWR_CR_ODEN;
-    while ((PWR->CSR & PWR_CSR_ODRDY) == 0)
-    {
-    }
-    PWR->CR |= PWR_CR_ODSWEN;
-    while ((PWR->CSR & PWR_CSR_ODSWRDY) == 0)
-    {
-    }
-    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
-    FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS;
+        /* Enable the Over-drive to extend the clock frequency to 180 Mhz */
+        PWR->CR |= PWR_CR_ODEN;
+        while ((PWR->CSR & PWR_CSR_ODRDY) == 0)
+        {
+        }
+        PWR->CR |= PWR_CR_ODSWEN;
+        while ((PWR->CSR & PWR_CSR_ODSWRDY) == 0)
+        {
+        }
+        /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+        FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS;
 #endif /* STM32F427_437x || STM32F429_439xx || STM32F446xx */
 
 #if defined(STM32F40_41xxx)
-    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
-    FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS;
+        /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+        FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS;
 #endif /* STM32F40_41xxx  */
 
 #if defined(STM32F401xx)
-    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
-    FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_2WS;
+        /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+        FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_2WS;
 #endif /* STM32F401xx */
 
-    /* Select the main PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t) ~(RCC_CFGR_SW));
-    RCC->CFGR |= RCC_CFGR_SW_PLL;
+        /* Select the main PLL as system clock source */
+        RCC->CFGR &= (uint32_t)((uint32_t) ~(RCC_CFGR_SW));
+        RCC->CFGR |= RCC_CFGR_SW_PLL;
 
-    /* Wait till the main PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
-    {
-    };
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock
-         configuration. User can add here some code to deal with this error */
-  }
+        /* Wait till the main PLL is used as system clock source */
+        while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
+        {
+        };
+    }
+    else
+    { /* If HSE fails to start-up, the application will have wrong clock
+           configuration. User can add here some code to deal with this error */
+    }
 #elif defined(STM32F411xE)
 #if defined(USE_HSE_BYPASS)
-  /******************************************************************************/
-  /*            PLL (clocked by HSE) used as System clock source                */
-  /******************************************************************************/
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-
-  /* Enable HSE and HSE BYPASS */
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON | RCC_CR_HSEBYP);
-
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;
-  } while ((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
+    /******************************************************************************/
+    /*            PLL (clocked by HSE) used as System clock source                */
+    /******************************************************************************/
+    __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
+
+    /* Enable HSE and HSE BYPASS */
+    RCC->CR |= ((uint32_t)RCC_CR_HSEON | RCC_CR_HSEBYP);
+
+    /* Wait till HSE is ready and if Time out is reached exit */
+    do
+    {
+        HSEStatus = RCC->CR & RCC_CR_HSERDY;
+        StartUpCounter++;
+    } while ((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
+
+    if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+    {
+        HSEStatus = (uint32_t)0x01;
+    }
+    else
+    {
+        HSEStatus = (uint32_t)0x00;
+    }
+
+    if (HSEStatus == (uint32_t)0x01)
+    {
+        /* Select regulator voltage output Scale 1 mode */
+        RCC->APB1ENR |= RCC_APB1ENR_PWREN;
+        PWR->CR |= PWR_CR_VOS;
+
+        /* HCLK = SYSCLK / 1*/
+        RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
+
+        /* PCLK2 = HCLK / 2*/
+        RCC->CFGR |= RCC_CFGR_PPRE2_DIV1;
+
+        /* PCLK1 = HCLK / 4*/
+        RCC->CFGR |= RCC_CFGR_PPRE1_DIV2;
+
+        /* Configure the main PLL */
+        RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
+                       (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+
+        /* Enable the main PLL */
+        RCC->CR |= RCC_CR_PLLON;
+
+        /* Wait till the main PLL is ready */
+        while ((RCC->CR & RCC_CR_PLLRDY) == 0)
+        {
+        }
+
+        /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+        FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_2WS;
+
+        /* Select the main PLL as system clock source */
+        RCC->CFGR &= (uint32_t)((uint32_t) ~(RCC_CFGR_SW));
+        RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+        /* Wait till the main PLL is used as system clock source */
+        while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
+            ;
+        {
+        }
+    }
+    else
+    { /* If HSE fails to start-up, the application will have wrong clock
+           configuration. User can add here some code to deal with this error */
+    }
+#else  /* HSI will be used as PLL clock source */
     /* Select regulator voltage output Scale 1 mode */
     RCC->APB1ENR |= RCC_APB1ENR_PWREN;
     PWR->CR |= PWR_CR_VOS;
@@ -794,8 +837,7 @@ static void SetSysClock(void)
     RCC->CFGR |= RCC_CFGR_PPRE1_DIV2;
 
     /* Configure the main PLL */
-    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
-                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) | (PLL_Q << 24);
 
     /* Enable the main PLL */
     RCC->CR |= RCC_CR_PLLON;
@@ -814,51 +856,9 @@ static void SetSysClock(void)
 
     /* Wait till the main PLL is used as system clock source */
     while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
-      ;
+        ;
     {
     }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock
-         configuration. User can add here some code to deal with this error */
-  }
-#else  /* HSI will be used as PLL clock source */
-  /* Select regulator voltage output Scale 1 mode */
-  RCC->APB1ENR |= RCC_APB1ENR_PWREN;
-  PWR->CR |= PWR_CR_VOS;
-
-  /* HCLK = SYSCLK / 1*/
-  RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
-
-  /* PCLK2 = HCLK / 2*/
-  RCC->CFGR |= RCC_CFGR_PPRE2_DIV1;
-
-  /* PCLK1 = HCLK / 4*/
-  RCC->CFGR |= RCC_CFGR_PPRE1_DIV2;
-
-  /* Configure the main PLL */
-  RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) | (PLL_Q << 24);
-
-  /* Enable the main PLL */
-  RCC->CR |= RCC_CR_PLLON;
-
-  /* Wait till the main PLL is ready */
-  while ((RCC->CR & RCC_CR_PLLRDY) == 0)
-  {
-  }
-
-  /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
-  FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_2WS;
-
-  /* Select the main PLL as system clock source */
-  RCC->CFGR &= (uint32_t)((uint32_t) ~(RCC_CFGR_SW));
-  RCC->CFGR |= RCC_CFGR_SW_PLL;
-
-  /* Wait till the main PLL is used as system clock source */
-  while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
-    ;
-  {
-  }
 #endif /* USE_HSE_BYPASS */
 #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx */
 }
@@ -880,148 +880,148 @@ static void SetSysClock(void)
  */
 void SystemInit_ExtMemCtl(void)
 {
-  /*-- GPIOs Configuration -----------------------------------------------------*/
-  /*
-   +-------------------+--------------------+------------------+--------------+
-   +                       SRAM pins assignment                               +
-   +-------------------+--------------------+------------------+--------------+
-   | PD0  <-> FMC_D2  | PE0  <-> FMC_NBL0 | PF0  <-> FMC_A0 | PG0 <-> FMC_A10 |
-   | PD1  <-> FMC_D3  | PE1  <-> FMC_NBL1 | PF1  <-> FMC_A1 | PG1 <-> FMC_A11 |
-   | PD4  <-> FMC_NOE | PE3  <-> FMC_A19  | PF2  <-> FMC_A2 | PG2 <-> FMC_A12 |
-   | PD5  <-> FMC_NWE | PE4  <-> FMC_A20  | PF3  <-> FMC_A3 | PG3 <-> FMC_A13 |
-   | PD8  <-> FMC_D13 | PE7  <-> FMC_D4   | PF4  <-> FMC_A4 | PG4 <-> FMC_A14 |
-   | PD9  <-> FMC_D14 | PE8  <-> FMC_D5   | PF5  <-> FMC_A5 | PG5 <-> FMC_A15 |
-   | PD10 <-> FMC_D15 | PE9  <-> FMC_D6   | PF12 <-> FMC_A6 | PG9 <-> FMC_NE2 |
-   | PD11 <-> FMC_A16 | PE10 <-> FMC_D7   | PF13 <-> FMC_A7 |-----------------+
-   | PD12 <-> FMC_A17 | PE11 <-> FMC_D8   | PF14 <-> FMC_A8 |
-   | PD13 <-> FMC_A18 | PE12 <-> FMC_D9   | PF15 <-> FMC_A9 |
-   | PD14 <-> FMC_D0  | PE13 <-> FMC_D10  |-----------------+
-   | PD15 <-> FMC_D1  | PE14 <-> FMC_D11  |
-   |                  | PE15 <-> FMC_D12  |
-   +------------------+------------------+
-  */
-  /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
-  RCC->AHB1ENR |= 0x00000078;
-
-  /* Connect PDx pins to FMC Alternate function */
-  GPIOD->AFR[0] = 0x00cc00cc;
-  GPIOD->AFR[1] = 0xcccccccc;
-  /* Configure PDx pins in Alternate function mode */
-  GPIOD->MODER = 0xaaaa0a0a;
-  /* Configure PDx pins speed to 100 MHz */
-  GPIOD->OSPEEDR = 0xffff0f0f;
-  /* Configure PDx pins Output type to push-pull */
-  GPIOD->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PDx pins */
-  GPIOD->PUPDR = 0x00000000;
-
-  /* Connect PEx pins to FMC Alternate function */
-  GPIOE->AFR[0] = 0xcccccccc;
-  GPIOE->AFR[1] = 0xcccccccc;
-  /* Configure PEx pins in Alternate function mode */
-  GPIOE->MODER = 0xaaaaaaaa;
-  /* Configure PEx pins speed to 100 MHz */
-  GPIOE->OSPEEDR = 0xffffffff;
-  /* Configure PEx pins Output type to push-pull */
-  GPIOE->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PEx pins */
-  GPIOE->PUPDR = 0x00000000;
-
-  /* Connect PFx pins to FMC Alternate function */
-  GPIOF->AFR[0] = 0x00cccccc;
-  GPIOF->AFR[1] = 0xcccc0000;
-  /* Configure PFx pins in Alternate function mode */
-  GPIOF->MODER = 0xaa000aaa;
-  /* Configure PFx pins speed to 100 MHz */
-  GPIOF->OSPEEDR = 0xff000fff;
-  /* Configure PFx pins Output type to push-pull */
-  GPIOF->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PFx pins */
-  GPIOF->PUPDR = 0x00000000;
-
-  /* Connect PGx pins to FMC Alternate function */
-  GPIOG->AFR[0] = 0x00cccccc;
-  GPIOG->AFR[1] = 0x000000c0;
-  /* Configure PGx pins in Alternate function mode */
-  GPIOG->MODER = 0x00080aaa;
-  /* Configure PGx pins speed to 100 MHz */
-  GPIOG->OSPEEDR = 0x000c0fff;
-  /* Configure PGx pins Output type to push-pull */
-  GPIOG->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PGx pins */
-  GPIOG->PUPDR = 0x00000000;
-
-  /*-- FMC Configuration ------------------------------------------------------*/
-  /* Enable the FMC/FSMC interface clock */
-  RCC->AHB3ENR |= 0x00000001;
+    /*-- GPIOs Configuration -----------------------------------------------------*/
+    /*
+     +-------------------+--------------------+------------------+--------------+
+     +                       SRAM pins assignment                               +
+     +-------------------+--------------------+------------------+--------------+
+     | PD0  <-> FMC_D2  | PE0  <-> FMC_NBL0 | PF0  <-> FMC_A0 | PG0 <-> FMC_A10 |
+     | PD1  <-> FMC_D3  | PE1  <-> FMC_NBL1 | PF1  <-> FMC_A1 | PG1 <-> FMC_A11 |
+     | PD4  <-> FMC_NOE | PE3  <-> FMC_A19  | PF2  <-> FMC_A2 | PG2 <-> FMC_A12 |
+     | PD5  <-> FMC_NWE | PE4  <-> FMC_A20  | PF3  <-> FMC_A3 | PG3 <-> FMC_A13 |
+     | PD8  <-> FMC_D13 | PE7  <-> FMC_D4   | PF4  <-> FMC_A4 | PG4 <-> FMC_A14 |
+     | PD9  <-> FMC_D14 | PE8  <-> FMC_D5   | PF5  <-> FMC_A5 | PG5 <-> FMC_A15 |
+     | PD10 <-> FMC_D15 | PE9  <-> FMC_D6   | PF12 <-> FMC_A6 | PG9 <-> FMC_NE2 |
+     | PD11 <-> FMC_A16 | PE10 <-> FMC_D7   | PF13 <-> FMC_A7 |-----------------+
+     | PD12 <-> FMC_A17 | PE11 <-> FMC_D8   | PF14 <-> FMC_A8 |
+     | PD13 <-> FMC_A18 | PE12 <-> FMC_D9   | PF15 <-> FMC_A9 |
+     | PD14 <-> FMC_D0  | PE13 <-> FMC_D10  |-----------------+
+     | PD15 <-> FMC_D1  | PE14 <-> FMC_D11  |
+     |                  | PE15 <-> FMC_D12  |
+     +------------------+------------------+
+    */
+    /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+    RCC->AHB1ENR |= 0x00000078;
+
+    /* Connect PDx pins to FMC Alternate function */
+    GPIOD->AFR[0] = 0x00cc00cc;
+    GPIOD->AFR[1] = 0xcccccccc;
+    /* Configure PDx pins in Alternate function mode */
+    GPIOD->MODER = 0xaaaa0a0a;
+    /* Configure PDx pins speed to 100 MHz */
+    GPIOD->OSPEEDR = 0xffff0f0f;
+    /* Configure PDx pins Output type to push-pull */
+    GPIOD->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PDx pins */
+    GPIOD->PUPDR = 0x00000000;
+
+    /* Connect PEx pins to FMC Alternate function */
+    GPIOE->AFR[0] = 0xcccccccc;
+    GPIOE->AFR[1] = 0xcccccccc;
+    /* Configure PEx pins in Alternate function mode */
+    GPIOE->MODER = 0xaaaaaaaa;
+    /* Configure PEx pins speed to 100 MHz */
+    GPIOE->OSPEEDR = 0xffffffff;
+    /* Configure PEx pins Output type to push-pull */
+    GPIOE->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PEx pins */
+    GPIOE->PUPDR = 0x00000000;
+
+    /* Connect PFx pins to FMC Alternate function */
+    GPIOF->AFR[0] = 0x00cccccc;
+    GPIOF->AFR[1] = 0xcccc0000;
+    /* Configure PFx pins in Alternate function mode */
+    GPIOF->MODER = 0xaa000aaa;
+    /* Configure PFx pins speed to 100 MHz */
+    GPIOF->OSPEEDR = 0xff000fff;
+    /* Configure PFx pins Output type to push-pull */
+    GPIOF->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PFx pins */
+    GPIOF->PUPDR = 0x00000000;
+
+    /* Connect PGx pins to FMC Alternate function */
+    GPIOG->AFR[0] = 0x00cccccc;
+    GPIOG->AFR[1] = 0x000000c0;
+    /* Configure PGx pins in Alternate function mode */
+    GPIOG->MODER = 0x00080aaa;
+    /* Configure PGx pins speed to 100 MHz */
+    GPIOG->OSPEEDR = 0x000c0fff;
+    /* Configure PGx pins Output type to push-pull */
+    GPIOG->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PGx pins */
+    GPIOG->PUPDR = 0x00000000;
+
+    /*-- FMC Configuration ------------------------------------------------------*/
+    /* Enable the FMC/FSMC interface clock */
+    RCC->AHB3ENR |= 0x00000001;
 
 #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx)
-  /* Configure and enable Bank1_SRAM2 */
-  FMC_Bank1->BTCR[2] = 0x00001011;
-  FMC_Bank1->BTCR[3] = 0x00000201;
-  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+    /* Configure and enable Bank1_SRAM2 */
+    FMC_Bank1->BTCR[2]  = 0x00001011;
+    FMC_Bank1->BTCR[3]  = 0x00000201;
+    FMC_Bank1E->BWTR[2] = 0x0fffffff;
 #endif /* STM32F427_437xx || STM32F429_439xx */
 
 #if defined(STM32F40_41xxx)
-  /* Configure and enable Bank1_SRAM2 */
-  FSMC_Bank1->BTCR[2] = 0x00001011;
-  FSMC_Bank1->BTCR[3] = 0x00000201;
-  FSMC_Bank1E->BWTR[2] = 0x0fffffff;
+    /* Configure and enable Bank1_SRAM2 */
+    FSMC_Bank1->BTCR[2]  = 0x00001011;
+    FSMC_Bank1->BTCR[3]  = 0x00000201;
+    FSMC_Bank1E->BWTR[2] = 0x0fffffff;
 #endif /* STM32F40_41xxx */
 
-  /*
-    Bank1_SRAM2 is configured as follow:
-    In case of FSMC configuration
-    NORSRAMTimingStructure.FSMC_AddressSetupTime = 1;
-    NORSRAMTimingStructure.FSMC_AddressHoldTime = 0;
-    NORSRAMTimingStructure.FSMC_DataSetupTime = 2;
-    NORSRAMTimingStructure.FSMC_BusTurnAroundDuration = 0;
-    NORSRAMTimingStructure.FSMC_CLKDivision = 0;
-    NORSRAMTimingStructure.FSMC_DataLatency = 0;
-    NORSRAMTimingStructure.FSMC_AccessMode = FMC_AccessMode_A;
-
-    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
-    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
-    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
-    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
-    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
-    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
-    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &NORSRAMTimingStructure;
-    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &NORSRAMTimingStructure;
-
-    In case of FMC configuration
-    NORSRAMTimingStructure.FMC_AddressSetupTime = 1;
-    NORSRAMTimingStructure.FMC_AddressHoldTime = 0;
-    NORSRAMTimingStructure.FMC_DataSetupTime = 2;
-    NORSRAMTimingStructure.FMC_BusTurnAroundDuration = 0;
-    NORSRAMTimingStructure.FMC_CLKDivision = 0;
-    NORSRAMTimingStructure.FMC_DataLatency = 0;
-    NORSRAMTimingStructure.FMC_AccessMode = FMC_AccessMode_A;
-
-    FMC_NORSRAMInitStructure.FMC_Bank = FMC_Bank1_NORSRAM2;
-    FMC_NORSRAMInitStructure.FMC_DataAddressMux = FMC_DataAddressMux_Disable;
-    FMC_NORSRAMInitStructure.FMC_MemoryType = FMC_MemoryType_SRAM;
-    FMC_NORSRAMInitStructure.FMC_MemoryDataWidth = FMC_MemoryDataWidth_16b;
-    FMC_NORSRAMInitStructure.FMC_BurstAccessMode = FMC_BurstAccessMode_Disable;
-    FMC_NORSRAMInitStructure.FMC_AsynchronousWait = FMC_AsynchronousWait_Disable;
-    FMC_NORSRAMInitStructure.FMC_WaitSignalPolarity = FMC_WaitSignalPolarity_Low;
-    FMC_NORSRAMInitStructure.FMC_WrapMode = FMC_WrapMode_Disable;
-    FMC_NORSRAMInitStructure.FMC_WaitSignalActive = FMC_WaitSignalActive_BeforeWaitState;
-    FMC_NORSRAMInitStructure.FMC_WriteOperation = FMC_WriteOperation_Enable;
-    FMC_NORSRAMInitStructure.FMC_WaitSignal = FMC_WaitSignal_Disable;
-    FMC_NORSRAMInitStructure.FMC_ExtendedMode = FMC_ExtendedMode_Disable;
-    FMC_NORSRAMInitStructure.FMC_WriteBurst = FMC_WriteBurst_Disable;
-    FMC_NORSRAMInitStructure.FMC_ContinousClock = FMC_CClock_SyncOnly;
-    FMC_NORSRAMInitStructure.FMC_ReadWriteTimingStruct = &NORSRAMTimingStructure;
-    FMC_NORSRAMInitStructure.FMC_WriteTimingStruct = &NORSRAMTimingStructure;
-  */
+    /*
+      Bank1_SRAM2 is configured as follow:
+      In case of FSMC configuration
+      NORSRAMTimingStructure.FSMC_AddressSetupTime = 1;
+      NORSRAMTimingStructure.FSMC_AddressHoldTime = 0;
+      NORSRAMTimingStructure.FSMC_DataSetupTime = 2;
+      NORSRAMTimingStructure.FSMC_BusTurnAroundDuration = 0;
+      NORSRAMTimingStructure.FSMC_CLKDivision = 0;
+      NORSRAMTimingStructure.FSMC_DataLatency = 0;
+      NORSRAMTimingStructure.FSMC_AccessMode = FMC_AccessMode_A;
+
+      FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
+      FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+      FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
+      FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+      FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+      FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
+      FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+      FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+      FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+      FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+      FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+      FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+      FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+      FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &NORSRAMTimingStructure;
+      FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &NORSRAMTimingStructure;
+
+      In case of FMC configuration
+      NORSRAMTimingStructure.FMC_AddressSetupTime = 1;
+      NORSRAMTimingStructure.FMC_AddressHoldTime = 0;
+      NORSRAMTimingStructure.FMC_DataSetupTime = 2;
+      NORSRAMTimingStructure.FMC_BusTurnAroundDuration = 0;
+      NORSRAMTimingStructure.FMC_CLKDivision = 0;
+      NORSRAMTimingStructure.FMC_DataLatency = 0;
+      NORSRAMTimingStructure.FMC_AccessMode = FMC_AccessMode_A;
+
+      FMC_NORSRAMInitStructure.FMC_Bank = FMC_Bank1_NORSRAM2;
+      FMC_NORSRAMInitStructure.FMC_DataAddressMux = FMC_DataAddressMux_Disable;
+      FMC_NORSRAMInitStructure.FMC_MemoryType = FMC_MemoryType_SRAM;
+      FMC_NORSRAMInitStructure.FMC_MemoryDataWidth = FMC_MemoryDataWidth_16b;
+      FMC_NORSRAMInitStructure.FMC_BurstAccessMode = FMC_BurstAccessMode_Disable;
+      FMC_NORSRAMInitStructure.FMC_AsynchronousWait = FMC_AsynchronousWait_Disable;
+      FMC_NORSRAMInitStructure.FMC_WaitSignalPolarity = FMC_WaitSignalPolarity_Low;
+      FMC_NORSRAMInitStructure.FMC_WrapMode = FMC_WrapMode_Disable;
+      FMC_NORSRAMInitStructure.FMC_WaitSignalActive = FMC_WaitSignalActive_BeforeWaitState;
+      FMC_NORSRAMInitStructure.FMC_WriteOperation = FMC_WriteOperation_Enable;
+      FMC_NORSRAMInitStructure.FMC_WaitSignal = FMC_WaitSignal_Disable;
+      FMC_NORSRAMInitStructure.FMC_ExtendedMode = FMC_ExtendedMode_Disable;
+      FMC_NORSRAMInitStructure.FMC_WriteBurst = FMC_WriteBurst_Disable;
+      FMC_NORSRAMInitStructure.FMC_ContinousClock = FMC_CClock_SyncOnly;
+      FMC_NORSRAMInitStructure.FMC_ReadWriteTimingStruct = &NORSRAMTimingStructure;
+      FMC_NORSRAMInitStructure.FMC_WriteTimingStruct = &NORSRAMTimingStructure;
+    */
 }
 #endif /* DATA_IN_ExtSRAM */
 
@@ -1036,173 +1036,173 @@ void SystemInit_ExtMemCtl(void)
  */
 void SystemInit_ExtMemCtl(void)
 {
-  register uint32_t tmpreg = 0, timeout = 0xFFFF;
-  register uint32_t index;
-
-  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
-      clock */
-  RCC->AHB1ENR |= 0x000001FC;
-
-  /* Connect PCx pins to FMC Alternate function */
-  GPIOC->AFR[0] = 0x0000000c;
-  GPIOC->AFR[1] = 0x00007700;
-  /* Configure PCx pins in Alternate function mode */
-  GPIOC->MODER = 0x00a00002;
-  /* Configure PCx pins speed to 50 MHz */
-  GPIOC->OSPEEDR = 0x00a00002;
-  /* Configure PCx pins Output type to push-pull */
-  GPIOC->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PCx pins */
-  GPIOC->PUPDR = 0x00500000;
-
-  /* Connect PDx pins to FMC Alternate function */
-  GPIOD->AFR[0] = 0x000000CC;
-  GPIOD->AFR[1] = 0xCC000CCC;
-  /* Configure PDx pins in Alternate function mode */
-  GPIOD->MODER = 0xA02A000A;
-  /* Configure PDx pins speed to 50 MHz */
-  GPIOD->OSPEEDR = 0xA02A000A;
-  /* Configure PDx pins Output type to push-pull */
-  GPIOD->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PDx pins */
-  GPIOD->PUPDR = 0x00000000;
-
-  /* Connect PEx pins to FMC Alternate function */
-  GPIOE->AFR[0] = 0xC00000CC;
-  GPIOE->AFR[1] = 0xCCCCCCCC;
-  /* Configure PEx pins in Alternate function mode */
-  GPIOE->MODER = 0xAAAA800A;
-  /* Configure PEx pins speed to 50 MHz */
-  GPIOE->OSPEEDR = 0xAAAA800A;
-  /* Configure PEx pins Output type to push-pull */
-  GPIOE->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PEx pins */
-  GPIOE->PUPDR = 0x00000000;
-
-  /* Connect PFx pins to FMC Alternate function */
-  GPIOF->AFR[0] = 0xcccccccc;
-  GPIOF->AFR[1] = 0xcccccccc;
-  /* Configure PFx pins in Alternate function mode */
-  GPIOF->MODER = 0xAA800AAA;
-  /* Configure PFx pins speed to 50 MHz */
-  GPIOF->OSPEEDR = 0xAA800AAA;
-  /* Configure PFx pins Output type to push-pull */
-  GPIOF->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PFx pins */
-  GPIOF->PUPDR = 0x00000000;
-
-  /* Connect PGx pins to FMC Alternate function */
-  GPIOG->AFR[0] = 0xcccccccc;
-  GPIOG->AFR[1] = 0xcccccccc;
-  /* Configure PGx pins in Alternate function mode */
-  GPIOG->MODER = 0xaaaaaaaa;
-  /* Configure PGx pins speed to 50 MHz */
-  GPIOG->OSPEEDR = 0xaaaaaaaa;
-  /* Configure PGx pins Output type to push-pull */
-  GPIOG->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PGx pins */
-  GPIOG->PUPDR = 0x00000000;
-
-  /* Connect PHx pins to FMC Alternate function */
-  GPIOH->AFR[0] = 0x00C0CC00;
-  GPIOH->AFR[1] = 0xCCCCCCCC;
-  /* Configure PHx pins in Alternate function mode */
-  GPIOH->MODER = 0xAAAA08A0;
-  /* Configure PHx pins speed to 50 MHz */
-  GPIOH->OSPEEDR = 0xAAAA08A0;
-  /* Configure PHx pins Output type to push-pull */
-  GPIOH->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PHx pins */
-  GPIOH->PUPDR = 0x00000000;
-
-  /* Connect PIx pins to FMC Alternate function */
-  GPIOI->AFR[0] = 0xCCCCCCCC;
-  GPIOI->AFR[1] = 0x00000CC0;
-  /* Configure PIx pins in Alternate function mode */
-  GPIOI->MODER = 0x0028AAAA;
-  /* Configure PIx pins speed to 50 MHz */
-  GPIOI->OSPEEDR = 0x0028AAAA;
-  /* Configure PIx pins Output type to push-pull */
-  GPIOI->OTYPER = 0x00000000;
-  /* No pull-up, pull-down for PIx pins */
-  GPIOI->PUPDR = 0x00000000;
-
-  /*-- FMC Configuration ------------------------------------------------------*/
-  /* Enable the FMC interface clock */
-  RCC->AHB3ENR |= 0x00000001;
-
-  /* Configure and enable SDRAM bank1 */
-  FMC_Bank5_6->SDCR[0] = 0x000039D0;
-  FMC_Bank5_6->SDTR[0] = 0x01115351;
-
-  /* SDRAM initialization sequence */
-  /* Clock enable command */
-  FMC_Bank5_6->SDCMR = 0x00000011;
-  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
-  while ((tmpreg != 0) & (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
-  }
-
-  /* Delay */
-  for (index = 0; index < 1000; index++)
-    ;
-
-  /* PALL command */
-  FMC_Bank5_6->SDCMR = 0x00000012;
-  timeout = 0xFFFF;
-  while ((tmpreg != 0) & (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
-  }
-
-  /* Auto refresh command */
-  FMC_Bank5_6->SDCMR = 0x00000073;
-  timeout = 0xFFFF;
-  while ((tmpreg != 0) & (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
-  }
-
-  /* MRD register program */
-  FMC_Bank5_6->SDCMR = 0x00046014;
-  timeout = 0xFFFF;
-  while ((tmpreg != 0) & (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
-  }
-
-  /* Set refresh count */
-  tmpreg = FMC_Bank5_6->SDRTR;
-  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C << 1));
-
-  /* Disable write protection */
-  tmpreg = FMC_Bank5_6->SDCR[0];
-  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
-
-  /*
-    Bank1_SDRAM is configured as follow:
-
-    FMC_SDRAMTimingInitStructure.FMC_LoadToActiveDelay = 2;
-    FMC_SDRAMTimingInitStructure.FMC_ExitSelfRefreshDelay = 6;
-    FMC_SDRAMTimingInitStructure.FMC_SelfRefreshTime = 4;
-    FMC_SDRAMTimingInitStructure.FMC_RowCycleDelay = 6;
-    FMC_SDRAMTimingInitStructure.FMC_WriteRecoveryTime = 2;
-    FMC_SDRAMTimingInitStructure.FMC_RPDelay = 2;
-    FMC_SDRAMTimingInitStructure.FMC_RCDDelay = 2;
-
-    FMC_SDRAMInitStructure.FMC_Bank = SDRAM_BANK;
-    FMC_SDRAMInitStructure.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_8b;
-    FMC_SDRAMInitStructure.FMC_RowBitsNumber = FMC_RowBits_Number_11b;
-    FMC_SDRAMInitStructure.FMC_SDMemoryDataWidth = FMC_SDMemory_Width_16b;
-    FMC_SDRAMInitStructure.FMC_InternalBankNumber = FMC_InternalBank_Number_4;
-    FMC_SDRAMInitStructure.FMC_CASLatency = FMC_CAS_Latency_3;
-    FMC_SDRAMInitStructure.FMC_WriteProtection = FMC_Write_Protection_Disable;
-    FMC_SDRAMInitStructure.FMC_SDClockPeriod = FMC_SDClock_Period_2;
-    FMC_SDRAMInitStructure.FMC_ReadBurst = FMC_Read_Burst_disable;
-    FMC_SDRAMInitStructure.FMC_ReadPipeDelay = FMC_ReadPipe_Delay_1;
-    FMC_SDRAMInitStructure.FMC_SDRAMTimingStruct = &FMC_SDRAMTimingInitStructure;
-  */
+    register uint32_t tmpreg = 0, timeout = 0xFFFF;
+    register uint32_t index;
+
+    /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
+        clock */
+    RCC->AHB1ENR |= 0x000001FC;
+
+    /* Connect PCx pins to FMC Alternate function */
+    GPIOC->AFR[0] = 0x0000000c;
+    GPIOC->AFR[1] = 0x00007700;
+    /* Configure PCx pins in Alternate function mode */
+    GPIOC->MODER = 0x00a00002;
+    /* Configure PCx pins speed to 50 MHz */
+    GPIOC->OSPEEDR = 0x00a00002;
+    /* Configure PCx pins Output type to push-pull */
+    GPIOC->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PCx pins */
+    GPIOC->PUPDR = 0x00500000;
+
+    /* Connect PDx pins to FMC Alternate function */
+    GPIOD->AFR[0] = 0x000000CC;
+    GPIOD->AFR[1] = 0xCC000CCC;
+    /* Configure PDx pins in Alternate function mode */
+    GPIOD->MODER = 0xA02A000A;
+    /* Configure PDx pins speed to 50 MHz */
+    GPIOD->OSPEEDR = 0xA02A000A;
+    /* Configure PDx pins Output type to push-pull */
+    GPIOD->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PDx pins */
+    GPIOD->PUPDR = 0x00000000;
+
+    /* Connect PEx pins to FMC Alternate function */
+    GPIOE->AFR[0] = 0xC00000CC;
+    GPIOE->AFR[1] = 0xCCCCCCCC;
+    /* Configure PEx pins in Alternate function mode */
+    GPIOE->MODER = 0xAAAA800A;
+    /* Configure PEx pins speed to 50 MHz */
+    GPIOE->OSPEEDR = 0xAAAA800A;
+    /* Configure PEx pins Output type to push-pull */
+    GPIOE->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PEx pins */
+    GPIOE->PUPDR = 0x00000000;
+
+    /* Connect PFx pins to FMC Alternate function */
+    GPIOF->AFR[0] = 0xcccccccc;
+    GPIOF->AFR[1] = 0xcccccccc;
+    /* Configure PFx pins in Alternate function mode */
+    GPIOF->MODER = 0xAA800AAA;
+    /* Configure PFx pins speed to 50 MHz */
+    GPIOF->OSPEEDR = 0xAA800AAA;
+    /* Configure PFx pins Output type to push-pull */
+    GPIOF->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PFx pins */
+    GPIOF->PUPDR = 0x00000000;
+
+    /* Connect PGx pins to FMC Alternate function */
+    GPIOG->AFR[0] = 0xcccccccc;
+    GPIOG->AFR[1] = 0xcccccccc;
+    /* Configure PGx pins in Alternate function mode */
+    GPIOG->MODER = 0xaaaaaaaa;
+    /* Configure PGx pins speed to 50 MHz */
+    GPIOG->OSPEEDR = 0xaaaaaaaa;
+    /* Configure PGx pins Output type to push-pull */
+    GPIOG->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PGx pins */
+    GPIOG->PUPDR = 0x00000000;
+
+    /* Connect PHx pins to FMC Alternate function */
+    GPIOH->AFR[0] = 0x00C0CC00;
+    GPIOH->AFR[1] = 0xCCCCCCCC;
+    /* Configure PHx pins in Alternate function mode */
+    GPIOH->MODER = 0xAAAA08A0;
+    /* Configure PHx pins speed to 50 MHz */
+    GPIOH->OSPEEDR = 0xAAAA08A0;
+    /* Configure PHx pins Output type to push-pull */
+    GPIOH->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PHx pins */
+    GPIOH->PUPDR = 0x00000000;
+
+    /* Connect PIx pins to FMC Alternate function */
+    GPIOI->AFR[0] = 0xCCCCCCCC;
+    GPIOI->AFR[1] = 0x00000CC0;
+    /* Configure PIx pins in Alternate function mode */
+    GPIOI->MODER = 0x0028AAAA;
+    /* Configure PIx pins speed to 50 MHz */
+    GPIOI->OSPEEDR = 0x0028AAAA;
+    /* Configure PIx pins Output type to push-pull */
+    GPIOI->OTYPER = 0x00000000;
+    /* No pull-up, pull-down for PIx pins */
+    GPIOI->PUPDR = 0x00000000;
+
+    /*-- FMC Configuration ------------------------------------------------------*/
+    /* Enable the FMC interface clock */
+    RCC->AHB3ENR |= 0x00000001;
+
+    /* Configure and enable SDRAM bank1 */
+    FMC_Bank5_6->SDCR[0] = 0x000039D0;
+    FMC_Bank5_6->SDTR[0] = 0x01115351;
+
+    /* SDRAM initialization sequence */
+    /* Clock enable command */
+    FMC_Bank5_6->SDCMR = 0x00000011;
+    tmpreg             = FMC_Bank5_6->SDSR & 0x00000020;
+    while ((tmpreg != 0) & (timeout-- > 0))
+    {
+        tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+    }
+
+    /* Delay */
+    for (index = 0; index < 1000; index++)
+        ;
+
+    /* PALL command */
+    FMC_Bank5_6->SDCMR = 0x00000012;
+    timeout            = 0xFFFF;
+    while ((tmpreg != 0) & (timeout-- > 0))
+    {
+        tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+    }
+
+    /* Auto refresh command */
+    FMC_Bank5_6->SDCMR = 0x00000073;
+    timeout            = 0xFFFF;
+    while ((tmpreg != 0) & (timeout-- > 0))
+    {
+        tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+    }
+
+    /* MRD register program */
+    FMC_Bank5_6->SDCMR = 0x00046014;
+    timeout            = 0xFFFF;
+    while ((tmpreg != 0) & (timeout-- > 0))
+    {
+        tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+    }
+
+    /* Set refresh count */
+    tmpreg             = FMC_Bank5_6->SDRTR;
+    FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C << 1));
+
+    /* Disable write protection */
+    tmpreg               = FMC_Bank5_6->SDCR[0];
+    FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+
+    /*
+      Bank1_SDRAM is configured as follow:
+
+      FMC_SDRAMTimingInitStructure.FMC_LoadToActiveDelay = 2;
+      FMC_SDRAMTimingInitStructure.FMC_ExitSelfRefreshDelay = 6;
+      FMC_SDRAMTimingInitStructure.FMC_SelfRefreshTime = 4;
+      FMC_SDRAMTimingInitStructure.FMC_RowCycleDelay = 6;
+      FMC_SDRAMTimingInitStructure.FMC_WriteRecoveryTime = 2;
+      FMC_SDRAMTimingInitStructure.FMC_RPDelay = 2;
+      FMC_SDRAMTimingInitStructure.FMC_RCDDelay = 2;
+
+      FMC_SDRAMInitStructure.FMC_Bank = SDRAM_BANK;
+      FMC_SDRAMInitStructure.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_8b;
+      FMC_SDRAMInitStructure.FMC_RowBitsNumber = FMC_RowBits_Number_11b;
+      FMC_SDRAMInitStructure.FMC_SDMemoryDataWidth = FMC_SDMemory_Width_16b;
+      FMC_SDRAMInitStructure.FMC_InternalBankNumber = FMC_InternalBank_Number_4;
+      FMC_SDRAMInitStructure.FMC_CASLatency = FMC_CAS_Latency_3;
+      FMC_SDRAMInitStructure.FMC_WriteProtection = FMC_Write_Protection_Disable;
+      FMC_SDRAMInitStructure.FMC_SDClockPeriod = FMC_SDClock_Period_2;
+      FMC_SDRAMInitStructure.FMC_ReadBurst = FMC_Read_Burst_disable;
+      FMC_SDRAMInitStructure.FMC_ReadPipeDelay = FMC_ReadPipe_Delay_1;
+      FMC_SDRAMInitStructure.FMC_SDRAMTimingStruct = &FMC_SDRAMTimingInitStructure;
+    */
 }
 #endif /* DATA_IN_ExtSDRAM */
 

platformio.ini

@@ -17,10 +17,13 @@ build_flags =
   ; -IUser/bsp
   -IUser/bsp/can
   -IUser/bsp/interface
+  -IUser/bsp/iwdg
+  -IUser/bsp/uart 
   -IUser/app
   -IUser/app/queue
   -IUser/app/led
   -IUser/app/dm9161
+  -IUser/app/fly_uart
   -IUser/UCOS-CONFIG
   -ILibraries/CMSIS/Include
   -ILibraries/CMSIS/Device/ST/STM32F4xx/Include