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.clang-format

@@ -0,0 +1,146 @@
+Language:        Cpp
+# BasedOnStyle:  LLVM
+AccessModifierOffset: -4
+AlignAfterOpenBracket: Align
+AlignConsecutiveMacros: true
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+AllowShortBlocksOnASingleLine: Never
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+AllowShortFunctionsOnASingleLine: false
+AllowShortLambdasOnASingleLine: All
+AllowShortIfStatementsOnASingleLine: Never
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+AlwaysBreakAfterReturnType: None
+AlwaysBreakBeforeMultilineStrings: false
+AlwaysBreakTemplateDeclarations: MultiLine
+BinPackArguments: true
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+BraceWrapping:
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+BreakBeforeBinaryOperators: None
+BreakBeforeBraces: Allman
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+BreakInheritanceList: BeforeColon
+BreakBeforeTernaryOperators: true
+BreakConstructorInitializersBeforeComma: false
+BreakConstructorInitializers: BeforeColon
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+DeriveLineEnding: true
+DerivePointerAlignment: false
+DisableFormat:   false
+ExperimentalAutoDetectBinPacking: false
+FixNamespaceComments: true
+ForEachMacros:
+  - foreach
+  - Q_FOREACH
+  - BOOST_FOREACH
+IncludeBlocks:   Preserve
+IncludeCategories:
+  - Regex:           '^"(llvm|llvm-c|clang|clang-c)/'
+    Priority:        2
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+  - Regex:           '^(<|"(gtest|gmock|isl|json)/)'
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+  - Regex:           '.*'
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+IncludeIsMainRegex: '(Test)?$'
+IncludeIsMainSourceRegex: ''
+IndentCaseLabels: false
+IndentCaseBlocks: false
+IndentGotoLabels: true
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+JavaScriptWrapImports: true
+KeepEmptyLinesAtTheStartOfBlocks: true
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+  - Q_UNUSED
+  - QT_REQUIRE_VERSION
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+WhitespaceSensitiveMacros:
+  - STRINGIZE
+  - PP_STRINGIZE
+  - BOOST_PP_STRINGIZE

MiddleWare/lwip-2.0.2/port/STM32F4x7/UCOS-II/ethernetif.c → MiddleWare/lwip-2.0.2/port/STM32F4xx/UCOS_II/ethernetif.c

@@ -38,13 +38,22 @@
  */
 
 #include "lwip/opt.h"
+#include "lwip/def.h"
 #include "lwip/mem.h"
+#include "lwip/pbuf.h"
+#include "lwip/timeouts.h"
 #include "netif/etharp.h"
+#include "lwip/err.h"
 #include "ethernetif.h"
+
+#include "main.h"
 #include "stm32f4x7_eth.h"
-#include "main_lwip.h"
 #include <string.h>
 
+#define ENET_RX_TASK_PRIO (4)
+#define ENET_RX_TASK_STK_SIZE (2048)
+CPU_STK enet_rx_task_stk[ENET_RX_TASK_STK_SIZE];
+
 /* Network interface name */
 #define IFNAME0 's'
 #define IFNAME1 't'
@@ -65,6 +74,10 @@ extern ETH_DMADESCTypeDef *DMARxDescToGet;
 /* Global pointer for last received frame infos */
 extern ETH_DMA_Rx_Frame_infos *DMA_RX_FRAME_infos;
 
+static struct netif *low_netif = NULL;
+OS_EVENT *g_enet_rx_sem = NULL;
+
+static void ethernetif_input(void *pvParameters);
 /**
  * In this function, the hardware should be initialized.
  * Called from ethernetif_init().
@@ -96,13 +109,22 @@ static void low_level_init(struct netif *netif)
 
   /* device capabilities */
   /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
-  netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
+  netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
 
   /* Initialize Tx Descriptors list: Chain Mode */
   ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
   /* Initialize Rx Descriptors list: Chain Mode  */
   ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
 
+  /* enable ethernet Rx interrrupt */
+  {
+    int i;
+    for (i = 0; i < ETH_RXBUFNB; i++)
+    {
+      ETH_DMATxDescTransmitITConfig(&DMARxDscrTab[i], ENABLE);
+    }
+  }
+
 #ifdef CHECKSUM_BY_HARDWARE
   /* Enable the TCP, UDP and ICMP checksum insertion for the Tx frames */
   for (i = 0; i < ETH_TXBUFNB; i++)
@@ -113,6 +135,17 @@ static void low_level_init(struct netif *netif)
 
   /* Note: TCP, UDP, ICMP checksum checking for received frame are enabled in DMA config */
 
+  /* create the task that handles the ENET RX */
+  // OSTaskCreateExt((void (*)(void *))ethernetif_input,
+  //                 (void *)0,
+  //                 (OS_STK *)&enet_rx_task_stk[ENET_RX_TASK_STK_SIZE - 1],
+  //                 (INT8U)ENET_RX_TASK_PRIO,
+  //                 (INT16U)ENET_RX_TASK_PRIO,
+  //                 (OS_STK *)&enet_rx_task_stk[0],
+  //                 (INT32U)ENET_RX_TASK_STK_SIZE,
+  //                 (void *)0,
+  //                 (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
+
   /* Enable MAC and DMA transmission and reception */
   ETH_Start();
 }
@@ -135,82 +168,57 @@ static void low_level_init(struct netif *netif)
 
 static err_t low_level_output(struct netif *netif, struct pbuf *p)
 {
-  err_t errval;
+  static OS_EVENT *p_enet_tx_sem = NULL;
+  INT8U err;
   struct pbuf *q;
-  u8 *buffer = (u8 *)(DMATxDescToSet->Buffer1Addr);
-  __IO ETH_DMADESCTypeDef *DmaTxDesc;
+  uint8_t *buffer;
+  FrameTypeDef frame;
   uint16_t framelength = 0;
-  uint32_t bufferoffset = 0;
-  uint32_t byteslefttocopy = 0;
-  uint32_t payloadoffset = 0;
+  ErrorStatus reval = ERROR;
+  SYS_ARCH_DECL_PROTECT(sr);
 
-  DmaTxDesc = DMATxDescToSet;
-  bufferoffset = 0;
-
-  /* copy frame from pbufs to driver buffers */
-  for (q = p; q != NULL; q = q->next)
+  if (NULL == p_enet_tx_sem)
   {
-    /* Is this buffer available? If not, goto error */
-    if ((DmaTxDesc->Status & ETH_DMATxDesc_OWN) != (u32)RESET)
-    {
-      errval = ERR_BUF;
-      goto error;
-    }
-
-    /* Get bytes in current lwIP buffer */
-    byteslefttocopy = q->len;
-    payloadoffset = 0;
-
-    /* Check if the length of data to copy is bigger than Tx buffer size*/
-    while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE)
-    {
-      /* Copy data to Tx buffer*/
-      memcpy((u8_t *)((u8_t *)buffer + bufferoffset), (u8_t *)((u8_t *)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset));
+    p_enet_tx_sem = OSSemCreate(1);
+  }
 
-      /* Point to next descriptor */
-      DmaTxDesc = (ETH_DMADESCTypeDef *)(DmaTxDesc->Buffer2NextDescAddr);
+  OSSemPend(p_enet_tx_sem, 0, &err);
 
-      /* Check if the buffer is available */
-      if ((DmaTxDesc->Status & ETH_DMATxDesc_OWN) != (u32)RESET)
-      {
-        errval = ERR_USE;
-        goto error;
-      }
+  SYS_ARCH_PROTECT(sr);
 
-      buffer = (u8 *)(DmaTxDesc->Buffer1Addr);
+  while ((uint32_t)RESET != (DMATxDescToSet->Status & ETH_DMATxDesc_OWN))
+  {
+  }
+  /* get received frame */
+  frame = ETH_Get_Received_Frame();
 
-      byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
-      payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
-      framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
-      bufferoffset = 0;
-    }
+  /* Obtain the size of the packet and put it into the "len" variable. */
+  buffer = (u8 *)frame.buffer;
 
-    /* Copy the remaining bytes */
-    memcpy((u8_t *)((u8_t *)buffer + bufferoffset), (u8_t *)((u8_t *)q->payload + payloadoffset), byteslefttocopy);
-    bufferoffset = bufferoffset + byteslefttocopy;
-    framelength = framelength + byteslefttocopy;
+  for (q = p; q != NULL; q = q->next)
+  {
+    memcpy((uint8_t *)&buffer[framelength], q->payload, q->len);
+    framelength = framelength + q->len;
   }
 
-  /* Note: padding and CRC for transmitted frame
-     are automatically inserted by DMA */
-
   /* Prepare transmit descriptors to give to DMA*/
-  ETH_Prepare_Transmit_Descriptors(framelength);
+  reval = ETH_Prepare_Transmit_Descriptors(framelength);
 
-  errval = ERR_OK;
+  SYS_ARCH_UNPROTECT(sr);
 
-error:
+  /* give semaphore and exit */
+  OSSemPost(p_enet_tx_sem);
 
-  /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
-  if ((ETH->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET)
+  if (SUCCESS == reval)
   {
-    /* Clear TUS ETHERNET DMA flag */
-    ETH->DMASR = ETH_DMASR_TUS;
-
-    /* Resume DMA transmission*/
-    ETH->DMATPDR = 0;
+    return ERR_OK;
+  }
+  else
+  {
+    while (1)
+    {
+    }
   }
-  return errval;
 }
 
 /**
@@ -223,15 +231,11 @@ error:
  */
 static struct pbuf *low_level_input(struct netif *netif)
 {
-  struct pbuf *p, *q;
-  uint32_t len;
+  struct pbuf *p = NULL, *q;
+  uint32_t l = 0;
+  u16_t len;
   FrameTypeDef frame;
-  u8 *buffer;
-  __IO ETH_DMADESCTypeDef *DMARxDesc;
-  uint32_t bufferoffset = 0;
-  uint32_t payloadoffset = 0;
-  uint32_t byteslefttocopy = 0;
-  uint32_t i = 0;
+  uint8_t *buffer;
 
   /* get received frame */
   frame = ETH_Get_Received_Frame();
@@ -240,62 +244,101 @@ static struct pbuf *low_level_input(struct netif *netif)
   len = frame.length;
   buffer = (u8 *)frame.buffer;
 
-  /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
-  p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+  if (len > 0)
+  {
+    /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
+    p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+  }
 
   if (p != NULL)
   {
-    DMARxDesc = frame.descriptor;
-    bufferoffset = 0;
     for (q = p; q != NULL; q = q->next)
     {
-      byteslefttocopy = q->len;
-      payloadoffset = 0;
-
-      /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
-      while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE)
-      {
-        /* Copy data to pbuf*/
-        memcpy((u8_t *)((u8_t *)q->payload + payloadoffset), (u8_t *)((u8_t *)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
-
-        /* Point to next descriptor */
-        DMARxDesc = (ETH_DMADESCTypeDef *)(DMARxDesc->Buffer2NextDescAddr);
-        buffer = (unsigned char *)(DMARxDesc->Buffer1Addr);
-
-        byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
-        payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
-        bufferoffset = 0;
-      }
-      /* Copy remaining data in pbuf */
-      memcpy((u8_t *)((u8_t *)q->payload + payloadoffset), (u8_t *)((u8_t *)buffer + bufferoffset), byteslefttocopy);
-      bufferoffset = bufferoffset + byteslefttocopy;
+      memcpy((uint8_t *)q->payload, (u8_t *)&buffer[l], q->len);
+      l = l + q->len;
     }
   }
 
-  /* Release descriptors to DMA */
-  DMARxDesc = frame.descriptor;
-
-  /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
-  for (i = 0; i < DMA_RX_FRAME_infos->Seg_Count; i++)
-  {
-    DMARxDesc->Status = ETH_DMARxDesc_OWN;
-    DMARxDesc = (ETH_DMADESCTypeDef *)(DMARxDesc->Buffer2NextDescAddr);
-  }
-
-  /* Clear Segment_Count */
-  DMA_RX_FRAME_infos->Seg_Count = 0;
+  ETH_Get_Received_Frame_interrupt();
 
-  /* When Rx Buffer unavailable flag is set: clear it and resume reception */
-  if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET)
-  {
-    /* Clear RBUS ETHERNET DMA flag */
-    ETH->DMASR = ETH_DMASR_RBUS;
-    /* Resume DMA reception */
-    ETH->DMARPDR = 0;
-  }
   return p;
 }
 
+// static struct pbuf *low_level_input(struct netif *netif)
+// {
+//   struct pbuf *p, *q;
+//   uint32_t len;
+//   FrameTypeDef frame;
+//   u8 *buffer;
+//   __IO ETH_DMADESCTypeDef *DMARxDesc;
+//   uint32_t bufferoffset = 0;
+//   uint32_t payloadoffset = 0;
+//   uint32_t byteslefttocopy = 0;
+//   uint32_t i = 0;
+
+//   /* get received frame */
+//   frame = ETH_Get_Received_Frame();
+
+//   /* Obtain the size of the packet and put it into the "len" variable. */
+//   len = frame.length;
+//   buffer = (u8 *)frame.buffer;
+
+//   /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
+//   p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+
+//   if (p != NULL)
+//   {
+//     DMARxDesc = frame.descriptor;
+//     bufferoffset = 0;
+//     for (q = p; q != NULL; q = q->next)
+//     {
+//       byteslefttocopy = q->len;
+//       payloadoffset = 0;
+
+//       /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
+//       while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE)
+//       {
+//         /* Copy data to pbuf*/
+//         memcpy((u8_t *)((u8_t *)q->payload + payloadoffset), (u8_t *)((u8_t *)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
+
+//         /* Point to next descriptor */
+//         DMARxDesc = (ETH_DMADESCTypeDef *)(DMARxDesc->Buffer2NextDescAddr);
+//         buffer = (unsigned char *)(DMARxDesc->Buffer1Addr);
+
+//         byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
+//         payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
+//         bufferoffset = 0;
+//       }
+//       /* Copy remaining data in pbuf */
+//       memcpy((u8_t *)((u8_t *)q->payload + payloadoffset), (u8_t *)((u8_t *)buffer + bufferoffset), byteslefttocopy);
+//       bufferoffset = bufferoffset + byteslefttocopy;
+//     }
+//   }
+
+//   /* Release descriptors to DMA */
+//   DMARxDesc = frame.descriptor;
+
+//   /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
+//   for (i = 0; i < DMA_RX_FRAME_infos->Seg_Count; i++)
+//   {
+//     DMARxDesc->Status = ETH_DMARxDesc_OWN;
+//     DMARxDesc = (ETH_DMADESCTypeDef *)(DMARxDesc->Buffer2NextDescAddr);
+//   }
+
+//   /* Clear Segment_Count */
+//   DMA_RX_FRAME_infos->Seg_Count = 0;
+
+//   /* When Rx Buffer unavailable flag is set: clear it and resume reception */
+//   if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET)
+//   {
+//     /* Clear RBUS ETHERNET DMA flag */
+//     ETH->DMASR = ETH_DMASR_RBUS;
+//     /* Resume DMA reception */
+//     ETH->DMARPDR = 0;
+//   }
+//   return p;
+// }
+
 /**
  * This function should be called when a packet is ready to be read
  * from the interface. It uses the function low_level_input() that
@@ -305,28 +348,58 @@ static struct pbuf *low_level_input(struct netif *netif)
  *
  * @param netif the lwip network interface structure for this ethernetif
  */
-err_t ethernetif_input(struct netif *netif)
+void ethernetif_input(void *pvParameters)
 {
-  err_t err;
   struct pbuf *p;
+  INT8U err;
+
+  SYS_ARCH_DECL_PROTECT(sr);
 
-  /* move received packet into a new pbuf */
-  p = low_level_input(netif);
+  for (;;)
+  {
 
-  /* no packet could be read, silently ignore this */
-  if (p == NULL)
-    return ERR_MEM;
+    OSSemPend(g_enet_rx_sem, 0, &err);
 
-  /* entry point to the LwIP stack */
-  err = netif->input(p, netif);
+  TRY_GET_NEXT_FRAME:
+    SYS_ARCH_PROTECT(sr);
+    p = low_level_input(low_netif);
+    SYS_ARCH_UNPROTECT(sr);
 
-  if (err != ERR_OK)
-  {
-    LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\n"));
-    pbuf_free(p);
+    if (p != NULL)
+    {
+      if (ERR_OK != low_netif->input(p, low_netif))
+      {
+        pbuf_free(p);
+      }
+      else
+      {
+        goto TRY_GET_NEXT_FRAME;
+      }
+    }
   }
-  return err;
 }
+// err_t ethernetif_input(struct netif *netif)
+// {
+//   err_t err;
+//   struct pbuf *p;
+
+//   /* move received packet into a new pbuf */
+//   p = low_level_input(netif);
+
+//   /* no packet could be read, silently ignore this */
+//   if (p == NULL)
+//     return ERR_MEM;
+
+//   /* entry point to the LwIP stack */
+//   err = netif->input(p, netif);
+
+//   if (err != ERR_OK)
+//   {
+//     LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\n"));
+//     pbuf_free(p);
+//   }
+//   return err;
+// }
 
 /**
  * Should be called at the beginning of the program to set up the
@@ -351,10 +424,7 @@ err_t ethernetif_init(struct netif *netif)
 
   netif->name[0] = IFNAME0;
   netif->name[1] = IFNAME1;
-  /* We directly use etharp_output() here to save a function call.
-   * You can instead declare your own function an call etharp_output()
-   * from it if you have to do some checks before sending (e.g. if link
-   * is available...) */
+
   netif->output = etharp_output;
   netif->linkoutput = low_level_output;
 

MiddleWare/lwip-2.0.2/port/STM32F4x7/UCOS-II/ethernetif.h → MiddleWare/lwip-2.0.2/port/STM32F4xx/UCOS_II/ethernetif.h

@@ -1,11 +1,10 @@
 #ifndef __ETHERNETIF_H__
 #define __ETHERNETIF_H__
 
-
 #include "lwip/err.h"
 #include "lwip/netif.h"
 
 err_t ethernetif_init(struct netif *netif);
-err_t ethernetif_input(struct netif *netif);
+// err_t ethernetif_input(struct netif *netif);
 
 #endif

MiddleWare/lwip-2.0.2/port/STM32F4x7/UCOS-II/sys_arch.c → MiddleWare/lwip-2.0.2/port/STM32F4xx/UCOS_II/sys_arch.c

@@ -2,8 +2,8 @@
  * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
  * All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
  *
  * 1. Redistributions of source code must retain the above copyright notice,
  *    this list of conditions and the following disclaimer.
@@ -15,14 +15,14 @@
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
- * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
- * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * This file is part of the lwIP TCP/IP stack.
  *
@@ -34,12 +34,12 @@
 #define SYS_ARCH_GLOBALS
 
 /* lwIP includes. */
+#include "sys_arch.h"
 #include "lwip/debug.h"
 #include "lwip/def.h"
-#include "lwip/sys.h"
 #include "lwip/mem.h"
+#include "lwip/sys.h"
 #include "string.h"
-#include "sys_arch.h"
 
 /*----------------------------------------------------------------------------*/
 /*                      VARIABLES                                             */
@@ -49,14 +49,13 @@ static OS_MEM *pQueueMem, *pStackMem;
 const void *const pvNullPointer = (mem_ptr_t *)0xffffffff;
 
 #if defined(__GNUC__) /*!< GCC compiler */
-__attribute__((aligned(4))) INT8U pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
+__attribute__((aligned(4)))
+INT8U pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
 __attribute__((aligned(4))) OS_STK LwIP_Task_Stk[LWIP_TASK_MAX * LWIP_STK_SIZE];
 
 #elif defined(__CC_ARM) /*!< ARM compiler */
-__align(4)
-	INT8U pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
-__align(4)
-	OS_STK LwIP_Task_Stk[LWIP_TASK_MAX * LWIP_STK_SIZE];
+__align(4) INT8U pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
+__align(4) OS_STK LwIP_Task_Stk[LWIP_TASK_MAX * LWIP_STK_SIZE];
 
 #elif defined(__ICCARM__) /*!< IAR compiler */
 #pragma data_alignment = 4
@@ -253,9 +252,7 @@ int sys_mbox_valid(sys_mbox_t *mbox)
 /**
  * Set an mbox invalid so that sys_mbox_valid returns 0
  */
-void sys_mbox_set_invalid(sys_mbox_t *mbox)
-{
-}
+void sys_mbox_set_invalid(sys_mbox_t *mbox) {}
 /*
  *  Creates and returns a new semaphore. The "count" argument specifies
  *  the initial state of the semaphore. TBD finish and test
@@ -297,7 +294,8 @@ u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
 
 	if (timeout != 0)
 	{
-		ucos_timeout = (timeout * OS_TICKS_PER_SEC) / 1000; // convert to timetick
+		ucos_timeout =
+			(timeout * OS_TICKS_PER_SEC) / 1000; // convert to timetick
 		if (ucos_timeout < 1)
 		{
 			ucos_timeout = 1;
@@ -335,10 +333,7 @@ u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
  *       Signals a semaphore
  */
 
-void sys_sem_signal(sys_sem_t *sem)
-{
-	OSSemPost(*sem);
-}
+void sys_sem_signal(sys_sem_t *sem) { OSSemPost(*sem); }
 
 /*
  *      Deallocates a semaphore
@@ -357,9 +352,7 @@ int sys_sem_valid(sys_sem_t *sem)
 }
 
 /** Set a semaphore invalid so that sys_sem_valid returns 0 */
-void sys_sem_set_invalid(sys_sem_t *sem)
-{
-}
+void sys_sem_set_invalid(sys_sem_t *sem) {}
 
 /*
  * Initialize sys arch
@@ -369,10 +362,12 @@ void sys_init(void)
 	u8_t ucErr;
 	memset(LwIP_task_priopity_stask, 0, sizeof(LwIP_task_priopity_stask));
 	/* init mem used by sys_mbox_t, use ucosII functions */
-	pQueueMem = OSMemCreate((void *)pcQueueMemoryPool, MAX_QUEUES, sizeof(TQ_DESCR), &ucErr);
+	pQueueMem = OSMemCreate((void *)pcQueueMemoryPool, MAX_QUEUES,
+							sizeof(TQ_DESCR), &ucErr);
 	OSMemNameSet(pQueueMem, "LWIP mem", &ucErr);
 	LWIP_ASSERT("sys_init: failed OSMemCreate Q", ucErr == OS_ERR_NONE);
-	pStackMem = OSMemCreate((void *)LwIP_Task_Stk, LWIP_TASK_MAX, LWIP_STK_SIZE * sizeof(OS_STK), &ucErr);
+	pStackMem = OSMemCreate((void *)LwIP_Task_Stk, LWIP_TASK_MAX,
+							LWIP_STK_SIZE * sizeof(OS_STK), &ucErr);
 	OSMemNameSet(pQueueMem, "LWIP TASK STK", &ucErr);
 	LWIP_ASSERT("sys_init: failed OSMemCreate STK", ucErr == OS_ERR_NONE);
 }
@@ -387,7 +382,8 @@ void sys_init(void)
   thread() function. The id of the new thread is returned. Both the id and
   the priority are system dependent.
 */
-sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg, int stacksize, int prio)
+sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg,
+							int stacksize, int prio)
 {
 	u8_t ubPrio = LWIP_TASK_START_PRIO;
 	u8_t ucErr;
@@ -418,7 +414,8 @@ sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg,
 			}
 			if (i == LWIP_TASK_MAX)
 			{
-				LWIP_ASSERT("sys_thread_new: there is no space for priority", 0);
+				LWIP_ASSERT("sys_thread_new: there is no space for priority",
+							0);
 				return (-1);
 			}
 		}
@@ -454,7 +451,8 @@ sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg,
 					LwIP_task_priopity_stask[i] = ubPrio;
 					break;
 				}
-		if (ubPrio >= (LWIP_TASK_START_PRIO + LWIP_TASK_MAX) || i == LWIP_TASK_MAX)
+		if (ubPrio >= (LWIP_TASK_START_PRIO + LWIP_TASK_MAX) ||
+			i == LWIP_TASK_MAX)
 		{
 			LWIP_ASSERT("sys_thread_new: there is no free priority", 0);
 			return (-1);
@@ -473,8 +471,10 @@ sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg,
 #if (OS_TASK_STAT_EN == 0)
 	OSTaskCreate(thread, (void *)arg, &task_stk[stacksize - 1], ubPrio);
 #else
-	OSTaskCreateExt(thread, (void *)arg, &task_stk[stacksize - 1], ubPrio, task_id,
-					&task_stk[0], stacksize, (void *)0, OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
+	// OSTaskCreateExt(thread, (void *)arg, &task_stk[stacksize - 1], ubPrio,
+	// 				task_id, &task_stk[0], stacksize, (void *)0,
+	// 				OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR |
+	// 					OS_TASK_OPT_SAVE_FP);
 #endif
 	OSTaskNameSet(ubPrio, (u8_t *)name, &ucErr);
 
@@ -509,7 +509,4 @@ sys_prot_t sys_arch_protect(void)
   more information. This function is only required if your port is supporting
   an operating system.
 */
-void sys_arch_unprotect(sys_prot_t pval)
-{
-	CPU_SR_Restore(pval);
-}
+void sys_arch_unprotect(sys_prot_t pval) { CPU_SR_Restore(pval); }

MiddleWare/lwip-2.0.2/port/STM32F4x7/arch/cpu.h → MiddleWare/lwip-2.0.2/port/STM32F4xx/arch/lwip_cpu.h

@@ -29,9 +29,9 @@
  * Author: Adam Dunkels <[email protected]>
  *
  */
-#ifndef __CPU_H__
-#define __CPU_H__
+#ifndef __LWIP_CPU_H__
+#define __LWIP_CPU_H__
 
 #define BYTE_ORDER LITTLE_ENDIAN
 
-#endif /* __CPU_H__ */
+#endif /* __LWIP_CPU_H__ */

User/Bsp/LED/led.c

@@ -1,27 +0,0 @@
-#include "led.h"
-
-void led_init(void)
-{
-    /* 1、打开外设时钟 */
-    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOI | RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOC, ENABLE);
-
-    /* 2、定义GPIO外设初始化结构体 */
-    GPIO_InitTypeDef GPIO_StructInit;
-    /* 3、配置GPIO初始化结构成员*/
-    GPIO_StructInit.GPIO_Mode = GPIO_Mode_OUT;
-    GPIO_StructInit.GPIO_OType = GPIO_OType_PP;
-    GPIO_StructInit.GPIO_Speed = GPIO_Low_Speed;
-    GPIO_StructInit.GPIO_PuPd = GPIO_PuPd_UP;
-    GPIO_StructInit.GPIO_Pin = GPIO_Pin_10;
-    /* 4、调用GPIO初始化函数 */
-    GPIO_Init(GPIOI, &GPIO_StructInit);
-
-    GPIO_StructInit.GPIO_Pin = GPIO_Pin_7;
-    GPIO_Init(GPIOF, &GPIO_StructInit);
-
-    GPIO_StructInit.GPIO_Pin = GPIO_Pin_8;
-    GPIO_Init(GPIOF, &GPIO_StructInit);
-
-    GPIO_StructInit.GPIO_Pin = GPIO_Pin_2;
-    GPIO_Init(GPIOC, &GPIO_StructInit);
-}

User/Bsp/LED/led.h

@@ -1,8 +0,0 @@
-#ifndef _LED_H
-#define _LED_H
-
-#include "stm32f4xx.h"
-
-void led_init(void);
-
-#endif

User/Bsp/armfly_bsp.c

@@ -0,0 +1,23 @@
+#include "armfly_bsp.h"
+// #include "param.h"
+// #include "interface.h"
+// #include "queue.h"
+// #include "can.h"
+// #include "netconf.h"
+// #include "dm9161.h"
+
+void bsp_init(void)
+{
+
+    InitQueue(&CanQueueCan1);
+    InitQueue(&CanQueueCan2);
+
+    // GPIO初始化
+    gpio_clock_init();
+    interface_init();
+
+    enet_system_setup();
+    lwip_stack_init();
+    // can初始化
+    can_network_init();
+}

User/Bsp/armfly_bsp.h

@@ -0,0 +1,11 @@
+#ifndef _ARMFLY_H__
+#define _ARMFLY_H__
+
+#include "param.h"
+#include "interface.h"
+#include "queue.h"
+#include "can.h"
+#include "netconf.h"
+#include "dm9161.h"
+
+#endif

User/Bsp/bsp.c

@@ -1,6 +0,0 @@
-#include "led.h"
-
-void bsp_init(void)
-{
-    led_init();
-}

User/Bsp/can/can.c

@@ -0,0 +1,162 @@
+#include "can.h"
+#include <string.h>
+#include "param.h"
+
+CanRxMsg can1_recv_msg;
+CanRxMsg can2_recv_msg;
+
+CanData_TypeDef CanDataCan1; // CAN1数据
+CanData_TypeDef CanDataCan2; // CAN2数据
+
+void can_network_init(void)
+{
+    CAN_InitTypeDef can_parameter;
+    CAN_FilterInitTypeDef can_filter;
+
+    CAN_StructInit(&can_parameter);
+    CAN_FilterInit(&can_filter);
+
+    /* initialize CAN register */
+    CAN_DeInit(CAN1);
+    CAN_DeInit(CAN2);
+
+    /* initialize CAN parameters */
+    can_parameter.CAN_TTCM = DISABLE;
+    can_parameter.CAN_ABOM = DISABLE;
+    can_parameter.CAN_AWUM = DISABLE;
+    can_parameter.CAN_NART = DISABLE;
+    can_parameter.CAN_RFLM = DISABLE;
+    can_parameter.CAN_TXFP = DISABLE;
+    can_parameter.CAN_Mode = CAN_Mode_Normal;
+    can_parameter.CAN_SJW = CAN_SJW_1tq;
+    can_parameter.CAN_BS1 = CAN_BS1_10tq; // CAN_BT_BS1_6TQ;
+    can_parameter.CAN_BS2 = CAN_BS2_3tq;  // CAN_BT_BS2_4TQ;
+
+    /* 1MBps */
+#if CAN_BAUDRATE == 1000
+    can_parameter.prescaler = 5;
+    /* 500KBps */
+#elif CAN_BAUDRATE == 500
+    can_parameter.prescaler = 10;
+    /* 250KBps */
+#elif CAN_BAUDRATE == 250
+    can_parameter.CAN_Prescaler = 12; // 24;//20;
+                                      /* 125KBps */
+#elif CAN_BAUDRATE == 125
+    can_parameter.prescaler = 40;
+    /* 100KBps */
+#elif CAN_BAUDRATE == 100
+    can_parameter.prescaler = 50;
+    /* 50KBps */
+#elif CAN_BAUDRATE == 50
+    can_parameter.prescaler = 100;
+    /* 20KBps */
+#elif CAN_BAUDRATE == 20
+    can_parameter.prescaler = 250;
+#else
+#error "please select list can baudrate in private defines in main.c "
+#endif
+    /* initialize CAN */
+    CAN_Init(CAN1, &can_parameter);
+    CAN_Init(CAN2, &can_parameter);
+
+    /* initialize filter */
+    can_filter.CAN_FilterNumber = 0;
+    can_filter.CAN_FilterMode = CAN_FilterMode_IdMask;
+    can_filter.CAN_FilterScale = CAN_FilterScale_32bit;
+    can_filter.CAN_FilterIdHigh = 0x0000;
+    can_filter.CAN_FilterIdLow = 0x0000;
+    can_filter.CAN_FilterMaskIdHigh = 0x0000;
+    can_filter.CAN_FilterMaskIdLow = 0x0000;
+    can_filter.CAN_FilterFIFOAssignment = CAN_FIFO0;
+    can_filter.CAN_FilterActivation = ENABLE;
+
+    CAN_FilterInit(&can_filter);
+
+    /* CAN1 filter number */
+    can_filter.CAN_FilterNumber = 15;
+    can_filter.CAN_FilterMode = CAN_FilterMode_IdMask;
+    can_filter.CAN_FilterScale = CAN_FilterScale_32bit;
+    can_filter.CAN_FilterIdHigh = 0x0000;
+    can_filter.CAN_FilterIdLow = 0x0000;
+    can_filter.CAN_FilterMaskIdHigh = 0x0000;
+    can_filter.CAN_FilterMaskIdLow = 0x0000;
+    can_filter.CAN_FilterFIFOAssignment = CAN_FIFO0;
+    can_filter.CAN_FilterActivation = ENABLE;
+
+    CAN_FilterInit(&can_filter);
+
+    can_nvic_config();
+    /* CAN FIFO0 消息接收中断使能 */
+    CAN_ITConfig(CAN1, CAN_IT_FMP0, ENABLE);
+
+    /* CAN FIFO0 消息接收中断使能 */
+    CAN_ITConfig(CAN2, CAN_IT_FMP0, ENABLE);
+}
+
+void can_nvic_config(void)
+{
+    /* configure CAN0 NVIC */
+    NVIC_InitTypeDef NVIC_InitStructure;
+
+    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
+
+    NVIC_InitStructure.NVIC_IRQChannel = CAN1_RX0_IRQn;
+    ;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
+
+    /* configure CAN1 NVIC */
+    NVIC_InitStructure.NVIC_IRQChannel = CAN2_RX0_IRQn;
+    ;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x1;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x1;
+    NVIC_Init(&NVIC_InitStructure);
+}
+
+/*!
+    \brief      this function handles CAN0 RX0 exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void CAN1_RX0_IRQHandler(void)
+{
+    /* check the receive message */
+    CAN_Receive(CAN1, CAN_FIFO0, &can1_recv_msg);
+    if ((can1_recv_msg.IDE == CAN_Id_Extended) && (CAN_MSG_LEN == can1_recv_msg.DLC))
+    {
+        memcpy(CanDataCan1.buf, can1_recv_msg.Data, CAN_MSG_LEN);
+        CanDataCan1.can_id = can1_recv_msg.ExtId;
+        InsertQueue(&CanQueueCan1, CanDataCan1);
+    }
+    OSSemPost(can1_sem);
+}
+
+/*!
+    \brief      this function handles CAN1 RX0 exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void CAN2_RX0_IRQHandler(void)
+{
+    /* check the receive message */
+    CAN_Receive(CAN1, CAN_FIFO0, &can2_recv_msg);
+    if (CAN_MSG_LEN == can2_recv_msg.DLC)
+    {
+        memcpy(CanDataCan2.buf, can2_recv_msg.Data, CAN_MSG_LEN);
+        if (can2_recv_msg.IDE == CAN_Id_Extended)
+        {
+            CanDataCan2.can_id = can2_recv_msg.ExtId;
+        }
+        else
+        {
+            CanDataCan2.can_id = can2_recv_msg.StdId;
+        }
+        InsertQueue(&CanQueueCan2, CanDataCan2);
+    }
+    OSSemPost(can2_sem);
+}

User/Bsp/can/can.h

@@ -0,0 +1,12 @@
+#ifndef __CAN_H
+#define __CAN_H
+
+#include "stm32f4xx_can.h"
+#include "includes.h"
+#include "queue.h"
+
+#define CAN_BAUDRATE 250
+
+void can_network_init(void);
+void can_nvic_config(void);
+#endif

User/Bsp/interface/interface.c

@@ -0,0 +1,142 @@
+#include "interface.h"
+#include "stm32f4xx_gpio.h"
+
+Gpio_Clock clock_info[] =
+    {
+        // {.type = kI2C0, .AXBPeriph_Clock = RCC_I2C0},
+        // {.type = kI2C1, .AXBPeriph_Clock = RCU_I2C1},
+        // {.type = kI2C2, .AXBPeriph_Clock = RCU_I2C2},
+        // {.type = kADC0, .AXBPeriph_Clock = RCU_ADC0},
+        // {.type = kADC2, .AXBPeriph_Clock = RCU_ADC2},
+        // {.type = kSPI2, .AXBPeriph_Clock = RCU_SPI2},
+        // {.type = kUart0, .AXBPeriph_Clock = RCU_USART0},
+        // {.type = kUart5, .AXBPeriph_Clock = RCU_USART5},
+        {.type = kCAN1, .AXBPeriph_Clock = RCC_APB1Periph_CAN1},
+        {.type = kCAN2, .AXBPeriph_Clock = RCC_APB1Periph_CAN2},
+        {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC},
+        {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Tx},
+        {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Rx},
+        // //    {.type = kEthernet, .AXBPeriph_Clock = RCU_ENETPTP},
+        // {.type = kPMU, .AXBPeriph_Clock = RCU_PMU},
+        // {.type = kDMA1, .AXBPeriph_Clock = RCU_DMA1},
+        // //    {.type = kTIMER1,   .AXBPeriph_Clock = RCU_TIMER1},
+};
+
+Interface_struct interface_info[] =
+    {
+        //         // I2C
+        //         {.type = kI2C0, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_6, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kI2C0, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kI2C1, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_0, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_0, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kI2C1, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kI2C2, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kI2C2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+
+        // can
+        {.type = kCAN1, .GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        {.type = kCAN1, .GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+
+        //         // spi
+        //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_11, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_12, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kSPI2, .GPIOx = SPI2_CS_PORT, .GPIO_Pin = SPI2_CS_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+
+        //         // ADC
+        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_3, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kADC2, .GPIOx = GPIOF, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_0, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+
+        // // uart
+        // {.type = kUart0, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_7}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        // {.type = kUart0, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_7}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        // {.type = kUart0, .GPIOx = UART0_ENABLE_PORT, .GPIO_Pin = UART0_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        // {.type = kUart5, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_AF = GPIO_AF_8}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        // {.type = kUart5, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_8}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        // {.type = kUart5, .GPIOx = UART5_ENABLE_PORT, .GPIO_Pin = UART5_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+
+        // ethernet
+        {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+        {.type = kEthernet, .GPIOx = ETH_RESET_PORT, .GPIO_Pin = ETH_RESET_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         //    {.type = kEthernet, .GPIOx = ETH_RXER_PORT,  .GPIO_Pin = ETH_RXER_PIN,  .GPIO_Mode = GPIO_MODE_INPUT,  .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+
+        //         // input
+        //         {.type = kInput, .In_Type = kLDetect, .GPIOx = LDetect1_PORT, .GPIO_Pin = LDetect1_PIN, .GPIO_Mode = GPIO_MODE_INPUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+
+        // output
+        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED0_RUN_PORT, .GPIO_Pin = LED0_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED1_RUN_PORT, .GPIO_Pin = LED1_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED2_RUN_PORT, .GPIO_Pin = LED2_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        {.type = kOutput, .Out_Type = kRunLed, .GPIOx = LED3_RUN_PORT, .GPIO_Pin = LED3_RUN_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kPRelayCtr, .GPIOx = PRelayCtr_PORT, .GPIO_Pin = PRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kNRelayCtr, .GPIOx = NRelayCtr_PORT, .GPIO_Pin = NRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kPreRelayCtr, .GPIOx = PreRelayCtr_PORT, .GPIO_Pin = PreRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kFanCtr, .GPIOx = Fan_PORT, .GPIO_Pin = Fan_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kOut1Ctr, .GPIOx = OUT1CTR_PORT, .GPIO_Pin = OUT1CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kOut2Ctr, .GPIOx = OUT2CTR_PORT, .GPIO_Pin = OUT2CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kExtWatchDog, .GPIOx = OUT2CTR_PORT, .GPIO_Pin = OUT2CTR_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kOutput, .Out_Type = kExtRelayLed, .GPIOx = ExtRelayLed_PORT, .GPIO_Pin = ExtRelayLed_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kExtFaultLed, .GPIOx = ExtFaultLed_PORT, .GPIO_Pin = ExtFaultLed_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kISOPRelayCtr, .GPIOx = ISOPRelayCtr_PORT, .GPIO_Pin = ISOPRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kISONRelayCtr, .GPIOx = ISONRelayCtr_PORT, .GPIO_Pin = ISONRelayCtr_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_High_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
+        //         {.type = kOutput, .Out_Type = kSoftI2C3_SDA, .GPIOx = SI2C3_SDA_PORT, .GPIO_Pin = SI2C3_SDA_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kOutput, .Out_Type = kSoftI2C3_SCL, .GPIOx = SI2C3_SCL_PORT, .GPIO_Pin = SI2C3_SCL_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        //         {.type = kOutput, .Out_Type = kSoftI2C4_SDA, .GPIOx = SI2C4_SDA_PORT, .GPIO_Pin = SI2C4_SDA_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+        // {.type = kOutput, .Out_Type = kSoftI2C4_SCL, .GPIOx = SI2C4_SCL_PORT, .GPIO_Pin = SI2C4_SCL_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+};
+
+void interface_init(void)
+{
+    INT8U index = 0;
+
+    for (index = 0; index < sizeof(interface_info) / sizeof(Interface_struct); index++)
+    {
+        /* 定义GPIO外设初始化结构体 */
+        GPIO_InitTypeDef GPIO_StructInit;
+        /* 配置GPIO初始化结构成员*/
+        GPIO_StructInit.GPIO_Mode = interface_info[index].GPIO_Mode;
+        GPIO_StructInit.GPIO_OType = interface_info[index].GPIO_OType;
+        GPIO_StructInit.GPIO_Speed = interface_info[index].GPIO_Speed;
+        GPIO_StructInit.GPIO_PuPd = interface_info[index].GPIO_PuPd;
+        GPIO_StructInit.GPIO_Pin = interface_info[index].GPIO_Pin;
+        GPIO_Init(interface_info[index].GPIOx, &GPIO_StructInit);
+
+        if (interface_info[index].GPIO_Mode == GPIO_Mode_AF)
+        {
+            GPIO_PinAFConfig(interface_info[index].AF_Info.GPIOx, interface_info[index].AF_Info.GPIO_AF, interface_info[index].AF_Info.GPIO_Pin);
+        }
+    }
+}
+
+void gpio_clock_init(void)
+{
+    INT8U index = 0;
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOF, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOH, ENABLE);
+    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOI, ENABLE);
+    for (index = 0; index < sizeof(clock_info) / sizeof(Gpio_Clock); index++)
+    {
+        RCC_AHB1PeriphClockCmd(clock_info[index].AXBPeriph_Clock, ENABLE);
+    }
+    // adc_clock_config(ADC_ADCCK_PCLK2_DIV8);
+}

User/Bsp/interface/interface.h

@@ -1,78 +1,84 @@
-// #ifndef __INTERFACE_H
-// #define __INTERFACE_H
-
-// #include <stm32f4xx.h>
-// #include "stm32f4xx_rcu.h"
-// #include "includes.h"
-
-// typedef enum
-// {
-//     kI2C0 = 0,
-//     kI2C1,
-//     kI2C2,
-//     kADC0,
-//     kADC2,
-//     kSPI2,
-//     kUart0,
-//     kUart5,
-//     kCAN0,
-//     kCAN1,
-//     kEthernet,
-//     kInput,
-//     kOutput,
-//     kPMU,
-//     kDMA1,
-//     //    kTIMER1,
-//     kInterfaceEnd,
-// } interface_type;
-
-// typedef enum
-// {
-//     kRunLed,
-//     kPRelayCtr,
-//     kNRelayCtr,
-//     kPreRelayCtr,
-//     kFanCtr,
-//     kOut1Ctr, // charger
-//     kOut2Ctr, // charger heat
-//     kExtWatchDog,
-//     kExtRelayLed,
-//     kExtFaultLed,
-//     kISOPRelayCtr,
-//     kISONRelayCtr,
-//     kSoftI2C3_SDA,
-//     kSoftI2C3_SCL,
-//     kSoftI2C4_SDA,
-//     kSoftI2C4_SCL,
-//     kOutputEnd,
-// } Output_Type;
-
-// typedef enum
-// {
-//     kLDetect,
-//     kInputEnd,
-// } Input_type;
-
-// typedef struct
-// {
-//     INT32U GPIOx;
-//     INT32U GPIO_Pin;
-//     INT8U GPIO_AF;
-// } GPIO_AF_Info;
-
-// typedef struct
-// {
-//     interface_type type;
-//     Output_Type Out_Type;
-//     Input_type In_Type;
-//     INT32U GPIOx;
-//     INT32U GPIO_Pin;
-//     INT32U GPIO_Mode;
-//     GPIO_AF_Info AF_Info;
-//     INT8U GPIO_OType;
-//     INT32U GPIO_Speed;
-//     INT32U GPIO_PuPd;
-// } Interface_struct;
+#ifndef __INTERFACE_H
+#define __INTERFACE_H
+
+#include <stm32f4xx.h>
+#include "stm32f4xx_rcc.h"
+#include "includes.h"
+
+typedef enum
+{
+    kI2C0 = 0,
+    kI2C1,
+    kI2C2,
+    kADC0,
+    kADC2,
+    kSPI2,
+    kUart0,
+    kUart5,
+    kCAN1,
+    kCAN2,
+    kEthernet,
+    kInput,
+    kOutput,
+    kPMU,
+    kDMA1,
+    //    kTIMER1,
+    kInterfaceEnd,
+} interface_type;
+
+typedef struct
+{
+    interface_type type;
+    uint32_t AXBPeriph_Clock;
+} Gpio_Clock;
+
+typedef enum
+{
+    kRunLed,
+    kPRelayCtr,
+    kNRelayCtr,
+    kPreRelayCtr,
+    kFanCtr,
+    kOut1Ctr, // charger
+    kOut2Ctr, // charger heat
+    kExtWatchDog,
+    kExtRelayLed,
+    kExtFaultLed,
+    kISOPRelayCtr,
+    kISONRelayCtr,
+    kSoftI2C3_SDA,
+    kSoftI2C3_SCL,
+    kSoftI2C4_SDA,
+    kSoftI2C4_SCL,
+    kOutputEnd,
+} Output_Type;
+
+typedef enum
+{
+    kLDetect,
+    kInputEnd,
+} Input_type;
+
+typedef struct
+{
+    GPIO_TypeDef *GPIOx;
+    INT32U GPIO_Pin;
+    INT8U GPIO_AF;
+} GPIO_AF_Info;
+
+typedef struct
+{
+    interface_type type;
+    Output_Type Out_Type;
+    Input_type In_Type;
+    GPIO_TypeDef *GPIOx;
+    INT32U GPIO_Pin;
+    INT32U GPIO_Mode;
+    GPIO_AF_Info AF_Info;
+    INT8U GPIO_OType;
+    INT32U GPIO_Speed;
+    INT32U GPIO_PuPd;
+} Interface_struct;
 
 // typedef struct
 // {
@@ -90,14 +96,14 @@
 // #define SI2C4_SCL_PIN GPIO_PIN_14
 // #define SI2C4_SCL_PORT GPIOE
 
-// #define SI2C3_SDA_HIGH gpio_bit_set(SI2C3_SDA_PORT, SI2C3_SDA_PIN)
-// #define SI2C3_SDA_LOW gpio_bit_reset(SI2C3_SDA_PORT, SI2C3_SDA_PIN)
-// #define SI2C3_SCL_HIGH gpio_bit_set(SI2C3_SCL_PORT, SI2C3_SCL_PIN)
-// #define SI2C3_SCL_LOW gpio_bit_reset(SI2C3_SCL_PORT, SI2C3_SCL_PIN)
-// #define SI2C4_SDA_HIGH gpio_bit_set(SI2C4_SDA_PORT, SI2C4_SDA_PIN)
-// #define SI2C4_SDA_LOW gpio_bit_reset(SI2C4_SDA_PORT, SI2C4_SDA_PIN)
-// #define SI2C4_SCL_HIGH gpio_bit_set(SI2C4_SCL_PORT, SI2C4_SCL_PIN)
-// #define SI2C4_SCL_LOW gpio_bit_reset(SI2C4_SCL_PORT, SI2C4_SCL_PIN)
+// #define SI2C3_SDA_HIGH GPIO_SetBits(SI2C3_SDA_PORT, SI2C3_SDA_PIN)
+// #define SI2C3_SDA_LOW GPIO_ResetBits(SI2C3_SDA_PORT, SI2C3_SDA_PIN)
+// #define SI2C3_SCL_HIGH GPIO_SetBits(SI2C3_SCL_PORT, SI2C3_SCL_PIN)
+// #define SI2C3_SCL_LOW GPIO_ResetBits(SI2C3_SCL_PORT, SI2C3_SCL_PIN)
+// #define SI2C4_SDA_HIGH GPIO_SetBits(SI2C4_SDA_PORT, SI2C4_SDA_PIN)
+// #define SI2C4_SDA_LOW GPIO_ResetBits(SI2C4_SDA_PORT, SI2C4_SDA_PIN)
+// #define SI2C4_SCL_HIGH GPIO_SetBits(SI2C4_SCL_PORT, SI2C4_SCL_PIN)
+// #define SI2C4_SCL_LOW GPIO_ResetBits(SI2C4_SCL_PORT, SI2C4_SCL_PIN)
 
 // #define SI2C3_SDA_OUT gpio_mode_set(SI2C3_SDA_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, SI2C3_SDA_PIN)
 // #define SI2C3_SDA_IN gpio_mode_set(SI2C3_SDA_PORT, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, SI2C3_SDA_PIN)
@@ -111,16 +117,16 @@
 // #define UART0_ENABLE_PIN GPIO_PIN_5
 // #define UART5_ENABLE_PORT GPIOE
 // #define UART5_ENABLE_PIN GPIO_PIN_6
-// #define UART0_TX_ENABLE gpio_bit_set(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
-// #define UART0_RX_ENABLE gpio_bit_reset(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
-// #define UART5_TX_ENABLE gpio_bit_set(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
-// #define UART5_RX_ENABLE gpio_bit_reset(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
+// #define UART0_TX_ENABLE GPIO_SetBits(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
+// #define UART0_RX_ENABLE GPIO_ResetBits(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
+// #define UART5_TX_ENABLE GPIO_SetBits(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
+// #define UART5_RX_ENABLE GPIO_ResetBits(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
 
 // // SPI
 // #define SPI2_CS_PORT GPIOA
 // #define SPI2_CS_PIN GPIO_PIN_15
-// #define SPI2_CS_HIGH gpio_bit_set(SPI2_CS_PORT, SPI2_CS_PIN)
-// #define SPI2_CS_LOW gpio_bit_reset(SPI2_CS_PORT, SPI2_CS_PIN)
+// #define SPI2_CS_HIGH GPIO_SetBits(SPI2_CS_PORT, SPI2_CS_PIN)
+// #define SPI2_CS_LOW GPIO_ResetBits(SPI2_CS_PORT, SPI2_CS_PIN)
 
 // // ethernet
 // //#define		ENET_REF_CLK					GPIO_PIN_1
@@ -143,16 +149,22 @@
 // //#define		ENET_TXD0_Port				GPIOG
 // //#define		ENET_TXD1							GPIO_PIN_14
 // //#define		ENET_TXD1_Port				GPIOG
-// #define ETH_RESET_PORT GPIOE
-// #define ETH_RESET_PIN GPIO_PIN_2
+#define ETH_RESET_PORT GPIOH
+#define ETH_RESET_PIN GPIO_Pin_6
 // #define ETH_RXER_PORT GPIOG
 // #define ETH_RXER_PIN GPIO_PIN_12
-// #define ETH_RESET_ON gpio_bit_reset(ETH_RESET_PORT, ETH_RESET_PIN)
-// #define ETH_RESET_OFF gpio_bit_set(ETH_RESET_PORT, ETH_RESET_PIN)
-
-// // output
-// #define LED_RUN_PORT GPIOE
-// #define LED_RUN_PIN GPIO_PIN_3
+#define ETH_RESET_ON GPIO_ResetBits(ETH_RESET_PORT, ETH_RESET_PIN)
+#define ETH_RESET_OFF GPIO_SetBits(ETH_RESET_PORT, ETH_RESET_PIN)
+
+// output
+#define LED0_RUN_PORT GPIOC
+#define LED0_RUN_PIN GPIO_Pin_2
+#define LED1_RUN_PORT GPIOF
+#define LED1_RUN_PIN GPIO_Pin_7
+#define LED2_RUN_PORT GPIOF
+#define LED2_RUN_PIN GPIO_Pin_8
+#define LED3_RUN_PORT GPIOI
+#define LED3_RUN_PIN GPIO_Pin_10
 // #define PRelayCtr_PORT GPIOD
 // #define PRelayCtr_PIN GPIO_PIN_6
 // #define NRelayCtr_PORT GPIOD
@@ -180,37 +192,46 @@
 // #define LDetect1_PORT GPIOD
 // #define LDetect1_PIN GPIO_PIN_13
 
-// // output operation
-// #define LED_RUN_ON gpio_bit_set(LED_RUN_PORT, LED_RUN_PIN)
-// #define LED_RUN_OFF gpio_bit_reset(LED_RUN_PORT, LED_RUN_PIN)
-// #define LED_RUN_TOGGLE gpio_bit_write(LED_RUN_PORT, LED_RUN_PIN, (FlagStatus)(1 - (gpio_output_bit_get(LED_RUN_PORT, LED_RUN_PIN))))
-// #define PRelayCtr_ON gpio_bit_set(PRelayCtr_PORT, PRelayCtr_PIN)
-// #define PRelayCtr_OFF gpio_bit_reset(PRelayCtr_PORT, PRelayCtr_PIN)
-// #define NRelayCtr_ON gpio_bit_set(NRelayCtr_PORT, NRelayCtr_PIN)
-// #define NRelayCtr_OFF gpio_bit_reset(NRelayCtr_PORT, NRelayCtr_PIN)
-// #define PreRelayCtr_ON gpio_bit_set(PreRelayCtr_PORT, PreRelayCtr_PIN)
-// #define PreRelayCtr_OFF gpio_bit_reset(PreRelayCtr_PORT, PreRelayCtr_PIN)
-// #define FAN_ON gpio_bit_set(Fan_PORT, Fan_PIN)
-// #define FAN_OFF gpio_bit_reset(Fan_PORT, Fan_PIN)
-// #define OUT1CTR_ON gpio_bit_set(OUT1CTR_PORT, OUT1CTR_PIN)
-// #define OUT1CTR_OFF gpio_bit_reset(OUT1CTR_PORT, OUT1CTR_PIN)
-// #define OUT2CTR_ON gpio_bit_set(OUT2CTR_PORT, OUT2CTR_PIN)
-// #define OUT2CTR_OFF gpio_bit_reset(OUT2CTR_PORT, OUT2CTR_PIN)
-// #define FEED_DOG_ON gpio_bit_set(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN)
-// #define FEED_DOG_OFF gpio_bit_reset(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN)
-// #define FEED_DOG_TOGGLE gpio_bit_write(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN, (FlagStatus)(1 - (gpio_output_bit_get(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN))))
-// #define ExtRelayLed_ON gpio_bit_set(ExtRelayLed_PORT, ExtRelayLed_PIN)
-// #define ExtRelayLed_OFF gpio_bit_reset(ExtRelayLed_PORT, ExtRelayLed_PIN)
-// #define ExtFaultLed_ON gpio_bit_set(ExtFaultLed_PORT, ExtFaultLed_PIN)
-// #define ExtFaultLed_OFF gpio_bit_reset(ExtFaultLed_PORT, ExtFaultLed_PIN)
-// #define ISOPRelay_ON gpio_bit_set(ISOPRelayCtr_PORT, ISOPRelayCtr_PIN)
-// #define ISOPRelay_OFF gpio_bit_reset(ISOPRelayCtr_PORT, ISOPRelayCtr_PIN)
-// #define ISONRelay_ON gpio_bit_set(ISONRelayCtr_PORT, ISONRelayCtr_PIN)
-// #define ISONRelay_OFF gpio_bit_reset(ISONRelayCtr_PORT, ISONRelayCtr_PIN)
+// output operation
+#define LED0_RUN_ON GPIO_SetBits(LED0_RUN_PORT, LED0_RUN_PIN)
+#define LED0_RUN_OFF GPIO_ResetBits(LED0_RUN_PORT, LED0_RUN_PIN)
+#define LED0_RUN_TOGGLE GPIO_ToggleBits(LED0_RUN_PORT, LED0_RUN_PIN)
+#define LED1_RUN_ON GPIO_SetBits(LED1_RUN_PORT, LED1_RUN_PIN)
+#define LED1_RUN_OFF GPIO_ResetBits(LED1_RUN_PORT, LED1_RUN_PIN)
+#define LED1_RUN_TOGGLE GPIO_ToggleBits(LED1_RUN_PORT, LED1_RUN_PIN)
+#define LED2_RUN_ON GPIO_SetBits(LED2_RUN_PORT, LED2_RUN_PIN)
+#define LED2_RUN_OFF GPIO_ResetBits(LED2_RUN_PORT, LED2_RUN_PIN)
+#define LED2_RUN_TOGGLE GPIO_ToggleBits(LED2_RUN_PORT, LED2_RUN_PIN)
+#define LED3_RUN_ON GPIO_SetBits(LED3_RUN_PORT, LED3_RUN_PIN)
+#define LED3_RUN_OFF GPIO_ResetBits(LED3_RUN_PORT, LED3_RUN_PIN)
+#define LED3_RUN_TOGGLE GPIO_ToggleBits(LED3_RUN_PORT, LED3_RUN_PIN)
+// #define PRelayCtr_ON GPIO_SetBits(PRelayCtr_PORT, PRelayCtr_PIN)
+// #define PRelayCtr_OFF GPIO_ResetBits(PRelayCtr_PORT, PRelayCtr_PIN)
+// #define NRelayCtr_ON GPIO_SetBits(NRelayCtr_PORT, NRelayCtr_PIN)
+// #define NRelayCtr_OFF GPIO_ResetBits(NRelayCtr_PORT, NRelayCtr_PIN)
+// #define PreRelayCtr_ON GPIO_SetBits(PreRelayCtr_PORT, PreRelayCtr_PIN)
+// #define PreRelayCtr_OFF GPIO_ResetBits(PreRelayCtr_PORT, PreRelayCtr_PIN)
+// #define FAN_ON GPIO_SetBits(Fan_PORT, Fan_PIN)
+// #define FAN_OFF GPIO_ResetBits(Fan_PORT, Fan_PIN)
+// #define OUT1CTR_ON GPIO_SetBits(OUT1CTR_PORT, OUT1CTR_PIN)
+// #define OUT1CTR_OFF GPIO_ResetBits(OUT1CTR_PORT, OUT1CTR_PIN)
+// #define OUT2CTR_ON GPIO_SetBits(OUT2CTR_PORT, OUT2CTR_PIN)
+// #define OUT2CTR_OFF GPIO_ResetBits(OUT2CTR_PORT, OUT2CTR_PIN)
+// #define FEED_DOG_ON GPIO_SetBits(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN)
+// #define FEED_DOG_OFF GPIO_ResetBits(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN)
+// #define FEED_DOG_TOGGLE GPIO_WriteBit(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN, (FlagStatus)(1 - (gpio_output_bit_get(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN))))
+// #define ExtRelayLed_ON GPIO_SetBits(ExtRelayLed_PORT, ExtRelayLed_PIN)
+// #define ExtRelayLed_OFF GPIO_ResetBits(ExtRelayLed_PORT, ExtRelayLed_PIN)
+// #define ExtFaultLed_ON GPIO_SetBits(ExtFaultLed_PORT, ExtFaultLed_PIN)
+// #define ExtFaultLed_OFF GPIO_ResetBits(ExtFaultLed_PORT, ExtFaultLed_PIN)
+// #define ISOPRelay_ON GPIO_SetBits(ISOPRelayCtr_PORT, ISOPRelayCtr_PIN)
+// #define ISOPRelay_OFF GPIO_ResetBits(ISOPRelayCtr_PORT, ISOPRelayCtr_PIN)
+// #define ISONRelay_ON GPIO_SetBits(ISONRelayCtr_PORT, ISONRelayCtr_PIN)
+// #define ISONRelay_OFF GPIO_ResetBits(ISONRelayCtr_PORT, ISONRelayCtr_PIN)
 
 // // input result
 // #define L_IN1_IS_LOW (gpio_input_bit_get(LDetect1_PORT, LDetect1_PIN) == RESET)
 
-// void gpio_clock_init(void);
-// void interface_init(void);
-// #endif
+void interface_init(void);
+void gpio_clock_init(void);
+#endif

User/app/dm9161/dm9161.c

@@ -0,0 +1,285 @@
+/*!
+    \file  gd32f4xx_enet_eval.c
+    \brief ethernet hardware configuration
+*/
+
+/*
+    Copyright (C) 2016 GigaDevice
+
+    2016-08-15, V1.0.0, firmware for GD32F4xx
+*/
+
+#include "stm32f4x7_eth.h"
+#include "dm9161.h"
+#include "netconf.h"
+#include "interface.h"
+#include "lwip/sockets.h"
+#include "lwip/api.h"
+
+static __IO uint32_t enet_init_status = 0;
+
+static void dm9161_gpio_config(void);
+static void dm9161_mac_dma_config(void);
+static void nvic_configuration(void);
+static uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress);
+
+/*!
+    \brief      setup ethernet system(GPIOs, clocks, MAC, DMA, systick)
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void enet_system_setup(void)
+{
+    nvic_configuration();
+
+    /* configure the GPIO ports for ethernet pins */
+    dm9161_gpio_config();
+
+    /* configure the ethernet MAC/DMA */
+    dm9161_mac_dma_config();
+
+    // /* Read PHY status register: Get Ethernet link status */
+    // if (ETH_ReadPHYRegister(0x01, PHY_SR) & 1)
+    // {
+    //     enet_init_status |= 0x10;
+    // }
+
+    // /* Configure the PHY to generate an interrupt on change of link status */
+    // Eth_Link_PHYITConfig(0x01);
+
+    /* Configure the EXTI for Ethernet link status. */
+    // Eth_Link_EXTIConfig();
+
+    if (enet_init_status == 0)
+    {
+        return;
+    }
+
+    // ETH_MACITConfig(ETH_MAC_IT_PMT, ENABLE);
+    ETH_DMAITConfig(ETH_DMA_IT_R, ENABLE);
+    ETH_DMAITConfig(ETH_DMA_IT_NIS, ENABLE);
+    // ETH_MACReceptionCmd(ENABLE);
+}
+
+/*!
+    \brief      configures the ethernet interface
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+static void dm9161_mac_dma_config(void)
+{
+    ErrorStatus reval_state = ERROR;
+
+    /* reset ethernet on AHB bus */
+    ETH_DeInit();
+
+    /* Software reset */
+    ETH_SoftwareReset();
+    /* Wait for software reset */
+    reval_state = ETH_GetSoftwareResetStatus();
+    if (reval_state == ERROR)
+    {
+        return;
+    }
+    // while (ETH_GetSoftwareResetStatus() == SET)
+    //     ;
+
+    // /* ETHERNET Configuration --------------------------------------------------*/
+    // /* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
+    ETH_InitTypeDef ETH_InitStructure;
+    ETH_StructInit(&ETH_InitStructure);
+
+    /* Fill ETH_InitStructure parametrs */
+    /*------------------------   MAC   -----------------------------------*/
+    ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
+    //  ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable;
+    //  ETH_InitStructure.ETH_Speed = ETH_Speed_10M;
+    //  ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
+
+    ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
+    ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
+    ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
+    ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
+    ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
+    ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
+    ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
+    ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
+#ifdef CHECKSUM_BY_HARDWARE
+    ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
+#endif
+
+    /*------------------------   DMA   -----------------------------------------*/
+    /* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
+    the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
+    if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
+    ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
+    ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
+    ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
+
+    ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
+    ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
+    ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
+    ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
+    ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
+    ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
+    ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
+    ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
+
+    /* Configure Ethernet */
+    enet_init_status = ETH_Init(&ETH_InitStructure, 0x01);
+}
+
+/*!
+    \brief      configures the nested vectored interrupt controller
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+static void nvic_configuration(void)
+{
+    NVIC_InitTypeDef NVIC_InitStructure;
+    NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
+    NVIC_Init(&NVIC_InitStructure);
+}
+
+/*!
+    \brief      configures the different GPIO ports
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+static void dm9161_gpio_config(void)
+{
+    INT16U i = 0;
+    GPIO_InitTypeDef GPIO_StructInit;
+    GPIO_StructInit.GPIO_Mode = GPIO_Mode_OUT;
+    // GPIO_StructInit.GPIO_OType = interface_info[index].GPIO_OType;
+    GPIO_StructInit.GPIO_Speed = GPIO_High_Speed;
+    GPIO_StructInit.GPIO_PuPd = GPIO_PuPd_DOWN;
+    GPIO_StructInit.GPIO_Pin = ETH_RESET_PIN;
+    GPIO_Init(ETH_RESET_PORT, &GPIO_StructInit);
+    ETH_RESET_ON;
+    while (i < 1000)
+    {
+        i++;
+    }
+    i = 0;
+    ETH_RESET_OFF;
+    while (i < 1000)
+    {
+        i++;
+    }
+    i = 0;
+    /* Enable SYSCFG clock */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
+
+#ifdef MII_MODE
+#ifdef PHY_CLOCK_MCO
+    /* output HXTAL clock (25MHz) on CKOUT0 pin(PA8) to clock the PHY */
+    RCC_MCO1Config(RCC_MCO1Source_HSE, RCC_MCO1Div_1);
+#endif /* PHY_CLOCK_MCO */
+    SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII);
+#elif defined RMII_MODE
+    SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
+#endif
+}
+
+uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress)
+{
+    uint16_t tmpreg = 0;
+
+    /* Read MICR register */
+    tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MICR);
+
+    /* Enable output interrupt events to signal via the INT pin */
+    tmpreg |= (uint16_t)(PHY_MICR_INT_EN | PHY_MICR_INT_OE);
+    if (!(ETH_WritePHYRegister(PHYAddress, PHY_MICR, tmpreg)))
+    {
+        /* Return ERROR in case of write timeout */
+        return ETH_ERROR;
+    }
+
+    /* Read MISR register */
+    tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MISR);
+
+    /* Enable Interrupt on change of link status */
+    tmpreg |= (uint16_t)PHY_MISR_LINK_INT_EN;
+    if (!(ETH_WritePHYRegister(PHYAddress, PHY_MISR, tmpreg)))
+    {
+        /* Return ERROR in case of write timeout */
+        return ETH_ERROR;
+    }
+    /* Return SUCCESS */
+    return ETH_SUCCESS;
+}
+
+static err_t bms_net_process(int fd, void *data, int len)
+{
+    INT8U response[2] = {0xBB, 0xAA};
+    if ((len == 2) && (((INT8U *)data)[0] == 0xAA) && (((INT8U *)data)[1] == 0xBB))
+    {
+        send(fd, (void *)response, sizeof(response), 0);
+    }
+    return 1;
+}
+
+void dm9161_task(void)
+{
+    INT8U buf[50];
+    INT32S ret = 0;
+    INT32S sockfd = -1, newfd = -1;
+    INT32U len = 0;
+    struct sockaddr_in svr_addr, clt_addr;
+
+    svr_addr.sin_family = AF_INET;
+    svr_addr.sin_port = htons(TCP_PORT);
+    svr_addr.sin_addr.s_addr = htons(INADDR_ANY);
+
+    while (1)
+    {
+        sockfd = socket(AF_INET, SOCK_STREAM, 0);
+        if (sockfd < 0)
+        {
+            continue;
+        }
+
+        ret = bind(sockfd, (struct sockaddr *)&svr_addr, sizeof(svr_addr));
+        if (ret < 0)
+        {
+            lwip_close(sockfd);
+            sockfd = -1;
+            continue;
+        }
+
+        ret = listen(sockfd, 1);
+        if (ret < 0)
+        {
+            lwip_close(sockfd);
+            continue;
+        }
+
+        len = sizeof(clt_addr);
+
+        newfd = accept(sockfd, NULL, NULL);
+
+        while (-1 != newfd)
+        {
+            ret = recv(newfd, buf, sizeof(buf) - 1, 0);
+            if (ret <= 0)
+            {
+                lwip_close(newfd);
+                newfd = -1;
+                break;
+            }
+            bms_net_process(newfd, buf, ret);
+        }
+
+        lwip_close(sockfd);
+        sockfd = -1;
+        OSTimeDly(10);
+    }
+}

User/app/dm9161/dm9161.h

@@ -0,0 +1,13 @@
+#ifndef __DM_9161_H
+#define __DM_9161_H
+#include "includes.h"
+#include "lwip/netif.h"
+#include "netconf.h"
+#include "interface.h"
+#include "param.h"
+
+#define TCP_PORT 8080
+
+void enet_system_setup(void);
+void dm9161_task(void);
+#endif

User/app/led/led.c

@@ -0,0 +1,21 @@
+#include "led.h"
+#include "interface.h"
+
+void led_task(void)
+{
+    while (1)
+    {
+        LED0_RUN_ON;
+        OSTimeDly(100);
+        LED1_RUN_ON;
+        OSTimeDly(100);
+        LED0_RUN_OFF;
+        OSTimeDly(100);
+        LED1_RUN_OFF;
+        OSTimeDly(100);
+        LED2_RUN_ON;
+        OSTimeDly(100);
+        LED2_RUN_OFF;
+        OSTimeDly(100);
+    }
+}

User/app/led/led.h

@@ -0,0 +1,8 @@
+#ifndef __LED_H
+#define __LED_H
+
+#include "includes.h"
+
+void led_task(void);
+
+#endif

User/app/param.c

@@ -0,0 +1,20 @@
+#define _VAR_FUNC_IMPL
+#include "param.h"
+
+OS_EVENT *bmu_mutex    = NULL;
+OS_EVENT *bms_mutex    = NULL;
+OS_EVENT *config_mutex = NULL;
+OS_EVENT *can1_sem     = NULL;
+OS_EVENT *can2_sem     = NULL;
+OS_EVENT *net_sem      = NULL;
+OS_EVENT *uart0_mbox   = NULL;
+OS_EVENT *uart5_mbox   = NULL;
+
+SqQueue CanQueueCan1;
+SqQueue CanQueueCan2;
+
+CPU_STK init_task_stk[INIT_STK_SIZE];
+CPU_STK net_task_stk[NET_TASK_STK_SIZE];
+CPU_STK misc_task_stk[MISC_TASK_STK_SIZE];
+CPU_STK LED0_TASK_STK[LED0_STK_SIZE];
+CPU_STK LED1_TASK_STK[LED1_STK_SIZE];

User/app/param.h

@@ -0,0 +1,35 @@
+#ifndef __PARAM_H
+#define __PARAM_H
+#include "includes.h"
+// #include "ext_flash.h"
+#include "queue.h"
+// #include "soc_out.h"
+// #include "bms_config.h"
+#include <string.h>
+
+#define CAN_MSG_LEN 8
+
+#define LED0_RX_PRIO   7
+#define MISC_PRIO      28
+#define NET_PRIO       30
+#define INIT_TASK_PRIO 35
+
+#define INIT_STK_SIZE      128
+#define MISC_TASK_STK_SIZE 512
+#define NET_TASK_STK_SIZE  512
+#define LED0_STK_SIZE      512
+#define LED1_STK_SIZE      512
+
+extern OS_EVENT *can1_sem;
+extern OS_EVENT *can2_sem;
+
+extern SqQueue CanQueueCan1;
+extern SqQueue CanQueueCan2;
+
+extern CPU_STK init_task_stk[INIT_STK_SIZE];
+extern CPU_STK misc_task_stk[MISC_TASK_STK_SIZE];
+extern CPU_STK net_task_stk[NET_TASK_STK_SIZE];
+extern CPU_STK LED0_TASK_STK[LED0_STK_SIZE];
+extern CPU_STK LED1_TASK_STK[LED1_STK_SIZE];
+
+#endif

User/app/queue/queue.c

@@ -0,0 +1,71 @@
+#include "queue.h"
+
+///   front   ...         rear      数据方向 ->
+/* 队列的顺序存储结构(循环队列) */
+
+/****************************************************
+ *  函 数 名：InitQueue
+ *  函数功能：初始化队列
+ *  入口参数：无
+ *  说    明：
+ ****************************************************/
+void InitQueue(SqQueue *Q)
+{                           /* 构造一个空队列Q */
+    Q->front = Q->rear = 0; /*空队列*/
+}
+
+/****************************************************
+ *  函 数 名：IsQueueEmpty
+ *  函数功能：查询队列是否为空
+ *  入口参数：Q 队列
+ *  说    明：空队列，返回TRUE；否则返回FALSE
+ ****************************************************/
+INT8U IsQueueEmpty(const SqQueue *Q)
+{ /* 若*/
+    if (Q->front == Q->rear)
+        return TRUE;
+    else
+        return FALSE;
+}
+
+/****************************************************
+ *  函 数 名：QueueLength
+ *  函数功能：初始化长度
+ *  入口参数：Q 队列
+ *  说    明：
+ ****************************************************/
+INT16U QueueLength(SqQueue Q)
+{ /* 返回Q的元素个数，即队列的长度 */
+    return (Q.rear - Q.front + MAX_QSIZE) % MAX_QSIZE;
+}
+
+/****************************************************
+ *  函 数 名：GetHead
+ *  函数功能：获取对头数据
+ *  入口参数：Q 队列
+ *  说    明：
+ ****************************************************/
+INT8U GetHead(SqQueue *Q, CanData_TypeDef *e)
+{                            /* 若队列不空，则用e返回Q的队头元素，并返回OK；否则返回ERROR */
+    if (Q->front == Q->rear) /* 队列空 */
+        return ERROR;
+    *e = Q->CanBuf[Q->front];
+
+    Q->front = (Q->front + 1) % MAX_QSIZE;
+    return SUCCESS;
+}
+
+/****************************************************
+ *  函 数 名：InsertQueue
+ *  函数功能：队列插入数据
+ *  入口参数：Q 待插入队列    e 待插入数据
+ *  说    明：
+ ****************************************************/
+INT8U InsertQueue(SqQueue *Q, CanData_TypeDef e)
+{                                              /* 插入元素e为Q的新的队尾元素 */
+    if ((Q->rear + 1) % MAX_QSIZE == Q->front) /* 队列满 */
+        return ERROR;
+    Q->CanBuf[Q->rear] = e;
+    Q->rear = (Q->rear + 1) % MAX_QSIZE;
+    return SUCCESS;
+}

User/app/queue/queue.h

@@ -0,0 +1,25 @@
+#ifndef __QUEUE_H
+#define __QUEUE_H
+#include "includes.h"
+
+#define MAX_QSIZE (60u) /* 最大队列长度 */
+
+typedef struct
+{
+    INT8U buf[8];
+    INT32U can_id;
+} CanData_TypeDef;
+
+typedef struct
+{
+    CanData_TypeDef CanBuf[MAX_QSIZE];
+    INT16U front;
+    INT16U rear;
+} SqQueue;
+
+void InitQueue(SqQueue *Q);                       // 初始化队列
+INT8U GetHead(SqQueue *Q, CanData_TypeDef *e);    // 获取对头数据
+INT8U InsertQueue(SqQueue *Q, CanData_TypeDef e); // 队列插入数据
+INT8U IsQueueEmpty(const SqQueue *Q);             // 查询队列是否为空
+
+#endif

User/main.c

@@ -9,21 +9,6 @@
 
 #include "main.h"
 
-#define INIT_STK_SIZE 64
-#define LED0_STK_SIZE 64
-#define LED1_STK_SIZE 64
-
-CPU_STK init_task_stk[INIT_STK_SIZE];
-CPU_STK LED0_TASK_STK[LED0_STK_SIZE];
-CPU_STK LED1_TASK_STK[LED1_STK_SIZE];
-#define INIT_TASK_PRIO 10
-#define LED0_RX_PRIO 7
-#define LED1_RX_PRIO 6
-void Delay(uint32_t count)
-{
-    for (; count != 0; count--)
-        ;
-}
 int main(void)
 {
 #if 0
@@ -73,13 +58,13 @@ int main(void)
     OSTaskCreateExt(init_task,                                   /* 启动任务函数指针 */
                     (void *)0,                                   /* 传递给任务的参数 */
                     (OS_STK *)&init_task_stk[INIT_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
-                    INIT_TASK_PRIO,                              /* 任务的优先级，必须唯一，数字越低优先级越高 */
-                    INIT_TASK_PRIO,                              /* 任务ID，一般和任务优先级相同 */
-                    (OS_STK *)&init_task_stk[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
-                    INIT_STK_SIZE,                               /* 任务栈大小 */
-                    (void *)0,                                   /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-                                                        （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
-                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* 任务选项字 */
+                    INIT_TASK_PRIO,              /* 任务的优先级，必须唯一，数字越低优先级越高 */
+                    INIT_TASK_PRIO,              /* 任务ID，一般和任务优先级相同 */
+                    (OS_STK *)&init_task_stk[0], /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
+                    INIT_STK_SIZE,               /* 任务栈大小 */
+                    (void *)0, /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
+                      （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
+                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); /* 任务选项字 */
 
     OSStart();
 
@@ -98,49 +83,43 @@ void init_task(void *pvParameters)
     /* configure the systick handler priority */
     NVIC_SetPriority(SysTick_IRQn, 0x00U);
 
-    OSTaskCreateExt(led0_task,                                   /* 启动任务函数指针 */
+    OSTaskCreateExt((void (*)(void *))led_task,                  /* 启动任务函数指针 */
                     (void *)0,                                   /* 传递给任务的参数 */
                     (OS_STK *)&LED0_TASK_STK[LED0_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
-                    LED0_RX_PRIO,                                /* 任务的优先级，必须唯一，数字越低优先级越高 */
-                    LED0_RX_PRIO,                                /* 任务ID，一般和任务优先级相同 */
-                    (OS_STK *)&LED0_TASK_STK[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
-                    LED0_STK_SIZE,                               /* 任务栈大小 */
-                    (void *)0,                                   /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-                                                        （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
-                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* 任务选项字 */
-
-    OSTaskCreateExt(led1_task,                                   /* 启动任务函数指针 */
-                    (void *)0,                                   /* 传递给任务的参数 */
-                    (OS_STK *)&LED1_TASK_STK[LED1_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
-                    LED1_RX_PRIO,                                /* 任务的优先级，必须唯一，数字越低优先级越高 */
-                    LED1_RX_PRIO,                                /* 任务ID，一般和任务优先级相同 */
-                    (OS_STK *)&LED1_TASK_STK[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
-                    LED1_STK_SIZE,                               /* 任务栈大小 */
-                    (void *)0,                                   /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-                                                        （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
-                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* 任务选项字 */
+                    LED0_RX_PRIO,                /* 任务的优先级，必须唯一，数字越低优先级越高 */
+                    LED0_RX_PRIO,                /* 任务ID，一般和任务优先级相同 */
+                    (OS_STK *)&LED0_TASK_STK[0], /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
+                    LED0_STK_SIZE,               /* 任务栈大小 */
+                    (void *)0, /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
+                      （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
+                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); /* 任务选项字 */
+
+    OSTaskCreateExt((void (*)(void *))misc_task, (void *)0, (OS_STK *)&misc_task_stk[MISC_TASK_STK_SIZE - 1],
+                    (INT8U)MISC_PRIO, (INT16U)MISC_PRIO, (OS_STK *)&misc_task_stk[0], (INT32U)MISC_TASK_STK_SIZE,
+                    (void *)0, (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
+
+    // OSTaskCreateExt((void (*)(void *))led1_task,                 /* 启动任务函数指针 */
+    //                 (void *)0,                                   /* 传递给任务的参数 */
+    //                 (OS_STK *)&LED1_TASK_STK[LED1_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
+    //                 LED1_RX_PRIO,                                /* 任务的优先级，必须唯一，数字越低优先级越高 */
+    //                 LED1_RX_PRIO,                                /* 任务ID，一般和任务优先级相同 */
+    //                 (OS_STK *)&LED1_TASK_STK[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH
+    //                 决定堆栈增长方向 */ LED1_STK_SIZE,                               /* 任务栈大小 */ (void *)0, /*
+    //                 一块用户内存区的指针，用于任务控制块TCB的扩展功能
+    //                                                     （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
+    //                 OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* 任务选项字 */
+
+    OSTaskCreateExt((void (*)(void *))dm9161_task, (void *)0, (OS_STK *)&net_task_stk[NET_TASK_STK_SIZE - 1],
+                    (INT8U)NET_PRIO, (INT16U)NET_PRIO, (OS_STK *)&net_task_stk[0], (INT32U)NET_TASK_STK_SIZE, (void *)0,
+                    (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
 }
 
-void led0_task(void *pdata)
+void misc_task(void)
 {
-    pdata = pdata;
     while (1)
     {
-        GPIO_SetBits(GPIOI, GPIO_Pin_10);
-        OSTimeDly(100);
-        GPIO_ResetBits(GPIOI, GPIO_Pin_10);
-        OSTimeDly(400);
-    }
-}
-
-void led1_task(void *pdata)
-{
-    pdata = pdata;
-    while (1)
-    {
-        GPIO_SetBits(GPIOC, GPIO_Pin_2);
+        // LED_RUN_TOGGLE;
         OSTimeDly(500);
-        GPIO_ResetBits(GPIOC, GPIO_Pin_2);
-        OSTimeDly(200);
-    }
+        LED3_RUN_TOGGLE;
+    };
 }

User/main.h

@@ -1,11 +1,15 @@
 #ifndef __MAIN_H
 #define __MAIN_H
 
-#include "stm32f4xx.h"
+#include "dm9161.h"
 #include "includes.h"
+#include "interface.h"
+#include "led.h"
+#include "param.h"
+#include "stm32f4xx.h"
+#include <stdio.h>
 
 void bsp_init(void);
 void init_task(void *pvParameters);
-void led0_task(void *pdata);
-void led1_task(void *pdata);
+void misc_task(void);
 #endif

User/main_lwip.h

@@ -1,141 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    main_lwip.h
-  * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    31-July-2013
-  * @brief   This file contains all the functions prototypes for the main.c
-  *          file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software
-  * distributed under the License is distributed on an "AS IS" BASIS,
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __MAIN_LWIP_H
-#define __MAIN_LWIP_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-#include "stm32f4x7_eth_bsp.h"
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-//#define USE_LCD        /* enable LCD  */
-//#define USE_DHCP       /* enable DHCP, if disabled static address is used */
-
-/* Uncomment SERIAL_DEBUG to enables retarget of printf to serial port (COM1 on STM32 evalboard)
-   for debug purpose */
-//#define SERIAL_DEBUG
-
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2
-#define MAC_ADDR1   0
-#define MAC_ADDR2   0
-#define MAC_ADDR3   0
-#define MAC_ADDR4   0
-#define MAC_ADDR5   0
-
-/*Static IP ADDRESS: IP_ADDR0.IP_ADDR1.IP_ADDR2.IP_ADDR3 */
-#if 0
-	/* IPµØÖ· */
-	#define IP_ADDR0   g_tParam.lwip_ip[0]
-	#define IP_ADDR1   g_tParam.lwip_ip[1]
-	#define IP_ADDR2   g_tParam.lwip_ip[2]
-	#define IP_ADDR3   g_tParam.lwip_ip[3]
-	   
-	/*NETMASK*/
-	#define NETMASK_ADDR0   g_tParam.lwip_net_mask[0]
-	#define NETMASK_ADDR1   g_tParam.lwip_net_mask[1]
-	#define NETMASK_ADDR2   g_tParam.lwip_net_mask[2]
-	#define NETMASK_ADDR3   g_tParam.lwip_net_mask[3]
-
-	/*Gateway Address*/
-	#define GW_ADDR0   g_tParam.lwip_gateway[0]
-	#define GW_ADDR1   g_tParam.lwip_gateway[1]
-	#define GW_ADDR2   g_tParam.lwip_gateway[2]
-	#define GW_ADDR3   g_tParam.lwip_gateway[3]
-#else
-	#define IP_ADDR0   192
-	#define IP_ADDR1   168
-	#define IP_ADDR2   0
-	#define IP_ADDR3   12
-	   
-	/*NETMASK*/
-	#define NETMASK_ADDR0   255
-	#define NETMASK_ADDR1   255
-	#define NETMASK_ADDR2   255
-	#define NETMASK_ADDR3   0
-
-	/*Gateway Address*/
-	#define GW_ADDR0   192
-	#define GW_ADDR1   168
-	#define GW_ADDR2   0
-	#define GW_ADDR3   1
-#endif
-
-/* MII and RMII mode selection, for STM324xG-EVAL Board(MB786) RevB ***********/
-//#define RMII_MODE  // User have to provide the 50 MHz clock by soldering a 50 MHz
-                     // oscillator (ref SM7745HEV-50.0M or equivalent) on the U3
-                     // footprint located under CN3 and also removing jumper on JP5.
-                     // This oscillator is not provided with the board.
-                     // For more details, please refer to STM3240G-EVAL evaluation
-                     // board User manual (UM1461).
-
-
-#define MII_MODE
-
-/* Uncomment the define below to clock the PHY from external 25MHz crystal (only for MII mode) */
-#ifdef 	MII_MODE
- #define PHY_CLOCK_MCO
-#endif
-
-/* STM324xG-EVAL jumpers setting
-    +==========================================================================================+
-    +  Jumper |       MII mode configuration            |      RMII mode configuration         +
-    +==========================================================================================+
-    +  JP5    | 2-3 provide 25MHz clock by MCO(PA8)     |  Not fitted                          +
-    +         | 1-2 provide 25MHz clock by ext. Crystal |                                      +
-    + -----------------------------------------------------------------------------------------+
-    +  JP6    |          2-3                            |  1-2                                 +
-    + -----------------------------------------------------------------------------------------+
-    +  JP8    |          Open                           |  Close                               +
-    +==========================================================================================+
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-void Time_Update(void);
-void Delay(uint32_t nCount);
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __MAIN_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-

User/netconf.c

@@ -1,86 +1,56 @@
-/**
- ******************************************************************************
- * @file    netconf.c
- * @author  MCD Application Team
- * @version V1.1.0
- * @date    31-July-2013
- * @brief   Network connection configuration
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- *        http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
+/*!
+    \file  netconf.c
+    \brief network connection configuration
+*/
+
+/*
+    Copyright (C) 2016 GigaDevice
+
+    2016-08-15, V1.0.0, firmware for GD32F4xx
+*/
 
-/* Includes ------------------------------------------------------------------*/
 #include "lwip/mem.h"
 #include "lwip/memp.h"
-#include "lwip/tcp.h"
-#include "lwip/priv/tcp_priv.h"
-#include "lwip/udp.h"
-#include "netif/etharp.h"
 #include "lwip/dhcp.h"
 #include "ethernetif.h"
-#include "main_lwip.h"
+#include "main.h"
 #include "netconf.h"
+#include "lwip/tcpip.h"
 #include <stdio.h>
 
-//#include "param.h"		/* 需要使用存储在 EEPROM中的网络参数 */
-
-/* Private typedef -----------------------------------------------------------*/
 #define MAX_DHCP_TRIES 4
 
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-struct netif gnetif;
-uint32_t TCPTimer = 0;
-uint32_t ARPTimer = 0;
-uint32_t IPaddress = 0;
+typedef enum
+{
+  DHCP_START = 0,
+  DHCP_WAIT_ADDRESS,
+  DHCP_ADDRESS_ASSIGNED,
+  DHCP_TIMEOUT
+} dhcp_state_enum;
 
 #ifdef USE_DHCP
-uint32_t DHCPfineTimer = 0;
-uint32_t DHCPcoarseTimer = 0;
-__IO uint8_t DHCP_state;
-#endif
-extern __IO uint32_t EthStatus;
+dhcp_state_enum dhcp_state = DHCP_START;
+ip4_addr_t ip_address = {0};
+#endif /* USE_DHCP */
 
-/* Private functions ---------------------------------------------------------*/
-void LwIP_DHCP_Process_Handle(void);
+struct netif xnetif;
 
-/**
- * @brief  Initializes the lwIP stack
- * @param  None
- * @retval None
- */
-void LwIP_Init(void)
+/*!
+    \brief      initializes the LwIP stack
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void lwip_stack_init(void)
 {
-  struct ip4_addr ipaddr;
-  struct ip4_addr netmask;
-  struct ip4_addr gw;
+  ip4_addr_t ipaddr;
+  ip4_addr_t netmask;
+  ip4_addr_t gw;
 
-  /* 打印调试信息 */
-  lwip_printf("LwIP_Init()...\r\n");
-
-  /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
-  mem_init();
-
-  /* Initializes the memory pools defined by MEMP_NUM_x.*/
-  memp_init();
+  /* create tcp_ip stack thread */
+  tcpip_init(NULL, NULL);
 
+  /* IP address setting */
 #ifdef USE_DHCP
   ipaddr.addr = 0;
   netmask.addr = 0;
@@ -89,232 +59,94 @@ void LwIP_Init(void)
   IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
   IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
   IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
-#endif
+
+#endif /* USE_DHCP */
 
   /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
-  struct ip_addr *netmask, struct ip_addr *gw,
-  void *state, err_t (* init)(struct netif *netif),
-  err_t (* input)(struct pbuf *p, struct netif *netif))
+            struct ip_addr *netmask, struct ip_addr *gw,
+            void *state, err_t (* init)(struct netif *netif),
+            err_t (* input)(struct pbuf *p, struct netif *netif))
 
-  Adds your network interface to the netif_list. Allocate a struct
+   Adds your network interface to the netif_list. Allocate a struct
   netif and pass a pointer to this structure as the first argument.
   Give pointers to cleared ip_addr structures when using DHCP,
   or fill them with sane numbers otherwise. The state pointer may be NULL.
 
   The init function pointer must point to a initialization function for
-  your ethernet netif interface. The following code illustrates it's use.*/
-  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &ethernet_input);
-
-  /* 打印调试信息 */
-  lwip_printf("LwIP Registers the default network interface....\r\n");
-
-  /*  Registers the default network interface.*/
-  netif_set_default(&gnetif);
-
-  // if (EthStatus == (ETH_INIT_FLAG | ETH_LINK_FLAG))
-  if (EthStatus == (ETH_INIT_FLAG)) /* armfly 修改 */
-  {
-    /* Set Ethernet link flag */
-    gnetif.flags |= NETIF_FLAG_LINK_UP;
-
-    /* When the netif is fully configured this function must be called */
-    netif_set_up(&gnetif);
-
-#ifdef USE_DHCP
-    DHCP_state = DHCP_START;
-#else
-    lwip_printf("LwIP Static IP address = %d.%d.%d.%d\r\n", IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
-#endif /* USE_DHCP */
-  }
-  else
-  {
-    /* When the netif link is down this function must be called */
-    netif_set_down(&gnetif);
-
-#ifdef USE_DHCP
-    DHCP_state = DHCP_LINK_DOWN;
-#endif /* USE_DHCP */
-
-    /* 打印调试信息 */
-    lwip_printf("LwIP Network Cable is not connected \r\n");
-  }
-
-  /* Set the link callback function, this function is called on change of link status*/
-  netif_set_link_callback(&gnetif, ETH_link_callback);
-}
-
-/* 重设网络参数 */
-void LwIP_ChangeNetParam(void)
-{
-  ETH_link_callback(&gnetif);
-}
-
-/**
- * @brief  Called when a frame is received
- * @param  None
- * @retval None
- */
-void LwIP_Pkt_Handle(void)
-{
-  /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
-  ethernetif_input(&gnetif);
-}
-
-/**
- * @brief  LwIP periodic tasks
- * @param  localtime the current LocalTime value
- * @retval None
- */
-void LwIP_Periodic_Handle(__IO uint32_t localtime)
-{
-#if LWIP_TCP
-  /* TCP periodic process every 250 ms */
-  if (localtime - TCPTimer >= TCP_TMR_INTERVAL)
-  {
-    TCPTimer = localtime;
-    tcp_tmr();
-  }
-#endif
-
-  /* ARP periodic process every 5s */
-  if ((localtime - ARPTimer) >= ARP_TMR_INTERVAL)
-  {
-    ARPTimer = localtime;
-    etharp_tmr();
-  }
-
-#ifdef USE_DHCP
-  /* Fine DHCP periodic process every 500ms */
-  if (localtime - DHCPfineTimer >= DHCP_FINE_TIMER_MSECS)
-  {
-    DHCPfineTimer = localtime;
-    dhcp_fine_tmr();
-    if ((DHCP_state != DHCP_ADDRESS_ASSIGNED) &&
-        (DHCP_state != DHCP_TIMEOUT) &&
-        (DHCP_state != DHCP_LINK_DOWN))
-    {
-      /* toggle LED1 to indicate DHCP on-going process */
-      STM_EVAL_LEDToggle(LED1);
+  your ethernet netif interface. The following code illustrates it's use. */
+  netif_add(&xnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
 
-      /* process DHCP state machine */
-      LwIP_DHCP_Process_Handle();
-    }
-  }
-
-  /* DHCP Coarse periodic process every 60s */
-  if (localtime - DHCPcoarseTimer >= DHCP_COARSE_TIMER_MSECS)
-  {
-    DHCPcoarseTimer = localtime;
-    dhcp_coarse_tmr();
-  }
+  /* registers the default network interface */
+  netif_set_default(&xnetif);
 
-#endif
+  /* when the netif is fully configured this function must be called */
+  netif_set_up(&xnetif);
 }
 
 #ifdef USE_DHCP
-/**
- * @brief  LwIP_DHCP_Process_Handle
- * @param  None
- * @retval None
- */
-void LwIP_DHCP_Process_Handle()
+/*!
+    \brief      lwip_dhcp_process_handle
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void dhcp_task(void *pvParameters)
 {
-  struct ip_addr ipaddr;
-  struct ip_addr netmask;
-  struct ip_addr gw;
-  uint8_t iptab[4] = {0};
-  uint8_t iptxt[20];
+  ip4_addr_t ipaddr;
+  ip4_addr_t netmask;
+  ip4_addr_t gw;
+  struct dhcp *dhcp_client;
 
-  switch (DHCP_state)
-  {
-  case DHCP_START:
-  {
-    DHCP_state = DHCP_WAIT_ADDRESS;
-    dhcp_start(&gnetif);
-    /* IP address should be set to 0
-       every time we want to assign a new DHCP address */
-    IPaddress = 0;
-#ifdef USE_LCD
-    LCD_DisplayStringLine(Line4, (uint8_t *)"     Looking for    ");
-    LCD_DisplayStringLine(Line5, (uint8_t *)"     DHCP server    ");
-    LCD_DisplayStringLine(Line6, (uint8_t *)"     please wait... ");
-#endif
-  }
-  break;
+  dhcp_client = netif_dhcp_data(&xnetif);
 
-  case DHCP_WAIT_ADDRESS:
+  for (;;)
   {
-    /* Read the new IP address */
-    IPaddress = gnetif.ip_addr.addr;
-
-    if (IPaddress != 0)
+    switch (dhcp_state)
     {
-      DHCP_state = DHCP_ADDRESS_ASSIGNED;
+    case DHCP_START:
+      dhcp_start(&xnetif);
+      ip_address.addr = 0;
+      dhcp_state = DHCP_WAIT_ADDRESS;
+      break;
 
-      /* Stop DHCP */
-      dhcp_stop(&gnetif);
+    case DHCP_WAIT_ADDRESS:
+      /* read the new IP address */
+      ip_address.addr = xnetif.ip_addr.u_addr.ip4.addr;
 
-#ifdef USE_LCD
-      iptab[0] = (uint8_t)(IPaddress >> 24);
-      iptab[1] = (uint8_t)(IPaddress >> 16);
-      iptab[2] = (uint8_t)(IPaddress >> 8);
-      iptab[3] = (uint8_t)(IPaddress);
-
-      sprintf((char *)iptxt, " %d.%d.%d.%d", iptab[3], iptab[2], iptab[1], iptab[0]);
-
-      LCD_ClearLine(Line4);
-      LCD_ClearLine(Line5);
-      LCD_ClearLine(Line6);
-
-      /* Display the IP address */
-      LCD_DisplayStringLine(Line7, (uint8_t *)"IP address assigned ");
-      LCD_DisplayStringLine(Line8, (uint8_t *)"  by a DHCP server  ");
-      LCD_DisplayStringLine(Line9, iptxt);
-#endif
-      STM_EVAL_LEDOn(LED1);
-    }
-    else
-    {
-      /* DHCP timeout */
-      if (gnetif.dhcp->tries > MAX_DHCP_TRIES)
+      if (ip_address.addr != 0)
       {
-        DHCP_state = DHCP_TIMEOUT;
-
-        /* Stop DHCP */
-        dhcp_stop(&gnetif);
-
-        /* Static address used */
-        IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
-        IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
-        IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
-        netif_set_addr(&gnetif, &ipaddr, &netmask, &gw);
-
-#ifdef USE_LCD
-        LCD_DisplayStringLine(Line7, (uint8_t *)"    DHCP timeout    ");
-
-        iptab[0] = IP_ADDR3;
-        iptab[1] = IP_ADDR2;
-        iptab[2] = IP_ADDR1;
-        iptab[3] = IP_ADDR0;
+        dhcp_state = DHCP_ADDRESS_ASSIGNED;
+        /* stop DHCP */
+        dhcp_stop(&xnetif);
 
-        sprintf((char *)iptxt, "  %d.%d.%d.%d", iptab[3], iptab[2], iptab[1], iptab[0]);
-
-        LCD_ClearLine(Line4);
-        LCD_ClearLine(Line5);
-        LCD_ClearLine(Line6);
-
-        LCD_DisplayStringLine(Line8, (uint8_t *)"  Static IP address   ");
-        LCD_DisplayStringLine(Line9, iptxt);
-#endif
-        STM_EVAL_LEDOn(LED1);
+        printf("\r\nDHCP -- eval board ip address: %d.%d.%d.%d \r\n", ip4_addr1_16(&ip_address),
+               ip4_addr2_16(&ip_address), ip4_addr3_16(&ip_address), ip4_addr4_16(&ip_address));
+        OSTaskSuspend(OS_PRIO_SELF);
+      }
+      else
+      {
+        /* DHCP timeout */
+        if (dhcp_client->tries > MAX_DHCP_TRIES)
+        {
+          dhcp_state = DHCP_TIMEOUT;
+          /* stop DHCP */
+          dhcp_stop(&xnetif);
+
+          /* static address used */
+          IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
+          IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
+          IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
+          netif_set_addr(&xnetif, &ipaddr, &netmask, &gw);
+          OSTaskSuspend(OS_PRIO_SELF);
+        }
       }
+      break;
+
+    default:
+      break;
     }
-  }
-  break;
-  default:
-    break;
+    /* wait 500 ms */
+    OSTimeDlyHMSM(0, 0, 0, 500);
   }
 }
-#endif
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+#endif /* USE_DHCP */

User/netconf.h

@@ -1,63 +1,93 @@
-/**
-  ******************************************************************************
-  * @file    netconf.h
-  * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    31-July-2013 
-  * @brief   This file contains all the functions prototypes for the netconf.c 
-  *          file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __NETCONF_H
-#define __NETCONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
+/*!
+    \file    netconf.h
+    \brief   the header file of netconf
+
+    \version 2016-08-15, V1.0.0, firmware for GD32F4xx
+    \version 2018-12-12, V2.0.0, firmware for GD32F4xx
+    \version 2020-09-30, V2.1.0, firmware for GD32F4xx
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+OF SUCH DAMAGE.
+*/
+
+#ifndef NETCONF_H
+#define NETCONF_H
+#include "main.h"
+
+//#define USE_DHCP       1 /* enable DHCP, if disabled static address is used */
+
+#define USE_ENET_INTERRUPT
+//#define TIMEOUT_CHECK_USE_LWIP
+/* MAC address: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0 2
+#define MAC_ADDR1 0xA
+#define MAC_ADDR2 0xF
+#define MAC_ADDR3 0xE
+#define MAC_ADDR4 0xD
+#define MAC_ADDR5 6
+
+/* static IP address: IP_ADDR0.IP_ADDR1.IP_ADDR2.IP_ADDR3 */
+#define IP_ADDR0 192
+#define IP_ADDR1 168
+#define IP_ADDR2 1
+#define IP_ADDR3 150
+
+/* remote IP address: IP_S_ADDR0.IP_S_ADDR1.IP_S_ADDR2.IP_S_ADDR3 */
+#define IP_S_ADDR0 192
+#define IP_S_ADDR1 168
+#define IP_S_ADDR2 1
+#define IP_S_ADDR3 10
+
+/* net mask */
+#define NETMASK_ADDR0 255
+#define NETMASK_ADDR1 255
+#define NETMASK_ADDR2 255
+#define NETMASK_ADDR3 0
+
+/* gateway address */
+#define GW_ADDR0 192
+#define GW_ADDR1 168
+#define GW_ADDR2 1
+#define GW_ADDR3 1
+
+/* MII and RMII mode selection */
+#define RMII_MODE // user have to provide the 50 MHz clock by soldering a 50 MHz oscillator
+//#define MII_MODE
 
-#define lwip_printf	printf
-//#define lwip_printf(...)
-	 
-/* Includes ------------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-#define DHCP_START                 1
-#define DHCP_WAIT_ADDRESS          2
-#define DHCP_ADDRESS_ASSIGNED      3
-#define DHCP_TIMEOUT               4
-#define DHCP_LINK_DOWN             5
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-void LwIP_Init(void);
-void LwIP_Pkt_Handle(void);
-void LwIP_Periodic_Handle(__IO uint32_t localtime);
-void LwIP_ChangeNetParam(void);
-	 
-#ifdef __cplusplus
-}
+/* clock the PHY from external 25MHz crystal (only for MII mode) */
+#ifdef MII_MODE
+#define PHY_CLOCK_MCO
 #endif
 
-#endif /* __NETCONF_H */
+#ifdef USE_DHCP
+/* dhcp_task */
+void dhcp_task(void *pvParameters);
+#endif /* USE_DHCP */
 
+void lwip_stack_init(void);
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+#endif /* NETCONF_H */

User/stm32f4x7_eth_bsp.c

@@ -1,598 +0,0 @@
-/**
- ******************************************************************************
- * @file    stm32f4x7_eth_bsp.c
- * @author  MCD Application Team
- * @version V1.1.0
- * @date    31-July-2013
- * @brief   STM32F4x7 Ethernet hardware configuration.
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- *        http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "lwip/opt.h"
-#include "stm32f4x7_eth.h"
-#include "stm32f4x7_eth_bsp.h"
-#include "main_lwip.h"
-#include "netif.h"
-#include "netconf.h"
-#include "lwip/dhcp.h"
-
-//#include "param.h"		/* 需要使用存储在 EEPROM中的网络参数 */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-ETH_InitTypeDef ETH_InitStructure;
-__IO uint32_t EthStatus = 0;
-extern struct netif gnetif;
-#ifdef USE_DHCP
-extern __IO uint8_t DHCP_state;
-#endif /* LWIP_DHCP */
-
-/* Private function prototypes -----------------------------------------------*/
-// static void ETH_GPIO_Config(void);
-static void ETH_GPIO_Config_RMII(void);
-static void ETH_MACDMA_Config(void);
-
-extern void bsp_DelayMS(uint32_t n);
-
-/* Private functions ---------------------------------------------------------*/
-
-/**
- * @brief  Inserts a delay time.
- * @param  nCount: number of 10ms periods to wait for.
- * @retval None
- */
-void ETH_Delay10ms(uint32_t nCount)
-{
-#if 1
-  bsp_DelayMS(nCount * 10);
-#else
-  bsp_GetRunTime() / 10
-
-      /* Capture the current local time */
-      timingdelay = bsp_GetRunTime() / 10 + nCount;
-
-  /* wait until the desired delay finish */
-  while (timingdelay > LocalTime)
-  {
-    ;
-  }
-#endif
-}
-
-/**
- * @brief  ETH_BSP_Config
- * @param  None
- * @retval None
- */
-void ETH_BSP_Config(void)
-{
-#if 0 /* armfly : 我们在 bsp_timer.c 文件配置 systick 中断  */
-  RCC_ClocksTypeDef RCC_Clocks;
-
-    /***************************************************************************
-    NOTE:
-         When using Systick to manage the delay in Ethernet driver, the Systick
-         must be configured before Ethernet initialization and, the interrupt
-         priority should be the highest one.
-  *****************************************************************************/
-
-  /* Configure Systick clock source as HCLK */
-  SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
-
-  /* SystTick configuration: an interrupt every 10ms */
-  RCC_GetClocksFreq(&RCC_Clocks);
-  SysTick_Config(RCC_Clocks.HCLK_Frequency / 100);
-
-  /* Set Systick interrupt priority to 0*/
-  NVIC_SetPriority (SysTick_IRQn, 0);
-#endif
-
-  /* 打印调试信息 */
-  lwip_printf("LwIP Enter ETH_BSP_Config()\r\n");
-
-  /* Configure the GPIO ports for ethernet pins */
-  // ETH_GPIO_Config();
-  ETH_GPIO_Config_RMII();
-
-  /* Configure the Ethernet MAC/DMA */
-  ETH_MACDMA_Config();
-
-  /* Read PHY status register: Get Ethernet link status */
-  if (ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR) & 1)
-  {
-    EthStatus |= ETH_LINK_FLAG;
-  }
-
-  /* Configure the PHY to generate an interrupt on change of link status */
-  Eth_Link_PHYITConfig(DP83848_PHY_ADDRESS);
-
-  /* Configure the EXTI for Ethernet link status. */
-  Eth_Link_EXTIConfig();
-}
-
-/**
- * @brief  Configures the Ethernet Interface
- * @param  None
- * @retval None
- */
-static void ETH_MACDMA_Config(void)
-{
-  /* 打印调试信息 */
-  lwip_printf("LwIP Enter ETH_MACDMA_Config()\r\n");
-
-  /* Enable ETHERNET clock  */
-  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx |
-                             RCC_AHB1Periph_ETH_MAC_Rx,
-                         ENABLE);
-
-  /* Reset ETHERNET on AHB Bus */
-  ETH_DeInit();
-
-  /* Software reset */
-  ETH_SoftwareReset();
-
-  /* Wait for software reset */
-  while (ETH_GetSoftwareResetStatus() == SET)
-    ;
-
-  /* ETHERNET Configuration --------------------------------------------------*/
-  /* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
-  ETH_StructInit(&ETH_InitStructure);
-
-  /* Fill ETH_InitStructure parametrs */
-  /*------------------------   MAC   -----------------------------------*/
-  ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
-  //  ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable;
-  //  ETH_InitStructure.ETH_Speed = ETH_Speed_10M;
-  //  ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
-
-  ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
-  ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
-  ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
-  ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
-  ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
-  ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
-  ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
-  ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
-#ifdef CHECKSUM_BY_HARDWARE
-  ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
-#endif
-
-  /*------------------------   DMA   -----------------------------------------*/
-  /* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
-  the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
-  if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
-  ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
-  ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
-  ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
-
-  ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
-  ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
-  ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
-  ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
-  ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
-  ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
-  ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
-  ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
-
-  /* 打印调试信息 */
-  lwip_printf("LwIP Enter ETH_Init()\r\n");
-
-  /* Configure Ethernet */
-  EthStatus = ETH_Init(&ETH_InitStructure, DP83848_PHY_ADDRESS);
-}
-
-/**
- * @brief  Configures the different GPIO ports.
- * @param  None
- * @retval None
- */
-static void ETH_GPIO_Config_RMII(void)
-{
-  GPIO_InitTypeDef GPIO_InitStructure;
-
-  /* 安富莱STM32-F4开发板网卡接口采用RMII
-    PA1/ETH_RMII_RX_CLK
-    PA2/ETH_MDIO
-    PA7/RMII_CRS_DV
-    PC1/ETH_MDC
-    PC4/ETH_RMII_RX_D0
-    PC5/ETH_RMII_RX_D1
-    PG11/ETH_RMII_TX_EN
-    PG13/FSMC_A24/ETH_RMII_TXD0
-    PG14/ETH_RMII_TXD1
-
-    PH6/MII_INT
-  */
-  /* Enable GPIOs clocks */
-  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOG |
-                             RCC_AHB1Periph_GPIOH,
-                         ENABLE);
-
-  /* Enable SYSCFG clock */
-  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
-
-  SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
-
-  /* Configure PA1, PA2 and PA7 */
-  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
-  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
-  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
-  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_7;
-  GPIO_Init(GPIOA, &GPIO_InitStructure);
-
-  GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
-
-  /* Configure PC1, PC4 and PC5 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5;
-  GPIO_Init(GPIOC, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
-
-  /* Configure PG11, PG14 and PG13 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_13 | GPIO_Pin_14;
-  GPIO_Init(GPIOG, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOG, GPIO_PinSource11, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOG, GPIO_PinSource13, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOG, GPIO_PinSource14, GPIO_AF_ETH);
-}
-
-/**
- * @brief  Configures the different GPIO ports.
- * @param  None
- * @retval None
- */
-void ETH_GPIO_Config_MII(void) /* armfly : 更名备份 */
-{
-  GPIO_InitTypeDef GPIO_InitStructure;
-
-  /* Enable GPIOs clocks */
-  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
-                             RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOI |
-                             RCC_AHB1Periph_GPIOG | RCC_AHB1Periph_GPIOH |
-                             RCC_AHB1Periph_GPIOF,
-                         ENABLE);
-
-  /* Enable SYSCFG clock */
-  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
-
-  /* Configure MCO (PA8) */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
-  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
-  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
-  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
-  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
-  GPIO_Init(GPIOA, &GPIO_InitStructure);
-
-  /* MII/RMII Media interface selection --------------------------------------*/
-#ifdef MII_MODE /* Mode MII with STM324xx-EVAL  */
-#ifdef PHY_CLOCK_MCO
-
-  /* Output HSE clock (25MHz) on MCO pin (PA8) to clock the PHY */
-  RCC_MCO1Config(RCC_MCO1Source_HSE, RCC_MCO1Div_1);
-#endif /* PHY_CLOCK_MCO */
-
-  SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII);
-#elif defined RMII_MODE /* Mode RMII with STM324xx-EVAL */
-
-  SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
-#endif
-
-  /* Ethernet pins configuration ************************************************/
-  /*
-       ETH_MDIO -------------------------> PA2
-       ETH_MDC --------------------------> PC1
-       ETH_PPS_OUT ----------------------> PB5
-       ETH_MII_CRS ----------------------> PH2
-       ETH_MII_COL ----------------------> PH3
-       ETH_MII_RX_ER --------------------> PI10
-       ETH_MII_RXD2 ---------------------> PH6
-       ETH_MII_RXD3 ---------------------> PH7
-       ETH_MII_TX_CLK -------------------> PC3
-       ETH_MII_TXD2 ---------------------> PC2
-       ETH_MII_TXD3 ---------------------> PB8
-       ETH_MII_RX_CLK/ETH_RMII_REF_CLK---> PA1
-       ETH_MII_RX_DV/ETH_RMII_CRS_DV ----> PA7
-       ETH_MII_RXD0/ETH_RMII_RXD0 -------> PC4
-       ETH_MII_RXD1/ETH_RMII_RXD1 -------> PC5
-       ETH_MII_TX_EN/ETH_RMII_TX_EN -----> PG11
-       ETH_MII_TXD0/ETH_RMII_TXD0 -------> PG13
-       ETH_MII_TXD1/ETH_RMII_TXD1 -------> PG14
-                                                 */
-
-  /* Configure PA1, PA2 and PA7 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_7;
-  GPIO_Init(GPIOA, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
-
-  /* Configure PB5 and PB8 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_8;
-  GPIO_Init(GPIOB, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOB, GPIO_PinSource8, GPIO_AF_ETH);
-
-  /* Configure PC1, PC2, PC3, PC4 and PC5 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
-  GPIO_Init(GPIOC, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource2, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource3, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
-
-  /* Configure PG11, PG14 and PG13 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_13 | GPIO_Pin_14;
-  GPIO_Init(GPIOG, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOG, GPIO_PinSource11, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOG, GPIO_PinSource13, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOG, GPIO_PinSource14, GPIO_AF_ETH);
-
-  /* Configure PH2, PH3, PH6, PH7 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_6 | GPIO_Pin_7;
-  GPIO_Init(GPIOH, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOH, GPIO_PinSource2, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOH, GPIO_PinSource3, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOH, GPIO_PinSource6, GPIO_AF_ETH);
-  GPIO_PinAFConfig(GPIOH, GPIO_PinSource7, GPIO_AF_ETH);
-
-  /* Configure PI10 */
-  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
-  GPIO_Init(GPIOI, &GPIO_InitStructure);
-  GPIO_PinAFConfig(GPIOI, GPIO_PinSource10, GPIO_AF_ETH);
-}
-
-/**
- * @brief  Configure the PHY to generate an interrupt on change of link status.
- * @param PHYAddress: external PHY address
- * @retval None
- */
-uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress)
-{
-  uint16_t tmpreg = 0;
-
-  /* Read MICR register */
-  tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MICR);
-
-  /* Enable output interrupt events to signal via the INT pin */
-  tmpreg |= (uint16_t)(PHY_MICR_INT_EN | PHY_MICR_INT_OE);
-  if (!(ETH_WritePHYRegister(PHYAddress, PHY_MICR, tmpreg)))
-  {
-    /* Return ERROR in case of write timeout */
-    return ETH_ERROR;
-  }
-
-  /* Read MISR register */
-  tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MISR);
-
-  /* Enable Interrupt on change of link status */
-  tmpreg |= (uint16_t)PHY_MISR_LINK_INT_EN;
-  if (!(ETH_WritePHYRegister(PHYAddress, PHY_MISR, tmpreg)))
-  {
-    /* Return ERROR in case of write timeout */
-    return ETH_ERROR;
-  }
-  /* Return SUCCESS */
-  return ETH_SUCCESS;
-}
-
-/**
- * @brief  EXTI configuration for Ethernet link status.
- * @param PHYAddress: external PHY address
- * @retval None
- */
-void Eth_Link_EXTIConfig(void)
-{
-  GPIO_InitTypeDef GPIO_InitStructure;
-  EXTI_InitTypeDef EXTI_InitStructure;
-  NVIC_InitTypeDef NVIC_InitStructure;
-
-  /* Enable the INT (PB14) Clock */
-  RCC_AHB1PeriphClockCmd(ETH_LINK_GPIO_CLK, ENABLE);
-  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
-
-  /* Configure INT pin as input */
-  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
-  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
-  GPIO_InitStructure.GPIO_Pin = ETH_LINK_PIN;
-  GPIO_Init(ETH_LINK_GPIO_PORT, &GPIO_InitStructure);
-
-  /* Connect EXTI Line to INT Pin */
-  SYSCFG_EXTILineConfig(ETH_LINK_EXTI_PORT_SOURCE, ETH_LINK_EXTI_PIN_SOURCE);
-
-  /* Configure EXTI line */
-  EXTI_InitStructure.EXTI_Line = ETH_LINK_EXTI_LINE;
-  EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
-  EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
-  EXTI_InitStructure.EXTI_LineCmd = ENABLE;
-  EXTI_Init(&EXTI_InitStructure);
-
-  /* Enable and set the EXTI interrupt to priority 1*/
-  NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn;
-  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-  NVIC_Init(&NVIC_InitStructure);
-}
-
-/**
- * @brief  This function handles Ethernet link status.
- * @param  None
- * @retval None
- */
-void Eth_Link_ITHandler(uint16_t PHYAddress)
-{
-  /* Check whether the link interrupt has occurred or not */
-  if (((ETH_ReadPHYRegister(PHYAddress, PHY_MISR)) & PHY_LINK_STATUS) != 0)
-  {
-    if ((ETH_ReadPHYRegister(PHYAddress, PHY_SR) & 1))
-    {
-      netif_set_link_up(&gnetif);
-    }
-    else
-    {
-      netif_set_link_down(&gnetif);
-    }
-  }
-}
-
-/**
- * @brief  Link callback function, this function is called on change of link status.
- * @param  The network interface
- * @retval None
- */
-void ETH_link_callback(struct netif *netif)
-{
-  __IO uint32_t timeout = 0;
-  uint32_t tmpreg;
-  uint16_t RegValue;
-  struct ip4_addr ipaddr;
-  struct ip4_addr netmask;
-  struct ip4_addr gw;
-
-  if (netif_is_link_up(netif))
-  {
-    /* Restart the auto-negotiation */
-    if (ETH_InitStructure.ETH_AutoNegotiation != ETH_AutoNegotiation_Disable)
-    {
-      /* Reset Timeout counter */
-      timeout = 0;
-
-      /* Enable auto-negotiation */
-      ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_BCR, PHY_AutoNegotiation);
-
-      /* Wait until the auto-negotiation will be completed */
-      do
-      {
-        timeout++;
-      } while (!(ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BSR) & PHY_AutoNego_Complete) && (timeout < (uint32_t)PHY_READ_TO));
-
-      /* Reset Timeout counter */
-      timeout = 0;
-
-      /* Read the result of the auto-negotiation */
-      RegValue = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR);
-
-      /* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */
-      if ((RegValue & PHY_DUPLEX_STATUS) != (uint16_t)RESET)
-      {
-        /* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */
-        ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
-      }
-      else
-      {
-        /* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */
-        ETH_InitStructure.ETH_Mode = ETH_Mode_HalfDuplex;
-      }
-      /* Configure the MAC with the speed fixed by the auto-negotiation process */
-      if (RegValue & PHY_SPEED_STATUS)
-      {
-        /* Set Ethernet speed to 10M following the auto-negotiation */
-        ETH_InitStructure.ETH_Speed = ETH_Speed_10M;
-      }
-      else
-      {
-        /* Set Ethernet speed to 100M following the auto-negotiation */
-        ETH_InitStructure.ETH_Speed = ETH_Speed_100M;
-      }
-
-      /*------------------------ ETHERNET MACCR Re-Configuration --------------------*/
-      /* Get the ETHERNET MACCR value */
-      tmpreg = ETH->MACCR;
-
-      /* Set the FES bit according to ETH_Speed value */
-      /* Set the DM bit according to ETH_Mode value */
-      tmpreg |= (uint32_t)(ETH_InitStructure.ETH_Speed | ETH_InitStructure.ETH_Mode);
-
-      /* Write to ETHERNET MACCR */
-      ETH->MACCR = (uint32_t)tmpreg;
-
-      _eth_delay_(ETH_REG_WRITE_DELAY);
-
-      tmpreg = ETH->MACCR;
-      ETH->MACCR = tmpreg;
-    }
-
-    /* Restart MAC interface */
-    ETH_Start();
-
-#ifdef USE_DHCP
-    ipaddr.addr = 0;
-    netmask.addr = 0;
-    gw.addr = 0;
-    DHCP_state = DHCP_START;
-#else
-    IP4_ADDR(&ipaddr, IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
-    IP4_ADDR(&netmask, NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3);
-    IP4_ADDR(&gw, GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3);
-#endif /* USE_DHCP */
-
-    netif_set_addr(&gnetif, &ipaddr, &netmask, &gw);
-
-    /* When the netif is fully configured this function must be called.*/
-    netif_set_up(&gnetif);
-
-    /* 打印调试信息 */
-    lwip_printf("LwIP Network Cable is now connected \r\n");
-
-#ifndef USE_DHCP
-    /* Display static IP address */
-    lwip_printf("LwIP Static IP address = %d.%d.%d.%d  \r\n", IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3);
-#endif /* USE_DHCP */
-  }
-  else
-  {
-    ETH_Stop();
-#ifdef USE_DHCP
-    DHCP_state = DHCP_LINK_DOWN;
-    dhcp_stop(netif);
-#endif /* USE_DHCP */
-
-    /*  When the netif link is down this function must be called.*/
-    netif_set_down(&gnetif);
-
-    /* 打印调试信息 */
-    lwip_printf("LwIP Network Cable is unplugged \r\n");
-  }
-}
-
-/**
- * @brief  PHY外部中断服务程序
- * @param  无
- * @retval 无
- */
-void EXTI15_10_IRQHandler(void)
-{
-  if (EXTI_GetITStatus(ETH_LINK_EXTI_LINE) != RESET)
-  {
-    Eth_Link_ITHandler(DP83848_PHY_ADDRESS);
-    /* Clear interrupt pending bit */
-    EXTI_ClearITPendingBit(ETH_LINK_EXTI_LINE);
-  }
-}
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

User/stm32f4x7_eth_bsp.h

@@ -1,73 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4x7_eth_bsp.h
-  * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    31-July-2013
-  * @brief   Header for stm32f4x7_eth_bsp.c file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software
-  * distributed under the License is distributed on an "AS IS" BASIS,
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4x7_ETH_BSP_H
-#define __STM32F4x7_ETH_BSP_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "netif.h"
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-#define DP83848_PHY_ADDRESS       ((uint16_t) 0x01)
-
-/* Specific defines for EXTI line, used to manage Ethernet link status */
-#define ETH_LINK_EXTI_LINE             EXTI_Line14
-#define ETH_LINK_EXTI_PORT_SOURCE      EXTI_PortSourceGPIOB
-#define ETH_LINK_EXTI_PIN_SOURCE       EXTI_PinSource14
-#define ETH_LINK_EXTI_IRQn             EXTI15_10_IRQn
-/* PB14 */
-#define ETH_LINK_PIN                   GPIO_Pin_14
-#define ETH_LINK_GPIO_PORT             GPIOB
-#define ETH_LINK_GPIO_CLK              RCC_AHB1Periph_GPIOB
-
-/* Ethernet Flags for EthStatus variable */
-#define ETH_INIT_FLAG           0x01 /* Ethernet Init Flag */
-#define ETH_LINK_FLAG           0x10 /* Ethernet Link Flag */
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-void  ETH_BSP_Config(void);
-uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress);
-void Eth_Link_EXTIConfig(void);
-void Eth_Link_ITHandler(uint16_t PHYAddress);
-void ETH_link_callback(struct netif *netif);
-
-extern __IO uint32_t  EthStatus;	/* Ìṩ¸øÖ÷³ÌÐòʹÓà */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4x7_ETH_BSP_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

User/stm32f4x7_eth_conf.h

@@ -1,36 +1,37 @@
 /**
-  ******************************************************************************
-  * @file    stm32f4x7_eth_conf.h
-  * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    31-July-2013
-  * @brief   Configuration file for the STM32F4x7 Ethernet driver.  
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
+ ******************************************************************************
+ * @file    stm32f4x7_eth_conf.h
+ * @author  MCD Application Team
+ * @version V1.1.0
+ * @date    31-July-2013
+ * @brief   Configuration file for the STM32F4x7 Ethernet driver.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ *        http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4x7_ETH_CONF_H
 #define __STM32F4x7_ETH_CONF_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C"
+{
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -42,46 +43,43 @@
 /* Uncomment the line below when using time stamping and/or IPv4 checksum offload */
 #define USE_ENHANCED_DMA_DESCRIPTORS
 
-/* Uncomment the line below if you want to use user defined Delay function
-   (for precise timing), otherwise default _eth_delay_ function defined within
-   the Ethernet driver is used (less precise timing) */
-#define USE_Delay
+  /* Uncomment the line below if you want to use user defined Delay function
+     (for precise timing), otherwise default _eth_delay_ function defined within
+     the Ethernet driver is used (less precise timing) */
 
 #ifdef USE_Delay
-//  #include "main.h"              /* Header file where the Delay function prototype is exported */
-  #define _eth_delay_    ETH_Delay10ms   /* User can provide more timing precise _eth_delay_ function 
-                                   in this example Systick is configured with an interrupt every 10 ms*/
-  extern void ETH_Delay10ms(uint32_t nCount);	 
+  //  #include "main.h"              /* Header file where the Delay function prototype is exported */
+#define _eth_delay_ ETH_Delay10ms /* User can provide more timing precise _eth_delay_ function \
+                            in this example Systick is configured with an interrupt every 10 ms*/
+  extern void ETH_Delay10ms(uint32_t nCount);
 #else
-  #define _eth_delay_    ETH_Delay /* Default _eth_delay_ function with less precise timing */
+#define _eth_delay_ ETH_Delay /* Default _eth_delay_ function with less precise timing */
 #endif
 
-
 /*This define allow to customize configuration of the Ethernet driver buffers */
 #define CUSTOM_DRIVER_BUFFERS_CONFIG
 
-#ifdef  CUSTOM_DRIVER_BUFFERS_CONFIG
-/* Redefinition of the Ethernet driver buffers size and count */
- #define ETH_RX_BUF_SIZE    ETH_MAX_PACKET_SIZE  /* buffer size for receive */
- #define ETH_TX_BUF_SIZE    ETH_MAX_PACKET_SIZE  /* buffer size for transmit */
- #define ETH_RXBUFNB        4                    /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
- #define ETH_TXBUFNB        4                    /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
+#ifdef CUSTOM_DRIVER_BUFFERS_CONFIG
+  /* Redefinition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
+#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
+#define ETH_RXBUFNB 4                       /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
+#define ETH_TXBUFNB 4                       /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
 #endif
 
-
 /* PHY configuration section **************************************************/
 #ifdef USE_Delay
-/* PHY Reset delay */ 
-#define PHY_RESET_DELAY    ((uint32_t)0x000000FF)
+/* PHY Reset delay */
+#define PHY_RESET_DELAY ((uint32_t)0x000000FF)
 /* PHY Configuration delay */
-#define PHY_CONFIG_DELAY   ((uint32_t)0x00000FFF)
+#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
 /* Delay when writing to Ethernet registers*/
 #define ETH_REG_WRITE_DELAY ((uint32_t)0x00000001)
 #else
-/* PHY Reset delay */ 
-#define PHY_RESET_DELAY    ((uint32_t)0x000FFFFF)
-/* PHY Configuration delay */ 
-#define PHY_CONFIG_DELAY   ((uint32_t)0x00FFFFFF)
+/* PHY Reset delay */
+#define PHY_RESET_DELAY ((uint32_t)0x000FFFFF)
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY ((uint32_t)0x00FFFFFF)
 /* Delay when writing to Ethernet registers*/
 #define ETH_REG_WRITE_DELAY ((uint32_t)0x0000FFFF)
 #endif
@@ -89,27 +87,27 @@
 /*******************  PHY Extended Registers section : ************************/
 
 /* These values are relatives to DP83848 PHY and change from PHY to another,
-   so the user have to update this value depending on the used external PHY */   
+   so the user have to update this value depending on the used external PHY */
 
 /* The DP83848 PHY status register  */
-#define PHY_SR                 ((uint16_t)0x10) /* PHY status register Offset */
-#define PHY_SPEED_STATUS       ((uint16_t)0x0002) /* PHY Speed mask */
-#define PHY_DUPLEX_STATUS      ((uint16_t)0x0004) /* PHY Duplex mask */
+#define PHY_SR ((uint16_t)0x10)              /* PHY status register Offset */
+#define PHY_SPEED_STATUS ((uint16_t)0x0002)  /* PHY Speed mask */
+#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /* PHY Duplex mask */
 
 /* The DP83848 PHY: MII Interrupt Control Register  */
-#define PHY_MICR               ((uint16_t)0x11) /* MII Interrupt Control Register */
-#define PHY_MICR_INT_EN        ((uint16_t)0x0002) /* PHY Enable interrupts */
-#define PHY_MICR_INT_OE        ((uint16_t)0x0001) /* PHY Enable output interrupt events */
+#define PHY_MICR ((uint16_t)0x11)          /* MII Interrupt Control Register */
+#define PHY_MICR_INT_EN ((uint16_t)0x0002) /* PHY Enable interrupts */
+#define PHY_MICR_INT_OE ((uint16_t)0x0001) /* PHY Enable output interrupt events */
 
 /* The DP83848 PHY: MII Interrupt Status and Misc. Control Register */
-#define PHY_MISR               ((uint16_t)0x12) /* MII Interrupt Status and Misc. Control Register */
-#define PHY_MISR_LINK_INT_EN   ((uint16_t)0x0020) /* Enable Interrupt on change of link status */
-#define PHY_LINK_STATUS        ((uint16_t)0x2000) /* PHY link status interrupt mask */
+#define PHY_MISR ((uint16_t)0x12)               /* MII Interrupt Status and Misc. Control Register */
+#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /* Enable Interrupt on change of link status */
+#define PHY_LINK_STATUS ((uint16_t)0x2000)      /* PHY link status interrupt mask */
 
-   /* Note : Common PHY registers are defined in stm32f4x7_eth.h file */
+  /* Note : Common PHY registers are defined in stm32f4x7_eth.h file */
 
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
+  /* Exported macro ------------------------------------------------------------*/
+  /* Exported functions ------------------------------------------------------- */
 
 #ifdef __cplusplus
 }
@@ -117,5 +115,4 @@
 
 #endif /* __STM32F4x7_ETH_CONF_H */
 
-
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

User/stm32f4xx_it.c

@@ -28,8 +28,14 @@
  */
 
 /* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx.h"
 #include "stm32f4xx_it.h"
+#include "includes.h"
+#include "netconf.h"
+#include "stm32f4x7_eth.h"
 
+extern OS_EVENT *p_semaphore;
+extern OS_EVENT *g_enet_rx_sem;
 /** @addtogroup Template_Project
  * @{
  */
@@ -163,4 +169,39 @@ void DebugMon_Handler(void)
  * @}
  */
 
+#ifdef USE_ENET_INTERRUPT
+/*!
+    \brief      this function handles ethernet interrupt request
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void ETH_IRQHandler(void)
+{
+    //    uint32_t reval;
+    //    if(SET == enet_interrupt_flag_get(ENET_DMA_INT_FLAG_RS))
+    //    {
+    //        OSSemPost(g_rx_semaphore);
+    //    }
+    //    /* clear the enet DMA Rx interrupt pending bits */
+    //    enet_interrupt_flag_clear(ENET_DMA_INT_FLAG_RS_CLR);
+    //    enet_interrupt_flag_clear(ENET_DMA_INT_FLAG_NI_CLR);
+    OSIntEnter();
+
+    /* frame received */
+    if (SET == ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R))
+    {
+
+        /* clear the enet DMA Rx interrupt pending bits */
+        ETH_DMAClearFlag(ETH_DMA_FLAG_R);
+        ETH_DMAClearFlag(ETH_DMA_FLAG_T);
+
+        /* give the semaphore to wakeup LwIP task */
+        OSSemPost(g_enet_rx_sem);
+    }
+
+    OSIntExit();
+}
+#endif /* USE_ENET_INTERRUPT */
+
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

platformio.ini

@@ -14,7 +14,13 @@ monitor_speed = 115200
 
 build_flags = 
   -IUser
-  -IUser/bsp/led
+  ; -IUser/bsp
+  -IUser/bsp/can
+  -IUser/bsp/interface
+  -IUser/app
+  -IUser/app/queue
+  -IUser/app/led
+  -IUser/app/dm9161
   -IUser/UCOS-CONFIG
   -ILibraries/CMSIS/Include
   -ILibraries/CMSIS/Device/ST/STM32F4xx/Include
@@ -26,18 +32,14 @@ build_flags =
   -IMiddleWare/uCOS_II/uCOS-BSP
   -IMiddleWare/uCOS_II/uCOS-II/Source
   -IMiddleWare/uCOS_II/uCOS-II/Ports/ARM-Cortex-M4/Generic/GNU
-  -IMiddleWare/lwip-2.0.2
-  -IMiddleWare/lwip-2.0.2/src
   -IMiddleWare/lwip-2.0.2/src/include
   -IMiddleWare/lwip-2.0.2/src/include/lwip
-  -IMiddleWare/lwip-2.0.2/src/include/lwip/apps
-  -IMiddleWare/lwip-2.0.2/src/include/lwip/priv
-  -IMiddleWare/lwip-2.0.2/src/include/lwip/prot
   -IMiddleWare/lwip-2.0.2/src/include/netif
   -IMiddleWare/lwip-2.0.2/src/include/posix
-  -IMiddleWare/lwip-2.0.2/port/STM32F4x7
-  -IMiddleWare/lwip-2.0.2/port/STM32F4x7/arch
-  -IMiddleWare/lwip-2.0.2/port/STM32F4x7/UCOS-II
+  -IMiddleWare/lwip-2.0.2/src/include/posix/sys
+  -IMiddleWare/lwip-2.0.2/port/STM32F4xx
+  -IMiddleWare/lwip-2.0.2/port/STM32F4xx/arch
+  -IMiddleWare/lwip-2.0.2/port/STM32F4xx/UCOS_II
   ; 定义全局宏
   -D STM32F40_41xxx
   -D USE_STDPERIPH_DRIVER
@@ -46,13 +48,24 @@ build_unflags =
   -DSTM32F407xx
   -DSTM32F4
 
-src_filter = +<User/> +<Project/GCC/> +<Libraries/STM32F4xx_StdPeriph_Driver/src/>
+src_filter = +<User/> 
+            +<Project/GCC/> 
+            -<User/app/dm9000>
+            +<Libraries/STM32F4xx_StdPeriph_Driver/src/>
             -<Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_qspi.c>
             -<Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fmpi2c.c>
             -<Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fmc.c>
             -<Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cec.c>
             -<Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_spdifrx.c>
             +<Libraries/STM32F4x7_ETH_Driver/src/>
+            +<MiddleWare/lwip-2.0.2/src/api>
+            +<MiddleWare/lwip-2.0.2/src/core>
+            +<MiddleWare/lwip-2.0.2/src/core/ipv4>
+            +<MiddleWare/lwip-2.0.2/src/core/snmp>
+            +<MiddleWare/lwip-2.0.2/src/netif>
+            +<MiddleWare/lwip-2.0.2/src/netif/ppp>
+            +<MiddleWare/lwip-2.0.2/port/STM32F4xx/arch>
+            +<MiddleWare/lwip-2.0.2/port/STM32F4xx/uCOS_II>
             +<MiddleWare/uCOS_II>
             -<MiddleWare/uCOS_II/uC-CPU/ARM-Cortex-M0>
             -<MiddleWare/uCOS_II/uC-CPU/ARM-Cortex-M3>
@@ -67,11 +80,8 @@ src_filter = +<User/> +<Project/GCC/> +<Libraries/STM32F4xx_StdPeriph_Driver/src
             -<MiddleWare/uCOS_II/uCOS-II/Ports/ARM-Cortex-M3>
             -<MiddleWare/uCOS_II/uCOS-II/Ports/ARM-Cortex-M4/Generic/IAR>
             -<MiddleWare/uCOS_II/uCOS-II/Ports/ARM-Cortex-M4/Generic/RealView>
-            +<MiddleWare/lwip-2.0.2/src>
-            -<MiddleWare/lwip-2.0.2/src/apps>
-            +<MiddleWare/lwip-2.0.2/port/STM32F4x7/arch>
-            +<MiddleWare/lwip-2.0.2/port/STM32F4x7/UCOS-II>
-            -<User/app>
             
 debug_tool = stlink
-upload_protocol = stlink
+upload_protocol = stlink
+; upload_protocol = custom
+; upload_command = st-flash --reset write $SOURCE 0x8000000