arm_offset_f32.c 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165
  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_offset_f32.c
  9. *
  10. * Description: Floating-point vector offset.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ---------------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @defgroup offset Vector Offset
  46. *
  47. * Adds a constant offset to each element of a vector.
  48. *
  49. * <pre>
  50. * pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
  51. * </pre>
  52. *
  53. * The functions support in-place computation allowing the source and
  54. * destination pointers to reference the same memory buffer.
  55. * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  56. */
  57. /**
  58. * @addtogroup offset
  59. * @{
  60. */
  61. /**
  62. * @brief Adds a constant offset to a floating-point vector.
  63. * @param[in] *pSrc points to the input vector
  64. * @param[in] offset is the offset to be added
  65. * @param[out] *pDst points to the output vector
  66. * @param[in] blockSize number of samples in the vector
  67. * @return none.
  68. */
  69. void arm_offset_f32(
  70. float32_t * pSrc,
  71. float32_t offset,
  72. float32_t * pDst,
  73. uint32_t blockSize)
  74. {
  75. uint32_t blkCnt; /* loop counter */
  76. #ifndef ARM_MATH_CM0_FAMILY
  77. /* Run the below code for Cortex-M4 and Cortex-M3 */
  78. float32_t in1, in2, in3, in4;
  79. /*loop Unrolling */
  80. blkCnt = blockSize >> 2u;
  81. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  82. ** a second loop below computes the remaining 1 to 3 samples. */
  83. while(blkCnt > 0u)
  84. {
  85. /* C = A + offset */
  86. /* Add offset and then store the results in the destination buffer. */
  87. /* read samples from source */
  88. in1 = *pSrc;
  89. in2 = *(pSrc + 1);
  90. /* add offset to input */
  91. in1 = in1 + offset;
  92. /* read samples from source */
  93. in3 = *(pSrc + 2);
  94. /* add offset to input */
  95. in2 = in2 + offset;
  96. /* read samples from source */
  97. in4 = *(pSrc + 3);
  98. /* add offset to input */
  99. in3 = in3 + offset;
  100. /* store result to destination */
  101. *pDst = in1;
  102. /* add offset to input */
  103. in4 = in4 + offset;
  104. /* store result to destination */
  105. *(pDst + 1) = in2;
  106. /* store result to destination */
  107. *(pDst + 2) = in3;
  108. /* store result to destination */
  109. *(pDst + 3) = in4;
  110. /* update pointers to process next samples */
  111. pSrc += 4u;
  112. pDst += 4u;
  113. /* Decrement the loop counter */
  114. blkCnt--;
  115. }
  116. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  117. ** No loop unrolling is used. */
  118. blkCnt = blockSize % 0x4u;
  119. #else
  120. /* Run the below code for Cortex-M0 */
  121. /* Initialize blkCnt with number of samples */
  122. blkCnt = blockSize;
  123. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  124. while(blkCnt > 0u)
  125. {
  126. /* C = A + offset */
  127. /* Add offset and then store the result in the destination buffer. */
  128. *pDst++ = (*pSrc++) + offset;
  129. /* Decrement the loop counter */
  130. blkCnt--;
  131. }
  132. }
  133. /**
  134. * @} end of offset group
  135. */