stm32f1xx_hal_tim_ex.c 78 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_tim_ex.c
  4. * @author MCD Application Team
  5. * @brief TIM HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Timer Extended peripheral:
  8. * + Time Hall Sensor Interface Initialization
  9. * + Time Hall Sensor Interface Start
  10. * + Time Complementary signal break and dead time configuration
  11. * + Time Master and Slave synchronization configuration
  12. * + Timer remapping capabilities configuration
  13. ******************************************************************************
  14. * @attention
  15. *
  16. * Copyright (c) 2016 STMicroelectronics.
  17. * All rights reserved.
  18. *
  19. * This software is licensed under terms that can be found in the LICENSE file
  20. * in the root directory of this software component.
  21. * If no LICENSE file comes with this software, it is provided AS-IS.
  22. *
  23. ******************************************************************************
  24. @verbatim
  25. ==============================================================================
  26. ##### TIMER Extended features #####
  27. ==============================================================================
  28. [..]
  29. The Timer Extended features include:
  30. (#) Complementary outputs with programmable dead-time for :
  31. (++) Output Compare
  32. (++) PWM generation (Edge and Center-aligned Mode)
  33. (++) One-pulse mode output
  34. (#) Synchronization circuit to control the timer with external signals and to
  35. interconnect several timers together.
  36. (#) Break input to put the timer output signals in reset state or in a known state.
  37. (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
  38. positioning purposes
  39. ##### How to use this driver #####
  40. ==============================================================================
  41. [..]
  42. (#) Initialize the TIM low level resources by implementing the following functions
  43. depending on the selected feature:
  44. (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
  45. (#) Initialize the TIM low level resources :
  46. (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
  47. (##) TIM pins configuration
  48. (+++) Enable the clock for the TIM GPIOs using the following function:
  49. __HAL_RCC_GPIOx_CLK_ENABLE();
  50. (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
  51. (#) The external Clock can be configured, if needed (the default clock is the
  52. internal clock from the APBx), using the following function:
  53. HAL_TIM_ConfigClockSource, the clock configuration should be done before
  54. any start function.
  55. (#) Configure the TIM in the desired functioning mode using one of the
  56. initialization function of this driver:
  57. (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
  58. Timer Hall Sensor Interface and the commutation event with the corresponding
  59. Interrupt and DMA request if needed (Note that One Timer is used to interface
  60. with the Hall sensor Interface and another Timer should be used to use
  61. the commutation event).
  62. (#) Activate the TIM peripheral using one of the start functions:
  63. (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
  64. HAL_TIMEx_OCN_Start_IT()
  65. (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
  66. HAL_TIMEx_PWMN_Start_IT()
  67. (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
  68. (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
  69. HAL_TIMEx_HallSensor_Start_IT().
  70. @endverbatim
  71. ******************************************************************************
  72. */
  73. /* Includes ------------------------------------------------------------------*/
  74. #include "stm32f1xx_hal.h"
  75. /** @addtogroup STM32F1xx_HAL_Driver
  76. * @{
  77. */
  78. /** @defgroup TIMEx TIMEx
  79. * @brief TIM Extended HAL module driver
  80. * @{
  81. */
  82. #ifdef HAL_TIM_MODULE_ENABLED
  83. /* Private typedef -----------------------------------------------------------*/
  84. /* Private define ------------------------------------------------------------*/
  85. /* Private macros ------------------------------------------------------------*/
  86. /* Private variables ---------------------------------------------------------*/
  87. /* Private function prototypes -----------------------------------------------*/
  88. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
  89. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
  90. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
  91. /* Exported functions --------------------------------------------------------*/
  92. /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  93. * @{
  94. */
  95. /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  96. * @brief Timer Hall Sensor functions
  97. *
  98. @verbatim
  99. ==============================================================================
  100. ##### Timer Hall Sensor functions #####
  101. ==============================================================================
  102. [..]
  103. This section provides functions allowing to:
  104. (+) Initialize and configure TIM HAL Sensor.
  105. (+) De-initialize TIM HAL Sensor.
  106. (+) Start the Hall Sensor Interface.
  107. (+) Stop the Hall Sensor Interface.
  108. (+) Start the Hall Sensor Interface and enable interrupts.
  109. (+) Stop the Hall Sensor Interface and disable interrupts.
  110. (+) Start the Hall Sensor Interface and enable DMA transfers.
  111. (+) Stop the Hall Sensor Interface and disable DMA transfers.
  112. @endverbatim
  113. * @{
  114. */
  115. /**
  116. * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  117. * @note When the timer instance is initialized in Hall Sensor Interface mode,
  118. * timer channels 1 and channel 2 are reserved and cannot be used for
  119. * other purpose.
  120. * @param htim TIM Hall Sensor Interface handle
  121. * @param sConfig TIM Hall Sensor configuration structure
  122. * @retval HAL status
  123. */
  124. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
  125. {
  126. TIM_OC_InitTypeDef OC_Config;
  127. /* Check the TIM handle allocation */
  128. if (htim == NULL)
  129. {
  130. return HAL_ERROR;
  131. }
  132. /* Check the parameters */
  133. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  134. assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  135. assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  136. assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
  137. assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  138. assert_param(IS_TIM_PERIOD(htim->Init.Period));
  139. assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  140. assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
  141. if (htim->State == HAL_TIM_STATE_RESET)
  142. {
  143. /* Allocate lock resource and initialize it */
  144. htim->Lock = HAL_UNLOCKED;
  145. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  146. /* Reset interrupt callbacks to legacy week callbacks */
  147. TIM_ResetCallback(htim);
  148. if (htim->HallSensor_MspInitCallback == NULL)
  149. {
  150. htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
  151. }
  152. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  153. htim->HallSensor_MspInitCallback(htim);
  154. #else
  155. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  156. HAL_TIMEx_HallSensor_MspInit(htim);
  157. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  158. }
  159. /* Set the TIM state */
  160. htim->State = HAL_TIM_STATE_BUSY;
  161. /* Configure the Time base in the Encoder Mode */
  162. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  163. /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
  164. TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
  165. /* Reset the IC1PSC Bits */
  166. htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  167. /* Set the IC1PSC value */
  168. htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
  169. /* Enable the Hall sensor interface (XOR function of the three inputs) */
  170. htim->Instance->CR2 |= TIM_CR2_TI1S;
  171. /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  172. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  173. htim->Instance->SMCR |= TIM_TS_TI1F_ED;
  174. /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  175. htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  176. htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
  177. /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  178. OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  179. OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  180. OC_Config.OCMode = TIM_OCMODE_PWM2;
  181. OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  182. OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  183. OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  184. OC_Config.Pulse = sConfig->Commutation_Delay;
  185. TIM_OC2_SetConfig(htim->Instance, &OC_Config);
  186. /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
  187. register to 101 */
  188. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  189. htim->Instance->CR2 |= TIM_TRGO_OC2REF;
  190. /* Initialize the DMA burst operation state */
  191. htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
  192. /* Initialize the TIM channels state */
  193. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  194. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  195. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  196. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  197. /* Initialize the TIM state*/
  198. htim->State = HAL_TIM_STATE_READY;
  199. return HAL_OK;
  200. }
  201. /**
  202. * @brief DeInitializes the TIM Hall Sensor interface
  203. * @param htim TIM Hall Sensor Interface handle
  204. * @retval HAL status
  205. */
  206. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
  207. {
  208. /* Check the parameters */
  209. assert_param(IS_TIM_INSTANCE(htim->Instance));
  210. htim->State = HAL_TIM_STATE_BUSY;
  211. /* Disable the TIM Peripheral Clock */
  212. __HAL_TIM_DISABLE(htim);
  213. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  214. if (htim->HallSensor_MspDeInitCallback == NULL)
  215. {
  216. htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
  217. }
  218. /* DeInit the low level hardware */
  219. htim->HallSensor_MspDeInitCallback(htim);
  220. #else
  221. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  222. HAL_TIMEx_HallSensor_MspDeInit(htim);
  223. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  224. /* Change the DMA burst operation state */
  225. htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
  226. /* Change the TIM channels state */
  227. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  228. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  229. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  230. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  231. /* Change TIM state */
  232. htim->State = HAL_TIM_STATE_RESET;
  233. /* Release Lock */
  234. __HAL_UNLOCK(htim);
  235. return HAL_OK;
  236. }
  237. /**
  238. * @brief Initializes the TIM Hall Sensor MSP.
  239. * @param htim TIM Hall Sensor Interface handle
  240. * @retval None
  241. */
  242. __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
  243. {
  244. /* Prevent unused argument(s) compilation warning */
  245. UNUSED(htim);
  246. /* NOTE : This function should not be modified, when the callback is needed,
  247. the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
  248. */
  249. }
  250. /**
  251. * @brief DeInitializes TIM Hall Sensor MSP.
  252. * @param htim TIM Hall Sensor Interface handle
  253. * @retval None
  254. */
  255. __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
  256. {
  257. /* Prevent unused argument(s) compilation warning */
  258. UNUSED(htim);
  259. /* NOTE : This function should not be modified, when the callback is needed,
  260. the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
  261. */
  262. }
  263. /**
  264. * @brief Starts the TIM Hall Sensor Interface.
  265. * @param htim TIM Hall Sensor Interface handle
  266. * @retval HAL status
  267. */
  268. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
  269. {
  270. uint32_t tmpsmcr;
  271. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  272. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  273. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  274. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  275. /* Check the parameters */
  276. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  277. /* Check the TIM channels state */
  278. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  279. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  280. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  281. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  282. {
  283. return HAL_ERROR;
  284. }
  285. /* Set the TIM channels state */
  286. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  287. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  288. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  289. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  290. /* Enable the Input Capture channel 1
  291. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  292. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  293. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  294. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  295. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  296. {
  297. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  298. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  299. {
  300. __HAL_TIM_ENABLE(htim);
  301. }
  302. }
  303. else
  304. {
  305. __HAL_TIM_ENABLE(htim);
  306. }
  307. /* Return function status */
  308. return HAL_OK;
  309. }
  310. /**
  311. * @brief Stops the TIM Hall sensor Interface.
  312. * @param htim TIM Hall Sensor Interface handle
  313. * @retval HAL status
  314. */
  315. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
  316. {
  317. /* Check the parameters */
  318. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  319. /* Disable the Input Capture channels 1, 2 and 3
  320. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  321. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  322. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  323. /* Disable the Peripheral */
  324. __HAL_TIM_DISABLE(htim);
  325. /* Set the TIM channels state */
  326. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  327. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  328. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  329. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  330. /* Return function status */
  331. return HAL_OK;
  332. }
  333. /**
  334. * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
  335. * @param htim TIM Hall Sensor Interface handle
  336. * @retval HAL status
  337. */
  338. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
  339. {
  340. uint32_t tmpsmcr;
  341. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  342. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  343. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  344. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  345. /* Check the parameters */
  346. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  347. /* Check the TIM channels state */
  348. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  349. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  350. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  351. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  352. {
  353. return HAL_ERROR;
  354. }
  355. /* Set the TIM channels state */
  356. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  357. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  358. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  359. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  360. /* Enable the capture compare Interrupts 1 event */
  361. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  362. /* Enable the Input Capture channel 1
  363. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  364. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  365. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  366. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  367. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  368. {
  369. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  370. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  371. {
  372. __HAL_TIM_ENABLE(htim);
  373. }
  374. }
  375. else
  376. {
  377. __HAL_TIM_ENABLE(htim);
  378. }
  379. /* Return function status */
  380. return HAL_OK;
  381. }
  382. /**
  383. * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
  384. * @param htim TIM Hall Sensor Interface handle
  385. * @retval HAL status
  386. */
  387. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
  388. {
  389. /* Check the parameters */
  390. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  391. /* Disable the Input Capture channel 1
  392. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  393. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  394. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  395. /* Disable the capture compare Interrupts event */
  396. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  397. /* Disable the Peripheral */
  398. __HAL_TIM_DISABLE(htim);
  399. /* Set the TIM channels state */
  400. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  401. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  402. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  403. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  404. /* Return function status */
  405. return HAL_OK;
  406. }
  407. /**
  408. * @brief Starts the TIM Hall Sensor Interface in DMA mode.
  409. * @param htim TIM Hall Sensor Interface handle
  410. * @param pData The destination Buffer address.
  411. * @param Length The length of data to be transferred from TIM peripheral to memory.
  412. * @retval HAL status
  413. */
  414. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
  415. {
  416. uint32_t tmpsmcr;
  417. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  418. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  419. /* Check the parameters */
  420. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  421. /* Set the TIM channel state */
  422. if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
  423. || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
  424. {
  425. return HAL_BUSY;
  426. }
  427. else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
  428. && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
  429. {
  430. if ((pData == NULL) || (Length == 0U))
  431. {
  432. return HAL_ERROR;
  433. }
  434. else
  435. {
  436. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  437. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  438. }
  439. }
  440. else
  441. {
  442. return HAL_ERROR;
  443. }
  444. /* Enable the Input Capture channel 1
  445. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  446. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  447. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  448. /* Set the DMA Input Capture 1 Callbacks */
  449. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
  450. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
  451. /* Set the DMA error callback */
  452. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  453. /* Enable the DMA channel for Capture 1*/
  454. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
  455. {
  456. /* Return error status */
  457. return HAL_ERROR;
  458. }
  459. /* Enable the capture compare 1 Interrupt */
  460. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  461. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  462. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  463. {
  464. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  465. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  466. {
  467. __HAL_TIM_ENABLE(htim);
  468. }
  469. }
  470. else
  471. {
  472. __HAL_TIM_ENABLE(htim);
  473. }
  474. /* Return function status */
  475. return HAL_OK;
  476. }
  477. /**
  478. * @brief Stops the TIM Hall Sensor Interface in DMA mode.
  479. * @param htim TIM Hall Sensor Interface handle
  480. * @retval HAL status
  481. */
  482. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
  483. {
  484. /* Check the parameters */
  485. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  486. /* Disable the Input Capture channel 1
  487. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  488. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  489. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  490. /* Disable the capture compare Interrupts 1 event */
  491. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  492. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  493. /* Disable the Peripheral */
  494. __HAL_TIM_DISABLE(htim);
  495. /* Set the TIM channel state */
  496. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  497. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  498. /* Return function status */
  499. return HAL_OK;
  500. }
  501. /**
  502. * @}
  503. */
  504. /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  505. * @brief Timer Complementary Output Compare functions
  506. *
  507. @verbatim
  508. ==============================================================================
  509. ##### Timer Complementary Output Compare functions #####
  510. ==============================================================================
  511. [..]
  512. This section provides functions allowing to:
  513. (+) Start the Complementary Output Compare/PWM.
  514. (+) Stop the Complementary Output Compare/PWM.
  515. (+) Start the Complementary Output Compare/PWM and enable interrupts.
  516. (+) Stop the Complementary Output Compare/PWM and disable interrupts.
  517. (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
  518. (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
  519. @endverbatim
  520. * @{
  521. */
  522. /**
  523. * @brief Starts the TIM Output Compare signal generation on the complementary
  524. * output.
  525. * @param htim TIM Output Compare handle
  526. * @param Channel TIM Channel to be enabled
  527. * This parameter can be one of the following values:
  528. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  529. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  530. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  531. * @retval HAL status
  532. */
  533. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  534. {
  535. uint32_t tmpsmcr;
  536. /* Check the parameters */
  537. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  538. /* Check the TIM complementary channel state */
  539. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  540. {
  541. return HAL_ERROR;
  542. }
  543. /* Set the TIM complementary channel state */
  544. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  545. /* Enable the Capture compare channel N */
  546. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  547. /* Enable the Main Output */
  548. __HAL_TIM_MOE_ENABLE(htim);
  549. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  550. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  551. {
  552. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  553. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  554. {
  555. __HAL_TIM_ENABLE(htim);
  556. }
  557. }
  558. else
  559. {
  560. __HAL_TIM_ENABLE(htim);
  561. }
  562. /* Return function status */
  563. return HAL_OK;
  564. }
  565. /**
  566. * @brief Stops the TIM Output Compare signal generation on the complementary
  567. * output.
  568. * @param htim TIM handle
  569. * @param Channel TIM Channel to be disabled
  570. * This parameter can be one of the following values:
  571. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  572. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  573. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  574. * @retval HAL status
  575. */
  576. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  577. {
  578. /* Check the parameters */
  579. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  580. /* Disable the Capture compare channel N */
  581. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  582. /* Disable the Main Output */
  583. __HAL_TIM_MOE_DISABLE(htim);
  584. /* Disable the Peripheral */
  585. __HAL_TIM_DISABLE(htim);
  586. /* Set the TIM complementary channel state */
  587. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  588. /* Return function status */
  589. return HAL_OK;
  590. }
  591. /**
  592. * @brief Starts the TIM Output Compare signal generation in interrupt mode
  593. * on the complementary output.
  594. * @param htim TIM OC handle
  595. * @param Channel TIM Channel to be enabled
  596. * This parameter can be one of the following values:
  597. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  598. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  599. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  600. * @retval HAL status
  601. */
  602. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  603. {
  604. HAL_StatusTypeDef status = HAL_OK;
  605. uint32_t tmpsmcr;
  606. /* Check the parameters */
  607. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  608. /* Check the TIM complementary channel state */
  609. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  610. {
  611. return HAL_ERROR;
  612. }
  613. /* Set the TIM complementary channel state */
  614. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  615. switch (Channel)
  616. {
  617. case TIM_CHANNEL_1:
  618. {
  619. /* Enable the TIM Output Compare interrupt */
  620. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  621. break;
  622. }
  623. case TIM_CHANNEL_2:
  624. {
  625. /* Enable the TIM Output Compare interrupt */
  626. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  627. break;
  628. }
  629. case TIM_CHANNEL_3:
  630. {
  631. /* Enable the TIM Output Compare interrupt */
  632. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  633. break;
  634. }
  635. default:
  636. status = HAL_ERROR;
  637. break;
  638. }
  639. if (status == HAL_OK)
  640. {
  641. /* Enable the TIM Break interrupt */
  642. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  643. /* Enable the Capture compare channel N */
  644. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  645. /* Enable the Main Output */
  646. __HAL_TIM_MOE_ENABLE(htim);
  647. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  648. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  649. {
  650. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  651. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  652. {
  653. __HAL_TIM_ENABLE(htim);
  654. }
  655. }
  656. else
  657. {
  658. __HAL_TIM_ENABLE(htim);
  659. }
  660. }
  661. /* Return function status */
  662. return status;
  663. }
  664. /**
  665. * @brief Stops the TIM Output Compare signal generation in interrupt mode
  666. * on the complementary output.
  667. * @param htim TIM Output Compare handle
  668. * @param Channel TIM Channel to be disabled
  669. * This parameter can be one of the following values:
  670. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  671. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  672. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  673. * @retval HAL status
  674. */
  675. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  676. {
  677. HAL_StatusTypeDef status = HAL_OK;
  678. uint32_t tmpccer;
  679. /* Check the parameters */
  680. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  681. switch (Channel)
  682. {
  683. case TIM_CHANNEL_1:
  684. {
  685. /* Disable the TIM Output Compare interrupt */
  686. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  687. break;
  688. }
  689. case TIM_CHANNEL_2:
  690. {
  691. /* Disable the TIM Output Compare interrupt */
  692. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  693. break;
  694. }
  695. case TIM_CHANNEL_3:
  696. {
  697. /* Disable the TIM Output Compare interrupt */
  698. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  699. break;
  700. }
  701. default:
  702. status = HAL_ERROR;
  703. break;
  704. }
  705. if (status == HAL_OK)
  706. {
  707. /* Disable the Capture compare channel N */
  708. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  709. /* Disable the TIM Break interrupt (only if no more channel is active) */
  710. tmpccer = htim->Instance->CCER;
  711. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  712. {
  713. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  714. }
  715. /* Disable the Main Output */
  716. __HAL_TIM_MOE_DISABLE(htim);
  717. /* Disable the Peripheral */
  718. __HAL_TIM_DISABLE(htim);
  719. /* Set the TIM complementary channel state */
  720. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  721. }
  722. /* Return function status */
  723. return status;
  724. }
  725. /**
  726. * @brief Starts the TIM Output Compare signal generation in DMA mode
  727. * on the complementary output.
  728. * @param htim TIM Output Compare handle
  729. * @param Channel TIM Channel to be enabled
  730. * This parameter can be one of the following values:
  731. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  732. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  733. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  734. * @param pData The source Buffer address.
  735. * @param Length The length of data to be transferred from memory to TIM peripheral
  736. * @retval HAL status
  737. */
  738. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
  739. uint16_t Length)
  740. {
  741. HAL_StatusTypeDef status = HAL_OK;
  742. uint32_t tmpsmcr;
  743. /* Check the parameters */
  744. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  745. /* Set the TIM complementary channel state */
  746. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  747. {
  748. return HAL_BUSY;
  749. }
  750. else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  751. {
  752. if ((pData == NULL) || (Length == 0U))
  753. {
  754. return HAL_ERROR;
  755. }
  756. else
  757. {
  758. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  759. }
  760. }
  761. else
  762. {
  763. return HAL_ERROR;
  764. }
  765. switch (Channel)
  766. {
  767. case TIM_CHANNEL_1:
  768. {
  769. /* Set the DMA compare callbacks */
  770. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  771. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  772. /* Set the DMA error callback */
  773. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  774. /* Enable the DMA channel */
  775. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
  776. Length) != HAL_OK)
  777. {
  778. /* Return error status */
  779. return HAL_ERROR;
  780. }
  781. /* Enable the TIM Output Compare DMA request */
  782. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  783. break;
  784. }
  785. case TIM_CHANNEL_2:
  786. {
  787. /* Set the DMA compare callbacks */
  788. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  789. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  790. /* Set the DMA error callback */
  791. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  792. /* Enable the DMA channel */
  793. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
  794. Length) != HAL_OK)
  795. {
  796. /* Return error status */
  797. return HAL_ERROR;
  798. }
  799. /* Enable the TIM Output Compare DMA request */
  800. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  801. break;
  802. }
  803. case TIM_CHANNEL_3:
  804. {
  805. /* Set the DMA compare callbacks */
  806. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  807. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  808. /* Set the DMA error callback */
  809. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  810. /* Enable the DMA channel */
  811. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
  812. Length) != HAL_OK)
  813. {
  814. /* Return error status */
  815. return HAL_ERROR;
  816. }
  817. /* Enable the TIM Output Compare DMA request */
  818. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  819. break;
  820. }
  821. default:
  822. status = HAL_ERROR;
  823. break;
  824. }
  825. if (status == HAL_OK)
  826. {
  827. /* Enable the Capture compare channel N */
  828. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  829. /* Enable the Main Output */
  830. __HAL_TIM_MOE_ENABLE(htim);
  831. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  832. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  833. {
  834. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  835. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  836. {
  837. __HAL_TIM_ENABLE(htim);
  838. }
  839. }
  840. else
  841. {
  842. __HAL_TIM_ENABLE(htim);
  843. }
  844. }
  845. /* Return function status */
  846. return status;
  847. }
  848. /**
  849. * @brief Stops the TIM Output Compare signal generation in DMA mode
  850. * on the complementary output.
  851. * @param htim TIM Output Compare handle
  852. * @param Channel TIM Channel to be disabled
  853. * This parameter can be one of the following values:
  854. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  855. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  856. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  857. * @retval HAL status
  858. */
  859. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  860. {
  861. HAL_StatusTypeDef status = HAL_OK;
  862. /* Check the parameters */
  863. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  864. switch (Channel)
  865. {
  866. case TIM_CHANNEL_1:
  867. {
  868. /* Disable the TIM Output Compare DMA request */
  869. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  870. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  871. break;
  872. }
  873. case TIM_CHANNEL_2:
  874. {
  875. /* Disable the TIM Output Compare DMA request */
  876. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  877. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  878. break;
  879. }
  880. case TIM_CHANNEL_3:
  881. {
  882. /* Disable the TIM Output Compare DMA request */
  883. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  884. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  885. break;
  886. }
  887. default:
  888. status = HAL_ERROR;
  889. break;
  890. }
  891. if (status == HAL_OK)
  892. {
  893. /* Disable the Capture compare channel N */
  894. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  895. /* Disable the Main Output */
  896. __HAL_TIM_MOE_DISABLE(htim);
  897. /* Disable the Peripheral */
  898. __HAL_TIM_DISABLE(htim);
  899. /* Set the TIM complementary channel state */
  900. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  901. }
  902. /* Return function status */
  903. return status;
  904. }
  905. /**
  906. * @}
  907. */
  908. /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  909. * @brief Timer Complementary PWM functions
  910. *
  911. @verbatim
  912. ==============================================================================
  913. ##### Timer Complementary PWM functions #####
  914. ==============================================================================
  915. [..]
  916. This section provides functions allowing to:
  917. (+) Start the Complementary PWM.
  918. (+) Stop the Complementary PWM.
  919. (+) Start the Complementary PWM and enable interrupts.
  920. (+) Stop the Complementary PWM and disable interrupts.
  921. (+) Start the Complementary PWM and enable DMA transfers.
  922. (+) Stop the Complementary PWM and disable DMA transfers.
  923. (+) Start the Complementary Input Capture measurement.
  924. (+) Stop the Complementary Input Capture.
  925. (+) Start the Complementary Input Capture and enable interrupts.
  926. (+) Stop the Complementary Input Capture and disable interrupts.
  927. (+) Start the Complementary Input Capture and enable DMA transfers.
  928. (+) Stop the Complementary Input Capture and disable DMA transfers.
  929. (+) Start the Complementary One Pulse generation.
  930. (+) Stop the Complementary One Pulse.
  931. (+) Start the Complementary One Pulse and enable interrupts.
  932. (+) Stop the Complementary One Pulse and disable interrupts.
  933. @endverbatim
  934. * @{
  935. */
  936. /**
  937. * @brief Starts the PWM signal generation on the complementary output.
  938. * @param htim TIM handle
  939. * @param Channel TIM Channel to be enabled
  940. * This parameter can be one of the following values:
  941. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  942. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  943. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  944. * @retval HAL status
  945. */
  946. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  947. {
  948. uint32_t tmpsmcr;
  949. /* Check the parameters */
  950. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  951. /* Check the TIM complementary channel state */
  952. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  953. {
  954. return HAL_ERROR;
  955. }
  956. /* Set the TIM complementary channel state */
  957. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  958. /* Enable the complementary PWM output */
  959. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  960. /* Enable the Main Output */
  961. __HAL_TIM_MOE_ENABLE(htim);
  962. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  963. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  964. {
  965. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  966. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  967. {
  968. __HAL_TIM_ENABLE(htim);
  969. }
  970. }
  971. else
  972. {
  973. __HAL_TIM_ENABLE(htim);
  974. }
  975. /* Return function status */
  976. return HAL_OK;
  977. }
  978. /**
  979. * @brief Stops the PWM signal generation on the complementary output.
  980. * @param htim TIM handle
  981. * @param Channel TIM Channel to be disabled
  982. * This parameter can be one of the following values:
  983. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  984. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  985. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  986. * @retval HAL status
  987. */
  988. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  989. {
  990. /* Check the parameters */
  991. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  992. /* Disable the complementary PWM output */
  993. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  994. /* Disable the Main Output */
  995. __HAL_TIM_MOE_DISABLE(htim);
  996. /* Disable the Peripheral */
  997. __HAL_TIM_DISABLE(htim);
  998. /* Set the TIM complementary channel state */
  999. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1000. /* Return function status */
  1001. return HAL_OK;
  1002. }
  1003. /**
  1004. * @brief Starts the PWM signal generation in interrupt mode on the
  1005. * complementary output.
  1006. * @param htim TIM handle
  1007. * @param Channel TIM Channel to be disabled
  1008. * This parameter can be one of the following values:
  1009. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1010. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1011. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1012. * @retval HAL status
  1013. */
  1014. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1015. {
  1016. HAL_StatusTypeDef status = HAL_OK;
  1017. uint32_t tmpsmcr;
  1018. /* Check the parameters */
  1019. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1020. /* Check the TIM complementary channel state */
  1021. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  1022. {
  1023. return HAL_ERROR;
  1024. }
  1025. /* Set the TIM complementary channel state */
  1026. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1027. switch (Channel)
  1028. {
  1029. case TIM_CHANNEL_1:
  1030. {
  1031. /* Enable the TIM Capture/Compare 1 interrupt */
  1032. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1033. break;
  1034. }
  1035. case TIM_CHANNEL_2:
  1036. {
  1037. /* Enable the TIM Capture/Compare 2 interrupt */
  1038. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1039. break;
  1040. }
  1041. case TIM_CHANNEL_3:
  1042. {
  1043. /* Enable the TIM Capture/Compare 3 interrupt */
  1044. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  1045. break;
  1046. }
  1047. default:
  1048. status = HAL_ERROR;
  1049. break;
  1050. }
  1051. if (status == HAL_OK)
  1052. {
  1053. /* Enable the TIM Break interrupt */
  1054. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  1055. /* Enable the complementary PWM output */
  1056. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1057. /* Enable the Main Output */
  1058. __HAL_TIM_MOE_ENABLE(htim);
  1059. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1060. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1061. {
  1062. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1063. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1064. {
  1065. __HAL_TIM_ENABLE(htim);
  1066. }
  1067. }
  1068. else
  1069. {
  1070. __HAL_TIM_ENABLE(htim);
  1071. }
  1072. }
  1073. /* Return function status */
  1074. return status;
  1075. }
  1076. /**
  1077. * @brief Stops the PWM signal generation in interrupt mode on the
  1078. * complementary output.
  1079. * @param htim TIM handle
  1080. * @param Channel TIM Channel to be disabled
  1081. * This parameter can be one of the following values:
  1082. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1083. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1084. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1085. * @retval HAL status
  1086. */
  1087. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1088. {
  1089. HAL_StatusTypeDef status = HAL_OK;
  1090. uint32_t tmpccer;
  1091. /* Check the parameters */
  1092. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1093. switch (Channel)
  1094. {
  1095. case TIM_CHANNEL_1:
  1096. {
  1097. /* Disable the TIM Capture/Compare 1 interrupt */
  1098. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1099. break;
  1100. }
  1101. case TIM_CHANNEL_2:
  1102. {
  1103. /* Disable the TIM Capture/Compare 2 interrupt */
  1104. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1105. break;
  1106. }
  1107. case TIM_CHANNEL_3:
  1108. {
  1109. /* Disable the TIM Capture/Compare 3 interrupt */
  1110. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  1111. break;
  1112. }
  1113. default:
  1114. status = HAL_ERROR;
  1115. break;
  1116. }
  1117. if (status == HAL_OK)
  1118. {
  1119. /* Disable the complementary PWM output */
  1120. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1121. /* Disable the TIM Break interrupt (only if no more channel is active) */
  1122. tmpccer = htim->Instance->CCER;
  1123. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  1124. {
  1125. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  1126. }
  1127. /* Disable the Main Output */
  1128. __HAL_TIM_MOE_DISABLE(htim);
  1129. /* Disable the Peripheral */
  1130. __HAL_TIM_DISABLE(htim);
  1131. /* Set the TIM complementary channel state */
  1132. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1133. }
  1134. /* Return function status */
  1135. return status;
  1136. }
  1137. /**
  1138. * @brief Starts the TIM PWM signal generation in DMA mode on the
  1139. * complementary output
  1140. * @param htim TIM handle
  1141. * @param Channel TIM Channel to be enabled
  1142. * This parameter can be one of the following values:
  1143. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1144. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1145. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1146. * @param pData The source Buffer address.
  1147. * @param Length The length of data to be transferred from memory to TIM peripheral
  1148. * @retval HAL status
  1149. */
  1150. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
  1151. uint16_t Length)
  1152. {
  1153. HAL_StatusTypeDef status = HAL_OK;
  1154. uint32_t tmpsmcr;
  1155. /* Check the parameters */
  1156. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1157. /* Set the TIM complementary channel state */
  1158. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  1159. {
  1160. return HAL_BUSY;
  1161. }
  1162. else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  1163. {
  1164. if ((pData == NULL) || (Length == 0U))
  1165. {
  1166. return HAL_ERROR;
  1167. }
  1168. else
  1169. {
  1170. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1171. }
  1172. }
  1173. else
  1174. {
  1175. return HAL_ERROR;
  1176. }
  1177. switch (Channel)
  1178. {
  1179. case TIM_CHANNEL_1:
  1180. {
  1181. /* Set the DMA compare callbacks */
  1182. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1183. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1184. /* Set the DMA error callback */
  1185. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1186. /* Enable the DMA channel */
  1187. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
  1188. Length) != HAL_OK)
  1189. {
  1190. /* Return error status */
  1191. return HAL_ERROR;
  1192. }
  1193. /* Enable the TIM Capture/Compare 1 DMA request */
  1194. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  1195. break;
  1196. }
  1197. case TIM_CHANNEL_2:
  1198. {
  1199. /* Set the DMA compare callbacks */
  1200. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1201. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1202. /* Set the DMA error callback */
  1203. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1204. /* Enable the DMA channel */
  1205. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
  1206. Length) != HAL_OK)
  1207. {
  1208. /* Return error status */
  1209. return HAL_ERROR;
  1210. }
  1211. /* Enable the TIM Capture/Compare 2 DMA request */
  1212. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  1213. break;
  1214. }
  1215. case TIM_CHANNEL_3:
  1216. {
  1217. /* Set the DMA compare callbacks */
  1218. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1219. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1220. /* Set the DMA error callback */
  1221. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1222. /* Enable the DMA channel */
  1223. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
  1224. Length) != HAL_OK)
  1225. {
  1226. /* Return error status */
  1227. return HAL_ERROR;
  1228. }
  1229. /* Enable the TIM Capture/Compare 3 DMA request */
  1230. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  1231. break;
  1232. }
  1233. default:
  1234. status = HAL_ERROR;
  1235. break;
  1236. }
  1237. if (status == HAL_OK)
  1238. {
  1239. /* Enable the complementary PWM output */
  1240. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1241. /* Enable the Main Output */
  1242. __HAL_TIM_MOE_ENABLE(htim);
  1243. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1244. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1245. {
  1246. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1247. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1248. {
  1249. __HAL_TIM_ENABLE(htim);
  1250. }
  1251. }
  1252. else
  1253. {
  1254. __HAL_TIM_ENABLE(htim);
  1255. }
  1256. }
  1257. /* Return function status */
  1258. return status;
  1259. }
  1260. /**
  1261. * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
  1262. * output
  1263. * @param htim TIM handle
  1264. * @param Channel TIM Channel to be disabled
  1265. * This parameter can be one of the following values:
  1266. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1267. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1268. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1269. * @retval HAL status
  1270. */
  1271. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  1272. {
  1273. HAL_StatusTypeDef status = HAL_OK;
  1274. /* Check the parameters */
  1275. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1276. switch (Channel)
  1277. {
  1278. case TIM_CHANNEL_1:
  1279. {
  1280. /* Disable the TIM Capture/Compare 1 DMA request */
  1281. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  1282. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  1283. break;
  1284. }
  1285. case TIM_CHANNEL_2:
  1286. {
  1287. /* Disable the TIM Capture/Compare 2 DMA request */
  1288. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  1289. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  1290. break;
  1291. }
  1292. case TIM_CHANNEL_3:
  1293. {
  1294. /* Disable the TIM Capture/Compare 3 DMA request */
  1295. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1296. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1297. break;
  1298. }
  1299. default:
  1300. status = HAL_ERROR;
  1301. break;
  1302. }
  1303. if (status == HAL_OK)
  1304. {
  1305. /* Disable the complementary PWM output */
  1306. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1307. /* Disable the Main Output */
  1308. __HAL_TIM_MOE_DISABLE(htim);
  1309. /* Disable the Peripheral */
  1310. __HAL_TIM_DISABLE(htim);
  1311. /* Set the TIM complementary channel state */
  1312. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1313. }
  1314. /* Return function status */
  1315. return status;
  1316. }
  1317. /**
  1318. * @}
  1319. */
  1320. /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  1321. * @brief Timer Complementary One Pulse functions
  1322. *
  1323. @verbatim
  1324. ==============================================================================
  1325. ##### Timer Complementary One Pulse functions #####
  1326. ==============================================================================
  1327. [..]
  1328. This section provides functions allowing to:
  1329. (+) Start the Complementary One Pulse generation.
  1330. (+) Stop the Complementary One Pulse.
  1331. (+) Start the Complementary One Pulse and enable interrupts.
  1332. (+) Stop the Complementary One Pulse and disable interrupts.
  1333. @endverbatim
  1334. * @{
  1335. */
  1336. /**
  1337. * @brief Starts the TIM One Pulse signal generation on the complementary
  1338. * output.
  1339. * @note OutputChannel must match the pulse output channel chosen when calling
  1340. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1341. * @param htim TIM One Pulse handle
  1342. * @param OutputChannel pulse output channel to enable
  1343. * This parameter can be one of the following values:
  1344. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1345. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1346. * @retval HAL status
  1347. */
  1348. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1349. {
  1350. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1351. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  1352. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  1353. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  1354. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  1355. /* Check the parameters */
  1356. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1357. /* Check the TIM channels state */
  1358. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1359. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  1360. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1361. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  1362. {
  1363. return HAL_ERROR;
  1364. }
  1365. /* Set the TIM channels state */
  1366. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1367. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1368. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1369. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1370. /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1371. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1372. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1373. /* Enable the Main Output */
  1374. __HAL_TIM_MOE_ENABLE(htim);
  1375. /* Return function status */
  1376. return HAL_OK;
  1377. }
  1378. /**
  1379. * @brief Stops the TIM One Pulse signal generation on the complementary
  1380. * output.
  1381. * @note OutputChannel must match the pulse output channel chosen when calling
  1382. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1383. * @param htim TIM One Pulse handle
  1384. * @param OutputChannel pulse output channel to disable
  1385. * This parameter can be one of the following values:
  1386. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1387. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1388. * @retval HAL status
  1389. */
  1390. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1391. {
  1392. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1393. /* Check the parameters */
  1394. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1395. /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1396. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1397. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1398. /* Disable the Main Output */
  1399. __HAL_TIM_MOE_DISABLE(htim);
  1400. /* Disable the Peripheral */
  1401. __HAL_TIM_DISABLE(htim);
  1402. /* Set the TIM channels state */
  1403. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1404. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1405. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1406. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1407. /* Return function status */
  1408. return HAL_OK;
  1409. }
  1410. /**
  1411. * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
  1412. * complementary channel.
  1413. * @note OutputChannel must match the pulse output channel chosen when calling
  1414. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1415. * @param htim TIM One Pulse handle
  1416. * @param OutputChannel pulse output channel to enable
  1417. * This parameter can be one of the following values:
  1418. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1419. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1420. * @retval HAL status
  1421. */
  1422. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1423. {
  1424. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1425. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  1426. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  1427. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  1428. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  1429. /* Check the parameters */
  1430. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1431. /* Check the TIM channels state */
  1432. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1433. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  1434. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1435. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  1436. {
  1437. return HAL_ERROR;
  1438. }
  1439. /* Set the TIM channels state */
  1440. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1441. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1442. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1443. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1444. /* Enable the TIM Capture/Compare 1 interrupt */
  1445. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1446. /* Enable the TIM Capture/Compare 2 interrupt */
  1447. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1448. /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1449. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1450. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1451. /* Enable the Main Output */
  1452. __HAL_TIM_MOE_ENABLE(htim);
  1453. /* Return function status */
  1454. return HAL_OK;
  1455. }
  1456. /**
  1457. * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
  1458. * complementary channel.
  1459. * @note OutputChannel must match the pulse output channel chosen when calling
  1460. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1461. * @param htim TIM One Pulse handle
  1462. * @param OutputChannel pulse output channel to disable
  1463. * This parameter can be one of the following values:
  1464. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1465. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1466. * @retval HAL status
  1467. */
  1468. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1469. {
  1470. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1471. /* Check the parameters */
  1472. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1473. /* Disable the TIM Capture/Compare 1 interrupt */
  1474. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1475. /* Disable the TIM Capture/Compare 2 interrupt */
  1476. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1477. /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1478. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1479. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1480. /* Disable the Main Output */
  1481. __HAL_TIM_MOE_DISABLE(htim);
  1482. /* Disable the Peripheral */
  1483. __HAL_TIM_DISABLE(htim);
  1484. /* Set the TIM channels state */
  1485. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1486. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1487. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1488. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1489. /* Return function status */
  1490. return HAL_OK;
  1491. }
  1492. /**
  1493. * @}
  1494. */
  1495. /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  1496. * @brief Peripheral Control functions
  1497. *
  1498. @verbatim
  1499. ==============================================================================
  1500. ##### Peripheral Control functions #####
  1501. ==============================================================================
  1502. [..]
  1503. This section provides functions allowing to:
  1504. (+) Configure the commutation event in case of use of the Hall sensor interface.
  1505. (+) Configure Output channels for OC and PWM mode.
  1506. (+) Configure Complementary channels, break features and dead time.
  1507. (+) Configure Master synchronization.
  1508. (+) Configure timer remapping capabilities.
  1509. @endverbatim
  1510. * @{
  1511. */
  1512. /**
  1513. * @brief Configure the TIM commutation event sequence.
  1514. * @note This function is mandatory to use the commutation event in order to
  1515. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1516. * the typical use of this feature is with the use of another Timer(interface Timer)
  1517. * configured in Hall sensor interface, this interface Timer will generate the
  1518. * commutation at its TRGO output (connected to Timer used in this function) each time
  1519. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1520. * @param htim TIM handle
  1521. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1522. * This parameter can be one of the following values:
  1523. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1524. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1525. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1526. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1527. * @arg TIM_TS_NONE: No trigger is needed
  1528. * @param CommutationSource the Commutation Event source
  1529. * This parameter can be one of the following values:
  1530. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1531. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1532. * @retval HAL status
  1533. */
  1534. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1535. uint32_t CommutationSource)
  1536. {
  1537. /* Check the parameters */
  1538. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1539. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1540. __HAL_LOCK(htim);
  1541. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1542. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1543. {
  1544. /* Select the Input trigger */
  1545. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1546. htim->Instance->SMCR |= InputTrigger;
  1547. }
  1548. /* Select the Capture Compare preload feature */
  1549. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1550. /* Select the Commutation event source */
  1551. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1552. htim->Instance->CR2 |= CommutationSource;
  1553. /* Disable Commutation Interrupt */
  1554. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1555. /* Disable Commutation DMA request */
  1556. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1557. __HAL_UNLOCK(htim);
  1558. return HAL_OK;
  1559. }
  1560. /**
  1561. * @brief Configure the TIM commutation event sequence with interrupt.
  1562. * @note This function is mandatory to use the commutation event in order to
  1563. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1564. * the typical use of this feature is with the use of another Timer(interface Timer)
  1565. * configured in Hall sensor interface, this interface Timer will generate the
  1566. * commutation at its TRGO output (connected to Timer used in this function) each time
  1567. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1568. * @param htim TIM handle
  1569. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1570. * This parameter can be one of the following values:
  1571. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1572. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1573. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1574. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1575. * @arg TIM_TS_NONE: No trigger is needed
  1576. * @param CommutationSource the Commutation Event source
  1577. * This parameter can be one of the following values:
  1578. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1579. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1580. * @retval HAL status
  1581. */
  1582. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1583. uint32_t CommutationSource)
  1584. {
  1585. /* Check the parameters */
  1586. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1587. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1588. __HAL_LOCK(htim);
  1589. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1590. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1591. {
  1592. /* Select the Input trigger */
  1593. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1594. htim->Instance->SMCR |= InputTrigger;
  1595. }
  1596. /* Select the Capture Compare preload feature */
  1597. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1598. /* Select the Commutation event source */
  1599. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1600. htim->Instance->CR2 |= CommutationSource;
  1601. /* Disable Commutation DMA request */
  1602. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1603. /* Enable the Commutation Interrupt */
  1604. __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
  1605. __HAL_UNLOCK(htim);
  1606. return HAL_OK;
  1607. }
  1608. /**
  1609. * @brief Configure the TIM commutation event sequence with DMA.
  1610. * @note This function is mandatory to use the commutation event in order to
  1611. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1612. * the typical use of this feature is with the use of another Timer(interface Timer)
  1613. * configured in Hall sensor interface, this interface Timer will generate the
  1614. * commutation at its TRGO output (connected to Timer used in this function) each time
  1615. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1616. * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
  1617. * @param htim TIM handle
  1618. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1619. * This parameter can be one of the following values:
  1620. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1621. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1622. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1623. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1624. * @arg TIM_TS_NONE: No trigger is needed
  1625. * @param CommutationSource the Commutation Event source
  1626. * This parameter can be one of the following values:
  1627. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1628. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1629. * @retval HAL status
  1630. */
  1631. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1632. uint32_t CommutationSource)
  1633. {
  1634. /* Check the parameters */
  1635. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1636. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1637. __HAL_LOCK(htim);
  1638. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1639. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1640. {
  1641. /* Select the Input trigger */
  1642. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1643. htim->Instance->SMCR |= InputTrigger;
  1644. }
  1645. /* Select the Capture Compare preload feature */
  1646. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1647. /* Select the Commutation event source */
  1648. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1649. htim->Instance->CR2 |= CommutationSource;
  1650. /* Enable the Commutation DMA Request */
  1651. /* Set the DMA Commutation Callback */
  1652. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
  1653. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
  1654. /* Set the DMA error callback */
  1655. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
  1656. /* Disable Commutation Interrupt */
  1657. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1658. /* Enable the Commutation DMA Request */
  1659. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
  1660. __HAL_UNLOCK(htim);
  1661. return HAL_OK;
  1662. }
  1663. /**
  1664. * @brief Configures the TIM in master mode.
  1665. * @param htim TIM handle.
  1666. * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
  1667. * contains the selected trigger output (TRGO) and the Master/Slave
  1668. * mode.
  1669. * @retval HAL status
  1670. */
  1671. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  1672. const TIM_MasterConfigTypeDef *sMasterConfig)
  1673. {
  1674. uint32_t tmpcr2;
  1675. uint32_t tmpsmcr;
  1676. /* Check the parameters */
  1677. assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  1678. assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  1679. assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  1680. /* Check input state */
  1681. __HAL_LOCK(htim);
  1682. /* Change the handler state */
  1683. htim->State = HAL_TIM_STATE_BUSY;
  1684. /* Get the TIMx CR2 register value */
  1685. tmpcr2 = htim->Instance->CR2;
  1686. /* Get the TIMx SMCR register value */
  1687. tmpsmcr = htim->Instance->SMCR;
  1688. /* Reset the MMS Bits */
  1689. tmpcr2 &= ~TIM_CR2_MMS;
  1690. /* Select the TRGO source */
  1691. tmpcr2 |= sMasterConfig->MasterOutputTrigger;
  1692. /* Update TIMx CR2 */
  1693. htim->Instance->CR2 = tmpcr2;
  1694. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1695. {
  1696. /* Reset the MSM Bit */
  1697. tmpsmcr &= ~TIM_SMCR_MSM;
  1698. /* Set master mode */
  1699. tmpsmcr |= sMasterConfig->MasterSlaveMode;
  1700. /* Update TIMx SMCR */
  1701. htim->Instance->SMCR = tmpsmcr;
  1702. }
  1703. /* Change the htim state */
  1704. htim->State = HAL_TIM_STATE_READY;
  1705. __HAL_UNLOCK(htim);
  1706. return HAL_OK;
  1707. }
  1708. /**
  1709. * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  1710. * and the AOE(automatic output enable).
  1711. * @param htim TIM handle
  1712. * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  1713. * contains the BDTR Register configuration information for the TIM peripheral.
  1714. * @note Interrupts can be generated when an active level is detected on the
  1715. * break input, the break 2 input or the system break input. Break
  1716. * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
  1717. * @retval HAL status
  1718. */
  1719. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  1720. const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
  1721. {
  1722. /* Keep this variable initialized to 0 as it is used to configure BDTR register */
  1723. uint32_t tmpbdtr = 0U;
  1724. /* Check the parameters */
  1725. assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1726. assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  1727. assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  1728. assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  1729. assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  1730. assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  1731. assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  1732. assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
  1733. /* Check input state */
  1734. __HAL_LOCK(htim);
  1735. /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
  1736. the OSSI State, the dead time value and the Automatic Output Enable Bit */
  1737. /* Set the BDTR bits */
  1738. MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  1739. MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  1740. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  1741. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  1742. MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  1743. MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  1744. MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  1745. /* Set TIMx_BDTR */
  1746. htim->Instance->BDTR = tmpbdtr;
  1747. __HAL_UNLOCK(htim);
  1748. return HAL_OK;
  1749. }
  1750. /**
  1751. * @brief Configures the TIMx Remapping input capabilities.
  1752. * @param htim TIM handle.
  1753. * @param Remap specifies the TIM remapping source.
  1754. *
  1755. * @retval HAL status
  1756. */
  1757. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
  1758. {
  1759. /* Prevent unused argument(s) compilation warning */
  1760. UNUSED(htim);
  1761. UNUSED(Remap);
  1762. return HAL_OK;
  1763. }
  1764. /**
  1765. * @}
  1766. */
  1767. /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  1768. * @brief Extended Callbacks functions
  1769. *
  1770. @verbatim
  1771. ==============================================================================
  1772. ##### Extended Callbacks functions #####
  1773. ==============================================================================
  1774. [..]
  1775. This section provides Extended TIM callback functions:
  1776. (+) Timer Commutation callback
  1777. (+) Timer Break callback
  1778. @endverbatim
  1779. * @{
  1780. */
  1781. /**
  1782. * @brief Hall commutation changed callback in non-blocking mode
  1783. * @param htim TIM handle
  1784. * @retval None
  1785. */
  1786. __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
  1787. {
  1788. /* Prevent unused argument(s) compilation warning */
  1789. UNUSED(htim);
  1790. /* NOTE : This function should not be modified, when the callback is needed,
  1791. the HAL_TIMEx_CommutCallback could be implemented in the user file
  1792. */
  1793. }
  1794. /**
  1795. * @brief Hall commutation changed half complete callback in non-blocking mode
  1796. * @param htim TIM handle
  1797. * @retval None
  1798. */
  1799. __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
  1800. {
  1801. /* Prevent unused argument(s) compilation warning */
  1802. UNUSED(htim);
  1803. /* NOTE : This function should not be modified, when the callback is needed,
  1804. the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
  1805. */
  1806. }
  1807. /**
  1808. * @brief Hall Break detection callback in non-blocking mode
  1809. * @param htim TIM handle
  1810. * @retval None
  1811. */
  1812. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  1813. {
  1814. /* Prevent unused argument(s) compilation warning */
  1815. UNUSED(htim);
  1816. /* NOTE : This function should not be modified, when the callback is needed,
  1817. the HAL_TIMEx_BreakCallback could be implemented in the user file
  1818. */
  1819. }
  1820. /**
  1821. * @}
  1822. */
  1823. /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  1824. * @brief Extended Peripheral State functions
  1825. *
  1826. @verbatim
  1827. ==============================================================================
  1828. ##### Extended Peripheral State functions #####
  1829. ==============================================================================
  1830. [..]
  1831. This subsection permits to get in run-time the status of the peripheral
  1832. and the data flow.
  1833. @endverbatim
  1834. * @{
  1835. */
  1836. /**
  1837. * @brief Return the TIM Hall Sensor interface handle state.
  1838. * @param htim TIM Hall Sensor handle
  1839. * @retval HAL state
  1840. */
  1841. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
  1842. {
  1843. return htim->State;
  1844. }
  1845. /**
  1846. * @brief Return actual state of the TIM complementary channel.
  1847. * @param htim TIM handle
  1848. * @param ChannelN TIM Complementary channel
  1849. * This parameter can be one of the following values:
  1850. * @arg TIM_CHANNEL_1: TIM Channel 1
  1851. * @arg TIM_CHANNEL_2: TIM Channel 2
  1852. * @arg TIM_CHANNEL_3: TIM Channel 3
  1853. * @retval TIM Complementary channel state
  1854. */
  1855. HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
  1856. {
  1857. HAL_TIM_ChannelStateTypeDef channel_state;
  1858. /* Check the parameters */
  1859. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
  1860. channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
  1861. return channel_state;
  1862. }
  1863. /**
  1864. * @}
  1865. */
  1866. /**
  1867. * @}
  1868. */
  1869. /* Private functions ---------------------------------------------------------*/
  1870. /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
  1871. * @{
  1872. */
  1873. /**
  1874. * @brief TIM DMA Commutation callback.
  1875. * @param hdma pointer to DMA handle.
  1876. * @retval None
  1877. */
  1878. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
  1879. {
  1880. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1881. /* Change the htim state */
  1882. htim->State = HAL_TIM_STATE_READY;
  1883. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1884. htim->CommutationCallback(htim);
  1885. #else
  1886. HAL_TIMEx_CommutCallback(htim);
  1887. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1888. }
  1889. /**
  1890. * @brief TIM DMA Commutation half complete callback.
  1891. * @param hdma pointer to DMA handle.
  1892. * @retval None
  1893. */
  1894. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
  1895. {
  1896. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1897. /* Change the htim state */
  1898. htim->State = HAL_TIM_STATE_READY;
  1899. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1900. htim->CommutationHalfCpltCallback(htim);
  1901. #else
  1902. HAL_TIMEx_CommutHalfCpltCallback(htim);
  1903. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1904. }
  1905. /**
  1906. * @brief TIM DMA Delay Pulse complete callback (complementary channel).
  1907. * @param hdma pointer to DMA handle.
  1908. * @retval None
  1909. */
  1910. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
  1911. {
  1912. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1913. if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  1914. {
  1915. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  1916. if (hdma->Init.Mode == DMA_NORMAL)
  1917. {
  1918. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1919. }
  1920. }
  1921. else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  1922. {
  1923. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  1924. if (hdma->Init.Mode == DMA_NORMAL)
  1925. {
  1926. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1927. }
  1928. }
  1929. else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  1930. {
  1931. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  1932. if (hdma->Init.Mode == DMA_NORMAL)
  1933. {
  1934. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  1935. }
  1936. }
  1937. else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
  1938. {
  1939. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  1940. if (hdma->Init.Mode == DMA_NORMAL)
  1941. {
  1942. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
  1943. }
  1944. }
  1945. else
  1946. {
  1947. /* nothing to do */
  1948. }
  1949. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1950. htim->PWM_PulseFinishedCallback(htim);
  1951. #else
  1952. HAL_TIM_PWM_PulseFinishedCallback(htim);
  1953. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1954. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  1955. }
  1956. /**
  1957. * @brief TIM DMA error callback (complementary channel)
  1958. * @param hdma pointer to DMA handle.
  1959. * @retval None
  1960. */
  1961. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
  1962. {
  1963. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1964. if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  1965. {
  1966. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  1967. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1968. }
  1969. else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  1970. {
  1971. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  1972. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1973. }
  1974. else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  1975. {
  1976. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  1977. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  1978. }
  1979. else
  1980. {
  1981. /* nothing to do */
  1982. }
  1983. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1984. htim->ErrorCallback(htim);
  1985. #else
  1986. HAL_TIM_ErrorCallback(htim);
  1987. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1988. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  1989. }
  1990. /**
  1991. * @brief Enables or disables the TIM Capture Compare Channel xN.
  1992. * @param TIMx to select the TIM peripheral
  1993. * @param Channel specifies the TIM Channel
  1994. * This parameter can be one of the following values:
  1995. * @arg TIM_CHANNEL_1: TIM Channel 1
  1996. * @arg TIM_CHANNEL_2: TIM Channel 2
  1997. * @arg TIM_CHANNEL_3: TIM Channel 3
  1998. * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
  1999. * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  2000. * @retval None
  2001. */
  2002. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
  2003. {
  2004. uint32_t tmp;
  2005. tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
  2006. /* Reset the CCxNE Bit */
  2007. TIMx->CCER &= ~tmp;
  2008. /* Set or reset the CCxNE Bit */
  2009. TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
  2010. }
  2011. /**
  2012. * @}
  2013. */
  2014. #endif /* HAL_TIM_MODULE_ENABLED */
  2015. /**
  2016. * @}
  2017. */
  2018. /**
  2019. * @}
  2020. */