stm32f1xx_ll_pwr.h 12 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_ll_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef __STM32F1xx_LL_PWR_H
  20. #define __STM32F1xx_LL_PWR_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f1xx.h"
  26. /** @addtogroup STM32F1xx_LL_Driver
  27. * @{
  28. */
  29. #if defined(PWR)
  30. /** @defgroup PWR_LL PWR
  31. * @{
  32. */
  33. /* Private types -------------------------------------------------------------*/
  34. /* Private variables ---------------------------------------------------------*/
  35. /* Private constants ---------------------------------------------------------*/
  36. /* Private macros ------------------------------------------------------------*/
  37. /* Exported types ------------------------------------------------------------*/
  38. /* Exported constants --------------------------------------------------------*/
  39. /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
  40. * @{
  41. */
  42. /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
  43. * @brief Flags defines which can be used with LL_PWR_WriteReg function
  44. * @{
  45. */
  46. #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
  47. #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
  48. /**
  49. * @}
  50. */
  51. /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
  52. * @brief Flags defines which can be used with LL_PWR_ReadReg function
  53. * @{
  54. */
  55. #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
  56. #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
  57. #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
  58. #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */
  59. /**
  60. * @}
  61. */
  62. /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
  63. * @{
  64. */
  65. #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
  66. #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
  67. #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
  68. /**
  69. * @}
  70. */
  71. /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
  72. * @{
  73. */
  74. #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
  75. #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
  76. /**
  77. * @}
  78. */
  79. /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
  80. * @{
  81. */
  82. #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
  83. #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
  84. #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
  85. #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
  86. #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
  87. #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
  88. #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
  89. #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
  90. /**
  91. * @}
  92. */
  93. /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
  94. * @{
  95. */
  96. #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */
  97. /**
  98. * @}
  99. */
  100. /**
  101. * @}
  102. */
  103. /* Exported macro ------------------------------------------------------------*/
  104. /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
  105. * @{
  106. */
  107. /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
  108. * @{
  109. */
  110. /**
  111. * @brief Write a value in PWR register
  112. * @param __REG__ Register to be written
  113. * @param __VALUE__ Value to be written in the register
  114. * @retval None
  115. */
  116. #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
  117. /**
  118. * @brief Read a value in PWR register
  119. * @param __REG__ Register to be read
  120. * @retval Register value
  121. */
  122. #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
  123. /**
  124. * @}
  125. */
  126. /**
  127. * @}
  128. */
  129. /* Exported functions --------------------------------------------------------*/
  130. /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
  131. * @{
  132. */
  133. /** @defgroup PWR_LL_EF_Configuration Configuration
  134. * @{
  135. */
  136. /**
  137. * @brief Enable access to the backup domain
  138. * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
  139. * @retval None
  140. */
  141. __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
  142. {
  143. SET_BIT(PWR->CR, PWR_CR_DBP);
  144. }
  145. /**
  146. * @brief Disable access to the backup domain
  147. * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
  148. * @retval None
  149. */
  150. __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
  151. {
  152. CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  153. }
  154. /**
  155. * @brief Check if the backup domain is enabled
  156. * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
  157. * @retval State of bit (1 or 0).
  158. */
  159. __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
  160. {
  161. return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
  162. }
  163. /**
  164. * @brief Set voltage Regulator mode during deep sleep mode
  165. * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
  166. * @param RegulMode This parameter can be one of the following values:
  167. * @arg @ref LL_PWR_REGU_DSMODE_MAIN
  168. * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  169. * @retval None
  170. */
  171. __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
  172. {
  173. MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
  174. }
  175. /**
  176. * @brief Get voltage Regulator mode during deep sleep mode
  177. * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
  178. * @retval Returned value can be one of the following values:
  179. * @arg @ref LL_PWR_REGU_DSMODE_MAIN
  180. * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  181. */
  182. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
  183. {
  184. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
  185. }
  186. /**
  187. * @brief Set Power Down mode when CPU enters deepsleep
  188. * @rmtoll CR PDDS LL_PWR_SetPowerMode\n
  189. * @rmtoll CR LPDS LL_PWR_SetPowerMode
  190. * @param PDMode This parameter can be one of the following values:
  191. * @arg @ref LL_PWR_MODE_STOP_MAINREGU
  192. * @arg @ref LL_PWR_MODE_STOP_LPREGU
  193. * @arg @ref LL_PWR_MODE_STANDBY
  194. * @retval None
  195. */
  196. __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
  197. {
  198. MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
  199. }
  200. /**
  201. * @brief Get Power Down mode when CPU enters deepsleep
  202. * @rmtoll CR PDDS LL_PWR_GetPowerMode\n
  203. * @rmtoll CR LPDS LL_PWR_GetPowerMode
  204. * @retval Returned value can be one of the following values:
  205. * @arg @ref LL_PWR_MODE_STOP_MAINREGU
  206. * @arg @ref LL_PWR_MODE_STOP_LPREGU
  207. * @arg @ref LL_PWR_MODE_STANDBY
  208. */
  209. __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
  210. {
  211. return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
  212. }
  213. /**
  214. * @brief Configure the voltage threshold detected by the Power Voltage Detector
  215. * @rmtoll CR PLS LL_PWR_SetPVDLevel
  216. * @param PVDLevel This parameter can be one of the following values:
  217. * @arg @ref LL_PWR_PVDLEVEL_0
  218. * @arg @ref LL_PWR_PVDLEVEL_1
  219. * @arg @ref LL_PWR_PVDLEVEL_2
  220. * @arg @ref LL_PWR_PVDLEVEL_3
  221. * @arg @ref LL_PWR_PVDLEVEL_4
  222. * @arg @ref LL_PWR_PVDLEVEL_5
  223. * @arg @ref LL_PWR_PVDLEVEL_6
  224. * @arg @ref LL_PWR_PVDLEVEL_7
  225. * @retval None
  226. */
  227. __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
  228. {
  229. MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
  230. }
  231. /**
  232. * @brief Get the voltage threshold detection
  233. * @rmtoll CR PLS LL_PWR_GetPVDLevel
  234. * @retval Returned value can be one of the following values:
  235. * @arg @ref LL_PWR_PVDLEVEL_0
  236. * @arg @ref LL_PWR_PVDLEVEL_1
  237. * @arg @ref LL_PWR_PVDLEVEL_2
  238. * @arg @ref LL_PWR_PVDLEVEL_3
  239. * @arg @ref LL_PWR_PVDLEVEL_4
  240. * @arg @ref LL_PWR_PVDLEVEL_5
  241. * @arg @ref LL_PWR_PVDLEVEL_6
  242. * @arg @ref LL_PWR_PVDLEVEL_7
  243. */
  244. __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
  245. {
  246. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
  247. }
  248. /**
  249. * @brief Enable Power Voltage Detector
  250. * @rmtoll CR PVDE LL_PWR_EnablePVD
  251. * @retval None
  252. */
  253. __STATIC_INLINE void LL_PWR_EnablePVD(void)
  254. {
  255. SET_BIT(PWR->CR, PWR_CR_PVDE);
  256. }
  257. /**
  258. * @brief Disable Power Voltage Detector
  259. * @rmtoll CR PVDE LL_PWR_DisablePVD
  260. * @retval None
  261. */
  262. __STATIC_INLINE void LL_PWR_DisablePVD(void)
  263. {
  264. CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
  265. }
  266. /**
  267. * @brief Check if Power Voltage Detector is enabled
  268. * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
  269. * @retval State of bit (1 or 0).
  270. */
  271. __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
  272. {
  273. return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
  274. }
  275. /**
  276. * @brief Enable the WakeUp PINx functionality
  277. * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin
  278. * @param WakeUpPin This parameter can be one of the following values:
  279. * @arg @ref LL_PWR_WAKEUP_PIN1
  280. * @retval None
  281. */
  282. __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
  283. {
  284. SET_BIT(PWR->CSR, WakeUpPin);
  285. }
  286. /**
  287. * @brief Disable the WakeUp PINx functionality
  288. * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin
  289. * @param WakeUpPin This parameter can be one of the following values:
  290. * @arg @ref LL_PWR_WAKEUP_PIN1
  291. * @retval None
  292. */
  293. __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
  294. {
  295. CLEAR_BIT(PWR->CSR, WakeUpPin);
  296. }
  297. /**
  298. * @brief Check if the WakeUp PINx functionality is enabled
  299. * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin
  300. * @param WakeUpPin This parameter can be one of the following values:
  301. * @arg @ref LL_PWR_WAKEUP_PIN1
  302. * @retval State of bit (1 or 0).
  303. */
  304. __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
  305. {
  306. return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
  307. }
  308. /**
  309. * @}
  310. */
  311. /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
  312. * @{
  313. */
  314. /**
  315. * @brief Get Wake-up Flag
  316. * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
  317. * @retval State of bit (1 or 0).
  318. */
  319. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
  320. {
  321. return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
  322. }
  323. /**
  324. * @brief Get Standby Flag
  325. * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
  326. * @retval State of bit (1 or 0).
  327. */
  328. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
  329. {
  330. return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
  331. }
  332. /**
  333. * @brief Indicate whether VDD voltage is below the selected PVD threshold
  334. * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
  335. * @retval State of bit (1 or 0).
  336. */
  337. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
  338. {
  339. return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
  340. }
  341. /**
  342. * @brief Clear Standby Flag
  343. * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
  344. * @retval None
  345. */
  346. __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
  347. {
  348. SET_BIT(PWR->CR, PWR_CR_CSBF);
  349. }
  350. /**
  351. * @brief Clear Wake-up Flags
  352. * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
  353. * @retval None
  354. */
  355. __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
  356. {
  357. SET_BIT(PWR->CR, PWR_CR_CWUF);
  358. }
  359. /**
  360. * @}
  361. */
  362. #if defined(USE_FULL_LL_DRIVER)
  363. /** @defgroup PWR_LL_EF_Init De-initialization function
  364. * @{
  365. */
  366. ErrorStatus LL_PWR_DeInit(void);
  367. /**
  368. * @}
  369. */
  370. #endif /* USE_FULL_LL_DRIVER */
  371. /**
  372. * @}
  373. */
  374. /**
  375. * @}
  376. */
  377. #endif /* defined(PWR) */
  378. /**
  379. * @}
  380. */
  381. #ifdef __cplusplus
  382. }
  383. #endif
  384. #endif /* __STM32F1xx_LL_PWR_H */