stm32f1xx_hal_pcd.h 37 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32F1xx_HAL_PCD_H
  20. #define STM32F1xx_HAL_PCD_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f1xx_ll_usb.h"
  26. #if defined (USB) || defined (USB_OTG_FS)
  27. /** @addtogroup STM32F1xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup PCD
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup PCD_Exported_Types PCD Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief PCD State structure definition
  39. */
  40. typedef enum
  41. {
  42. HAL_PCD_STATE_RESET = 0x00,
  43. HAL_PCD_STATE_READY = 0x01,
  44. HAL_PCD_STATE_ERROR = 0x02,
  45. HAL_PCD_STATE_BUSY = 0x03,
  46. HAL_PCD_STATE_TIMEOUT = 0x04
  47. } PCD_StateTypeDef;
  48. /* Device LPM suspend state */
  49. typedef enum
  50. {
  51. LPM_L0 = 0x00, /* on */
  52. LPM_L1 = 0x01, /* LPM L1 sleep */
  53. LPM_L2 = 0x02, /* suspend */
  54. LPM_L3 = 0x03, /* off */
  55. } PCD_LPM_StateTypeDef;
  56. typedef enum
  57. {
  58. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  59. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  60. } PCD_LPM_MsgTypeDef;
  61. typedef enum
  62. {
  63. PCD_BCD_ERROR = 0xFF,
  64. PCD_BCD_CONTACT_DETECTION = 0xFE,
  65. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  66. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  67. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  68. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  69. } PCD_BCD_MsgTypeDef;
  70. #if defined (USB)
  71. #endif /* defined (USB) */
  72. #if defined (USB_OTG_FS)
  73. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  74. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  75. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  76. #endif /* defined (USB_OTG_FS) */
  77. #if defined (USB)
  78. typedef USB_TypeDef PCD_TypeDef;
  79. typedef USB_CfgTypeDef PCD_InitTypeDef;
  80. typedef USB_EPTypeDef PCD_EPTypeDef;
  81. #endif /* defined (USB) */
  82. /**
  83. * @brief PCD Handle Structure definition
  84. */
  85. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  86. typedef struct __PCD_HandleTypeDef
  87. #else
  88. typedef struct
  89. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  90. {
  91. PCD_TypeDef *Instance; /*!< Register base address */
  92. PCD_InitTypeDef Init; /*!< PCD required parameters */
  93. __IO uint8_t USB_Address; /*!< USB Address */
  94. #if defined (USB_OTG_FS)
  95. PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
  96. PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
  97. #endif /* defined (USB_OTG_FS) */
  98. #if defined (USB)
  99. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  100. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  101. #endif /* defined (USB) */
  102. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  103. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  104. __IO uint32_t ErrorCode; /*!< PCD Error code */
  105. uint32_t Setup[12]; /*!< Setup packet buffer */
  106. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  107. uint32_t BESL;
  108. uint32_t FrameNumber; /*!< Store Current Frame number */
  109. void *pData; /*!< Pointer to upper stack Handler */
  110. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  111. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  112. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  113. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  114. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  115. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  116. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  117. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  118. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  119. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  120. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  121. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  122. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  123. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  124. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  125. } PCD_HandleTypeDef;
  126. /**
  127. * @}
  128. */
  129. /* Include PCD HAL Extended module */
  130. #include "stm32f1xx_hal_pcd_ex.h"
  131. /* Exported constants --------------------------------------------------------*/
  132. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  133. * @{
  134. */
  135. /** @defgroup PCD_Speed PCD Speed
  136. * @{
  137. */
  138. #define PCD_SPEED_FULL USBD_FS_SPEED
  139. /**
  140. * @}
  141. */
  142. /** @defgroup PCD_PHY_Module PCD PHY Module
  143. * @{
  144. */
  145. #define PCD_PHY_ULPI 1U
  146. #define PCD_PHY_EMBEDDED 2U
  147. #define PCD_PHY_UTMI 3U
  148. /**
  149. * @}
  150. */
  151. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  152. * @brief PCD Error Code definition
  153. * @{
  154. */
  155. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  156. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  157. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  158. /**
  159. * @}
  160. */
  161. /**
  162. * @}
  163. */
  164. /* Exported macros -----------------------------------------------------------*/
  165. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  166. * @brief macros to handle interrupts and specific clock configurations
  167. * @{
  168. */
  169. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  170. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  171. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
  172. ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  173. #if defined (USB_OTG_FS)
  174. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
  175. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  176. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
  177. *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
  178. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
  179. *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  180. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
  181. ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
  182. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
  183. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  184. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  185. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
  186. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  187. do { \
  188. EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  189. EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  190. } while(0U)
  191. #endif /* defined (USB_OTG_FS) */
  192. #if defined (USB)
  193. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
  194. &= (uint16_t)(~(__INTERRUPT__)))
  195. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  196. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  197. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  198. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  199. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  200. do { \
  201. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  202. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  203. } while(0U)
  204. #endif /* defined (USB) */
  205. /**
  206. * @}
  207. */
  208. /* Exported functions --------------------------------------------------------*/
  209. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  210. * @{
  211. */
  212. /* Initialization/de-initialization functions ********************************/
  213. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  214. * @{
  215. */
  216. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  217. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  218. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  219. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  220. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  221. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  222. * @brief HAL USB OTG PCD Callback ID enumeration definition
  223. * @{
  224. */
  225. typedef enum
  226. {
  227. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  228. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  229. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  230. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  231. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  232. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  233. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  234. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  235. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  236. } HAL_PCD_CallbackIDTypeDef;
  237. /**
  238. * @}
  239. */
  240. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  241. * @brief HAL USB OTG PCD Callback pointer definition
  242. * @{
  243. */
  244. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  245. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  246. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  247. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  248. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  249. /**
  250. * @}
  251. */
  252. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
  253. pPCD_CallbackTypeDef pCallback);
  254. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  255. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  256. pPCD_DataOutStageCallbackTypeDef pCallback);
  257. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  258. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  259. pPCD_DataInStageCallbackTypeDef pCallback);
  260. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  261. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  262. pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  263. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  264. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  265. pPCD_IsoInIncpltCallbackTypeDef pCallback);
  266. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  267. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  268. /**
  269. * @}
  270. */
  271. /* I/O operation functions ***************************************************/
  272. /* Non-Blocking mode: Interrupt */
  273. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  274. * @{
  275. */
  276. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  277. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  278. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  279. void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
  280. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  281. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  282. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  283. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  284. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  285. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  286. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  287. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  288. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  289. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  290. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  291. /**
  292. * @}
  293. */
  294. /* Peripheral Control functions **********************************************/
  295. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  296. * @{
  297. */
  298. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  299. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  300. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  301. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  302. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  303. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  304. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  305. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  306. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  307. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  308. HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  309. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  310. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  311. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
  312. /**
  313. * @}
  314. */
  315. /* Peripheral State functions ************************************************/
  316. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  317. * @{
  318. */
  319. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
  320. /**
  321. * @}
  322. */
  323. /**
  324. * @}
  325. */
  326. /* Private constants ---------------------------------------------------------*/
  327. /** @defgroup PCD_Private_Constants PCD Private Constants
  328. * @{
  329. */
  330. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  331. * @{
  332. */
  333. #if defined (USB_OTG_FS)
  334. #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  335. #endif /* defined (USB_OTG_FS) */
  336. #if defined (USB)
  337. #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  338. #endif /* defined (USB) */
  339. /**
  340. * @}
  341. */
  342. #if defined (USB)
  343. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  344. * @{
  345. */
  346. #define PCD_EP0MPS_64 EP_MPS_64
  347. #define PCD_EP0MPS_32 EP_MPS_32
  348. #define PCD_EP0MPS_16 EP_MPS_16
  349. #define PCD_EP0MPS_08 EP_MPS_8
  350. /**
  351. * @}
  352. */
  353. /** @defgroup PCD_ENDP PCD ENDP
  354. * @{
  355. */
  356. #define PCD_ENDP0 0U
  357. #define PCD_ENDP1 1U
  358. #define PCD_ENDP2 2U
  359. #define PCD_ENDP3 3U
  360. #define PCD_ENDP4 4U
  361. #define PCD_ENDP5 5U
  362. #define PCD_ENDP6 6U
  363. #define PCD_ENDP7 7U
  364. /**
  365. * @}
  366. */
  367. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  368. * @{
  369. */
  370. #define PCD_SNG_BUF 0U
  371. #define PCD_DBL_BUF 1U
  372. /**
  373. * @}
  374. */
  375. #endif /* defined (USB) */
  376. /**
  377. * @}
  378. */
  379. #if defined (USB_OTG_FS)
  380. #ifndef USB_OTG_DOEPINT_OTEPSPR
  381. #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */
  382. #endif /* defined USB_OTG_DOEPINT_OTEPSPR */
  383. #ifndef USB_OTG_DOEPMSK_OTEPSPRM
  384. #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */
  385. #endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */
  386. #ifndef USB_OTG_DOEPINT_NAK
  387. #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */
  388. #endif /* defined USB_OTG_DOEPINT_NAK */
  389. #ifndef USB_OTG_DOEPMSK_NAKM
  390. #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */
  391. #endif /* defined USB_OTG_DOEPMSK_NAKM */
  392. #ifndef USB_OTG_DOEPINT_STPKTRX
  393. #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */
  394. #endif /* defined USB_OTG_DOEPINT_STPKTRX */
  395. #ifndef USB_OTG_DOEPMSK_NYETM
  396. #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */
  397. #endif /* defined USB_OTG_DOEPMSK_NYETM */
  398. #endif /* defined (USB_OTG_FS) */
  399. /* Private macros ------------------------------------------------------------*/
  400. /** @defgroup PCD_Private_Macros PCD Private Macros
  401. * @{
  402. */
  403. #if defined (USB)
  404. /******************** Bit definition for USB_COUNTn_RX register *************/
  405. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  406. #define USB_CNTRX_BLSIZE (0x1U << 15)
  407. /* SetENDPOINT */
  408. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
  409. (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  410. /* GetENDPOINT */
  411. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  412. /**
  413. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  414. * @param USBx USB peripheral instance register address.
  415. * @param bEpNum Endpoint Number.
  416. * @param wType Endpoint Type.
  417. * @retval None
  418. */
  419. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
  420. (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  421. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  422. /**
  423. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  424. * @param USBx USB peripheral instance register address.
  425. * @param bEpNum Endpoint Number.
  426. * @retval Endpoint Type
  427. */
  428. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  429. /**
  430. * @brief free buffer used from the application realizing it to the line
  431. * toggles bit SW_BUF in the double buffered endpoint register
  432. * @param USBx USB device.
  433. * @param bEpNum, bDir
  434. * @retval None
  435. */
  436. #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
  437. do { \
  438. if ((bDir) == 0U) \
  439. { \
  440. /* OUT double buffered endpoint */ \
  441. PCD_TX_DTOG((USBx), (bEpNum)); \
  442. } \
  443. else if ((bDir) == 1U) \
  444. { \
  445. /* IN double buffered endpoint */ \
  446. PCD_RX_DTOG((USBx), (bEpNum)); \
  447. } \
  448. } while(0)
  449. /**
  450. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  451. * @param USBx USB peripheral instance register address.
  452. * @param bEpNum Endpoint Number.
  453. * @param wState new state
  454. * @retval None
  455. */
  456. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  457. do { \
  458. uint16_t _wRegVal; \
  459. \
  460. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  461. /* toggle first bit ? */ \
  462. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  463. { \
  464. _wRegVal ^= USB_EPTX_DTOG1; \
  465. } \
  466. /* toggle second bit ? */ \
  467. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  468. { \
  469. _wRegVal ^= USB_EPTX_DTOG2; \
  470. } \
  471. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  472. } while(0) /* PCD_SET_EP_TX_STATUS */
  473. /**
  474. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  475. * @param USBx USB peripheral instance register address.
  476. * @param bEpNum Endpoint Number.
  477. * @param wState new state
  478. * @retval None
  479. */
  480. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  481. do { \
  482. uint16_t _wRegVal; \
  483. \
  484. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  485. /* toggle first bit ? */ \
  486. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  487. { \
  488. _wRegVal ^= USB_EPRX_DTOG1; \
  489. } \
  490. /* toggle second bit ? */ \
  491. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  492. { \
  493. _wRegVal ^= USB_EPRX_DTOG2; \
  494. } \
  495. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  496. } while(0) /* PCD_SET_EP_RX_STATUS */
  497. /**
  498. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  499. * @param USBx USB peripheral instance register address.
  500. * @param bEpNum Endpoint Number.
  501. * @param wStaterx new state.
  502. * @param wStatetx new state.
  503. * @retval None
  504. */
  505. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  506. do { \
  507. uint16_t _wRegVal; \
  508. \
  509. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  510. /* toggle first bit ? */ \
  511. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  512. { \
  513. _wRegVal ^= USB_EPRX_DTOG1; \
  514. } \
  515. /* toggle second bit ? */ \
  516. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  517. { \
  518. _wRegVal ^= USB_EPRX_DTOG2; \
  519. } \
  520. /* toggle first bit ? */ \
  521. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  522. { \
  523. _wRegVal ^= USB_EPTX_DTOG1; \
  524. } \
  525. /* toggle second bit ? */ \
  526. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  527. { \
  528. _wRegVal ^= USB_EPTX_DTOG2; \
  529. } \
  530. \
  531. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  532. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  533. /**
  534. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  535. * /STAT_RX[1:0])
  536. * @param USBx USB peripheral instance register address.
  537. * @param bEpNum Endpoint Number.
  538. * @retval status
  539. */
  540. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  541. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  542. /**
  543. * @brief sets directly the VALID tx/rx-status into the endpoint register
  544. * @param USBx USB peripheral instance register address.
  545. * @param bEpNum Endpoint Number.
  546. * @retval None
  547. */
  548. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  549. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  550. /**
  551. * @brief checks stall condition in an endpoint.
  552. * @param USBx USB peripheral instance register address.
  553. * @param bEpNum Endpoint Number.
  554. * @retval TRUE = endpoint in stall condition.
  555. */
  556. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  557. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  558. /**
  559. * @brief set & clear EP_KIND bit.
  560. * @param USBx USB peripheral instance register address.
  561. * @param bEpNum Endpoint Number.
  562. * @retval None
  563. */
  564. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  565. do { \
  566. uint16_t _wRegVal; \
  567. \
  568. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  569. \
  570. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  571. } while(0) /* PCD_SET_EP_KIND */
  572. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  573. do { \
  574. uint16_t _wRegVal; \
  575. \
  576. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  577. \
  578. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  579. } while(0) /* PCD_CLEAR_EP_KIND */
  580. /**
  581. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  582. * @param USBx USB peripheral instance register address.
  583. * @param bEpNum Endpoint Number.
  584. * @retval None
  585. */
  586. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  587. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  588. /**
  589. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  590. * @param USBx USB peripheral instance register address.
  591. * @param bEpNum Endpoint Number.
  592. * @retval None
  593. */
  594. #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  595. #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  596. /**
  597. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  598. * @param USBx USB peripheral instance register address.
  599. * @param bEpNum Endpoint Number.
  600. * @retval None
  601. */
  602. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  603. do { \
  604. uint16_t _wRegVal; \
  605. \
  606. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  607. \
  608. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  609. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  610. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  611. do { \
  612. uint16_t _wRegVal; \
  613. \
  614. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  615. \
  616. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  617. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  618. /**
  619. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  620. * @param USBx USB peripheral instance register address.
  621. * @param bEpNum Endpoint Number.
  622. * @retval None
  623. */
  624. #define PCD_RX_DTOG(USBx, bEpNum) \
  625. do { \
  626. uint16_t _wEPVal; \
  627. \
  628. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  629. \
  630. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  631. } while(0) /* PCD_RX_DTOG */
  632. #define PCD_TX_DTOG(USBx, bEpNum) \
  633. do { \
  634. uint16_t _wEPVal; \
  635. \
  636. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  637. \
  638. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  639. } while(0) /* PCD_TX_DTOG */
  640. /**
  641. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  642. * @param USBx USB peripheral instance register address.
  643. * @param bEpNum Endpoint Number.
  644. * @retval None
  645. */
  646. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  647. do { \
  648. uint16_t _wRegVal; \
  649. \
  650. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  651. \
  652. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  653. { \
  654. PCD_RX_DTOG((USBx), (bEpNum)); \
  655. } \
  656. } while(0) /* PCD_CLEAR_RX_DTOG */
  657. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  658. do { \
  659. uint16_t _wRegVal; \
  660. \
  661. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  662. \
  663. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  664. { \
  665. PCD_TX_DTOG((USBx), (bEpNum)); \
  666. } \
  667. } while(0) /* PCD_CLEAR_TX_DTOG */
  668. /**
  669. * @brief Sets address in an endpoint register.
  670. * @param USBx USB peripheral instance register address.
  671. * @param bEpNum Endpoint Number.
  672. * @param bAddr Address.
  673. * @retval None
  674. */
  675. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  676. do { \
  677. uint16_t _wRegVal; \
  678. \
  679. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  680. \
  681. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  682. } while(0) /* PCD_SET_EP_ADDRESS */
  683. /**
  684. * @brief Gets address in an endpoint register.
  685. * @param USBx USB peripheral instance register address.
  686. * @param bEpNum Endpoint Number.
  687. * @retval None
  688. */
  689. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  690. #define PCD_EP_TX_CNT(USBx, bEpNum) \
  691. ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  692. ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  693. #define PCD_EP_RX_CNT(USBx, bEpNum) \
  694. ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  695. ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  696. /**
  697. * @brief sets address of the tx/rx buffer.
  698. * @param USBx USB peripheral instance register address.
  699. * @param bEpNum Endpoint Number.
  700. * @param wAddr address to be set (must be word aligned).
  701. * @retval None
  702. */
  703. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  704. do { \
  705. __IO uint16_t *_wRegVal; \
  706. uint32_t _wRegBase = (uint32_t)USBx; \
  707. \
  708. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  709. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  710. *_wRegVal = ((wAddr) >> 1) << 1; \
  711. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  712. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  713. do { \
  714. __IO uint16_t *_wRegVal; \
  715. uint32_t _wRegBase = (uint32_t)USBx; \
  716. \
  717. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  718. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  719. *_wRegVal = ((wAddr) >> 1) << 1; \
  720. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  721. /**
  722. * @brief Gets address of the tx/rx buffer.
  723. * @param USBx USB peripheral instance register address.
  724. * @param bEpNum Endpoint Number.
  725. * @retval address of the buffer.
  726. */
  727. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  728. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  729. /**
  730. * @brief Sets counter of rx buffer with no. of blocks.
  731. * @param pdwReg Register pointer
  732. * @param wCount Counter.
  733. * @param wNBlocks no. of Blocks.
  734. * @retval None
  735. */
  736. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  737. do { \
  738. (wNBlocks) = (wCount) >> 5; \
  739. if (((wCount) & 0x1fU) == 0U) \
  740. { \
  741. (wNBlocks)--; \
  742. } \
  743. *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  744. } while(0) /* PCD_CALC_BLK32 */
  745. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  746. do { \
  747. (wNBlocks) = (wCount) >> 1; \
  748. if (((wCount) & 0x1U) != 0U) \
  749. { \
  750. (wNBlocks)++; \
  751. } \
  752. *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
  753. } while(0) /* PCD_CALC_BLK2 */
  754. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  755. do { \
  756. uint32_t wNBlocks; \
  757. \
  758. *(pdwReg) &= 0x3FFU; \
  759. \
  760. if ((wCount) > 62U) \
  761. { \
  762. PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  763. } \
  764. else \
  765. { \
  766. if ((wCount) == 0U) \
  767. { \
  768. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  769. } \
  770. else \
  771. { \
  772. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  773. } \
  774. } \
  775. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  776. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  777. do { \
  778. uint32_t _wRegBase = (uint32_t)(USBx); \
  779. __IO uint16_t *pdwReg; \
  780. \
  781. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  782. pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  783. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  784. } while(0)
  785. /**
  786. * @brief sets counter for the tx/rx buffer.
  787. * @param USBx USB peripheral instance register address.
  788. * @param bEpNum Endpoint Number.
  789. * @param wCount Counter value.
  790. * @retval None
  791. */
  792. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  793. do { \
  794. uint32_t _wRegBase = (uint32_t)(USBx); \
  795. __IO uint16_t *_wRegVal; \
  796. \
  797. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  798. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  799. *_wRegVal = (uint16_t)(wCount); \
  800. } while(0)
  801. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  802. do { \
  803. uint32_t _wRegBase = (uint32_t)(USBx); \
  804. __IO uint16_t *_wRegVal; \
  805. \
  806. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  807. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  808. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  809. } while(0)
  810. /**
  811. * @brief gets counter of the tx buffer.
  812. * @param USBx USB peripheral instance register address.
  813. * @param bEpNum Endpoint Number.
  814. * @retval Counter value
  815. */
  816. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  817. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  818. /**
  819. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  820. * @param USBx USB peripheral instance register address.
  821. * @param bEpNum Endpoint Number.
  822. * @param wBuf0Addr buffer 0 address.
  823. * @retval Counter value
  824. */
  825. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  826. do { \
  827. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  828. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  829. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  830. do { \
  831. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  832. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  833. /**
  834. * @brief Sets addresses in a double buffer endpoint.
  835. * @param USBx USB peripheral instance register address.
  836. * @param bEpNum Endpoint Number.
  837. * @param wBuf0Addr: buffer 0 address.
  838. * @param wBuf1Addr = buffer 1 address.
  839. * @retval None
  840. */
  841. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  842. do { \
  843. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  844. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  845. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  846. /**
  847. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  848. * @param USBx USB peripheral instance register address.
  849. * @param bEpNum Endpoint Number.
  850. * @retval None
  851. */
  852. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  853. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  854. /**
  855. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  856. * @param USBx USB peripheral instance register address.
  857. * @param bEpNum Endpoint Number.
  858. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  859. * EP_DBUF_IN = IN
  860. * @param wCount: Counter value
  861. * @retval None
  862. */
  863. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  864. do { \
  865. if ((bDir) == 0U) \
  866. /* OUT endpoint */ \
  867. { \
  868. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  869. } \
  870. else \
  871. { \
  872. if ((bDir) == 1U) \
  873. { \
  874. /* IN endpoint */ \
  875. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  876. } \
  877. } \
  878. } while(0) /* SetEPDblBuf0Count*/
  879. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  880. do { \
  881. uint32_t _wBase = (uint32_t)(USBx); \
  882. __IO uint16_t *_wEPRegVal; \
  883. \
  884. if ((bDir) == 0U) \
  885. { \
  886. /* OUT endpoint */ \
  887. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  888. } \
  889. else \
  890. { \
  891. if ((bDir) == 1U) \
  892. { \
  893. /* IN endpoint */ \
  894. _wBase += (uint32_t)(USBx)->BTABLE; \
  895. _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  896. *_wEPRegVal = (uint16_t)(wCount); \
  897. } \
  898. } \
  899. } while(0) /* SetEPDblBuf1Count */
  900. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  901. do { \
  902. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  903. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  904. } while(0) /* PCD_SET_EP_DBUF_CNT */
  905. /**
  906. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  907. * @param USBx USB peripheral instance register address.
  908. * @param bEpNum Endpoint Number.
  909. * @retval None
  910. */
  911. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  912. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  913. #endif /* defined (USB) */
  914. /**
  915. * @}
  916. */
  917. /**
  918. * @}
  919. */
  920. /**
  921. * @}
  922. */
  923. #endif /* defined (USB) || defined (USB_OTG_FS) */
  924. #ifdef __cplusplus
  925. }
  926. #endif
  927. #endif /* STM32F1xx_HAL_PCD_H */