stm32f1xx_hal_adc_ex.h 46 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_adc_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of ADC HAL extension module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef __STM32F1xx_HAL_ADC_EX_H
  20. #define __STM32F1xx_HAL_ADC_EX_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f1xx_hal_def.h"
  26. /** @addtogroup STM32F1xx_HAL_Driver
  27. * @{
  28. */
  29. /** @addtogroup ADCEx
  30. * @{
  31. */
  32. /* Exported types ------------------------------------------------------------*/
  33. /** @defgroup ADCEx_Exported_Types ADCEx Exported Types
  34. * @{
  35. */
  36. /**
  37. * @brief ADC Configuration injected Channel structure definition
  38. * @note Parameters of this structure are shared within 2 scopes:
  39. * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
  40. * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
  41. * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
  42. * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
  43. * ADC state can be either:
  44. * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
  45. * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
  46. */
  47. typedef struct
  48. {
  49. uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
  50. This parameter can be a value of @ref ADC_channels
  51. Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
  52. Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
  53. Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
  54. It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
  55. Refer to errata sheet of these devices for more details. */
  56. uint32_t InjectedRank; /*!< Rank in the injected group sequencer
  57. This parameter must be a value of @ref ADCEx_injected_rank
  58. Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
  59. uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
  60. Unit: ADC clock cycles
  61. Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
  62. This parameter can be a value of @ref ADC_sampling_times
  63. Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
  64. If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
  65. Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
  66. sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
  67. Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
  68. uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
  69. Offset value must be a positive number.
  70. Depending of ADC resolution selected (12, 10, 8 or 6 bits),
  71. this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
  72. uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
  73. To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
  74. This parameter must be a number between Min_Data = 1 and Max_Data = 4.
  75. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  76. configure a channel on injected group can impact the configuration of other channels previously set. */
  77. FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
  78. Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
  79. Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
  80. This parameter can be set to ENABLE or DISABLE.
  81. Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
  82. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  83. configure a channel on injected group can impact the configuration of other channels previously set. */
  84. FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
  85. This parameter can be set to ENABLE or DISABLE.
  86. Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
  87. Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
  88. Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
  89. To maintain JAUTO always enabled, DMA must be configured in circular mode.
  90. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  91. configure a channel on injected group can impact the configuration of other channels previously set. */
  92. uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
  93. If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
  94. If set to external trigger source, triggering is on event rising edge.
  95. This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
  96. Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
  97. If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
  98. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  99. configure a channel on injected group can impact the configuration of other channels previously set. */
  100. }ADC_InjectionConfTypeDef;
  101. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  102. /**
  103. * @brief Structure definition of ADC multimode
  104. * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
  105. * State of ADCs of the common group must be: disabled.
  106. */
  107. typedef struct
  108. {
  109. uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
  110. This parameter can be a value of @ref ADCEx_Common_mode
  111. Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
  112. Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
  113. Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
  114. Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
  115. The equivalences are:
  116. - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
  117. - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
  118. }ADC_MultiModeTypeDef;
  119. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  120. /**
  121. * @}
  122. */
  123. /* Exported constants --------------------------------------------------------*/
  124. /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
  125. * @{
  126. */
  127. /** @defgroup ADCEx_injected_rank ADCEx rank into injected group
  128. * @{
  129. */
  130. #define ADC_INJECTED_RANK_1 0x00000001U
  131. #define ADC_INJECTED_RANK_2 0x00000002U
  132. #define ADC_INJECTED_RANK_3 0x00000003U
  133. #define ADC_INJECTED_RANK_4 0x00000004U
  134. /**
  135. * @}
  136. */
  137. /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
  138. * @{
  139. */
  140. #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE 0x00000000U
  141. #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG)
  142. /**
  143. * @}
  144. */
  145. /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
  146. * @{
  147. */
  148. /*!< List of external triggers with generic trigger name, independently of */
  149. /* ADC target, sorted by trigger name: */
  150. /*!< External triggers of regular group for ADC1&ADC2 only */
  151. #define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
  152. #define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2
  153. #define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2
  154. #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
  155. #define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4
  156. #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11
  157. #if defined (STM32F103xE) || defined (STM32F103xG)
  158. /*!< External triggers of regular group for ADC3 only */
  159. #define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3
  160. #define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1
  161. #define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1
  162. #define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3
  163. #define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1
  164. #endif /* STM32F103xE || defined STM32F103xG */
  165. /*!< External triggers of regular group for all ADC instances */
  166. #define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3
  167. #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
  168. /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
  169. /* XL-density devices. */
  170. /* To use it on ADC or ADC2, a remap of trigger must be done from */
  171. /* EXTI line 11 to TIM8_TRGO with macro: */
  172. /* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */
  173. /* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */
  174. /* Note for internal constant value management: If TIM8_TRGO is available, */
  175. /* its definition is set to value for ADC1&ADC2 by default and changed to */
  176. /* value for ADC3 by HAL ADC driver if ADC3 is selected. */
  177. #define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO
  178. #endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
  179. #define ADC_SOFTWARE_START ADC1_2_3_SWSTART
  180. /**
  181. * @}
  182. */
  183. /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
  184. * @{
  185. */
  186. /*!< List of external triggers with generic trigger name, independently of */
  187. /* ADC target, sorted by trigger name: */
  188. /*!< External triggers of injected group for ADC1&ADC2 only */
  189. #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
  190. #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
  191. #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
  192. #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
  193. #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
  194. #if defined (STM32F103xE) || defined (STM32F103xG)
  195. /*!< External triggers of injected group for ADC3 only */
  196. #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3
  197. #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2
  198. #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO
  199. #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4
  200. #endif /* STM32F103xE || defined STM32F103xG */
  201. /*!< External triggers of injected group for all ADC instances */
  202. #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
  203. #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
  204. #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
  205. /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
  206. /* XL-density devices. */
  207. /* To use it on ADC1 or ADC2, a remap of trigger must be done from */
  208. /* EXTI line 11 to TIM8_CC4 with macro: */
  209. /* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */
  210. /* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */
  211. /* Note for internal constant value management: If TIM8_CC4 is available, */
  212. /* its definition is set to value for ADC1&ADC2 by default and changed to */
  213. /* value for ADC3 by HAL ADC driver if ADC3 is selected. */
  214. #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4
  215. #endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
  216. #define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART
  217. /**
  218. * @}
  219. */
  220. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  221. /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
  222. * @{
  223. */
  224. #define ADC_MODE_INDEPENDENT 0x00000000U /*!< ADC dual mode disabled (ADC independent mode) */
  225. #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
  226. #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
  227. #define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
  228. #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
  229. #define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
  230. #define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
  231. #define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
  232. #define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
  233. #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
  234. /**
  235. * @}
  236. */
  237. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  238. /**
  239. * @}
  240. */
  241. /* Private constants ---------------------------------------------------------*/
  242. /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
  243. * @{
  244. */
  245. /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
  246. * @{
  247. */
  248. /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */
  249. /* instance is available on the selected device). */
  250. /* (used internally by HAL driver. To not use into HAL structure parameters) */
  251. /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
  252. #define ADC1_2_EXTERNALTRIG_T1_CC1 0x00000000U
  253. #define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0))
  254. #define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
  255. #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 ))
  256. #define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
  257. #define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 ))
  258. #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
  259. /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
  260. /* XL-density devices. */
  261. #define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11
  262. #endif
  263. #if defined (STM32F103xE) || defined (STM32F103xG)
  264. /* External triggers of regular group for ADC3 */
  265. #define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
  266. #define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2
  267. #define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2
  268. #define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
  269. #define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4
  270. #define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11
  271. #endif
  272. /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
  273. #define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 ))
  274. #define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
  275. /**
  276. * @}
  277. */
  278. /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
  279. * @{
  280. */
  281. /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */
  282. /* instance is available on the selected device). */
  283. /* (used internally by HAL driver. To not use into HAL structure parameters) */
  284. /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
  285. #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 ))
  286. #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  287. #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 ))
  288. #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
  289. #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 ))
  290. #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
  291. /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
  292. /* XL-density devices. */
  293. #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
  294. #endif
  295. #if defined (STM32F103xE) || defined (STM32F103xG)
  296. /* External triggers of injected group for ADC3 */
  297. #define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
  298. #define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
  299. #define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
  300. #define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
  301. #define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
  302. #endif /* STM32F103xE || defined STM32F103xG */
  303. /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
  304. #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO 0x00000000U
  305. #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0))
  306. #define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  307. /**
  308. * @}
  309. */
  310. /**
  311. * @}
  312. */
  313. /* Exported macro ------------------------------------------------------------*/
  314. /* Private macro -------------------------------------------------------------*/
  315. /** @defgroup ADCEx_Private_Macro ADCEx Private Macro
  316. * @{
  317. */
  318. /* Macro reserved for internal HAL driver usage, not intended to be used in */
  319. /* code of final user. */
  320. /**
  321. * @brief For devices with 3 ADCs: Defines the external trigger source
  322. * for regular group according to ADC into common group ADC1&ADC2 or
  323. * ADC3 (some triggers with same source have different value to
  324. * be programmed into ADC EXTSEL bits of CR2 register).
  325. * For devices with 2 ADCs or less: this macro makes no change.
  326. * @param __HANDLE__: ADC handle
  327. * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
  328. * @retval External trigger to be programmed into EXTSEL bits of CR2 register
  329. */
  330. #if defined (STM32F103xE) || defined (STM32F103xG)
  331. #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
  332. (( (((__HANDLE__)->Instance) == ADC3) \
  333. )? \
  334. ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \
  335. )? \
  336. (ADC3_EXTERNALTRIG_T8_TRGO) \
  337. : \
  338. (__EXT_TRIG_CONV__) \
  339. ) \
  340. : \
  341. (__EXT_TRIG_CONV__) \
  342. )
  343. #else
  344. #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
  345. (__EXT_TRIG_CONV__)
  346. #endif /* STM32F103xE || STM32F103xG */
  347. /**
  348. * @brief For devices with 3 ADCs: Defines the external trigger source
  349. * for injected group according to ADC into common group ADC1&ADC2 or
  350. * ADC3 (some triggers with same source have different value to
  351. * be programmed into ADC JEXTSEL bits of CR2 register).
  352. * For devices with 2 ADCs or less: this macro makes no change.
  353. * @param __HANDLE__: ADC handle
  354. * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
  355. * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
  356. */
  357. #if defined (STM32F103xE) || defined (STM32F103xG)
  358. #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
  359. (( (((__HANDLE__)->Instance) == ADC3) \
  360. )? \
  361. ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \
  362. )? \
  363. (ADC3_EXTERNALTRIGINJEC_T8_CC4) \
  364. : \
  365. (__EXT_TRIG_INJECTCONV__) \
  366. ) \
  367. : \
  368. (__EXT_TRIG_INJECTCONV__) \
  369. )
  370. #else
  371. #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
  372. (__EXT_TRIG_INJECTCONV__)
  373. #endif /* STM32F103xE || STM32F103xG */
  374. /**
  375. * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
  376. * @param __HANDLE__: ADC handle
  377. * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
  378. */
  379. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  380. #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
  381. (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \
  382. )? \
  383. (ADC1->CR1 & ADC_CR1_DUALMOD) \
  384. : \
  385. (RESET) \
  386. )
  387. #else
  388. #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
  389. (RESET)
  390. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  391. /**
  392. * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
  393. * @param __HANDLE__: ADC handle
  394. * @retval None
  395. */
  396. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  397. #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
  398. (( (((__HANDLE__)->Instance) == ADC2) \
  399. )? \
  400. ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \
  401. : \
  402. (!RESET) \
  403. )
  404. #else
  405. #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
  406. (!RESET)
  407. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  408. /**
  409. * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
  410. * @param __HANDLE__: ADC handle
  411. * @retval None
  412. */
  413. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  414. #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \
  415. (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \
  416. )? \
  417. (ADC1->CR1 & ADC_CR1_JAUTO) \
  418. : \
  419. (RESET) \
  420. )
  421. #else
  422. #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \
  423. (RESET)
  424. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  425. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  426. /**
  427. * @brief Set handle of the other ADC sharing the common multimode settings
  428. * @param __HANDLE__: ADC handle
  429. * @param __HANDLE_OTHER_ADC__: other ADC handle
  430. * @retval None
  431. */
  432. #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \
  433. ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
  434. /**
  435. * @brief Set handle of the ADC slave associated to the ADC master
  436. * On STM32F1 devices, ADC slave is always ADC2 (this can be different
  437. * on other STM32 devices)
  438. * @param __HANDLE_MASTER__: ADC master handle
  439. * @param __HANDLE_SLAVE__: ADC slave handle
  440. * @retval None
  441. */
  442. #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \
  443. ((__HANDLE_SLAVE__)->Instance = ADC2)
  444. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  445. #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
  446. ((CHANNEL) == ADC_INJECTED_RANK_2) || \
  447. ((CHANNEL) == ADC_INJECTED_RANK_3) || \
  448. ((CHANNEL) == ADC_INJECTED_RANK_4))
  449. #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \
  450. ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
  451. /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
  452. * @{
  453. */
  454. #define IS_ADC_INJECTED_NB_CONV(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
  455. /**
  456. * @}
  457. */
  458. #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
  459. #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
  460. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
  461. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
  462. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
  463. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
  464. ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
  465. ((REGTRIG) == ADC_SOFTWARE_START))
  466. #endif
  467. #if defined (STM32F101xE)
  468. #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
  469. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
  470. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
  471. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
  472. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
  473. ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
  474. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
  475. ((REGTRIG) == ADC_SOFTWARE_START))
  476. #endif
  477. #if defined (STM32F101xG)
  478. #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
  479. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
  480. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
  481. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
  482. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
  483. ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
  484. ((REGTRIG) == ADC_SOFTWARE_START))
  485. #endif
  486. #if defined (STM32F103xE) || defined (STM32F103xG)
  487. #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
  488. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
  489. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
  490. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
  491. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
  492. ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
  493. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \
  494. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \
  495. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \
  496. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \
  497. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \
  498. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \
  499. ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
  500. ((REGTRIG) == ADC_SOFTWARE_START))
  501. #endif
  502. #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
  503. #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
  504. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
  505. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
  506. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
  507. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
  508. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
  509. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
  510. ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
  511. #endif
  512. #if defined (STM32F101xE)
  513. #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
  514. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
  515. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
  516. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
  517. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
  518. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
  519. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
  520. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
  521. ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
  522. #endif
  523. #if defined (STM32F101xG)
  524. #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
  525. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
  526. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
  527. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
  528. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
  529. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
  530. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
  531. ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
  532. #endif
  533. #if defined (STM32F103xE) || defined (STM32F103xG)
  534. #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
  535. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
  536. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
  537. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
  538. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
  539. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
  540. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
  541. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
  542. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
  543. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
  544. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
  545. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
  546. ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
  547. ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
  548. #endif
  549. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  550. #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
  551. ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
  552. ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
  553. ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
  554. ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
  555. ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
  556. ((MODE) == ADC_DUALMODE_REGSIMULT) || \
  557. ((MODE) == ADC_DUALMODE_INTERLFAST) || \
  558. ((MODE) == ADC_DUALMODE_INTERLSLOW) || \
  559. ((MODE) == ADC_DUALMODE_ALTERTRIG) )
  560. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  561. /**
  562. * @}
  563. */
  564. /* Exported functions --------------------------------------------------------*/
  565. /** @addtogroup ADCEx_Exported_Functions
  566. * @{
  567. */
  568. /* IO operation functions *****************************************************/
  569. /** @addtogroup ADCEx_Exported_Functions_Group1
  570. * @{
  571. */
  572. /* ADC calibration */
  573. HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
  574. /* Blocking mode: Polling */
  575. HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
  576. HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
  577. HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
  578. /* Non-blocking mode: Interruption */
  579. HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
  580. HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
  581. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  582. /* ADC multimode */
  583. HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
  584. HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
  585. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  586. /* ADC retrieve conversion value intended to be used with polling or interruption */
  587. uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
  588. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  589. uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
  590. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  591. /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
  592. void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
  593. /**
  594. * @}
  595. */
  596. /* Peripheral Control functions ***********************************************/
  597. /** @addtogroup ADCEx_Exported_Functions_Group2
  598. * @{
  599. */
  600. HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
  601. #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
  602. HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
  603. #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
  604. /**
  605. * @}
  606. */
  607. /**
  608. * @}
  609. */
  610. /**
  611. * @}
  612. */
  613. /**
  614. * @}
  615. */
  616. #ifdef __cplusplus
  617. }
  618. #endif
  619. #endif /* __STM32F1xx_HAL_ADC_EX_H */