arm_cmplx_dot_prod_q15.c 4.8 KB

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  1. /* ----------------------------------------------------------------------
  2. * Project: CMSIS DSP Library
  3. * Title: arm_cmplx_dot_prod_q15.c
  4. * Description: Processing function for the Q15 Complex Dot product
  5. *
  6. * $Date: 27. January 2017
  7. * $Revision: V.1.5.1
  8. *
  9. * Target Processor: Cortex-M cores
  10. * -------------------------------------------------------------------- */
  11. /*
  12. * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
  13. *
  14. * SPDX-License-Identifier: Apache-2.0
  15. *
  16. * Licensed under the Apache License, Version 2.0 (the License); you may
  17. * not use this file except in compliance with the License.
  18. * You may obtain a copy of the License at
  19. *
  20. * www.apache.org/licenses/LICENSE-2.0
  21. *
  22. * Unless required by applicable law or agreed to in writing, software
  23. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25. * See the License for the specific language governing permissions and
  26. * limitations under the License.
  27. */
  28. #include "arm_math.h"
  29. /**
  30. * @ingroup groupCmplxMath
  31. */
  32. /**
  33. * @addtogroup cmplx_dot_prod
  34. * @{
  35. */
  36. /**
  37. * @brief Q15 complex dot product
  38. * @param *pSrcA points to the first input vector
  39. * @param *pSrcB points to the second input vector
  40. * @param numSamples number of complex samples in each vector
  41. * @param *realResult real part of the result returned here
  42. * @param *imagResult imaginary part of the result returned here
  43. * @return none.
  44. *
  45. * <b>Scaling and Overflow Behavior:</b>
  46. * \par
  47. * The function is implemented using an internal 64-bit accumulator.
  48. * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
  49. * These are accumulated in a 64-bit accumulator with 34.30 precision.
  50. * As a final step, the accumulators are converted to 8.24 format.
  51. * The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
  52. */
  53. void arm_cmplx_dot_prod_q15(
  54. q15_t * pSrcA,
  55. q15_t * pSrcB,
  56. uint32_t numSamples,
  57. q31_t * realResult,
  58. q31_t * imagResult)
  59. {
  60. q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
  61. q15_t a0,b0,c0,d0;
  62. #if defined (ARM_MATH_DSP)
  63. /* Run the below code for Cortex-M4 and Cortex-M3 */
  64. uint32_t blkCnt; /* loop counter */
  65. /*loop Unrolling */
  66. blkCnt = numSamples >> 2U;
  67. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  68. ** a second loop below computes the remaining 1 to 3 samples. */
  69. while (blkCnt > 0U)
  70. {
  71. a0 = *pSrcA++;
  72. b0 = *pSrcA++;
  73. c0 = *pSrcB++;
  74. d0 = *pSrcB++;
  75. real_sum += (q31_t)a0 * c0;
  76. imag_sum += (q31_t)a0 * d0;
  77. real_sum -= (q31_t)b0 * d0;
  78. imag_sum += (q31_t)b0 * c0;
  79. a0 = *pSrcA++;
  80. b0 = *pSrcA++;
  81. c0 = *pSrcB++;
  82. d0 = *pSrcB++;
  83. real_sum += (q31_t)a0 * c0;
  84. imag_sum += (q31_t)a0 * d0;
  85. real_sum -= (q31_t)b0 * d0;
  86. imag_sum += (q31_t)b0 * c0;
  87. a0 = *pSrcA++;
  88. b0 = *pSrcA++;
  89. c0 = *pSrcB++;
  90. d0 = *pSrcB++;
  91. real_sum += (q31_t)a0 * c0;
  92. imag_sum += (q31_t)a0 * d0;
  93. real_sum -= (q31_t)b0 * d0;
  94. imag_sum += (q31_t)b0 * c0;
  95. a0 = *pSrcA++;
  96. b0 = *pSrcA++;
  97. c0 = *pSrcB++;
  98. d0 = *pSrcB++;
  99. real_sum += (q31_t)a0 * c0;
  100. imag_sum += (q31_t)a0 * d0;
  101. real_sum -= (q31_t)b0 * d0;
  102. imag_sum += (q31_t)b0 * c0;
  103. /* Decrement the loop counter */
  104. blkCnt--;
  105. }
  106. /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
  107. ** No loop unrolling is used. */
  108. blkCnt = numSamples % 0x4U;
  109. while (blkCnt > 0U)
  110. {
  111. a0 = *pSrcA++;
  112. b0 = *pSrcA++;
  113. c0 = *pSrcB++;
  114. d0 = *pSrcB++;
  115. real_sum += (q31_t)a0 * c0;
  116. imag_sum += (q31_t)a0 * d0;
  117. real_sum -= (q31_t)b0 * d0;
  118. imag_sum += (q31_t)b0 * c0;
  119. /* Decrement the loop counter */
  120. blkCnt--;
  121. }
  122. #else
  123. /* Run the below code for Cortex-M0 */
  124. while (numSamples > 0U)
  125. {
  126. a0 = *pSrcA++;
  127. b0 = *pSrcA++;
  128. c0 = *pSrcB++;
  129. d0 = *pSrcB++;
  130. real_sum += a0 * c0;
  131. imag_sum += a0 * d0;
  132. real_sum -= b0 * d0;
  133. imag_sum += b0 * c0;
  134. /* Decrement the loop counter */
  135. numSamples--;
  136. }
  137. #endif /* #if defined (ARM_MATH_DSP) */
  138. /* Store the real and imaginary results in 8.24 format */
  139. /* Convert real data in 34.30 to 8.24 by 6 right shifts */
  140. *realResult = (q31_t) (real_sum >> 6);
  141. /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
  142. *imagResult = (q31_t) (imag_sum >> 6);
  143. }
  144. /**
  145. * @} end of cmplx_dot_prod group
  146. */