startup_stm32f103xe.s 12 KB

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  1. /**
  2. *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
  3. * @file startup_stm32f103xe.s
  4. * @author MCD Application Team
  5. * @brief STM32F103xE Devices vector table for Atollic toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Configure the clock system
  11. * - Configure external SRAM mounted on STM3210E-EVAL board
  12. * to be used as data memory (optional, to be enabled by user)
  13. * - Branches to main in the C library (which eventually
  14. * calls main()).
  15. * After Reset the Cortex-M3 processor is in Thread mode,
  16. * priority is Privileged, and the Stack is set to Main.
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * Copyright (c) 2017-2021 STMicroelectronics.
  21. * All rights reserved.
  22. *
  23. * This software is licensed under terms that can be found in the LICENSE file
  24. * in the root directory of this software component.
  25. * If no LICENSE file comes with this software, it is provided AS-IS.
  26. *
  27. ******************************************************************************
  28. */
  29. .syntax unified
  30. .cpu cortex-m3
  31. .fpu softvfp
  32. .thumb
  33. .global g_pfnVectors
  34. .global Default_Handler
  35. /* start address for the initialization values of the .data section.
  36. defined in linker script */
  37. .word _sidata
  38. /* start address for the .data section. defined in linker script */
  39. .word _sdata
  40. /* end address for the .data section. defined in linker script */
  41. .word _edata
  42. /* start address for the .bss section. defined in linker script */
  43. .word _sbss
  44. /* end address for the .bss section. defined in linker script */
  45. .word _ebss
  46. .equ BootRAM, 0xF1E0F85F
  47. /**
  48. * @brief This is the code that gets called when the processor first
  49. * starts execution following a reset event. Only the absolutely
  50. * necessary set is performed, after which the application
  51. * supplied main() routine is called.
  52. * @param None
  53. * @retval : None
  54. */
  55. .section .text.Reset_Handler
  56. .weak Reset_Handler
  57. .type Reset_Handler, %function
  58. Reset_Handler:
  59. /* Call the clock system initialization function.*/
  60. bl SystemInit
  61. /* Copy the data segment initializers from flash to SRAM */
  62. ldr r0, =_sdata
  63. ldr r1, =_edata
  64. ldr r2, =_sidata
  65. movs r3, #0
  66. b LoopCopyDataInit
  67. CopyDataInit:
  68. ldr r4, [r2, r3]
  69. str r4, [r0, r3]
  70. adds r3, r3, #4
  71. LoopCopyDataInit:
  72. adds r4, r0, r3
  73. cmp r4, r1
  74. bcc CopyDataInit
  75. /* Zero fill the bss segment. */
  76. ldr r2, =_sbss
  77. ldr r4, =_ebss
  78. movs r3, #0
  79. b LoopFillZerobss
  80. FillZerobss:
  81. str r3, [r2]
  82. adds r2, r2, #4
  83. LoopFillZerobss:
  84. cmp r2, r4
  85. bcc FillZerobss
  86. /* Call static constructors */
  87. bl __libc_init_array
  88. /* Call the application's entry point.*/
  89. bl main
  90. bx lr
  91. .size Reset_Handler, .-Reset_Handler
  92. /**
  93. * @brief This is the code that gets called when the processor receives an
  94. * unexpected interrupt. This simply enters an infinite loop, preserving
  95. * the system state for examination by a debugger.
  96. *
  97. * @param None
  98. * @retval : None
  99. */
  100. .section .text.Default_Handler,"ax",%progbits
  101. Default_Handler:
  102. Infinite_Loop:
  103. b Infinite_Loop
  104. .size Default_Handler, .-Default_Handler
  105. /******************************************************************************
  106. *
  107. * The minimal vector table for a Cortex M3. Note that the proper constructs
  108. * must be placed on this to ensure that it ends up at physical address
  109. * 0x0000.0000.
  110. *
  111. ******************************************************************************/
  112. .section .isr_vector,"a",%progbits
  113. .type g_pfnVectors, %object
  114. .size g_pfnVectors, .-g_pfnVectors
  115. g_pfnVectors:
  116. .word _estack
  117. .word Reset_Handler
  118. .word NMI_Handler
  119. .word HardFault_Handler
  120. .word MemManage_Handler
  121. .word BusFault_Handler
  122. .word UsageFault_Handler
  123. .word 0
  124. .word 0
  125. .word 0
  126. .word 0
  127. .word SVC_Handler
  128. .word DebugMon_Handler
  129. .word 0
  130. .word PendSV_Handler
  131. .word SysTick_Handler
  132. .word WWDG_IRQHandler
  133. .word PVD_IRQHandler
  134. .word TAMPER_IRQHandler
  135. .word RTC_IRQHandler
  136. .word FLASH_IRQHandler
  137. .word RCC_IRQHandler
  138. .word EXTI0_IRQHandler
  139. .word EXTI1_IRQHandler
  140. .word EXTI2_IRQHandler
  141. .word EXTI3_IRQHandler
  142. .word EXTI4_IRQHandler
  143. .word DMA1_Channel1_IRQHandler
  144. .word DMA1_Channel2_IRQHandler
  145. .word DMA1_Channel3_IRQHandler
  146. .word DMA1_Channel4_IRQHandler
  147. .word DMA1_Channel5_IRQHandler
  148. .word DMA1_Channel6_IRQHandler
  149. .word DMA1_Channel7_IRQHandler
  150. .word ADC1_2_IRQHandler
  151. .word USB_HP_CAN1_TX_IRQHandler
  152. .word USB_LP_CAN1_RX0_IRQHandler
  153. .word CAN1_RX1_IRQHandler
  154. .word CAN1_SCE_IRQHandler
  155. .word EXTI9_5_IRQHandler
  156. .word TIM1_BRK_IRQHandler
  157. .word TIM1_UP_IRQHandler
  158. .word TIM1_TRG_COM_IRQHandler
  159. .word TIM1_CC_IRQHandler
  160. .word TIM2_IRQHandler
  161. .word TIM3_IRQHandler
  162. .word TIM4_IRQHandler
  163. .word I2C1_EV_IRQHandler
  164. .word I2C1_ER_IRQHandler
  165. .word I2C2_EV_IRQHandler
  166. .word I2C2_ER_IRQHandler
  167. .word SPI1_IRQHandler
  168. .word SPI2_IRQHandler
  169. .word USART1_IRQHandler
  170. .word USART2_IRQHandler
  171. .word USART3_IRQHandler
  172. .word EXTI15_10_IRQHandler
  173. .word RTC_Alarm_IRQHandler
  174. .word USBWakeUp_IRQHandler
  175. .word TIM8_BRK_IRQHandler
  176. .word TIM8_UP_IRQHandler
  177. .word TIM8_TRG_COM_IRQHandler
  178. .word TIM8_CC_IRQHandler
  179. .word ADC3_IRQHandler
  180. .word FSMC_IRQHandler
  181. .word SDIO_IRQHandler
  182. .word TIM5_IRQHandler
  183. .word SPI3_IRQHandler
  184. .word UART4_IRQHandler
  185. .word UART5_IRQHandler
  186. .word TIM6_IRQHandler
  187. .word TIM7_IRQHandler
  188. .word DMA2_Channel1_IRQHandler
  189. .word DMA2_Channel2_IRQHandler
  190. .word DMA2_Channel3_IRQHandler
  191. .word DMA2_Channel4_5_IRQHandler
  192. .word 0
  193. .word 0
  194. .word 0
  195. .word 0
  196. .word 0
  197. .word 0
  198. .word 0
  199. .word 0
  200. .word 0
  201. .word 0
  202. .word 0
  203. .word 0
  204. .word 0
  205. .word 0
  206. .word 0
  207. .word 0
  208. .word 0
  209. .word 0
  210. .word 0
  211. .word 0
  212. .word 0
  213. .word 0
  214. .word 0
  215. .word 0
  216. .word 0
  217. .word 0
  218. .word 0
  219. .word 0
  220. .word 0
  221. .word 0
  222. .word 0
  223. .word 0
  224. .word 0
  225. .word 0
  226. .word 0
  227. .word 0
  228. .word 0
  229. .word 0
  230. .word 0
  231. .word 0
  232. .word 0
  233. .word 0
  234. .word 0
  235. .word 0
  236. .word BootRAM /* @0x1E0. This is for boot in RAM mode for
  237. STM32F10x High Density devices. */
  238. /*******************************************************************************
  239. *
  240. * Provide weak aliases for each Exception handler to the Default_Handler.
  241. * As they are weak aliases, any function with the same name will override
  242. * this definition.
  243. *
  244. *******************************************************************************/
  245. .weak NMI_Handler
  246. .thumb_set NMI_Handler,Default_Handler
  247. .weak HardFault_Handler
  248. .thumb_set HardFault_Handler,Default_Handler
  249. .weak MemManage_Handler
  250. .thumb_set MemManage_Handler,Default_Handler
  251. .weak BusFault_Handler
  252. .thumb_set BusFault_Handler,Default_Handler
  253. .weak UsageFault_Handler
  254. .thumb_set UsageFault_Handler,Default_Handler
  255. .weak SVC_Handler
  256. .thumb_set SVC_Handler,Default_Handler
  257. .weak DebugMon_Handler
  258. .thumb_set DebugMon_Handler,Default_Handler
  259. .weak PendSV_Handler
  260. .thumb_set PendSV_Handler,Default_Handler
  261. .weak SysTick_Handler
  262. .thumb_set SysTick_Handler,Default_Handler
  263. .weak WWDG_IRQHandler
  264. .thumb_set WWDG_IRQHandler,Default_Handler
  265. .weak PVD_IRQHandler
  266. .thumb_set PVD_IRQHandler,Default_Handler
  267. .weak TAMPER_IRQHandler
  268. .thumb_set TAMPER_IRQHandler,Default_Handler
  269. .weak RTC_IRQHandler
  270. .thumb_set RTC_IRQHandler,Default_Handler
  271. .weak FLASH_IRQHandler
  272. .thumb_set FLASH_IRQHandler,Default_Handler
  273. .weak RCC_IRQHandler
  274. .thumb_set RCC_IRQHandler,Default_Handler
  275. .weak EXTI0_IRQHandler
  276. .thumb_set EXTI0_IRQHandler,Default_Handler
  277. .weak EXTI1_IRQHandler
  278. .thumb_set EXTI1_IRQHandler,Default_Handler
  279. .weak EXTI2_IRQHandler
  280. .thumb_set EXTI2_IRQHandler,Default_Handler
  281. .weak EXTI3_IRQHandler
  282. .thumb_set EXTI3_IRQHandler,Default_Handler
  283. .weak EXTI4_IRQHandler
  284. .thumb_set EXTI4_IRQHandler,Default_Handler
  285. .weak DMA1_Channel1_IRQHandler
  286. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  287. .weak DMA1_Channel2_IRQHandler
  288. .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
  289. .weak DMA1_Channel3_IRQHandler
  290. .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
  291. .weak DMA1_Channel4_IRQHandler
  292. .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
  293. .weak DMA1_Channel5_IRQHandler
  294. .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
  295. .weak DMA1_Channel6_IRQHandler
  296. .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
  297. .weak DMA1_Channel7_IRQHandler
  298. .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
  299. .weak ADC1_2_IRQHandler
  300. .thumb_set ADC1_2_IRQHandler,Default_Handler
  301. .weak USB_HP_CAN1_TX_IRQHandler
  302. .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
  303. .weak USB_LP_CAN1_RX0_IRQHandler
  304. .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
  305. .weak CAN1_RX1_IRQHandler
  306. .thumb_set CAN1_RX1_IRQHandler,Default_Handler
  307. .weak CAN1_SCE_IRQHandler
  308. .thumb_set CAN1_SCE_IRQHandler,Default_Handler
  309. .weak EXTI9_5_IRQHandler
  310. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  311. .weak TIM1_BRK_IRQHandler
  312. .thumb_set TIM1_BRK_IRQHandler,Default_Handler
  313. .weak TIM1_UP_IRQHandler
  314. .thumb_set TIM1_UP_IRQHandler,Default_Handler
  315. .weak TIM1_TRG_COM_IRQHandler
  316. .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
  317. .weak TIM1_CC_IRQHandler
  318. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  319. .weak TIM2_IRQHandler
  320. .thumb_set TIM2_IRQHandler,Default_Handler
  321. .weak TIM3_IRQHandler
  322. .thumb_set TIM3_IRQHandler,Default_Handler
  323. .weak TIM4_IRQHandler
  324. .thumb_set TIM4_IRQHandler,Default_Handler
  325. .weak I2C1_EV_IRQHandler
  326. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  327. .weak I2C1_ER_IRQHandler
  328. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  329. .weak I2C2_EV_IRQHandler
  330. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  331. .weak I2C2_ER_IRQHandler
  332. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  333. .weak SPI1_IRQHandler
  334. .thumb_set SPI1_IRQHandler,Default_Handler
  335. .weak SPI2_IRQHandler
  336. .thumb_set SPI2_IRQHandler,Default_Handler
  337. .weak USART1_IRQHandler
  338. .thumb_set USART1_IRQHandler,Default_Handler
  339. .weak USART2_IRQHandler
  340. .thumb_set USART2_IRQHandler,Default_Handler
  341. .weak USART3_IRQHandler
  342. .thumb_set USART3_IRQHandler,Default_Handler
  343. .weak EXTI15_10_IRQHandler
  344. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  345. .weak RTC_Alarm_IRQHandler
  346. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  347. .weak USBWakeUp_IRQHandler
  348. .thumb_set USBWakeUp_IRQHandler,Default_Handler
  349. .weak TIM8_BRK_IRQHandler
  350. .thumb_set TIM8_BRK_IRQHandler,Default_Handler
  351. .weak TIM8_UP_IRQHandler
  352. .thumb_set TIM8_UP_IRQHandler,Default_Handler
  353. .weak TIM8_TRG_COM_IRQHandler
  354. .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
  355. .weak TIM8_CC_IRQHandler
  356. .thumb_set TIM8_CC_IRQHandler,Default_Handler
  357. .weak ADC3_IRQHandler
  358. .thumb_set ADC3_IRQHandler,Default_Handler
  359. .weak FSMC_IRQHandler
  360. .thumb_set FSMC_IRQHandler,Default_Handler
  361. .weak SDIO_IRQHandler
  362. .thumb_set SDIO_IRQHandler,Default_Handler
  363. .weak TIM5_IRQHandler
  364. .thumb_set TIM5_IRQHandler,Default_Handler
  365. .weak SPI3_IRQHandler
  366. .thumb_set SPI3_IRQHandler,Default_Handler
  367. .weak UART4_IRQHandler
  368. .thumb_set UART4_IRQHandler,Default_Handler
  369. .weak UART5_IRQHandler
  370. .thumb_set UART5_IRQHandler,Default_Handler
  371. .weak TIM6_IRQHandler
  372. .thumb_set TIM6_IRQHandler,Default_Handler
  373. .weak TIM7_IRQHandler
  374. .thumb_set TIM7_IRQHandler,Default_Handler
  375. .weak DMA2_Channel1_IRQHandler
  376. .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
  377. .weak DMA2_Channel2_IRQHandler
  378. .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
  379. .weak DMA2_Channel3_IRQHandler
  380. .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
  381. .weak DMA2_Channel4_5_IRQHandler
  382. .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler