stm32f1xx_hal_dma.c 27 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_dma.c
  4. * @author MCD Application Team
  5. * @brief DMA HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Direct Memory Access (DMA) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State and errors functions
  11. @verbatim
  12. ==============================================================================
  13. ##### How to use this driver #####
  14. ==============================================================================
  15. [..]
  16. (#) Enable and configure the peripheral to be connected to the DMA Channel
  17. (except for internal SRAM / FLASH memories: no initialization is
  18. necessary). Please refer to the Reference manual for connection between peripherals
  19. and DMA requests.
  20. (#) For a given Channel, program the required configuration through the following parameters:
  21. Channel request, Transfer Direction, Source and Destination data formats,
  22. Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
  23. using HAL_DMA_Init() function.
  24. (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
  25. detection.
  26. (#) Use HAL_DMA_Abort() function to abort the current transfer
  27. -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
  28. *** Polling mode IO operation ***
  29. =================================
  30. [..]
  31. (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
  32. address and destination address and the Length of data to be transferred
  33. (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
  34. case a fixed Timeout can be configured by User depending from his application.
  35. *** Interrupt mode IO operation ***
  36. ===================================
  37. [..]
  38. (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
  39. (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
  40. (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
  41. Source address and destination address and the Length of data to be transferred.
  42. In this case the DMA interrupt is configured
  43. (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
  44. (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
  45. add his own function by customization of function pointer XferCpltCallback and
  46. XferErrorCallback (i.e. a member of DMA handle structure).
  47. *** DMA HAL driver macros list ***
  48. =============================================
  49. [..]
  50. Below the list of most used macros in DMA HAL driver.
  51. (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
  52. (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
  53. (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
  54. (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
  55. (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
  56. (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
  57. (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
  58. [..]
  59. (@) You can refer to the DMA HAL driver header file for more useful macros
  60. @endverbatim
  61. ******************************************************************************
  62. * @attention
  63. *
  64. * Copyright (c) 2016 STMicroelectronics.
  65. * All rights reserved.
  66. *
  67. * This software is licensed under terms that can be found in the LICENSE file in
  68. * the root directory of this software component.
  69. * If no LICENSE file comes with this software, it is provided AS-IS.
  70. *
  71. ******************************************************************************
  72. */
  73. /* Includes ------------------------------------------------------------------*/
  74. #include "stm32f1xx_hal.h"
  75. /** @addtogroup STM32F1xx_HAL_Driver
  76. * @{
  77. */
  78. /** @defgroup DMA DMA
  79. * @brief DMA HAL module driver
  80. * @{
  81. */
  82. #ifdef HAL_DMA_MODULE_ENABLED
  83. /* Private typedef -----------------------------------------------------------*/
  84. /* Private define ------------------------------------------------------------*/
  85. /* Private macro -------------------------------------------------------------*/
  86. /* Private variables ---------------------------------------------------------*/
  87. /* Private function prototypes -----------------------------------------------*/
  88. /** @defgroup DMA_Private_Functions DMA Private Functions
  89. * @{
  90. */
  91. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
  92. /**
  93. * @}
  94. */
  95. /* Exported functions ---------------------------------------------------------*/
  96. /** @defgroup DMA_Exported_Functions DMA Exported Functions
  97. * @{
  98. */
  99. /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
  100. * @brief Initialization and de-initialization functions
  101. *
  102. @verbatim
  103. ===============================================================================
  104. ##### Initialization and de-initialization functions #####
  105. ===============================================================================
  106. [..]
  107. This section provides functions allowing to initialize the DMA Channel source
  108. and destination addresses, incrementation and data sizes, transfer direction,
  109. circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
  110. [..]
  111. The HAL_DMA_Init() function follows the DMA configuration procedures as described in
  112. reference manual.
  113. @endverbatim
  114. * @{
  115. */
  116. /**
  117. * @brief Initialize the DMA according to the specified
  118. * parameters in the DMA_InitTypeDef and initialize the associated handle.
  119. * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
  120. * the configuration information for the specified DMA Channel.
  121. * @retval HAL status
  122. */
  123. HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
  124. {
  125. uint32_t tmp = 0U;
  126. /* Check the DMA handle allocation */
  127. if(hdma == NULL)
  128. {
  129. return HAL_ERROR;
  130. }
  131. /* Check the parameters */
  132. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  133. assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
  134. assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
  135. assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
  136. assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  137. assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  138. assert_param(IS_DMA_MODE(hdma->Init.Mode));
  139. assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
  140. #if defined (DMA2)
  141. /* calculation of the channel index */
  142. if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
  143. {
  144. /* DMA1 */
  145. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  146. hdma->DmaBaseAddress = DMA1;
  147. }
  148. else
  149. {
  150. /* DMA2 */
  151. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
  152. hdma->DmaBaseAddress = DMA2;
  153. }
  154. #else
  155. /* DMA1 */
  156. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  157. hdma->DmaBaseAddress = DMA1;
  158. #endif /* DMA2 */
  159. /* Change DMA peripheral state */
  160. hdma->State = HAL_DMA_STATE_BUSY;
  161. /* Get the CR register value */
  162. tmp = hdma->Instance->CCR;
  163. /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
  164. tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
  165. DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
  166. DMA_CCR_DIR));
  167. /* Prepare the DMA Channel configuration */
  168. tmp |= hdma->Init.Direction |
  169. hdma->Init.PeriphInc | hdma->Init.MemInc |
  170. hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
  171. hdma->Init.Mode | hdma->Init.Priority;
  172. /* Write to DMA Channel CR register */
  173. hdma->Instance->CCR = tmp;
  174. /* Initialise the error code */
  175. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  176. /* Initialize the DMA state*/
  177. hdma->State = HAL_DMA_STATE_READY;
  178. /* Allocate lock resource and initialize it */
  179. hdma->Lock = HAL_UNLOCKED;
  180. return HAL_OK;
  181. }
  182. /**
  183. * @brief DeInitialize the DMA peripheral.
  184. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  185. * the configuration information for the specified DMA Channel.
  186. * @retval HAL status
  187. */
  188. HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
  189. {
  190. /* Check the DMA handle allocation */
  191. if(hdma == NULL)
  192. {
  193. return HAL_ERROR;
  194. }
  195. /* Check the parameters */
  196. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  197. /* Disable the selected DMA Channelx */
  198. __HAL_DMA_DISABLE(hdma);
  199. /* Reset DMA Channel control register */
  200. hdma->Instance->CCR = 0U;
  201. /* Reset DMA Channel Number of Data to Transfer register */
  202. hdma->Instance->CNDTR = 0U;
  203. /* Reset DMA Channel peripheral address register */
  204. hdma->Instance->CPAR = 0U;
  205. /* Reset DMA Channel memory address register */
  206. hdma->Instance->CMAR = 0U;
  207. #if defined (DMA2)
  208. /* calculation of the channel index */
  209. if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
  210. {
  211. /* DMA1 */
  212. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  213. hdma->DmaBaseAddress = DMA1;
  214. }
  215. else
  216. {
  217. /* DMA2 */
  218. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
  219. hdma->DmaBaseAddress = DMA2;
  220. }
  221. #else
  222. /* DMA1 */
  223. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  224. hdma->DmaBaseAddress = DMA1;
  225. #endif /* DMA2 */
  226. /* Clear all flags */
  227. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex));
  228. /* Clean all callbacks */
  229. hdma->XferCpltCallback = NULL;
  230. hdma->XferHalfCpltCallback = NULL;
  231. hdma->XferErrorCallback = NULL;
  232. hdma->XferAbortCallback = NULL;
  233. /* Reset the error code */
  234. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  235. /* Reset the DMA state */
  236. hdma->State = HAL_DMA_STATE_RESET;
  237. /* Release Lock */
  238. __HAL_UNLOCK(hdma);
  239. return HAL_OK;
  240. }
  241. /**
  242. * @}
  243. */
  244. /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
  245. * @brief Input and Output operation functions
  246. *
  247. @verbatim
  248. ===============================================================================
  249. ##### IO operation functions #####
  250. ===============================================================================
  251. [..] This section provides functions allowing to:
  252. (+) Configure the source, destination address and data length and Start DMA transfer
  253. (+) Configure the source, destination address and data length and
  254. Start DMA transfer with interrupt
  255. (+) Abort DMA transfer
  256. (+) Poll for transfer complete
  257. (+) Handle DMA interrupt request
  258. @endverbatim
  259. * @{
  260. */
  261. /**
  262. * @brief Start the DMA Transfer.
  263. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  264. * the configuration information for the specified DMA Channel.
  265. * @param SrcAddress: The source memory Buffer address
  266. * @param DstAddress: The destination memory Buffer address
  267. * @param DataLength: The length of data to be transferred from source to destination
  268. * @retval HAL status
  269. */
  270. HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  271. {
  272. HAL_StatusTypeDef status = HAL_OK;
  273. /* Check the parameters */
  274. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  275. /* Process locked */
  276. __HAL_LOCK(hdma);
  277. if(HAL_DMA_STATE_READY == hdma->State)
  278. {
  279. /* Change DMA peripheral state */
  280. hdma->State = HAL_DMA_STATE_BUSY;
  281. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  282. /* Disable the peripheral */
  283. __HAL_DMA_DISABLE(hdma);
  284. /* Configure the source, destination address and the data length & clear flags*/
  285. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  286. /* Enable the Peripheral */
  287. __HAL_DMA_ENABLE(hdma);
  288. }
  289. else
  290. {
  291. /* Process Unlocked */
  292. __HAL_UNLOCK(hdma);
  293. status = HAL_BUSY;
  294. }
  295. return status;
  296. }
  297. /**
  298. * @brief Start the DMA Transfer with interrupt enabled.
  299. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  300. * the configuration information for the specified DMA Channel.
  301. * @param SrcAddress: The source memory Buffer address
  302. * @param DstAddress: The destination memory Buffer address
  303. * @param DataLength: The length of data to be transferred from source to destination
  304. * @retval HAL status
  305. */
  306. HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  307. {
  308. HAL_StatusTypeDef status = HAL_OK;
  309. /* Check the parameters */
  310. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  311. /* Process locked */
  312. __HAL_LOCK(hdma);
  313. if(HAL_DMA_STATE_READY == hdma->State)
  314. {
  315. /* Change DMA peripheral state */
  316. hdma->State = HAL_DMA_STATE_BUSY;
  317. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  318. /* Disable the peripheral */
  319. __HAL_DMA_DISABLE(hdma);
  320. /* Configure the source, destination address and the data length & clear flags*/
  321. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  322. /* Enable the transfer complete interrupt */
  323. /* Enable the transfer Error interrupt */
  324. if(NULL != hdma->XferHalfCpltCallback)
  325. {
  326. /* Enable the Half transfer complete interrupt as well */
  327. __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  328. }
  329. else
  330. {
  331. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  332. __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
  333. }
  334. /* Enable the Peripheral */
  335. __HAL_DMA_ENABLE(hdma);
  336. }
  337. else
  338. {
  339. /* Process Unlocked */
  340. __HAL_UNLOCK(hdma);
  341. /* Remain BUSY */
  342. status = HAL_BUSY;
  343. }
  344. return status;
  345. }
  346. /**
  347. * @brief Abort the DMA Transfer.
  348. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  349. * the configuration information for the specified DMA Channel.
  350. * @retval HAL status
  351. */
  352. HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
  353. {
  354. HAL_StatusTypeDef status = HAL_OK;
  355. if(hdma->State != HAL_DMA_STATE_BUSY)
  356. {
  357. /* no transfer ongoing */
  358. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  359. /* Process Unlocked */
  360. __HAL_UNLOCK(hdma);
  361. return HAL_ERROR;
  362. }
  363. else
  364. {
  365. /* Disable DMA IT */
  366. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  367. /* Disable the channel */
  368. __HAL_DMA_DISABLE(hdma);
  369. /* Clear all flags */
  370. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  371. }
  372. /* Change the DMA state */
  373. hdma->State = HAL_DMA_STATE_READY;
  374. /* Process Unlocked */
  375. __HAL_UNLOCK(hdma);
  376. return status;
  377. }
  378. /**
  379. * @brief Aborts the DMA Transfer in Interrupt mode.
  380. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  381. * the configuration information for the specified DMA Channel.
  382. * @retval HAL status
  383. */
  384. HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
  385. {
  386. HAL_StatusTypeDef status = HAL_OK;
  387. if(HAL_DMA_STATE_BUSY != hdma->State)
  388. {
  389. /* no transfer ongoing */
  390. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  391. status = HAL_ERROR;
  392. }
  393. else
  394. {
  395. /* Disable DMA IT */
  396. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  397. /* Disable the channel */
  398. __HAL_DMA_DISABLE(hdma);
  399. /* Clear all flags */
  400. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  401. /* Change the DMA state */
  402. hdma->State = HAL_DMA_STATE_READY;
  403. /* Process Unlocked */
  404. __HAL_UNLOCK(hdma);
  405. /* Call User Abort callback */
  406. if(hdma->XferAbortCallback != NULL)
  407. {
  408. hdma->XferAbortCallback(hdma);
  409. }
  410. }
  411. return status;
  412. }
  413. /**
  414. * @brief Polling for transfer complete.
  415. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  416. * the configuration information for the specified DMA Channel.
  417. * @param CompleteLevel: Specifies the DMA level complete.
  418. * @param Timeout: Timeout duration.
  419. * @retval HAL status
  420. */
  421. HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
  422. {
  423. uint32_t temp;
  424. uint32_t tickstart = 0U;
  425. if(HAL_DMA_STATE_BUSY != hdma->State)
  426. {
  427. /* no transfer ongoing */
  428. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  429. __HAL_UNLOCK(hdma);
  430. return HAL_ERROR;
  431. }
  432. /* Polling mode not supported in circular mode */
  433. if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
  434. {
  435. hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
  436. return HAL_ERROR;
  437. }
  438. /* Get the level transfer complete flag */
  439. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  440. {
  441. /* Transfer Complete flag */
  442. temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
  443. }
  444. else
  445. {
  446. /* Half Transfer Complete flag */
  447. temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
  448. }
  449. /* Get tick */
  450. tickstart = HAL_GetTick();
  451. while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
  452. {
  453. if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
  454. {
  455. /* When a DMA transfer error occurs */
  456. /* A hardware clear of its EN bits is performed */
  457. /* Clear all flags */
  458. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  459. /* Update error code */
  460. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
  461. /* Change the DMA state */
  462. hdma->State= HAL_DMA_STATE_READY;
  463. /* Process Unlocked */
  464. __HAL_UNLOCK(hdma);
  465. return HAL_ERROR;
  466. }
  467. /* Check for the Timeout */
  468. if(Timeout != HAL_MAX_DELAY)
  469. {
  470. if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
  471. {
  472. /* Update error code */
  473. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
  474. /* Change the DMA state */
  475. hdma->State = HAL_DMA_STATE_READY;
  476. /* Process Unlocked */
  477. __HAL_UNLOCK(hdma);
  478. return HAL_ERROR;
  479. }
  480. }
  481. }
  482. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  483. {
  484. /* Clear the transfer complete flag */
  485. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  486. /* The selected Channelx EN bit is cleared (DMA is disabled and
  487. all transfers are complete) */
  488. hdma->State = HAL_DMA_STATE_READY;
  489. }
  490. else
  491. {
  492. /* Clear the half transfer complete flag */
  493. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  494. }
  495. /* Process unlocked */
  496. __HAL_UNLOCK(hdma);
  497. return HAL_OK;
  498. }
  499. /**
  500. * @brief Handles DMA interrupt request.
  501. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  502. * the configuration information for the specified DMA Channel.
  503. * @retval None
  504. */
  505. void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
  506. {
  507. uint32_t flag_it = hdma->DmaBaseAddress->ISR;
  508. uint32_t source_it = hdma->Instance->CCR;
  509. /* Half Transfer Complete Interrupt management ******************************/
  510. if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
  511. {
  512. /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
  513. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  514. {
  515. /* Disable the half transfer interrupt */
  516. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  517. }
  518. /* Clear the half transfer complete flag */
  519. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  520. /* DMA peripheral state is not updated in Half Transfer */
  521. /* but in Transfer Complete case */
  522. if(hdma->XferHalfCpltCallback != NULL)
  523. {
  524. /* Half transfer callback */
  525. hdma->XferHalfCpltCallback(hdma);
  526. }
  527. }
  528. /* Transfer Complete Interrupt management ***********************************/
  529. else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
  530. {
  531. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  532. {
  533. /* Disable the transfer complete and error interrupt */
  534. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
  535. /* Change the DMA state */
  536. hdma->State = HAL_DMA_STATE_READY;
  537. }
  538. /* Clear the transfer complete flag */
  539. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  540. /* Process Unlocked */
  541. __HAL_UNLOCK(hdma);
  542. if(hdma->XferCpltCallback != NULL)
  543. {
  544. /* Transfer complete callback */
  545. hdma->XferCpltCallback(hdma);
  546. }
  547. }
  548. /* Transfer Error Interrupt management **************************************/
  549. else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
  550. {
  551. /* When a DMA transfer error occurs */
  552. /* A hardware clear of its EN bits is performed */
  553. /* Disable ALL DMA IT */
  554. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  555. /* Clear all flags */
  556. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  557. /* Update error code */
  558. hdma->ErrorCode = HAL_DMA_ERROR_TE;
  559. /* Change the DMA state */
  560. hdma->State = HAL_DMA_STATE_READY;
  561. /* Process Unlocked */
  562. __HAL_UNLOCK(hdma);
  563. if (hdma->XferErrorCallback != NULL)
  564. {
  565. /* Transfer error callback */
  566. hdma->XferErrorCallback(hdma);
  567. }
  568. }
  569. return;
  570. }
  571. /**
  572. * @brief Register callbacks
  573. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  574. * the configuration information for the specified DMA Channel.
  575. * @param CallbackID: User Callback identifier
  576. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  577. * @param pCallback: pointer to private callback function which has pointer to
  578. * a DMA_HandleTypeDef structure as parameter.
  579. * @retval HAL status
  580. */
  581. HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
  582. {
  583. HAL_StatusTypeDef status = HAL_OK;
  584. /* Process locked */
  585. __HAL_LOCK(hdma);
  586. if(HAL_DMA_STATE_READY == hdma->State)
  587. {
  588. switch (CallbackID)
  589. {
  590. case HAL_DMA_XFER_CPLT_CB_ID:
  591. hdma->XferCpltCallback = pCallback;
  592. break;
  593. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  594. hdma->XferHalfCpltCallback = pCallback;
  595. break;
  596. case HAL_DMA_XFER_ERROR_CB_ID:
  597. hdma->XferErrorCallback = pCallback;
  598. break;
  599. case HAL_DMA_XFER_ABORT_CB_ID:
  600. hdma->XferAbortCallback = pCallback;
  601. break;
  602. default:
  603. status = HAL_ERROR;
  604. break;
  605. }
  606. }
  607. else
  608. {
  609. status = HAL_ERROR;
  610. }
  611. /* Release Lock */
  612. __HAL_UNLOCK(hdma);
  613. return status;
  614. }
  615. /**
  616. * @brief UnRegister callbacks
  617. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  618. * the configuration information for the specified DMA Channel.
  619. * @param CallbackID: User Callback identifier
  620. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  621. * @retval HAL status
  622. */
  623. HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
  624. {
  625. HAL_StatusTypeDef status = HAL_OK;
  626. /* Process locked */
  627. __HAL_LOCK(hdma);
  628. if(HAL_DMA_STATE_READY == hdma->State)
  629. {
  630. switch (CallbackID)
  631. {
  632. case HAL_DMA_XFER_CPLT_CB_ID:
  633. hdma->XferCpltCallback = NULL;
  634. break;
  635. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  636. hdma->XferHalfCpltCallback = NULL;
  637. break;
  638. case HAL_DMA_XFER_ERROR_CB_ID:
  639. hdma->XferErrorCallback = NULL;
  640. break;
  641. case HAL_DMA_XFER_ABORT_CB_ID:
  642. hdma->XferAbortCallback = NULL;
  643. break;
  644. case HAL_DMA_XFER_ALL_CB_ID:
  645. hdma->XferCpltCallback = NULL;
  646. hdma->XferHalfCpltCallback = NULL;
  647. hdma->XferErrorCallback = NULL;
  648. hdma->XferAbortCallback = NULL;
  649. break;
  650. default:
  651. status = HAL_ERROR;
  652. break;
  653. }
  654. }
  655. else
  656. {
  657. status = HAL_ERROR;
  658. }
  659. /* Release Lock */
  660. __HAL_UNLOCK(hdma);
  661. return status;
  662. }
  663. /**
  664. * @}
  665. */
  666. /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
  667. * @brief Peripheral State and Errors functions
  668. *
  669. @verbatim
  670. ===============================================================================
  671. ##### Peripheral State and Errors functions #####
  672. ===============================================================================
  673. [..]
  674. This subsection provides functions allowing to
  675. (+) Check the DMA state
  676. (+) Get error code
  677. @endverbatim
  678. * @{
  679. */
  680. /**
  681. * @brief Return the DMA handle state.
  682. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  683. * the configuration information for the specified DMA Channel.
  684. * @retval HAL state
  685. */
  686. HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
  687. {
  688. /* Return DMA handle state */
  689. return hdma->State;
  690. }
  691. /**
  692. * @brief Return the DMA error code.
  693. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  694. * the configuration information for the specified DMA Channel.
  695. * @retval DMA Error Code
  696. */
  697. uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
  698. {
  699. return hdma->ErrorCode;
  700. }
  701. /**
  702. * @}
  703. */
  704. /**
  705. * @}
  706. */
  707. /** @addtogroup DMA_Private_Functions
  708. * @{
  709. */
  710. /**
  711. * @brief Sets the DMA Transfer parameter.
  712. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  713. * the configuration information for the specified DMA Channel.
  714. * @param SrcAddress: The source memory Buffer address
  715. * @param DstAddress: The destination memory Buffer address
  716. * @param DataLength: The length of data to be transferred from source to destination
  717. * @retval HAL status
  718. */
  719. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  720. {
  721. /* Clear all flags */
  722. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  723. /* Configure DMA Channel data length */
  724. hdma->Instance->CNDTR = DataLength;
  725. /* Memory to Peripheral */
  726. if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
  727. {
  728. /* Configure DMA Channel destination address */
  729. hdma->Instance->CPAR = DstAddress;
  730. /* Configure DMA Channel source address */
  731. hdma->Instance->CMAR = SrcAddress;
  732. }
  733. /* Peripheral to Memory */
  734. else
  735. {
  736. /* Configure DMA Channel source address */
  737. hdma->Instance->CPAR = SrcAddress;
  738. /* Configure DMA Channel destination address */
  739. hdma->Instance->CMAR = DstAddress;
  740. }
  741. }
  742. /**
  743. * @}
  744. */
  745. #endif /* HAL_DMA_MODULE_ENABLED */
  746. /**
  747. * @}
  748. */
  749. /**
  750. * @}
  751. */