stm32f1xx_ll_iwdg.h 8.9 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_ll_iwdg.h
  4. * @author MCD Application Team
  5. * @brief Header file of IWDG LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32F1xx_LL_IWDG_H
  20. #define STM32F1xx_LL_IWDG_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f1xx.h"
  26. /** @addtogroup STM32F1xx_LL_Driver
  27. * @{
  28. */
  29. #if defined(IWDG)
  30. /** @defgroup IWDG_LL IWDG
  31. * @{
  32. */
  33. /* Private types -------------------------------------------------------------*/
  34. /* Private variables ---------------------------------------------------------*/
  35. /* Private constants ---------------------------------------------------------*/
  36. /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
  37. * @{
  38. */
  39. #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
  40. #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
  41. #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
  42. #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
  43. /**
  44. * @}
  45. */
  46. /* Private macros ------------------------------------------------------------*/
  47. /* Exported types ------------------------------------------------------------*/
  48. /* Exported constants --------------------------------------------------------*/
  49. /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
  50. * @{
  51. */
  52. /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
  53. * @brief Flags defines which can be used with LL_IWDG_ReadReg function
  54. * @{
  55. */
  56. #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
  57. #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
  58. /**
  59. * @}
  60. */
  61. /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
  62. * @{
  63. */
  64. #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
  65. #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
  66. #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
  67. #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
  68. #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
  69. #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
  70. #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
  71. /**
  72. * @}
  73. */
  74. /**
  75. * @}
  76. */
  77. /* Exported macro ------------------------------------------------------------*/
  78. /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
  79. * @{
  80. */
  81. /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
  82. * @{
  83. */
  84. /**
  85. * @brief Write a value in IWDG register
  86. * @param __INSTANCE__ IWDG Instance
  87. * @param __REG__ Register to be written
  88. * @param __VALUE__ Value to be written in the register
  89. * @retval None
  90. */
  91. #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  92. /**
  93. * @brief Read a value in IWDG register
  94. * @param __INSTANCE__ IWDG Instance
  95. * @param __REG__ Register to be read
  96. * @retval Register value
  97. */
  98. #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  99. /**
  100. * @}
  101. */
  102. /**
  103. * @}
  104. */
  105. /* Exported functions --------------------------------------------------------*/
  106. /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
  107. * @{
  108. */
  109. /** @defgroup IWDG_LL_EF_Configuration Configuration
  110. * @{
  111. */
  112. /**
  113. * @brief Start the Independent Watchdog
  114. * @note Except if the hardware watchdog option is selected
  115. * @rmtoll KR KEY LL_IWDG_Enable
  116. * @param IWDGx IWDG Instance
  117. * @retval None
  118. */
  119. __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
  120. {
  121. WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
  122. }
  123. /**
  124. * @brief Reloads IWDG counter with value defined in the reload register
  125. * @rmtoll KR KEY LL_IWDG_ReloadCounter
  126. * @param IWDGx IWDG Instance
  127. * @retval None
  128. */
  129. __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
  130. {
  131. WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
  132. }
  133. /**
  134. * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
  135. * @rmtoll KR KEY LL_IWDG_EnableWriteAccess
  136. * @param IWDGx IWDG Instance
  137. * @retval None
  138. */
  139. __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
  140. {
  141. WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
  142. }
  143. /**
  144. * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
  145. * @rmtoll KR KEY LL_IWDG_DisableWriteAccess
  146. * @param IWDGx IWDG Instance
  147. * @retval None
  148. */
  149. __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
  150. {
  151. WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
  152. }
  153. /**
  154. * @brief Select the prescaler of the IWDG
  155. * @rmtoll PR PR LL_IWDG_SetPrescaler
  156. * @param IWDGx IWDG Instance
  157. * @param Prescaler This parameter can be one of the following values:
  158. * @arg @ref LL_IWDG_PRESCALER_4
  159. * @arg @ref LL_IWDG_PRESCALER_8
  160. * @arg @ref LL_IWDG_PRESCALER_16
  161. * @arg @ref LL_IWDG_PRESCALER_32
  162. * @arg @ref LL_IWDG_PRESCALER_64
  163. * @arg @ref LL_IWDG_PRESCALER_128
  164. * @arg @ref LL_IWDG_PRESCALER_256
  165. * @retval None
  166. */
  167. __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
  168. {
  169. WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
  170. }
  171. /**
  172. * @brief Get the selected prescaler of the IWDG
  173. * @rmtoll PR PR LL_IWDG_GetPrescaler
  174. * @param IWDGx IWDG Instance
  175. * @retval Returned value can be one of the following values:
  176. * @arg @ref LL_IWDG_PRESCALER_4
  177. * @arg @ref LL_IWDG_PRESCALER_8
  178. * @arg @ref LL_IWDG_PRESCALER_16
  179. * @arg @ref LL_IWDG_PRESCALER_32
  180. * @arg @ref LL_IWDG_PRESCALER_64
  181. * @arg @ref LL_IWDG_PRESCALER_128
  182. * @arg @ref LL_IWDG_PRESCALER_256
  183. */
  184. __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
  185. {
  186. return (READ_REG(IWDGx->PR));
  187. }
  188. /**
  189. * @brief Specify the IWDG down-counter reload value
  190. * @rmtoll RLR RL LL_IWDG_SetReloadCounter
  191. * @param IWDGx IWDG Instance
  192. * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
  193. * @retval None
  194. */
  195. __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
  196. {
  197. WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
  198. }
  199. /**
  200. * @brief Get the specified IWDG down-counter reload value
  201. * @rmtoll RLR RL LL_IWDG_GetReloadCounter
  202. * @param IWDGx IWDG Instance
  203. * @retval Value between Min_Data=0 and Max_Data=0x0FFF
  204. */
  205. __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
  206. {
  207. return (READ_REG(IWDGx->RLR));
  208. }
  209. /**
  210. * @}
  211. */
  212. /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
  213. * @{
  214. */
  215. /**
  216. * @brief Check if flag Prescaler Value Update is set or not
  217. * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
  218. * @param IWDGx IWDG Instance
  219. * @retval State of bit (1 or 0).
  220. */
  221. __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
  222. {
  223. return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
  224. }
  225. /**
  226. * @brief Check if flag Reload Value Update is set or not
  227. * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
  228. * @param IWDGx IWDG Instance
  229. * @retval State of bit (1 or 0).
  230. */
  231. __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
  232. {
  233. return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
  234. }
  235. /**
  236. * @brief Check if flags Prescaler & Reload Value Update are reset or not
  237. * @rmtoll SR PVU LL_IWDG_IsReady\n
  238. * SR RVU LL_IWDG_IsReady
  239. * @param IWDGx IWDG Instance
  240. * @retval State of bits (1 or 0).
  241. */
  242. __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
  243. {
  244. return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL);
  245. }
  246. /**
  247. * @}
  248. */
  249. /**
  250. * @}
  251. */
  252. /**
  253. * @}
  254. */
  255. #endif /* IWDG */
  256. /**
  257. * @}
  258. */
  259. #ifdef __cplusplus
  260. }
  261. #endif
  262. #endif /* STM32F1xx_LL_IWDG_H */