startup_stm32f105xc.s 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463
  1. /**
  2. *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
  3. * @file startup_stm32f105xc.s
  4. * @author MCD Application Team
  5. * @brief STM32F105xC Devices vector table for Atollic toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Configure the clock system
  11. * - Branches to main in the C library (which eventually
  12. * calls main()).
  13. * After Reset the Cortex-M3 processor is in Thread mode,
  14. * priority is Privileged, and the Stack is set to Main.
  15. ******************************************************************************
  16. * @attention
  17. *
  18. * Copyright (c) 2017-2021 STMicroelectronics.
  19. * All rights reserved.
  20. *
  21. * This software is licensed under terms that can be found in the LICENSE file
  22. * in the root directory of this software component.
  23. * If no LICENSE file comes with this software, it is provided AS-IS.
  24. *
  25. ******************************************************************************
  26. */
  27. .syntax unified
  28. .cpu cortex-m3
  29. .fpu softvfp
  30. .thumb
  31. .global g_pfnVectors
  32. .global Default_Handler
  33. /* start address for the initialization values of the .data section.
  34. defined in linker script */
  35. .word _sidata
  36. /* start address for the .data section. defined in linker script */
  37. .word _sdata
  38. /* end address for the .data section. defined in linker script */
  39. .word _edata
  40. /* start address for the .bss section. defined in linker script */
  41. .word _sbss
  42. /* end address for the .bss section. defined in linker script */
  43. .word _ebss
  44. .equ BootRAM, 0xF1E0F85F
  45. /**
  46. * @brief This is the code that gets called when the processor first
  47. * starts execution following a reset event. Only the absolutely
  48. * necessary set is performed, after which the application
  49. * supplied main() routine is called.
  50. * @param None
  51. * @retval : None
  52. */
  53. .section .text.Reset_Handler
  54. .weak Reset_Handler
  55. .type Reset_Handler, %function
  56. Reset_Handler:
  57. /* Call the clock system initialization function.*/
  58. bl SystemInit
  59. /* Copy the data segment initializers from flash to SRAM */
  60. ldr r0, =_sdata
  61. ldr r1, =_edata
  62. ldr r2, =_sidata
  63. movs r3, #0
  64. b LoopCopyDataInit
  65. CopyDataInit:
  66. ldr r4, [r2, r3]
  67. str r4, [r0, r3]
  68. adds r3, r3, #4
  69. LoopCopyDataInit:
  70. adds r4, r0, r3
  71. cmp r4, r1
  72. bcc CopyDataInit
  73. /* Zero fill the bss segment. */
  74. ldr r2, =_sbss
  75. ldr r4, =_ebss
  76. movs r3, #0
  77. b LoopFillZerobss
  78. FillZerobss:
  79. str r3, [r2]
  80. adds r2, r2, #4
  81. LoopFillZerobss:
  82. cmp r2, r4
  83. bcc FillZerobss
  84. /* Call static constructors */
  85. bl __libc_init_array
  86. /* Call the application's entry point.*/
  87. bl main
  88. bx lr
  89. .size Reset_Handler, .-Reset_Handler
  90. /**
  91. * @brief This is the code that gets called when the processor receives an
  92. * unexpected interrupt. This simply enters an infinite loop, preserving
  93. * the system state for examination by a debugger.
  94. * @param None
  95. * @retval None
  96. */
  97. .section .text.Default_Handler,"ax",%progbits
  98. Default_Handler:
  99. Infinite_Loop:
  100. b Infinite_Loop
  101. .size Default_Handler, .-Default_Handler
  102. /******************************************************************************
  103. *
  104. * The minimal vector table for a Cortex M3. Note that the proper constructs
  105. * must be placed on this to ensure that it ends up at physical address
  106. * 0x0000.0000.
  107. *
  108. ******************************************************************************/
  109. .section .isr_vector,"a",%progbits
  110. .type g_pfnVectors, %object
  111. .size g_pfnVectors, .-g_pfnVectors
  112. g_pfnVectors:
  113. .word _estack
  114. .word Reset_Handler
  115. .word NMI_Handler
  116. .word HardFault_Handler
  117. .word MemManage_Handler
  118. .word BusFault_Handler
  119. .word UsageFault_Handler
  120. .word 0
  121. .word 0
  122. .word 0
  123. .word 0
  124. .word SVC_Handler
  125. .word DebugMon_Handler
  126. .word 0
  127. .word PendSV_Handler
  128. .word SysTick_Handler
  129. .word WWDG_IRQHandler
  130. .word PVD_IRQHandler
  131. .word TAMPER_IRQHandler
  132. .word RTC_IRQHandler
  133. .word FLASH_IRQHandler
  134. .word RCC_IRQHandler
  135. .word EXTI0_IRQHandler
  136. .word EXTI1_IRQHandler
  137. .word EXTI2_IRQHandler
  138. .word EXTI3_IRQHandler
  139. .word EXTI4_IRQHandler
  140. .word DMA1_Channel1_IRQHandler
  141. .word DMA1_Channel2_IRQHandler
  142. .word DMA1_Channel3_IRQHandler
  143. .word DMA1_Channel4_IRQHandler
  144. .word DMA1_Channel5_IRQHandler
  145. .word DMA1_Channel6_IRQHandler
  146. .word DMA1_Channel7_IRQHandler
  147. .word ADC1_2_IRQHandler
  148. .word CAN1_TX_IRQHandler
  149. .word CAN1_RX0_IRQHandler
  150. .word CAN1_RX1_IRQHandler
  151. .word CAN1_SCE_IRQHandler
  152. .word EXTI9_5_IRQHandler
  153. .word TIM1_BRK_IRQHandler
  154. .word TIM1_UP_IRQHandler
  155. .word TIM1_TRG_COM_IRQHandler
  156. .word TIM1_CC_IRQHandler
  157. .word TIM2_IRQHandler
  158. .word TIM3_IRQHandler
  159. .word TIM4_IRQHandler
  160. .word I2C1_EV_IRQHandler
  161. .word I2C1_ER_IRQHandler
  162. .word I2C2_EV_IRQHandler
  163. .word I2C2_ER_IRQHandler
  164. .word SPI1_IRQHandler
  165. .word SPI2_IRQHandler
  166. .word USART1_IRQHandler
  167. .word USART2_IRQHandler
  168. .word USART3_IRQHandler
  169. .word EXTI15_10_IRQHandler
  170. .word RTC_Alarm_IRQHandler
  171. .word OTG_FS_WKUP_IRQHandler
  172. .word 0
  173. .word 0
  174. .word 0
  175. .word 0
  176. .word 0
  177. .word 0
  178. .word 0
  179. .word TIM5_IRQHandler
  180. .word SPI3_IRQHandler
  181. .word UART4_IRQHandler
  182. .word UART5_IRQHandler
  183. .word TIM6_IRQHandler
  184. .word TIM7_IRQHandler
  185. .word DMA2_Channel1_IRQHandler
  186. .word DMA2_Channel2_IRQHandler
  187. .word DMA2_Channel3_IRQHandler
  188. .word DMA2_Channel4_IRQHandler
  189. .word DMA2_Channel5_IRQHandler
  190. .word 0
  191. .word 0
  192. .word CAN2_TX_IRQHandler
  193. .word CAN2_RX0_IRQHandler
  194. .word CAN2_RX1_IRQHandler
  195. .word CAN2_SCE_IRQHandler
  196. .word OTG_FS_IRQHandler
  197. .word 0
  198. .word 0
  199. .word 0
  200. .word 0
  201. .word 0
  202. .word 0
  203. .word 0
  204. .word 0
  205. .word 0
  206. .word 0
  207. .word 0
  208. .word 0
  209. .word 0
  210. .word 0
  211. .word 0
  212. .word 0
  213. .word 0
  214. .word 0
  215. .word 0
  216. .word 0
  217. .word 0
  218. .word 0
  219. .word 0
  220. .word 0
  221. .word 0
  222. .word 0
  223. .word 0
  224. .word 0
  225. .word 0
  226. .word 0
  227. .word 0
  228. .word 0
  229. .word 0
  230. .word 0
  231. .word 0
  232. .word 0
  233. .word BootRAM /* @0x1E0. This is for boot in RAM mode for
  234. STM32F10x Connectivity line Devices. */
  235. /*******************************************************************************
  236. *
  237. * Provide weak aliases for each Exception handler to the Default_Handler.
  238. * As they are weak aliases, any function with the same name will override
  239. * this definition.
  240. *
  241. *******************************************************************************/
  242. .weak NMI_Handler
  243. .thumb_set NMI_Handler,Default_Handler
  244. .weak HardFault_Handler
  245. .thumb_set HardFault_Handler,Default_Handler
  246. .weak MemManage_Handler
  247. .thumb_set MemManage_Handler,Default_Handler
  248. .weak BusFault_Handler
  249. .thumb_set BusFault_Handler,Default_Handler
  250. .weak UsageFault_Handler
  251. .thumb_set UsageFault_Handler,Default_Handler
  252. .weak SVC_Handler
  253. .thumb_set SVC_Handler,Default_Handler
  254. .weak DebugMon_Handler
  255. .thumb_set DebugMon_Handler,Default_Handler
  256. .weak PendSV_Handler
  257. .thumb_set PendSV_Handler,Default_Handler
  258. .weak SysTick_Handler
  259. .thumb_set SysTick_Handler,Default_Handler
  260. .weak WWDG_IRQHandler
  261. .thumb_set WWDG_IRQHandler,Default_Handler
  262. .weak PVD_IRQHandler
  263. .thumb_set PVD_IRQHandler,Default_Handler
  264. .weak TAMPER_IRQHandler
  265. .thumb_set TAMPER_IRQHandler,Default_Handler
  266. .weak RTC_IRQHandler
  267. .thumb_set RTC_IRQHandler,Default_Handler
  268. .weak FLASH_IRQHandler
  269. .thumb_set FLASH_IRQHandler,Default_Handler
  270. .weak RCC_IRQHandler
  271. .thumb_set RCC_IRQHandler,Default_Handler
  272. .weak EXTI0_IRQHandler
  273. .thumb_set EXTI0_IRQHandler,Default_Handler
  274. .weak EXTI1_IRQHandler
  275. .thumb_set EXTI1_IRQHandler,Default_Handler
  276. .weak EXTI2_IRQHandler
  277. .thumb_set EXTI2_IRQHandler,Default_Handler
  278. .weak EXTI3_IRQHandler
  279. .thumb_set EXTI3_IRQHandler,Default_Handler
  280. .weak EXTI4_IRQHandler
  281. .thumb_set EXTI4_IRQHandler,Default_Handler
  282. .weak DMA1_Channel1_IRQHandler
  283. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  284. .weak DMA1_Channel2_IRQHandler
  285. .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
  286. .weak DMA1_Channel3_IRQHandler
  287. .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
  288. .weak DMA1_Channel4_IRQHandler
  289. .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
  290. .weak DMA1_Channel5_IRQHandler
  291. .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
  292. .weak DMA1_Channel6_IRQHandler
  293. .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
  294. .weak DMA1_Channel7_IRQHandler
  295. .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
  296. .weak ADC1_2_IRQHandler
  297. .thumb_set ADC1_2_IRQHandler,Default_Handler
  298. .weak CAN1_TX_IRQHandler
  299. .thumb_set CAN1_TX_IRQHandler,Default_Handler
  300. .weak CAN1_RX0_IRQHandler
  301. .thumb_set CAN1_RX0_IRQHandler,Default_Handler
  302. .weak CAN1_RX1_IRQHandler
  303. .thumb_set CAN1_RX1_IRQHandler,Default_Handler
  304. .weak CAN1_SCE_IRQHandler
  305. .thumb_set CAN1_SCE_IRQHandler,Default_Handler
  306. .weak EXTI9_5_IRQHandler
  307. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  308. .weak TIM1_BRK_IRQHandler
  309. .thumb_set TIM1_BRK_IRQHandler,Default_Handler
  310. .weak TIM1_UP_IRQHandler
  311. .thumb_set TIM1_UP_IRQHandler,Default_Handler
  312. .weak TIM1_TRG_COM_IRQHandler
  313. .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
  314. .weak TIM1_CC_IRQHandler
  315. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  316. .weak TIM2_IRQHandler
  317. .thumb_set TIM2_IRQHandler,Default_Handler
  318. .weak TIM3_IRQHandler
  319. .thumb_set TIM3_IRQHandler,Default_Handler
  320. .weak TIM4_IRQHandler
  321. .thumb_set TIM4_IRQHandler,Default_Handler
  322. .weak I2C1_EV_IRQHandler
  323. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  324. .weak I2C1_ER_IRQHandler
  325. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  326. .weak I2C2_EV_IRQHandler
  327. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  328. .weak I2C2_ER_IRQHandler
  329. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  330. .weak SPI1_IRQHandler
  331. .thumb_set SPI1_IRQHandler,Default_Handler
  332. .weak SPI2_IRQHandler
  333. .thumb_set SPI2_IRQHandler,Default_Handler
  334. .weak USART1_IRQHandler
  335. .thumb_set USART1_IRQHandler,Default_Handler
  336. .weak USART2_IRQHandler
  337. .thumb_set USART2_IRQHandler,Default_Handler
  338. .weak USART3_IRQHandler
  339. .thumb_set USART3_IRQHandler,Default_Handler
  340. .weak EXTI15_10_IRQHandler
  341. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  342. .weak RTC_Alarm_IRQHandler
  343. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  344. .weak OTG_FS_WKUP_IRQHandler
  345. .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
  346. .weak TIM5_IRQHandler
  347. .thumb_set TIM5_IRQHandler,Default_Handler
  348. .weak SPI3_IRQHandler
  349. .thumb_set SPI3_IRQHandler,Default_Handler
  350. .weak UART4_IRQHandler
  351. .thumb_set UART4_IRQHandler,Default_Handler
  352. .weak UART5_IRQHandler
  353. .thumb_set UART5_IRQHandler,Default_Handler
  354. .weak TIM6_IRQHandler
  355. .thumb_set TIM6_IRQHandler,Default_Handler
  356. .weak TIM7_IRQHandler
  357. .thumb_set TIM7_IRQHandler,Default_Handler
  358. .weak DMA2_Channel1_IRQHandler
  359. .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
  360. .weak DMA2_Channel2_IRQHandler
  361. .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
  362. .weak DMA2_Channel3_IRQHandler
  363. .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
  364. .weak DMA2_Channel4_IRQHandler
  365. .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
  366. .weak DMA2_Channel5_IRQHandler
  367. .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
  368. .weak CAN2_TX_IRQHandler
  369. .thumb_set CAN2_TX_IRQHandler,Default_Handler
  370. .weak CAN2_RX0_IRQHandler
  371. .thumb_set CAN2_RX0_IRQHandler,Default_Handler
  372. .weak CAN2_RX1_IRQHandler
  373. .thumb_set CAN2_RX1_IRQHandler,Default_Handler
  374. .weak CAN2_SCE_IRQHandler
  375. .thumb_set CAN2_SCE_IRQHandler,Default_Handler
  376. .weak OTG_FS_IRQHandler
  377. .thumb_set OTG_FS_IRQHandler ,Default_Handler