startup_stm32f101xe.s 10 KB

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  1. /**
  2. *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
  3. * @file startup_stm32f101xe.s
  4. * @author MCD Application Team
  5. * @brief STM32F101xE Value Line Devices vector table for Atollic toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Configure the clock system
  11. * - Branches to main in the C library (which eventually
  12. * calls main()).
  13. * After Reset the Cortex-M3 processor is in Thread mode,
  14. * priority is Privileged, and the Stack is set to Main.
  15. ******************************************************************************
  16. * @attention
  17. *
  18. * Copyright (c) 2017-2021 STMicroelectronics.
  19. * All rights reserved.
  20. *
  21. * This software is licensed under terms that can be found in the LICENSE file
  22. * in the root directory of this software component.
  23. * If no LICENSE file comes with this software, it is provided AS-IS.
  24. *
  25. ******************************************************************************
  26. */
  27. .syntax unified
  28. .cpu cortex-m3
  29. .fpu softvfp
  30. .thumb
  31. .global g_pfnVectors
  32. .global Default_Handler
  33. /* start address for the initialization values of the .data section.
  34. defined in linker script */
  35. .word _sidata
  36. /* start address for the .data section. defined in linker script */
  37. .word _sdata
  38. /* end address for the .data section. defined in linker script */
  39. .word _edata
  40. /* start address for the .bss section. defined in linker script */
  41. .word _sbss
  42. /* end address for the .bss section. defined in linker script */
  43. .word _ebss
  44. .equ BootRAM, 0xF1E0F85F
  45. /**
  46. * @brief This is the code that gets called when the processor first
  47. * starts execution following a reset event. Only the absolutely
  48. * necessary set is performed, after which the application
  49. * supplied main() routine is called.
  50. * @param None
  51. * @retval : None
  52. */
  53. .section .text.Reset_Handler
  54. .weak Reset_Handler
  55. .type Reset_Handler, %function
  56. Reset_Handler:
  57. /* Call the clock system initialization function.*/
  58. bl SystemInit
  59. /* Copy the data segment initializers from flash to SRAM */
  60. ldr r0, =_sdata
  61. ldr r1, =_edata
  62. ldr r2, =_sidata
  63. movs r3, #0
  64. b LoopCopyDataInit
  65. CopyDataInit:
  66. ldr r4, [r2, r3]
  67. str r4, [r0, r3]
  68. adds r3, r3, #4
  69. LoopCopyDataInit:
  70. adds r4, r0, r3
  71. cmp r4, r1
  72. bcc CopyDataInit
  73. /* Zero fill the bss segment. */
  74. ldr r2, =_sbss
  75. ldr r4, =_ebss
  76. movs r3, #0
  77. b LoopFillZerobss
  78. FillZerobss:
  79. str r3, [r2]
  80. adds r2, r2, #4
  81. LoopFillZerobss:
  82. cmp r2, r4
  83. bcc FillZerobss
  84. /* Call static constructors */
  85. bl __libc_init_array
  86. /* Call the application's entry point.*/
  87. bl main
  88. bx lr
  89. .size Reset_Handler, .-Reset_Handler
  90. /**
  91. * @brief This is the code that gets called when the processor receives an
  92. * unexpected interrupt. This simply enters an infinite loop, preserving
  93. * the system state for examination by a debugger.
  94. *
  95. * @param None
  96. * @retval : None
  97. */
  98. .section .text.Default_Handler,"ax",%progbits
  99. Default_Handler:
  100. Infinite_Loop:
  101. b Infinite_Loop
  102. .size Default_Handler, .-Default_Handler
  103. /******************************************************************************
  104. *
  105. * The minimal vector table for a Cortex M3. Note that the proper constructs
  106. * must be placed on this to ensure that it ends up at physical address
  107. * 0x0000.0000.
  108. *
  109. ******************************************************************************/
  110. .section .isr_vector,"a",%progbits
  111. .type g_pfnVectors, %object
  112. .size g_pfnVectors, .-g_pfnVectors
  113. g_pfnVectors:
  114. .word _estack
  115. .word Reset_Handler
  116. .word NMI_Handler
  117. .word HardFault_Handler
  118. .word MemManage_Handler
  119. .word BusFault_Handler
  120. .word UsageFault_Handler
  121. .word 0
  122. .word 0
  123. .word 0
  124. .word 0
  125. .word SVC_Handler
  126. .word DebugMon_Handler
  127. .word 0
  128. .word PendSV_Handler
  129. .word SysTick_Handler
  130. .word WWDG_IRQHandler
  131. .word PVD_IRQHandler
  132. .word TAMPER_IRQHandler
  133. .word RTC_IRQHandler
  134. .word FLASH_IRQHandler
  135. .word RCC_IRQHandler
  136. .word EXTI0_IRQHandler
  137. .word EXTI1_IRQHandler
  138. .word EXTI2_IRQHandler
  139. .word EXTI3_IRQHandler
  140. .word EXTI4_IRQHandler
  141. .word DMA1_Channel1_IRQHandler
  142. .word DMA1_Channel2_IRQHandler
  143. .word DMA1_Channel3_IRQHandler
  144. .word DMA1_Channel4_IRQHandler
  145. .word DMA1_Channel5_IRQHandler
  146. .word DMA1_Channel6_IRQHandler
  147. .word DMA1_Channel7_IRQHandler
  148. .word ADC1_IRQHandler
  149. .word 0
  150. .word 0
  151. .word 0
  152. .word 0
  153. .word EXTI9_5_IRQHandler
  154. .word 0
  155. .word 0
  156. .word 0
  157. .word 0
  158. .word TIM2_IRQHandler
  159. .word TIM3_IRQHandler
  160. .word TIM4_IRQHandler
  161. .word I2C1_EV_IRQHandler
  162. .word I2C1_ER_IRQHandler
  163. .word I2C2_EV_IRQHandler
  164. .word I2C2_ER_IRQHandler
  165. .word SPI1_IRQHandler
  166. .word SPI2_IRQHandler
  167. .word USART1_IRQHandler
  168. .word USART2_IRQHandler
  169. .word USART3_IRQHandler
  170. .word EXTI15_10_IRQHandler
  171. .word RTC_Alarm_IRQHandler
  172. .word 0
  173. .word 0
  174. .word 0
  175. .word 0
  176. .word 0
  177. .word 0
  178. .word FSMC_IRQHandler
  179. .word 0
  180. .word TIM5_IRQHandler
  181. .word SPI3_IRQHandler
  182. .word UART4_IRQHandler
  183. .word UART5_IRQHandler
  184. .word TIM6_IRQHandler
  185. .word TIM7_IRQHandler
  186. .word DMA2_Channel1_IRQHandler
  187. .word DMA2_Channel2_IRQHandler
  188. .word DMA2_Channel3_IRQHandler
  189. .word DMA2_Channel4_5_IRQHandler
  190. .word 0
  191. .word 0
  192. .word 0
  193. .word 0
  194. .word 0
  195. .word 0
  196. .word 0
  197. .word 0
  198. .word 0
  199. .word 0
  200. .word 0
  201. .word 0
  202. .word 0
  203. .word 0
  204. .word 0
  205. .word 0
  206. .word 0
  207. .word 0
  208. .word 0
  209. .word 0
  210. .word 0
  211. .word 0
  212. .word 0
  213. .word 0
  214. .word 0
  215. .word 0
  216. .word 0
  217. .word 0
  218. .word 0
  219. .word 0
  220. .word 0
  221. .word 0
  222. .word 0
  223. .word 0
  224. .word 0
  225. .word 0
  226. .word 0
  227. .word 0
  228. .word 0
  229. .word 0
  230. .word 0
  231. .word 0
  232. .word 0
  233. .word 0
  234. .word BootRAM /* @0x1E0. This is for boot in RAM mode for
  235. STM32F10x High Density devices. */
  236. /*******************************************************************************
  237. *
  238. * Provide weak aliases for each Exception handler to the Default_Handler.
  239. * As they are weak aliases, any function with the same name will override
  240. * this definition.
  241. *
  242. *******************************************************************************/
  243. .weak NMI_Handler
  244. .thumb_set NMI_Handler,Default_Handler
  245. .weak HardFault_Handler
  246. .thumb_set HardFault_Handler,Default_Handler
  247. .weak MemManage_Handler
  248. .thumb_set MemManage_Handler,Default_Handler
  249. .weak BusFault_Handler
  250. .thumb_set BusFault_Handler,Default_Handler
  251. .weak UsageFault_Handler
  252. .thumb_set UsageFault_Handler,Default_Handler
  253. .weak SVC_Handler
  254. .thumb_set SVC_Handler,Default_Handler
  255. .weak DebugMon_Handler
  256. .thumb_set DebugMon_Handler,Default_Handler
  257. .weak PendSV_Handler
  258. .thumb_set PendSV_Handler,Default_Handler
  259. .weak SysTick_Handler
  260. .thumb_set SysTick_Handler,Default_Handler
  261. .weak WWDG_IRQHandler
  262. .thumb_set WWDG_IRQHandler,Default_Handler
  263. .weak PVD_IRQHandler
  264. .thumb_set PVD_IRQHandler,Default_Handler
  265. .weak TAMPER_IRQHandler
  266. .thumb_set TAMPER_IRQHandler,Default_Handler
  267. .weak RTC_IRQHandler
  268. .thumb_set RTC_IRQHandler,Default_Handler
  269. .weak FLASH_IRQHandler
  270. .thumb_set FLASH_IRQHandler,Default_Handler
  271. .weak RCC_IRQHandler
  272. .thumb_set RCC_IRQHandler,Default_Handler
  273. .weak EXTI0_IRQHandler
  274. .thumb_set EXTI0_IRQHandler,Default_Handler
  275. .weak EXTI1_IRQHandler
  276. .thumb_set EXTI1_IRQHandler,Default_Handler
  277. .weak EXTI2_IRQHandler
  278. .thumb_set EXTI2_IRQHandler,Default_Handler
  279. .weak EXTI3_IRQHandler
  280. .thumb_set EXTI3_IRQHandler,Default_Handler
  281. .weak EXTI4_IRQHandler
  282. .thumb_set EXTI4_IRQHandler,Default_Handler
  283. .weak DMA1_Channel1_IRQHandler
  284. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  285. .weak DMA1_Channel2_IRQHandler
  286. .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
  287. .weak DMA1_Channel3_IRQHandler
  288. .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
  289. .weak DMA1_Channel4_IRQHandler
  290. .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
  291. .weak DMA1_Channel5_IRQHandler
  292. .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
  293. .weak DMA1_Channel6_IRQHandler
  294. .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
  295. .weak DMA1_Channel7_IRQHandler
  296. .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
  297. .weak ADC1_IRQHandler
  298. .thumb_set ADC1_IRQHandler,Default_Handler
  299. .weak EXTI9_5_IRQHandler
  300. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  301. .weak TIM2_IRQHandler
  302. .thumb_set TIM2_IRQHandler,Default_Handler
  303. .weak TIM3_IRQHandler
  304. .thumb_set TIM3_IRQHandler,Default_Handler
  305. .weak TIM4_IRQHandler
  306. .thumb_set TIM4_IRQHandler,Default_Handler
  307. .weak I2C1_EV_IRQHandler
  308. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  309. .weak I2C1_ER_IRQHandler
  310. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  311. .weak I2C2_EV_IRQHandler
  312. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  313. .weak I2C2_ER_IRQHandler
  314. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  315. .weak SPI1_IRQHandler
  316. .thumb_set SPI1_IRQHandler,Default_Handler
  317. .weak SPI2_IRQHandler
  318. .thumb_set SPI2_IRQHandler,Default_Handler
  319. .weak USART1_IRQHandler
  320. .thumb_set USART1_IRQHandler,Default_Handler
  321. .weak USART2_IRQHandler
  322. .thumb_set USART2_IRQHandler,Default_Handler
  323. .weak USART3_IRQHandler
  324. .thumb_set USART3_IRQHandler,Default_Handler
  325. .weak EXTI15_10_IRQHandler
  326. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  327. .weak RTC_Alarm_IRQHandler
  328. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  329. .weak FSMC_IRQHandler
  330. .thumb_set FSMC_IRQHandler,Default_Handler
  331. .weak TIM5_IRQHandler
  332. .thumb_set TIM5_IRQHandler,Default_Handler
  333. .weak SPI3_IRQHandler
  334. .thumb_set SPI3_IRQHandler,Default_Handler
  335. .weak UART4_IRQHandler
  336. .thumb_set UART4_IRQHandler,Default_Handler
  337. .weak UART5_IRQHandler
  338. .thumb_set UART5_IRQHandler,Default_Handler
  339. .weak TIM6_IRQHandler
  340. .thumb_set TIM6_IRQHandler,Default_Handler
  341. .weak TIM7_IRQHandler
  342. .thumb_set TIM7_IRQHandler,Default_Handler
  343. .weak DMA2_Channel1_IRQHandler
  344. .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
  345. .weak DMA2_Channel2_IRQHandler
  346. .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
  347. .weak DMA2_Channel3_IRQHandler
  348. .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
  349. .weak DMA2_Channel4_5_IRQHandler
  350. .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler