startup_stm32f100xe.s 15 KB

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  1. ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f100xe.s
  3. ;* Author : MCD Application Team
  4. ;* Description : STM32F100xE Devices vector table for MDK-ARM toolchain.
  5. ;* This module performs:
  6. ;* - Set the initial SP
  7. ;* - Set the initial PC == Reset_Handler
  8. ;* - Set the vector table entries with the exceptions ISR address
  9. ;* - Configure the clock system and also configure the external
  10. ;* SRAM mounted on STM32100E-EVAL board to be used as data
  11. ;* memory (optional, to be enabled by user)
  12. ;* - Branches to __main in the C library (which eventually
  13. ;* calls main()).
  14. ;* After Reset the Cortex-M3 processor is in Thread mode,
  15. ;* priority is Privileged, and the Stack is set to Main.
  16. ;******************************************************************************
  17. ;* @attention
  18. ;*
  19. ;* Copyright (c) 2017-2021 STMicroelectronics.
  20. ;* All rights reserved.
  21. ;*
  22. ;* This software is licensed under terms that can be found in the LICENSE file
  23. ;* in the root directory of this software component.
  24. ;* If no LICENSE file comes with this software, it is provided AS-IS.
  25. ;*
  26. ;******************************************************************************
  27. ; Amount of memory (in bytes) allocated for Stack
  28. ; Tailor this value to your application needs
  29. ; <h> Stack Configuration
  30. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  31. ; </h>
  32. Stack_Size EQU 0x00000400
  33. AREA STACK, NOINIT, READWRITE, ALIGN=3
  34. Stack_Mem SPACE Stack_Size
  35. __initial_sp
  36. ; <h> Heap Configuration
  37. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  38. ; </h>
  39. Heap_Size EQU 0x00000200
  40. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  41. __heap_base
  42. Heap_Mem SPACE Heap_Size
  43. __heap_limit
  44. PRESERVE8
  45. THUMB
  46. ; Vector Table Mapped to Address 0 at Reset
  47. AREA RESET, DATA, READONLY
  48. EXPORT __Vectors
  49. EXPORT __Vectors_End
  50. EXPORT __Vectors_Size
  51. __Vectors DCD __initial_sp ; Top of Stack
  52. DCD Reset_Handler ; Reset Handler
  53. DCD NMI_Handler ; NMI Handler
  54. DCD HardFault_Handler ; Hard Fault Handler
  55. DCD MemManage_Handler ; MPU Fault Handler
  56. DCD BusFault_Handler ; Bus Fault Handler
  57. DCD UsageFault_Handler ; Usage Fault Handler
  58. DCD 0 ; Reserved
  59. DCD 0 ; Reserved
  60. DCD 0 ; Reserved
  61. DCD 0 ; Reserved
  62. DCD SVC_Handler ; SVCall Handler
  63. DCD DebugMon_Handler ; Debug Monitor Handler
  64. DCD 0 ; Reserved
  65. DCD PendSV_Handler ; PendSV Handler
  66. DCD SysTick_Handler ; SysTick Handler
  67. ; External Interrupts
  68. DCD WWDG_IRQHandler ; Window Watchdog
  69. DCD PVD_IRQHandler ; PVD through EXTI Line detect
  70. DCD TAMPER_IRQHandler ; Tamper
  71. DCD RTC_IRQHandler ; RTC
  72. DCD FLASH_IRQHandler ; Flash
  73. DCD RCC_IRQHandler ; RCC
  74. DCD EXTI0_IRQHandler ; EXTI Line 0
  75. DCD EXTI1_IRQHandler ; EXTI Line 1
  76. DCD EXTI2_IRQHandler ; EXTI Line 2
  77. DCD EXTI3_IRQHandler ; EXTI Line 3
  78. DCD EXTI4_IRQHandler ; EXTI Line 4
  79. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  80. DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
  81. DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
  82. DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
  83. DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
  84. DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
  85. DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
  86. DCD ADC1_IRQHandler ; ADC1
  87. DCD 0 ; Reserved
  88. DCD 0 ; Reserved
  89. DCD 0 ; Reserved
  90. DCD 0 ; Reserved
  91. DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
  92. DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
  93. DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
  94. DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
  95. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  96. DCD TIM2_IRQHandler ; TIM2
  97. DCD TIM3_IRQHandler ; TIM3
  98. DCD TIM4_IRQHandler ; TIM4
  99. DCD I2C1_EV_IRQHandler ; I2C1 Event
  100. DCD I2C1_ER_IRQHandler ; I2C1 Error
  101. DCD I2C2_EV_IRQHandler ; I2C2 Event
  102. DCD I2C2_ER_IRQHandler ; I2C2 Error
  103. DCD SPI1_IRQHandler ; SPI1
  104. DCD SPI2_IRQHandler ; SPI2
  105. DCD USART1_IRQHandler ; USART1
  106. DCD USART2_IRQHandler ; USART2
  107. DCD USART3_IRQHandler ; USART3
  108. DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
  109. DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
  110. DCD CEC_IRQHandler ; HDMI CEC
  111. DCD TIM12_IRQHandler ; TIM12
  112. DCD TIM13_IRQHandler ; TIM13
  113. DCD TIM14_IRQHandler ; TIM14
  114. DCD 0 ; Reserved
  115. DCD 0 ; Reserved
  116. DCD 0 ; Reserved
  117. DCD 0 ; Reserved
  118. DCD TIM5_IRQHandler ; TIM5
  119. DCD SPI3_IRQHandler ; SPI3
  120. DCD UART4_IRQHandler ; UART4
  121. DCD UART5_IRQHandler ; UART5
  122. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
  123. DCD TIM7_IRQHandler ; TIM7
  124. DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
  125. DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
  126. DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
  127. DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
  128. DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
  129. __Vectors_End
  130. __Vectors_Size EQU __Vectors_End - __Vectors
  131. AREA |.text|, CODE, READONLY
  132. ; Reset handler
  133. Reset_Handler PROC
  134. EXPORT Reset_Handler [WEAK]
  135. IMPORT __main
  136. IMPORT SystemInit
  137. LDR R0, =SystemInit
  138. BLX R0
  139. LDR R0, =__main
  140. BX R0
  141. ENDP
  142. ; Dummy Exception Handlers (infinite loops which can be modified)
  143. NMI_Handler PROC
  144. EXPORT NMI_Handler [WEAK]
  145. B .
  146. ENDP
  147. HardFault_Handler\
  148. PROC
  149. EXPORT HardFault_Handler [WEAK]
  150. B .
  151. ENDP
  152. MemManage_Handler\
  153. PROC
  154. EXPORT MemManage_Handler [WEAK]
  155. B .
  156. ENDP
  157. BusFault_Handler\
  158. PROC
  159. EXPORT BusFault_Handler [WEAK]
  160. B .
  161. ENDP
  162. UsageFault_Handler\
  163. PROC
  164. EXPORT UsageFault_Handler [WEAK]
  165. B .
  166. ENDP
  167. SVC_Handler PROC
  168. EXPORT SVC_Handler [WEAK]
  169. B .
  170. ENDP
  171. DebugMon_Handler\
  172. PROC
  173. EXPORT DebugMon_Handler [WEAK]
  174. B .
  175. ENDP
  176. PendSV_Handler PROC
  177. EXPORT PendSV_Handler [WEAK]
  178. B .
  179. ENDP
  180. SysTick_Handler PROC
  181. EXPORT SysTick_Handler [WEAK]
  182. B .
  183. ENDP
  184. Default_Handler PROC
  185. EXPORT WWDG_IRQHandler [WEAK]
  186. EXPORT PVD_IRQHandler [WEAK]
  187. EXPORT TAMPER_IRQHandler [WEAK]
  188. EXPORT RTC_IRQHandler [WEAK]
  189. EXPORT FLASH_IRQHandler [WEAK]
  190. EXPORT RCC_IRQHandler [WEAK]
  191. EXPORT EXTI0_IRQHandler [WEAK]
  192. EXPORT EXTI1_IRQHandler [WEAK]
  193. EXPORT EXTI2_IRQHandler [WEAK]
  194. EXPORT EXTI3_IRQHandler [WEAK]
  195. EXPORT EXTI4_IRQHandler [WEAK]
  196. EXPORT DMA1_Channel1_IRQHandler [WEAK]
  197. EXPORT DMA1_Channel2_IRQHandler [WEAK]
  198. EXPORT DMA1_Channel3_IRQHandler [WEAK]
  199. EXPORT DMA1_Channel4_IRQHandler [WEAK]
  200. EXPORT DMA1_Channel5_IRQHandler [WEAK]
  201. EXPORT DMA1_Channel6_IRQHandler [WEAK]
  202. EXPORT DMA1_Channel7_IRQHandler [WEAK]
  203. EXPORT ADC1_IRQHandler [WEAK]
  204. EXPORT EXTI9_5_IRQHandler [WEAK]
  205. EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
  206. EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
  207. EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
  208. EXPORT TIM1_CC_IRQHandler [WEAK]
  209. EXPORT TIM2_IRQHandler [WEAK]
  210. EXPORT TIM3_IRQHandler [WEAK]
  211. EXPORT TIM4_IRQHandler [WEAK]
  212. EXPORT I2C1_EV_IRQHandler [WEAK]
  213. EXPORT I2C1_ER_IRQHandler [WEAK]
  214. EXPORT I2C2_EV_IRQHandler [WEAK]
  215. EXPORT I2C2_ER_IRQHandler [WEAK]
  216. EXPORT SPI1_IRQHandler [WEAK]
  217. EXPORT SPI2_IRQHandler [WEAK]
  218. EXPORT USART1_IRQHandler [WEAK]
  219. EXPORT USART2_IRQHandler [WEAK]
  220. EXPORT USART3_IRQHandler [WEAK]
  221. EXPORT EXTI15_10_IRQHandler [WEAK]
  222. EXPORT RTC_Alarm_IRQHandler [WEAK]
  223. EXPORT CEC_IRQHandler [WEAK]
  224. EXPORT TIM12_IRQHandler [WEAK]
  225. EXPORT TIM13_IRQHandler [WEAK]
  226. EXPORT TIM14_IRQHandler [WEAK]
  227. EXPORT TIM5_IRQHandler [WEAK]
  228. EXPORT SPI3_IRQHandler [WEAK]
  229. EXPORT UART4_IRQHandler [WEAK]
  230. EXPORT UART5_IRQHandler [WEAK]
  231. EXPORT TIM6_DAC_IRQHandler [WEAK]
  232. EXPORT TIM7_IRQHandler [WEAK]
  233. EXPORT DMA2_Channel1_IRQHandler [WEAK]
  234. EXPORT DMA2_Channel2_IRQHandler [WEAK]
  235. EXPORT DMA2_Channel3_IRQHandler [WEAK]
  236. EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
  237. EXPORT DMA2_Channel5_IRQHandler [WEAK]
  238. WWDG_IRQHandler
  239. PVD_IRQHandler
  240. TAMPER_IRQHandler
  241. RTC_IRQHandler
  242. FLASH_IRQHandler
  243. RCC_IRQHandler
  244. EXTI0_IRQHandler
  245. EXTI1_IRQHandler
  246. EXTI2_IRQHandler
  247. EXTI3_IRQHandler
  248. EXTI4_IRQHandler
  249. DMA1_Channel1_IRQHandler
  250. DMA1_Channel2_IRQHandler
  251. DMA1_Channel3_IRQHandler
  252. DMA1_Channel4_IRQHandler
  253. DMA1_Channel5_IRQHandler
  254. DMA1_Channel6_IRQHandler
  255. DMA1_Channel7_IRQHandler
  256. ADC1_IRQHandler
  257. EXTI9_5_IRQHandler
  258. TIM1_BRK_TIM15_IRQHandler
  259. TIM1_UP_TIM16_IRQHandler
  260. TIM1_TRG_COM_TIM17_IRQHandler
  261. TIM1_CC_IRQHandler
  262. TIM2_IRQHandler
  263. TIM3_IRQHandler
  264. TIM4_IRQHandler
  265. I2C1_EV_IRQHandler
  266. I2C1_ER_IRQHandler
  267. I2C2_EV_IRQHandler
  268. I2C2_ER_IRQHandler
  269. SPI1_IRQHandler
  270. SPI2_IRQHandler
  271. USART1_IRQHandler
  272. USART2_IRQHandler
  273. USART3_IRQHandler
  274. EXTI15_10_IRQHandler
  275. RTC_Alarm_IRQHandler
  276. CEC_IRQHandler
  277. TIM12_IRQHandler
  278. TIM13_IRQHandler
  279. TIM14_IRQHandler
  280. TIM5_IRQHandler
  281. SPI3_IRQHandler
  282. UART4_IRQHandler
  283. UART5_IRQHandler
  284. TIM6_DAC_IRQHandler
  285. TIM7_IRQHandler
  286. DMA2_Channel1_IRQHandler
  287. DMA2_Channel2_IRQHandler
  288. DMA2_Channel3_IRQHandler
  289. DMA2_Channel4_5_IRQHandler
  290. DMA2_Channel5_IRQHandler
  291. B .
  292. ENDP
  293. ALIGN
  294. ;*******************************************************************************
  295. ; User Stack and Heap initialization
  296. ;*******************************************************************************
  297. IF :DEF:__MICROLIB
  298. EXPORT __initial_sp
  299. EXPORT __heap_base
  300. EXPORT __heap_limit
  301. ELSE
  302. IMPORT __use_two_region_memory
  303. EXPORT __user_initial_stackheap
  304. __user_initial_stackheap
  305. LDR R0, = Heap_Mem
  306. LDR R1, =(Stack_Mem + Stack_Size)
  307. LDR R2, = (Heap_Mem + Heap_Size)
  308. LDR R3, = Stack_Mem
  309. BX LR
  310. ALIGN
  311. ENDIF
  312. END