startup_stm32f100xb.s 13 KB

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  1. ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f100xb.s
  3. ;* Author : MCD Application Team
  4. ;* Description : STM32F100xB Devices vector table for MDK-ARM toolchain.
  5. ;* This module performs:
  6. ;* - Set the initial SP
  7. ;* - Set the initial PC == Reset_Handler
  8. ;* - Set the vector table entries with the exceptions ISR address
  9. ;* - Configure the clock system
  10. ;* - Branches to __main in the C library (which eventually
  11. ;* calls main()).
  12. ;* After Reset the Cortex-M3 processor is in Thread mode,
  13. ;* priority is Privileged, and the Stack is set to Main.
  14. ;******************************************************************************
  15. ;* @attention
  16. ;*
  17. ;* Copyright (c) 2017-2021 STMicroelectronics.
  18. ;* All rights reserved.
  19. ;*
  20. ;* This software is licensed under terms that can be found in the LICENSE file
  21. ;* in the root directory of this software component.
  22. ;* If no LICENSE file comes with this software, it is provided AS-IS.
  23. ;*
  24. ;******************************************************************************
  25. ; Amount of memory (in bytes) allocated for Stack
  26. ; Tailor this value to your application needs
  27. ; <h> Stack Configuration
  28. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  29. ; </h>
  30. Stack_Size EQU 0x00000400
  31. AREA STACK, NOINIT, READWRITE, ALIGN=3
  32. Stack_Mem SPACE Stack_Size
  33. __initial_sp
  34. ; <h> Heap Configuration
  35. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  36. ; </h>
  37. Heap_Size EQU 0x00000200
  38. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  39. __heap_base
  40. Heap_Mem SPACE Heap_Size
  41. __heap_limit
  42. PRESERVE8
  43. THUMB
  44. ; Vector Table Mapped to Address 0 at Reset
  45. AREA RESET, DATA, READONLY
  46. EXPORT __Vectors
  47. EXPORT __Vectors_End
  48. EXPORT __Vectors_Size
  49. __Vectors DCD __initial_sp ; Top of Stack
  50. DCD Reset_Handler ; Reset Handler
  51. DCD NMI_Handler ; NMI Handler
  52. DCD HardFault_Handler ; Hard Fault Handler
  53. DCD MemManage_Handler ; MPU Fault Handler
  54. DCD BusFault_Handler ; Bus Fault Handler
  55. DCD UsageFault_Handler ; Usage Fault Handler
  56. DCD 0 ; Reserved
  57. DCD 0 ; Reserved
  58. DCD 0 ; Reserved
  59. DCD 0 ; Reserved
  60. DCD SVC_Handler ; SVCall Handler
  61. DCD DebugMon_Handler ; Debug Monitor Handler
  62. DCD 0 ; Reserved
  63. DCD PendSV_Handler ; PendSV Handler
  64. DCD SysTick_Handler ; SysTick Handler
  65. ; External Interrupts
  66. DCD WWDG_IRQHandler ; Window Watchdog
  67. DCD PVD_IRQHandler ; PVD through EXTI Line detect
  68. DCD TAMPER_IRQHandler ; Tamper
  69. DCD RTC_IRQHandler ; RTC
  70. DCD FLASH_IRQHandler ; Flash
  71. DCD RCC_IRQHandler ; RCC
  72. DCD EXTI0_IRQHandler ; EXTI Line 0
  73. DCD EXTI1_IRQHandler ; EXTI Line 1
  74. DCD EXTI2_IRQHandler ; EXTI Line 2
  75. DCD EXTI3_IRQHandler ; EXTI Line 3
  76. DCD EXTI4_IRQHandler ; EXTI Line 4
  77. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  78. DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
  79. DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
  80. DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
  81. DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
  82. DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
  83. DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
  84. DCD ADC1_IRQHandler ; ADC1
  85. DCD 0 ; Reserved
  86. DCD 0 ; Reserved
  87. DCD 0 ; Reserved
  88. DCD 0 ; Reserved
  89. DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
  90. DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
  91. DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
  92. DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
  93. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  94. DCD TIM2_IRQHandler ; TIM2
  95. DCD TIM3_IRQHandler ; TIM3
  96. DCD TIM4_IRQHandler ; TIM4
  97. DCD I2C1_EV_IRQHandler ; I2C1 Event
  98. DCD I2C1_ER_IRQHandler ; I2C1 Error
  99. DCD I2C2_EV_IRQHandler ; I2C2 Event
  100. DCD I2C2_ER_IRQHandler ; I2C2 Error
  101. DCD SPI1_IRQHandler ; SPI1
  102. DCD SPI2_IRQHandler ; SPI2
  103. DCD USART1_IRQHandler ; USART1
  104. DCD USART2_IRQHandler ; USART2
  105. DCD USART3_IRQHandler ; USART3
  106. DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
  107. DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
  108. DCD CEC_IRQHandler ; HDMI-CEC
  109. DCD 0 ; Reserved
  110. DCD 0 ; Reserved
  111. DCD 0 ; Reserved
  112. DCD 0 ; Reserved
  113. DCD 0 ; Reserved
  114. DCD 0 ; Reserved
  115. DCD 0 ; Reserved
  116. DCD 0 ; Reserved
  117. DCD 0 ; Reserved
  118. DCD 0 ; Reserved
  119. DCD 0 ; Reserved
  120. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
  121. DCD TIM7_IRQHandler ; TIM7
  122. __Vectors_End
  123. __Vectors_Size EQU __Vectors_End - __Vectors
  124. AREA |.text|, CODE, READONLY
  125. ; Reset handler
  126. Reset_Handler PROC
  127. EXPORT Reset_Handler [WEAK]
  128. IMPORT __main
  129. IMPORT SystemInit
  130. LDR R0, =SystemInit
  131. BLX R0
  132. LDR R0, =__main
  133. BX R0
  134. ENDP
  135. ; Dummy Exception Handlers (infinite loops which can be modified)
  136. NMI_Handler PROC
  137. EXPORT NMI_Handler [WEAK]
  138. B .
  139. ENDP
  140. HardFault_Handler\
  141. PROC
  142. EXPORT HardFault_Handler [WEAK]
  143. B .
  144. ENDP
  145. MemManage_Handler\
  146. PROC
  147. EXPORT MemManage_Handler [WEAK]
  148. B .
  149. ENDP
  150. BusFault_Handler\
  151. PROC
  152. EXPORT BusFault_Handler [WEAK]
  153. B .
  154. ENDP
  155. UsageFault_Handler\
  156. PROC
  157. EXPORT UsageFault_Handler [WEAK]
  158. B .
  159. ENDP
  160. SVC_Handler PROC
  161. EXPORT SVC_Handler [WEAK]
  162. B .
  163. ENDP
  164. DebugMon_Handler\
  165. PROC
  166. EXPORT DebugMon_Handler [WEAK]
  167. B .
  168. ENDP
  169. PendSV_Handler PROC
  170. EXPORT PendSV_Handler [WEAK]
  171. B .
  172. ENDP
  173. SysTick_Handler PROC
  174. EXPORT SysTick_Handler [WEAK]
  175. B .
  176. ENDP
  177. Default_Handler PROC
  178. EXPORT WWDG_IRQHandler [WEAK]
  179. EXPORT PVD_IRQHandler [WEAK]
  180. EXPORT TAMPER_IRQHandler [WEAK]
  181. EXPORT RTC_IRQHandler [WEAK]
  182. EXPORT FLASH_IRQHandler [WEAK]
  183. EXPORT RCC_IRQHandler [WEAK]
  184. EXPORT EXTI0_IRQHandler [WEAK]
  185. EXPORT EXTI1_IRQHandler [WEAK]
  186. EXPORT EXTI2_IRQHandler [WEAK]
  187. EXPORT EXTI3_IRQHandler [WEAK]
  188. EXPORT EXTI4_IRQHandler [WEAK]
  189. EXPORT DMA1_Channel1_IRQHandler [WEAK]
  190. EXPORT DMA1_Channel2_IRQHandler [WEAK]
  191. EXPORT DMA1_Channel3_IRQHandler [WEAK]
  192. EXPORT DMA1_Channel4_IRQHandler [WEAK]
  193. EXPORT DMA1_Channel5_IRQHandler [WEAK]
  194. EXPORT DMA1_Channel6_IRQHandler [WEAK]
  195. EXPORT DMA1_Channel7_IRQHandler [WEAK]
  196. EXPORT ADC1_IRQHandler [WEAK]
  197. EXPORT EXTI9_5_IRQHandler [WEAK]
  198. EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
  199. EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
  200. EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
  201. EXPORT TIM1_CC_IRQHandler [WEAK]
  202. EXPORT TIM2_IRQHandler [WEAK]
  203. EXPORT TIM3_IRQHandler [WEAK]
  204. EXPORT TIM4_IRQHandler [WEAK]
  205. EXPORT I2C1_EV_IRQHandler [WEAK]
  206. EXPORT I2C1_ER_IRQHandler [WEAK]
  207. EXPORT I2C2_EV_IRQHandler [WEAK]
  208. EXPORT I2C2_ER_IRQHandler [WEAK]
  209. EXPORT SPI1_IRQHandler [WEAK]
  210. EXPORT SPI2_IRQHandler [WEAK]
  211. EXPORT USART1_IRQHandler [WEAK]
  212. EXPORT USART2_IRQHandler [WEAK]
  213. EXPORT USART3_IRQHandler [WEAK]
  214. EXPORT EXTI15_10_IRQHandler [WEAK]
  215. EXPORT RTC_Alarm_IRQHandler [WEAK]
  216. EXPORT CEC_IRQHandler [WEAK]
  217. EXPORT TIM6_DAC_IRQHandler [WEAK]
  218. EXPORT TIM7_IRQHandler [WEAK]
  219. WWDG_IRQHandler
  220. PVD_IRQHandler
  221. TAMPER_IRQHandler
  222. RTC_IRQHandler
  223. FLASH_IRQHandler
  224. RCC_IRQHandler
  225. EXTI0_IRQHandler
  226. EXTI1_IRQHandler
  227. EXTI2_IRQHandler
  228. EXTI3_IRQHandler
  229. EXTI4_IRQHandler
  230. DMA1_Channel1_IRQHandler
  231. DMA1_Channel2_IRQHandler
  232. DMA1_Channel3_IRQHandler
  233. DMA1_Channel4_IRQHandler
  234. DMA1_Channel5_IRQHandler
  235. DMA1_Channel6_IRQHandler
  236. DMA1_Channel7_IRQHandler
  237. ADC1_IRQHandler
  238. EXTI9_5_IRQHandler
  239. TIM1_BRK_TIM15_IRQHandler
  240. TIM1_UP_TIM16_IRQHandler
  241. TIM1_TRG_COM_TIM17_IRQHandler
  242. TIM1_CC_IRQHandler
  243. TIM2_IRQHandler
  244. TIM3_IRQHandler
  245. TIM4_IRQHandler
  246. I2C1_EV_IRQHandler
  247. I2C1_ER_IRQHandler
  248. I2C2_EV_IRQHandler
  249. I2C2_ER_IRQHandler
  250. SPI1_IRQHandler
  251. SPI2_IRQHandler
  252. USART1_IRQHandler
  253. USART2_IRQHandler
  254. USART3_IRQHandler
  255. EXTI15_10_IRQHandler
  256. RTC_Alarm_IRQHandler
  257. CEC_IRQHandler
  258. TIM6_DAC_IRQHandler
  259. TIM7_IRQHandler
  260. B .
  261. ENDP
  262. ALIGN
  263. ;*******************************************************************************
  264. ; User Stack and Heap initialization
  265. ;*******************************************************************************
  266. IF :DEF:__MICROLIB
  267. EXPORT __initial_sp
  268. EXPORT __heap_base
  269. EXPORT __heap_limit
  270. ELSE
  271. IMPORT __use_two_region_memory
  272. EXPORT __user_initial_stackheap
  273. __user_initial_stackheap
  274. LDR R0, = Heap_Mem
  275. LDR R1, =(Stack_Mem + Stack_Size)
  276. LDR R2, = (Heap_Mem + Heap_Size)
  277. LDR R3, = Stack_Mem
  278. BX LR
  279. ALIGN
  280. ENDIF
  281. END