arm_shift_q7.c 6.0 KB

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  1. /* ----------------------------------------------------------------------
  2. * Project: CMSIS DSP Library
  3. * Title: arm_shift_q7.c
  4. * Description: Processing function for the Q7 Shifting
  5. *
  6. * $Date: 27. January 2017
  7. * $Revision: V.1.5.1
  8. *
  9. * Target Processor: Cortex-M cores
  10. * -------------------------------------------------------------------- */
  11. /*
  12. * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
  13. *
  14. * SPDX-License-Identifier: Apache-2.0
  15. *
  16. * Licensed under the Apache License, Version 2.0 (the License); you may
  17. * not use this file except in compliance with the License.
  18. * You may obtain a copy of the License at
  19. *
  20. * www.apache.org/licenses/LICENSE-2.0
  21. *
  22. * Unless required by applicable law or agreed to in writing, software
  23. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25. * See the License for the specific language governing permissions and
  26. * limitations under the License.
  27. */
  28. #include "arm_math.h"
  29. /**
  30. * @ingroup groupMath
  31. */
  32. /**
  33. * @addtogroup shift
  34. * @{
  35. */
  36. /**
  37. * @brief Shifts the elements of a Q7 vector a specified number of bits.
  38. * @param[in] *pSrc points to the input vector
  39. * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
  40. * @param[out] *pDst points to the output vector
  41. * @param[in] blockSize number of samples in the vector
  42. * @return none.
  43. *
  44. * \par Conditions for optimum performance
  45. * Input and output buffers should be aligned by 32-bit
  46. *
  47. *
  48. * <b>Scaling and Overflow Behavior:</b>
  49. * \par
  50. * The function uses saturating arithmetic.
  51. * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
  52. */
  53. void arm_shift_q7(
  54. q7_t * pSrc,
  55. int8_t shiftBits,
  56. q7_t * pDst,
  57. uint32_t blockSize)
  58. {
  59. uint32_t blkCnt; /* loop counter */
  60. uint8_t sign; /* Sign of shiftBits */
  61. #if defined (ARM_MATH_DSP)
  62. /* Run the below code for Cortex-M4 and Cortex-M3 */
  63. q7_t in1; /* Input value1 */
  64. q7_t in2; /* Input value2 */
  65. q7_t in3; /* Input value3 */
  66. q7_t in4; /* Input value4 */
  67. /*loop Unrolling */
  68. blkCnt = blockSize >> 2U;
  69. /* Getting the sign of shiftBits */
  70. sign = (shiftBits & 0x80);
  71. /* If the shift value is positive then do right shift else left shift */
  72. if (sign == 0U)
  73. {
  74. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  75. ** a second loop below computes the remaining 1 to 3 samples. */
  76. while (blkCnt > 0U)
  77. {
  78. /* C = A << shiftBits */
  79. /* Read 4 inputs */
  80. in1 = *pSrc;
  81. in2 = *(pSrc + 1);
  82. in3 = *(pSrc + 2);
  83. in4 = *(pSrc + 3);
  84. /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
  85. *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
  86. __SSAT((in2 << shiftBits), 8),
  87. __SSAT((in3 << shiftBits), 8),
  88. __SSAT((in4 << shiftBits), 8));
  89. /* Update source pointer to process next sampels */
  90. pSrc += 4U;
  91. /* Decrement the loop counter */
  92. blkCnt--;
  93. }
  94. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  95. ** No loop unrolling is used. */
  96. blkCnt = blockSize % 0x4U;
  97. while (blkCnt > 0U)
  98. {
  99. /* C = A << shiftBits */
  100. /* Shift the input and then store the result in the destination buffer. */
  101. *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
  102. /* Decrement the loop counter */
  103. blkCnt--;
  104. }
  105. }
  106. else
  107. {
  108. shiftBits = -shiftBits;
  109. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  110. ** a second loop below computes the remaining 1 to 3 samples. */
  111. while (blkCnt > 0U)
  112. {
  113. /* C = A >> shiftBits */
  114. /* Read 4 inputs */
  115. in1 = *pSrc;
  116. in2 = *(pSrc + 1);
  117. in3 = *(pSrc + 2);
  118. in4 = *(pSrc + 3);
  119. /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
  120. *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
  121. (in3 >> shiftBits), (in4 >> shiftBits));
  122. pSrc += 4U;
  123. /* Decrement the loop counter */
  124. blkCnt--;
  125. }
  126. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  127. ** No loop unrolling is used. */
  128. blkCnt = blockSize % 0x4U;
  129. while (blkCnt > 0U)
  130. {
  131. /* C = A >> shiftBits */
  132. /* Shift the input and then store the result in the destination buffer. */
  133. in1 = *pSrc++;
  134. *pDst++ = (in1 >> shiftBits);
  135. /* Decrement the loop counter */
  136. blkCnt--;
  137. }
  138. }
  139. #else
  140. /* Run the below code for Cortex-M0 */
  141. /* Getting the sign of shiftBits */
  142. sign = (shiftBits & 0x80);
  143. /* If the shift value is positive then do right shift else left shift */
  144. if (sign == 0U)
  145. {
  146. /* Initialize blkCnt with number of samples */
  147. blkCnt = blockSize;
  148. while (blkCnt > 0U)
  149. {
  150. /* C = A << shiftBits */
  151. /* Shift the input and then store the result in the destination buffer. */
  152. *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
  153. /* Decrement the loop counter */
  154. blkCnt--;
  155. }
  156. }
  157. else
  158. {
  159. /* Initialize blkCnt with number of samples */
  160. blkCnt = blockSize;
  161. while (blkCnt > 0U)
  162. {
  163. /* C = A >> shiftBits */
  164. /* Shift the input and then store the result in the destination buffer. */
  165. *pDst++ = (*pSrc++ >> -shiftBits);
  166. /* Decrement the loop counter */
  167. blkCnt--;
  168. }
  169. }
  170. #endif /* #if defined (ARM_MATH_DSP) */
  171. }
  172. /**
  173. * @} end of shift group
  174. */