arm_fill_q15.c 3.8 KB

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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 31. July 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_fill_q15.c
  9. *
  10. * Description: Fills a constant value into a Q15 vector.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupSupport
  43. */
  44. /**
  45. * @addtogroup Fill
  46. * @{
  47. */
  48. /**
  49. * @brief Fills a constant value into a Q15 vector.
  50. * @param[in] value input value to be filled
  51. * @param[out] *pDst points to output vector
  52. * @param[in] blockSize length of the output vector
  53. * @return none.
  54. *
  55. */
  56. void arm_fill_q15(
  57. q15_t value,
  58. q15_t * pDst,
  59. uint32_t blockSize)
  60. {
  61. uint32_t blkCnt; /* loop counter */
  62. #ifndef ARM_MATH_CM0_FAMILY
  63. /* Run the below code for Cortex-M4 and Cortex-M3 */
  64. q31_t packedValue; /* value packed to 32 bits */
  65. /*loop Unrolling */
  66. blkCnt = blockSize >> 2u;
  67. /* Packing two 16 bit values to 32 bit value in order to use SIMD */
  68. packedValue = __PKHBT(value, value, 16u);
  69. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  70. ** a second loop below computes the remaining 1 to 3 samples. */
  71. while(blkCnt > 0u)
  72. {
  73. /* C = value */
  74. /* Fill the value in the destination buffer */
  75. *__SIMD32(pDst)++ = packedValue;
  76. *__SIMD32(pDst)++ = packedValue;
  77. /* Decrement the loop counter */
  78. blkCnt--;
  79. }
  80. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  81. ** No loop unrolling is used. */
  82. blkCnt = blockSize % 0x4u;
  83. #else
  84. /* Run the below code for Cortex-M0 */
  85. /* Loop over blockSize number of values */
  86. blkCnt = blockSize;
  87. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  88. while(blkCnt > 0u)
  89. {
  90. /* C = value */
  91. /* Fill the value in the destination buffer */
  92. *pDst++ = value;
  93. /* Decrement the loop counter */
  94. blkCnt--;
  95. }
  96. }
  97. /**
  98. * @} end of Fill group
  99. */