stm32f4xx_cryp.c 35 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_cryp.c
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Cryptographic processor (CRYP) peripheral:
  9. * + Initialization and Configuration functions
  10. * + Data treatment functions
  11. * + Context swapping functions
  12. * + DMA interface function
  13. * + Interrupts and flags management
  14. *
  15. @verbatim
  16. ===================================================================
  17. ##### How to use this driver #####
  18. ===================================================================
  19. [..]
  20. (#) Enable the CRYP controller clock using
  21. RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); function.
  22. (#) Initialize the CRYP using CRYP_Init(), CRYP_KeyInit() and if needed
  23. CRYP_IVInit().
  24. (#) Flush the IN and OUT FIFOs by using CRYP_FIFOFlush() function.
  25. (#) Enable the CRYP controller using the CRYP_Cmd() function.
  26. (#) If using DMA for Data input and output transfer, activate the needed DMA
  27. Requests using CRYP_DMACmd() function
  28. (#) If DMA is not used for data transfer, use CRYP_DataIn() and CRYP_DataOut()
  29. functions to enter data to IN FIFO and get result from OUT FIFO.
  30. (#) To control CRYP events you can use one of the following two methods:
  31. (++) Check on CRYP flags using the CRYP_GetFlagStatus() function.
  32. (++) Use CRYP interrupts through the function CRYP_ITConfig() at
  33. initialization phase and CRYP_GetITStatus() function into interrupt
  34. routines in processing phase.
  35. (#) Save and restore Cryptographic processor context using CRYP_SaveContext()
  36. and CRYP_RestoreContext() functions.
  37. *** Procedure to perform an encryption or a decryption ***
  38. ==========================================================
  39. *** Initialization ***
  40. ======================
  41. [..]
  42. (#) Initialize the peripheral using CRYP_Init(), CRYP_KeyInit() and CRYP_IVInit
  43. functions:
  44. (++) Configure the key size (128-, 192- or 256-bit, in the AES only)
  45. (++) Enter the symmetric key
  46. (++) Configure the data type
  47. (++) In case of decryption in AES-ECB or AES-CBC, you must prepare
  48. the key: configure the key preparation mode. Then Enable the CRYP
  49. peripheral using CRYP_Cmd() function: the BUSY flag is set.
  50. Wait until BUSY flag is reset : the key is prepared for decryption
  51. (++) Configure the algorithm and chaining (the DES/TDES in ECB/CBC, the
  52. AES in ECB/CBC/CTR)
  53. (++) Configure the direction (encryption/decryption).
  54. (++) Write the initialization vectors (in CBC or CTR modes only)
  55. (#) Flush the IN and OUT FIFOs using the CRYP_FIFOFlush() function
  56. *** Basic Processing mode (polling mode) ***
  57. ============================================
  58. [..]
  59. (#) Enable the cryptographic processor using CRYP_Cmd() function.
  60. (#) Write the first blocks in the input FIFO (2 to 8 words) using
  61. CRYP_DataIn() function.
  62. (#) Repeat the following sequence until the complete message has been
  63. processed:
  64. (++) Wait for flag CRYP_FLAG_OFNE occurs (using CRYP_GetFlagStatus()
  65. function), then read the OUT-FIFO using CRYP_DataOut() function
  66. (1 block or until the FIFO is empty)
  67. (++) Wait for flag CRYP_FLAG_IFNF occurs, (using CRYP_GetFlagStatus()
  68. function then write the IN FIFO using CRYP_DataIn() function
  69. (1 block or until the FIFO is full)
  70. (#) At the end of the processing, CRYP_FLAG_BUSY flag will be reset and
  71. both FIFOs are empty (CRYP_FLAG_IFEM is set and CRYP_FLAG_OFNE is
  72. reset). You can disable the peripheral using CRYP_Cmd() function.
  73. *** Interrupts Processing mode ***
  74. ==================================
  75. [..] In this mode, Processing is done when the data are transferred by the
  76. CPU during interrupts.
  77. (#) Enable the interrupts CRYP_IT_INI and CRYP_IT_OUTI using CRYP_ITConfig()
  78. function.
  79. (#) Enable the cryptographic processor using CRYP_Cmd() function.
  80. (#) In the CRYP_IT_INI interrupt handler : load the input message into the
  81. IN FIFO using CRYP_DataIn() function . You can load 2 or 4 words at a
  82. time, or load data until the IN FIFO is full. When the last word of
  83. the message has been entered into the IN FIFO, disable the CRYP_IT_INI
  84. interrupt (using CRYP_ITConfig() function).
  85. (#) In the CRYP_IT_OUTI interrupt handler : read the output message from
  86. the OUT FIFO using CRYP_DataOut() function. You can read 1 block (2 or
  87. 4 words) at a time or read data until the FIFO is empty.
  88. When the last word has been read, INIM=0, BUSY=0 and both FIFOs are
  89. empty (CRYP_FLAG_IFEM is set and CRYP_FLAG_OFNE is reset).
  90. You can disable the CRYP_IT_OUTI interrupt (using CRYP_ITConfig()
  91. function) and you can disable the peripheral using CRYP_Cmd() function.
  92. *** DMA Processing mode ***
  93. ===========================
  94. [..] In this mode, Processing is done when the DMA is used to transfer the
  95. data from/to the memory.
  96. (#) Configure the DMA controller to transfer the input data from the
  97. memory using DMA_Init() function.
  98. The transfer length is the length of the message.
  99. As message padding is not managed by the peripheral, the message
  100. length must be an entire number of blocks. The data are transferred
  101. in burst mode. The burst length is 4 words in the AES and 2 or 4
  102. words in the DES/TDES. The DMA should be configured to set an
  103. interrupt on transfer completion of the output data to indicate that
  104. the processing is finished.
  105. Refer to DMA peripheral driver for more details.
  106. (#) Enable the cryptographic processor using CRYP_Cmd() function.
  107. Enable the DMA requests CRYP_DMAReq_DataIN and CRYP_DMAReq_DataOUT
  108. using CRYP_DMACmd() function.
  109. (#) All the transfers and processing are managed by the DMA and the
  110. cryptographic processor. The DMA transfer complete interrupt indicates
  111. that the processing is complete. Both FIFOs are normally empty and
  112. CRYP_FLAG_BUSY flag is reset.
  113. @endverbatim
  114. *
  115. ******************************************************************************
  116. * @attention
  117. *
  118. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  119. *
  120. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  121. * You may not use this file except in compliance with the License.
  122. * You may obtain a copy of the License at:
  123. *
  124. * http://www.st.com/software_license_agreement_liberty_v2
  125. *
  126. * Unless required by applicable law or agreed to in writing, software
  127. * distributed under the License is distributed on an "AS IS" BASIS,
  128. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  129. * See the License for the specific language governing permissions and
  130. * limitations under the License.
  131. *
  132. ******************************************************************************
  133. */
  134. /* Includes ------------------------------------------------------------------*/
  135. #include "stm32f4xx_cryp.h"
  136. #include "stm32f4xx_rcc.h"
  137. /** @addtogroup STM32F4xx_StdPeriph_Driver
  138. * @{
  139. */
  140. /** @defgroup CRYP
  141. * @brief CRYP driver modules
  142. * @{
  143. */
  144. /* Private typedef -----------------------------------------------------------*/
  145. /* Private define ------------------------------------------------------------*/
  146. #define FLAG_MASK ((uint8_t)0x20)
  147. #define MAX_TIMEOUT ((uint16_t)0xFFFF)
  148. /* Private macro -------------------------------------------------------------*/
  149. /* Private variables ---------------------------------------------------------*/
  150. /* Private function prototypes -----------------------------------------------*/
  151. /* Private functions ---------------------------------------------------------*/
  152. /** @defgroup CRYP_Private_Functions
  153. * @{
  154. */
  155. /** @defgroup CRYP_Group1 Initialization and Configuration functions
  156. * @brief Initialization and Configuration functions
  157. *
  158. @verbatim
  159. ===============================================================================
  160. ##### Initialization and Configuration functions #####
  161. ===============================================================================
  162. [..] This section provides functions allowing to
  163. (+) Initialize the cryptographic Processor using CRYP_Init() function
  164. (++) Encrypt or Decrypt
  165. (++) mode : TDES-ECB, TDES-CBC,
  166. DES-ECB, DES-CBC,
  167. AES-ECB, AES-CBC, AES-CTR, AES-Key, AES-GCM, AES-CCM
  168. (++) DataType : 32-bit data, 16-bit data, bit data or bit-string
  169. (++) Key Size (only in AES modes)
  170. (+) Configure the Encrypt or Decrypt Key using CRYP_KeyInit() function
  171. (+) Configure the Initialization Vectors(IV) for CBC and CTR modes using
  172. CRYP_IVInit() function.
  173. (+) Flushes the IN and OUT FIFOs : using CRYP_FIFOFlush() function.
  174. (+) Enable or disable the CRYP Processor using CRYP_Cmd() function
  175. @endverbatim
  176. * @{
  177. */
  178. /**
  179. * @brief Deinitializes the CRYP peripheral registers to their default reset values
  180. * @param None
  181. * @retval None
  182. */
  183. void CRYP_DeInit(void)
  184. {
  185. /* Enable CRYP reset state */
  186. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_CRYP, ENABLE);
  187. /* Release CRYP from reset state */
  188. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_CRYP, DISABLE);
  189. }
  190. /**
  191. * @brief Initializes the CRYP peripheral according to the specified parameters
  192. * in the CRYP_InitStruct.
  193. * @param CRYP_InitStruct: pointer to a CRYP_InitTypeDef structure that contains
  194. * the configuration information for the CRYP peripheral.
  195. * @retval None
  196. */
  197. void CRYP_Init(CRYP_InitTypeDef* CRYP_InitStruct)
  198. {
  199. /* Check the parameters */
  200. assert_param(IS_CRYP_ALGOMODE(CRYP_InitStruct->CRYP_AlgoMode));
  201. assert_param(IS_CRYP_DATATYPE(CRYP_InitStruct->CRYP_DataType));
  202. assert_param(IS_CRYP_ALGODIR(CRYP_InitStruct->CRYP_AlgoDir));
  203. /* Select Algorithm mode*/
  204. CRYP->CR &= ~CRYP_CR_ALGOMODE;
  205. CRYP->CR |= CRYP_InitStruct->CRYP_AlgoMode;
  206. /* Select dataType */
  207. CRYP->CR &= ~CRYP_CR_DATATYPE;
  208. CRYP->CR |= CRYP_InitStruct->CRYP_DataType;
  209. /* select Key size (used only with AES algorithm) */
  210. if ((CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_TDES_ECB) &&
  211. (CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_TDES_CBC) &&
  212. (CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_DES_ECB) &&
  213. (CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_DES_CBC))
  214. {
  215. assert_param(IS_CRYP_KEYSIZE(CRYP_InitStruct->CRYP_KeySize));
  216. CRYP->CR &= ~CRYP_CR_KEYSIZE;
  217. CRYP->CR |= CRYP_InitStruct->CRYP_KeySize; /* Key size and value must be
  218. configured once the key has
  219. been prepared */
  220. }
  221. /* Select data Direction */
  222. CRYP->CR &= ~CRYP_CR_ALGODIR;
  223. CRYP->CR |= CRYP_InitStruct->CRYP_AlgoDir;
  224. }
  225. /**
  226. * @brief Fills each CRYP_InitStruct member with its default value.
  227. * @param CRYP_InitStruct: pointer to a CRYP_InitTypeDef structure which will
  228. * be initialized.
  229. * @retval None
  230. */
  231. void CRYP_StructInit(CRYP_InitTypeDef* CRYP_InitStruct)
  232. {
  233. /* Initialize the CRYP_AlgoDir member */
  234. CRYP_InitStruct->CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
  235. /* initialize the CRYP_AlgoMode member */
  236. CRYP_InitStruct->CRYP_AlgoMode = CRYP_AlgoMode_TDES_ECB;
  237. /* initialize the CRYP_DataType member */
  238. CRYP_InitStruct->CRYP_DataType = CRYP_DataType_32b;
  239. /* Initialize the CRYP_KeySize member */
  240. CRYP_InitStruct->CRYP_KeySize = CRYP_KeySize_128b;
  241. }
  242. /**
  243. * @brief Initializes the CRYP Keys according to the specified parameters in
  244. * the CRYP_KeyInitStruct.
  245. * @param CRYP_KeyInitStruct: pointer to a CRYP_KeyInitTypeDef structure that
  246. * contains the configuration information for the CRYP Keys.
  247. * @retval None
  248. */
  249. void CRYP_KeyInit(CRYP_KeyInitTypeDef* CRYP_KeyInitStruct)
  250. {
  251. /* Key Initialisation */
  252. CRYP->K0LR = CRYP_KeyInitStruct->CRYP_Key0Left;
  253. CRYP->K0RR = CRYP_KeyInitStruct->CRYP_Key0Right;
  254. CRYP->K1LR = CRYP_KeyInitStruct->CRYP_Key1Left;
  255. CRYP->K1RR = CRYP_KeyInitStruct->CRYP_Key1Right;
  256. CRYP->K2LR = CRYP_KeyInitStruct->CRYP_Key2Left;
  257. CRYP->K2RR = CRYP_KeyInitStruct->CRYP_Key2Right;
  258. CRYP->K3LR = CRYP_KeyInitStruct->CRYP_Key3Left;
  259. CRYP->K3RR = CRYP_KeyInitStruct->CRYP_Key3Right;
  260. }
  261. /**
  262. * @brief Fills each CRYP_KeyInitStruct member with its default value.
  263. * @param CRYP_KeyInitStruct: pointer to a CRYP_KeyInitTypeDef structure
  264. * which will be initialized.
  265. * @retval None
  266. */
  267. void CRYP_KeyStructInit(CRYP_KeyInitTypeDef* CRYP_KeyInitStruct)
  268. {
  269. CRYP_KeyInitStruct->CRYP_Key0Left = 0;
  270. CRYP_KeyInitStruct->CRYP_Key0Right = 0;
  271. CRYP_KeyInitStruct->CRYP_Key1Left = 0;
  272. CRYP_KeyInitStruct->CRYP_Key1Right = 0;
  273. CRYP_KeyInitStruct->CRYP_Key2Left = 0;
  274. CRYP_KeyInitStruct->CRYP_Key2Right = 0;
  275. CRYP_KeyInitStruct->CRYP_Key3Left = 0;
  276. CRYP_KeyInitStruct->CRYP_Key3Right = 0;
  277. }
  278. /**
  279. * @brief Initializes the CRYP Initialization Vectors(IV) according to the
  280. * specified parameters in the CRYP_IVInitStruct.
  281. * @param CRYP_IVInitStruct: pointer to a CRYP_IVInitTypeDef structure that contains
  282. * the configuration information for the CRYP Initialization Vectors(IV).
  283. * @retval None
  284. */
  285. void CRYP_IVInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct)
  286. {
  287. CRYP->IV0LR = CRYP_IVInitStruct->CRYP_IV0Left;
  288. CRYP->IV0RR = CRYP_IVInitStruct->CRYP_IV0Right;
  289. CRYP->IV1LR = CRYP_IVInitStruct->CRYP_IV1Left;
  290. CRYP->IV1RR = CRYP_IVInitStruct->CRYP_IV1Right;
  291. }
  292. /**
  293. * @brief Fills each CRYP_IVInitStruct member with its default value.
  294. * @param CRYP_IVInitStruct: pointer to a CRYP_IVInitTypeDef Initialization
  295. * Vectors(IV) structure which will be initialized.
  296. * @retval None
  297. */
  298. void CRYP_IVStructInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct)
  299. {
  300. CRYP_IVInitStruct->CRYP_IV0Left = 0;
  301. CRYP_IVInitStruct->CRYP_IV0Right = 0;
  302. CRYP_IVInitStruct->CRYP_IV1Left = 0;
  303. CRYP_IVInitStruct->CRYP_IV1Right = 0;
  304. }
  305. /**
  306. * @brief Configures the AES-CCM and AES-GCM phases
  307. * @note This function is used only with AES-CCM or AES-GCM Algorithms
  308. * @param CRYP_Phase: specifies the CRYP AES-CCM and AES-GCM phase to be configured.
  309. * This parameter can be one of the following values:
  310. * @arg CRYP_Phase_Init: Initialization phase
  311. * @arg CRYP_Phase_Header: Header phase
  312. * @arg CRYP_Phase_Payload: Payload phase
  313. * @arg CRYP_Phase_Final: Final phase
  314. * @retval None
  315. */
  316. void CRYP_PhaseConfig(uint32_t CRYP_Phase)
  317. { uint32_t tempcr = 0;
  318. /* Check the parameter */
  319. assert_param(IS_CRYP_PHASE(CRYP_Phase));
  320. /* Get the CR register */
  321. tempcr = CRYP->CR;
  322. /* Reset the phase configuration bits: GCMP_CCMPH */
  323. tempcr &= (uint32_t)(~CRYP_CR_GCM_CCMPH);
  324. /* Set the selected phase */
  325. tempcr |= (uint32_t)CRYP_Phase;
  326. /* Set the CR register */
  327. CRYP->CR = tempcr;
  328. }
  329. /**
  330. * @brief Flushes the IN and OUT FIFOs (that is read and write pointers of the
  331. * FIFOs are reset)
  332. * @note The FIFOs must be flushed only when BUSY flag is reset.
  333. * @param None
  334. * @retval None
  335. */
  336. void CRYP_FIFOFlush(void)
  337. {
  338. /* Reset the read and write pointers of the FIFOs */
  339. CRYP->CR |= CRYP_CR_FFLUSH;
  340. }
  341. /**
  342. * @brief Enables or disables the CRYP peripheral.
  343. * @param NewState: new state of the CRYP peripheral.
  344. * This parameter can be: ENABLE or DISABLE.
  345. * @retval None
  346. */
  347. void CRYP_Cmd(FunctionalState NewState)
  348. {
  349. /* Check the parameters */
  350. assert_param(IS_FUNCTIONAL_STATE(NewState));
  351. if (NewState != DISABLE)
  352. {
  353. /* Enable the Cryptographic processor */
  354. CRYP->CR |= CRYP_CR_CRYPEN;
  355. }
  356. else
  357. {
  358. /* Disable the Cryptographic processor */
  359. CRYP->CR &= ~CRYP_CR_CRYPEN;
  360. }
  361. }
  362. /**
  363. * @}
  364. */
  365. /** @defgroup CRYP_Group2 CRYP Data processing functions
  366. * @brief CRYP Data processing functions
  367. *
  368. @verbatim
  369. ===============================================================================
  370. ##### CRYP Data processing functions #####
  371. ===============================================================================
  372. [..] This section provides functions allowing the encryption and decryption
  373. operations:
  374. (+) Enter data to be treated in the IN FIFO : using CRYP_DataIn() function.
  375. (+) Get the data result from the OUT FIFO : using CRYP_DataOut() function.
  376. @endverbatim
  377. * @{
  378. */
  379. /**
  380. * @brief Writes data in the Data Input register (DIN).
  381. * @note After the DIN register has been read once or several times,
  382. * the FIFO must be flushed (using CRYP_FIFOFlush() function).
  383. * @param Data: data to write in Data Input register
  384. * @retval None
  385. */
  386. void CRYP_DataIn(uint32_t Data)
  387. {
  388. CRYP->DR = Data;
  389. }
  390. /**
  391. * @brief Returns the last data entered into the output FIFO.
  392. * @param None
  393. * @retval Last data entered into the output FIFO.
  394. */
  395. uint32_t CRYP_DataOut(void)
  396. {
  397. return CRYP->DOUT;
  398. }
  399. /**
  400. * @}
  401. */
  402. /** @defgroup CRYP_Group3 Context swapping functions
  403. * @brief Context swapping functions
  404. *
  405. @verbatim
  406. ===============================================================================
  407. ##### Context swapping functions #####
  408. ===============================================================================
  409. [..] This section provides functions allowing to save and store CRYP Context
  410. [..] It is possible to interrupt an encryption/ decryption/ key generation process
  411. to perform another processing with a higher priority, and to complete the
  412. interrupted process later on, when the higher-priority task is complete. To do
  413. so, the context of the interrupted task must be saved from the CRYP registers
  414. to memory, and then be restored from memory to the CRYP registers.
  415. (#) To save the current context, use CRYP_SaveContext() function
  416. (#) To restore the saved context, use CRYP_RestoreContext() function
  417. @endverbatim
  418. * @{
  419. */
  420. /**
  421. * @brief Saves the CRYP peripheral Context.
  422. * @note This function stops DMA transfer before to save the context. After
  423. * restoring the context, you have to enable the DMA again (if the DMA
  424. * was previously used).
  425. * @param CRYP_ContextSave: pointer to a CRYP_Context structure that contains
  426. * the repository for current context.
  427. * @param CRYP_KeyInitStruct: pointer to a CRYP_KeyInitTypeDef structure that
  428. * contains the configuration information for the CRYP Keys.
  429. * @retval None
  430. */
  431. ErrorStatus CRYP_SaveContext(CRYP_Context* CRYP_ContextSave,
  432. CRYP_KeyInitTypeDef* CRYP_KeyInitStruct)
  433. {
  434. __IO uint32_t timeout = 0;
  435. uint32_t ckeckmask = 0, bitstatus;
  436. ErrorStatus status = ERROR;
  437. /* Stop DMA transfers on the IN FIFO by clearing the DIEN bit in the CRYP_DMACR */
  438. CRYP->DMACR &= ~(uint32_t)CRYP_DMACR_DIEN;
  439. /* Wait until both the IN and OUT FIFOs are empty
  440. (IFEM=1 and OFNE=0 in the CRYP_SR register) and the
  441. BUSY bit is cleared. */
  442. if ((CRYP->CR & (uint32_t)(CRYP_CR_ALGOMODE_TDES_ECB | CRYP_CR_ALGOMODE_TDES_CBC)) != (uint32_t)0 )/* TDES */
  443. {
  444. ckeckmask = CRYP_SR_IFEM | CRYP_SR_BUSY ;
  445. }
  446. else /* AES or DES */
  447. {
  448. ckeckmask = CRYP_SR_IFEM | CRYP_SR_BUSY | CRYP_SR_OFNE;
  449. }
  450. do
  451. {
  452. bitstatus = CRYP->SR & ckeckmask;
  453. timeout++;
  454. }
  455. while ((timeout != MAX_TIMEOUT) && (bitstatus != CRYP_SR_IFEM));
  456. if ((CRYP->SR & ckeckmask) != CRYP_SR_IFEM)
  457. {
  458. status = ERROR;
  459. }
  460. else
  461. {
  462. /* Stop DMA transfers on the OUT FIFO by
  463. - writing the DOEN bit to 0 in the CRYP_DMACR register
  464. - and clear the CRYPEN bit. */
  465. CRYP->DMACR &= ~(uint32_t)CRYP_DMACR_DOEN;
  466. CRYP->CR &= ~(uint32_t)CRYP_CR_CRYPEN;
  467. /* Save the current configuration (bit 19, bit[17:16] and bits [9:2] in the CRYP_CR register) */
  468. CRYP_ContextSave->CR_CurrentConfig = CRYP->CR & (CRYP_CR_GCM_CCMPH |
  469. CRYP_CR_KEYSIZE |
  470. CRYP_CR_DATATYPE |
  471. CRYP_CR_ALGOMODE |
  472. CRYP_CR_ALGODIR);
  473. /* and, if not in ECB mode, the initialization vectors. */
  474. CRYP_ContextSave->CRYP_IV0LR = CRYP->IV0LR;
  475. CRYP_ContextSave->CRYP_IV0RR = CRYP->IV0RR;
  476. CRYP_ContextSave->CRYP_IV1LR = CRYP->IV1LR;
  477. CRYP_ContextSave->CRYP_IV1RR = CRYP->IV1RR;
  478. /* save The key value */
  479. CRYP_ContextSave->CRYP_K0LR = CRYP_KeyInitStruct->CRYP_Key0Left;
  480. CRYP_ContextSave->CRYP_K0RR = CRYP_KeyInitStruct->CRYP_Key0Right;
  481. CRYP_ContextSave->CRYP_K1LR = CRYP_KeyInitStruct->CRYP_Key1Left;
  482. CRYP_ContextSave->CRYP_K1RR = CRYP_KeyInitStruct->CRYP_Key1Right;
  483. CRYP_ContextSave->CRYP_K2LR = CRYP_KeyInitStruct->CRYP_Key2Left;
  484. CRYP_ContextSave->CRYP_K2RR = CRYP_KeyInitStruct->CRYP_Key2Right;
  485. CRYP_ContextSave->CRYP_K3LR = CRYP_KeyInitStruct->CRYP_Key3Left;
  486. CRYP_ContextSave->CRYP_K3RR = CRYP_KeyInitStruct->CRYP_Key3Right;
  487. /* Save the content of context swap registers */
  488. CRYP_ContextSave->CRYP_CSGCMCCMR[0] = CRYP->CSGCMCCM0R;
  489. CRYP_ContextSave->CRYP_CSGCMCCMR[1] = CRYP->CSGCMCCM1R;
  490. CRYP_ContextSave->CRYP_CSGCMCCMR[2] = CRYP->CSGCMCCM2R;
  491. CRYP_ContextSave->CRYP_CSGCMCCMR[3] = CRYP->CSGCMCCM3R;
  492. CRYP_ContextSave->CRYP_CSGCMCCMR[4] = CRYP->CSGCMCCM4R;
  493. CRYP_ContextSave->CRYP_CSGCMCCMR[5] = CRYP->CSGCMCCM5R;
  494. CRYP_ContextSave->CRYP_CSGCMCCMR[6] = CRYP->CSGCMCCM6R;
  495. CRYP_ContextSave->CRYP_CSGCMCCMR[7] = CRYP->CSGCMCCM7R;
  496. CRYP_ContextSave->CRYP_CSGCMR[0] = CRYP->CSGCM0R;
  497. CRYP_ContextSave->CRYP_CSGCMR[1] = CRYP->CSGCM1R;
  498. CRYP_ContextSave->CRYP_CSGCMR[2] = CRYP->CSGCM2R;
  499. CRYP_ContextSave->CRYP_CSGCMR[3] = CRYP->CSGCM3R;
  500. CRYP_ContextSave->CRYP_CSGCMR[4] = CRYP->CSGCM4R;
  501. CRYP_ContextSave->CRYP_CSGCMR[5] = CRYP->CSGCM5R;
  502. CRYP_ContextSave->CRYP_CSGCMR[6] = CRYP->CSGCM6R;
  503. CRYP_ContextSave->CRYP_CSGCMR[7] = CRYP->CSGCM7R;
  504. /* When needed, save the DMA status (pointers for IN and OUT messages,
  505. number of remaining bytes, etc.) */
  506. status = SUCCESS;
  507. }
  508. return status;
  509. }
  510. /**
  511. * @brief Restores the CRYP peripheral Context.
  512. * @note Since the DMA transfer is stopped in CRYP_SaveContext() function,
  513. * after restoring the context, you have to enable the DMA again (if the
  514. * DMA was previously used).
  515. * @param CRYP_ContextRestore: pointer to a CRYP_Context structure that contains
  516. * the repository for saved context.
  517. * @note The data that were saved during context saving must be rewritten into
  518. * the IN FIFO.
  519. * @retval None
  520. */
  521. void CRYP_RestoreContext(CRYP_Context* CRYP_ContextRestore)
  522. {
  523. /* Configure the processor with the saved configuration */
  524. CRYP->CR = CRYP_ContextRestore->CR_CurrentConfig;
  525. /* restore The key value */
  526. CRYP->K0LR = CRYP_ContextRestore->CRYP_K0LR;
  527. CRYP->K0RR = CRYP_ContextRestore->CRYP_K0RR;
  528. CRYP->K1LR = CRYP_ContextRestore->CRYP_K1LR;
  529. CRYP->K1RR = CRYP_ContextRestore->CRYP_K1RR;
  530. CRYP->K2LR = CRYP_ContextRestore->CRYP_K2LR;
  531. CRYP->K2RR = CRYP_ContextRestore->CRYP_K2RR;
  532. CRYP->K3LR = CRYP_ContextRestore->CRYP_K3LR;
  533. CRYP->K3RR = CRYP_ContextRestore->CRYP_K3RR;
  534. /* and the initialization vectors. */
  535. CRYP->IV0LR = CRYP_ContextRestore->CRYP_IV0LR;
  536. CRYP->IV0RR = CRYP_ContextRestore->CRYP_IV0RR;
  537. CRYP->IV1LR = CRYP_ContextRestore->CRYP_IV1LR;
  538. CRYP->IV1RR = CRYP_ContextRestore->CRYP_IV1RR;
  539. /* Restore the content of context swap registers */
  540. CRYP->CSGCMCCM0R = CRYP_ContextRestore->CRYP_CSGCMCCMR[0];
  541. CRYP->CSGCMCCM1R = CRYP_ContextRestore->CRYP_CSGCMCCMR[1];
  542. CRYP->CSGCMCCM2R = CRYP_ContextRestore->CRYP_CSGCMCCMR[2];
  543. CRYP->CSGCMCCM3R = CRYP_ContextRestore->CRYP_CSGCMCCMR[3];
  544. CRYP->CSGCMCCM4R = CRYP_ContextRestore->CRYP_CSGCMCCMR[4];
  545. CRYP->CSGCMCCM5R = CRYP_ContextRestore->CRYP_CSGCMCCMR[5];
  546. CRYP->CSGCMCCM6R = CRYP_ContextRestore->CRYP_CSGCMCCMR[6];
  547. CRYP->CSGCMCCM7R = CRYP_ContextRestore->CRYP_CSGCMCCMR[7];
  548. CRYP->CSGCM0R = CRYP_ContextRestore->CRYP_CSGCMR[0];
  549. CRYP->CSGCM1R = CRYP_ContextRestore->CRYP_CSGCMR[1];
  550. CRYP->CSGCM2R = CRYP_ContextRestore->CRYP_CSGCMR[2];
  551. CRYP->CSGCM3R = CRYP_ContextRestore->CRYP_CSGCMR[3];
  552. CRYP->CSGCM4R = CRYP_ContextRestore->CRYP_CSGCMR[4];
  553. CRYP->CSGCM5R = CRYP_ContextRestore->CRYP_CSGCMR[5];
  554. CRYP->CSGCM6R = CRYP_ContextRestore->CRYP_CSGCMR[6];
  555. CRYP->CSGCM7R = CRYP_ContextRestore->CRYP_CSGCMR[7];
  556. /* Enable the cryptographic processor */
  557. CRYP->CR |= CRYP_CR_CRYPEN;
  558. }
  559. /**
  560. * @}
  561. */
  562. /** @defgroup CRYP_Group4 CRYP's DMA interface Configuration function
  563. * @brief CRYP's DMA interface Configuration function
  564. *
  565. @verbatim
  566. ===============================================================================
  567. ##### CRYP's DMA interface Configuration function #####
  568. ===============================================================================
  569. [..] This section provides functions allowing to configure the DMA interface for
  570. CRYP data input and output transfer.
  571. [..] When the DMA mode is enabled (using the CRYP_DMACmd() function), data can be
  572. transferred:
  573. (+) From memory to the CRYP IN FIFO using the DMA peripheral by enabling
  574. the CRYP_DMAReq_DataIN request.
  575. (+) From the CRYP OUT FIFO to the memory using the DMA peripheral by enabling
  576. the CRYP_DMAReq_DataOUT request.
  577. @endverbatim
  578. * @{
  579. */
  580. /**
  581. * @brief Enables or disables the CRYP DMA interface.
  582. * @param CRYP_DMAReq: specifies the CRYP DMA transfer request to be enabled or disabled.
  583. * This parameter can be any combination of the following values:
  584. * @arg CRYP_DMAReq_DataOUT: DMA for outgoing(Tx) data transfer
  585. * @arg CRYP_DMAReq_DataIN: DMA for incoming(Rx) data transfer
  586. * @param NewState: new state of the selected CRYP DMA transfer request.
  587. * This parameter can be: ENABLE or DISABLE.
  588. * @retval None
  589. */
  590. void CRYP_DMACmd(uint8_t CRYP_DMAReq, FunctionalState NewState)
  591. {
  592. /* Check the parameters */
  593. assert_param(IS_CRYP_DMAREQ(CRYP_DMAReq));
  594. assert_param(IS_FUNCTIONAL_STATE(NewState));
  595. if (NewState != DISABLE)
  596. {
  597. /* Enable the selected CRYP DMA request */
  598. CRYP->DMACR |= CRYP_DMAReq;
  599. }
  600. else
  601. {
  602. /* Disable the selected CRYP DMA request */
  603. CRYP->DMACR &= (uint8_t)~CRYP_DMAReq;
  604. }
  605. }
  606. /**
  607. * @}
  608. */
  609. /** @defgroup CRYP_Group5 Interrupts and flags management functions
  610. * @brief Interrupts and flags management functions
  611. *
  612. @verbatim
  613. ===============================================================================
  614. ##### Interrupts and flags management functions #####
  615. ===============================================================================
  616. [..] This section provides functions allowing to configure the CRYP Interrupts and
  617. to get the status and Interrupts pending bits.
  618. [..] The CRYP provides 2 Interrupts sources and 7 Flags:
  619. *** Flags : ***
  620. ===============
  621. [..]
  622. (#) CRYP_FLAG_IFEM : Set when Input FIFO is empty. This Flag is cleared only
  623. by hardware.
  624. (#) CRYP_FLAG_IFNF : Set when Input FIFO is not full. This Flag is cleared
  625. only by hardware.
  626. (#) CRYP_FLAG_INRIS : Set when Input FIFO Raw interrupt is pending it gives
  627. the raw interrupt state prior to masking of the input FIFO service interrupt.
  628. This Flag is cleared only by hardware.
  629. (#) CRYP_FLAG_OFNE : Set when Output FIFO not empty. This Flag is cleared
  630. only by hardware.
  631. (#) CRYP_FLAG_OFFU : Set when Output FIFO is full. This Flag is cleared only
  632. by hardware.
  633. (#) CRYP_FLAG_OUTRIS : Set when Output FIFO Raw interrupt is pending it gives
  634. the raw interrupt state prior to masking of the output FIFO service interrupt.
  635. This Flag is cleared only by hardware.
  636. (#) CRYP_FLAG_BUSY : Set when the CRYP core is currently processing a block
  637. of data or a key preparation (for AES decryption). This Flag is cleared
  638. only by hardware. To clear it, the CRYP core must be disabled and the last
  639. processing has completed.
  640. *** Interrupts : ***
  641. ====================
  642. [..]
  643. (#) CRYP_IT_INI : The input FIFO service interrupt is asserted when there
  644. are less than 4 words in the input FIFO. This interrupt is associated to
  645. CRYP_FLAG_INRIS flag.
  646. -@- This interrupt is cleared by performing write operations to the input FIFO
  647. until it holds 4 or more words. The input FIFO service interrupt INMIS is
  648. enabled with the CRYP enable bit. Consequently, when CRYP is disabled, the
  649. INMIS signal is low even if the input FIFO is empty.
  650. (#) CRYP_IT_OUTI : The output FIFO service interrupt is asserted when there
  651. is one or more (32-bit word) data items in the output FIFO. This interrupt
  652. is associated to CRYP_FLAG_OUTRIS flag.
  653. -@- This interrupt is cleared by reading data from the output FIFO until there
  654. is no valid (32-bit) word left (that is, the interrupt follows the state
  655. of the OFNE (output FIFO not empty) flag).
  656. *** Managing the CRYP controller events : ***
  657. =============================================
  658. [..] The user should identify which mode will be used in his application to manage
  659. the CRYP controller events: Polling mode or Interrupt mode.
  660. (#) In the Polling Mode it is advised to use the following functions:
  661. (++) CRYP_GetFlagStatus() : to check if flags events occur.
  662. -@@- The CRYPT flags do not need to be cleared since they are cleared as
  663. soon as the associated event are reset.
  664. (#) In the Interrupt Mode it is advised to use the following functions:
  665. (++) CRYP_ITConfig() : to enable or disable the interrupt source.
  666. (++) CRYP_GetITStatus() : to check if Interrupt occurs.
  667. -@@- The CRYPT interrupts have no pending bits, the interrupt is cleared as
  668. soon as the associated event is reset.
  669. @endverbatim
  670. * @{
  671. */
  672. /**
  673. * @brief Enables or disables the specified CRYP interrupts.
  674. * @param CRYP_IT: specifies the CRYP interrupt source to be enabled or disabled.
  675. * This parameter can be any combination of the following values:
  676. * @arg CRYP_IT_INI: Input FIFO interrupt
  677. * @arg CRYP_IT_OUTI: Output FIFO interrupt
  678. * @param NewState: new state of the specified CRYP interrupt.
  679. * This parameter can be: ENABLE or DISABLE.
  680. * @retval None
  681. */
  682. void CRYP_ITConfig(uint8_t CRYP_IT, FunctionalState NewState)
  683. {
  684. /* Check the parameters */
  685. assert_param(IS_CRYP_CONFIG_IT(CRYP_IT));
  686. assert_param(IS_FUNCTIONAL_STATE(NewState));
  687. if (NewState != DISABLE)
  688. {
  689. /* Enable the selected CRYP interrupt */
  690. CRYP->IMSCR |= CRYP_IT;
  691. }
  692. else
  693. {
  694. /* Disable the selected CRYP interrupt */
  695. CRYP->IMSCR &= (uint8_t)~CRYP_IT;
  696. }
  697. }
  698. /**
  699. * @brief Checks whether the specified CRYP interrupt has occurred or not.
  700. * @note This function checks the status of the masked interrupt (i.e the
  701. * interrupt should be previously enabled).
  702. * @param CRYP_IT: specifies the CRYP (masked) interrupt source to check.
  703. * This parameter can be one of the following values:
  704. * @arg CRYP_IT_INI: Input FIFO interrupt
  705. * @arg CRYP_IT_OUTI: Output FIFO interrupt
  706. * @retval The new state of CRYP_IT (SET or RESET).
  707. */
  708. ITStatus CRYP_GetITStatus(uint8_t CRYP_IT)
  709. {
  710. ITStatus bitstatus = RESET;
  711. /* Check the parameters */
  712. assert_param(IS_CRYP_GET_IT(CRYP_IT));
  713. /* Check the status of the specified CRYP interrupt */
  714. if ((CRYP->MISR & CRYP_IT) != (uint8_t)RESET)
  715. {
  716. /* CRYP_IT is set */
  717. bitstatus = SET;
  718. }
  719. else
  720. {
  721. /* CRYP_IT is reset */
  722. bitstatus = RESET;
  723. }
  724. /* Return the CRYP_IT status */
  725. return bitstatus;
  726. }
  727. /**
  728. * @brief Returns whether CRYP peripheral is enabled or disabled.
  729. * @param none.
  730. * @retval Current state of the CRYP peripheral (ENABLE or DISABLE).
  731. */
  732. FunctionalState CRYP_GetCmdStatus(void)
  733. {
  734. FunctionalState state = DISABLE;
  735. if ((CRYP->CR & CRYP_CR_CRYPEN) != 0)
  736. {
  737. /* CRYPEN bit is set */
  738. state = ENABLE;
  739. }
  740. else
  741. {
  742. /* CRYPEN bit is reset */
  743. state = DISABLE;
  744. }
  745. return state;
  746. }
  747. /**
  748. * @brief Checks whether the specified CRYP flag is set or not.
  749. * @param CRYP_FLAG: specifies the CRYP flag to check.
  750. * This parameter can be one of the following values:
  751. * @arg CRYP_FLAG_IFEM: Input FIFO Empty flag.
  752. * @arg CRYP_FLAG_IFNF: Input FIFO Not Full flag.
  753. * @arg CRYP_FLAG_OFNE: Output FIFO Not Empty flag.
  754. * @arg CRYP_FLAG_OFFU: Output FIFO Full flag.
  755. * @arg CRYP_FLAG_BUSY: Busy flag.
  756. * @arg CRYP_FLAG_OUTRIS: Output FIFO raw interrupt flag.
  757. * @arg CRYP_FLAG_INRIS: Input FIFO raw interrupt flag.
  758. * @retval The new state of CRYP_FLAG (SET or RESET).
  759. */
  760. FlagStatus CRYP_GetFlagStatus(uint8_t CRYP_FLAG)
  761. {
  762. FlagStatus bitstatus = RESET;
  763. uint32_t tempreg = 0;
  764. /* Check the parameters */
  765. assert_param(IS_CRYP_GET_FLAG(CRYP_FLAG));
  766. /* check if the FLAG is in RISR register */
  767. if ((CRYP_FLAG & FLAG_MASK) != 0x00)
  768. {
  769. tempreg = CRYP->RISR;
  770. }
  771. else /* The FLAG is in SR register */
  772. {
  773. tempreg = CRYP->SR;
  774. }
  775. /* Check the status of the specified CRYP flag */
  776. if ((tempreg & CRYP_FLAG ) != (uint8_t)RESET)
  777. {
  778. /* CRYP_FLAG is set */
  779. bitstatus = SET;
  780. }
  781. else
  782. {
  783. /* CRYP_FLAG is reset */
  784. bitstatus = RESET;
  785. }
  786. /* Return the CRYP_FLAG status */
  787. return bitstatus;
  788. }
  789. /**
  790. * @}
  791. */
  792. /**
  793. * @}
  794. */
  795. /**
  796. * @}
  797. */
  798. /**
  799. * @}
  800. */
  801. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/