04.STM32F407IGT6引脚定义(原始定义).txt 7.4 KB

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  1. /*
  2. *********************************************************************************************************
  3. *
  4. * 【安富莱】STM32-V5开发板CPU的原始引脚定义(供查阅复用功能用)
  5. * 型号: STM32F407IGT6
  6. * 封装: LQFP-176
  7. *
  8. *********************************************************************************************************
  9. */
  10. 编号 功能
  11. 1 PE2/TRACECLK/FSMC_A23
  12. 2 PE3/TRACED0/FSMC_A19
  13. 3 PE4/TRACED1/FSMC_A20/DCMI_D4
  14. 4 PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6
  15. 5 PE6/TRACED3/FSMC_A22/TIM9_CH2/DCMI_D7
  16. 6 VBAT
  17. 7 PI8[RTC_AF2]
  18. 8 PC13[RTC_AF1]
  19. 9 PC14-OSC32_IN(PC14)[OSC32_IN]
  20. 10 PC15-OSC32_OUT(PC15)[OSC32_OUT]
  21. 11 PI9/CAN1_RX
  22. 12 PI10/ETH_MII_RX_ER
  23. 13 PI11/OTG_HS_ULPI_DIR
  24. 14 VSS
  25. 15 VDD
  26. 16 PF0/FSMC_A0/I2C2_SDA
  27. 17 PF1/FSMC_A1/I2C2_SCL
  28. 18 PF2/FSMC_A2/I2C2_SMBA
  29. 19 PF3/FSMC_A3[ADC3_IN9]
  30. 20 PF4/FSMC_A4[ADC3_IN14]
  31. 21 PF5/FSMC_A5[ADC3_IN15]
  32. 22 VSS
  33. 23 VDD
  34. 24 PF6/TIM10_CH1/FSMC_NIORD[ADC3_IN4]
  35. 25 PF7/TIM11_CH1/FSMC_NREG[ADC3_IN5]
  36. 26 PF8/TIM13_CH1/FSMC_NIOWR[ADC3_IN6]
  37. 27 PF9/TIM14_CH1/FSMC_CD[ADC3_IN7]
  38. 28 PF10/FSMC_INTR[ADC3_IN8]
  39. 29 PH0-OSC_IN(PH0)[OSC_IN]
  40. 30 PH1-OSC_OUT(PH1)[OSC_OUT]
  41. 31 NRST
  42. 32 PC0/OTG_HS_ULPI_STP[ADC123_IN10]
  43. 33 PC1/ETH_MDC[ADC123_IN11]
  44. 34 PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD[ADC123_IN12]
  45. 35 PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK[ADC123_IN13]
  46. 36 VDD
  47. 37 VSSA
  48. 38 VREF+
  49. 39 VDDA
  50. 40 PA0-WKUP(PA0)/USART2_CTS/UART4_TX/ETH_MII_CRS/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR[ADC123_IN0/WKUP]
  51. 41 PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2[ADC123_IN1]
  52. 42 PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO[ADC123_IN2]
  53. 43 PH2/ETH_MII_CRS
  54. 44 PH3/ETH_MII_COL
  55. 45 PH4/I2C2_SCL/OTG_HS_ULPI_NXT
  56. 46 PH5/I2C2_SDA
  57. 47 PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL[ADC123_IN3]
  58. 48 VSS
  59. 49 VDD
  60. 50 PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS[ADC12_IN4 /DAC1_OUT]
  61. 51 PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN[ADC12_IN5/DAC2_OUT]
  62. 52 PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN[ADC12_IN6]
  63. 53 PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV[ADC12_IN7]
  64. 54 PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0[ADC12_IN14]
  65. 55 PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1[ADC12_IN15]
  66. 56 PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N[ADC12_IN8]
  67. 57 PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N[ADC12_IN9]
  68. 58 PB2-BOOT1/(PB2)
  69. 59 PF11/DCMI_12
  70. 60 PF12/FSMC_A6
  71. 61 VSS
  72. 62 VDD
  73. 63 PF13/FSMC_A7
  74. 64 PF14/FSMC_A8
  75. 65 PF15/FSMC_A9
  76. 66 PG0/FSMC_A10
  77. 67 PG1/FSMC_A11
  78. 68 PE7/FSMC_D4/TIM1_ETR
  79. 69 PE8/FSMC_D5/TIM1_CH1N
  80. 70 PE9/FSMC_D6/TIM1_CH1
  81. 71 VSS
  82. 72 VDD
  83. 73 PE10/FSMC_D7/TIM1_CH2N
  84. 74 PE11/FSMC_D8/TIM1_CH2
  85. 75 PE12/FSMC_D9/TIM1_CH3N
  86. 76 PE13/FSMC_D10/TIM1_CH3
  87. 77 PE14/FSMC_D11/TIM1_CH4
  88. 78 PE15/FSMC_D12/TIM1_BKIN
  89. 79 PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3
  90. 80 PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4
  91. 81 VCAP_1
  92. 82 VDD
  93. 83 PH6/I2C2_SMBA/TIM12_CH1/ETH_MII_RXD2
  94. 84 PH7/I2C3_SCL/ETH_MII_RXD3
  95. 85 PH8/I2C3_SDA/DCMI_HSYNC
  96. 86 PH9/I2C3_SMBA/TIM12_CH2/DCMI_D0
  97. 87 PH10/TIM5_CH1/DCMI_D1
  98. 88 PH11/TIM5_CH2/DCMI_D2
  99. 89 PH12/TIM5_CH3/DCMI_D3
  100. 90 VSS
  101. 91 VDD
  102. 92 PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID
  103. 93 PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1[OTG_HS_VBUS]
  104. 94 PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD
  105. 95 PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP
  106. 96 PD8/FSMC_D13/USART3_TX
  107. 97 PD9/FSMC_D14/USART3_RX
  108. 98 PD10/FSMC_D15/USART3_CK
  109. 99 PD11/FSMC_CLE/FSMC_A16/USART3_CTS
  110. 100 PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS
  111. 101 PD13/FSMC_A18/TIM4_CH2
  112. 102 VSS
  113. 103 VDD
  114. 104 PD14/FSMC_D0/TIM4_CH3
  115. 105 PD15/FSMC_D1/TIM4_CH4
  116. 106 PG2/FSMC_A12
  117. 107 PG3/FSMC_A13
  118. 108 PG4/FSMC_A14
  119. 109 PG5/FSMC_A15
  120. 110 PG6/FSMC_INT2
  121. 111 PG7/FSMC_INT3/USART6_CK
  122. 112 PG8/USART6_RTS/ETH_PPS_OUT
  123. 113 VSS
  124. 114 VDD
  125. 115 PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1
  126. 116 PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2
  127. 117 PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2
  128. 118 PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4
  129. 119 PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF
  130. 120 PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0[OTG_FS_VBUS]
  131. 121 PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1
  132. 122 PA11/USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM
  133. 123 PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP
  134. 124 PA13(JTMS-SWDIO)/JTMS-SWDIO
  135. 125 VCAP_2
  136. 126 VSS
  137. 127 VDD
  138. 128 PH13/TIM8_CH1N/CAN1_TX
  139. 129 PH14/TIM8_CH2N/DCMI_D4
  140. 130 PH15/TIM8_CH3N/DCMI_D11
  141. 131 PI0/TIM5_CH4/SPI2_NSS/I2S2_WS/DCMI_D13
  142. 132 PI1/SPI2_SCK/I2S2_CK/DCMI_D8
  143. 133 PI2/TIM8_CH4/SPI2_MISO/DCMI_D9/I2S2ext_SD
  144. 134 PI3/TIM8_ETR/SPI2_MOSI/I2S2_SD/DCMI_D10
  145. 135 VSS
  146. 136 VDD
  147. 137 PA14(JTCK-SWCLK)/JTCK-SWCLK
  148. 138 PA15(JTDI)/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS
  149. 139 PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX
  150. 140 PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD
  151. 141 PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK
  152. 142 PD0/FSMC_D2/CAN1_RX
  153. 143 PD1/FSMC_D3/CAN1_TX
  154. 144 PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11
  155. 145 PD3/FSMC_CLK/USART2_CTS
  156. 146 PD4/FSMC_NOE/USART2_RTS
  157. 147 PD5/FSMC_NWE/USART2_TX
  158. 148 VSS
  159. 149 VDD
  160. 150 PD6/FSMC_NWAIT/USART2_RX
  161. 151 PD7/USART2_CK/FSMC_NE1/FSMC_NCE2
  162. 152 PG9/USART6_RX/FSMC_NE2/FSMC_NCE3
  163. 153 PG10/FSMC_NCE4_1/FSMC_NE3
  164. 154 PG11/FSMC_NCE4_2/ETH_MII_TX_EN/ETH_RMII_TX_EN
  165. 155 PG12/FSMC_NE4/USART6_RTS
  166. 156 PG13/FSMC_A24/USART6_CTS/ETH_MII_TXD0/ETH_RMII_TXD0
  167. 157 PG14/FSMC_A25/USART6_TX/ETH_MII_TXD1/ETH_RMII_TXD1
  168. 158 VSS
  169. 159 VDD
  170. 160 PG15/USART6_CTS/DCMI_D13
  171. 161 PB3(JTDO/TRACESWO)/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK
  172. 162 PB4(NJTRST)/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD
  173. 163 PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD
  174. 164 PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX
  175. 165 PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2
  176. 166 BOOT0
  177. 167 PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX
  178. 168 PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX
  179. 169 PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2
  180. 170 PE1/FSMC_NBL1/DCMI_D3
  181. 171 PDR_ON
  182. 172 VDD
  183. 173 PI4/TIM8_BKIN/DCMI_D5
  184. 174 PI5/TIM8_CH1/DCMI_VSYNC
  185. 175 PI6/TIM8_CH2/DCMI_D6
  186. 176 PI7/TIM8_CH3/DCMI_D7
  187. === 结束 ====
  188. 【其中OTG_HS_ULPI 高速USB2.0接口,需要占用12个GPIO】
  189. 13 PI11/OTG_HS_ULPI_DIR ----有2个----
  190. 32 PC0/OTG_HS_ULPI_STP[ADC123_IN10]
  191. 34 PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD[ADC123_IN12] ----有2个----
  192. 45 PH4/I2C2_SCL/OTG_HS_ULPI_NXT
  193. 47 PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL[ADC123_IN3]
  194. 51 PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN[ADC12_IN5/DAC2_OUT]
  195. 56 PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N[ADC12_IN8]
  196. 57 PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N[ADC12_IN9]
  197. 79 PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3
  198. 80 PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4
  199. 92 PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID
  200. 93 PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1[OTG_HS_VBUS]