stm32f4x7_phy.c 7.8 KB

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  1. #include "stm32f4x7_phy.h"
  2. #include "dwt.h"
  3. #include "interface.h"
  4. #include "lwip/api.h"
  5. #include "lwip/sockets.h"
  6. #include "stm32f4x7_eth.h"
  7. ETH_InitTypeDef ETH_InitStructure;
  8. __IO uint32_t EthStatus = 0;
  9. extern struct netif gnetif;
  10. static void phy_gpio_config(void);
  11. static void phy_mac_dma_config(void);
  12. static void nvic_configuration(void);
  13. /**
  14. * @brief Inserts a delay time.
  15. * @param nCount: number of 10ms periods to wait for.
  16. * @retval None
  17. */
  18. void ETH_Delay10ms(uint32_t nCount)
  19. {
  20. // OSTimeDly(10 * nCount);
  21. us_delay(10 * nCount);
  22. }
  23. /*!
  24. \brief setup ethernet system(GPIOs, clocks, MAC, DMA, systick)
  25. \param[in] none
  26. \param[out] none
  27. \retval none
  28. */
  29. void eth_init(void)
  30. {
  31. nvic_configuration();
  32. /* configure the GPIO ports for ethernet pins */
  33. phy_gpio_config();
  34. /* configure the ethernet MAC/DMA */
  35. phy_mac_dma_config();
  36. /* Get Ethernet link status*/
  37. if (ETH_ReadPHYRegister(ETHERNET_PHY_ADDRESS, PHY_SR) & 1)
  38. {
  39. EthStatus |= ETH_LINK_FLAG;
  40. }
  41. // /* Configure the PHY to generate an interrupt on change of link status */
  42. // Eth_Link_PHYITConfig(ETHERNET_PHY_ADDRESS);
  43. ETH_DMAITConfig(ETH_DMA_IT_R | ETH_DMA_IT_NIS, ENABLE);
  44. }
  45. /*!
  46. \brief configures the ethernet interface
  47. \param[in] none
  48. \param[out] none
  49. \retval none
  50. */
  51. static void phy_mac_dma_config(void)
  52. {
  53. /* Reset ETHERNET on AHB Bus */
  54. ETH_DeInit();
  55. /* Software reset */
  56. ETH_SoftwareReset();
  57. /* Wait for software reset */
  58. while (ETH_GetSoftwareResetStatus() == SET)
  59. ;
  60. /* ETHERNET Configuration ------------------------------*/
  61. /* 缺省配置ETH_InitStructure */
  62. ETH_StructInit(&ETH_InitStructure);
  63. /* Fill ETH_InitStructure parametrs */
  64. /*-------------------- MAC ----------------------------*/
  65. /* 开启网络自适应功能,速度和工作模式无需配置 */
  66. ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
  67. // ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable;
  68. // ETH_InitStructure.ETH_Speed = ETH_Speed_10M;
  69. // ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
  70. /* 关闭反馈 */
  71. ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
  72. /* 关闭重传功能 */
  73. ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
  74. /* 关闭自动去除PDA/CRC功能 */
  75. ETH_InitStructure.ETH_AutomaticPadCRCStrip =
  76. ETH_AutomaticPadCRCStrip_Disable;
  77. /* 关闭接收所有的帧 */
  78. ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
  79. /* 允许接收所有广播帧 */
  80. ETH_InitStructure.ETH_BroadcastFramesReception =
  81. ETH_BroadcastFramesReception_Enable;
  82. /* 关闭混合模式的地址过滤 */
  83. ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
  84. /* 对于组播地址使用完美地址过滤 */
  85. ETH_InitStructure.ETH_MulticastFramesFilter =
  86. ETH_MulticastFramesFilter_Perfect;
  87. /* 对单播地址使用完美地址过滤 */
  88. ETH_InitStructure.ETH_UnicastFramesFilter =
  89. ETH_UnicastFramesFilter_Perfect;
  90. #ifdef CHECKSUM_BY_HARDWARE
  91. /* 开启ipv4和TCP/UDP/ICMP的帧校验和卸载 */
  92. ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
  93. #endif
  94. /*------------------------ DMA -------------------------------*/
  95. /*当我们使用帧校验和卸载功能的时候,一定要使能存储转发模式,存储
  96. 转发模式中要保证整个帧存储在FIFO中, 这样MAC能插入/识别出帧校验
  97. 值,当真校验正确的时候DMA就可以处理帧,否则就丢弃掉该帧*/
  98. /* 开启丢弃TCP/IP错误帧 */
  99. ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame =
  100. ETH_DropTCPIPChecksumErrorFrame_Enable;
  101. /* 开启接收数据的存储转发模式 */
  102. ETH_InitStructure.ETH_ReceiveStoreForward =
  103. ETH_ReceiveStoreForward_Enable;
  104. /* 开启发送数据的存储转发模式 */
  105. ETH_InitStructure.ETH_TransmitStoreForward =
  106. ETH_TransmitStoreForward_Enable;
  107. /* 禁止转发错误帧 */
  108. ETH_InitStructure.ETH_ForwardErrorFrames =
  109. ETH_ForwardErrorFrames_Disable;
  110. /* 不转发过小的好帧 */
  111. ETH_InitStructure.ETH_ForwardUndersizedGoodFrames =
  112. ETH_ForwardUndersizedGoodFrames_Disable;
  113. /* 打开处理第二帧功能 */
  114. ETH_InitStructure.ETH_SecondFrameOperate =
  115. ETH_SecondFrameOperate_Enable;
  116. /* 开启DMA传输的地址对齐功能 */
  117. ETH_InitStructure.ETH_AddressAlignedBeats =
  118. ETH_AddressAlignedBeats_Enable;
  119. /* 开启固定突发功能 */
  120. ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
  121. /* DMA发送的最大突发长度为32个节拍 */
  122. ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
  123. /*DMA接收的最大突发长度为32个节拍 */
  124. ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
  125. ETH_InitStructure.ETH_DMAArbitration =
  126. ETH_DMAArbitration_RoundRobin_RxTx_2_1;
  127. /* 配置ETH */
  128. EthStatus = ETH_Init(&ETH_InitStructure, ETHERNET_PHY_ADDRESS);
  129. }
  130. /*!
  131. \brief configures the nested vectored interrupt controller
  132. \param[in] none
  133. \param[out] none
  134. \retval none
  135. */
  136. static void nvic_configuration(void)
  137. {
  138. NVIC_InitTypeDef NVIC_InitStructure;
  139. NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
  140. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
  141. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  142. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  143. NVIC_Init(&NVIC_InitStructure);
  144. }
  145. /*!
  146. \brief configures the different GPIO ports
  147. \param[in] none
  148. \param[out] none
  149. \retval none
  150. */
  151. static void phy_gpio_config(void)
  152. {
  153. /* Enable SYSCFG clock */
  154. RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
  155. #ifdef MII_MODE
  156. #ifdef PHY_CLOCK_MCO
  157. /* output HXTAL clock (25MHz) on CKOUT0 pin(PA8) to clock the PHY */
  158. RCC_MCO1Config(RCC_MCO1Source_HSE, RCC_MCO1Div_1);
  159. #endif /* PHY_CLOCK_MCO */
  160. SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII);
  161. #elif defined RMII_MODE
  162. SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
  163. #endif
  164. }
  165. /**
  166. * @brief This function handles Ethernet link status.
  167. * @param None
  168. * @retval None
  169. */
  170. void ETH_CheckLinkStatus(uint16_t PHYAddress)
  171. {
  172. static uint8_t status = 0;
  173. uint32_t t = ETH_ReadPHYRegister(ETHERNET_PHY_ADDRESS, PHY_SR) & 1;
  174. /* If we have link and previous check was not yet */
  175. if (t && !status)
  176. {
  177. /* Set link up */
  178. netif_set_link_up(&gnetif);
  179. status = 1;
  180. }
  181. /* If we don't have link and it was on previous check */
  182. if (!t && status)
  183. {
  184. // EthLinkStatus = 1;
  185. /* Set link down */
  186. netif_set_link_down(&gnetif);
  187. status = 0;
  188. }
  189. }
  190. /**
  191. * @brief Configure the PHY to generate an interrupt on change of link status.
  192. * @param PHYAddress: external PHY address
  193. * @retval None
  194. */
  195. uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress)
  196. {
  197. uint16_t tmpreg = 0;
  198. /* Read MICR register */
  199. tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MICR);
  200. /* Enable output interrupt events to signal via the INT pin */
  201. tmpreg |= (uint16_t)(PHY_MICR_INT_EN | PHY_MICR_INT_OE);
  202. if (!(ETH_WritePHYRegister(PHYAddress, PHY_MICR, tmpreg)))
  203. {
  204. /* Return ERROR in case of write timeout */
  205. return ETH_ERROR;
  206. }
  207. /* Read MISR register */
  208. tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MISR);
  209. /* Enable Interrupt on change of link status */
  210. tmpreg |= (uint16_t)PHY_MISR_LINK_INT_EN;
  211. if (!(ETH_WritePHYRegister(PHYAddress, PHY_MISR, tmpreg)))
  212. {
  213. /* Return ERROR in case of write timeout */
  214. return ETH_ERROR;
  215. }
  216. /* Return SUCCESS */
  217. return ETH_SUCCESS;
  218. }