arm_rms_q15.c 5.6 KB

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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_rms_q15.c
  9. *
  10. * Description: Root Mean Square of the elements of a Q15 vector.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * ---------------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @addtogroup RMS
  43. * @{
  44. */
  45. /**
  46. * @brief Root Mean Square of the elements of a Q15 vector.
  47. * @param[in] *pSrc points to the input vector
  48. * @param[in] blockSize length of the input vector
  49. * @param[out] *pResult rms value returned here
  50. * @return none.
  51. *
  52. * @details
  53. * <b>Scaling and Overflow Behavior:</b>
  54. *
  55. * \par
  56. * The function is implemented using a 64-bit internal accumulator.
  57. * The input is represented in 1.15 format.
  58. * Intermediate multiplication yields a 2.30 format, and this
  59. * result is added without saturation to a 64-bit accumulator in 34.30 format.
  60. * With 33 guard bits in the accumulator, there is no risk of overflow, and the
  61. * full precision of the intermediate multiplication is preserved.
  62. * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
  63. * 15 bits, and then saturated to yield a result in 1.15 format.
  64. *
  65. */
  66. void arm_rms_q15(
  67. q15_t * pSrc,
  68. uint32_t blockSize,
  69. q15_t * pResult)
  70. {
  71. q63_t sum = 0; /* accumulator */
  72. #ifndef ARM_MATH_CM0_FAMILY
  73. /* Run the below code for Cortex-M4 and Cortex-M3 */
  74. q31_t in; /* temporary variable to store the input value */
  75. q15_t in1; /* temporary variable to store the input value */
  76. uint32_t blkCnt; /* loop counter */
  77. /* loop Unrolling */
  78. blkCnt = blockSize >> 2u;
  79. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  80. ** a second loop below computes the remaining 1 to 3 samples. */
  81. while(blkCnt > 0u)
  82. {
  83. /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
  84. /* Compute sum of the squares and then store the results in a temporary variable, sum */
  85. in = *__SIMD32(pSrc)++;
  86. sum = __SMLALD(in, in, sum);
  87. in = *__SIMD32(pSrc)++;
  88. sum = __SMLALD(in, in, sum);
  89. /* Decrement the loop counter */
  90. blkCnt--;
  91. }
  92. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  93. ** No loop unrolling is used. */
  94. blkCnt = blockSize % 0x4u;
  95. while(blkCnt > 0u)
  96. {
  97. /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
  98. /* Compute sum of the squares and then store the results in a temporary variable, sum */
  99. in1 = *pSrc++;
  100. sum = __SMLALD(in1, in1, sum);
  101. /* Decrement the loop counter */
  102. blkCnt--;
  103. }
  104. /* Truncating and saturating the accumulator to 1.15 format */
  105. /* Store the result in the destination */
  106. arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
  107. #else
  108. /* Run the below code for Cortex-M0 */
  109. q15_t in; /* temporary variable to store the input value */
  110. uint32_t blkCnt; /* loop counter */
  111. /* Loop over blockSize number of values */
  112. blkCnt = blockSize;
  113. while(blkCnt > 0u)
  114. {
  115. /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
  116. /* Compute sum of the squares and then store the results in a temporary variable, sum */
  117. in = *pSrc++;
  118. sum += ((q31_t) in * in);
  119. /* Decrement the loop counter */
  120. blkCnt--;
  121. }
  122. /* Truncating and saturating the accumulator to 1.15 format */
  123. /* Store the result in the destination */
  124. arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
  125. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  126. }
  127. /**
  128. * @} end of RMS group
  129. */