startup_stm32f411xe.s 26 KB

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  1. ;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f411xe.s
  3. ;* Author : MCD Application Team
  4. ;* @version : V1.5.0
  5. ;* @date : 06-March-2015
  6. ;* Description : STM32F411xExx devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* - Branches to __main in the C library (which eventually
  12. ;* calls main()).
  13. ;* After Reset the CortexM4 processor is in Thread mode,
  14. ;* priority is Privileged, and the Stack is set to Main.
  15. ;* <<< Use Configuration Wizard in Context Menu >>>
  16. ;*******************************************************************************
  17. ;
  18. ;* Redistribution and use in source and binary forms, with or without modification,
  19. ;* are permitted provided that the following conditions are met:
  20. ;* 1. Redistributions of source code must retain the above copyright notice,
  21. ;* this list of conditions and the following disclaimer.
  22. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  23. ;* this list of conditions and the following disclaimer in the documentation
  24. ;* and/or other materials provided with the distribution.
  25. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  26. ;* may be used to endorse or promote products derived from this software
  27. ;* without specific prior written permission.
  28. ;*
  29. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  33. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  36. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  37. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39. ;
  40. ;*******************************************************************************
  41. ; Amount of memory (in bytes) allocated for Stack
  42. ; Tailor this value to your application needs
  43. ; <h> Stack Configuration
  44. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  45. ; </h>
  46. Stack_Size EQU 0x00000400
  47. AREA STACK, NOINIT, READWRITE, ALIGN=3
  48. Stack_Mem SPACE Stack_Size
  49. __initial_sp
  50. ; <h> Heap Configuration
  51. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  52. ; </h>
  53. Heap_Size EQU 0x00000200
  54. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  55. __heap_base
  56. Heap_Mem SPACE Heap_Size
  57. __heap_limit
  58. PRESERVE8
  59. THUMB
  60. ; Vector Table Mapped to Address 0 at Reset
  61. AREA RESET, DATA, READONLY
  62. EXPORT __Vectors
  63. EXPORT __Vectors_End
  64. EXPORT __Vectors_Size
  65. __Vectors DCD __initial_sp ; Top of Stack
  66. DCD Reset_Handler ; Reset Handler
  67. DCD NMI_Handler ; NMI Handler
  68. DCD HardFault_Handler ; Hard Fault Handler
  69. DCD MemManage_Handler ; MPU Fault Handler
  70. DCD BusFault_Handler ; Bus Fault Handler
  71. DCD UsageFault_Handler ; Usage Fault Handler
  72. DCD 0 ; Reserved
  73. DCD 0 ; Reserved
  74. DCD 0 ; Reserved
  75. DCD 0 ; Reserved
  76. DCD SVC_Handler ; SVCall Handler
  77. DCD DebugMon_Handler ; Debug Monitor Handler
  78. DCD 0 ; Reserved
  79. DCD PendSV_Handler ; PendSV Handler
  80. DCD SysTick_Handler ; SysTick Handler
  81. ; External Interrupts
  82. DCD WWDG_IRQHandler ; Window WatchDog
  83. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  84. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  85. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  86. DCD FLASH_IRQHandler ; FLASH
  87. DCD RCC_IRQHandler ; RCC
  88. DCD EXTI0_IRQHandler ; EXTI Line0
  89. DCD EXTI1_IRQHandler ; EXTI Line1
  90. DCD EXTI2_IRQHandler ; EXTI Line2
  91. DCD EXTI3_IRQHandler ; EXTI Line3
  92. DCD EXTI4_IRQHandler ; EXTI Line4
  93. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  94. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  95. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  96. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  97. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  98. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  99. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  100. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  101. DCD 0 ; Reserved
  102. DCD 0 ; Reserved
  103. DCD 0 ; Reserved
  104. DCD 0 ; Reserved
  105. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  106. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  107. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  108. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  109. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  110. DCD TIM2_IRQHandler ; TIM2
  111. DCD TIM3_IRQHandler ; TIM3
  112. DCD TIM4_IRQHandler ; TIM4
  113. DCD I2C1_EV_IRQHandler ; I2C1 Event
  114. DCD I2C1_ER_IRQHandler ; I2C1 Error
  115. DCD I2C2_EV_IRQHandler ; I2C2 Event
  116. DCD I2C2_ER_IRQHandler ; I2C2 Error
  117. DCD SPI1_IRQHandler ; SPI1
  118. DCD SPI2_IRQHandler ; SPI2
  119. DCD USART1_IRQHandler ; USART1
  120. DCD USART2_IRQHandler ; USART2
  121. DCD 0 ; Reserved
  122. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  123. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  124. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  125. DCD 0 ; Reserved
  126. DCD 0 ; Reserved
  127. DCD 0 ; Reserved
  128. DCD 0 ; Reserved
  129. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  130. DCD 0 ; Reserved
  131. DCD SDIO_IRQHandler ; SDIO
  132. DCD TIM5_IRQHandler ; TIM5
  133. DCD SPI3_IRQHandler ; SPI3
  134. DCD 0 ; Reserved
  135. DCD 0 ; Reserved
  136. DCD 0 ; Reserved
  137. DCD 0 ; Reserved
  138. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  139. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  140. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  141. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  142. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  143. DCD 0 ; Reserved
  144. DCD 0 ; Reserved
  145. DCD 0 ; Reserved
  146. DCD 0 ; Reserved
  147. DCD 0 ; Reserved
  148. DCD 0 ; Reserved
  149. DCD OTG_FS_IRQHandler ; USB OTG FS
  150. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  151. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  152. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  153. DCD USART6_IRQHandler ; USART6
  154. DCD I2C3_EV_IRQHandler ; I2C3 event
  155. DCD I2C3_ER_IRQHandler ; I2C3 error
  156. DCD 0 ; Reserved
  157. DCD 0 ; Reserved
  158. DCD 0 ; Reserved
  159. DCD 0 ; Reserved
  160. DCD 0 ; Reserved
  161. DCD 0 ; Reserved
  162. DCD 0 ; Reserved
  163. DCD FPU_IRQHandler ; FPU
  164. DCD 0 ; Reserved
  165. DCD 0 ; Reserved
  166. DCD SPI4_IRQHandler ; SPI4
  167. DCD SPI5_IRQHandler ; SPI5
  168. __Vectors_End
  169. __Vectors_Size EQU __Vectors_End - __Vectors
  170. AREA |.text|, CODE, READONLY
  171. ; Reset handler
  172. Reset_Handler PROC
  173. EXPORT Reset_Handler [WEAK]
  174. IMPORT SystemInit
  175. IMPORT __main
  176. LDR R0, =SystemInit
  177. BLX R0
  178. LDR R0, =__main
  179. BX R0
  180. ENDP
  181. ; Dummy Exception Handlers (infinite loops which can be modified)
  182. NMI_Handler PROC
  183. EXPORT NMI_Handler [WEAK]
  184. B .
  185. ENDP
  186. HardFault_Handler\
  187. PROC
  188. EXPORT HardFault_Handler [WEAK]
  189. B .
  190. ENDP
  191. MemManage_Handler\
  192. PROC
  193. EXPORT MemManage_Handler [WEAK]
  194. B .
  195. ENDP
  196. BusFault_Handler\
  197. PROC
  198. EXPORT BusFault_Handler [WEAK]
  199. B .
  200. ENDP
  201. UsageFault_Handler\
  202. PROC
  203. EXPORT UsageFault_Handler [WEAK]
  204. B .
  205. ENDP
  206. SVC_Handler PROC
  207. EXPORT SVC_Handler [WEAK]
  208. B .
  209. ENDP
  210. DebugMon_Handler\
  211. PROC
  212. EXPORT DebugMon_Handler [WEAK]
  213. B .
  214. ENDP
  215. PendSV_Handler PROC
  216. EXPORT PendSV_Handler [WEAK]
  217. B .
  218. ENDP
  219. SysTick_Handler PROC
  220. EXPORT SysTick_Handler [WEAK]
  221. B .
  222. ENDP
  223. Default_Handler PROC
  224. EXPORT WWDG_IRQHandler [WEAK]
  225. EXPORT PVD_IRQHandler [WEAK]
  226. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  227. EXPORT RTC_WKUP_IRQHandler [WEAK]
  228. EXPORT FLASH_IRQHandler [WEAK]
  229. EXPORT RCC_IRQHandler [WEAK]
  230. EXPORT EXTI0_IRQHandler [WEAK]
  231. EXPORT EXTI1_IRQHandler [WEAK]
  232. EXPORT EXTI2_IRQHandler [WEAK]
  233. EXPORT EXTI3_IRQHandler [WEAK]
  234. EXPORT EXTI4_IRQHandler [WEAK]
  235. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  236. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  237. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  238. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  239. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  240. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  241. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  242. EXPORT ADC_IRQHandler [WEAK]
  243. EXPORT EXTI9_5_IRQHandler [WEAK]
  244. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  245. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  246. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  247. EXPORT TIM1_CC_IRQHandler [WEAK]
  248. EXPORT TIM2_IRQHandler [WEAK]
  249. EXPORT TIM3_IRQHandler [WEAK]
  250. EXPORT TIM4_IRQHandler [WEAK]
  251. EXPORT I2C1_EV_IRQHandler [WEAK]
  252. EXPORT I2C1_ER_IRQHandler [WEAK]
  253. EXPORT I2C2_EV_IRQHandler [WEAK]
  254. EXPORT I2C2_ER_IRQHandler [WEAK]
  255. EXPORT SPI1_IRQHandler [WEAK]
  256. EXPORT SPI2_IRQHandler [WEAK]
  257. EXPORT USART1_IRQHandler [WEAK]
  258. EXPORT USART2_IRQHandler [WEAK]
  259. EXPORT EXTI15_10_IRQHandler [WEAK]
  260. EXPORT RTC_Alarm_IRQHandler [WEAK]
  261. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  262. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  263. EXPORT SDIO_IRQHandler [WEAK]
  264. EXPORT TIM5_IRQHandler [WEAK]
  265. EXPORT SPI3_IRQHandler [WEAK]
  266. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  267. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  268. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  269. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  270. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  271. EXPORT OTG_FS_IRQHandler [WEAK]
  272. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  273. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  274. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  275. EXPORT USART6_IRQHandler [WEAK]
  276. EXPORT I2C3_EV_IRQHandler [WEAK]
  277. EXPORT I2C3_ER_IRQHandler [WEAK]
  278. EXPORT FPU_IRQHandler [WEAK]
  279. EXPORT SPI4_IRQHandler [WEAK]
  280. EXPORT SPI5_IRQHandler [WEAK]
  281. WWDG_IRQHandler
  282. PVD_IRQHandler
  283. TAMP_STAMP_IRQHandler
  284. RTC_WKUP_IRQHandler
  285. FLASH_IRQHandler
  286. RCC_IRQHandler
  287. EXTI0_IRQHandler
  288. EXTI1_IRQHandler
  289. EXTI2_IRQHandler
  290. EXTI3_IRQHandler
  291. EXTI4_IRQHandler
  292. DMA1_Stream0_IRQHandler
  293. DMA1_Stream1_IRQHandler
  294. DMA1_Stream2_IRQHandler
  295. DMA1_Stream3_IRQHandler
  296. DMA1_Stream4_IRQHandler
  297. DMA1_Stream5_IRQHandler
  298. DMA1_Stream6_IRQHandler
  299. ADC_IRQHandler
  300. EXTI9_5_IRQHandler
  301. TIM1_BRK_TIM9_IRQHandler
  302. TIM1_UP_TIM10_IRQHandler
  303. TIM1_TRG_COM_TIM11_IRQHandler
  304. TIM1_CC_IRQHandler
  305. TIM2_IRQHandler
  306. TIM3_IRQHandler
  307. TIM4_IRQHandler
  308. I2C1_EV_IRQHandler
  309. I2C1_ER_IRQHandler
  310. I2C2_EV_IRQHandler
  311. I2C2_ER_IRQHandler
  312. SPI1_IRQHandler
  313. SPI2_IRQHandler
  314. USART1_IRQHandler
  315. USART2_IRQHandler
  316. EXTI15_10_IRQHandler
  317. RTC_Alarm_IRQHandler
  318. OTG_FS_WKUP_IRQHandler
  319. DMA1_Stream7_IRQHandler
  320. SDIO_IRQHandler
  321. TIM5_IRQHandler
  322. SPI3_IRQHandler
  323. DMA2_Stream0_IRQHandler
  324. DMA2_Stream1_IRQHandler
  325. DMA2_Stream2_IRQHandler
  326. DMA2_Stream3_IRQHandler
  327. DMA2_Stream4_IRQHandler
  328. OTG_FS_IRQHandler
  329. DMA2_Stream5_IRQHandler
  330. DMA2_Stream6_IRQHandler
  331. DMA2_Stream7_IRQHandler
  332. USART6_IRQHandler
  333. I2C3_EV_IRQHandler
  334. I2C3_ER_IRQHandler
  335. FPU_IRQHandler
  336. SPI4_IRQHandler
  337. SPI5_IRQHandler
  338. B .
  339. ENDP
  340. ALIGN
  341. ;*******************************************************************************
  342. ; User Stack and Heap initialization
  343. ;*******************************************************************************
  344. IF :DEF:__MICROLIB
  345. EXPORT __initial_sp
  346. EXPORT __heap_base
  347. EXPORT __heap_limit
  348. ELSE
  349. IMPORT __use_two_region_memory
  350. EXPORT __user_initial_stackheap
  351. __user_initial_stackheap
  352. LDR R0, = Heap_Mem
  353. LDR R1, =(Stack_Mem + Stack_Size)
  354. LDR R2, = (Heap_Mem + Heap_Size)
  355. LDR R3, = Stack_Mem
  356. BX LR
  357. ALIGN
  358. ENDIF
  359. END
  360. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****