CMSIS-CORE implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:

Hardware Abstraction Layer (HAL) for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.
System exception names to interface to system exceptions without having compatibility issues.
Methods to organize header files that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.
Methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function is essential for configuring the clock system of the device.
Intrinsic functions used to generate CPU instructions that are not supported by standard C functions.
A variable to determine the system clock frequency which simplifies the setup the SysTick timer.

This chapter provides details about the CMSIS-CORE and contains the following sections:

Using CMSIS in Embedded Applications describes the project setup and shows a simple program example.
Template Files describes the files of the CMSIS-CORE in detail and explains how to adapt template files provided by ARM to silicon vendor devices.
MISRA-C:2004 Compliance Exceptions describes the violations to the MISRA standard.
Reference describe the features and functions of the Device Header File <device.h> in detail.
Data Structures describe the data structures of the Device Header File <device.h> in detail.

CMSIS-CORE in ARM::CMSIS Pack

Files relevant to CMSIS-CORE are present in the following ARM::CMSIS directories:

File/Folder	Content
CMSIS\Documentation\Core	This documentation
CMSIS\Include	CMSIS-CORE header files (for example core_cm3.h, core_cmInstr.h, etc.)
Device	ARM reference implementations of Cortex-M devices
Device\_Template_Vendor	Template Files for extension by silicon vendors

Cortex-M Reference Manuals

The Cortex-M Reference Manuals are generic user guides for devices that implement the various ARM Cortex-M processors. These manuals contain the programmers model and detailed information about the core peripherals.

Todo:

Link to Cortex-M7 Devices Generic User Guide

Tested and Verified Toolchains

The CMSIS-CORE Template Files supplied by ARM have been tested and verified with the following toolchains:

ARM: MDK-ARM Version 5.12
GNU: GNU Tools ARM Embedded 4.8 2014.q3
IAR: IAR Embedded Workbench Kickstart Edition V6.10

Revision History of CMSIS-CORE

Version	Description
V4.00	Added: Cortex-M7 support. Added: intrinsic functions for __RRX, __LDRBT, __LDRHT, __LDRT, __STRBT, __STRHT, and __STRT
V3.40	Corrected: C++ include guard settings.
V3.30	Added: COSMIC tool chain support. Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4. Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4. Corrected: GCC/CLang warnings.
V3.20	Added: __BKPT instruction intrinsic. Added: __SMMLA instruction intrinsic for Cortex-M4. Corrected: ITM_SendChar. Corrected: __enable_irq, __disable_irq and inline assembly for GCC Compiler. Corrected: NVIC_GetPriority and VTOR_TBLOFF for Cortex-M0/M0+, SC000. Corrected: rework of in-line assembly functions to remove potential compiler warnings.
V3.01	Added support for Cortex-M0+ processor.
V3.00	Added support for GNU GCC ARM Embedded Compiler. Added function __ROR. Added Register Mapping for TPIU, DWT. Added support for SC000 and SC300 processors. Corrected ITM_SendChar function. Corrected the functions __STREXB, __STREXH, __STREXW for the GNU GCC compiler section. Documentation restructured.
V2.10	Updated documentation. Updated CMSIS core include files. Changed CMSIS/Device folder structure. Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library. Reworked CMSIS DSP library examples.
V2.00	Added support for Cortex-M4 processor.
V1.30	Reworked Startup Concept. Added additional Debug Functionality. Changed folder structure. Added doxygen comments. Added definitions for bit.
V1.01	Added support for Cortex-M0 processor.
V1.01	Added intrinsic functions for __LDREXB, __LDREXH, __LDREXW, __STREXB, __STREXH, __STREXW, and __CLREX
V1.00	Initial Release for Cortex-M3 processor.