// #ifndef __INTERFACE_H
// #define __INTERFACE_H

// #include <stm32f4xx.h>
// #include "stm32f4xx_rcu.h"
// #include "includes.h"

// typedef enum
// {
//     kI2C0 = 0,
//     kI2C1,
//     kI2C2,
//     kADC0,
//     kADC2,
//     kSPI2,
//     kUart0,
//     kUart5,
//     kCAN0,
//     kCAN1,
//     kEthernet,
//     kInput,
//     kOutput,
//     kPMU,
//     kDMA1,
//     //    kTIMER1,
//     kInterfaceEnd,
// } interface_type;

// typedef enum
// {
//     kRunLed,
//     kPRelayCtr,
//     kNRelayCtr,
//     kPreRelayCtr,
//     kFanCtr,
//     kOut1Ctr, // charger
//     kOut2Ctr, // charger heat
//     kExtWatchDog,
//     kExtRelayLed,
//     kExtFaultLed,
//     kISOPRelayCtr,
//     kISONRelayCtr,
//     kSoftI2C3_SDA,
//     kSoftI2C3_SCL,
//     kSoftI2C4_SDA,
//     kSoftI2C4_SCL,
//     kOutputEnd,
// } Output_Type;

// typedef enum
// {
//     kLDetect,
//     kInputEnd,
// } Input_type;

// typedef struct
// {
//     INT32U GPIOx;
//     INT32U GPIO_Pin;
//     INT8U GPIO_AF;
// } GPIO_AF_Info;

// typedef struct
// {
//     interface_type type;
//     Output_Type Out_Type;
//     Input_type In_Type;
//     INT32U GPIOx;
//     INT32U GPIO_Pin;
//     INT32U GPIO_Mode;
//     GPIO_AF_Info AF_Info;
//     INT8U GPIO_OType;
//     INT32U GPIO_Speed;
//     INT32U GPIO_PuPd;
// } Interface_struct;

// typedef struct
// {
//     interface_type type;
//     rcu_periph_enum AXBPeriph_Clock;
// } Gpio_Clock;

// // soft I2C
// #define SI2C3_SDA_PIN GPIO_PIN_3
// #define SI2C3_SDA_PORT GPIOD
// #define SI2C3_SCL_PIN GPIO_PIN_2
// #define SI2C3_SCL_PORT GPIOD
// #define SI2C4_SDA_PIN GPIO_PIN_15
// #define SI2C4_SDA_PORT GPIOE
// #define SI2C4_SCL_PIN GPIO_PIN_14
// #define SI2C4_SCL_PORT GPIOE

// #define SI2C3_SDA_HIGH gpio_bit_set(SI2C3_SDA_PORT, SI2C3_SDA_PIN)
// #define SI2C3_SDA_LOW gpio_bit_reset(SI2C3_SDA_PORT, SI2C3_SDA_PIN)
// #define SI2C3_SCL_HIGH gpio_bit_set(SI2C3_SCL_PORT, SI2C3_SCL_PIN)
// #define SI2C3_SCL_LOW gpio_bit_reset(SI2C3_SCL_PORT, SI2C3_SCL_PIN)
// #define SI2C4_SDA_HIGH gpio_bit_set(SI2C4_SDA_PORT, SI2C4_SDA_PIN)
// #define SI2C4_SDA_LOW gpio_bit_reset(SI2C4_SDA_PORT, SI2C4_SDA_PIN)
// #define SI2C4_SCL_HIGH gpio_bit_set(SI2C4_SCL_PORT, SI2C4_SCL_PIN)
// #define SI2C4_SCL_LOW gpio_bit_reset(SI2C4_SCL_PORT, SI2C4_SCL_PIN)

// #define SI2C3_SDA_OUT gpio_mode_set(SI2C3_SDA_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, SI2C3_SDA_PIN)
// #define SI2C3_SDA_IN gpio_mode_set(SI2C3_SDA_PORT, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, SI2C3_SDA_PIN)
// #define SI2C3_SDA_READ gpio_input_bit_get(SI2C3_SDA_PORT, SI2C3_SDA_PIN)
// #define SI2C4_SDA_OUT gpio_mode_set(SI2C4_SDA_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, SI2C4_SDA_PIN)
// #define SI2C4_SDA_IN gpio_mode_set(SI2C4_SDA_PORT, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, SI2C4_SDA_PIN)
// #define SI2C4_SDA_READ gpio_input_bit_get(SI2C4_SDA_PORT, SI2C4_SDA_PIN)

// // uart
// #define UART0_ENABLE_PORT GPIOE
// #define UART0_ENABLE_PIN GPIO_PIN_5
// #define UART5_ENABLE_PORT GPIOE
// #define UART5_ENABLE_PIN GPIO_PIN_6
// #define UART0_TX_ENABLE gpio_bit_set(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
// #define UART0_RX_ENABLE gpio_bit_reset(UART0_ENABLE_PORT, UART0_ENABLE_PIN)
// #define UART5_TX_ENABLE gpio_bit_set(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
// #define UART5_RX_ENABLE gpio_bit_reset(UART5_ENABLE_PORT, UART5_ENABLE_PIN)

// // SPI
// #define SPI2_CS_PORT GPIOA
// #define SPI2_CS_PIN GPIO_PIN_15
// #define SPI2_CS_HIGH gpio_bit_set(SPI2_CS_PORT, SPI2_CS_PIN)
// #define SPI2_CS_LOW gpio_bit_reset(SPI2_CS_PORT, SPI2_CS_PIN)

// // ethernet
// //#define		ENET_REF_CLK					GPIO_PIN_1
// //#define		ENET_REF_CLK_Port			GPIOA
// //#define		ENET_MDC							GPIO_PIN_1
// //#define		ENET_MDC_Port					GPIOC
// //#define		ENET_MDIO							GPIO_PIN_2
// //#define		ENET_MDIO_Port				GPIOA
// //#define		ENET_CRSDV						GPIO_PIN_7
// //#define		ENET_CRSDV_Port				GPIOA
// //#define		ENET_RXD0							GPIO_PIN_4
// //#define		ENET_RXD0_Port				GPIOC
// //#define		ENET_RXD1							GPIO_PIN_5
// //#define		ENET_RXD1_Port				GPIOC
// //#define		ENET_TXEN							GPIO_PIN_11
// //#define		ENET_TXEN_Port				GPIOG
// //#define		ENET_RXER							GPIO_PIN_12
// //#define		ENET_RXER_Port				GPIOG
// //#define		ENET_TXD0							GPIO_PIN_13
// //#define		ENET_TXD0_Port				GPIOG
// //#define		ENET_TXD1							GPIO_PIN_14
// //#define		ENET_TXD1_Port				GPIOG
// #define ETH_RESET_PORT GPIOE
// #define ETH_RESET_PIN GPIO_PIN_2
// #define ETH_RXER_PORT GPIOG
// #define ETH_RXER_PIN GPIO_PIN_12
// #define ETH_RESET_ON gpio_bit_reset(ETH_RESET_PORT, ETH_RESET_PIN)
// #define ETH_RESET_OFF gpio_bit_set(ETH_RESET_PORT, ETH_RESET_PIN)

// // output
// #define LED_RUN_PORT GPIOE
// #define LED_RUN_PIN GPIO_PIN_3
// #define PRelayCtr_PORT GPIOD
// #define PRelayCtr_PIN GPIO_PIN_6
// #define NRelayCtr_PORT GPIOD
// #define NRelayCtr_PIN GPIO_PIN_5
// #define PreRelayCtr_PORT GPIOG
// #define PreRelayCtr_PIN GPIO_PIN_9
// #define Fan_PORT GPIOG
// #define Fan_PIN GPIO_PIN_10
// #define OUT1CTR_PORT GPIOD
// #define OUT1CTR_PIN GPIO_PIN_7
// #define OUT2CTR_PORT GPIOE
// #define OUT2CTR_PIN GPIO_PIN_1
// #define EXTWATCHDOG_PORT GPIOC
// #define EXTWATCHDOG_PIN GPIO_PIN_3
// #define ExtRelayLed_PORT GPIOD
// #define ExtRelayLed_PIN GPIO_PIN_11
// #define ExtFaultLed_PORT GPIOD
// #define ExtFaultLed_PIN GPIO_PIN_10
// #define ISOPRelayCtr_PORT GPIOF
// #define ISOPRelayCtr_PIN GPIO_PIN_14
// #define ISONRelayCtr_PORT GPIOF
// #define ISONRelayCtr_PIN GPIO_PIN_15

// // input
// #define LDetect1_PORT GPIOD
// #define LDetect1_PIN GPIO_PIN_13

// // output operation
// #define LED_RUN_ON gpio_bit_set(LED_RUN_PORT, LED_RUN_PIN)
// #define LED_RUN_OFF gpio_bit_reset(LED_RUN_PORT, LED_RUN_PIN)
// #define LED_RUN_TOGGLE gpio_bit_write(LED_RUN_PORT, LED_RUN_PIN, (FlagStatus)(1 - (gpio_output_bit_get(LED_RUN_PORT, LED_RUN_PIN))))
// #define PRelayCtr_ON gpio_bit_set(PRelayCtr_PORT, PRelayCtr_PIN)
// #define PRelayCtr_OFF gpio_bit_reset(PRelayCtr_PORT, PRelayCtr_PIN)
// #define NRelayCtr_ON gpio_bit_set(NRelayCtr_PORT, NRelayCtr_PIN)
// #define NRelayCtr_OFF gpio_bit_reset(NRelayCtr_PORT, NRelayCtr_PIN)
// #define PreRelayCtr_ON gpio_bit_set(PreRelayCtr_PORT, PreRelayCtr_PIN)
// #define PreRelayCtr_OFF gpio_bit_reset(PreRelayCtr_PORT, PreRelayCtr_PIN)
// #define FAN_ON gpio_bit_set(Fan_PORT, Fan_PIN)
// #define FAN_OFF gpio_bit_reset(Fan_PORT, Fan_PIN)
// #define OUT1CTR_ON gpio_bit_set(OUT1CTR_PORT, OUT1CTR_PIN)
// #define OUT1CTR_OFF gpio_bit_reset(OUT1CTR_PORT, OUT1CTR_PIN)
// #define OUT2CTR_ON gpio_bit_set(OUT2CTR_PORT, OUT2CTR_PIN)
// #define OUT2CTR_OFF gpio_bit_reset(OUT2CTR_PORT, OUT2CTR_PIN)
// #define FEED_DOG_ON gpio_bit_set(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN)
// #define FEED_DOG_OFF gpio_bit_reset(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN)
// #define FEED_DOG_TOGGLE gpio_bit_write(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN, (FlagStatus)(1 - (gpio_output_bit_get(EXTWATCHDOG_PORT, EXTWATCHDOG_PIN))))
// #define ExtRelayLed_ON gpio_bit_set(ExtRelayLed_PORT, ExtRelayLed_PIN)
// #define ExtRelayLed_OFF gpio_bit_reset(ExtRelayLed_PORT, ExtRelayLed_PIN)
// #define ExtFaultLed_ON gpio_bit_set(ExtFaultLed_PORT, ExtFaultLed_PIN)
// #define ExtFaultLed_OFF gpio_bit_reset(ExtFaultLed_PORT, ExtFaultLed_PIN)
// #define ISOPRelay_ON gpio_bit_set(ISOPRelayCtr_PORT, ISOPRelayCtr_PIN)
// #define ISOPRelay_OFF gpio_bit_reset(ISOPRelayCtr_PORT, ISOPRelayCtr_PIN)
// #define ISONRelay_ON gpio_bit_set(ISONRelayCtr_PORT, ISONRelayCtr_PIN)
// #define ISONRelay_OFF gpio_bit_reset(ISONRelayCtr_PORT, ISONRelayCtr_PIN)

// // input result
// #define L_IN1_IS_LOW (gpio_input_bit_get(LDetect1_PORT, LDetect1_PIN) == RESET)

// void gpio_clock_init(void);
// void interface_init(void);
// #endif