|
|
@@ -1,29 +1,29 @@
|
|
|
/**
|
|
|
- ******************************************************************************
|
|
|
- * @file usb_bsp.c
|
|
|
- * @author MCD Application Team
|
|
|
- * @version V2.1.0
|
|
|
- * @date 19-March-2012
|
|
|
- * @brief This file implements the board support package for the USB host library
|
|
|
- ******************************************************************************
|
|
|
- * @attention
|
|
|
- *
|
|
|
- * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
|
|
- *
|
|
|
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
|
|
- * You may not use this file except in compliance with the License.
|
|
|
- * You may obtain a copy of the License at:
|
|
|
- *
|
|
|
- * http://www.st.com/software_license_agreement_liberty_v2
|
|
|
- *
|
|
|
- * Unless required by applicable law or agreed to in writing, software
|
|
|
- * distributed under the License is distributed on an "AS IS" BASIS,
|
|
|
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
|
- * See the License for the specific language governing permissions and
|
|
|
- * limitations under the License.
|
|
|
- *
|
|
|
- ******************************************************************************
|
|
|
- */
|
|
|
+******************************************************************************
|
|
|
+* @file usb_bsp.c
|
|
|
+* @author MCD Application Team
|
|
|
+* @version V2.1.0
|
|
|
+* @date 19-March-2012
|
|
|
+* @brief This file implements the board support package for the USB host library
|
|
|
+******************************************************************************
|
|
|
+* @attention
|
|
|
+*
|
|
|
+* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
|
|
+*
|
|
|
+* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
|
|
+* You may not use this file except in compliance with the License.
|
|
|
+* You may obtain a copy of the License at:
|
|
|
+*
|
|
|
+* http://www.st.com/software_license_agreement_liberty_v2
|
|
|
+*
|
|
|
+* Unless required by applicable law or agreed to in writing, software
|
|
|
+* distributed under the License is distributed on an "AS IS" BASIS,
|
|
|
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
|
+* See the License for the specific language governing permissions and
|
|
|
+* limitations under the License.
|
|
|
+*
|
|
|
+******************************************************************************
|
|
|
+*/
|
|
|
|
|
|
/* Includes ------------------------------------------------------------------*/
|
|
|
|
|
|
@@ -293,14 +293,13 @@ void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
|
|
|
{
|
|
|
NVIC_InitTypeDef NVIC_InitStructure;
|
|
|
|
|
|
- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
|
|
|
#ifdef USE_USB_OTG_HS
|
|
|
NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_IRQn;
|
|
|
#else
|
|
|
NVIC_InitStructure.NVIC_IRQChannel = OTG_FS_IRQn;
|
|
|
#endif
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
|
|
|
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
|
|
|
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
|
NVIC_Init(&NVIC_InitStructure);
|
|
|
}
|
|
|
@@ -315,30 +314,30 @@ void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
|
|
|
void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev, uint8_t state)
|
|
|
{
|
|
|
#if 0 /* 安富莱STM32-F4开发板不支持对外供电的控制 */
|
|
|
- /*
|
|
|
- On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
|
|
- or, if 5 V are available on the application board, a basic power switch, must
|
|
|
- be added externally to drive the 5 V VBUS line. The external charge pump can
|
|
|
- be driven by any GPIO output. When the application decides to power on VBUS
|
|
|
- using the chosen GPIO, it must also set the port power bit in the host port
|
|
|
- control and status register (PPWR bit in OTG_FS_HPRT).
|
|
|
-
|
|
|
- Bit 12 PPWR: Port power
|
|
|
- The application uses this field to control power to this port, and the core
|
|
|
- clears this bit on an overcurrent condition.
|
|
|
- */
|
|
|
-
|
|
|
-#ifndef USE_USB_OTG_HS
|
|
|
- if (0 == state)
|
|
|
- {
|
|
|
- /* DISABLE is needed on output of the Power Switch */
|
|
|
- GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- /*ENABLE the Power Switch by driving the Enable LOW */
|
|
|
- GPIO_ResetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
|
|
|
- }
|
|
|
+/*
|
|
|
+On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
|
|
+or, if 5 V are available on the application board, a basic power switch, must
|
|
|
+be added externally to drive the 5 V VBUS line. The external charge pump can
|
|
|
+be driven by any GPIO output. When the application decides to power on VBUS
|
|
|
+using the chosen GPIO, it must also set the port power bit in the host port
|
|
|
+control and status register (PPWR bit in OTG_FS_HPRT).
|
|
|
+
|
|
|
+Bit 12 PPWR: Port power
|
|
|
+The application uses this field to control power to this port, and the core
|
|
|
+clears this bit on an overcurrent condition.
|
|
|
+*/
|
|
|
+
|
|
|
+#ifndef USE_USB_OTG_HS
|
|
|
+if (0 == state)
|
|
|
+{
|
|
|
+ /* DISABLE is needed on output of the Power Switch */
|
|
|
+ GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
|
|
|
+}
|
|
|
+else
|
|
|
+{
|
|
|
+ /*ENABLE the Power Switch by driving the Enable LOW */
|
|
|
+ GPIO_ResetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
|
|
|
+}
|
|
|
#endif
|
|
|
#endif
|
|
|
}
|
|
|
@@ -353,36 +352,36 @@ void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev, uint8_t state)
|
|
|
void USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev)
|
|
|
{
|
|
|
#if 0 /* 安富莱STM32-F4 不支持VBUS */
|
|
|
-#ifndef USE_USB_OTG_HS
|
|
|
- GPIO_InitTypeDef GPIO_InitStructure;
|
|
|
+#ifndef USE_USB_OTG_HS
|
|
|
+GPIO_InitTypeDef GPIO_InitStructure;
|
|
|
|
|
|
#ifdef USE_STM3210C_EVAL
|
|
|
- RCC_APB2PeriphClockCmd(HOST_POWERSW_PORT_RCC, ENABLE);
|
|
|
-
|
|
|
-
|
|
|
- /* Configure Power Switch Vbus Pin */
|
|
|
- GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
|
|
|
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|
|
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
|
|
- GPIO_Init(HOST_POWERSW_PORT, &GPIO_InitStructure);
|
|
|
+RCC_APB2PeriphClockCmd(HOST_POWERSW_PORT_RCC, ENABLE);
|
|
|
+
|
|
|
+
|
|
|
+/* Configure Power Switch Vbus Pin */
|
|
|
+GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
|
|
|
+GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|
|
+GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
|
|
+GPIO_Init(HOST_POWERSW_PORT, &GPIO_InitStructure);
|
|
|
#else
|
|
|
-#ifdef USE_USB_OTG_FS
|
|
|
- RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOH , ENABLE);
|
|
|
-
|
|
|
- GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
|
|
|
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
|
|
|
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
|
|
- GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
|
|
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
|
|
|
- GPIO_Init(HOST_POWERSW_PORT,&GPIO_InitStructure);
|
|
|
+#ifdef USE_USB_OTG_FS
|
|
|
+RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOH , ENABLE);
|
|
|
+
|
|
|
+GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
|
|
|
+GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
|
|
|
+GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
|
|
+GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
|
|
+GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
|
|
|
+GPIO_Init(HOST_POWERSW_PORT,&GPIO_InitStructure);
|
|
|
#endif
|
|
|
#endif
|
|
|
|
|
|
- /* By Default, DISABLE is needed on output of the Power Switch */
|
|
|
- GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
|
|
|
-
|
|
|
- USB_OTG_BSP_mDelay(200); /* Delay is need for stabilising the Vbus Low
|
|
|
- in Reset Condition, when Vbus=1 and Reset-button is pressed by user */
|
|
|
+/* By Default, DISABLE is needed on output of the Power Switch */
|
|
|
+GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
|
|
|
+
|
|
|
+USB_OTG_BSP_mDelay(200); /* Delay is need for stabilising the Vbus Low
|
|
|
+in Reset Condition, when Vbus=1 and Reset-button is pressed by user */
|
|
|
#endif
|
|
|
#endif
|
|
|
}
|
|
|
@@ -398,16 +397,10 @@ static void USB_OTG_BSP_TimeInit(void)
|
|
|
#ifdef USE_ACCURATE_TIME
|
|
|
NVIC_InitTypeDef NVIC_InitStructure;
|
|
|
|
|
|
- /* Set the Vector Table base address at 0x08000000 */
|
|
|
- NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x00);
|
|
|
-
|
|
|
- /* Configure the Priority Group to 2 bits */
|
|
|
- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
|
|
-
|
|
|
/* Enable the TIM2 gloabal Interrupt */
|
|
|
NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
|
|
|
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
|
|
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
|
|
|
|
NVIC_Init(&NVIC_InitStructure);
|
