uart3和timer初始化

MiddleWare/lwip-2.0.2/port/STM32F4xx/UCOS_II/ethernetif.c

@@ -37,20 +37,19 @@
  *
  */
 
-#include "lwip/opt.h"
+#include "ethernetif.h"
 #include "lwip/def.h"
+#include "lwip/err.h"
 #include "lwip/mem.h"
+#include "lwip/opt.h"
 #include "lwip/pbuf.h"
 #include "lwip/timeouts.h"
-#include "netif/etharp.h"
-#include "lwip/err.h"
-#include "ethernetif.h"
-
 #include "main.h"
+#include "netif/etharp.h"
 #include "stm32f4x7_eth.h"
 #include <string.h>
 
-#define ENET_RX_TASK_PRIO (4)
+#define ENET_RX_TASK_PRIO     (4)
 #define ENET_RX_TASK_STK_SIZE (2048)
 CPU_STK enet_rx_task_stk[ENET_RX_TASK_STK_SIZE];
 
@@ -74,8 +73,8 @@ extern ETH_DMADESCTypeDef *DMARxDescToGet;
 /* Global pointer for last received frame infos */
 extern ETH_DMA_Rx_Frame_infos *DMA_RX_FRAME_infos;
 
-static struct netif *low_netif = NULL;
-OS_EVENT *g_enet_rx_sem = NULL;
+static struct netif *low_netif     = NULL;
+OS_EVENT            *g_enet_rx_sem = NULL;
 
 static void ethernetif_input(void *pvParameters);
 /**
@@ -88,66 +87,75 @@ static void ethernetif_input(void *pvParameters);
 static void low_level_init(struct netif *netif)
 {
 #ifdef CHECKSUM_BY_HARDWARE
-  int i;
-#endif
-  /* set MAC hardware address length */
-  netif->hwaddr_len = ETHARP_HWADDR_LEN;
-
-  /* set MAC hardware address */
-  netif->hwaddr[0] = MAC_ADDR0;
-  netif->hwaddr[1] = MAC_ADDR1;
-  netif->hwaddr[2] = MAC_ADDR2;
-  netif->hwaddr[3] = MAC_ADDR3;
-  netif->hwaddr[4] = MAC_ADDR4;
-  netif->hwaddr[5] = MAC_ADDR5;
-
-  /* initialize MAC address in ethernet MAC */
-  ETH_MACAddressConfig(ETH_MAC_Address0, netif->hwaddr);
-
-  /* maximum transfer unit */
-  netif->mtu = 1500;
-
-  /* device capabilities */
-  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
-  netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
-
-  /* Initialize Tx Descriptors list: Chain Mode */
-  ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
-  /* Initialize Rx Descriptors list: Chain Mode  */
-  ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
-
-  /* enable ethernet Rx interrrupt */
-  {
     int i;
-    for (i = 0; i < ETH_RXBUFNB; i++)
+#endif
+    /* set MAC hardware address length */
+    netif->hwaddr_len = ETHARP_HWADDR_LEN;
+
+    /* set MAC hardware address */
+    netif->hwaddr[0] = MAC_ADDR0;
+    netif->hwaddr[1] = MAC_ADDR1;
+    netif->hwaddr[2] = MAC_ADDR2;
+    netif->hwaddr[3] = MAC_ADDR3;
+    netif->hwaddr[4] = MAC_ADDR4;
+    netif->hwaddr[5] = MAC_ADDR5;
+
+    /* initialize MAC address in ethernet MAC */
+    ETH_MACAddressConfig(ETH_MAC_Address0, netif->hwaddr);
+
+    /* maximum transfer unit */
+    netif->mtu = 1500;
+
+    /* device capabilities */
+    /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
+    netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
+
+    low_netif = netif;
+
+    /* create binary semaphore used for informing ethernetif of frame reception */
+    if (NULL == g_enet_rx_sem)
     {
-      ETH_DMATxDescTransmitITConfig(&DMARxDscrTab[i], ENABLE);
+        g_enet_rx_sem = OSSemCreate(0);
     }
-  }
+
+    /* Initialize Tx Descriptors list: Chain Mode */
+    ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
+    /* Initialize Rx Descriptors list: Chain Mode  */
+    ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
+
+    // // /* enable ethernet Rx interrrupt */
+    // {
+    //     int i;
+    //     for (i = 0; i < ETH_RXBUFNB; i++)
+    //     {
+
+    //         ETH_DMARxDescTransmitITConfig(&DMARxDscrTab[i], ENABLE);
+    //     }
+    // }
 
 #ifdef CHECKSUM_BY_HARDWARE
-  /* Enable the TCP, UDP and ICMP checksum insertion for the Tx frames */
-  for (i = 0; i < ETH_TXBUFNB; i++)
-  {
-    ETH_DMATxDescChecksumInsertionConfig(&DMATxDscrTab[i], ETH_DMATxDesc_ChecksumTCPUDPICMPFull);
-  }
+    /* Enable the TCP, UDP and ICMP checksum insertion for the Tx frames */
+    for (i = 0; i < ETH_TXBUFNB; i++)
+    {
+        ETH_DMATxDescChecksumInsertionConfig(&DMATxDscrTab[i], ETH_DMATxDesc_ChecksumTCPUDPICMPFull);
+    }
 #endif
 
-  /* Note: TCP, UDP, ICMP checksum checking for received frame are enabled in DMA config */
-
-  /* create the task that handles the ENET RX */
-  // OSTaskCreateExt((void (*)(void *))ethernetif_input,
-  //                 (void *)0,
-  //                 (OS_STK *)&enet_rx_task_stk[ENET_RX_TASK_STK_SIZE - 1],
-  //                 (INT8U)ENET_RX_TASK_PRIO,
-  //                 (INT16U)ENET_RX_TASK_PRIO,
-  //                 (OS_STK *)&enet_rx_task_stk[0],
-  //                 (INT32U)ENET_RX_TASK_STK_SIZE,
-  //                 (void *)0,
-  //                 (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
-
-  /* Enable MAC and DMA transmission and reception */
-  ETH_Start();
+    /* Note: TCP, UDP, ICMP checksum checking for received frame are enabled in DMA config */
+
+    /* create the task that handles the ENET RX */
+    OSTaskCreateExt((void (*)(void *))ethernetif_input,
+                    (void *)0,
+                    (OS_STK *)&enet_rx_task_stk[ENET_RX_TASK_STK_SIZE - 1],
+                    (INT8U)ENET_RX_TASK_PRIO,
+                    (INT16U)ENET_RX_TASK_PRIO,
+                    (OS_STK *)&enet_rx_task_stk[0],
+                    (INT32U)ENET_RX_TASK_STK_SIZE,
+                    (void *)0,
+                    (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
+
+    /* Enable MAC and DMA transmission and reception */
+    ETH_Start();
 }
 
 /**
@@ -168,57 +176,57 @@ static void low_level_init(struct netif *netif)
 
 static err_t low_level_output(struct netif *netif, struct pbuf *p)
 {
-  static OS_EVENT *p_enet_tx_sem = NULL;
-  INT8U err;
-  struct pbuf *q;
-  uint8_t *buffer;
-  FrameTypeDef frame;
-  uint16_t framelength = 0;
-  ErrorStatus reval = ERROR;
-  SYS_ARCH_DECL_PROTECT(sr);
-
-  if (NULL == p_enet_tx_sem)
-  {
-    p_enet_tx_sem = OSSemCreate(1);
-  }
+    static OS_EVENT *p_enet_tx_sem = NULL;
+    INT8U            err;
+    struct pbuf     *q;
+    uint8_t         *buffer;
+    FrameTypeDef     frame;
+    uint16_t         framelength = 0;
+    ErrorStatus      reval       = ERROR;
+    SYS_ARCH_DECL_PROTECT(sr);
+
+    if (NULL == p_enet_tx_sem)
+    {
+        p_enet_tx_sem = OSSemCreate(1);
+    }
 
-  OSSemPend(p_enet_tx_sem, 0, &err);
+    OSSemPend(p_enet_tx_sem, 0, &err);
 
-  SYS_ARCH_PROTECT(sr);
+    SYS_ARCH_PROTECT(sr);
 
-  while ((uint32_t)RESET != (DMATxDescToSet->Status & ETH_DMATxDesc_OWN))
-  {
-  }
-  /* get received frame */
-  frame = ETH_Get_Received_Frame();
+    while ((uint32_t)RESET != (DMATxDescToSet->Status & ETH_DMATxDesc_OWN))
+    {
+    }
+    /* get received frame */
+    frame = ETH_Get_Received_Frame();
 
-  /* Obtain the size of the packet and put it into the "len" variable. */
-  buffer = (u8 *)frame.buffer;
+    /* Obtain the size of the packet and put it into the "len" variable. */
+    buffer = (u8 *)frame.buffer;
 
-  for (q = p; q != NULL; q = q->next)
-  {
-    memcpy((uint8_t *)&buffer[framelength], q->payload, q->len);
-    framelength = framelength + q->len;
-  }
+    for (q = p; q != NULL; q = q->next)
+    {
+        memcpy((uint8_t *)&buffer[framelength], q->payload, q->len);
+        framelength = framelength + q->len;
+    }
 
-  /* Prepare transmit descriptors to give to DMA*/
-  reval = ETH_Prepare_Transmit_Descriptors(framelength);
+    /* Prepare transmit descriptors to give to DMA*/
+    reval = ETH_Prepare_Transmit_Descriptors(framelength);
 
-  SYS_ARCH_UNPROTECT(sr);
+    SYS_ARCH_UNPROTECT(sr);
 
-  /* give semaphore and exit */
-  OSSemPost(p_enet_tx_sem);
+    /* give semaphore and exit */
+    OSSemPost(p_enet_tx_sem);
 
-  if (SUCCESS == reval)
-  {
-    return ERR_OK;
-  }
-  else
-  {
-    while (1)
+    if (SUCCESS == reval)
     {
+        return ERR_OK;
+    }
+    else
+    {
+        while (1)
+        {
+        }
     }
-  }
 }
 
 /**
@@ -231,37 +239,37 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
  */
 static struct pbuf *low_level_input(struct netif *netif)
 {
-  struct pbuf *p = NULL, *q;
-  uint32_t l = 0;
-  u16_t len;
-  FrameTypeDef frame;
-  uint8_t *buffer;
-
-  /* get received frame */
-  frame = ETH_Get_Received_Frame();
-
-  /* Obtain the size of the packet and put it into the "len" variable. */
-  len = frame.length;
-  buffer = (u8 *)frame.buffer;
-
-  if (len > 0)
-  {
-    /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
-    p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
-  }
-
-  if (p != NULL)
-  {
-    for (q = p; q != NULL; q = q->next)
+    struct pbuf *p = NULL, *q;
+    uint32_t     l = 0;
+    u16_t        len;
+    FrameTypeDef frame;
+    uint8_t     *buffer;
+
+    /* get received frame */
+    frame = ETH_Get_Received_Frame();
+
+    /* Obtain the size of the packet and put it into the "len" variable. */
+    len    = frame.length;
+    buffer = (u8 *)frame.buffer;
+
+    if (len > 0)
     {
-      memcpy((uint8_t *)q->payload, (u8_t *)&buffer[l], q->len);
-      l = l + q->len;
+        /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
+        p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
     }
-  }
 
-  ETH_Get_Received_Frame_interrupt();
+    if (p != NULL)
+    {
+        for (q = p; q != NULL; q = q->next)
+        {
+            memcpy((uint8_t *)q->payload, (u8_t *)&buffer[l], q->len);
+            l = l + q->len;
+        }
+    }
 
-  return p;
+    ETH_Get_Received_Frame_interrupt();
+
+    return p;
 }
 
 // static struct pbuf *low_level_input(struct netif *netif)
@@ -350,33 +358,33 @@ static struct pbuf *low_level_input(struct netif *netif)
  */
 void ethernetif_input(void *pvParameters)
 {
-  struct pbuf *p;
-  INT8U err;
-
-  SYS_ARCH_DECL_PROTECT(sr);
-
-  for (;;)
-  {
+    struct pbuf *p;
+    INT8U        err;
 
-    OSSemPend(g_enet_rx_sem, 0, &err);
+    SYS_ARCH_DECL_PROTECT(sr);
 
-  TRY_GET_NEXT_FRAME:
-    SYS_ARCH_PROTECT(sr);
-    p = low_level_input(low_netif);
-    SYS_ARCH_UNPROTECT(sr);
-
-    if (p != NULL)
+    for (;;)
     {
-      if (ERR_OK != low_netif->input(p, low_netif))
-      {
-        pbuf_free(p);
-      }
-      else
-      {
-        goto TRY_GET_NEXT_FRAME;
-      }
+
+        OSSemPend(g_enet_rx_sem, 0, &err);
+
+TRY_GET_NEXT_FRAME:
+        SYS_ARCH_PROTECT(sr);
+        p = low_level_input(low_netif);
+        SYS_ARCH_UNPROTECT(sr);
+
+        if (p != NULL)
+        {
+            if (ERR_OK != low_netif->input(p, low_netif))
+            {
+                pbuf_free(p);
+            }
+            else
+            {
+                goto TRY_GET_NEXT_FRAME;
+            }
+        }
     }
-  }
 }
 // err_t ethernetif_input(struct netif *netif)
 // {
@@ -415,21 +423,21 @@ void ethernetif_input(void *pvParameters)
  */
 err_t ethernetif_init(struct netif *netif)
 {
-  LWIP_ASSERT("netif != NULL", (netif != NULL));
+    LWIP_ASSERT("netif != NULL", (netif != NULL));
 
 #if LWIP_NETIF_HOSTNAME
-  /* Initialize interface hostname */
-  netif->hostname = "lwip";
+    /* Initialize interface hostname */
+    netif->hostname = "lwip";
 #endif /* LWIP_NETIF_HOSTNAME */
 
-  netif->name[0] = IFNAME0;
-  netif->name[1] = IFNAME1;
+    netif->name[0] = IFNAME0;
+    netif->name[1] = IFNAME1;
 
-  netif->output = etharp_output;
-  netif->linkoutput = low_level_output;
+    netif->output     = etharp_output;
+    netif->linkoutput = low_level_output;
 
-  /* initialize the hardware */
-  low_level_init(netif);
+    /* initialize the hardware */
+    low_level_init(netif);
 
-  return ERR_OK;
+    return ERR_OK;
 }

MiddleWare/lwip-2.0.2/port/STM32F4xx/UCOS_II/sys_arch.c

@@ -50,7 +50,7 @@ const void *const pvNullPointer = (mem_ptr_t *)0xffffffff;
 
 #if defined(__GNUC__) /*!< GCC compiler */
 __attribute__((aligned(4)))
-INT8U pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
+INT8U                              pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
 __attribute__((aligned(4))) OS_STK LwIP_Task_Stk[LWIP_TASK_MAX * LWIP_STK_SIZE];
 
 #elif defined(__CC_ARM) /*!< ARM compiler */
@@ -59,7 +59,7 @@ __align(4) OS_STK LwIP_Task_Stk[LWIP_TASK_MAX * LWIP_STK_SIZE];
 
 #elif defined(__ICCARM__) /*!< IAR compiler */
 #pragma data_alignment = 4
-INT8U pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
+INT8U  pcQueueMemoryPool[MAX_QUEUES * sizeof(TQ_DESCR)];
 #pragma data_alignment = 4
 OS_STK LwIP_Task_Stk[LWIP_TASK_MAX * LWIP_STK_SIZE];
 
@@ -71,7 +71,7 @@ INT8U LwIP_task_priopity_stask[LWIP_TASK_MAX];
 
 u32_t sys_now(void)
 {
-	return (OSTimeGet() * OS_MS_PER_TICK);
+    return (OSTimeGet() * OS_MS_PER_TICK);
 }
 
 /*----------------------------------------------------------------------------*/
@@ -81,37 +81,37 @@ u32_t sys_now(void)
 
 err_t sys_mbox_new(sys_mbox_t *mbox, int size)
 {
-	/* prarmeter "size" can be ignored in your implementation. */
-	u8_t ucErr;
-	PQ_DESCR pQDesc;
-	pQDesc = OSMemGet(pQueueMem, &ucErr);
-
-	LWIP_ASSERT("OSMemGet ", ucErr == OS_ERR_NONE);
-	if (ucErr == OS_ERR_NONE)
-	{
-		if (size > MAX_QUEUE_ENTRIES)
-		{
-			size = MAX_QUEUE_ENTRIES;
-		}
-		pQDesc->pQ = OSQCreate(&(pQDesc->pvQEntries[0]), size);
-		LWIP_ASSERT("OSQCreate ", pQDesc->pQ != NULL);
-
-		if (pQDesc->pQ != NULL)
-		{
-			*mbox = pQDesc;
-			return 0;
-		}
-		else
-		{
-			ucErr = OSMemPut(pQueueMem, pQDesc);
-			*mbox = NULL;
-			return ucErr;
-		}
-	}
-	else
-	{
-		return -1;
-	}
+    /* prarmeter "size" can be ignored in your implementation. */
+    u8_t     ucErr;
+    PQ_DESCR pQDesc;
+    pQDesc = OSMemGet(pQueueMem, &ucErr);
+
+    LWIP_ASSERT("OSMemGet ", ucErr == OS_ERR_NONE);
+    if (ucErr == OS_ERR_NONE)
+    {
+        if (size > MAX_QUEUE_ENTRIES)
+        {
+            size = MAX_QUEUE_ENTRIES;
+        }
+        pQDesc->pQ = OSQCreate(&(pQDesc->pvQEntries[0]), size);
+        LWIP_ASSERT("OSQCreate ", pQDesc->pQ != NULL);
+
+        if (pQDesc->pQ != NULL)
+        {
+            *mbox = pQDesc;
+            return 0;
+        }
+        else
+        {
+            ucErr = OSMemPut(pQueueMem, pQDesc);
+            *mbox = NULL;
+            return ucErr;
+        }
+    }
+    else
+    {
+        return -1;
+    }
 }
 
 /*-----------------------------------------------------------------------------------*/
@@ -122,49 +122,49 @@ err_t sys_mbox_new(sys_mbox_t *mbox, int size)
 */
 void sys_mbox_free(sys_mbox_t *mbox)
 {
-	u8_t ucErr;
-	sys_mbox_t m_box = *mbox;
-	LWIP_ASSERT("sys_mbox_free ", m_box != SYS_MBOX_NULL);
+    u8_t       ucErr;
+    sys_mbox_t m_box = *mbox;
+    LWIP_ASSERT("sys_mbox_free ", m_box != SYS_MBOX_NULL);
 
-	OSQFlush(m_box->pQ);
+    OSQFlush(m_box->pQ);
 
-	(void)OSQDel(m_box->pQ, OS_DEL_NO_PEND, &ucErr);
-	LWIP_ASSERT("OSQDel ", ucErr == OS_ERR_NONE);
+    (void)OSQDel(m_box->pQ, OS_DEL_NO_PEND, &ucErr);
+    LWIP_ASSERT("OSQDel ", ucErr == OS_ERR_NONE);
 
-	ucErr = OSMemPut(pQueueMem, m_box);
-	LWIP_ASSERT("OSMemPut ", ucErr == OS_ERR_NONE);
-	*mbox = NULL;
+    ucErr = OSMemPut(pQueueMem, m_box);
+    LWIP_ASSERT("OSMemPut ", ucErr == OS_ERR_NONE);
+    *mbox = NULL;
 }
 
 /*-----------------------------------------------------------------------------------*/
 //   Posts the "msg" to the mailbox.
 void sys_mbox_post(sys_mbox_t *mbox, void *msg)
 {
-	u8_t i = 0;
-	sys_mbox_t m_box = *mbox;
-	if (msg == NULL)
-		msg = (void *)&pvNullPointer;
-	/* try 10 times */
-	while ((i < 10) && ((OSQPost(m_box->pQ, msg)) != OS_ERR_NONE))
-	{
-		i++;
-		OSTimeDly(5);
-	}
-	LWIP_ASSERT("sys_mbox_post error!\n", i != 10);
+    u8_t       i     = 0;
+    sys_mbox_t m_box = *mbox;
+    if (msg == NULL)
+        msg = (void *)&pvNullPointer;
+    /* try 10 times */
+    while ((i < 10) && ((OSQPost(m_box->pQ, msg)) != OS_ERR_NONE))
+    {
+        i++;
+        OSTimeDly(5);
+    }
+    LWIP_ASSERT("sys_mbox_post error!\n", i != 10);
 }
 
 /* Try to post the "msg" to the mailbox. */
 err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
 {
-	sys_mbox_t m_box = *mbox;
-	if (msg == NULL)
-		msg = (void *)&pvNullPointer;
-
-	if ((OSQPost(m_box->pQ, msg)) != OS_ERR_NONE)
-	{
-		return ERR_MEM;
-	}
-	return ERR_OK;
+    sys_mbox_t m_box = *mbox;
+    if (msg == NULL)
+        msg = (void *)&pvNullPointer;
+
+    if ((OSQPost(m_box->pQ, msg)) != OS_ERR_NONE)
+    {
+        return ERR_MEM;
+    }
+    return ERR_OK;
 }
 
 /*-----------------------------------------------------------------------------------*/
@@ -185,53 +185,53 @@ err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
 */
 u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
 {
-	u8_t ucErr;
-	u32_t ucos_timeout, timeout_new;
-	void *temp;
-	sys_mbox_t m_box = *mbox;
-	/* convert to timetick */
-	if (timeout != 0)
-	{
-		ucos_timeout = (timeout * OS_TICKS_PER_SEC) / 1000;
-		if (ucos_timeout < 1)
-		{
-			ucos_timeout = 1;
-		}
-		else if (ucos_timeout > 65535) /* ucOS only support u16_t timeout */
-		{
-			ucos_timeout = 65535;
-		}
-	}
-	else
-		ucos_timeout = 0;
-
-	timeout = OSTimeGet();
-
-	temp = OSQPend(m_box->pQ, (u16_t)ucos_timeout, &ucErr);
-
-	if (msg != NULL)
-	{
-		if (temp == (void *)&pvNullPointer)
-			*msg = NULL;
-		else
-			*msg = temp;
-	}
-
-	if (ucErr == OS_ERR_TIMEOUT)
-		timeout = SYS_ARCH_TIMEOUT;
-	else
-	{
-		LWIP_ASSERT("OSQPend ", ucErr == OS_ERR_NONE);
-
-		timeout_new = OSTimeGet();
-		if (timeout_new > timeout)
-			timeout_new = timeout_new - timeout;
-		else
-			timeout_new = 0xffffffff - timeout + timeout_new;
-		/* convert to millisecond */
-		timeout = timeout_new * 1000 / OS_TICKS_PER_SEC + 1;
-	}
-	return timeout;
+    u8_t       ucErr;
+    u32_t      ucos_timeout, timeout_new;
+    void      *temp;
+    sys_mbox_t m_box = *mbox;
+    /* convert to timetick */
+    if (timeout != 0)
+    {
+        ucos_timeout = (timeout * OS_TICKS_PER_SEC) / 1000;
+        if (ucos_timeout < 1)
+        {
+            ucos_timeout = 1;
+        }
+        else if (ucos_timeout > 65535) /* ucOS only support u16_t timeout */
+        {
+            ucos_timeout = 65535;
+        }
+    }
+    else
+        ucos_timeout = 0;
+
+    timeout = OSTimeGet();
+
+    temp = OSQPend(m_box->pQ, (u16_t)ucos_timeout, &ucErr);
+
+    if (msg != NULL)
+    {
+        if (temp == (void *)&pvNullPointer)
+            *msg = NULL;
+        else
+            *msg = temp;
+    }
+
+    if (ucErr == OS_ERR_TIMEOUT)
+        timeout = SYS_ARCH_TIMEOUT;
+    else
+    {
+        LWIP_ASSERT("OSQPend ", ucErr == OS_ERR_NONE);
+
+        timeout_new = OSTimeGet();
+        if (timeout_new > timeout)
+            timeout_new = timeout_new - timeout;
+        else
+            timeout_new = 0xffffffff - timeout + timeout_new;
+        /* convert to millisecond */
+        timeout = timeout_new * 1000 / OS_TICKS_PER_SEC + 1;
+    }
+    return timeout;
 }
 /**
  * Check if an mbox is valid/allocated:
@@ -240,14 +240,14 @@ u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
  */
 int sys_mbox_valid(sys_mbox_t *mbox)
 {
-	sys_mbox_t m_box = *mbox;
-	u8_t ucErr;
-	int ret;
-	OS_Q_DATA q_data;
-	memset(&q_data, 0, sizeof(OS_Q_DATA));
-	ucErr = OSQQuery(m_box->pQ, &q_data);
-	ret = (ucErr < 2 && (q_data.OSNMsgs < q_data.OSQSize)) ? 1 : 0;
-	return ret;
+    sys_mbox_t m_box = *mbox;
+    u8_t       ucErr;
+    int        ret;
+    OS_Q_DATA  q_data;
+    memset(&q_data, 0, sizeof(OS_Q_DATA));
+    ucErr = OSQQuery(m_box->pQ, &q_data);
+    ret   = (ucErr < 2 && (q_data.OSNMsgs < q_data.OSQSize)) ? 1 : 0;
+    return ret;
 }
 /**
  * Set an mbox invalid so that sys_mbox_valid returns 0
@@ -260,17 +260,17 @@ void sys_mbox_set_invalid(sys_mbox_t *mbox) {}
 
 err_t sys_sem_new(sys_sem_t *sem, u8_t count)
 {
-	u8_t err;
+    u8_t err;
 
-	*sem = OSSemCreate((u16_t)count);
-	if (*sem == NULL)
-	{
-		return -1;
-	}
+    *sem = OSSemCreate((u16_t)count);
+    if (*sem == NULL)
+    {
+        return -1;
+    }
 
-	OSEventNameSet(*sem, "LWIP Sem", &err);
-	LWIP_ASSERT("OSSemCreate ", *sem != NULL);
-	return 0;
+    OSEventNameSet(*sem, "LWIP Sem", &err);
+    LWIP_ASSERT("OSSemCreate ", *sem != NULL);
+    return 0;
 }
 /*
   Blocks the thread while waiting for the semaphore to be
@@ -289,44 +289,44 @@ err_t sys_sem_new(sys_sem_t *sem, u8_t count)
 */
 u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
 {
-	u8_t ucErr;
-	u32_t ucos_timeout, timeout_new;
-
-	if (timeout != 0)
-	{
-		ucos_timeout =
-			(timeout * OS_TICKS_PER_SEC) / 1000; // convert to timetick
-		if (ucos_timeout < 1)
-		{
-			ucos_timeout = 1;
-		}
-		else if (ucos_timeout > 65536) /* uC/OS only support u16_t pend */
-		{
-			ucos_timeout = 65535;
-		}
-	}
-	else
-		ucos_timeout = 0;
-
-	timeout = OSTimeGet();
-
-	OSSemPend(*sem, (u16_t)ucos_timeout, (u8_t *)&ucErr);
-	/*  only when timeout! */
-	if (ucErr == OS_ERR_TIMEOUT)
-		timeout = SYS_ARCH_TIMEOUT;
-	else
-	{
-
-		/* for pbuf_free, may be called from an ISR */
-		timeout_new = OSTimeGet();
-		if (timeout_new >= timeout)
-			timeout_new = timeout_new - timeout;
-		else
-			timeout_new = 0xffffffff - timeout + timeout_new;
-		/* convert to milisecond */
-		timeout = (timeout_new * 1000 / OS_TICKS_PER_SEC + 1);
-	}
-	return timeout;
+    u8_t  ucErr;
+    u32_t ucos_timeout, timeout_new;
+
+    if (timeout != 0)
+    {
+        ucos_timeout =
+            (timeout * OS_TICKS_PER_SEC) / 1000; // convert to timetick
+        if (ucos_timeout < 1)
+        {
+            ucos_timeout = 1;
+        }
+        else if (ucos_timeout > 65536) /* uC/OS only support u16_t pend */
+        {
+            ucos_timeout = 65535;
+        }
+    }
+    else
+        ucos_timeout = 0;
+
+    timeout = OSTimeGet();
+
+    OSSemPend(*sem, (u16_t)ucos_timeout, (u8_t *)&ucErr);
+    /*  only when timeout! */
+    if (ucErr == OS_ERR_TIMEOUT)
+        timeout = SYS_ARCH_TIMEOUT;
+    else
+    {
+
+        /* for pbuf_free, may be called from an ISR */
+        timeout_new = OSTimeGet();
+        if (timeout_new >= timeout)
+            timeout_new = timeout_new - timeout;
+        else
+            timeout_new = 0xffffffff - timeout + timeout_new;
+        /* convert to milisecond */
+        timeout = (timeout_new * 1000 / OS_TICKS_PER_SEC + 1);
+    }
+    return timeout;
 }
 
 /*
@@ -340,15 +340,15 @@ void sys_sem_signal(sys_sem_t *sem) { OSSemPost(*sem); }
  */
 void sys_sem_free(sys_sem_t *sem)
 {
-	u8_t ucErr;
-	(void)OSSemDel(*sem, OS_DEL_ALWAYS, &ucErr);
-	LWIP_ASSERT("OSSemDel ", ucErr == OS_ERR_NONE);
-	*sem = NULL;
+    u8_t ucErr;
+    (void)OSSemDel(*sem, OS_DEL_ALWAYS, &ucErr);
+    LWIP_ASSERT("OSSemDel ", ucErr == OS_ERR_NONE);
+    *sem = NULL;
 }
 int sys_sem_valid(sys_sem_t *sem)
 {
-	OS_SEM_DATA sem_data;
-	return (OSSemQuery(*sem, &sem_data) == OS_ERR_NONE) ? 1 : 0;
+    OS_SEM_DATA sem_data;
+    return (OSSemQuery(*sem, &sem_data) == OS_ERR_NONE) ? 1 : 0;
 }
 
 /** Set a semaphore invalid so that sys_sem_valid returns 0 */
@@ -359,17 +359,17 @@ void sys_sem_set_invalid(sys_sem_t *sem) {}
  */
 void sys_init(void)
 {
-	u8_t ucErr;
-	memset(LwIP_task_priopity_stask, 0, sizeof(LwIP_task_priopity_stask));
-	/* init mem used by sys_mbox_t, use ucosII functions */
-	pQueueMem = OSMemCreate((void *)pcQueueMemoryPool, MAX_QUEUES,
-							sizeof(TQ_DESCR), &ucErr);
-	OSMemNameSet(pQueueMem, "LWIP mem", &ucErr);
-	LWIP_ASSERT("sys_init: failed OSMemCreate Q", ucErr == OS_ERR_NONE);
-	pStackMem = OSMemCreate((void *)LwIP_Task_Stk, LWIP_TASK_MAX,
-							LWIP_STK_SIZE * sizeof(OS_STK), &ucErr);
-	OSMemNameSet(pQueueMem, "LWIP TASK STK", &ucErr);
-	LWIP_ASSERT("sys_init: failed OSMemCreate STK", ucErr == OS_ERR_NONE);
+    u8_t ucErr;
+    memset(LwIP_task_priopity_stask, 0, sizeof(LwIP_task_priopity_stask));
+    /* init mem used by sys_mbox_t, use ucosII functions */
+    pQueueMem = OSMemCreate((void *)pcQueueMemoryPool, MAX_QUEUES,
+                            sizeof(TQ_DESCR), &ucErr);
+    OSMemNameSet(pQueueMem, "LWIP mem", &ucErr);
+    LWIP_ASSERT("sys_init: failed OSMemCreate Q", ucErr == OS_ERR_NONE);
+    pStackMem = OSMemCreate((void *)LwIP_Task_Stk, LWIP_TASK_MAX,
+                            LWIP_STK_SIZE * sizeof(OS_STK), &ucErr);
+    OSMemNameSet(pQueueMem, "LWIP TASK STK", &ucErr);
+    LWIP_ASSERT("sys_init: failed OSMemCreate STK", ucErr == OS_ERR_NONE);
 }
 
 /*-----------------------------------------------------------------------------------*/
@@ -383,102 +383,102 @@ void sys_init(void)
   the priority are system dependent.
 */
 sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg,
-							int stacksize, int prio)
+                            int stacksize, int prio)
 {
-	u8_t ubPrio = LWIP_TASK_START_PRIO;
-	u8_t ucErr;
-	int i;
-	OS_STK *task_stk;
-	INT16U task_id;
-
-	arg = arg;
-
-	if (prio)
-	{
-		ubPrio += (prio - 1);
-		for (i = 0; i < LWIP_TASK_MAX; ++i)
-		{
-			if (LwIP_task_priopity_stask[i] == ubPrio)
-				break;
-		}
-
-		if (i == LWIP_TASK_MAX)
-		{
-			for (i = 0; i < LWIP_TASK_MAX; ++i)
-			{
-				if (LwIP_task_priopity_stask[i] == 0)
-				{
-					LwIP_task_priopity_stask[i] = ubPrio;
-					break;
-				}
-			}
-			if (i == LWIP_TASK_MAX)
-			{
-				LWIP_ASSERT("sys_thread_new: there is no space for priority",
-							0);
-				return (-1);
-			}
-		}
-		else
-		{
-			prio = 0;
-		}
-	}
-	else
-	{
-		LWIP_ASSERT("priority is invalid \r\n", 0);
-		return (-1);
-	}
-	/* Search for a suitable priority */
-	if (!prio)
-	{
-		ubPrio = LWIP_TASK_START_PRIO;
-		while (ubPrio < (LWIP_TASK_START_PRIO + LWIP_TASK_MAX))
-		{
-			for (i = 0; i < LWIP_TASK_MAX; ++i)
-				if (LwIP_task_priopity_stask[i] == ubPrio)
-				{
-					++ubPrio;
-					break;
-				}
-			if (i == LWIP_TASK_MAX)
-				break;
-		}
-		if (ubPrio < (LWIP_TASK_START_PRIO + LWIP_TASK_MAX))
-			for (i = 0; i < LWIP_TASK_MAX; ++i)
-				if (LwIP_task_priopity_stask[i] == 0)
-				{
-					LwIP_task_priopity_stask[i] = ubPrio;
-					break;
-				}
-		if (ubPrio >= (LWIP_TASK_START_PRIO + LWIP_TASK_MAX) ||
-			i == LWIP_TASK_MAX)
-		{
-			LWIP_ASSERT("sys_thread_new: there is no free priority", 0);
-			return (-1);
-		}
-	}
-	if (stacksize > LWIP_STK_SIZE || !stacksize)
-		stacksize = LWIP_STK_SIZE;
-	/* get Stack from pool */
-	task_stk = OSMemGet(pStackMem, &ucErr);
-	if (ucErr != OS_ERR_NONE)
-	{
-		LWIP_ASSERT("sys_thread_new: impossible to get a stack", 0);
-		return (-1);
-	}
-	task_id = ubPrio - LWIP_TASK_START_PRIO + 4; // LWIP_TSK_ID;
+    u8_t    ubPrio = LWIP_TASK_START_PRIO;
+    u8_t    ucErr;
+    int     i;
+    OS_STK *task_stk;
+    INT16U  task_id;
+
+    arg = arg;
+
+    if (prio)
+    {
+        ubPrio += (prio - 1);
+        for (i = 0; i < LWIP_TASK_MAX; ++i)
+        {
+            if (LwIP_task_priopity_stask[i] == ubPrio)
+                break;
+        }
+
+        if (i == LWIP_TASK_MAX)
+        {
+            for (i = 0; i < LWIP_TASK_MAX; ++i)
+            {
+                if (LwIP_task_priopity_stask[i] == 0)
+                {
+                    LwIP_task_priopity_stask[i] = ubPrio;
+                    break;
+                }
+            }
+            if (i == LWIP_TASK_MAX)
+            {
+                LWIP_ASSERT("sys_thread_new: there is no space for priority",
+                            0);
+                return (-1);
+            }
+        }
+        else
+        {
+            prio = 0;
+        }
+    }
+    else
+    {
+        LWIP_ASSERT("priority is invalid \r\n", 0);
+        return (-1);
+    }
+    /* Search for a suitable priority */
+    if (!prio)
+    {
+        ubPrio = LWIP_TASK_START_PRIO;
+        while (ubPrio < (LWIP_TASK_START_PRIO + LWIP_TASK_MAX))
+        {
+            for (i = 0; i < LWIP_TASK_MAX; ++i)
+                if (LwIP_task_priopity_stask[i] == ubPrio)
+                {
+                    ++ubPrio;
+                    break;
+                }
+            if (i == LWIP_TASK_MAX)
+                break;
+        }
+        if (ubPrio < (LWIP_TASK_START_PRIO + LWIP_TASK_MAX))
+            for (i = 0; i < LWIP_TASK_MAX; ++i)
+                if (LwIP_task_priopity_stask[i] == 0)
+                {
+                    LwIP_task_priopity_stask[i] = ubPrio;
+                    break;
+                }
+        if (ubPrio >= (LWIP_TASK_START_PRIO + LWIP_TASK_MAX) ||
+            i == LWIP_TASK_MAX)
+        {
+            LWIP_ASSERT("sys_thread_new: there is no free priority", 0);
+            return (-1);
+        }
+    }
+    if (stacksize > LWIP_STK_SIZE || !stacksize)
+        stacksize = LWIP_STK_SIZE;
+    /* get Stack from pool */
+    task_stk = OSMemGet(pStackMem, &ucErr);
+    if (ucErr != OS_ERR_NONE)
+    {
+        LWIP_ASSERT("sys_thread_new: impossible to get a stack", 0);
+        return (-1);
+    }
+    task_id = ubPrio - LWIP_TASK_START_PRIO + 4; // LWIP_TSK_ID;
 #if (OS_TASK_STAT_EN == 0)
-	OSTaskCreate(thread, (void *)arg, &task_stk[stacksize - 1], ubPrio);
+    OSTaskCreate(thread, (void *)arg, &task_stk[stacksize - 1], ubPrio);
 #else
-	// OSTaskCreateExt(thread, (void *)arg, &task_stk[stacksize - 1], ubPrio,
-	// 				task_id, &task_stk[0], stacksize, (void *)0,
-	// 				OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR |
-	// 					OS_TASK_OPT_SAVE_FP);
+    OSTaskCreateExt(thread, (void *)arg, &task_stk[stacksize - 1], ubPrio,
+                    task_id, &task_stk[0], stacksize, (void *)0,
+                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR |
+                        OS_TASK_OPT_SAVE_FP);
 #endif
-	OSTaskNameSet(ubPrio, (u8_t *)name, &ucErr);
+    OSTaskNameSet(ubPrio, (u8_t *)name, &ucErr);
 
-	return ubPrio;
+    return ubPrio;
 }
 
 /*
@@ -496,11 +496,11 @@ sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg,
 */
 sys_prot_t sys_arch_protect(void)
 {
-	sys_prot_t cpu_sr;
+    sys_prot_t cpu_sr;
 
-	cpu_sr = CPU_SR_Save();
+    cpu_sr = CPU_SR_Save();
 
-	return cpu_sr;
+    return cpu_sr;
 }
 
 /*

User/Bsp/armfly_bsp.c

@@ -2,6 +2,8 @@
 
 void bsp_init(void)
 {
+    uart1_mbox = OSMboxCreate(NULL);
+    uart3_mbox = OSMboxCreate(NULL);
 
     InitQueue(&CanQueueCan1);
     InitQueue(&CanQueueCan2);
@@ -11,6 +13,7 @@ void bsp_init(void)
     interface_init();
 
     uart1_init();
+    uart3_init();
     enet_system_setup();
     lwip_stack_init();
     // can初始化

User/Bsp/armfly_bsp.h

@@ -7,6 +7,7 @@
 #include "interface.h"
 #include "netconf.h"
 #include "queue.h"
+#include "timer.h"
 #include "uart.h"
 
 #endif

User/Bsp/interface/interface.c

@@ -8,16 +8,16 @@ Gpio_Clock clock_info[] = {
     // {.type = kADC0, .AXBPeriph_Clock = RCU_ADC0},
     // {.type = kADC2, .AXBPeriph_Clock = RCU_ADC2},
     // {.type = kSPI2, .AXBPeriph_Clock = RCU_SPI2},
-    {.type = kUart1, .AXBPeriph_Clock = RCC_APB2Periph_USART1},
-    {.type = kUart3, .AXBPeriph_Clock = RCC_APB1Periph_USART3},
-    {.type = kCAN1, .AXBPeriph_Clock = RCC_APB1Periph_CAN1},
-    {.type = kCAN2, .AXBPeriph_Clock = RCC_APB1Periph_CAN2},
-    {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC},
-    {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Tx},
-    {.type = kEthernet, .AXBPeriph_Clock = RCC_AHB1Periph_ETH_MAC_Rx},
-    // //    {.type = kEthernet, .AXBPeriph_Clock = RCU_ENETPTP},
+    {.type = kUart1, .RCC_AXBPeriph = RCC_APB2Periph, .AF_Clock = RCC_APB2Periph_USART1},
+    {.type = kUart3, .RCC_AXBPeriph = RCC_APB1Periph, .AF_Clock = RCC_APB1Periph_USART3},
+    {.type = kCAN1, .RCC_AXBPeriph = RCC_APB1Periph, .AF_Clock = RCC_APB1Periph_CAN1},
+    {.type = kCAN2, .RCC_AXBPeriph = RCC_APB1Periph, .AF_Clock = RCC_APB1Periph_CAN2},
+    {.type = kEthernet, .RCC_AXBPeriph = RCC_AHB1Periph, .AF_Clock = RCC_AHB1Periph_ETH_MAC},
+    {.type = kEthernet, .RCC_AXBPeriph = RCC_AHB1Periph, .AF_Clock = RCC_AHB1Periph_ETH_MAC_Tx},
+    {.type = kEthernet, .RCC_AXBPeriph = RCC_AHB1Periph, .AF_Clock = RCC_AHB1Periph_ETH_MAC_Rx},
+    {.type = kEthernet, .RCC_AXBPeriph = RCC_AHB1Periph, .AF_Clock = RCC_AHB1Periph_ETH_MAC_PTP},
     // {.type = kPMU, .AXBPeriph_Clock = RCU_PMU},
-    {.type = kDMA1, .AXBPeriph_Clock = RCC_AHB1Periph_DMA1},
+    {.type = kDMA1, .RCC_AXBPeriph = RCC_AHB1Periph, .AF_Clock = RCC_AHB1Periph_DMA1},
     // //    {.type = kTIMER1,   .AXBPeriph_Clock = RCU_TIMER1},
 };
 
@@ -30,11 +30,13 @@ Interface_struct interface_info[] = {
     //         {.type = kI2C2, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_8, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
     //         {.type = kI2C2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_4}, .GPIO_OType = GPIO_OTYPE_OD, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
 
-    // can
-    {.type = kCAN1, .GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOI, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    {.type = kCAN1, .GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOH, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // can1
+    {.type = kCAN1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_PinSource = GPIO_PinSource11, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kCAN1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_PinSource = GPIO_PinSource12, .GPIO_AF = GPIO_AF_CAN1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+
+    // can2
+    {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_12, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_PinSource = GPIO_PinSource12, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kCAN2, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_PinSource = GPIO_PinSource13, .GPIO_AF = GPIO_AF_CAN2}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
 
     //         // spi
     //         {.type = kSPI2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
@@ -51,24 +53,30 @@ Interface_struct interface_info[] = {
     //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_0, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
     //         {.type = kADC2, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_MODE_ANALOG, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
 
-    // uart
-    {.type = kUart1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_AF = GPIO_AF_USART1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    {.type = kUart1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_AF = GPIO_AF_USART1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    {.type = kUart1, .GPIOx = UART1_ENABLE_PORT, .GPIO_Pin = UART1_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    // {.type = kUart3, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_AF = GPIO_AF_USART3}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    // {.type = kUart3, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_USART3}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
-    // {.type = kUart3, .GPIOx = UART5_ENABLE_PORT, .GPIO_Pin = UART5_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
+    // uart1
+    {.type = kUart1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_9, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_PinSource = GPIO_PinSource9, .GPIO_AF = GPIO_AF_USART1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kUart1, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_PinSource = GPIO_PinSource10, .GPIO_AF = GPIO_AF_USART1}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kUart1, .GPIOx = UART1_ENABLE_PORT, .GPIO_Pin = UART1_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+
+    // uart3
+    {.type = kUart3, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_10, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_PinSource = GPIO_PinSource10, .GPIO_AF = GPIO_AF_USART3}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kUart3, .GPIOx = GPIOB, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOB, .GPIO_PinSource = GPIO_PinSource11, .GPIO_AF = GPIO_AF_USART3}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    {.type = kUart3, .GPIOx = UART3_ENABLE_PORT, .GPIO_Pin = UART3_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
 
+    // //uart6
+    // {.type = kUart6, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_6, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_PinSource = GPIO_PinSource6, .GPIO_AF = GPIO_AF_USART6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    // {.type = kUart6, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_PinSource = GPIO_PinSource7, .GPIO_AF = GPIO_AF_USART6}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
+    // {.type = kUart6, .GPIOx = UART6_ENABLE_PORT, .GPIO_Pin = UART6_ENABLE_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_UP},
     // ethernet
-    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
-    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_PinSource = GPIO_PinSource1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_2, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_PinSource = GPIO_PinSource2, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOA, .GPIO_Pin = GPIO_Pin_7, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOA, .GPIO_PinSource = GPIO_PinSource7, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_1, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_PinSource = GPIO_PinSource1, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_4, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_PinSource = GPIO_PinSource4, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOC, .GPIO_Pin = GPIO_Pin_5, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOC, .GPIO_PinSource = GPIO_PinSource5, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_PinSource = GPIO_PinSource11, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_13, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_PinSource = GPIO_PinSource13, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
+    {.type = kEthernet, .GPIOx = GPIOG, .GPIO_Pin = GPIO_Pin_14, .GPIO_Mode = GPIO_Mode_AF, .AF_Info = {.GPIOx = GPIOG, .GPIO_PinSource = GPIO_PinSource14, .GPIO_AF = GPIO_AF_ETH}, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Speed_100MHz, .GPIO_PuPd = GPIO_PuPd_NOPULL},
     {.type = kEthernet, .GPIOx = ETH_RESET_PORT, .GPIO_Pin = ETH_RESET_PIN, .GPIO_Mode = GPIO_Mode_OUT, .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_UP},
     //         //    {.type = kEthernet, .GPIOx = ETH_RXER_PORT,  .GPIO_Pin = ETH_RXER_PIN,  .GPIO_Mode = GPIO_MODE_INPUT,  .GPIO_OType = GPIO_OType_PP, .GPIO_Speed = GPIO_Fast_Speed, .GPIO_PuPd = GPIO_PuPd_DOWN},
 
@@ -100,11 +108,10 @@ Interface_struct interface_info[] = {
 void interface_init(void)
 {
     INT8U index = 0;
-
+    /* 定义GPIO外设初始化结构体 */
+    GPIO_InitTypeDef GPIO_StructInit;
     for (index = 0; index < sizeof(interface_info) / sizeof(Interface_struct); index++)
     {
-        /* 定义GPIO外设初始化结构体 */
-        GPIO_InitTypeDef GPIO_StructInit;
         /* 配置GPIO初始化结构成员*/
         GPIO_StructInit.GPIO_Mode  = interface_info[index].GPIO_Mode;
         GPIO_StructInit.GPIO_OType = interface_info[index].GPIO_OType;
@@ -115,7 +122,7 @@ void interface_init(void)
 
         if (interface_info[index].GPIO_Mode == GPIO_Mode_AF)
         {
-            GPIO_PinAFConfig(interface_info[index].AF_Info.GPIOx, interface_info[index].AF_Info.GPIO_AF, interface_info[index].AF_Info.GPIO_Pin);
+            GPIO_PinAFConfig(interface_info[index].AF_Info.GPIOx, interface_info[index].AF_Info.GPIO_PinSource, interface_info[index].AF_Info.GPIO_AF);
         }
     }
 }
@@ -134,12 +141,23 @@ void gpio_clock_init(void)
     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOI, ENABLE);
     for (index = 0; index < sizeof(clock_info) / sizeof(Gpio_Clock); index++)
     {
-        if (clock_info[index].AXBPeriph_Clock == RCC_APB2Periph_USART1)
+        switch (clock_info[index].RCC_AXBPeriph)
         {
-            RCC_AHB2PeriphClockCmd(clock_info[index].AXBPeriph_Clock, ENABLE);
-            continue;
+        case RCC_APB1Periph:
+            RCC_APB1PeriphClockCmd(clock_info[index].AF_Clock, ENABLE);
+            break;
+        case RCC_APB2Periph:
+            RCC_APB2PeriphClockCmd(clock_info[index].AF_Clock, ENABLE);
+            break;
+        case RCC_AHB1Periph:
+            RCC_AHB1PeriphClockCmd(clock_info[index].AF_Clock, ENABLE);
+            break;
+        case RCC_AHB2Periph:
+            RCC_AHB2PeriphClockCmd(clock_info[index].AF_Clock, ENABLE);
+            break;
+        case RCC_AHB3Periph:
+            RCC_AHB3PeriphClockCmd(clock_info[index].AF_Clock, ENABLE);
+            break;
         }
-        RCC_AHB1PeriphClockCmd(clock_info[index].AXBPeriph_Clock, ENABLE);
     }
-    // adc_clock_config(ADC_ADCCK_PCLK2_DIV8);
 }

User/Bsp/interface/interface.h

@@ -26,10 +26,20 @@ typedef enum
     kInterfaceEnd,
 } interface_type;
 
+typedef enum
+{
+    RCC_APB1Periph,
+    RCC_APB2Periph,
+    RCC_AHB1Periph,
+    RCC_AHB2Periph,
+    RCC_AHB3Periph,
+} enum_clock_type;
+
 typedef struct
 {
-    interface_type type;
-    uint32_t       AXBPeriph_Clock;
+    interface_type  type;
+    enum_clock_type RCC_AXBPeriph;
+    uint32_t        AF_Clock;
 } Gpio_Clock;
 
 typedef enum
@@ -62,30 +72,24 @@ typedef enum
 typedef struct
 {
     GPIO_TypeDef *GPIOx;
-    INT32U        GPIO_Pin;
+    INT16U        GPIO_PinSource;
     INT8U         GPIO_AF;
 } GPIO_AF_Info;
 
 typedef struct
 {
-    interface_type type;
-    Output_Type    Out_Type;
-    Input_type     In_Type;
-    GPIO_TypeDef  *GPIOx;
-    INT32U         GPIO_Pin;
-    INT32U         GPIO_Mode;
-    GPIO_AF_Info   AF_Info;
-    INT8U          GPIO_OType;
-    INT32U         GPIO_Speed;
-    INT32U         GPIO_PuPd;
+    interface_type    type;
+    Output_Type       Out_Type;
+    Input_type        In_Type;
+    GPIO_TypeDef     *GPIOx;
+    INT32U            GPIO_Pin;
+    GPIOMode_TypeDef  GPIO_Mode;
+    GPIO_AF_Info      AF_Info;
+    GPIOOType_TypeDef GPIO_OType;
+    GPIOSpeed_TypeDef GPIO_Speed;
+    GPIOPuPd_TypeDef  GPIO_PuPd;
 } Interface_struct;
 
-// typedef struct
-// {
-//     interface_type type;
-//     rcu_periph_enum AXBPeriph_Clock;
-// } Gpio_Clock;
-
 // // soft I2C
 // #define SI2C3_SDA_PIN GPIO_PIN_3
 // #define SI2C3_SDA_PORT GPIOD
@@ -115,12 +119,12 @@ typedef struct
 // uart
 #define UART1_ENABLE_PORT GPIOA
 #define UART1_ENABLE_PIN  GPIO_Pin_15
-// #define UART5_ENABLE_PORT GPIOE
-// #define UART5_ENABLE_PIN GPIO_PIN_6
-#define UART1_TX_ENABLE GPIO_SetBits(UART1_ENABLE_PORT, UART1_ENABLE_PIN)
-#define UART1_RX_ENABLE GPIO_ResetBits(UART1_ENABLE_PORT, UART1_ENABLE_PIN)
-// #define UART5_TX_ENABLE GPIO_SetBits(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
-// #define UART5_RX_ENABLE GPIO_ResetBits(UART5_ENABLE_PORT, UART5_ENABLE_PIN)
+#define UART3_ENABLE_PORT GPIOB
+#define UART3_ENABLE_PIN  GPIO_Pin_2
+#define UART1_TX_ENABLE   GPIO_SetBits(UART1_ENABLE_PORT, UART1_ENABLE_PIN)
+#define UART1_RX_ENABLE   GPIO_ResetBits(UART1_ENABLE_PORT, UART1_ENABLE_PIN)
+#define UART3_TX_ENABLE   GPIO_SetBits(UART3_ENABLE_PORT, UART3_ENABLE_PIN)
+#define UART3_RX_ENABLE   GPIO_ResetBits(UART3_ENABLE_PORT, UART3_ENABLE_PIN)
 
 // // SPI
 // #define SPI2_CS_PORT GPIOA

User/Bsp/iwdg/iwdg.c

@@ -25,7 +25,7 @@ void iwdg_init(void)
 void iwdg_feed(INT32U dog)
 {
     INT8U  err     = 0;
-    INT32U all_dog = CURRENT_DOG | SOC_DOG | ADC_DOG | INCAN_RX_DOG | INCAN_TX_DOG | INCAN_INFO_DOG | CAN2_TX_DOG | CAN2_RX_DOG | FAULT_DIG_DOG | UART1_DOG | UART5_DOG | BALANCE_DOG | MISC_DOG | PROCESS_DOG;
+    INT32U all_dog = CURRENT_DOG | SOC_DOG | ADC_DOG | INCAN_RX_DOG | INCAN_TX_DOG | INCAN_INFO_DOG | CAN2_TX_DOG | CAN2_RX_DOG | FAULT_DIG_DOG | UART1_DOG | UART3_DOG | BALANCE_DOG | MISC_DOG | PROCESS_DOG;
     OSMutexPend(iwdg_mutex, 0, &err);
     g_dog |= dog;
     OSMutexPost(iwdg_mutex);

User/Bsp/iwdg/iwdg.h

@@ -13,7 +13,7 @@
 #define CAN2_RX_DOG    0x00000080
 #define FAULT_DIG_DOG  0x00000100
 #define UART1_DOG      0x00000200
-#define UART5_DOG      0x00000400
+#define UART3_DOG      0x00000400
 #define BALANCE_DOG    0x00000800
 #define MISC_DOG       0x00001000
 #define PROCESS_DOG    0x00002000

User/Bsp/timer/timer.c

@@ -0,0 +1,50 @@
+#include "timer.h"
+
+void timer_nvic_config(void)
+{
+    NVIC_InitTypeDef NVIC_InitStructure;
+    // Usart1 NVIC 配置
+    NVIC_InitStructure.NVIC_IRQChannel                   = TIM2_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
+}
+
+void timer_config(void)
+{
+    TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure;
+
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); ///使能TIM2时钟
+
+    /* TIMER1 configuration */
+    TIM_TimeBaseInitStructure.TIM_Period        = 16800;              // 239;
+    TIM_TimeBaseInitStructure.TIM_CounterMode   = TIM_CounterMode_Up; //向上计数模式
+    TIM_TimeBaseInitStructure.TIM_Prescaler     = 10000;              // 7999;
+    TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
+    TIM_TimeBaseInit(TIM2, &TIM_TimeBaseInitStructure); //初始化TIM2
+
+    TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE); //允许定时器2更新中断
+
+    TIM_Cmd(TIM2, ENABLE); //使能定时器3
+}
+
+void user_timer_init(void)
+{
+    timer_nvic_config();
+    timer_config();
+}
+
+void TIM2_IRQHandler(void)
+{
+    static INT16U cnt = 0;
+    if (cnt >= 100)
+    {
+        IWDG_ReloadCounter();
+        cnt = 0;
+    }
+    else
+    {
+        cnt++;
+    }
+}

User/Bsp/timer/timer.h

@@ -0,0 +1,9 @@
+#ifndef __TIMER_H
+#define __TIMER_H
+#include "includes.h"
+#include "stm32f4xx_iwdg.h"
+#include "stm32f4xx_tim.h"
+
+void user_timer_init(void);
+
+#endif

User/Bsp/uart/uart.c

@@ -1,47 +1,45 @@
 #include "uart.h"
+#include "stdio.h"
+#include "uart.h"
+#include <string.h>
 
 static INT8U uart1_tx_buf[UART1_TX_LEN]  = {0};
 static INT8U uart1_rx_buf[UART1_REC_LEN] = {0};
-// static INT8U uart5_tx_buf[UART3_TX_LEN]  = {0};
-// static INT8U uart5_rx_buf[UART3_REC_LEN] = {0};
+static INT8U uart3_tx_buf[UART3_TX_LEN]  = {0};
+static INT8U uart3_rx_buf[UART3_REC_LEN] = {0};
 
 UartFrame_TypeDef Uart1FrameStruct[MAX_MSG_NUM];
-// UartFrame_TypeDef Uart5FrameStruct[MAX_MSG_NUM];
+UartFrame_TypeDef Uart3FrameStruct[MAX_MSG_NUM];
 
 extern OS_EVENT *uart1_mbox;
-// extern OS_EVENT *uart5_mbox;
-
-/*!
-    \brief      configure DMA interrupt
-    \param[in]  none
-    \param[out] none
-    \retval     none
-*/
+extern OS_EVENT *uart3_mbox;
+
 void uart1_nvic_config(void)
 {
     NVIC_InitTypeDef NVIC_InitStructure;
     // Usart1 NVIC 配置
     NVIC_InitStructure.NVIC_IRQChannel                   = USART1_IRQn; //串口1中断通道
     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;           //抢占优先级
-    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;           //子优先级3
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;           //子优先级
     NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;      // IRQ通道使能
     NVIC_Init(&NVIC_InitStructure);                                     //根据指定的参数初始化VIC寄存器
 }
 
-/*!
-    \brief      configure DMA
-    \param[in]  none
-    \param[out] none
-    \retval     none
-*/
 void uart1_dma_init(void)
 {
     DMA_InitTypeDef DMA_InitStructure;
+    if ((u32)UART1_DMA_TXCH > (u32)DMA2) //得到当前stream是属于DMA2还是DMA1
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); // DMA2时钟使能
+    }
+    else
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); // DMA1时钟使能
+    }
 
-    /* deinitialize UART0_DMA channel7(USART0 tx) */
-    DMA_DeInit(DMA1_Stream7);
+    DMA_DeInit(UART1_DMA_TXCH);
     /* 配置 DMA Stream */
-    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(USART1->DR));   // DMA外设地址
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(USART1->DR));        // DMA外设地址
     DMA_InitStructure.DMA_BufferSize         = UART1_TX_LEN;                //数据传输量
     DMA_InitStructure.DMA_PeripheralInc      = DMA_PeripheralInc_Disable;   //外设非增量模式
     DMA_InitStructure.DMA_MemoryInc          = DMA_MemoryInc_Enable;        //存储器增量模式
@@ -53,15 +51,23 @@ void uart1_dma_init(void)
     DMA_InitStructure.DMA_FIFOThreshold      = DMA_FIFOThreshold_Full;
     DMA_InitStructure.DMA_MemoryBurst        = DMA_MemoryBurst_Single;     //存储器突发单次传输
     DMA_InitStructure.DMA_PeripheralBurst    = DMA_PeripheralBurst_Single; //外设突发单次传输
-    DMA_InitStructure.DMA_Channel            = DMA_Channel_4;              //通道选择
+    DMA_InitStructure.DMA_Channel            = UART1_DMA;                  //通道选择
     DMA_InitStructure.DMA_DIR                = DMA_DIR_MemoryToPeripheral; //存储器到外设模式
     DMA_InitStructure.DMA_Memory0BaseAddr    = (u32)uart1_tx_buf;          // DMA 存储器0地址
-    DMA_Init(DMA1_Stream7, &DMA_InitStructure);                            //初始化DMA Stream
+    DMA_Init(UART1_DMA_TXCH, &DMA_InitStructure);                          //初始化DMA Stream
 
-    /* deinitialize UART0_DMA channel2 (USART0 rx) */
-    DMA_DeInit(DMA1_Stream2);
+    if ((u32)UART1_DMA_RXCH > (u32)DMA2) //得到当前stream是属于DMA2还是DMA1
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); // DMA2时钟使能
+    }
+    else
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); // DMA1时钟使能
+    }
+
+    DMA_DeInit(UART1_DMA_RXCH);
     /* 配置 DMA Stream */
-    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(USART1->DR));   // DMA外设地址
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(USART1->DR));        // DMA外设地址
     DMA_InitStructure.DMA_BufferSize         = UART1_REC_LEN;               //数据传输量
     DMA_InitStructure.DMA_PeripheralInc      = DMA_PeripheralInc_Disable;   //外设非增量模式
     DMA_InitStructure.DMA_MemoryInc          = DMA_MemoryInc_Enable;        //存储器增量模式
@@ -74,20 +80,17 @@ void uart1_dma_init(void)
     DMA_InitStructure.DMA_MemoryBurst        = DMA_MemoryBurst_Single;     //存储器突发单次传输
     DMA_InitStructure.DMA_PeripheralBurst    = DMA_PeripheralBurst_Single; //外设突发单次传输
     /* 配置 RX DMA */
-    DMA_InitStructure.DMA_Channel         = DMA_Channel_4;              /* 配置接收通道 */
+    DMA_InitStructure.DMA_Channel         = UART1_DMA;                  /* 配置接收通道 */
     DMA_InitStructure.DMA_DIR             = DMA_DIR_PeripheralToMemory; /* 设置从外设到内存 */
     DMA_InitStructure.DMA_Memory0BaseAddr = (u32)uart1_rx_buf;          /* 设置内存地址 */
-    DMA_Init(DMA1_Stream2, &DMA_InitStructure);
-
-    /* 使能 DMA USART TX Stream */
-    USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE); // 使能串口DMA接收数据
+    DMA_Init(UART1_DMA_RXCH, &DMA_InitStructure);
 }
 
 void uart1_config(void)
 {
     USART_InitTypeDef USART_InitStructure;
     // USART1 初始化设置
-    USART_InitStructure.USART_BaudRate            = 9600U;                          //波特率设置
+    USART_InitStructure.USART_BaudRate            = 9600;                           //波特率设置
     USART_InitStructure.USART_WordLength          = USART_WordLength_8b;            //字长为8位数据格式
     USART_InitStructure.USART_StopBits            = USART_StopBits_1;               //一个停止位
     USART_InitStructure.USART_Parity              = USART_Parity_No;                //无奇偶校验位
@@ -98,14 +101,25 @@ void uart1_config(void)
     USART_Cmd(USART1, ENABLE); //使能串口1
 }
 
+void Uart1DMA_Enable(DMA_Stream_TypeDef *DMA_Streamx, u16 count)
+{
+    DMA_Cmd(DMA_Streamx, DISABLE); //关闭DMA传输
+    while (DMA_GetCmdStatus(DMA_Streamx) != DISABLE)
+    {
+    } //确保DMA可以被设置
+
+    DMA_SetCurrDataCounter(DMA_Streamx, count); //数据传输量
+    DMA_Cmd(DMA_Streamx, ENABLE);               //开启DMA传输
+}
+
 void uart1_init(void)
 {
     uart1_config();
     uart1_dma_init();
     uart1_nvic_config();
     //    /* USART DMA enable*/
-    USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);
-
+    USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE); // 使能串口DMA接收数据
+    Uart1DMA_Enable(UART1_DMA_RXCH, UART3_REC_LEN);
     /*configure DMA0 interrupt*/
     USART_ITConfig(USART1, USART_IT_IDLE, ENABLE); //开启空闲中断
     USART_ITConfig(USART1, USART_IT_TC, ENABLE);
@@ -113,26 +127,35 @@ void uart1_init(void)
     UART1_RX_ENABLE;
 }
 
-//开启一次DMA传输
-// DMA_Streamx:DMA数据流,DMA1_Stream0~7/DMA2_Stream0~7
-// count:数据传输量
-void Uart1DMA_Enable(DMA_Stream_TypeDef *DMA_Streamx, u16 count)
+/****************************************************
+ *  函 数 名：Uart1_Send_Data
+ *  函数功能：串口1发送数据
+ *  入口参数：buf 待发送数据  len 数据长度
+ *  说    明：
+ *****************************************************/
+void Uart1_Send_Data(const u8 *buf, u16 len)
 {
-    DMA_Cmd(DMA_Streamx, DISABLE); //关闭DMA传输
-    while (DMA_GetCmdStatus(DMA_Streamx) != DISABLE)
+    u8 i;
+
+    UART1_TX_ENABLE;          // 485 发送使能
+    for (i = 0; i < len; i++) //循环发送数据
     {
-    } //确保DMA可以被设置
+        while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET)
+            ;
+        USART_SendData(USART1, buf[i]);
+    }
+    while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET)
+        ;
 
-    DMA_SetCurrDataCounter(DMA_Streamx, count); //数据传输量
-    DMA_Cmd(DMA_Streamx, ENABLE);               //开启DMA传输
+    UART1_RX_ENABLE; // 接收使能
 }
 
 void Uart1_dma_Send_Data(const INT8U *buf, INT16U len)
 {
     //    INT16U cnt = 0;
-    if (RESET != USART_GetFlagStatus(UART1_DMA, USART_FLAG_TC))
+    if (RESET != DMA_GetFlagStatus(UART1_DMA_TXCH, DMA_FLAG_TCIF7))
     {
-        DMA_ClearFlag(DMA1_Stream2, DMA_FLAG_TCIF5);
+        DMA_ClearFlag(UART1_DMA_TXCH, DMA_FLAG_TCIF7);
     }
     UART1_TX_ENABLE;
     if (len > UART1_TX_LEN)
@@ -142,7 +165,7 @@ void Uart1_dma_Send_Data(const INT8U *buf, INT16U len)
     memcpy(uart1_tx_buf, buf, len);
 
     USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE); // 使能DMA串口发送数据
-    Uart1DMA_Enable(DMA1_Stream7, len);
+    Uart1DMA_Enable(UART1_DMA_TXCH, len);
 }
 
 void USART1_IRQHandler(void)
@@ -155,13 +178,10 @@ void USART1_IRQHandler(void)
         clear = USART1->SR;
         clear = USART1->DR; // 先读SR, 再读DR, 就是为了消除IDLE中断
 
-        DMA_Cmd(DMA1_Stream2, DISABLE);
-        DMA_ClearFlag(DMA1_Stream2, DMA_FLAG_TCIF5);
-        rec_cnt = UART1_REC_LEN - DMA_GetCurrDataCounter(DMA1_Stream2); // 获得接收帧帧长  特别注意: 帧长不是DMA_GetCurrDataCounter(DMA2_Stream5)
-        // dma_channel_disable(UART0_DMA, UART0_DMA_RXCH);
-        // dma_flag_clear(UART0_DMA, UART0_DMA_RXCH, DMA_FLAG_FTF);
-        // rec_cnt = dma_transfer_number_get(UART0_DMA, UART0_DMA_RXCH);
-        // rec_cnt = UART0_REC_LEN - rec_cnt;
+        DMA_Cmd(UART1_DMA_RXCH, DISABLE);
+        DMA_ClearFlag(UART1_DMA_RXCH, DMA_FLAG_TCIF5);
+        rec_cnt = UART1_REC_LEN - DMA_GetCurrDataCounter(UART1_DMA_RXCH); // 获得接收帧帧长  特别注意: 帧长不是DMA_GetCurrDataCounter(DMA2_Stream5)
+
         memcpy(Uart1FrameStruct[u0_index].buf, uart1_rx_buf, rec_cnt);
         Uart1FrameStruct[u0_index].len = rec_cnt;
         OSMboxPost(uart1_mbox, &Uart1FrameStruct[u0_index]);
@@ -173,185 +193,214 @@ void USART1_IRQHandler(void)
         {
             u0_index = 0;
         }
-        DMA_SetCurrDataCounter(DMA1_Stream7, UART1_REC_LEN);
-        DMA_Cmd(DMA1_Stream7, ENABLE);
-        // dma_channel_enable(UART0_DMA, UART0_DMA_RXCH);
+        DMA_SetCurrDataCounter(UART1_DMA_RXCH, UART1_REC_LEN);
+        DMA_Cmd(UART1_DMA_RXCH, ENABLE);
     }
     else if (RESET != USART_GetITStatus(USART1, USART_IT_TC))
     {
-        USART_ClearITPendingBit(USART1, USART_IT_TC); // 清除发送完成标标志位
-        UART1_RX_ENABLE;                              // 485接收使能
-        Uart1DMA_Enable(DMA1_Stream2, UART1_REC_LEN); // DMA接收使能
-        DMA_Cmd(DMA1_Stream7, DISABLE);               // 关闭发送DMA
-        DMA_SetCurrDataCounter(DMA1_Stream7, 0);      // 清除发送数据长度
-
-        // usart_interrupt_flag_clear(USART0, USART_INT_FLAG_TC);
-        // UART1_RX_ENABLE;
-        // dma_channel_enable(UART0_DMA, UART0_DMA_RXCH);
-        // usart_dma_transmit_config(USART0, USART_DENT_DISABLE);
-        // dma_channel_disable(UART0_DMA, UART0_DMA_TXCH);
+        USART_ClearITPendingBit(USART1, USART_IT_TC);   // 清除发送完成标标志位
+        UART1_RX_ENABLE;                                // 485接收使能
+        Uart1DMA_Enable(UART1_DMA_RXCH, UART1_REC_LEN); // DMA接收使能
+        DMA_Cmd(UART1_DMA_TXCH, DISABLE);               // 关闭发送DMA
+        DMA_SetCurrDataCounter(UART1_DMA_TXCH, 0);      // 清除发送数据长度
     }
 }
 
-// //uart5
-// /*!
-//     \brief      configure DMA interrupt
-//     \param[in]  none
-//     \param[out] none
-//     \retval     none
-// */
-// void uart5_nvic_config(void)
-// {
-//     nvic_irq_enable(USART5_IRQn, 0, 0);
-// }
-
-// /*!
-//     \brief      configure DMA
-//     \param[in]  none
-//     \param[out] none
-//     \retval     none
-// */
-// void uart5_dma_init(void)
-// {
-//     dma_single_data_parameter_struct dma_init_struct;
-
-//     /* deinitialize UART5_DMA channel6(USART5 tx) */
-//     dma_single_data_para_struct_init(&dma_init_struct);
-//     dma_deinit(UART5_DMA, UART5_DMA_TXCH);
-//     dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
-//     dma_init_struct.memory0_addr = (uint32_t)uart5_tx_buf;
-//     dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
-//     dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
-//     dma_init_struct.number = UART5_TX_LEN;//ARRAYNUM(uart0_tx_buf);
-//     dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART5);
-//     dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
-//     dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
-//     dma_single_data_mode_init(UART5_DMA, UART5_DMA_TXCH, &dma_init_struct);
-
-//     /* configure DMA mode */
-//     dma_circulation_disable(UART5_DMA, UART5_DMA_TXCH);
-//     dma_channel_subperipheral_select(UART5_DMA, UART5_DMA_TXCH, DMA_SUBPERI5);
-
-//     /* enable UART5_DMA channel7 */
-//     dma_channel_enable(UART5_DMA, UART5_DMA_TXCH);
-
-//     /* deinitialize UART5_DMA channel2 (USART5 rx) */
-//     dma_deinit(UART5_DMA, UART5_DMA_RXCH);
-//     dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
-//     dma_init_struct.memory0_addr = (uint32_t)uart5_rx_buf;
-//     dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
-//     dma_init_struct.number = UART5_REC_LEN;//10;
-//     dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART5);
-//     dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
-//     dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
-//     dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
-//     dma_single_data_mode_init(UART5_DMA, UART5_DMA_RXCH, &dma_init_struct);
-
-//     /* configure DMA mode */
-//     dma_circulation_disable(UART5_DMA, UART5_DMA_RXCH);
-//     dma_channel_subperipheral_select(UART5_DMA, UART5_DMA_RXCH, DMA_SUBPERI5);
-
-//     /* enable UART5_DMA channel2 */
-//     dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
-
-// }
-
-// void uart5_config(void)
-// {
-//     /* USART configure */
-//     usart_deinit(USART5);
-//     usart_baudrate_set(USART5,115200U);
-//     usart_parity_config(USART5, USART_PM_NONE);
-//     usart_word_length_set(USART5, USART_WL_8BIT);
-//     usart_stop_bit_set(USART5, USART_STB_1BIT);
-//     usart_receive_config(USART5, USART_RECEIVE_ENABLE);
-//     usart_transmit_config(USART5, USART_TRANSMIT_ENABLE);
-//     usart_enable(USART5);
-// }
-
-// void uart5_init(void)
-// {
-//     uart5_config();
-//     uart5_dma_init();
-//     uart5_nvic_config();
-//     /* USART DMA enable*/
-//     usart_dma_receive_config(USART5, USART_DENR_ENABLE);
-// //    usart_dma_transmit_config(USART5, USART_DENT_ENABLE);
-
-//     /*configure DMA5 interrupt*/
-//     usart_interrupt_enable(USART5, USART_INT_IDLE);
-//     usart_interrupt_enable(USART5, USART_INT_TC);
-
-//     UART5_RX_ENABLE;
-// }
-
-// void Uart5_Send_Data(const INT8U *buf, INT16U len)
-// {
-//     INT8U i;
-
-//     UART5_TX_ENABLE;  // 485 发送使能
-//     for(i=0; i<len; i++)		                                                      //循环发送数据
-//     {
-//         while(usart_flag_get(USART5, USART_FLAG_TC) == RESET);
-//         usart_data_transmit(USART5, buf[i]);
-//     }
-//     while(usart_flag_get(USART5, USART_FLAG_TC) == RESET);
-
-//     UART5_RX_ENABLE;  // 接收使能
-// }
-
-// void Uart5_dma_Send_Data(const INT8U *buf, INT16U len)
-// {
-//     if(dma_flag_get(UART5_DMA, UART5_DMA_TXCH, DMA_FLAG_FTF)){
-//         dma_flag_clear(UART5_DMA, UART5_DMA_TXCH, DMA_FLAG_FTF);
-//     }
-
-//     UART5_TX_ENABLE;  // 485 发送使能
-//     if(len > UART5_TX_LEN)
-//     {
-//         len = UART5_TX_LEN;
-//     }
-//     memcpy(uart5_tx_buf, buf, len);
-//     uart_dma_enable(UART5_DMA, UART5_DMA_TXCH, len);
-
-//     usart_dma_transmit_config(USART5, USART_DENT_ENABLE);
-// }
-
-// void USART5_IRQHandler(void)
-// {
-//     static INT8U u5_index = 0;
-//     volatile INT8U clear   = 0;
-//     INT8U rec_cnt = 0;
-//     if(RESET != usart_interrupt_flag_get(USART5, USART_INT_FLAG_IDLE))
-//     {
-//         clear = USART_STAT0(USART5);
-// //        clear = usart_data_receive(USART5);
-//         clear = USART_DATA(USART5);
-//         dma_channel_disable(UART5_DMA, UART5_DMA_RXCH);
-// //        dma_interrupt_flag_clear(UART5_DMA, UART5_DMA_RXCH, DMA_INT_FLAG_FTF);
-//         dma_flag_clear(UART5_DMA, UART5_DMA_RXCH, DMA_FLAG_FTF);
-//         rec_cnt = dma_transfer_number_get(UART5_DMA, UART5_DMA_RXCH);
-//         rec_cnt = UART5_REC_LEN - rec_cnt;
-//         memcpy(Uart5FrameStruct[u5_index].buf, uart5_rx_buf, rec_cnt);
-//         Uart5FrameStruct[u5_index].len = rec_cnt;
-//         OSMboxPost(uart5_mbox, &Uart5FrameStruct[u5_index]);
-//         if(u5_index < MAX_MSG_NUM - 1)
-//         {
-//             u5_index++;
-//         }
-//         else
-//         {
-//             u5_index = 0;
-//         }
-// //        dma_transfer_number_config(UART5_DMA, UART5_DMA_RXCH, 0);
-//         dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
-//     }
-//     else if(RESET != usart_interrupt_flag_get(USART5, USART_INT_FLAG_TC))
-//     {
-//         usart_interrupt_flag_clear(USART5, USART_INT_FLAG_TC);
-//         UART5_RX_ENABLE;
-//         dma_channel_enable(UART5_DMA, UART5_DMA_RXCH);
-//         usart_dma_transmit_config(USART5, USART_DENT_DISABLE);
-//         dma_channel_disable(UART5_DMA, UART5_DMA_TXCH);
-//     }
-// }
+void uart3_nvic_config(void)
+{
+    NVIC_InitTypeDef NVIC_InitStructure;
+    // Usart3 NVIC 配置
+    NVIC_InitStructure.NVIC_IRQChannel                   = USART3_IRQn; //串口3中断通道
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;           //抢占优先级
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;           //子优先级
+    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;      // IRQ通道使能
+    NVIC_Init(&NVIC_InitStructure);
+}
+
+void uart3_dma_init(void)
+{
+    DMA_InitTypeDef DMA_InitStructure;
+    if ((u32)UART3_DMA_TXCH > (u32)DMA2)
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); // DMA2时钟使能
+    }
+    else
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); // DMA1时钟使能
+    }
+    DMA_DeInit(UART3_DMA_TXCH);
+    while (DMA_GetCmdStatus(UART3_DMA_TXCH) != DISABLE)
+    {
+    } //等待DMA可配置
+    /* 配置 DMA Stream */
+    DMA_InitStructure.DMA_Channel            = UART3_DMA;                   //通道选择
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&USART3->DR;            // DMA外设地址
+    DMA_InitStructure.DMA_Memory0BaseAddr    = (u32)uart3_tx_buf;           // DMA 存储器0地址
+    DMA_InitStructure.DMA_DIR                = DMA_DIR_MemoryToPeripheral;  //存储器到外设模式
+    DMA_InitStructure.DMA_BufferSize         = UART3_TX_LEN;                //数据传输量
+    DMA_InitStructure.DMA_PeripheralInc      = DMA_PeripheralInc_Disable;   //外设非增量模式
+    DMA_InitStructure.DMA_MemoryInc          = DMA_MemoryInc_Enable;        //存储器增量模式
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //外设数据长度:8位
+    DMA_InitStructure.DMA_MemoryDataSize     = DMA_MemoryDataSize_Byte;     //存储器数据长度:8位
+    DMA_InitStructure.DMA_Mode               = DMA_Mode_Normal;             // 使用普通模式
+    DMA_InitStructure.DMA_Priority           = DMA_Priority_Medium;         //中等优先级6
+    DMA_InitStructure.DMA_FIFOMode           = DMA_FIFOMode_Disable;
+    DMA_InitStructure.DMA_FIFOThreshold      = DMA_FIFOThreshold_Full;
+    DMA_InitStructure.DMA_MemoryBurst        = DMA_MemoryBurst_Single;     //存储器突发单次传输
+    DMA_InitStructure.DMA_PeripheralBurst    = DMA_PeripheralBurst_Single; //外设突发单次传输
+    DMA_Init(UART3_DMA_TXCH, &DMA_InitStructure);                          //初始化DMA Stream
+
+    if ((u32)UART3_DMA_RXCH > (u32)DMA2) //得到当前stream是属于DMA2还是DMA1
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); // DMA2时钟使能
+    }
+    else
+    {
+        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); // DMA1时钟使能
+    }
+
+    DMA_DeInit(UART3_DMA_RXCH);
+    while (DMA_GetCmdStatus(UART3_DMA_RXCH) != DISABLE)
+    {
+    } //等待DMA可配置
+    /* 配置 DMA Stream */
+    DMA_InitStructure.DMA_Channel            = UART3_DMA;                   //通道选择
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&USART3->DR;            // DMA外设地址
+    DMA_InitStructure.DMA_Memory0BaseAddr    = (u32)uart3_rx_buf;           // DMA 存储器0地址
+    DMA_InitStructure.DMA_DIR                = DMA_DIR_PeripheralToMemory;  //外设到存储器模式
+    DMA_InitStructure.DMA_BufferSize         = UART3_REC_LEN;               //数据传输量
+    DMA_InitStructure.DMA_PeripheralInc      = DMA_PeripheralInc_Disable;   //外设非增量模式
+    DMA_InitStructure.DMA_MemoryInc          = DMA_MemoryInc_Enable;        //存储器增量模式
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //外设数据长度:8位
+    DMA_InitStructure.DMA_MemoryDataSize     = DMA_MemoryDataSize_Byte;     //存储器数据长度:8位
+    DMA_InitStructure.DMA_Mode               = DMA_Mode_Circular;           // 使用循环模式
+    DMA_InitStructure.DMA_Priority           = DMA_Priority_Medium;         //中等优先级
+    DMA_InitStructure.DMA_FIFOMode           = DMA_FIFOMode_Disable;
+    DMA_InitStructure.DMA_FIFOThreshold      = DMA_FIFOThreshold_Full;
+    DMA_InitStructure.DMA_MemoryBurst        = DMA_MemoryBurst_Single;     //存储器突发单次传输
+    DMA_InitStructure.DMA_PeripheralBurst    = DMA_PeripheralBurst_Single; //外设突发单次传输
+    DMA_Init(UART3_DMA_RXCH, &DMA_InitStructure);
+}
+
+void uart3_config(void)
+{
+    /* USART3 configure */
+    USART_InitTypeDef USART_InitStructure;
+    // USART3 初始化设置
+    USART_InitStructure.USART_BaudRate            = 9600;                           //波特率设置
+    USART_InitStructure.USART_WordLength          = USART_WordLength_8b;            //字长为8位数据格式
+    USART_InitStructure.USART_StopBits            = USART_StopBits_1;               //一个停止位
+    USART_InitStructure.USART_Parity              = USART_Parity_No;                //无奇偶校验位
+    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; //无硬件数据流控制
+    USART_InitStructure.USART_Mode                = USART_Mode_Rx | USART_Mode_Tx;  //收发模式
+    USART_Init(USART3, &USART_InitStructure);                                       //初始化串口1
+
+    USART_Cmd(USART3, ENABLE); //使能串口3
+}
+
+void Uart3DMA_Enable(DMA_Stream_TypeDef *DMA_Streamx, u16 count)
+{
+    DMA_Cmd(DMA_Streamx, DISABLE); //关闭DMA传输
+    while (DMA_GetCmdStatus(DMA_Streamx) != DISABLE)
+    {
+    } //确保DMA可以被设置
+
+    DMA_SetCurrDataCounter(DMA_Streamx, count); //数据传输量
+    DMA_Cmd(DMA_Streamx, ENABLE);               //开启DMA传输
+}
+
+void uart3_init(void)
+{
+    uart3_config();
+    uart3_dma_init();
+    uart3_nvic_config();
+    /* USART DMA enable*/
+    USART_DMACmd(USART3, USART_DMAReq_Rx, ENABLE); // 使能串口DMA接收数据
+    Uart3DMA_Enable(UART3_DMA_RXCH, UART3_REC_LEN);
+
+    /*configure DMA interrupt*/
+    USART_ITConfig(USART3, USART_IT_IDLE, ENABLE); //开启空闲中断
+    USART_ITConfig(USART3, USART_IT_TC, ENABLE);
+
+    UART3_RX_ENABLE;
+}
+
+/****************************************************
+ *  函 数 名：Uart3_Send_Data
+ *  函数功能：串口1发送数据
+ *  入口参数：buf 待发送数据  len 数据长度
+ *  说    明：
+ *****************************************************/
+void Uart3_Send_Data(const INT8U *buf, INT16U len)
+{
+    INT8U i;
+
+    UART3_TX_ENABLE;          // 485 发送使能
+    for (i = 0; i < len; i++) //循环发送数据
+    {
+        while (USART_GetFlagStatus(USART3, USART_FLAG_TC) == RESET)
+            ;
+        USART_SendData(USART3, buf[i]);
+    }
+    while (USART_GetFlagStatus(USART3, USART_FLAG_TC) == RESET)
+        ;
+
+    UART3_RX_ENABLE; // 接收使能
+}
+
+void Uart3_dma_Send_Data(const INT8U *buf, INT16U len)
+{
+    if (DMA_GetFlagStatus(UART3_DMA_TXCH, DMA_FLAG_TCIF3) != RESET)
+    {
+        DMA_ClearFlag(UART3_DMA_TXCH, DMA_FLAG_TCIF3);
+    }
+
+    UART3_TX_ENABLE; // 485 发送使能
+    if (len > UART3_TX_LEN)
+    {
+        len = UART3_TX_LEN;
+    }
+    memcpy(uart3_tx_buf, buf, len);
+    USART_DMACmd(USART3, USART_DMAReq_Tx, len);
+
+    Uart3DMA_Enable(UART3_DMA_TXCH, len);
+}
+
+void USART3_IRQHandler(void)
+{
+    static INT8U   u3_index = 0;
+    volatile INT8U clear    = 0;
+    INT8U          rec_cnt  = 0;
+    if (RESET != USART_GetITStatus(USART3, USART_IT_IDLE))
+    {
+        clear = USART3->SR;
+        clear = USART3->DR; // 先读SR, 再读DR, 就是为了消除IDLE中断
+        DMA_Cmd(UART3_DMA_RXCH, DISABLE);
+        DMA_ClearFlag(UART3_DMA_RXCH, DMA_FLAG_TCIF1);
+        rec_cnt = UART3_REC_LEN - DMA_GetCurrDataCounter(UART3_DMA_RXCH);
+
+        memcpy(Uart3FrameStruct[u3_index].buf, uart3_rx_buf, rec_cnt);
+        Uart3FrameStruct[u3_index].len = rec_cnt;
+
+        OSMboxPost(uart3_mbox, &Uart3FrameStruct[u3_index]);
+
+        if (u3_index < MAX_MSG_NUM - 1)
+        {
+            u3_index++;
+        }
+        else
+        {
+            u3_index = 0;
+        }
+        DMA_SetCurrDataCounter(UART3_DMA_RXCH, UART3_REC_LEN);
+        DMA_Cmd(UART3_DMA_RXCH, ENABLE);
+    }
+    else if (RESET != USART_GetITStatus(USART3, USART_IT_TC))
+    {
+        USART_ClearITPendingBit(USART3, USART_IT_TC);
+        UART3_RX_ENABLE;
+        Uart3DMA_Enable(UART3_DMA_RXCH, UART3_REC_LEN); // DMA接收使能
+        DMA_Cmd(UART3_DMA_TXCH, DISABLE);               // 关闭发送DMA
+        DMA_SetCurrDataCounter(UART3_DMA_TXCH, 0);      // 清除发送数据长度
+    }
+}

User/Bsp/uart/uart.h

@@ -1,23 +1,24 @@
 #ifndef __UART_H
 #define __UART_H
+
 #include "includes.h"
 #include "interface.h"
 #include "stm32f4xx_usart.h"
 #include "string.h"
+
 #define UART1_REC_LEN 128
 #define UART1_TX_LEN  128
 #define UART3_REC_LEN 128
 #define UART3_TX_LEN  128
+#define MAX_MSG_NUM   10
 
-#define UART1_DMA      DMA2
-#define UART1_DMA_RXCH DMA_CH5
-#define UART1_DMA_TXCH DMA_CH7
+#define UART1_DMA      DMA_Channel_4
+#define UART1_DMA_RXCH DMA2_Stream5
+#define UART1_DMA_TXCH DMA2_Stream7
 
-#define UART3_DMA      DMA2
-#define UART3_DMA_RXCH DMA_CH2
-#define UART3_DMA_TXCH DMA_CH6
-
-#define MAX_MSG_NUM 10
+#define UART3_DMA      DMA_Channel_4
+#define UART3_DMA_RXCH DMA1_Stream1
+#define UART3_DMA_TXCH DMA1_Stream3
 
 typedef struct
 {
@@ -26,7 +27,8 @@ typedef struct
 } UartFrame_TypeDef;
 
 void uart1_init(void);
-// void uart3_init(void);
+void uart3_init(void);
 void Uart1_dma_Send_Data(const INT8U *buf, INT16U len);
-// void Uart3_dma_Send_Data(const INT8U *buf, INT16U len);
+void Uart3_dma_Send_Data(const INT8U *buf, INT16U len);
+
 #endif

User/app/dm9161/dm9161.c

@@ -18,10 +18,9 @@
 
 static __IO uint32_t enet_init_status = 0;
 
-static void     dm9161_gpio_config(void);
-static void     dm9161_mac_dma_config(void);
-static void     nvic_configuration(void);
-static uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress);
+static void dm9161_gpio_config(void);
+static void dm9161_mac_dma_config(void);
+static void nvic_configuration(void);
 
 /*!
     \brief      setup ethernet system(GPIOs, clocks, MAC, DMA, systick)
@@ -39,21 +38,10 @@ void enet_system_setup(void)
     /* configure the ethernet MAC/DMA */
     dm9161_mac_dma_config();
 
-    // /* Read PHY status register: Get Ethernet link status */
-    // if (ETH_ReadPHYRegister(0x01, PHY_SR) & 1)
-    // {
-    //     enet_init_status |= 0x10;
-    // }
-
-    // /* Configure the PHY to generate an interrupt on change of link status */
-    // Eth_Link_PHYITConfig(0x01);
-
-    /* Configure the EXTI for Ethernet link status. */
-    // Eth_Link_EXTIConfig();
-
-    if (enet_init_status == 0)
+    /* Read PHY status register: Get Ethernet link status */
+    if (ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR) & 1)
     {
-        return;
+        // enet_init_status |= ETH_LINK_FLAG;
     }
 
     // ETH_MACITConfig(ETH_MAC_IT_PMT, ENABLE);
@@ -83,8 +71,6 @@ static void dm9161_mac_dma_config(void)
     {
         return;
     }
-    // while (ETH_GetSoftwareResetStatus() == SET)
-    //     ;
 
     // /* ETHERNET Configuration --------------------------------------------------*/
     // /* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
@@ -142,7 +128,8 @@ static void nvic_configuration(void)
     NVIC_InitTypeDef NVIC_InitStructure;
     NVIC_InitStructure.NVIC_IRQChannel                   = ETH_IRQn;
     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
-    NVIC_InitStructure.NVIC_IRQChannelCmd                = DISABLE;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;
     NVIC_Init(&NVIC_InitStructure);
 }
 
@@ -188,35 +175,6 @@ static void dm9161_gpio_config(void)
 #endif
 }
 
-uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress)
-{
-    uint16_t tmpreg = 0;
-
-    /* Read MICR register */
-    tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MICR);
-
-    /* Enable output interrupt events to signal via the INT pin */
-    tmpreg |= (uint16_t)(PHY_MICR_INT_EN | PHY_MICR_INT_OE);
-    if (!(ETH_WritePHYRegister(PHYAddress, PHY_MICR, tmpreg)))
-    {
-        /* Return ERROR in case of write timeout */
-        return ETH_ERROR;
-    }
-
-    /* Read MISR register */
-    tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MISR);
-
-    /* Enable Interrupt on change of link status */
-    tmpreg |= (uint16_t)PHY_MISR_LINK_INT_EN;
-    if (!(ETH_WritePHYRegister(PHYAddress, PHY_MISR, tmpreg)))
-    {
-        /* Return ERROR in case of write timeout */
-        return ETH_ERROR;
-    }
-    /* Return SUCCESS */
-    return ETH_SUCCESS;
-}
-
 static err_t bms_net_process(int fd, void *data, int len)
 {
     INT8U response[2] = {0xBB, 0xAA};
@@ -280,6 +238,6 @@ void dm9161_task(void)
 
         lwip_close(sockfd);
         sockfd = -1;
-        OSTimeDly(10);
+        // OSTimeDly(10);
     }
 }

User/app/dm9161/dm9161.h

@@ -7,6 +7,8 @@
 #include "netconf.h"
 
 #define TCP_PORT 8080
+/* Exported constants --------------------------------------------------------*/
+#define DP83848_PHY_ADDRESS ((uint16_t)0x01)
 
 void enet_system_setup(void);
 void dm9161_task(void);

User/app/fly_param.c

@@ -8,13 +8,13 @@ OS_EVENT *can1_sem     = NULL;
 OS_EVENT *can2_sem     = NULL;
 OS_EVENT *net_sem      = NULL;
 OS_EVENT *uart1_mbox   = NULL;
-OS_EVENT *uart5_mbox   = NULL;
+OS_EVENT *uart3_mbox   = NULL;
 
 SqQueue CanQueueCan1;
 SqQueue CanQueueCan2;
 
 CPU_STK uart1_task_stk[UART1_TASK_STK_SIZE];
-
+CPU_STK uart3_task_stk[UART3_TASK_STK_SIZE];
 CPU_STK init_task_stk[INIT_STK_SIZE];
 CPU_STK net_task_stk[NET_TASK_STK_SIZE];
 CPU_STK misc_task_stk[MISC_TASK_STK_SIZE];

User/app/fly_param.h

@@ -11,6 +11,7 @@
 
 #define LED_RX_PRIO     7
 #define UART1_TASK_PRIO 23
+#define UART3_TASK_PRIO 24
 #define MISC_PRIO       28
 #define NET_PRIO        30
 #define INIT_TASK_PRIO  35
@@ -21,17 +22,19 @@
 #define LED0_STK_SIZE       512
 #define LED1_STK_SIZE       512
 #define UART1_TASK_STK_SIZE 256
-#define UART5_TASK_STK_SIZE 256
+#define UART3_TASK_STK_SIZE 256
 
 extern OS_EVENT *can1_sem;
 extern OS_EVENT *can2_sem;
 extern OS_EVENT *uart1_mbox;
+extern OS_EVENT *uart3_mbox;
 
 extern SqQueue CanQueueCan1;
 extern SqQueue CanQueueCan2;
 
 extern CPU_STK init_task_stk[INIT_STK_SIZE];
 extern CPU_STK uart1_task_stk[UART1_TASK_STK_SIZE];
+extern CPU_STK uart3_task_stk[UART3_TASK_STK_SIZE];
 extern CPU_STK misc_task_stk[MISC_TASK_STK_SIZE];
 extern CPU_STK net_task_stk[NET_TASK_STK_SIZE];
 extern CPU_STK LED_TASK_STK[LED0_STK_SIZE];

User/app/fly_uart/fly_uart.c

@@ -209,10 +209,6 @@ void Modbus_Head_Copy(INT8U *des_data, INT8U *src_data)
     }
     src_data  = src_data + 3;
     *des_data = (*src_data) * 2;
-    //	for(i = 0; i < 1; i++)
-    //	{
-    //	  *des_data++ = *src_data++;   //count
-    //	}
 }
 /*----------------------------------------------
 ** @func  : samkoon_com_work
@@ -305,51 +301,84 @@ void samkoon_com_work(INT8U *rec_data, void (*tx_p)(const INT8U *buf, INT16U len
     }
 }
 
+// void fly_uart1_task(void)
+// {
+//     INT8U err = 0;
+//     //    INT8U test_buf[20] = {0};
+//     UartFrame_TypeDef *msg;
+//     INT16U             crc_check       = 0;
+//     INT16U             rcv_crc         = 0;
+//     txfun_p            Modbus_RTU_Send = Uart1_dma_Send_Data;
+//     while (1)
+//     {
+//         OSTimeDly(200);
+//         iwdg_feed(UART1_DOG);
+//         msg = (UartFrame_TypeDef *)OSMboxPend(uart1_mbox, 50, &err);
+//         if ((err == OS_ERR_NONE) && (msg->len >= 2))
+//         {
+//             crc_check = Count_CRC(msg->buf, 6);
+//             rcv_crc   = ((msg->buf[7] << 8) | msg->buf[6]);
+//             if (crc_check != rcv_crc)
+//             {
+//                 continue;
+//             }
+
+//             samkoon_com_work(&(msg->buf[0]), Modbus_RTU_Send);
+//         }
+//     }
+// }
+
 void fly_uart1_task(void)
 {
-    INT8U err = 0;
-    //    INT8U test_buf[20] = {0};
+    INT8U              err          = 0;
+    INT8U              test_buf[20] = {0};
     UartFrame_TypeDef *msg;
-    INT16U             crc_check       = 0;
-    INT16U             rcv_crc         = 0;
-    txfun_p            Modbus_RTU_Send = Uart1_dma_Send_Data;
     while (1)
     {
         OSTimeDly(200);
         iwdg_feed(UART1_DOG);
-        msg = (UartFrame_TypeDef *)OSMboxPend(uart1_mbox, 50, &err);
+        msg         = (UartFrame_TypeDef *)OSMboxPend(uart1_mbox, 50, &err);
+        test_buf[0] = 0x01;
+        test_buf[1] = 0xBB;
+        test_buf[2] = 0xAA;
+        Uart1_dma_Send_Data(test_buf, 3);
         if ((err == OS_ERR_NONE) && (msg->len >= 2))
         {
-            crc_check = Count_CRC(msg->buf, 6);
-            rcv_crc   = ((msg->buf[7] << 8) | msg->buf[6]);
-            if (crc_check != rcv_crc)
+            if ((msg->buf[0] == 0x00) && (msg->buf[1] == 0xAA) && (msg->buf[2] == 0xBB))
             {
-                continue;
+                test_buf[0] = 0x00;
+                test_buf[1] = 0xBB;
+                test_buf[2] = 0xAA;
+                Uart1_dma_Send_Data(test_buf, 3);
             }
-
-            samkoon_com_work(&(msg->buf[0]), Modbus_RTU_Send);
         }
     }
 }
 
-// void bms_uart0_task(void)
-//{
-//     INT8U err = 0;
-//     INT8U test_buf[20] = {0};
-//     UartFrame_TypeDef *msg;
-//     while(1)
-//     {
-//         wtdg_feed(UART0_DOG);
-//         msg = (UartFrame_TypeDef *)OSMboxPend(uart0_mbox, 50, &err);
-//         if((err == OS_ERR_NONE) && (msg->len >= 2))
-//         {
-//             if((msg->buf[0] == 0x00) && (msg->buf[1] == 0xAA) && (msg->buf[2] == 0xBB))
-//             {
-//                 test_buf[0] = 0x00;
-//                 test_buf[1] = 0xBB;
-//                 test_buf[2] = 0xAA;
-//                 Uart0_dma_Send_Data(test_buf, 3);
-//             }
-//         }
-//     }
-// }
+void fly_uart3_task(void)
+{
+    INT8U              err          = 0;
+    INT8U              test_buf[20] = {0};
+    UartFrame_TypeDef *msg;
+    while (1)
+    {
+        OSTimeDly(200);
+        iwdg_feed(UART3_DOG);
+        msg = (UartFrame_TypeDef *)OSMboxPend(uart3_mbox, 50, &err);
+        // test_buf[0] = 0x01;
+        // test_buf[1] = 0xBB;
+        // test_buf[2] = 0xAA;
+        // Uart3_dma_Send_Data(test_buf, 3);
+        if ((err == OS_ERR_NONE) && (msg->len >= 2))
+        {
+            if ((msg->buf[0] == 0x00) && (msg->buf[1] == 0xAA) && (msg->buf[2] == 0xBB))
+            {
+                test_buf[0] = 0x00;
+                test_buf[1] = 0xBB;
+                test_buf[2] = 0xAA;
+                // Uart3_Send_Data(test_buf, 3);
+                Uart3_dma_Send_Data(test_buf, 3);
+            }
+        }
+    }
+}

User/app/fly_uart/fly_uart.h

@@ -64,6 +64,6 @@ typedef void (*txfun_p)(const INT8U *buf, INT16U len);
 #define MODBUS_ADDR_RACK_REMOTE_END 0xE7
 
 void fly_uart1_task(void);
-// void bms_uart1_task(void);
+void fly_uart3_task(void);
 
 #endif

User/main.c

@@ -49,7 +49,6 @@ int main(void)
     };
 #elif 1
     NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
-
     OSInit();
     bsp_init();
 
@@ -84,16 +83,16 @@ void init_task(void *pvParameters)
     /* configure the systick handler priority */
     NVIC_SetPriority(SysTick_IRQn, 0x00U);
 
-    OSTaskCreateExt((void (*)(void *))led_task,                 /* 启动任务函数指针 */
-                    (void *)0,                                  /* 传递给任务的参数 */
-                    (OS_STK *)&LED_TASK_STK[LED0_STK_SIZE - 1], /* 指向任务栈栈顶的指针 */
-                    LED_RX_PRIO,                                /* 任务的优先级，必须唯一，数字越低优先级越高 */
-                    LED_RX_PRIO,                                /* 任务ID，一般和任务优先级相同 */
-                    (OS_STK *)&LED_TASK_STK[0],                 /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
-                    LED0_STK_SIZE,                              /* 任务栈大小 */
-                    (void *)0,                                  /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-                                                                （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
-                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); /* 任务选项字 */
+    OSTaskCreateExt((void (*)(void *))led_task,                                       /* 启动任务函数指针 */
+                    (void *)0,                                                        /* 传递给任务的参数 */
+                    (OS_STK *)&LED_TASK_STK[LED0_STK_SIZE - 1],                       /* 指向任务栈栈顶的指针 */
+                    LED_RX_PRIO,                                                      /* 任务的优先级，必须唯一，数字越低优先级越高 */
+                    LED_RX_PRIO,                                                      /* 任务ID，一般和任务优先级相同 */
+                    (OS_STK *)&LED_TASK_STK[0],                                       /* 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
+                    LED0_STK_SIZE,                                                    /* 任务栈大小 */
+                    (void *)0,                                                        /* 一块用户内存区的指针，用于任务控制块TCB的扩展功能
+                                                                                      （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可 */
+                    OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP); /* 任务选项字 */
 
     OSTaskCreateExt((void (*)(void *))misc_task,
                     (void *)0,
@@ -114,24 +113,16 @@ void init_task(void *pvParameters)
                     (INT32U)UART1_TASK_STK_SIZE,
                     (void *)0,
                     (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
-    // OSTaskCreateExt((void (*)(void *))led1_task,                 /*
-    // 启动任务函数指针 */
-    //                 (void *)0,                                   /*
-    //                 传递给任务的参数 */ (OS_STK
-    //                 *)&LED1_TASK_STK[LED1_STK_SIZE - 1], /*
-    //                 指向任务栈栈顶的指针 */ LED1_RX_PRIO, /*
-    //                 任务的优先级，必须唯一，数字越低优先级越高 */
-    //                 LED1_RX_PRIO,                                /*
-    //                 任务ID，一般和任务优先级相同 */ (OS_STK
-    //                 *)&LED1_TASK_STK[0],                 /*
-    //                 指向任务栈栈底的指针。OS_STK_GROWTH 决定堆栈增长方向 */
-    //                 LED1_STK_SIZE,                               /*
-    //                 任务栈大小 */ (void *)0, /*
-    //                 一块用户内存区的指针，用于任务控制块TCB的扩展功能
-    //                                                     （如任务切换时保存CPU浮点寄存器的数据）。一般不用，填0即可
-    //                                                     */
-    //                 OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /*
-    //                 任务选项字 */
+
+    OSTaskCreateExt((void (*)(void *))fly_uart3_task,
+                    (void *)0,
+                    (OS_STK *)&uart3_task_stk[UART3_TASK_STK_SIZE - 1],
+                    (INT8U)UART3_TASK_PRIO,
+                    (INT16U)UART3_TASK_PRIO,
+                    (OS_STK *)&uart3_task_stk[0],
+                    (INT32U)UART3_TASK_STK_SIZE,
+                    (void *)0,
+                    (INT16U)OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR | OS_TASK_OPT_SAVE_FP);
 
     OSTaskCreateExt((void (*)(void *))dm9161_task,
                     (void *)0,

User/stm32f4xx_it.c

@@ -178,23 +178,14 @@ void DebugMon_Handler(void)
 */
 void ETH_IRQHandler(void)
 {
-    //    uint32_t reval;
-    //    if(SET == enet_interrupt_flag_get(ENET_DMA_INT_FLAG_RS))
-    //    {
-    //        OSSemPost(g_rx_semaphore);
-    //    }
-    //    /* clear the enet DMA Rx interrupt pending bits */
-    //    enet_interrupt_flag_clear(ENET_DMA_INT_FLAG_RS_CLR);
-    //    enet_interrupt_flag_clear(ENET_DMA_INT_FLAG_NI_CLR);
     OSIntEnter();
 
     /* frame received */
-    if (SET == ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R))
+    if (SET == ETH_GetDMAITStatus(ETH_DMA_FLAG_R))
     {
-
         /* clear the enet DMA Rx interrupt pending bits */
-        ETH_DMAClearFlag(ETH_DMA_FLAG_R);
-        ETH_DMAClearFlag(ETH_DMA_FLAG_T);
+        ETH_DMAClearITPendingBit(ETH_DMA_FLAG_R);
+        ETH_DMAClearITPendingBit(ETH_DMA_FLAG_NIS);
 
         /* give the semaphore to wakeup LwIP task */
         OSSemPost(g_enet_rx_sem);

platformio.ini

@@ -10,7 +10,7 @@ board_build.cmsis.custom_config_header = yes
 ; 表示使用项目目录下的链接文件
 board_build.ldscript = Project/GCC/STM32F417IG_FLASH.ld
 extra_scripts = Project/GCC/scripts.py
-monitor_speed = 115200
+monitor_speed = 9600
 
 build_flags = 
   -IUser
@@ -18,6 +18,7 @@ build_flags =
   -IUser/bsp/can
   -IUser/bsp/interface
   -IUser/bsp/iwdg
+  -IUser/bsp/timer
   -IUser/bsp/uart 
   -IUser/app
   -IUser/app/queue