startup_stm32f40xx.s 23 KB

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  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32f40_41xxx.s
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief STM32F40xxx/41xxx Devices vector table for Atollic TrueSTUDIO toolchain.
  8. * Same as startup_stm32f40_41xxx.s and maintained for legacy purpose
  9. * This module performs:
  10. * - Set the initial SP
  11. * - Set the initial PC == Reset_Handler,
  12. * - Set the vector table entries with the exceptions ISR address
  13. * - Configure the clock system and the external SRAM mounted on
  14. * STM324xG-EVAL board to be used as data memory (optional,
  15. * to be enabled by user)
  16. * - Branches to main in the C library (which eventually
  17. * calls main()).
  18. * After Reset the Cortex-M4 processor is in Thread mode,
  19. * priority is Privileged, and the Stack is set to Main.
  20. ******************************************************************************
  21. * @attention
  22. *
  23. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  24. *
  25. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  26. * You may not use this file except in compliance with the License.
  27. * You may obtain a copy of the License at:
  28. *
  29. * http://www.st.com/software_license_agreement_liberty_v2
  30. *
  31. * Unless required by applicable law or agreed to in writing, software
  32. * distributed under the License is distributed on an "AS IS" BASIS,
  33. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  34. * See the License for the specific language governing permissions and
  35. * limitations under the License.
  36. *
  37. ******************************************************************************
  38. */
  39. .syntax unified
  40. .cpu cortex-m3
  41. .fpu softvfp
  42. .thumb
  43. .global g_pfnVectors
  44. .global Default_Handler
  45. /* start address for the initialization values of the .data section.
  46. defined in linker script */
  47. .word _sidata
  48. /* start address for the .data section. defined in linker script */
  49. .word _sdata
  50. /* end address for the .data section. defined in linker script */
  51. .word _edata
  52. /* start address for the .bss section. defined in linker script */
  53. .word _sbss
  54. /* end address for the .bss section. defined in linker script */
  55. .word _ebss
  56. /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  57. /**
  58. * @brief This is the code that gets called when the processor first
  59. * starts execution following a reset event. Only the absolutely
  60. * necessary set is performed, after which the application
  61. * supplied main() routine is called.
  62. * @param None
  63. * @retval : None
  64. */
  65. .section .text.Reset_Handler
  66. .weak Reset_Handler
  67. .type Reset_Handler, %function
  68. Reset_Handler:
  69. /* Copy the data segment initializers from flash to SRAM */
  70. movs r1, #0
  71. b LoopCopyDataInit
  72. CopyDataInit:
  73. ldr r3, =_sidata
  74. ldr r3, [r3, r1]
  75. str r3, [r0, r1]
  76. adds r1, r1, #4
  77. LoopCopyDataInit:
  78. ldr r0, =_sdata
  79. ldr r3, =_edata
  80. adds r2, r0, r1
  81. cmp r2, r3
  82. bcc CopyDataInit
  83. ldr r2, =_sbss
  84. b LoopFillZerobss
  85. /* Zero fill the bss segment. */
  86. FillZerobss:
  87. movs r3, #0
  88. str r3, [r2], #4
  89. LoopFillZerobss:
  90. ldr r3, = _ebss
  91. cmp r2, r3
  92. bcc FillZerobss
  93. /* Call the clock system intitialization function.*/
  94. bl SystemInit
  95. /* Call static constructors */
  96. bl __libc_init_array
  97. /* Call the application's entry point.*/
  98. bl main
  99. bx lr
  100. .size Reset_Handler, .-Reset_Handler
  101. /**
  102. * @brief This is the code that gets called when the processor receives an
  103. * unexpected interrupt. This simply enters an infinite loop, preserving
  104. * the system state for examination by a debugger.
  105. * @param None
  106. * @retval None
  107. */
  108. .section .text.Default_Handler,"ax",%progbits
  109. Default_Handler:
  110. Infinite_Loop:
  111. b Infinite_Loop
  112. .size Default_Handler, .-Default_Handler
  113. /******************************************************************************
  114. *
  115. * The minimal vector table for a Cortex M3. Note that the proper constructs
  116. * must be placed on this to ensure that it ends up at physical address
  117. * 0x0000.0000.
  118. *
  119. *******************************************************************************/
  120. .section .isr_vector,"a",%progbits
  121. .type g_pfnVectors, %object
  122. .size g_pfnVectors, .-g_pfnVectors
  123. g_pfnVectors:
  124. .word _estack
  125. .word Reset_Handler
  126. .word NMI_Handler
  127. .word HardFault_Handler
  128. .word MemManage_Handler
  129. .word BusFault_Handler
  130. .word UsageFault_Handler
  131. .word 0
  132. .word 0
  133. .word 0
  134. .word 0
  135. .word SVC_Handler
  136. .word DebugMon_Handler
  137. .word 0
  138. .word PendSV_Handler
  139. .word SysTick_Handler
  140. /* External Interrupts */
  141. .word WWDG_IRQHandler /* Window WatchDog */
  142. .word PVD_IRQHandler /* PVD through EXTI Line detection */
  143. .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  144. .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  145. .word FLASH_IRQHandler /* FLASH */
  146. .word RCC_IRQHandler /* RCC */
  147. .word EXTI0_IRQHandler /* EXTI Line0 */
  148. .word EXTI1_IRQHandler /* EXTI Line1 */
  149. .word EXTI2_IRQHandler /* EXTI Line2 */
  150. .word EXTI3_IRQHandler /* EXTI Line3 */
  151. .word EXTI4_IRQHandler /* EXTI Line4 */
  152. .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  153. .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  154. .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  155. .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  156. .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  157. .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  158. .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  159. .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  160. .word CAN1_TX_IRQHandler /* CAN1 TX */
  161. .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
  162. .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
  163. .word CAN1_SCE_IRQHandler /* CAN1 SCE */
  164. .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  165. .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
  166. .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
  167. .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
  168. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  169. .word TIM2_IRQHandler /* TIM2 */
  170. .word TIM3_IRQHandler /* TIM3 */
  171. .word TIM4_IRQHandler /* TIM4 */
  172. .word I2C1_EV_IRQHandler /* I2C1 Event */
  173. .word I2C1_ER_IRQHandler /* I2C1 Error */
  174. .word I2C2_EV_IRQHandler /* I2C2 Event */
  175. .word I2C2_ER_IRQHandler /* I2C2 Error */
  176. .word SPI1_IRQHandler /* SPI1 */
  177. .word SPI2_IRQHandler /* SPI2 */
  178. .word USART1_IRQHandler /* USART1 */
  179. .word USART2_IRQHandler /* USART2 */
  180. .word USART3_IRQHandler /* USART3 */
  181. .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  182. .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  183. .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
  184. .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
  185. .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
  186. .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
  187. .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
  188. .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  189. .word FSMC_IRQHandler /* FSMC */
  190. .word SDIO_IRQHandler /* SDIO */
  191. .word TIM5_IRQHandler /* TIM5 */
  192. .word SPI3_IRQHandler /* SPI3 */
  193. .word UART4_IRQHandler /* UART4 */
  194. .word UART5_IRQHandler /* UART5 */
  195. .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
  196. .word TIM7_IRQHandler /* TIM7 */
  197. .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  198. .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  199. .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  200. .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  201. .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  202. .word ETH_IRQHandler /* Ethernet */
  203. .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
  204. .word CAN2_TX_IRQHandler /* CAN2 TX */
  205. .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
  206. .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
  207. .word CAN2_SCE_IRQHandler /* CAN2 SCE */
  208. .word OTG_FS_IRQHandler /* USB OTG FS */
  209. .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  210. .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  211. .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  212. .word USART6_IRQHandler /* USART6 */
  213. .word I2C3_EV_IRQHandler /* I2C3 event */
  214. .word I2C3_ER_IRQHandler /* I2C3 error */
  215. .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
  216. .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
  217. .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
  218. .word OTG_HS_IRQHandler /* USB OTG HS */
  219. .word DCMI_IRQHandler /* DCMI */
  220. .word CRYP_IRQHandler /* CRYP crypto */
  221. .word HASH_RNG_IRQHandler /* Hash and Rng */
  222. .word FPU_IRQHandler /* FPU */
  223. /*******************************************************************************
  224. *
  225. * Provide weak aliases for each Exception handler to the Default_Handler.
  226. * As they are weak aliases, any function with the same name will override
  227. * this definition.
  228. *
  229. *******************************************************************************/
  230. .weak NMI_Handler
  231. .thumb_set NMI_Handler,Default_Handler
  232. .weak HardFault_Handler
  233. .thumb_set HardFault_Handler,Default_Handler
  234. .weak MemManage_Handler
  235. .thumb_set MemManage_Handler,Default_Handler
  236. .weak BusFault_Handler
  237. .thumb_set BusFault_Handler,Default_Handler
  238. .weak UsageFault_Handler
  239. .thumb_set UsageFault_Handler,Default_Handler
  240. .weak SVC_Handler
  241. .thumb_set SVC_Handler,Default_Handler
  242. .weak DebugMon_Handler
  243. .thumb_set DebugMon_Handler,Default_Handler
  244. .weak PendSV_Handler
  245. .thumb_set PendSV_Handler,Default_Handler
  246. .weak SysTick_Handler
  247. .thumb_set SysTick_Handler,Default_Handler
  248. .weak WWDG_IRQHandler
  249. .thumb_set WWDG_IRQHandler,Default_Handler
  250. .weak PVD_IRQHandler
  251. .thumb_set PVD_IRQHandler,Default_Handler
  252. .weak TAMP_STAMP_IRQHandler
  253. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  254. .weak RTC_WKUP_IRQHandler
  255. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  256. .weak FLASH_IRQHandler
  257. .thumb_set FLASH_IRQHandler,Default_Handler
  258. .weak RCC_IRQHandler
  259. .thumb_set RCC_IRQHandler,Default_Handler
  260. .weak EXTI0_IRQHandler
  261. .thumb_set EXTI0_IRQHandler,Default_Handler
  262. .weak EXTI1_IRQHandler
  263. .thumb_set EXTI1_IRQHandler,Default_Handler
  264. .weak EXTI2_IRQHandler
  265. .thumb_set EXTI2_IRQHandler,Default_Handler
  266. .weak EXTI3_IRQHandler
  267. .thumb_set EXTI3_IRQHandler,Default_Handler
  268. .weak EXTI4_IRQHandler
  269. .thumb_set EXTI4_IRQHandler,Default_Handler
  270. .weak DMA1_Stream0_IRQHandler
  271. .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
  272. .weak DMA1_Stream1_IRQHandler
  273. .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
  274. .weak DMA1_Stream2_IRQHandler
  275. .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
  276. .weak DMA1_Stream3_IRQHandler
  277. .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
  278. .weak DMA1_Stream4_IRQHandler
  279. .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
  280. .weak DMA1_Stream5_IRQHandler
  281. .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
  282. .weak DMA1_Stream6_IRQHandler
  283. .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
  284. .weak ADC_IRQHandler
  285. .thumb_set ADC_IRQHandler,Default_Handler
  286. .weak CAN1_TX_IRQHandler
  287. .thumb_set CAN1_TX_IRQHandler,Default_Handler
  288. .weak CAN1_RX0_IRQHandler
  289. .thumb_set CAN1_RX0_IRQHandler,Default_Handler
  290. .weak CAN1_RX1_IRQHandler
  291. .thumb_set CAN1_RX1_IRQHandler,Default_Handler
  292. .weak CAN1_SCE_IRQHandler
  293. .thumb_set CAN1_SCE_IRQHandler,Default_Handler
  294. .weak EXTI9_5_IRQHandler
  295. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  296. .weak TIM1_BRK_TIM9_IRQHandler
  297. .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
  298. .weak TIM1_UP_TIM10_IRQHandler
  299. .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
  300. .weak TIM1_TRG_COM_TIM11_IRQHandler
  301. .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
  302. .weak TIM1_CC_IRQHandler
  303. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  304. .weak TIM2_IRQHandler
  305. .thumb_set TIM2_IRQHandler,Default_Handler
  306. .weak TIM3_IRQHandler
  307. .thumb_set TIM3_IRQHandler,Default_Handler
  308. .weak TIM4_IRQHandler
  309. .thumb_set TIM4_IRQHandler,Default_Handler
  310. .weak I2C1_EV_IRQHandler
  311. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  312. .weak I2C1_ER_IRQHandler
  313. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  314. .weak I2C2_EV_IRQHandler
  315. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  316. .weak I2C2_ER_IRQHandler
  317. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  318. .weak SPI1_IRQHandler
  319. .thumb_set SPI1_IRQHandler,Default_Handler
  320. .weak SPI2_IRQHandler
  321. .thumb_set SPI2_IRQHandler,Default_Handler
  322. .weak USART1_IRQHandler
  323. .thumb_set USART1_IRQHandler,Default_Handler
  324. .weak USART2_IRQHandler
  325. .thumb_set USART2_IRQHandler,Default_Handler
  326. .weak USART3_IRQHandler
  327. .thumb_set USART3_IRQHandler,Default_Handler
  328. .weak EXTI15_10_IRQHandler
  329. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  330. .weak RTC_Alarm_IRQHandler
  331. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  332. .weak OTG_FS_WKUP_IRQHandler
  333. .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
  334. .weak TIM8_BRK_TIM12_IRQHandler
  335. .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
  336. .weak TIM8_UP_TIM13_IRQHandler
  337. .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
  338. .weak TIM8_TRG_COM_TIM14_IRQHandler
  339. .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
  340. .weak TIM8_CC_IRQHandler
  341. .thumb_set TIM8_CC_IRQHandler,Default_Handler
  342. .weak DMA1_Stream7_IRQHandler
  343. .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
  344. .weak FSMC_IRQHandler
  345. .thumb_set FSMC_IRQHandler,Default_Handler
  346. .weak SDIO_IRQHandler
  347. .thumb_set SDIO_IRQHandler,Default_Handler
  348. .weak TIM5_IRQHandler
  349. .thumb_set TIM5_IRQHandler,Default_Handler
  350. .weak SPI3_IRQHandler
  351. .thumb_set SPI3_IRQHandler,Default_Handler
  352. .weak UART4_IRQHandler
  353. .thumb_set UART4_IRQHandler,Default_Handler
  354. .weak UART5_IRQHandler
  355. .thumb_set UART5_IRQHandler,Default_Handler
  356. .weak TIM6_DAC_IRQHandler
  357. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  358. .weak TIM7_IRQHandler
  359. .thumb_set TIM7_IRQHandler,Default_Handler
  360. .weak DMA2_Stream0_IRQHandler
  361. .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
  362. .weak DMA2_Stream1_IRQHandler
  363. .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
  364. .weak DMA2_Stream2_IRQHandler
  365. .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
  366. .weak DMA2_Stream3_IRQHandler
  367. .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
  368. .weak DMA2_Stream4_IRQHandler
  369. .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
  370. .weak ETH_IRQHandler
  371. .thumb_set ETH_IRQHandler,Default_Handler
  372. .weak ETH_WKUP_IRQHandler
  373. .thumb_set ETH_WKUP_IRQHandler,Default_Handler
  374. .weak CAN2_TX_IRQHandler
  375. .thumb_set CAN2_TX_IRQHandler,Default_Handler
  376. .weak CAN2_RX0_IRQHandler
  377. .thumb_set CAN2_RX0_IRQHandler,Default_Handler
  378. .weak CAN2_RX1_IRQHandler
  379. .thumb_set CAN2_RX1_IRQHandler,Default_Handler
  380. .weak CAN2_SCE_IRQHandler
  381. .thumb_set CAN2_SCE_IRQHandler,Default_Handler
  382. .weak OTG_FS_IRQHandler
  383. .thumb_set OTG_FS_IRQHandler,Default_Handler
  384. .weak DMA2_Stream5_IRQHandler
  385. .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
  386. .weak DMA2_Stream6_IRQHandler
  387. .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
  388. .weak DMA2_Stream7_IRQHandler
  389. .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
  390. .weak USART6_IRQHandler
  391. .thumb_set USART6_IRQHandler,Default_Handler
  392. .weak I2C3_EV_IRQHandler
  393. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  394. .weak I2C3_ER_IRQHandler
  395. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  396. .weak OTG_HS_EP1_OUT_IRQHandler
  397. .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
  398. .weak OTG_HS_EP1_IN_IRQHandler
  399. .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
  400. .weak OTG_HS_WKUP_IRQHandler
  401. .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
  402. .weak OTG_HS_IRQHandler
  403. .thumb_set OTG_HS_IRQHandler,Default_Handler
  404. .weak DCMI_IRQHandler
  405. .thumb_set DCMI_IRQHandler,Default_Handler
  406. .weak CRYP_IRQHandler
  407. .thumb_set CRYP_IRQHandler,Default_Handler
  408. .weak HASH_RNG_IRQHandler
  409. .thumb_set HASH_RNG_IRQHandler,Default_Handler
  410. .weak FPU_IRQHandler
  411. .thumb_set FPU_IRQHandler,Default_Handler
  412. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/