stm32f4xx_fmpi2c.h 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476
  1. /**
  2. ******************************************************************************
  3. * @file stm32f30x_fmpi2c.h
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief This file contains all the functions prototypes for the I2C Fast Mode
  8. * Plus firmware library.
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  13. *
  14. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  15. * You may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at:
  17. *
  18. * http://www.st.com/software_license_agreement_liberty_v2
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. ******************************************************************************
  27. */
  28. /* Define to prevent recursive inclusion -------------------------------------*/
  29. #ifndef __STM32F4xx_FMPI2C_H
  30. #define __STM32F4xx_FMPI2C_H
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /* Includes ------------------------------------------------------------------*/
  35. #include "stm32f4xx.h"
  36. /** @addtogroup STM32F4xx_StdPeriph_Driver
  37. * @{
  38. */
  39. /** @addtogroup FMPI2C
  40. * @{
  41. */
  42. /* Exported types ------------------------------------------------------------*/
  43. /**
  44. * @brief FMPI2C Init structure definition
  45. */
  46. typedef struct
  47. {
  48. uint32_t FMPI2C_Timing; /*!< Specifies the FMPI2C_TIMINGR_register value.
  49. This parameter calculated by referring to FMPI2C initialization
  50. section in Reference manual*/
  51. uint32_t FMPI2C_AnalogFilter; /*!< Enables or disables analog noise filter.
  52. This parameter can be a value of @ref FMPI2C_Analog_Filter */
  53. uint32_t FMPI2C_DigitalFilter; /*!< Configures the digital noise filter.
  54. This parameter can be a number between 0x00 and 0x0F */
  55. uint32_t FMPI2C_Mode; /*!< Specifies the FMPI2C mode.
  56. This parameter can be a value of @ref FMPI2C_mode */
  57. uint32_t FMPI2C_OwnAddress1; /*!< Specifies the device own address 1.
  58. This parameter can be a 7-bit or 10-bit address */
  59. uint32_t FMPI2C_Ack; /*!< Enables or disables the acknowledgement.
  60. This parameter can be a value of @ref FMPI2C_acknowledgement */
  61. uint32_t FMPI2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
  62. This parameter can be a value of @ref FMPI2C_acknowledged_address */
  63. }FMPI2C_InitTypeDef;
  64. /* Exported constants --------------------------------------------------------*/
  65. /** @defgroup FMPI2C_Exported_Constants
  66. * @{
  67. */
  68. #define IS_FMPI2C_ALL_PERIPH(PERIPH) ((PERIPH) == FMPI2C1)
  69. /** @defgroup FMPI2C_Analog_Filter
  70. * @{
  71. */
  72. #define FMPI2C_AnalogFilter_Enable ((uint32_t)0x00000000)
  73. #define FMPI2C_AnalogFilter_Disable FMPI2C_CR1_ANFOFF
  74. #define IS_FMPI2C_ANALOG_FILTER(FILTER) (((FILTER) == FMPI2C_AnalogFilter_Enable) || \
  75. ((FILTER) == FMPI2C_AnalogFilter_Disable))
  76. /**
  77. * @}
  78. */
  79. /** @defgroup FMPI2C_Digital_Filter
  80. * @{
  81. */
  82. #define IS_FMPI2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
  83. /**
  84. * @}
  85. */
  86. /** @defgroup FMPI2C_mode
  87. * @{
  88. */
  89. #define FMPI2C_Mode_FMPI2C ((uint32_t)0x00000000)
  90. #define FMPI2C_Mode_SMBusDevice FMPI2C_CR1_SMBDEN
  91. #define FMPI2C_Mode_SMBusHost FMPI2C_CR1_SMBHEN
  92. #define IS_FMPI2C_MODE(MODE) (((MODE) == FMPI2C_Mode_FMPI2C) || \
  93. ((MODE) == FMPI2C_Mode_SMBusDevice) || \
  94. ((MODE) == FMPI2C_Mode_SMBusHost))
  95. /**
  96. * @}
  97. */
  98. /** @defgroup FMPI2C_acknowledgement
  99. * @{
  100. */
  101. #define FMPI2C_Ack_Enable ((uint32_t)0x00000000)
  102. #define FMPI2C_Ack_Disable FMPI2C_CR2_NACK
  103. #define IS_FMPI2C_ACK(ACK) (((ACK) == FMPI2C_Ack_Enable) || \
  104. ((ACK) == FMPI2C_Ack_Disable))
  105. /**
  106. * @}
  107. */
  108. /** @defgroup FMPI2C_acknowledged_address
  109. * @{
  110. */
  111. #define FMPI2C_AcknowledgedAddress_7bit ((uint32_t)0x00000000)
  112. #define FMPI2C_AcknowledgedAddress_10bit FMPI2C_OAR1_OA1MODE
  113. #define IS_FMPI2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_AcknowledgedAddress_7bit) || \
  114. ((ADDRESS) == FMPI2C_AcknowledgedAddress_10bit))
  115. /**
  116. * @}
  117. */
  118. /** @defgroup FMPI2C_own_address1
  119. * @{
  120. */
  121. #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
  122. /**
  123. * @}
  124. */
  125. /** @defgroup FMPI2C_transfer_direction
  126. * @{
  127. */
  128. #define FMPI2C_Direction_Transmitter ((uint16_t)0x0000)
  129. #define FMPI2C_Direction_Receiver ((uint16_t)0x0400)
  130. #define IS_FMPI2C_DIRECTION(DIRECTION) (((DIRECTION) == FMPI2C_Direction_Transmitter) || \
  131. ((DIRECTION) == FMPI2C_Direction_Receiver))
  132. /**
  133. * @}
  134. */
  135. /** @defgroup FMPI2C_DMA_transfer_requests
  136. * @{
  137. */
  138. #define FMPI2C_DMAReq_Tx FMPI2C_CR1_TXDMAEN
  139. #define FMPI2C_DMAReq_Rx FMPI2C_CR1_RXDMAEN
  140. #define IS_FMPI2C_DMA_REQ(REQ) ((((REQ) & (uint32_t)0xFFFF3FFF) == 0x00) && ((REQ) != 0x00))
  141. /**
  142. * @}
  143. */
  144. /** @defgroup FMPI2C_slave_address
  145. * @{
  146. */
  147. #define IS_FMPI2C_SLAVE_ADDRESS(ADDRESS) ((ADDRESS) <= (uint16_t)0x03FF)
  148. /**
  149. * @}
  150. */
  151. /** @defgroup FMPI2C_own_address2
  152. * @{
  153. */
  154. #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
  155. /**
  156. * @}
  157. */
  158. /** @defgroup FMPI2C_own_address2_mask
  159. * @{
  160. */
  161. #define FMPI2C_OA2_NoMask ((uint8_t)0x00)
  162. #define FMPI2C_OA2_Mask01 ((uint8_t)0x01)
  163. #define FMPI2C_OA2_Mask02 ((uint8_t)0x02)
  164. #define FMPI2C_OA2_Mask03 ((uint8_t)0x03)
  165. #define FMPI2C_OA2_Mask04 ((uint8_t)0x04)
  166. #define FMPI2C_OA2_Mask05 ((uint8_t)0x05)
  167. #define FMPI2C_OA2_Mask06 ((uint8_t)0x06)
  168. #define FMPI2C_OA2_Mask07 ((uint8_t)0x07)
  169. #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NoMask) || \
  170. ((MASK) == FMPI2C_OA2_Mask01) || \
  171. ((MASK) == FMPI2C_OA2_Mask02) || \
  172. ((MASK) == FMPI2C_OA2_Mask03) || \
  173. ((MASK) == FMPI2C_OA2_Mask04) || \
  174. ((MASK) == FMPI2C_OA2_Mask05) || \
  175. ((MASK) == FMPI2C_OA2_Mask06) || \
  176. ((MASK) == FMPI2C_OA2_Mask07))
  177. /**
  178. * @}
  179. */
  180. /** @defgroup FMPI2C_timeout
  181. * @{
  182. */
  183. #define IS_FMPI2C_TIMEOUT(TIMEOUT) ((TIMEOUT) <= (uint16_t)0x0FFF)
  184. /**
  185. * @}
  186. */
  187. /** @defgroup FMPI2C_registers
  188. * @{
  189. */
  190. #define FMPI2C_Register_CR1 ((uint8_t)0x00)
  191. #define FMPI2C_Register_CR2 ((uint8_t)0x04)
  192. #define FMPI2C_Register_OAR1 ((uint8_t)0x08)
  193. #define FMPI2C_Register_OAR2 ((uint8_t)0x0C)
  194. #define FMPI2C_Register_TIMINGR ((uint8_t)0x10)
  195. #define FMPI2C_Register_TIMEOUTR ((uint8_t)0x14)
  196. #define FMPI2C_Register_ISR ((uint8_t)0x18)
  197. #define FMPI2C_Register_ICR ((uint8_t)0x1C)
  198. #define FMPI2C_Register_PECR ((uint8_t)0x20)
  199. #define FMPI2C_Register_RXDR ((uint8_t)0x24)
  200. #define FMPI2C_Register_TXDR ((uint8_t)0x28)
  201. #define IS_FMPI2C_REGISTER(REGISTER) (((REGISTER) == FMPI2C_Register_CR1) || \
  202. ((REGISTER) == FMPI2C_Register_CR2) || \
  203. ((REGISTER) == FMPI2C_Register_OAR1) || \
  204. ((REGISTER) == FMPI2C_Register_OAR2) || \
  205. ((REGISTER) == FMPI2C_Register_TIMINGR) || \
  206. ((REGISTER) == FMPI2C_Register_TIMEOUTR) || \
  207. ((REGISTER) == FMPI2C_Register_ISR) || \
  208. ((REGISTER) == FMPI2C_Register_ICR) || \
  209. ((REGISTER) == FMPI2C_Register_PECR) || \
  210. ((REGISTER) == FMPI2C_Register_RXDR) || \
  211. ((REGISTER) == FMPI2C_Register_TXDR))
  212. /**
  213. * @}
  214. */
  215. /** @defgroup FMPI2C_interrupts_definition
  216. * @{
  217. */
  218. #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE
  219. #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE
  220. #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE
  221. #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE
  222. #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE
  223. #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE
  224. #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE
  225. #define IS_FMPI2C_CONFIG_IT(IT) ((((IT) & (uint32_t)0xFFFFFF01) == 0x00) && ((IT) != 0x00))
  226. /**
  227. * @}
  228. */
  229. /** @defgroup FMPI2C_flags_definition
  230. * @{
  231. */
  232. #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE
  233. #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS
  234. #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE
  235. #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR
  236. #define FMPI2C_FLAG_NACKF FMPI2C_ISR_NACKF
  237. #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF
  238. #define FMPI2C_FLAG_TC FMPI2C_ISR_TC
  239. #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR
  240. #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR
  241. #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO
  242. #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR
  243. #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR
  244. #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
  245. #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT
  246. #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY
  247. #define IS_FMPI2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFF4000) == 0x00) && ((FLAG) != 0x00))
  248. #define IS_FMPI2C_GET_FLAG(FLAG) (((FLAG) == FMPI2C_FLAG_TXE) || ((FLAG) == FMPI2C_FLAG_TXIS) || \
  249. ((FLAG) == FMPI2C_FLAG_RXNE) || ((FLAG) == FMPI2C_FLAG_ADDR) || \
  250. ((FLAG) == FMPI2C_FLAG_NACKF) || ((FLAG) == FMPI2C_FLAG_STOPF) || \
  251. ((FLAG) == FMPI2C_FLAG_TC) || ((FLAG) == FMPI2C_FLAG_TCR) || \
  252. ((FLAG) == FMPI2C_FLAG_BERR) || ((FLAG) == FMPI2C_FLAG_ARLO) || \
  253. ((FLAG) == FMPI2C_FLAG_OVR) || ((FLAG) == FMPI2C_FLAG_PECERR) || \
  254. ((FLAG) == FMPI2C_FLAG_TIMEOUT) || ((FLAG) == FMPI2C_FLAG_ALERT) || \
  255. ((FLAG) == FMPI2C_FLAG_BUSY))
  256. /**
  257. * @}
  258. */
  259. /** @defgroup FMPI2C_interrupts_definition
  260. * @{
  261. */
  262. #define FMPI2C_IT_TXIS FMPI2C_ISR_TXIS
  263. #define FMPI2C_IT_RXNE FMPI2C_ISR_RXNE
  264. #define FMPI2C_IT_ADDR FMPI2C_ISR_ADDR
  265. #define FMPI2C_IT_NACKF FMPI2C_ISR_NACKF
  266. #define FMPI2C_IT_STOPF FMPI2C_ISR_STOPF
  267. #define FMPI2C_IT_TC FMPI2C_ISR_TC
  268. #define FMPI2C_IT_TCR FMPI2C_ISR_TCR
  269. #define FMPI2C_IT_BERR FMPI2C_ISR_BERR
  270. #define FMPI2C_IT_ARLO FMPI2C_ISR_ARLO
  271. #define FMPI2C_IT_OVR FMPI2C_ISR_OVR
  272. #define FMPI2C_IT_PECERR FMPI2C_ISR_PECERR
  273. #define FMPI2C_IT_TIMEOUT FMPI2C_ISR_TIMEOUT
  274. #define FMPI2C_IT_ALERT FMPI2C_ISR_ALERT
  275. #define IS_FMPI2C_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFC001) == 0x00) && ((IT) != 0x00))
  276. #define IS_FMPI2C_GET_IT(IT) (((IT) == FMPI2C_IT_TXIS) || ((IT) == FMPI2C_IT_RXNE) || \
  277. ((IT) == FMPI2C_IT_ADDR) || ((IT) == FMPI2C_IT_NACKF) || \
  278. ((IT) == FMPI2C_IT_STOPF) || ((IT) == FMPI2C_IT_TC) || \
  279. ((IT) == FMPI2C_IT_TCR) || ((IT) == FMPI2C_IT_BERR) || \
  280. ((IT) == FMPI2C_IT_ARLO) || ((IT) == FMPI2C_IT_OVR) || \
  281. ((IT) == FMPI2C_IT_PECERR) || ((IT) == FMPI2C_IT_TIMEOUT) || \
  282. ((IT) == FMPI2C_IT_ALERT))
  283. /**
  284. * @}
  285. */
  286. /** @defgroup FMPI2C_ReloadEndMode_definition
  287. * @{
  288. */
  289. #define FMPI2C_Reload_Mode FMPI2C_CR2_RELOAD
  290. #define FMPI2C_AutoEnd_Mode FMPI2C_CR2_AUTOEND
  291. #define FMPI2C_SoftEnd_Mode ((uint32_t)0x00000000)
  292. #define IS_RELOAD_END_MODE(MODE) (((MODE) == FMPI2C_Reload_Mode) || \
  293. ((MODE) == FMPI2C_AutoEnd_Mode) || \
  294. ((MODE) == FMPI2C_SoftEnd_Mode))
  295. /**
  296. * @}
  297. */
  298. /** @defgroup FMPI2C_StartStopMode_definition
  299. * @{
  300. */
  301. #define FMPI2C_No_StartStop ((uint32_t)0x00000000)
  302. #define FMPI2C_Generate_Stop FMPI2C_CR2_STOP
  303. #define FMPI2C_Generate_Start_Read (uint32_t)(FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
  304. #define FMPI2C_Generate_Start_Write FMPI2C_CR2_START
  305. #define IS_START_STOP_MODE(MODE) (((MODE) == FMPI2C_Generate_Stop) || \
  306. ((MODE) == FMPI2C_Generate_Start_Read) || \
  307. ((MODE) == FMPI2C_Generate_Start_Write) || \
  308. ((MODE) == FMPI2C_No_StartStop))
  309. /**
  310. * @}
  311. */
  312. /**
  313. * @}
  314. */
  315. /* Exported macro ------------------------------------------------------------*/
  316. /* Exported functions ------------------------------------------------------- */
  317. /* Initialization and Configuration functions *********************************/
  318. void FMPI2C_DeInit(FMPI2C_TypeDef* FMPI2Cx);
  319. void FMPI2C_Init(FMPI2C_TypeDef* FMPI2Cx, FMPI2C_InitTypeDef* FMPI2C_InitStruct);
  320. void FMPI2C_StructInit(FMPI2C_InitTypeDef* FMPI2C_InitStruct);
  321. void FMPI2C_Cmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  322. void FMPI2C_SoftwareResetCmd(FMPI2C_TypeDef* FMPI2Cx);
  323. void FMPI2C_ITConfig(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT, FunctionalState NewState);
  324. void FMPI2C_StretchClockCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  325. void FMPI2C_StopModeCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  326. void FMPI2C_DualAddressCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  327. void FMPI2C_OwnAddress2Config(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address, uint8_t Mask);
  328. void FMPI2C_GeneralCallCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  329. void FMPI2C_SlaveByteControlCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  330. void FMPI2C_SlaveAddressConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address);
  331. void FMPI2C_10BitAddressingModeCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  332. /* Communications handling functions ******************************************/
  333. void FMPI2C_AutoEndCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  334. void FMPI2C_ReloadCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  335. void FMPI2C_NumberOfBytesConfig(FMPI2C_TypeDef* FMPI2Cx, uint8_t Number_Bytes);
  336. void FMPI2C_MasterRequestConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t FMPI2C_Direction);
  337. void FMPI2C_GenerateSTART(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  338. void FMPI2C_GenerateSTOP(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  339. void FMPI2C_10BitAddressHeaderCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  340. void FMPI2C_AcknowledgeConfig(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  341. uint8_t FMPI2C_GetAddressMatched(FMPI2C_TypeDef* FMPI2Cx);
  342. uint16_t FMPI2C_GetTransferDirection(FMPI2C_TypeDef* FMPI2Cx);
  343. void FMPI2C_TransferHandling(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode);
  344. /* SMBUS management functions ************************************************/
  345. void FMPI2C_SMBusAlertCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  346. void FMPI2C_ClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  347. void FMPI2C_ExtendedClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  348. void FMPI2C_IdleClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  349. void FMPI2C_TimeoutAConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Timeout);
  350. void FMPI2C_TimeoutBConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Timeout);
  351. void FMPI2C_CalculatePEC(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  352. void FMPI2C_PECRequestCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
  353. uint8_t FMPI2C_GetPEC(FMPI2C_TypeDef* FMPI2Cx);
  354. /* FMPI2C registers management functions *****************************************/
  355. uint32_t FMPI2C_ReadRegister(FMPI2C_TypeDef* FMPI2Cx, uint8_t FMPI2C_Register);
  356. /* Data transfers management functions ****************************************/
  357. void FMPI2C_SendData(FMPI2C_TypeDef* FMPI2Cx, uint8_t Data);
  358. uint8_t FMPI2C_ReceiveData(FMPI2C_TypeDef* FMPI2Cx);
  359. /* DMA transfers management functions *****************************************/
  360. void FMPI2C_DMACmd(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_DMAReq, FunctionalState NewState);
  361. /* Interrupts and flags management functions **********************************/
  362. FlagStatus FMPI2C_GetFlagStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG);
  363. void FMPI2C_ClearFlag(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG);
  364. ITStatus FMPI2C_GetITStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT);
  365. void FMPI2C_ClearITPendingBit(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT);
  366. #ifdef __cplusplus
  367. }
  368. #endif
  369. #endif /*__STM32F4xx_FMPI2C_H */
  370. /**
  371. * @}
  372. */
  373. /**
  374. * @}
  375. */
  376. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/