stm32f4xx_dma2d.h 19 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_dma2d.h
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief This file contains all the functions prototypes for the DMA2D firmware
  8. * library.
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  13. *
  14. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  15. * You may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at:
  17. *
  18. * http://www.st.com/software_license_agreement_liberty_v2
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. ******************************************************************************
  27. */
  28. /* Define to prevent recursive inclusion -------------------------------------*/
  29. #ifndef __STM32F4xx_DMA2D_H
  30. #define __STM32F4xx_DMA2D_H
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /* Includes ------------------------------------------------------------------*/
  35. #include "stm32f4xx.h"
  36. /** @addtogroup STM32F4xx_StdPeriph_Driver
  37. * @{
  38. */
  39. /** @addtogroup DMA2D
  40. * @{
  41. */
  42. /* Exported types ------------------------------------------------------------*/
  43. /**
  44. * @brief DMA2D Init structure definition
  45. */
  46. typedef struct
  47. {
  48. uint32_t DMA2D_Mode; /*!< configures the DMA2D transfer mode.
  49. This parameter can be one value of @ref DMA2D_MODE */
  50. uint32_t DMA2D_CMode; /*!< configures the color format of the output image.
  51. This parameter can be one value of @ref DMA2D_CMODE */
  52. uint32_t DMA2D_OutputBlue; /*!< configures the blue value of the output image.
  53. This parameter must range:
  54. - from 0x00 to 0xFF if ARGB8888 color mode is slected
  55. - from 0x00 to 0xFF if RGB888 color mode is slected
  56. - from 0x00 to 0x1F if RGB565 color mode is slected
  57. - from 0x00 to 0x1F if ARGB1555 color mode is slected
  58. - from 0x00 to 0x0F if ARGB4444 color mode is slected */
  59. uint32_t DMA2D_OutputGreen; /*!< configures the green value of the output image.
  60. This parameter must range:
  61. - from 0x00 to 0xFF if ARGB8888 color mode is selected
  62. - from 0x00 to 0xFF if RGB888 color mode is selected
  63. - from 0x00 to 0x2F if RGB565 color mode is selected
  64. - from 0x00 to 0x1F if ARGB1555 color mode is selected
  65. - from 0x00 to 0x0F if ARGB4444 color mode is selected */
  66. uint32_t DMA2D_OutputRed; /*!< configures the red value of the output image.
  67. This parameter must range:
  68. - from 0x00 to 0xFF if ARGB8888 color mode is slected
  69. - from 0x00 to 0xFF if RGB888 color mode is slected
  70. - from 0x00 to 0x1F if RGB565 color mode is slected
  71. - from 0x00 to 0x1F if ARGB1555 color mode is slected
  72. - from 0x00 to 0x0F if ARGB4444 color mode is slected */
  73. uint32_t DMA2D_OutputAlpha; /*!< configures the alpha channel of the output color.
  74. This parameter must range:
  75. - from 0x00 to 0xFF if ARGB8888 color mode is selected
  76. - from 0x00 to 0x01 if ARGB1555 color mode is selected
  77. - from 0x00 to 0x0F if ARGB4444 color mode is selected */
  78. uint32_t DMA2D_OutputMemoryAdd; /*!< Specifies the memory address. This parameter
  79. must be range from 0x00000000 to 0xFFFFFFFF. */
  80. uint32_t DMA2D_OutputOffset; /*!< Specifies the Offset value. This parameter must be range from
  81. 0x0000 to 0x3FFF. */
  82. uint32_t DMA2D_NumberOfLine; /*!< Configures the number of line of the area to be transfered.
  83. This parameter must range from 0x0000 to 0xFFFF */
  84. uint32_t DMA2D_PixelPerLine; /*!< Configures the number pixel per line of the area to be transferred.
  85. This parameter must range from 0x0000 to 0x3FFF */
  86. } DMA2D_InitTypeDef;
  87. typedef struct
  88. {
  89. uint32_t DMA2D_FGMA; /*!< configures the DMA2D foreground memory address.
  90. This parameter must be range from 0x00000000 to 0xFFFFFFFF. */
  91. uint32_t DMA2D_FGO; /*!< configures the DMA2D foreground offset.
  92. This parameter must be range from 0x0000 to 0x3FFF. */
  93. uint32_t DMA2D_FGCM; /*!< configures the DMA2D foreground color mode .
  94. This parameter can be one value of @ref DMA2D_FGCM */
  95. uint32_t DMA2D_FG_CLUT_CM; /*!< configures the DMA2D foreground CLUT color mode.
  96. This parameter can be one value of @ref DMA2D_FG_CLUT_CM */
  97. uint32_t DMA2D_FG_CLUT_SIZE; /*!< configures the DMA2D foreground CLUT size.
  98. This parameter must range from 0x00 to 0xFF. */
  99. uint32_t DMA2D_FGPFC_ALPHA_MODE; /*!< configures the DMA2D foreground alpha mode.
  100. This parameter can be one value of @ref DMA2D_FGPFC_ALPHA_MODE */
  101. uint32_t DMA2D_FGPFC_ALPHA_VALUE; /*!< Specifies the DMA2D foreground alpha value
  102. must be range from 0x00 to 0xFF. */
  103. uint32_t DMA2D_FGC_BLUE; /*!< Specifies the DMA2D foreground blue value
  104. must be range from 0x00 to 0xFF. */
  105. uint32_t DMA2D_FGC_GREEN; /*!< Specifies the DMA2D foreground green value
  106. must be range from 0x00 to 0xFF. */
  107. uint32_t DMA2D_FGC_RED; /*!< Specifies the DMA2D foreground red value
  108. must be range from 0x00 to 0xFF. */
  109. uint32_t DMA2D_FGCMAR; /*!< Configures the DMA2D foreground CLUT memory address.
  110. This parameter must range from 0x00000000 to 0xFFFFFFFF. */
  111. } DMA2D_FG_InitTypeDef;
  112. typedef struct
  113. {
  114. uint32_t DMA2D_BGMA; /*!< configures the DMA2D background memory address.
  115. This parameter must be range from 0x00000000 to 0xFFFFFFFF. */
  116. uint32_t DMA2D_BGO; /*!< configures the DMA2D background offset.
  117. This parameter must be range from 0x0000 to 0x3FFF. */
  118. uint32_t DMA2D_BGCM; /*!< configures the DMA2D background color mode .
  119. This parameter can be one value of @ref DMA2D_FGCM */
  120. uint32_t DMA2D_BG_CLUT_CM; /*!< configures the DMA2D background CLUT color mode.
  121. This parameter can be one value of @ref DMA2D_FG_CLUT_CM */
  122. uint32_t DMA2D_BG_CLUT_SIZE; /*!< configures the DMA2D background CLUT size.
  123. This parameter must range from 0x00 to 0xFF. */
  124. uint32_t DMA2D_BGPFC_ALPHA_MODE; /*!< configures the DMA2D background alpha mode.
  125. This parameter can be one value of @ref DMA2D_FGPFC_ALPHA_MODE */
  126. uint32_t DMA2D_BGPFC_ALPHA_VALUE; /*!< Specifies the DMA2D background alpha value
  127. must be range from 0x00 to 0xFF. */
  128. uint32_t DMA2D_BGC_BLUE; /*!< Specifies the DMA2D background blue value
  129. must be range from 0x00 to 0xFF. */
  130. uint32_t DMA2D_BGC_GREEN; /*!< Specifies the DMA2D background green value
  131. must be range from 0x00 to 0xFF. */
  132. uint32_t DMA2D_BGC_RED; /*!< Specifies the DMA2D background red value
  133. must be range from 0x00 to 0xFF. */
  134. uint32_t DMA2D_BGCMAR; /*!< Configures the DMA2D background CLUT memory address.
  135. This parameter must range from 0x00000000 to 0xFFFFFFFF. */
  136. } DMA2D_BG_InitTypeDef;
  137. /* Exported constants --------------------------------------------------------*/
  138. /** @defgroup DMA2D_Exported_Constants
  139. * @{
  140. */
  141. /** @defgroup DMA2D_MODE
  142. * @{
  143. */
  144. #define DMA2D_M2M ((uint32_t)0x00000000)
  145. #define DMA2D_M2M_PFC ((uint32_t)0x00010000)
  146. #define DMA2D_M2M_BLEND ((uint32_t)0x00020000)
  147. #define DMA2D_R2M ((uint32_t)0x00030000)
  148. #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
  149. ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
  150. /**
  151. * @}
  152. */
  153. /** @defgroup DMA2D_CMODE
  154. * @{
  155. */
  156. #define DMA2D_ARGB8888 ((uint32_t)0x00000000)
  157. #define DMA2D_RGB888 ((uint32_t)0x00000001)
  158. #define DMA2D_RGB565 ((uint32_t)0x00000002)
  159. #define DMA2D_ARGB1555 ((uint32_t)0x00000003)
  160. #define DMA2D_ARGB4444 ((uint32_t)0x00000004)
  161. #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
  162. ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
  163. ((MODE_ARGB) == DMA2D_ARGB4444))
  164. /**
  165. * @}
  166. */
  167. /** @defgroup DMA2D_OUTPUT_COLOR
  168. * @{
  169. */
  170. #define DMA2D_Output_Color ((uint32_t)0x000000FF)
  171. #define IS_DMA2D_OGREEN(OGREEN) ((OGREEN) <= DMA2D_Output_Color)
  172. #define IS_DMA2D_ORED(ORED) ((ORED) <= DMA2D_Output_Color)
  173. #define IS_DMA2D_OBLUE(OBLUE) ((OBLUE) <= DMA2D_Output_Color)
  174. #define IS_DMA2D_OALPHA(OALPHA) ((OALPHA) <= DMA2D_Output_Color)
  175. /**
  176. * @}
  177. */
  178. /** @defgroup DMA2D_OUTPUT_OFFSET
  179. * @{
  180. */
  181. #define DMA2D_OUTPUT_OFFSET ((uint32_t)0x00003FFF)
  182. #define IS_DMA2D_OUTPUT_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OUTPUT_OFFSET)
  183. /**
  184. * @}
  185. */
  186. /** @defgroup DMA2D_SIZE
  187. * @{
  188. */
  189. #define DMA2D_pixel ((uint32_t)0x00003FFF)
  190. #define DMA2D_Line ((uint32_t)0x0000FFFF)
  191. #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_Line)
  192. #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_pixel)
  193. /**
  194. * @}
  195. */
  196. /** @defgroup DMA2D_OFFSET
  197. * @{
  198. */
  199. #define OFFSET ((uint32_t)0x00003FFF)
  200. #define IS_DMA2D_FGO(FGO) ((FGO) <= OFFSET)
  201. #define IS_DMA2D_BGO(BGO) ((BGO) <= OFFSET)
  202. /**
  203. * @}
  204. */
  205. /** @defgroup DMA2D_FGCM
  206. * @{
  207. */
  208. #define CM_ARGB8888 ((uint32_t)0x00000000)
  209. #define CM_RGB888 ((uint32_t)0x00000001)
  210. #define CM_RGB565 ((uint32_t)0x00000002)
  211. #define CM_ARGB1555 ((uint32_t)0x00000003)
  212. #define CM_ARGB4444 ((uint32_t)0x00000004)
  213. #define CM_L8 ((uint32_t)0x00000005)
  214. #define CM_AL44 ((uint32_t)0x00000006)
  215. #define CM_AL88 ((uint32_t)0x00000007)
  216. #define CM_L4 ((uint32_t)0x00000008)
  217. #define CM_A8 ((uint32_t)0x00000009)
  218. #define CM_A4 ((uint32_t)0x0000000A)
  219. #define IS_DMA2D_FGCM(FGCM) (((FGCM) == CM_ARGB8888) || ((FGCM) == CM_RGB888) || \
  220. ((FGCM) == CM_RGB565) || ((FGCM) == CM_ARGB1555) || \
  221. ((FGCM) == CM_ARGB4444) || ((FGCM) == CM_L8) || \
  222. ((FGCM) == CM_AL44) || ((FGCM) == CM_AL88) || \
  223. ((FGCM) == CM_L4) || ((FGCM) == CM_A8) || \
  224. ((FGCM) == CM_A4))
  225. #define IS_DMA2D_BGCM(BGCM) (((BGCM) == CM_ARGB8888) || ((BGCM) == CM_RGB888) || \
  226. ((BGCM) == CM_RGB565) || ((BGCM) == CM_ARGB1555) || \
  227. ((BGCM) == CM_ARGB4444) || ((BGCM) == CM_L8) || \
  228. ((BGCM) == CM_AL44) || ((BGCM) == CM_AL88) || \
  229. ((BGCM) == CM_L4) || ((BGCM) == CM_A8) || \
  230. ((BGCM) == CM_A4))
  231. /**
  232. * @}
  233. */
  234. /** @defgroup DMA2D_FG_CLUT_CM
  235. * @{
  236. */
  237. #define CLUT_CM_ARGB8888 ((uint32_t)0x00000000)
  238. #define CLUT_CM_RGB888 ((uint32_t)0x00000001)
  239. #define IS_DMA2D_FG_CLUT_CM(FG_CLUT_CM) (((FG_CLUT_CM) == CLUT_CM_ARGB8888) || ((FG_CLUT_CM) == CLUT_CM_RGB888))
  240. #define IS_DMA2D_BG_CLUT_CM(BG_CLUT_CM) (((BG_CLUT_CM) == CLUT_CM_ARGB8888) || ((BG_CLUT_CM) == CLUT_CM_RGB888))
  241. /**
  242. * @}
  243. */
  244. /** @defgroup DMA2D_FG_COLOR_VALUE
  245. * @{
  246. */
  247. #define COLOR_VALUE ((uint32_t)0x000000FF)
  248. #define IS_DMA2D_FG_CLUT_SIZE(FG_CLUT_SIZE) ((FG_CLUT_SIZE) <= COLOR_VALUE)
  249. #define IS_DMA2D_FG_ALPHA_VALUE(FG_ALPHA_VALUE) ((FG_ALPHA_VALUE) <= COLOR_VALUE)
  250. #define IS_DMA2D_FGC_BLUE(FGC_BLUE) ((FGC_BLUE) <= COLOR_VALUE)
  251. #define IS_DMA2D_FGC_GREEN(FGC_GREEN) ((FGC_GREEN) <= COLOR_VALUE)
  252. #define IS_DMA2D_FGC_RED(FGC_RED) ((FGC_RED) <= COLOR_VALUE)
  253. #define IS_DMA2D_BG_CLUT_SIZE(BG_CLUT_SIZE) ((BG_CLUT_SIZE) <= COLOR_VALUE)
  254. #define IS_DMA2D_BG_ALPHA_VALUE(BG_ALPHA_VALUE) ((BG_ALPHA_VALUE) <= COLOR_VALUE)
  255. #define IS_DMA2D_BGC_BLUE(BGC_BLUE) ((BGC_BLUE) <= COLOR_VALUE)
  256. #define IS_DMA2D_BGC_GREEN(BGC_GREEN) ((BGC_GREEN) <= COLOR_VALUE)
  257. #define IS_DMA2D_BGC_RED(BGC_RED) ((BGC_RED) <= COLOR_VALUE)
  258. /**
  259. * @}
  260. */
  261. /** DMA2D_FGPFC_ALPHA_MODE
  262. * @{
  263. */
  264. #define NO_MODIF_ALPHA_VALUE ((uint32_t)0x00000000)
  265. #define REPLACE_ALPHA_VALUE ((uint32_t)0x00000001)
  266. #define COMBINE_ALPHA_VALUE ((uint32_t)0x00000002)
  267. #define IS_DMA2D_FG_ALPHA_MODE(FG_ALPHA_MODE) (((FG_ALPHA_MODE) == NO_MODIF_ALPHA_VALUE) || \
  268. ((FG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
  269. ((FG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
  270. #define IS_DMA2D_BG_ALPHA_MODE(BG_ALPHA_MODE) (((BG_ALPHA_MODE) == NO_MODIF_ALPHA_VALUE) || \
  271. ((BG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
  272. ((BG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
  273. /**
  274. * @}
  275. */
  276. /** @defgroup DMA2D_Interrupts
  277. * @{
  278. */
  279. #define DMA2D_IT_CE DMA2D_CR_CEIE
  280. #define DMA2D_IT_CTC DMA2D_CR_CTCIE
  281. #define DMA2D_IT_CAE DMA2D_CR_CAEIE
  282. #define DMA2D_IT_TW DMA2D_CR_TWIE
  283. #define DMA2D_IT_TC DMA2D_CR_TCIE
  284. #define DMA2D_IT_TE DMA2D_CR_TEIE
  285. #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
  286. ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
  287. ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
  288. /**
  289. * @}
  290. */
  291. /** @defgroup DMA2D_Flag
  292. * @{
  293. */
  294. #define DMA2D_FLAG_CE DMA2D_ISR_CEIF
  295. #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF
  296. #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF
  297. #define DMA2D_FLAG_TW DMA2D_ISR_TWIF
  298. #define DMA2D_FLAG_TC DMA2D_ISR_TCIF
  299. #define DMA2D_FLAG_TE DMA2D_ISR_TEIF
  300. #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
  301. ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
  302. ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
  303. /**
  304. * @}
  305. */
  306. /** @defgroup DMA2D_DeadTime
  307. * @{
  308. */
  309. #define DEADTIME ((uint32_t)0x000000FF)
  310. #define IS_DMA2D_DEAD_TIME(DEAD_TIME) ((DEAD_TIME) <= DEADTIME)
  311. #define LINE_WATERMARK DMA2D_LWR_LW
  312. #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
  313. /**
  314. * @}
  315. */
  316. /**
  317. * @}
  318. */
  319. /* Exported macro ------------------------------------------------------------*/
  320. /* Exported functions ------------------------------------------------------- */
  321. /* Function used to set the DMA2D configuration to the default reset state *****/
  322. void DMA2D_DeInit(void);
  323. /* Initialization and Configuration functions *********************************/
  324. void DMA2D_Init(DMA2D_InitTypeDef* DMA2D_InitStruct);
  325. void DMA2D_StructInit(DMA2D_InitTypeDef* DMA2D_InitStruct);
  326. void DMA2D_StartTransfer(void);
  327. void DMA2D_AbortTransfer(void);
  328. void DMA2D_Suspend(FunctionalState NewState);
  329. void DMA2D_FGConfig(DMA2D_FG_InitTypeDef* DMA2D_FG_InitStruct);
  330. void DMA2D_FG_StructInit(DMA2D_FG_InitTypeDef* DMA2D_FG_InitStruct);
  331. void DMA2D_BGConfig(DMA2D_BG_InitTypeDef* DMA2D_BG_InitStruct);
  332. void DMA2D_BG_StructInit(DMA2D_BG_InitTypeDef* DMA2D_BG_InitStruct);
  333. void DMA2D_FGStart(FunctionalState NewState);
  334. void DMA2D_BGStart(FunctionalState NewState);
  335. void DMA2D_DeadTimeConfig(uint32_t DMA2D_DeadTime, FunctionalState NewState);
  336. void DMA2D_LineWatermarkConfig(uint32_t DMA2D_LWatermarkConfig);
  337. /* Interrupts and flags management functions **********************************/
  338. void DMA2D_ITConfig(uint32_t DMA2D_IT, FunctionalState NewState);
  339. FlagStatus DMA2D_GetFlagStatus(uint32_t DMA2D_FLAG);
  340. void DMA2D_ClearFlag(uint32_t DMA2D_FLAG);
  341. ITStatus DMA2D_GetITStatus(uint32_t DMA2D_IT);
  342. void DMA2D_ClearITPendingBit(uint32_t DMA2D_IT);
  343. #ifdef __cplusplus
  344. }
  345. #endif
  346. #endif /* __STM32F4xx_DMA2D_H */
  347. /**
  348. * @}
  349. */
  350. /**
  351. * @}
  352. */
  353. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/