startup_stm32f40xx.s 29 KB

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  1. ;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f40xx.s
  3. ;* Author : MCD Application Team
  4. ;* @version : V1.5.0
  5. ;* @date : 06-March-2015
  6. ;* Description : STM32F40xxx/41xxx devices vector table for MDK-ARM toolchain.
  7. ;* Same as startup_stm32f40_41xxx.s and maintained for legacy purpose
  8. ;* This module performs:
  9. ;* - Set the initial SP
  10. ;* - Set the initial PC == Reset_Handler
  11. ;* - Set the vector table entries with the exceptions ISR address
  12. ;* - Configure the system clock and the external SRAM mounted on
  13. ;* STM324xG-EVAL board to be used as data memory (optional,
  14. ;* to be enabled by user)
  15. ;* - Branches to __main in the C library (which eventually
  16. ;* calls main()).
  17. ;* After Reset the CortexM4 processor is in Thread mode,
  18. ;* priority is Privileged, and the Stack is set to Main.
  19. ;* <<< Use Configuration Wizard in Context Menu >>>
  20. ;*******************************************************************************
  21. ;
  22. ; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  23. ; You may not use this file except in compliance with the License.
  24. ; You may obtain a copy of the License at:
  25. ;
  26. ; http://www.st.com/software_license_agreement_liberty_v2
  27. ;
  28. ; Unless required by applicable law or agreed to in writing, software
  29. ; distributed under the License is distributed on an "AS IS" BASIS,
  30. ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  31. ; See the License for the specific language governing permissions and
  32. ; limitations under the License.
  33. ;
  34. ;*******************************************************************************
  35. ; Amount of memory (in bytes) allocated for Stack
  36. ; Tailor this value to your application needs
  37. ; <h> Stack Configuration
  38. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  39. ; </h>
  40. Stack_Size EQU 0x00000400
  41. AREA STACK, NOINIT, READWRITE, ALIGN=3
  42. Stack_Mem SPACE Stack_Size
  43. __initial_sp
  44. ; <h> Heap Configuration
  45. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  46. ; </h>
  47. Heap_Size EQU 0x00000200
  48. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  49. __heap_base
  50. Heap_Mem SPACE Heap_Size
  51. __heap_limit
  52. PRESERVE8
  53. THUMB
  54. ; Vector Table Mapped to Address 0 at Reset
  55. AREA RESET, DATA, READONLY
  56. EXPORT __Vectors
  57. EXPORT __Vectors_End
  58. EXPORT __Vectors_Size
  59. __Vectors DCD __initial_sp ; Top of Stack
  60. DCD Reset_Handler ; Reset Handler
  61. DCD NMI_Handler ; NMI Handler
  62. DCD HardFault_Handler ; Hard Fault Handler
  63. DCD MemManage_Handler ; MPU Fault Handler
  64. DCD BusFault_Handler ; Bus Fault Handler
  65. DCD UsageFault_Handler ; Usage Fault Handler
  66. DCD 0 ; Reserved
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD 0 ; Reserved
  70. DCD SVC_Handler ; SVCall Handler
  71. DCD DebugMon_Handler ; Debug Monitor Handler
  72. DCD 0 ; Reserved
  73. DCD PendSV_Handler ; PendSV Handler
  74. DCD SysTick_Handler ; SysTick Handler
  75. ; External Interrupts
  76. DCD WWDG_IRQHandler ; Window WatchDog
  77. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  78. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  79. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  80. DCD FLASH_IRQHandler ; FLASH
  81. DCD RCC_IRQHandler ; RCC
  82. DCD EXTI0_IRQHandler ; EXTI Line0
  83. DCD EXTI1_IRQHandler ; EXTI Line1
  84. DCD EXTI2_IRQHandler ; EXTI Line2
  85. DCD EXTI3_IRQHandler ; EXTI Line3
  86. DCD EXTI4_IRQHandler ; EXTI Line4
  87. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  88. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  89. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  90. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  91. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  92. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  93. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  94. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  95. DCD CAN1_TX_IRQHandler ; CAN1 TX
  96. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  97. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  98. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  99. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  100. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  101. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  102. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  103. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  104. DCD TIM2_IRQHandler ; TIM2
  105. DCD TIM3_IRQHandler ; TIM3
  106. DCD TIM4_IRQHandler ; TIM4
  107. DCD I2C1_EV_IRQHandler ; I2C1 Event
  108. DCD I2C1_ER_IRQHandler ; I2C1 Error
  109. DCD I2C2_EV_IRQHandler ; I2C2 Event
  110. DCD I2C2_ER_IRQHandler ; I2C2 Error
  111. DCD SPI1_IRQHandler ; SPI1
  112. DCD SPI2_IRQHandler ; SPI2
  113. DCD USART1_IRQHandler ; USART1
  114. DCD USART2_IRQHandler ; USART2
  115. DCD USART3_IRQHandler ; USART3
  116. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  117. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  118. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  119. DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
  120. DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
  121. DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
  122. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
  123. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  124. DCD FSMC_IRQHandler ; FSMC
  125. DCD SDIO_IRQHandler ; SDIO
  126. DCD TIM5_IRQHandler ; TIM5
  127. DCD SPI3_IRQHandler ; SPI3
  128. DCD UART4_IRQHandler ; UART4
  129. DCD UART5_IRQHandler ; UART5
  130. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
  131. DCD TIM7_IRQHandler ; TIM7
  132. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  133. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  134. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  135. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  136. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  137. DCD ETH_IRQHandler ; Ethernet
  138. DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
  139. DCD CAN2_TX_IRQHandler ; CAN2 TX
  140. DCD CAN2_RX0_IRQHandler ; CAN2 RX0
  141. DCD CAN2_RX1_IRQHandler ; CAN2 RX1
  142. DCD CAN2_SCE_IRQHandler ; CAN2 SCE
  143. DCD OTG_FS_IRQHandler ; USB OTG FS
  144. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  145. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  146. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  147. DCD USART6_IRQHandler ; USART6
  148. DCD I2C3_EV_IRQHandler ; I2C3 event
  149. DCD I2C3_ER_IRQHandler ; I2C3 error
  150. DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
  151. DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
  152. DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
  153. DCD OTG_HS_IRQHandler ; USB OTG HS
  154. DCD DCMI_IRQHandler ; DCMI
  155. DCD CRYP_IRQHandler ; CRYP crypto
  156. DCD HASH_RNG_IRQHandler ; Hash and Rng
  157. DCD FPU_IRQHandler ; FPU
  158. __Vectors_End
  159. __Vectors_Size EQU __Vectors_End - __Vectors
  160. AREA |.text|, CODE, READONLY
  161. ; Reset handler
  162. Reset_Handler PROC
  163. EXPORT Reset_Handler [WEAK]
  164. IMPORT SystemInit
  165. IMPORT __main
  166. LDR R0, =SystemInit
  167. BLX R0
  168. LDR R0, =__main
  169. BX R0
  170. ENDP
  171. ; Dummy Exception Handlers (infinite loops which can be modified)
  172. NMI_Handler PROC
  173. EXPORT NMI_Handler [WEAK]
  174. B .
  175. ENDP
  176. HardFault_Handler\
  177. PROC
  178. EXPORT HardFault_Handler [WEAK]
  179. B .
  180. ENDP
  181. MemManage_Handler\
  182. PROC
  183. EXPORT MemManage_Handler [WEAK]
  184. B .
  185. ENDP
  186. BusFault_Handler\
  187. PROC
  188. EXPORT BusFault_Handler [WEAK]
  189. B .
  190. ENDP
  191. UsageFault_Handler\
  192. PROC
  193. EXPORT UsageFault_Handler [WEAK]
  194. B .
  195. ENDP
  196. SVC_Handler PROC
  197. EXPORT SVC_Handler [WEAK]
  198. B .
  199. ENDP
  200. DebugMon_Handler\
  201. PROC
  202. EXPORT DebugMon_Handler [WEAK]
  203. B .
  204. ENDP
  205. PendSV_Handler PROC
  206. EXPORT PendSV_Handler [WEAK]
  207. B .
  208. ENDP
  209. SysTick_Handler PROC
  210. EXPORT SysTick_Handler [WEAK]
  211. B .
  212. ENDP
  213. Default_Handler PROC
  214. EXPORT WWDG_IRQHandler [WEAK]
  215. EXPORT PVD_IRQHandler [WEAK]
  216. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  217. EXPORT RTC_WKUP_IRQHandler [WEAK]
  218. EXPORT FLASH_IRQHandler [WEAK]
  219. EXPORT RCC_IRQHandler [WEAK]
  220. EXPORT EXTI0_IRQHandler [WEAK]
  221. EXPORT EXTI1_IRQHandler [WEAK]
  222. EXPORT EXTI2_IRQHandler [WEAK]
  223. EXPORT EXTI3_IRQHandler [WEAK]
  224. EXPORT EXTI4_IRQHandler [WEAK]
  225. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  226. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  227. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  228. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  229. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  230. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  231. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  232. EXPORT ADC_IRQHandler [WEAK]
  233. EXPORT CAN1_TX_IRQHandler [WEAK]
  234. EXPORT CAN1_RX0_IRQHandler [WEAK]
  235. EXPORT CAN1_RX1_IRQHandler [WEAK]
  236. EXPORT CAN1_SCE_IRQHandler [WEAK]
  237. EXPORT EXTI9_5_IRQHandler [WEAK]
  238. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  239. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  240. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  241. EXPORT TIM1_CC_IRQHandler [WEAK]
  242. EXPORT TIM2_IRQHandler [WEAK]
  243. EXPORT TIM3_IRQHandler [WEAK]
  244. EXPORT TIM4_IRQHandler [WEAK]
  245. EXPORT I2C1_EV_IRQHandler [WEAK]
  246. EXPORT I2C1_ER_IRQHandler [WEAK]
  247. EXPORT I2C2_EV_IRQHandler [WEAK]
  248. EXPORT I2C2_ER_IRQHandler [WEAK]
  249. EXPORT SPI1_IRQHandler [WEAK]
  250. EXPORT SPI2_IRQHandler [WEAK]
  251. EXPORT USART1_IRQHandler [WEAK]
  252. EXPORT USART2_IRQHandler [WEAK]
  253. EXPORT USART3_IRQHandler [WEAK]
  254. EXPORT EXTI15_10_IRQHandler [WEAK]
  255. EXPORT RTC_Alarm_IRQHandler [WEAK]
  256. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  257. EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
  258. EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
  259. EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
  260. EXPORT TIM8_CC_IRQHandler [WEAK]
  261. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  262. EXPORT FSMC_IRQHandler [WEAK]
  263. EXPORT SDIO_IRQHandler [WEAK]
  264. EXPORT TIM5_IRQHandler [WEAK]
  265. EXPORT SPI3_IRQHandler [WEAK]
  266. EXPORT UART4_IRQHandler [WEAK]
  267. EXPORT UART5_IRQHandler [WEAK]
  268. EXPORT TIM6_DAC_IRQHandler [WEAK]
  269. EXPORT TIM7_IRQHandler [WEAK]
  270. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  271. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  272. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  273. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  274. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  275. EXPORT ETH_IRQHandler [WEAK]
  276. EXPORT ETH_WKUP_IRQHandler [WEAK]
  277. EXPORT CAN2_TX_IRQHandler [WEAK]
  278. EXPORT CAN2_RX0_IRQHandler [WEAK]
  279. EXPORT CAN2_RX1_IRQHandler [WEAK]
  280. EXPORT CAN2_SCE_IRQHandler [WEAK]
  281. EXPORT OTG_FS_IRQHandler [WEAK]
  282. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  283. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  284. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  285. EXPORT USART6_IRQHandler [WEAK]
  286. EXPORT I2C3_EV_IRQHandler [WEAK]
  287. EXPORT I2C3_ER_IRQHandler [WEAK]
  288. EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
  289. EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
  290. EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
  291. EXPORT OTG_HS_IRQHandler [WEAK]
  292. EXPORT DCMI_IRQHandler [WEAK]
  293. EXPORT CRYP_IRQHandler [WEAK]
  294. EXPORT HASH_RNG_IRQHandler [WEAK]
  295. EXPORT FPU_IRQHandler [WEAK]
  296. WWDG_IRQHandler
  297. PVD_IRQHandler
  298. TAMP_STAMP_IRQHandler
  299. RTC_WKUP_IRQHandler
  300. FLASH_IRQHandler
  301. RCC_IRQHandler
  302. EXTI0_IRQHandler
  303. EXTI1_IRQHandler
  304. EXTI2_IRQHandler
  305. EXTI3_IRQHandler
  306. EXTI4_IRQHandler
  307. DMA1_Stream0_IRQHandler
  308. DMA1_Stream1_IRQHandler
  309. DMA1_Stream2_IRQHandler
  310. DMA1_Stream3_IRQHandler
  311. DMA1_Stream4_IRQHandler
  312. DMA1_Stream5_IRQHandler
  313. DMA1_Stream6_IRQHandler
  314. ADC_IRQHandler
  315. CAN1_TX_IRQHandler
  316. CAN1_RX0_IRQHandler
  317. CAN1_RX1_IRQHandler
  318. CAN1_SCE_IRQHandler
  319. EXTI9_5_IRQHandler
  320. TIM1_BRK_TIM9_IRQHandler
  321. TIM1_UP_TIM10_IRQHandler
  322. TIM1_TRG_COM_TIM11_IRQHandler
  323. TIM1_CC_IRQHandler
  324. TIM2_IRQHandler
  325. TIM3_IRQHandler
  326. TIM4_IRQHandler
  327. I2C1_EV_IRQHandler
  328. I2C1_ER_IRQHandler
  329. I2C2_EV_IRQHandler
  330. I2C2_ER_IRQHandler
  331. SPI1_IRQHandler
  332. SPI2_IRQHandler
  333. USART1_IRQHandler
  334. USART2_IRQHandler
  335. USART3_IRQHandler
  336. EXTI15_10_IRQHandler
  337. RTC_Alarm_IRQHandler
  338. OTG_FS_WKUP_IRQHandler
  339. TIM8_BRK_TIM12_IRQHandler
  340. TIM8_UP_TIM13_IRQHandler
  341. TIM8_TRG_COM_TIM14_IRQHandler
  342. TIM8_CC_IRQHandler
  343. DMA1_Stream7_IRQHandler
  344. FSMC_IRQHandler
  345. SDIO_IRQHandler
  346. TIM5_IRQHandler
  347. SPI3_IRQHandler
  348. UART4_IRQHandler
  349. UART5_IRQHandler
  350. TIM6_DAC_IRQHandler
  351. TIM7_IRQHandler
  352. DMA2_Stream0_IRQHandler
  353. DMA2_Stream1_IRQHandler
  354. DMA2_Stream2_IRQHandler
  355. DMA2_Stream3_IRQHandler
  356. DMA2_Stream4_IRQHandler
  357. ETH_IRQHandler
  358. ETH_WKUP_IRQHandler
  359. CAN2_TX_IRQHandler
  360. CAN2_RX0_IRQHandler
  361. CAN2_RX1_IRQHandler
  362. CAN2_SCE_IRQHandler
  363. OTG_FS_IRQHandler
  364. DMA2_Stream5_IRQHandler
  365. DMA2_Stream6_IRQHandler
  366. DMA2_Stream7_IRQHandler
  367. USART6_IRQHandler
  368. I2C3_EV_IRQHandler
  369. I2C3_ER_IRQHandler
  370. OTG_HS_EP1_OUT_IRQHandler
  371. OTG_HS_EP1_IN_IRQHandler
  372. OTG_HS_WKUP_IRQHandler
  373. OTG_HS_IRQHandler
  374. DCMI_IRQHandler
  375. CRYP_IRQHandler
  376. HASH_RNG_IRQHandler
  377. FPU_IRQHandler
  378. B .
  379. ENDP
  380. ALIGN
  381. ;*******************************************************************************
  382. ; User Stack and Heap initialization
  383. ;*******************************************************************************
  384. IF :DEF:__MICROLIB
  385. EXPORT __initial_sp
  386. EXPORT __heap_base
  387. EXPORT __heap_limit
  388. ELSE
  389. IMPORT __use_two_region_memory
  390. EXPORT __user_initial_stackheap
  391. __user_initial_stackheap
  392. LDR R0, = Heap_Mem
  393. LDR R1, =(Stack_Mem + Stack_Size)
  394. LDR R2, = (Heap_Mem + Heap_Size)
  395. LDR R3, = Stack_Mem
  396. BX LR
  397. ALIGN
  398. ENDIF
  399. END
  400. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****