startup_stm32f401xx.s 25 KB

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  1. ;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f401xx.s
  3. ;* Author : MCD Application Team
  4. ;* @version : V1.5.0
  5. ;* @date : 06-March-2015
  6. ;* Description : STM32F401xx devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* - Configure the system clock
  12. ;* - Branches to __main in the C library (which eventually
  13. ;* calls main()).
  14. ;* After Reset the CortexM4 processor is in Thread mode,
  15. ;* priority is Privileged, and the Stack is set to Main.
  16. ;* <<< Use Configuration Wizard in Context Menu >>>
  17. ;*******************************************************************************
  18. ;
  19. ; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  20. ; You may not use this file except in compliance with the License.
  21. ; You may obtain a copy of the License at:
  22. ;
  23. ; http://www.st.com/software_license_agreement_liberty_v2
  24. ;
  25. ; Unless required by applicable law or agreed to in writing, software
  26. ; distributed under the License is distributed on an "AS IS" BASIS,
  27. ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  28. ; See the License for the specific language governing permissions and
  29. ; limitations under the License.
  30. ;
  31. ;*******************************************************************************
  32. ; Amount of memory (in bytes) allocated for Stack
  33. ; Tailor this value to your application needs
  34. ; <h> Stack Configuration
  35. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  36. ; </h>
  37. Stack_Size EQU 0x00000400
  38. AREA STACK, NOINIT, READWRITE, ALIGN=3
  39. Stack_Mem SPACE Stack_Size
  40. __initial_sp
  41. ; <h> Heap Configuration
  42. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  43. ; </h>
  44. Heap_Size EQU 0x00000200
  45. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  46. __heap_base
  47. Heap_Mem SPACE Heap_Size
  48. __heap_limit
  49. PRESERVE8
  50. THUMB
  51. ; Vector Table Mapped to Address 0 at Reset
  52. AREA RESET, DATA, READONLY
  53. EXPORT __Vectors
  54. EXPORT __Vectors_End
  55. EXPORT __Vectors_Size
  56. __Vectors DCD __initial_sp ; Top of Stack
  57. DCD Reset_Handler ; Reset Handler
  58. DCD NMI_Handler ; NMI Handler
  59. DCD HardFault_Handler ; Hard Fault Handler
  60. DCD MemManage_Handler ; MPU Fault Handler
  61. DCD BusFault_Handler ; Bus Fault Handler
  62. DCD UsageFault_Handler ; Usage Fault Handler
  63. DCD 0 ; Reserved
  64. DCD 0 ; Reserved
  65. DCD 0 ; Reserved
  66. DCD 0 ; Reserved
  67. DCD SVC_Handler ; SVCall Handler
  68. DCD DebugMon_Handler ; Debug Monitor Handler
  69. DCD 0 ; Reserved
  70. DCD PendSV_Handler ; PendSV Handler
  71. DCD SysTick_Handler ; SysTick Handler
  72. ; External Interrupts
  73. DCD WWDG_IRQHandler ; Window WatchDog
  74. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  75. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  76. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  77. DCD FLASH_IRQHandler ; FLASH
  78. DCD RCC_IRQHandler ; RCC
  79. DCD EXTI0_IRQHandler ; EXTI Line0
  80. DCD EXTI1_IRQHandler ; EXTI Line1
  81. DCD EXTI2_IRQHandler ; EXTI Line2
  82. DCD EXTI3_IRQHandler ; EXTI Line3
  83. DCD EXTI4_IRQHandler ; EXTI Line4
  84. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  85. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  86. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  87. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  88. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  89. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  90. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  91. DCD ADC_IRQHandler ; ADC1
  92. DCD 0 ; Reserved
  93. DCD 0 ; Reserved
  94. DCD 0 ; Reserved
  95. DCD 0 ; Reserved
  96. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  97. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  98. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  99. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  100. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  101. DCD TIM2_IRQHandler ; TIM2
  102. DCD TIM3_IRQHandler ; TIM3
  103. DCD TIM4_IRQHandler ; TIM4
  104. DCD I2C1_EV_IRQHandler ; I2C1 Event
  105. DCD I2C1_ER_IRQHandler ; I2C1 Error
  106. DCD I2C2_EV_IRQHandler ; I2C2 Event
  107. DCD I2C2_ER_IRQHandler ; I2C2 Error
  108. DCD SPI1_IRQHandler ; SPI1
  109. DCD SPI2_IRQHandler ; SPI2
  110. DCD USART1_IRQHandler ; USART1
  111. DCD USART2_IRQHandler ; USART2
  112. DCD 0 ; Reserved
  113. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  114. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  115. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  116. DCD 0 ; Reserved
  117. DCD 0 ; Reserved
  118. DCD 0 ; Reserved
  119. DCD 0 ; Reserved
  120. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  121. DCD 0 ; Reserved
  122. DCD SDIO_IRQHandler ; SDIO
  123. DCD TIM5_IRQHandler ; TIM5
  124. DCD SPI3_IRQHandler ; SPI3
  125. DCD 0 ; Reserved
  126. DCD 0 ; Reserved
  127. DCD 0 ; Reserved
  128. DCD 0 ; Reserved
  129. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  130. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  131. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  132. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  133. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  134. DCD 0 ; Reserved
  135. DCD 0 ; Reserved
  136. DCD 0 ; Reserved
  137. DCD 0 ; Reserved
  138. DCD 0 ; Reserved
  139. DCD 0 ; Reserved
  140. DCD OTG_FS_IRQHandler ; USB OTG FS
  141. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  142. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  143. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  144. DCD USART6_IRQHandler ; USART6
  145. DCD I2C3_EV_IRQHandler ; I2C3 event
  146. DCD I2C3_ER_IRQHandler ; I2C3 error
  147. DCD 0 ; Reserved
  148. DCD 0 ; Reserved
  149. DCD 0 ; Reserved
  150. DCD 0 ; Reserved
  151. DCD 0 ; Reserved
  152. DCD 0 ; Reserved
  153. DCD 0 ; Reserved
  154. DCD FPU_IRQHandler ; FPU
  155. DCD 0 ; Reserved
  156. DCD 0 ; Reserved
  157. DCD SPI4_IRQHandler ; SPI4
  158. __Vectors_End
  159. __Vectors_Size EQU __Vectors_End - __Vectors
  160. AREA |.text|, CODE, READONLY
  161. ; Reset handler
  162. Reset_Handler PROC
  163. EXPORT Reset_Handler [WEAK]
  164. IMPORT SystemInit
  165. IMPORT __main
  166. LDR R0, =SystemInit
  167. BLX R0
  168. LDR R0, =__main
  169. BX R0
  170. ENDP
  171. ; Dummy Exception Handlers (infinite loops which can be modified)
  172. NMI_Handler PROC
  173. EXPORT NMI_Handler [WEAK]
  174. B .
  175. ENDP
  176. HardFault_Handler\
  177. PROC
  178. EXPORT HardFault_Handler [WEAK]
  179. B .
  180. ENDP
  181. MemManage_Handler\
  182. PROC
  183. EXPORT MemManage_Handler [WEAK]
  184. B .
  185. ENDP
  186. BusFault_Handler\
  187. PROC
  188. EXPORT BusFault_Handler [WEAK]
  189. B .
  190. ENDP
  191. UsageFault_Handler\
  192. PROC
  193. EXPORT UsageFault_Handler [WEAK]
  194. B .
  195. ENDP
  196. SVC_Handler PROC
  197. EXPORT SVC_Handler [WEAK]
  198. B .
  199. ENDP
  200. DebugMon_Handler\
  201. PROC
  202. EXPORT DebugMon_Handler [WEAK]
  203. B .
  204. ENDP
  205. PendSV_Handler PROC
  206. EXPORT PendSV_Handler [WEAK]
  207. B .
  208. ENDP
  209. SysTick_Handler PROC
  210. EXPORT SysTick_Handler [WEAK]
  211. B .
  212. ENDP
  213. Default_Handler PROC
  214. EXPORT WWDG_IRQHandler [WEAK]
  215. EXPORT PVD_IRQHandler [WEAK]
  216. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  217. EXPORT RTC_WKUP_IRQHandler [WEAK]
  218. EXPORT FLASH_IRQHandler [WEAK]
  219. EXPORT RCC_IRQHandler [WEAK]
  220. EXPORT EXTI0_IRQHandler [WEAK]
  221. EXPORT EXTI1_IRQHandler [WEAK]
  222. EXPORT EXTI2_IRQHandler [WEAK]
  223. EXPORT EXTI3_IRQHandler [WEAK]
  224. EXPORT EXTI4_IRQHandler [WEAK]
  225. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  226. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  227. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  228. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  229. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  230. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  231. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  232. EXPORT ADC_IRQHandler [WEAK]
  233. EXPORT EXTI9_5_IRQHandler [WEAK]
  234. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  235. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  236. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  237. EXPORT TIM1_CC_IRQHandler [WEAK]
  238. EXPORT TIM2_IRQHandler [WEAK]
  239. EXPORT TIM3_IRQHandler [WEAK]
  240. EXPORT TIM4_IRQHandler [WEAK]
  241. EXPORT I2C1_EV_IRQHandler [WEAK]
  242. EXPORT I2C1_ER_IRQHandler [WEAK]
  243. EXPORT I2C2_EV_IRQHandler [WEAK]
  244. EXPORT I2C2_ER_IRQHandler [WEAK]
  245. EXPORT SPI1_IRQHandler [WEAK]
  246. EXPORT SPI2_IRQHandler [WEAK]
  247. EXPORT USART1_IRQHandler [WEAK]
  248. EXPORT USART2_IRQHandler [WEAK]
  249. EXPORT EXTI15_10_IRQHandler [WEAK]
  250. EXPORT RTC_Alarm_IRQHandler [WEAK]
  251. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  252. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  253. EXPORT SDIO_IRQHandler [WEAK]
  254. EXPORT TIM5_IRQHandler [WEAK]
  255. EXPORT SPI3_IRQHandler [WEAK]
  256. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  257. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  258. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  259. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  260. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  261. EXPORT OTG_FS_IRQHandler [WEAK]
  262. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  263. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  264. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  265. EXPORT USART6_IRQHandler [WEAK]
  266. EXPORT I2C3_EV_IRQHandler [WEAK]
  267. EXPORT I2C3_ER_IRQHandler [WEAK]
  268. EXPORT FPU_IRQHandler [WEAK]
  269. EXPORT SPI4_IRQHandler [WEAK]
  270. WWDG_IRQHandler
  271. PVD_IRQHandler
  272. TAMP_STAMP_IRQHandler
  273. RTC_WKUP_IRQHandler
  274. FLASH_IRQHandler
  275. RCC_IRQHandler
  276. EXTI0_IRQHandler
  277. EXTI1_IRQHandler
  278. EXTI2_IRQHandler
  279. EXTI3_IRQHandler
  280. EXTI4_IRQHandler
  281. DMA1_Stream0_IRQHandler
  282. DMA1_Stream1_IRQHandler
  283. DMA1_Stream2_IRQHandler
  284. DMA1_Stream3_IRQHandler
  285. DMA1_Stream4_IRQHandler
  286. DMA1_Stream5_IRQHandler
  287. DMA1_Stream6_IRQHandler
  288. ADC_IRQHandler
  289. EXTI9_5_IRQHandler
  290. TIM1_BRK_TIM9_IRQHandler
  291. TIM1_UP_TIM10_IRQHandler
  292. TIM1_TRG_COM_TIM11_IRQHandler
  293. TIM1_CC_IRQHandler
  294. TIM2_IRQHandler
  295. TIM3_IRQHandler
  296. TIM4_IRQHandler
  297. I2C1_EV_IRQHandler
  298. I2C1_ER_IRQHandler
  299. I2C2_EV_IRQHandler
  300. I2C2_ER_IRQHandler
  301. SPI1_IRQHandler
  302. SPI2_IRQHandler
  303. USART1_IRQHandler
  304. USART2_IRQHandler
  305. EXTI15_10_IRQHandler
  306. RTC_Alarm_IRQHandler
  307. OTG_FS_WKUP_IRQHandler
  308. DMA1_Stream7_IRQHandler
  309. SDIO_IRQHandler
  310. TIM5_IRQHandler
  311. SPI3_IRQHandler
  312. DMA2_Stream0_IRQHandler
  313. DMA2_Stream1_IRQHandler
  314. DMA2_Stream2_IRQHandler
  315. DMA2_Stream3_IRQHandler
  316. DMA2_Stream4_IRQHandler
  317. ETH_IRQHandler
  318. OTG_FS_IRQHandler
  319. DMA2_Stream5_IRQHandler
  320. DMA2_Stream6_IRQHandler
  321. DMA2_Stream7_IRQHandler
  322. USART6_IRQHandler
  323. I2C3_EV_IRQHandler
  324. I2C3_ER_IRQHandler
  325. FPU_IRQHandler
  326. SPI4_IRQHandler
  327. B .
  328. ENDP
  329. ALIGN
  330. ;*******************************************************************************
  331. ; User Stack and Heap initialization
  332. ;*******************************************************************************
  333. IF :DEF:__MICROLIB
  334. EXPORT __initial_sp
  335. EXPORT __heap_base
  336. EXPORT __heap_limit
  337. ELSE
  338. IMPORT __use_two_region_memory
  339. EXPORT __user_initial_stackheap
  340. __user_initial_stackheap
  341. LDR R0, = Heap_Mem
  342. LDR R1, =(Stack_Mem + Stack_Size)
  343. LDR R2, = (Heap_Mem + Heap_Size)
  344. LDR R3, = Stack_Mem
  345. BX LR
  346. ALIGN
  347. ENDIF
  348. END
  349. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****