arm_power_q7.c 4.8 KB

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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_power_q7.c
  9. *
  10. * Description: Sum of the squares of the elements of a Q7 vector.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupStats
  43. */
  44. /**
  45. * @addtogroup power
  46. * @{
  47. */
  48. /**
  49. * @brief Sum of the squares of the elements of a Q7 vector.
  50. * @param[in] *pSrc points to the input vector
  51. * @param[in] blockSize length of the input vector
  52. * @param[out] *pResult sum of the squares value returned here
  53. * @return none.
  54. *
  55. * @details
  56. * <b>Scaling and Overflow Behavior:</b>
  57. *
  58. * \par
  59. * The function is implemented using a 32-bit internal accumulator.
  60. * The input is represented in 1.7 format.
  61. * Intermediate multiplication yields a 2.14 format, and this
  62. * result is added without saturation to an accumulator in 18.14 format.
  63. * With 17 guard bits in the accumulator, there is no risk of overflow, and the
  64. * full precision of the intermediate multiplication is preserved.
  65. * Finally, the return result is in 18.14 format.
  66. *
  67. */
  68. void arm_power_q7(
  69. q7_t * pSrc,
  70. uint32_t blockSize,
  71. q31_t * pResult)
  72. {
  73. q31_t sum = 0; /* Temporary result storage */
  74. q7_t in; /* Temporary variable to store input */
  75. uint32_t blkCnt; /* loop counter */
  76. #ifndef ARM_MATH_CM0_FAMILY
  77. /* Run the below code for Cortex-M4 and Cortex-M3 */
  78. q31_t input1; /* Temporary variable to store packed input */
  79. q31_t in1, in2; /* Temporary variables to store input */
  80. /*loop Unrolling */
  81. blkCnt = blockSize >> 2u;
  82. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  83. ** a second loop below computes the remaining 1 to 3 samples. */
  84. while(blkCnt > 0u)
  85. {
  86. /* Reading two inputs of pSrc vector and packing */
  87. input1 = *__SIMD32(pSrc)++;
  88. in1 = __SXTB16(__ROR(input1, 8));
  89. in2 = __SXTB16(input1);
  90. /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
  91. /* calculate power and accumulate to accumulator */
  92. sum = __SMLAD(in1, in1, sum);
  93. sum = __SMLAD(in2, in2, sum);
  94. /* Decrement the loop counter */
  95. blkCnt--;
  96. }
  97. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  98. ** No loop unrolling is used. */
  99. blkCnt = blockSize % 0x4u;
  100. #else
  101. /* Run the below code for Cortex-M0 */
  102. /* Loop over blockSize number of values */
  103. blkCnt = blockSize;
  104. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  105. while(blkCnt > 0u)
  106. {
  107. /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
  108. /* Compute Power and then store the result in a temporary variable, sum. */
  109. in = *pSrc++;
  110. sum += ((q15_t) in * in);
  111. /* Decrement the loop counter */
  112. blkCnt--;
  113. }
  114. /* Store the result in 18.14 format */
  115. *pResult = sum;
  116. }
  117. /**
  118. * @} end of power group
  119. */