arm_shift_q7.c 6.9 KB

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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_shift_q7.c
  9. *
  10. * Description: Processing function for the Q7 Shifting
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup shift
  46. * @{
  47. */
  48. /**
  49. * @brief Shifts the elements of a Q7 vector a specified number of bits.
  50. * @param[in] *pSrc points to the input vector
  51. * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
  52. * @param[out] *pDst points to the output vector
  53. * @param[in] blockSize number of samples in the vector
  54. * @return none.
  55. *
  56. * \par Conditions for optimum performance
  57. * Input and output buffers should be aligned by 32-bit
  58. *
  59. *
  60. * <b>Scaling and Overflow Behavior:</b>
  61. * \par
  62. * The function uses saturating arithmetic.
  63. * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
  64. */
  65. void arm_shift_q7(
  66. q7_t * pSrc,
  67. int8_t shiftBits,
  68. q7_t * pDst,
  69. uint32_t blockSize)
  70. {
  71. uint32_t blkCnt; /* loop counter */
  72. uint8_t sign; /* Sign of shiftBits */
  73. #ifndef ARM_MATH_CM0_FAMILY
  74. /* Run the below code for Cortex-M4 and Cortex-M3 */
  75. q7_t in1; /* Input value1 */
  76. q7_t in2; /* Input value2 */
  77. q7_t in3; /* Input value3 */
  78. q7_t in4; /* Input value4 */
  79. /*loop Unrolling */
  80. blkCnt = blockSize >> 2u;
  81. /* Getting the sign of shiftBits */
  82. sign = (shiftBits & 0x80);
  83. /* If the shift value is positive then do right shift else left shift */
  84. if(sign == 0u)
  85. {
  86. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  87. ** a second loop below computes the remaining 1 to 3 samples. */
  88. while(blkCnt > 0u)
  89. {
  90. /* C = A << shiftBits */
  91. /* Read 4 inputs */
  92. in1 = *pSrc;
  93. in2 = *(pSrc + 1);
  94. in3 = *(pSrc + 2);
  95. in4 = *(pSrc + 3);
  96. /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
  97. *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
  98. __SSAT((in2 << shiftBits), 8),
  99. __SSAT((in3 << shiftBits), 8),
  100. __SSAT((in4 << shiftBits), 8));
  101. /* Update source pointer to process next sampels */
  102. pSrc += 4u;
  103. /* Decrement the loop counter */
  104. blkCnt--;
  105. }
  106. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  107. ** No loop unrolling is used. */
  108. blkCnt = blockSize % 0x4u;
  109. while(blkCnt > 0u)
  110. {
  111. /* C = A << shiftBits */
  112. /* Shift the input and then store the result in the destination buffer. */
  113. *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
  114. /* Decrement the loop counter */
  115. blkCnt--;
  116. }
  117. }
  118. else
  119. {
  120. shiftBits = -shiftBits;
  121. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  122. ** a second loop below computes the remaining 1 to 3 samples. */
  123. while(blkCnt > 0u)
  124. {
  125. /* C = A >> shiftBits */
  126. /* Read 4 inputs */
  127. in1 = *pSrc;
  128. in2 = *(pSrc + 1);
  129. in3 = *(pSrc + 2);
  130. in4 = *(pSrc + 3);
  131. /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
  132. *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
  133. (in3 >> shiftBits), (in4 >> shiftBits));
  134. pSrc += 4u;
  135. /* Decrement the loop counter */
  136. blkCnt--;
  137. }
  138. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  139. ** No loop unrolling is used. */
  140. blkCnt = blockSize % 0x4u;
  141. while(blkCnt > 0u)
  142. {
  143. /* C = A >> shiftBits */
  144. /* Shift the input and then store the result in the destination buffer. */
  145. in1 = *pSrc++;
  146. *pDst++ = (in1 >> shiftBits);
  147. /* Decrement the loop counter */
  148. blkCnt--;
  149. }
  150. }
  151. #else
  152. /* Run the below code for Cortex-M0 */
  153. /* Getting the sign of shiftBits */
  154. sign = (shiftBits & 0x80);
  155. /* If the shift value is positive then do right shift else left shift */
  156. if(sign == 0u)
  157. {
  158. /* Initialize blkCnt with number of samples */
  159. blkCnt = blockSize;
  160. while(blkCnt > 0u)
  161. {
  162. /* C = A << shiftBits */
  163. /* Shift the input and then store the result in the destination buffer. */
  164. *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
  165. /* Decrement the loop counter */
  166. blkCnt--;
  167. }
  168. }
  169. else
  170. {
  171. /* Initialize blkCnt with number of samples */
  172. blkCnt = blockSize;
  173. while(blkCnt > 0u)
  174. {
  175. /* C = A >> shiftBits */
  176. /* Shift the input and then store the result in the destination buffer. */
  177. *pDst++ = (*pSrc++ >> -shiftBits);
  178. /* Decrement the loop counter */
  179. blkCnt--;
  180. }
  181. }
  182. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  183. }
  184. /**
  185. * @} end of shift group
  186. */