arm_negate_q31.c 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129
  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_negate_q31.c
  9. *
  10. * Description: Negates Q31 vectors.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup negate
  46. * @{
  47. */
  48. /**
  49. * @brief Negates the elements of a Q31 vector.
  50. * @param[in] *pSrc points to the input vector
  51. * @param[out] *pDst points to the output vector
  52. * @param[in] blockSize number of samples in the vector
  53. * @return none.
  54. *
  55. * <b>Scaling and Overflow Behavior:</b>
  56. * \par
  57. * The function uses saturating arithmetic.
  58. * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
  59. */
  60. void arm_negate_q31(
  61. q31_t * pSrc,
  62. q31_t * pDst,
  63. uint32_t blockSize)
  64. {
  65. q31_t in; /* Temporary variable */
  66. uint32_t blkCnt; /* loop counter */
  67. #ifndef ARM_MATH_CM0_FAMILY
  68. /* Run the below code for Cortex-M4 and Cortex-M3 */
  69. q31_t in1, in2, in3, in4;
  70. /*loop Unrolling */
  71. blkCnt = blockSize >> 2u;
  72. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  73. ** a second loop below computes the remaining 1 to 3 samples. */
  74. while(blkCnt > 0u)
  75. {
  76. /* C = -A */
  77. /* Negate and then store the results in the destination buffer. */
  78. in1 = *pSrc++;
  79. in2 = *pSrc++;
  80. in3 = *pSrc++;
  81. in4 = *pSrc++;
  82. *pDst++ = __QSUB(0, in1);
  83. *pDst++ = __QSUB(0, in2);
  84. *pDst++ = __QSUB(0, in3);
  85. *pDst++ = __QSUB(0, in4);
  86. /* Decrement the loop counter */
  87. blkCnt--;
  88. }
  89. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  90. ** No loop unrolling is used. */
  91. blkCnt = blockSize % 0x4u;
  92. #else
  93. /* Run the below code for Cortex-M0 */
  94. /* Initialize blkCnt with number of samples */
  95. blkCnt = blockSize;
  96. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  97. while(blkCnt > 0u)
  98. {
  99. /* C = -A */
  100. /* Negate and then store the result in the destination buffer. */
  101. in = *pSrc++;
  102. *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
  103. /* Decrement the loop counter */
  104. blkCnt--;
  105. }
  106. }
  107. /**
  108. * @} end of negate group
  109. */