arm_dot_prod_q7.c 5.1 KB

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  1. /* ----------------------------------------------------------------------
  2. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
  3. *
  4. * $Date: 12. March 2014
  5. * $Revision: V1.4.4
  6. *
  7. * Project: CMSIS DSP Library
  8. * Title: arm_dot_prod_q7.c
  9. *
  10. * Description: Q7 dot product.
  11. *
  12. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13. *
  14. * Redistribution and use in source and binary forms, with or without
  15. * modification, are permitted provided that the following conditions
  16. * are met:
  17. * - Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * - Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. * - Neither the name of ARM LIMITED nor the names of its contributors
  24. * may be used to endorse or promote products derived from this
  25. * software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. * -------------------------------------------------------------------- */
  40. #include "arm_math.h"
  41. /**
  42. * @ingroup groupMath
  43. */
  44. /**
  45. * @addtogroup dot_prod
  46. * @{
  47. */
  48. /**
  49. * @brief Dot product of Q7 vectors.
  50. * @param[in] *pSrcA points to the first input vector
  51. * @param[in] *pSrcB points to the second input vector
  52. * @param[in] blockSize number of samples in each vector
  53. * @param[out] *result output result returned here
  54. * @return none.
  55. *
  56. * <b>Scaling and Overflow Behavior:</b>
  57. * \par
  58. * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
  59. * results are added to an accumulator in 18.14 format.
  60. * Nonsaturating additions are used and there is no danger of wrap around as long as
  61. * the vectors are less than 2^18 elements long.
  62. * The return result is in 18.14 format.
  63. */
  64. void arm_dot_prod_q7(
  65. q7_t * pSrcA,
  66. q7_t * pSrcB,
  67. uint32_t blockSize,
  68. q31_t * result)
  69. {
  70. uint32_t blkCnt; /* loop counter */
  71. q31_t sum = 0; /* Temporary variables to store output */
  72. #ifndef ARM_MATH_CM0_FAMILY
  73. /* Run the below code for Cortex-M4 and Cortex-M3 */
  74. q31_t input1, input2; /* Temporary variables to store input */
  75. q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */
  76. /*loop Unrolling */
  77. blkCnt = blockSize >> 2u;
  78. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  79. ** a second loop below computes the remaining 1 to 3 samples. */
  80. while(blkCnt > 0u)
  81. {
  82. /* read 4 samples at a time from sourceA */
  83. input1 = *__SIMD32(pSrcA)++;
  84. /* read 4 samples at a time from sourceB */
  85. input2 = *__SIMD32(pSrcB)++;
  86. /* extract two q7_t samples to q15_t samples */
  87. inA1 = __SXTB16(__ROR(input1, 8));
  88. /* extract reminaing two samples */
  89. inA2 = __SXTB16(input1);
  90. /* extract two q7_t samples to q15_t samples */
  91. inB1 = __SXTB16(__ROR(input2, 8));
  92. /* extract reminaing two samples */
  93. inB2 = __SXTB16(input2);
  94. /* multiply and accumulate two samples at a time */
  95. sum = __SMLAD(inA1, inB1, sum);
  96. sum = __SMLAD(inA2, inB2, sum);
  97. /* Decrement the loop counter */
  98. blkCnt--;
  99. }
  100. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  101. ** No loop unrolling is used. */
  102. blkCnt = blockSize % 0x4u;
  103. while(blkCnt > 0u)
  104. {
  105. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  106. /* Dot product and then store the results in a temporary buffer. */
  107. sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
  108. /* Decrement the loop counter */
  109. blkCnt--;
  110. }
  111. #else
  112. /* Run the below code for Cortex-M0 */
  113. /* Initialize blkCnt with number of samples */
  114. blkCnt = blockSize;
  115. while(blkCnt > 0u)
  116. {
  117. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  118. /* Dot product and then store the results in a temporary buffer. */
  119. sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
  120. /* Decrement the loop counter */
  121. blkCnt--;
  122. }
  123. #endif /* #ifndef ARM_MATH_CM0_FAMILY */
  124. /* Store the result in the destination buffer in 18.14 format */
  125. *result = sum;
  126. }
  127. /**
  128. * @} end of dot_prod group
  129. */