startup_stm32f411xe.s 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454
  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32f411xe.s
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief STM32F411xExx Devices vector table for Atollic TrueSTUDIO toolchain.
  8. * This module performs:
  9. * - Set the initial SP
  10. * - Set the initial PC == Reset_Handler,
  11. * - Set the vector table entries with the exceptions ISR address
  12. * - Branches to main in the C library (which eventually
  13. * calls main()).
  14. * After Reset the Cortex-M4 processor is in Thread mode,
  15. * priority is Privileged, and the Stack is set to Main.
  16. ******************************************************************************
  17. * @attention
  18. *
  19. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  20. *
  21. * Redistribution and use in source and binary forms, with or without modification,
  22. * are permitted provided that the following conditions are met:
  23. * 1. Redistributions of source code must retain the above copyright notice,
  24. * this list of conditions and the following disclaimer.
  25. * 2. Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials provided with the distribution.
  28. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  29. * may be used to endorse or promote products derived from this software
  30. * without specific prior written permission.
  31. *
  32. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  33. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  34. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  36. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  37. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  38. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  39. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  40. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  41. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42. *
  43. ******************************************************************************
  44. */
  45. .syntax unified
  46. .cpu cortex-m4
  47. .fpu softvfp
  48. .thumb
  49. .global g_pfnVectors
  50. .global Default_Handler
  51. /* start address for the initialization values of the .data section.
  52. defined in linker script */
  53. .word _sidata
  54. /* start address for the .data section. defined in linker script */
  55. .word _sdata
  56. /* end address for the .data section. defined in linker script */
  57. .word _edata
  58. /* start address for the .bss section. defined in linker script */
  59. .word _sbss
  60. /* end address for the .bss section. defined in linker script */
  61. .word _ebss
  62. /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  63. /**
  64. * @brief This is the code that gets called when the processor first
  65. * starts execution following a reset event. Only the absolutely
  66. * necessary set is performed, after which the application
  67. * supplied main() routine is called.
  68. * @param None
  69. * @retval : None
  70. */
  71. .section .text.Reset_Handler
  72. .weak Reset_Handler
  73. .type Reset_Handler, %function
  74. Reset_Handler:
  75. ldr sp, =_estack /* set stack pointer */
  76. /* Copy the data segment initializers from flash to SRAM */
  77. movs r1, #0
  78. b LoopCopyDataInit
  79. CopyDataInit:
  80. ldr r3, =_sidata
  81. ldr r3, [r3, r1]
  82. str r3, [r0, r1]
  83. adds r1, r1, #4
  84. LoopCopyDataInit:
  85. ldr r0, =_sdata
  86. ldr r3, =_edata
  87. adds r2, r0, r1
  88. cmp r2, r3
  89. bcc CopyDataInit
  90. ldr r2, =_sbss
  91. b LoopFillZerobss
  92. /* Zero fill the bss segment. */
  93. FillZerobss:
  94. movs r3, #0
  95. str r3, [r2], #4
  96. LoopFillZerobss:
  97. ldr r3, = _ebss
  98. cmp r2, r3
  99. bcc FillZerobss
  100. /* Call the clock system intitialization function.*/
  101. bl SystemInit
  102. /* Call static constructors */
  103. bl __libc_init_array
  104. /* Call the application's entry point.*/
  105. bl main
  106. bx lr
  107. .size Reset_Handler, .-Reset_Handler
  108. /**
  109. * @brief This is the code that gets called when the processor receives an
  110. * unexpected interrupt. This simply enters an infinite loop, preserving
  111. * the system state for examination by a debugger.
  112. * @param None
  113. * @retval None
  114. */
  115. .section .text.Default_Handler,"ax",%progbits
  116. Default_Handler:
  117. Infinite_Loop:
  118. b Infinite_Loop
  119. .size Default_Handler, .-Default_Handler
  120. /******************************************************************************
  121. *
  122. * The minimal vector table for a Cortex M3. Note that the proper constructs
  123. * must be placed on this to ensure that it ends up at physical address
  124. * 0x0000.0000.
  125. *
  126. *******************************************************************************/
  127. .section .isr_vector,"a",%progbits
  128. .type g_pfnVectors, %object
  129. .size g_pfnVectors, .-g_pfnVectors
  130. g_pfnVectors:
  131. .word _estack
  132. .word Reset_Handler
  133. .word NMI_Handler
  134. .word HardFault_Handler
  135. .word MemManage_Handler
  136. .word BusFault_Handler
  137. .word UsageFault_Handler
  138. .word 0
  139. .word 0
  140. .word 0
  141. .word 0
  142. .word SVC_Handler
  143. .word DebugMon_Handler
  144. .word 0
  145. .word PendSV_Handler
  146. .word SysTick_Handler
  147. /* External Interrupts */
  148. .word WWDG_IRQHandler /* Window WatchDog */
  149. .word PVD_IRQHandler /* PVD through EXTI Line detection */
  150. .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  151. .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  152. .word FLASH_IRQHandler /* FLASH */
  153. .word RCC_IRQHandler /* RCC */
  154. .word EXTI0_IRQHandler /* EXTI Line0 */
  155. .word EXTI1_IRQHandler /* EXTI Line1 */
  156. .word EXTI2_IRQHandler /* EXTI Line2 */
  157. .word EXTI3_IRQHandler /* EXTI Line3 */
  158. .word EXTI4_IRQHandler /* EXTI Line4 */
  159. .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  160. .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  161. .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  162. .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  163. .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  164. .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  165. .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  166. .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  167. .word 0 /* Reserved */
  168. .word 0 /* Reserved */
  169. .word 0 /* Reserved */
  170. .word 0 /* Reserved */
  171. .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  172. .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
  173. .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
  174. .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
  175. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  176. .word TIM2_IRQHandler /* TIM2 */
  177. .word TIM3_IRQHandler /* TIM3 */
  178. .word TIM4_IRQHandler /* TIM4 */
  179. .word I2C1_EV_IRQHandler /* I2C1 Event */
  180. .word I2C1_ER_IRQHandler /* I2C1 Error */
  181. .word I2C2_EV_IRQHandler /* I2C2 Event */
  182. .word I2C2_ER_IRQHandler /* I2C2 Error */
  183. .word SPI1_IRQHandler /* SPI1 */
  184. .word SPI2_IRQHandler /* SPI2 */
  185. .word USART1_IRQHandler /* USART1 */
  186. .word USART2_IRQHandler /* USART2 */
  187. .word 0 /* Reserved */
  188. .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  189. .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  190. .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
  191. .word 0 /* Reserved */
  192. .word 0 /* Reserved */
  193. .word 0 /* Reserved */
  194. .word 0 /* Reserved */
  195. .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  196. .word 0 /* Reserved */
  197. .word SDIO_IRQHandler /* SDIO */
  198. .word TIM5_IRQHandler /* TIM5 */
  199. .word SPI3_IRQHandler /* SPI3 */
  200. .word 0 /* Reserved */
  201. .word 0 /* Reserved */
  202. .word 0 /* Reserved */
  203. .word 0 /* Reserved */
  204. .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  205. .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  206. .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  207. .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  208. .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  209. .word 0 /* Reserved */
  210. .word 0 /* Reserved */
  211. .word 0 /* Reserved */
  212. .word 0 /* Reserved */
  213. .word 0 /* Reserved */
  214. .word 0 /* Reserved */
  215. .word OTG_FS_IRQHandler /* USB OTG FS */
  216. .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  217. .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  218. .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  219. .word USART6_IRQHandler /* USART6 */
  220. .word I2C3_EV_IRQHandler /* I2C3 event */
  221. .word I2C3_ER_IRQHandler /* I2C3 error */
  222. .word 0 /* Reserved */
  223. .word 0 /* Reserved */
  224. .word 0 /* Reserved */
  225. .word 0 /* Reserved */
  226. .word 0 /* Reserved */
  227. .word 0 /* Reserved */
  228. .word 0 /* Reserved */
  229. .word FPU_IRQHandler /* FPU */
  230. .word 0 /* Reserved */
  231. .word 0 /* Reserved */
  232. .word SPI4_IRQHandler /* SPI4 */
  233. .word SPI5_IRQHandler /* SPI5 */
  234. /*******************************************************************************
  235. *
  236. * Provide weak aliases for each Exception handler to the Default_Handler.
  237. * As they are weak aliases, any function with the same name will override
  238. * this definition.
  239. *
  240. *******************************************************************************/
  241. .weak NMI_Handler
  242. .thumb_set NMI_Handler,Default_Handler
  243. .weak HardFault_Handler
  244. .thumb_set HardFault_Handler,Default_Handler
  245. .weak MemManage_Handler
  246. .thumb_set MemManage_Handler,Default_Handler
  247. .weak BusFault_Handler
  248. .thumb_set BusFault_Handler,Default_Handler
  249. .weak UsageFault_Handler
  250. .thumb_set UsageFault_Handler,Default_Handler
  251. .weak SVC_Handler
  252. .thumb_set SVC_Handler,Default_Handler
  253. .weak DebugMon_Handler
  254. .thumb_set DebugMon_Handler,Default_Handler
  255. .weak PendSV_Handler
  256. .thumb_set PendSV_Handler,Default_Handler
  257. .weak SysTick_Handler
  258. .thumb_set SysTick_Handler,Default_Handler
  259. .weak WWDG_IRQHandler
  260. .thumb_set WWDG_IRQHandler,Default_Handler
  261. .weak PVD_IRQHandler
  262. .thumb_set PVD_IRQHandler,Default_Handler
  263. .weak TAMP_STAMP_IRQHandler
  264. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  265. .weak RTC_WKUP_IRQHandler
  266. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  267. .weak FLASH_IRQHandler
  268. .thumb_set FLASH_IRQHandler,Default_Handler
  269. .weak RCC_IRQHandler
  270. .thumb_set RCC_IRQHandler,Default_Handler
  271. .weak EXTI0_IRQHandler
  272. .thumb_set EXTI0_IRQHandler,Default_Handler
  273. .weak EXTI1_IRQHandler
  274. .thumb_set EXTI1_IRQHandler,Default_Handler
  275. .weak EXTI2_IRQHandler
  276. .thumb_set EXTI2_IRQHandler,Default_Handler
  277. .weak EXTI3_IRQHandler
  278. .thumb_set EXTI3_IRQHandler,Default_Handler
  279. .weak EXTI4_IRQHandler
  280. .thumb_set EXTI4_IRQHandler,Default_Handler
  281. .weak DMA1_Stream0_IRQHandler
  282. .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
  283. .weak DMA1_Stream1_IRQHandler
  284. .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
  285. .weak DMA1_Stream2_IRQHandler
  286. .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
  287. .weak DMA1_Stream3_IRQHandler
  288. .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
  289. .weak DMA1_Stream4_IRQHandler
  290. .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
  291. .weak DMA1_Stream5_IRQHandler
  292. .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
  293. .weak DMA1_Stream6_IRQHandler
  294. .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
  295. .weak ADC_IRQHandler
  296. .thumb_set ADC_IRQHandler,Default_Handler
  297. .weak EXTI9_5_IRQHandler
  298. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  299. .weak TIM1_BRK_TIM9_IRQHandler
  300. .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
  301. .weak TIM1_UP_TIM10_IRQHandler
  302. .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
  303. .weak TIM1_TRG_COM_TIM11_IRQHandler
  304. .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
  305. .weak TIM1_CC_IRQHandler
  306. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  307. .weak TIM2_IRQHandler
  308. .thumb_set TIM2_IRQHandler,Default_Handler
  309. .weak TIM3_IRQHandler
  310. .thumb_set TIM3_IRQHandler,Default_Handler
  311. .weak TIM4_IRQHandler
  312. .thumb_set TIM4_IRQHandler,Default_Handler
  313. .weak I2C1_EV_IRQHandler
  314. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  315. .weak I2C1_ER_IRQHandler
  316. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  317. .weak I2C2_EV_IRQHandler
  318. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  319. .weak I2C2_ER_IRQHandler
  320. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  321. .weak SPI1_IRQHandler
  322. .thumb_set SPI1_IRQHandler,Default_Handler
  323. .weak SPI2_IRQHandler
  324. .thumb_set SPI2_IRQHandler,Default_Handler
  325. .weak USART1_IRQHandler
  326. .thumb_set USART1_IRQHandler,Default_Handler
  327. .weak USART2_IRQHandler
  328. .thumb_set USART2_IRQHandler,Default_Handler
  329. .weak EXTI15_10_IRQHandler
  330. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  331. .weak RTC_Alarm_IRQHandler
  332. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  333. .weak OTG_FS_WKUP_IRQHandler
  334. .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
  335. .weak DMA1_Stream7_IRQHandler
  336. .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
  337. .weak SDIO_IRQHandler
  338. .thumb_set SDIO_IRQHandler,Default_Handler
  339. .weak TIM5_IRQHandler
  340. .thumb_set TIM5_IRQHandler,Default_Handler
  341. .weak SPI3_IRQHandler
  342. .thumb_set SPI3_IRQHandler,Default_Handler
  343. .weak DMA2_Stream0_IRQHandler
  344. .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
  345. .weak DMA2_Stream1_IRQHandler
  346. .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
  347. .weak DMA2_Stream2_IRQHandler
  348. .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
  349. .weak DMA2_Stream3_IRQHandler
  350. .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
  351. .weak DMA2_Stream4_IRQHandler
  352. .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
  353. .weak OTG_FS_IRQHandler
  354. .thumb_set OTG_FS_IRQHandler,Default_Handler
  355. .weak DMA2_Stream5_IRQHandler
  356. .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
  357. .weak DMA2_Stream6_IRQHandler
  358. .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
  359. .weak DMA2_Stream7_IRQHandler
  360. .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
  361. .weak USART6_IRQHandler
  362. .thumb_set USART6_IRQHandler,Default_Handler
  363. .weak I2C3_EV_IRQHandler
  364. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  365. .weak I2C3_ER_IRQHandler
  366. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  367. .weak FPU_IRQHandler
  368. .thumb_set FPU_IRQHandler,Default_Handler
  369. .weak SPI4_IRQHandler
  370. .thumb_set SPI4_IRQHandler,Default_Handler
  371. .weak SPI5_IRQHandler
  372. .thumb_set SPI5_IRQHandler,Default_Handler
  373. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/