startup_stm32f401xx.s 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440
  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32f401xx.s
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief STM32F401xx Devices vector table for Atollic TrueSTUDIO toolchain.
  8. * This module performs:
  9. * - Set the initial SP
  10. * - Set the initial PC == Reset_Handler,
  11. * - Set the vector table entries with the exceptions ISR address
  12. * - Configure the clock system
  13. * - Branches to main in the C library (which eventually
  14. * calls main()).
  15. * After Reset the Cortex-M4 processor is in Thread mode,
  16. * priority is Privileged, and the Stack is set to Main.
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  21. *
  22. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  23. * You may not use this file except in compliance with the License.
  24. * You may obtain a copy of the License at:
  25. *
  26. * http://www.st.com/software_license_agreement_liberty_v2
  27. *
  28. * Unless required by applicable law or agreed to in writing, software
  29. * distributed under the License is distributed on an "AS IS" BASIS,
  30. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  31. * See the License for the specific language governing permissions and
  32. * limitations under the License.
  33. *
  34. ******************************************************************************
  35. */
  36. .syntax unified
  37. .cpu cortex-m4
  38. .fpu softvfp
  39. .thumb
  40. .global g_pfnVectors
  41. .global Default_Handler
  42. /* start address for the initialization values of the .data section.
  43. defined in linker script */
  44. .word _sidata
  45. /* start address for the .data section. defined in linker script */
  46. .word _sdata
  47. /* end address for the .data section. defined in linker script */
  48. .word _edata
  49. /* start address for the .bss section. defined in linker script */
  50. .word _sbss
  51. /* end address for the .bss section. defined in linker script */
  52. .word _ebss
  53. /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  54. /**
  55. * @brief This is the code that gets called when the processor first
  56. * starts execution following a reset event. Only the absolutely
  57. * necessary set is performed, after which the application
  58. * supplied main() routine is called.
  59. * @param None
  60. * @retval : None
  61. */
  62. .section .text.Reset_Handler
  63. .weak Reset_Handler
  64. .type Reset_Handler, %function
  65. Reset_Handler:
  66. /* Copy the data segment initializers from flash to SRAM */
  67. movs r1, #0
  68. b LoopCopyDataInit
  69. CopyDataInit:
  70. ldr r3, =_sidata
  71. ldr r3, [r3, r1]
  72. str r3, [r0, r1]
  73. adds r1, r1, #4
  74. LoopCopyDataInit:
  75. ldr r0, =_sdata
  76. ldr r3, =_edata
  77. adds r2, r0, r1
  78. cmp r2, r3
  79. bcc CopyDataInit
  80. ldr r2, =_sbss
  81. b LoopFillZerobss
  82. /* Zero fill the bss segment. */
  83. FillZerobss:
  84. movs r3, #0
  85. str r3, [r2], #4
  86. LoopFillZerobss:
  87. ldr r3, = _ebss
  88. cmp r2, r3
  89. bcc FillZerobss
  90. /* Call the clock system intitialization function.*/
  91. bl SystemInit
  92. /* Call static constructors */
  93. bl __libc_init_array
  94. /* Call the application's entry point.*/
  95. bl main
  96. bx lr
  97. .size Reset_Handler, .-Reset_Handler
  98. /**
  99. * @brief This is the code that gets called when the processor receives an
  100. * unexpected interrupt. This simply enters an infinite loop, preserving
  101. * the system state for examination by a debugger.
  102. * @param None
  103. * @retval None
  104. */
  105. .section .text.Default_Handler,"ax",%progbits
  106. Default_Handler:
  107. Infinite_Loop:
  108. b Infinite_Loop
  109. .size Default_Handler, .-Default_Handler
  110. /******************************************************************************
  111. *
  112. * The minimal vector table for a Cortex M3. Note that the proper constructs
  113. * must be placed on this to ensure that it ends up at physical address
  114. * 0x0000.0000.
  115. *
  116. *******************************************************************************/
  117. .section .isr_vector,"a",%progbits
  118. .type g_pfnVectors, %object
  119. .size g_pfnVectors, .-g_pfnVectors
  120. g_pfnVectors:
  121. .word _estack
  122. .word Reset_Handler
  123. .word NMI_Handler
  124. .word HardFault_Handler
  125. .word MemManage_Handler
  126. .word BusFault_Handler
  127. .word UsageFault_Handler
  128. .word 0
  129. .word 0
  130. .word 0
  131. .word 0
  132. .word SVC_Handler
  133. .word DebugMon_Handler
  134. .word 0
  135. .word PendSV_Handler
  136. .word SysTick_Handler
  137. /* External Interrupts */
  138. .word WWDG_IRQHandler /* Window WatchDog */
  139. .word PVD_IRQHandler /* PVD through EXTI Line detection */
  140. .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  141. .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  142. .word FLASH_IRQHandler /* FLASH */
  143. .word RCC_IRQHandler /* RCC */
  144. .word EXTI0_IRQHandler /* EXTI Line0 */
  145. .word EXTI1_IRQHandler /* EXTI Line1 */
  146. .word EXTI2_IRQHandler /* EXTI Line2 */
  147. .word EXTI3_IRQHandler /* EXTI Line3 */
  148. .word EXTI4_IRQHandler /* EXTI Line4 */
  149. .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  150. .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  151. .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  152. .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  153. .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  154. .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  155. .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  156. .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  157. .word 0 /* Reserved */
  158. .word 0 /* Reserved */
  159. .word 0 /* Reserved */
  160. .word 0 /* Reserved */
  161. .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  162. .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
  163. .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
  164. .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
  165. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  166. .word TIM2_IRQHandler /* TIM2 */
  167. .word TIM3_IRQHandler /* TIM3 */
  168. .word TIM4_IRQHandler /* TIM4 */
  169. .word I2C1_EV_IRQHandler /* I2C1 Event */
  170. .word I2C1_ER_IRQHandler /* I2C1 Error */
  171. .word I2C2_EV_IRQHandler /* I2C2 Event */
  172. .word I2C2_ER_IRQHandler /* I2C2 Error */
  173. .word SPI1_IRQHandler /* SPI1 */
  174. .word SPI2_IRQHandler /* SPI2 */
  175. .word USART1_IRQHandler /* USART1 */
  176. .word USART2_IRQHandler /* USART2 */
  177. .word 0 /* Reserved */
  178. .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  179. .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  180. .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
  181. .word 0 /* Reserved */
  182. .word 0 /* Reserved */
  183. .word 0 /* Reserved */
  184. .word 0 /* Reserved */
  185. .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  186. .word 0 /* Reserved */
  187. .word SDIO_IRQHandler /* SDIO */
  188. .word TIM5_IRQHandler /* TIM5 */
  189. .word SPI3_IRQHandler /* SPI3 */
  190. .word 0 /* Reserved */
  191. .word 0 /* Reserved */
  192. .word 0 /* Reserved */
  193. .word 0 /* Reserved */
  194. .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  195. .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  196. .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  197. .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  198. .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  199. .word 0 /* Reserved */
  200. .word 0 /* Reserved */
  201. .word 0 /* Reserved */
  202. .word 0 /* Reserved */
  203. .word 0 /* Reserved */
  204. .word 0 /* Reserved */
  205. .word OTG_FS_IRQHandler /* USB OTG FS */
  206. .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  207. .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  208. .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  209. .word USART6_IRQHandler /* USART6 */
  210. .word I2C3_EV_IRQHandler /* I2C3 event */
  211. .word I2C3_ER_IRQHandler /* I2C3 error */
  212. .word 0 /* Reserved */
  213. .word 0 /* Reserved */
  214. .word 0 /* Reserved */
  215. .word 0 /* Reserved */
  216. .word 0 /* Reserved */
  217. .word 0 /* Reserved */
  218. .word 0 /* Reserved */
  219. .word FPU_IRQHandler /* FPU */
  220. .word 0 /* Reserved */
  221. .word 0 /* Reserved */
  222. .word SPI4_IRQHandler /* SPI4 */
  223. /*******************************************************************************
  224. *
  225. * Provide weak aliases for each Exception handler to the Default_Handler.
  226. * As they are weak aliases, any function with the same name will override
  227. * this definition.
  228. *
  229. *******************************************************************************/
  230. .weak NMI_Handler
  231. .thumb_set NMI_Handler,Default_Handler
  232. .weak HardFault_Handler
  233. .thumb_set HardFault_Handler,Default_Handler
  234. .weak MemManage_Handler
  235. .thumb_set MemManage_Handler,Default_Handler
  236. .weak BusFault_Handler
  237. .thumb_set BusFault_Handler,Default_Handler
  238. .weak UsageFault_Handler
  239. .thumb_set UsageFault_Handler,Default_Handler
  240. .weak SVC_Handler
  241. .thumb_set SVC_Handler,Default_Handler
  242. .weak DebugMon_Handler
  243. .thumb_set DebugMon_Handler,Default_Handler
  244. .weak PendSV_Handler
  245. .thumb_set PendSV_Handler,Default_Handler
  246. .weak SysTick_Handler
  247. .thumb_set SysTick_Handler,Default_Handler
  248. .weak WWDG_IRQHandler
  249. .thumb_set WWDG_IRQHandler,Default_Handler
  250. .weak PVD_IRQHandler
  251. .thumb_set PVD_IRQHandler,Default_Handler
  252. .weak TAMP_STAMP_IRQHandler
  253. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  254. .weak RTC_WKUP_IRQHandler
  255. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  256. .weak FLASH_IRQHandler
  257. .thumb_set FLASH_IRQHandler,Default_Handler
  258. .weak RCC_IRQHandler
  259. .thumb_set RCC_IRQHandler,Default_Handler
  260. .weak EXTI0_IRQHandler
  261. .thumb_set EXTI0_IRQHandler,Default_Handler
  262. .weak EXTI1_IRQHandler
  263. .thumb_set EXTI1_IRQHandler,Default_Handler
  264. .weak EXTI2_IRQHandler
  265. .thumb_set EXTI2_IRQHandler,Default_Handler
  266. .weak EXTI3_IRQHandler
  267. .thumb_set EXTI3_IRQHandler,Default_Handler
  268. .weak EXTI4_IRQHandler
  269. .thumb_set EXTI4_IRQHandler,Default_Handler
  270. .weak DMA1_Stream0_IRQHandler
  271. .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
  272. .weak DMA1_Stream1_IRQHandler
  273. .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
  274. .weak DMA1_Stream2_IRQHandler
  275. .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
  276. .weak DMA1_Stream3_IRQHandler
  277. .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
  278. .weak DMA1_Stream4_IRQHandler
  279. .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
  280. .weak DMA1_Stream5_IRQHandler
  281. .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
  282. .weak DMA1_Stream6_IRQHandler
  283. .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
  284. .weak ADC_IRQHandler
  285. .thumb_set ADC_IRQHandler,Default_Handler
  286. .weak EXTI9_5_IRQHandler
  287. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  288. .weak TIM1_BRK_TIM9_IRQHandler
  289. .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
  290. .weak TIM1_UP_TIM10_IRQHandler
  291. .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
  292. .weak TIM1_TRG_COM_TIM11_IRQHandler
  293. .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
  294. .weak TIM1_CC_IRQHandler
  295. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  296. .weak TIM2_IRQHandler
  297. .thumb_set TIM2_IRQHandler,Default_Handler
  298. .weak TIM3_IRQHandler
  299. .thumb_set TIM3_IRQHandler,Default_Handler
  300. .weak TIM4_IRQHandler
  301. .thumb_set TIM4_IRQHandler,Default_Handler
  302. .weak I2C1_EV_IRQHandler
  303. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  304. .weak I2C1_ER_IRQHandler
  305. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  306. .weak I2C2_EV_IRQHandler
  307. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  308. .weak I2C2_ER_IRQHandler
  309. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  310. .weak SPI1_IRQHandler
  311. .thumb_set SPI1_IRQHandler,Default_Handler
  312. .weak SPI2_IRQHandler
  313. .thumb_set SPI2_IRQHandler,Default_Handler
  314. .weak USART1_IRQHandler
  315. .thumb_set USART1_IRQHandler,Default_Handler
  316. .weak USART2_IRQHandler
  317. .thumb_set USART2_IRQHandler,Default_Handler
  318. .weak EXTI15_10_IRQHandler
  319. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  320. .weak RTC_Alarm_IRQHandler
  321. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  322. .weak OTG_FS_WKUP_IRQHandler
  323. .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
  324. .weak DMA1_Stream7_IRQHandler
  325. .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
  326. .weak SDIO_IRQHandler
  327. .thumb_set SDIO_IRQHandler,Default_Handler
  328. .weak TIM5_IRQHandler
  329. .thumb_set TIM5_IRQHandler,Default_Handler
  330. .weak SPI3_IRQHandler
  331. .thumb_set SPI3_IRQHandler,Default_Handler
  332. .weak DMA2_Stream0_IRQHandler
  333. .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
  334. .weak DMA2_Stream1_IRQHandler
  335. .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
  336. .weak DMA2_Stream2_IRQHandler
  337. .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
  338. .weak DMA2_Stream3_IRQHandler
  339. .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
  340. .weak DMA2_Stream4_IRQHandler
  341. .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
  342. .weak OTG_FS_IRQHandler
  343. .thumb_set OTG_FS_IRQHandler,Default_Handler
  344. .weak DMA2_Stream5_IRQHandler
  345. .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
  346. .weak DMA2_Stream6_IRQHandler
  347. .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
  348. .weak DMA2_Stream7_IRQHandler
  349. .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
  350. .weak USART6_IRQHandler
  351. .thumb_set USART6_IRQHandler,Default_Handler
  352. .weak I2C3_EV_IRQHandler
  353. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  354. .weak I2C3_ER_IRQHandler
  355. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  356. .weak FPU_IRQHandler
  357. .thumb_set FPU_IRQHandler,Default_Handler
  358. .weak SPI4_IRQHandler
  359. .thumb_set SPI4_IRQHandler,Default_Handler
  360. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/