stm32f4xx_hash.c 25 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hash.c
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the HASH / HMAC Processor (HASH) peripheral:
  9. * - Initialization and Configuration functions
  10. * - Message Digest generation functions
  11. * - context swapping functions
  12. * - DMA interface function
  13. * - Interrupts and flags management
  14. *
  15. @verbatim
  16. ===================================================================
  17. ##### How to use this driver #####
  18. ===================================================================
  19. *** HASH operation : ***
  20. ========================
  21. [..]
  22. (#) Enable the HASH controller clock using
  23. RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE) function.
  24. (#) Initialize the HASH using HASH_Init() function.
  25. (#) Reset the HASH processor core, so that the HASH will be ready
  26. to compute he message digest of a new message by using HASH_Reset() function.
  27. (#) Enable the HASH controller using the HASH_Cmd() function.
  28. (#) if using DMA for Data input transfer, Activate the DMA Request
  29. using HASH_DMACmd() function
  30. (#) if DMA is not used for data transfer, use HASH_DataIn() function
  31. to enter data to IN FIFO.
  32. (#) Configure the Number of valid bits in last word of the message
  33. using HASH_SetLastWordValidBitsNbr() function.
  34. (#) if the message length is not an exact multiple of 512 bits,
  35. then the function HASH_StartDigest() must be called to launch the computation
  36. of the final digest.
  37. (#) Once computed, the digest can be read using HASH_GetDigest() function.
  38. (#) To control HASH events you can use one of the following wo methods:
  39. (++) Check on HASH flags using the HASH_GetFlagStatus() function.
  40. (++) Use HASH interrupts through the function HASH_ITConfig() at
  41. initialization phase and HASH_GetITStatus() function into
  42. interrupt routines in hashing phase.
  43. After checking on a flag you should clear it using HASH_ClearFlag()
  44. function. And after checking on an interrupt event you should
  45. clear it using HASH_ClearITPendingBit() function.
  46. (#) Save and restore hash processor context using
  47. HASH_SaveContext() and HASH_RestoreContext() functions.
  48. *** HMAC operation : ***
  49. ========================
  50. [..] The HMAC algorithm is used for message authentication, by
  51. irreversibly binding the message being processed to a key chosen
  52. by the user.
  53. For HMAC specifications, refer to "HMAC: keyed-hashing for message
  54. authentication, H. Krawczyk, M. Bellare, R. Canetti, February 1997"
  55. [..] Basically, the HMAC algorithm consists of two nested hash operations:
  56. HMAC(message) = Hash[((key | pad) XOR 0x5C) | Hash(((key | pad) XOR 0x36) | message)]
  57. where:
  58. (+) "pad" is a sequence of zeroes needed to extend the key to the
  59. length of the underlying hash function data block (that is
  60. 512 bits for both the SHA-1 and MD5 hash algorithms)
  61. (+) "|" represents the concatenation operator
  62. [..]To compute the HMAC, four different phases are required:
  63. (#) Initialize the HASH using HASH_Init() function to do HMAC
  64. operation.
  65. (#) The key (to be used for the inner hash function) is then given to the core.
  66. This operation follows the same mechanism as the one used to send the
  67. message in the hash operation (that is, by HASH_DataIn() function and,
  68. finally, HASH_StartDigest() function.
  69. (#) Once the last word has been entered and computation has started,
  70. the hash processor elaborates the key. It is then ready to accept the message
  71. text using the same mechanism as the one used to send the message in the
  72. hash operation.
  73. (#) After the first hash round, the hash processor returns "ready" to indicate
  74. that it is ready to receive the key to be used for the outer hash function
  75. (normally, this key is the same as the one used for the inner hash function).
  76. When the last word of the key is entered and computation starts, the HMAC
  77. result is made available using HASH_GetDigest() function.
  78. @endverbatim
  79. *
  80. ******************************************************************************
  81. * @attention
  82. *
  83. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  84. *
  85. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  86. * You may not use this file except in compliance with the License.
  87. * You may obtain a copy of the License at:
  88. *
  89. * http://www.st.com/software_license_agreement_liberty_v2
  90. *
  91. * Unless required by applicable law or agreed to in writing, software
  92. * distributed under the License is distributed on an "AS IS" BASIS,
  93. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  94. * See the License for the specific language governing permissions and
  95. * limitations under the License.
  96. *
  97. ******************************************************************************
  98. */
  99. /* Includes ------------------------------------------------------------------*/
  100. #include "stm32f4xx_hash.h"
  101. #include "stm32f4xx_rcc.h"
  102. /** @addtogroup STM32F4xx_StdPeriph_Driver
  103. * @{
  104. */
  105. /** @defgroup HASH
  106. * @brief HASH driver modules
  107. * @{
  108. */
  109. /* Private typedef -----------------------------------------------------------*/
  110. /* Private define ------------------------------------------------------------*/
  111. /* Private macro -------------------------------------------------------------*/
  112. /* Private variables ---------------------------------------------------------*/
  113. /* Private function prototypes -----------------------------------------------*/
  114. /* Private functions ---------------------------------------------------------*/
  115. /** @defgroup HASH_Private_Functions
  116. * @{
  117. */
  118. /** @defgroup HASH_Group1 Initialization and Configuration functions
  119. * @brief Initialization and Configuration functions
  120. *
  121. @verbatim
  122. ===============================================================================
  123. ##### Initialization and Configuration functions #####
  124. ===============================================================================
  125. [..] This section provides functions allowing to
  126. (+) Initialize the HASH peripheral
  127. (+) Configure the HASH Processor
  128. (+) MD5/SHA1,
  129. (+) HASH/HMAC,
  130. (+) datatype
  131. (+) HMAC Key (if mode = HMAC)
  132. (+) Reset the HASH Processor
  133. @endverbatim
  134. * @{
  135. */
  136. /**
  137. * @brief De-initializes the HASH peripheral registers to their default reset values
  138. * @param None
  139. * @retval None
  140. */
  141. void HASH_DeInit(void)
  142. {
  143. /* Enable HASH reset state */
  144. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_HASH, ENABLE);
  145. /* Release HASH from reset state */
  146. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_HASH, DISABLE);
  147. }
  148. /**
  149. * @brief Initializes the HASH peripheral according to the specified parameters
  150. * in the HASH_InitStruct structure.
  151. * @note the hash processor is reset when calling this function so that the
  152. * HASH will be ready to compute the message digest of a new message.
  153. * There is no need to call HASH_Reset() function.
  154. * @param HASH_InitStruct: pointer to a HASH_InitTypeDef structure that contains
  155. * the configuration information for the HASH peripheral.
  156. * @note The field HASH_HMACKeyType in HASH_InitTypeDef must be filled only
  157. * if the algorithm mode is HMAC.
  158. * @retval None
  159. */
  160. void HASH_Init(HASH_InitTypeDef* HASH_InitStruct)
  161. {
  162. /* Check the parameters */
  163. assert_param(IS_HASH_ALGOSELECTION(HASH_InitStruct->HASH_AlgoSelection));
  164. assert_param(IS_HASH_DATATYPE(HASH_InitStruct->HASH_DataType));
  165. assert_param(IS_HASH_ALGOMODE(HASH_InitStruct->HASH_AlgoMode));
  166. /* Configure the Algorithm used, algorithm mode and the datatype */
  167. HASH->CR &= ~ (HASH_CR_ALGO | HASH_CR_DATATYPE | HASH_CR_MODE);
  168. HASH->CR |= (HASH_InitStruct->HASH_AlgoSelection | \
  169. HASH_InitStruct->HASH_DataType | \
  170. HASH_InitStruct->HASH_AlgoMode);
  171. /* if algorithm mode is HMAC, set the Key */
  172. if(HASH_InitStruct->HASH_AlgoMode == HASH_AlgoMode_HMAC)
  173. {
  174. assert_param(IS_HASH_HMAC_KEYTYPE(HASH_InitStruct->HASH_HMACKeyType));
  175. HASH->CR &= ~HASH_CR_LKEY;
  176. HASH->CR |= HASH_InitStruct->HASH_HMACKeyType;
  177. }
  178. /* Reset the HASH processor core, so that the HASH will be ready to compute
  179. the message digest of a new message */
  180. HASH->CR |= HASH_CR_INIT;
  181. }
  182. /**
  183. * @brief Fills each HASH_InitStruct member with its default value.
  184. * @param HASH_InitStruct : pointer to a HASH_InitTypeDef structure which will
  185. * be initialized.
  186. * @note The default values set are : Processor mode is HASH, Algorithm selected is SHA1,
  187. * Data type selected is 32b and HMAC Key Type is short key.
  188. * @retval None
  189. */
  190. void HASH_StructInit(HASH_InitTypeDef* HASH_InitStruct)
  191. {
  192. /* Initialize the HASH_AlgoSelection member */
  193. HASH_InitStruct->HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
  194. /* Initialize the HASH_AlgoMode member */
  195. HASH_InitStruct->HASH_AlgoMode = HASH_AlgoMode_HASH;
  196. /* Initialize the HASH_DataType member */
  197. HASH_InitStruct->HASH_DataType = HASH_DataType_32b;
  198. /* Initialize the HASH_HMACKeyType member */
  199. HASH_InitStruct->HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
  200. }
  201. /**
  202. * @brief Resets the HASH processor core, so that the HASH will be ready
  203. * to compute the message digest of a new message.
  204. * @note Calling this function will clear the HASH_SR_DCIS (Digest calculation
  205. * completion interrupt status) bit corresponding to HASH_IT_DCI
  206. * interrupt and HASH_FLAG_DCIS flag.
  207. * @param None
  208. * @retval None
  209. */
  210. void HASH_Reset(void)
  211. {
  212. /* Reset the HASH processor core */
  213. HASH->CR |= HASH_CR_INIT;
  214. }
  215. /**
  216. * @}
  217. */
  218. /** @defgroup HASH_Group2 Message Digest generation functions
  219. * @brief Message Digest generation functions
  220. *
  221. @verbatim
  222. ===============================================================================
  223. ##### Message Digest generation functions #####
  224. ===============================================================================
  225. [..] This section provides functions allowing the generation of message digest:
  226. (+) Push data in the IN FIFO : using HASH_DataIn()
  227. (+) Get the number of words set in IN FIFO, use HASH_GetInFIFOWordsNbr()
  228. (+) set the last word valid bits number using HASH_SetLastWordValidBitsNbr()
  229. (+) start digest calculation : using HASH_StartDigest()
  230. (+) Get the Digest message : using HASH_GetDigest()
  231. @endverbatim
  232. * @{
  233. */
  234. /**
  235. * @brief Configure the Number of valid bits in last word of the message
  236. * @param ValidNumber: Number of valid bits in last word of the message.
  237. * This parameter must be a number between 0 and 0x1F.
  238. * - 0x00: All 32 bits of the last data written are valid
  239. * - 0x01: Only bit [0] of the last data written is valid
  240. * - 0x02: Only bits[1:0] of the last data written are valid
  241. * - 0x03: Only bits[2:0] of the last data written are valid
  242. * - ...
  243. * - 0x1F: Only bits[30:0] of the last data written are valid
  244. * @note The Number of valid bits must be set before to start the message
  245. * digest competition (in Hash and HMAC) and key treatment(in HMAC).
  246. * @retval None
  247. */
  248. void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber)
  249. {
  250. /* Check the parameters */
  251. assert_param(IS_HASH_VALIDBITSNUMBER(ValidNumber));
  252. /* Configure the Number of valid bits in last word of the message */
  253. HASH->STR &= ~(HASH_STR_NBW);
  254. HASH->STR |= ValidNumber;
  255. }
  256. /**
  257. * @brief Writes data in the Data Input FIFO
  258. * @param Data: new data of the message to be processed.
  259. * @retval None
  260. */
  261. void HASH_DataIn(uint32_t Data)
  262. {
  263. /* Write in the DIN register a new data */
  264. HASH->DIN = Data;
  265. }
  266. /**
  267. * @brief Returns the number of words already pushed into the IN FIFO.
  268. * @param None
  269. * @retval The value of words already pushed into the IN FIFO.
  270. */
  271. uint8_t HASH_GetInFIFOWordsNbr(void)
  272. {
  273. /* Return the value of NBW bits */
  274. return ((HASH->CR & HASH_CR_NBW) >> 8);
  275. }
  276. /**
  277. * @brief Provides the message digest result.
  278. * @note In MD5 mode, Data[7] to Data[4] filed of HASH_MsgDigest structure is not used
  279. * and is read as zero.
  280. * In SHA-1 mode, Data[7] to Data[5] filed of HASH_MsgDigest structure is not used
  281. * and is read as zero.
  282. * In SHA-224 mode, Data[7] filed of HASH_MsgDigest structure is not used
  283. * and is read as zero.
  284. * @param HASH_MessageDigest: pointer to a HASH_MsgDigest structure which will
  285. * hold the message digest result
  286. * @retval None
  287. */
  288. void HASH_GetDigest(HASH_MsgDigest* HASH_MessageDigest)
  289. {
  290. /* Get the data field */
  291. HASH_MessageDigest->Data[0] = HASH->HR[0];
  292. HASH_MessageDigest->Data[1] = HASH->HR[1];
  293. HASH_MessageDigest->Data[2] = HASH->HR[2];
  294. HASH_MessageDigest->Data[3] = HASH->HR[3];
  295. HASH_MessageDigest->Data[4] = HASH->HR[4];
  296. HASH_MessageDigest->Data[5] = HASH_DIGEST->HR[5];
  297. HASH_MessageDigest->Data[6] = HASH_DIGEST->HR[6];
  298. HASH_MessageDigest->Data[7] = HASH_DIGEST->HR[7];
  299. }
  300. /**
  301. * @brief Starts the message padding and calculation of the final message
  302. * @param None
  303. * @retval None
  304. */
  305. void HASH_StartDigest(void)
  306. {
  307. /* Start the Digest calculation */
  308. HASH->STR |= HASH_STR_DCAL;
  309. }
  310. /**
  311. * @}
  312. */
  313. /** @defgroup HASH_Group3 Context swapping functions
  314. * @brief Context swapping functions
  315. *
  316. @verbatim
  317. ===============================================================================
  318. ##### Context swapping functions #####
  319. ===============================================================================
  320. [..] This section provides functions allowing to save and store HASH Context
  321. [..] It is possible to interrupt a HASH/HMAC process to perform another processing
  322. with a higher priority, and to complete the interrupted process later on, when
  323. the higher priority task is complete. To do so, the context of the interrupted
  324. task must be saved from the HASH registers to memory, and then be restored
  325. from memory to the HASH registers.
  326. (#) To save the current context, use HASH_SaveContext() function
  327. (#) To restore the saved context, use HASH_RestoreContext() function
  328. @endverbatim
  329. * @{
  330. */
  331. /**
  332. * @brief Save the Hash peripheral Context.
  333. * @note The context can be saved only when no block is currently being
  334. * processed. So user must wait for DINIS = 1 (the last block has been
  335. * processed and the input FIFO is empty) or NBW != 0 (the FIFO is not
  336. * full and no processing is ongoing).
  337. * @param HASH_ContextSave: pointer to a HASH_Context structure that contains
  338. * the repository for current context.
  339. * @retval None
  340. */
  341. void HASH_SaveContext(HASH_Context* HASH_ContextSave)
  342. {
  343. uint8_t i = 0;
  344. /* save context registers */
  345. HASH_ContextSave->HASH_IMR = HASH->IMR;
  346. HASH_ContextSave->HASH_STR = HASH->STR;
  347. HASH_ContextSave->HASH_CR = HASH->CR;
  348. for(i=0; i<=53;i++)
  349. {
  350. HASH_ContextSave->HASH_CSR[i] = HASH->CSR[i];
  351. }
  352. }
  353. /**
  354. * @brief Restore the Hash peripheral Context.
  355. * @note After calling this function, user can restart the processing from the
  356. * point where it has been interrupted.
  357. * @param HASH_ContextRestore: pointer to a HASH_Context structure that contains
  358. * the repository for saved context.
  359. * @retval None
  360. */
  361. void HASH_RestoreContext(HASH_Context* HASH_ContextRestore)
  362. {
  363. uint8_t i = 0;
  364. /* restore context registers */
  365. HASH->IMR = HASH_ContextRestore->HASH_IMR;
  366. HASH->STR = HASH_ContextRestore->HASH_STR;
  367. HASH->CR = HASH_ContextRestore->HASH_CR;
  368. /* Initialize the hash processor */
  369. HASH->CR |= HASH_CR_INIT;
  370. /* continue restoring context registers */
  371. for(i=0; i<=53;i++)
  372. {
  373. HASH->CSR[i] = HASH_ContextRestore->HASH_CSR[i];
  374. }
  375. }
  376. /**
  377. * @}
  378. */
  379. /** @defgroup HASH_Group4 HASH's DMA interface Configuration function
  380. * @brief HASH's DMA interface Configuration function
  381. *
  382. @verbatim
  383. ===============================================================================
  384. ##### HASH's DMA interface Configuration function #####
  385. ===============================================================================
  386. [..] This section provides functions allowing to configure the DMA interface for
  387. HASH/ HMAC data input transfer.
  388. [..] When the DMA mode is enabled (using the HASH_DMACmd() function), data can be
  389. sent to the IN FIFO using the DMA peripheral.
  390. @endverbatim
  391. * @{
  392. */
  393. /**
  394. * @brief Enables or disables auto-start message padding and
  395. * calculation of the final message digest at the end of DMA transfer.
  396. * @param NewState: new state of the selected HASH DMA transfer request.
  397. * This parameter can be: ENABLE or DISABLE.
  398. * @retval None
  399. */
  400. void HASH_AutoStartDigest(FunctionalState NewState)
  401. {
  402. /* Check the parameters */
  403. assert_param(IS_FUNCTIONAL_STATE(NewState));
  404. if (NewState != DISABLE)
  405. {
  406. /* Enable the auto start of the final message digest at the end of DMA transfer */
  407. HASH->CR &= ~HASH_CR_MDMAT;
  408. }
  409. else
  410. {
  411. /* Disable the auto start of the final message digest at the end of DMA transfer */
  412. HASH->CR |= HASH_CR_MDMAT;
  413. }
  414. }
  415. /**
  416. * @brief Enables or disables the HASH DMA interface.
  417. * @note The DMA is disabled by hardware after the end of transfer.
  418. * @param NewState: new state of the selected HASH DMA transfer request.
  419. * This parameter can be: ENABLE or DISABLE.
  420. * @retval None
  421. */
  422. void HASH_DMACmd(FunctionalState NewState)
  423. {
  424. /* Check the parameters */
  425. assert_param(IS_FUNCTIONAL_STATE(NewState));
  426. if (NewState != DISABLE)
  427. {
  428. /* Enable the HASH DMA request */
  429. HASH->CR |= HASH_CR_DMAE;
  430. }
  431. else
  432. {
  433. /* Disable the HASH DMA request */
  434. HASH->CR &= ~HASH_CR_DMAE;
  435. }
  436. }
  437. /**
  438. * @}
  439. */
  440. /** @defgroup HASH_Group5 Interrupts and flags management functions
  441. * @brief Interrupts and flags management functions
  442. *
  443. @verbatim
  444. ===============================================================================
  445. ##### Interrupts and flags management functions #####
  446. ===============================================================================
  447. [..] This section provides functions allowing to configure the HASH Interrupts and
  448. to get the status and clear flags and Interrupts pending bits.
  449. [..] The HASH provides 2 Interrupts sources and 5 Flags:
  450. *** Flags : ***
  451. ===============
  452. [..]
  453. (#) HASH_FLAG_DINIS : set when 16 locations are free in the Data IN FIFO
  454. which means that a new block (512 bit) can be entered into the input buffer.
  455. (#) HASH_FLAG_DCIS : set when Digest calculation is complete
  456. (#) HASH_FLAG_DMAS : set when HASH's DMA interface is enabled (DMAE=1) or
  457. a transfer is ongoing. This Flag is cleared only by hardware.
  458. (#) HASH_FLAG_BUSY : set when The hash core is processing a block of data
  459. This Flag is cleared only by hardware.
  460. (#) HASH_FLAG_DINNE : set when Data IN FIFO is not empty which means that
  461. the Data IN FIFO contains at least one word of data. This Flag is cleared
  462. only by hardware.
  463. *** Interrupts : ***
  464. ====================
  465. [..]
  466. (#) HASH_IT_DINI : if enabled, this interrupt source is pending when 16
  467. locations are free in the Data IN FIFO which means that a new block (512 bit)
  468. can be entered into the input buffer. This interrupt source is cleared using
  469. HASH_ClearITPendingBit(HASH_IT_DINI) function.
  470. (#) HASH_IT_DCI : if enabled, this interrupt source is pending when Digest
  471. calculation is complete. This interrupt source is cleared using
  472. HASH_ClearITPendingBit(HASH_IT_DCI) function.
  473. *** Managing the HASH controller events : ***
  474. =============================================
  475. [..] The user should identify which mode will be used in his application to manage
  476. the HASH controller events: Polling mode or Interrupt mode.
  477. (#) In the Polling Mode it is advised to use the following functions:
  478. (++) HASH_GetFlagStatus() : to check if flags events occur.
  479. (++) HASH_ClearFlag() : to clear the flags events.
  480. (#) In the Interrupt Mode it is advised to use the following functions:
  481. (++) HASH_ITConfig() : to enable or disable the interrupt source.
  482. (++) HASH_GetITStatus() : to check if Interrupt occurs.
  483. (++) HASH_ClearITPendingBit() : to clear the Interrupt pending Bit
  484. (corresponding Flag).
  485. @endverbatim
  486. * @{
  487. */
  488. /**
  489. * @brief Enables or disables the specified HASH interrupts.
  490. * @param HASH_IT: specifies the HASH interrupt source to be enabled or disabled.
  491. * This parameter can be any combination of the following values:
  492. * @arg HASH_IT_DINI: Data Input interrupt
  493. * @arg HASH_IT_DCI: Digest Calculation Completion Interrupt
  494. * @param NewState: new state of the specified HASH interrupt.
  495. * This parameter can be: ENABLE or DISABLE.
  496. * @retval None
  497. */
  498. void HASH_ITConfig(uint32_t HASH_IT, FunctionalState NewState)
  499. {
  500. /* Check the parameters */
  501. assert_param(IS_HASH_IT(HASH_IT));
  502. assert_param(IS_FUNCTIONAL_STATE(NewState));
  503. if (NewState != DISABLE)
  504. {
  505. /* Enable the selected HASH interrupt */
  506. HASH->IMR |= HASH_IT;
  507. }
  508. else
  509. {
  510. /* Disable the selected HASH interrupt */
  511. HASH->IMR &= (uint32_t)(~HASH_IT);
  512. }
  513. }
  514. /**
  515. * @brief Checks whether the specified HASH flag is set or not.
  516. * @param HASH_FLAG: specifies the HASH flag to check.
  517. * This parameter can be one of the following values:
  518. * @arg HASH_FLAG_DINIS: Data input interrupt status flag
  519. * @arg HASH_FLAG_DCIS: Digest calculation completion interrupt status flag
  520. * @arg HASH_FLAG_BUSY: Busy flag
  521. * @arg HASH_FLAG_DMAS: DMAS Status flag
  522. * @arg HASH_FLAG_DINNE: Data Input register (DIN) not empty status flag
  523. * @retval The new state of HASH_FLAG (SET or RESET)
  524. */
  525. FlagStatus HASH_GetFlagStatus(uint32_t HASH_FLAG)
  526. {
  527. FlagStatus bitstatus = RESET;
  528. uint32_t tempreg = 0;
  529. /* Check the parameters */
  530. assert_param(IS_HASH_GET_FLAG(HASH_FLAG));
  531. /* check if the FLAG is in CR register */
  532. if ((HASH_FLAG & HASH_FLAG_DINNE) != (uint32_t)RESET )
  533. {
  534. tempreg = HASH->CR;
  535. }
  536. else /* The FLAG is in SR register */
  537. {
  538. tempreg = HASH->SR;
  539. }
  540. /* Check the status of the specified HASH flag */
  541. if ((tempreg & HASH_FLAG) != (uint32_t)RESET)
  542. {
  543. /* HASH is set */
  544. bitstatus = SET;
  545. }
  546. else
  547. {
  548. /* HASH_FLAG is reset */
  549. bitstatus = RESET;
  550. }
  551. /* Return the HASH_FLAG status */
  552. return bitstatus;
  553. }
  554. /**
  555. * @brief Clears the HASH flags.
  556. * @param HASH_FLAG: specifies the flag to clear.
  557. * This parameter can be any combination of the following values:
  558. * @arg HASH_FLAG_DINIS: Data Input Flag
  559. * @arg HASH_FLAG_DCIS: Digest Calculation Completion Flag
  560. * @retval None
  561. */
  562. void HASH_ClearFlag(uint32_t HASH_FLAG)
  563. {
  564. /* Check the parameters */
  565. assert_param(IS_HASH_CLEAR_FLAG(HASH_FLAG));
  566. /* Clear the selected HASH flags */
  567. HASH->SR = ~(uint32_t)HASH_FLAG;
  568. }
  569. /**
  570. * @brief Checks whether the specified HASH interrupt has occurred or not.
  571. * @param HASH_IT: specifies the HASH interrupt source to check.
  572. * This parameter can be one of the following values:
  573. * @arg HASH_IT_DINI: Data Input interrupt
  574. * @arg HASH_IT_DCI: Digest Calculation Completion Interrupt
  575. * @retval The new state of HASH_IT (SET or RESET).
  576. */
  577. ITStatus HASH_GetITStatus(uint32_t HASH_IT)
  578. {
  579. ITStatus bitstatus = RESET;
  580. uint32_t tmpreg = 0;
  581. /* Check the parameters */
  582. assert_param(IS_HASH_GET_IT(HASH_IT));
  583. /* Check the status of the specified HASH interrupt */
  584. tmpreg = HASH->SR;
  585. if (((HASH->IMR & tmpreg) & HASH_IT) != RESET)
  586. {
  587. /* HASH_IT is set */
  588. bitstatus = SET;
  589. }
  590. else
  591. {
  592. /* HASH_IT is reset */
  593. bitstatus = RESET;
  594. }
  595. /* Return the HASH_IT status */
  596. return bitstatus;
  597. }
  598. /**
  599. * @brief Clears the HASH interrupt pending bit(s).
  600. * @param HASH_IT: specifies the HASH interrupt pending bit(s) to clear.
  601. * This parameter can be any combination of the following values:
  602. * @arg HASH_IT_DINI: Data Input interrupt
  603. * @arg HASH_IT_DCI: Digest Calculation Completion Interrupt
  604. * @retval None
  605. */
  606. void HASH_ClearITPendingBit(uint32_t HASH_IT)
  607. {
  608. /* Check the parameters */
  609. assert_param(IS_HASH_IT(HASH_IT));
  610. /* Clear the selected HASH interrupt pending bit */
  611. HASH->SR = (uint32_t)(~HASH_IT);
  612. }
  613. /**
  614. * @}
  615. */
  616. /**
  617. * @}
  618. */
  619. /**
  620. * @}
  621. */
  622. /**
  623. * @}
  624. */
  625. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/