stm32f4xx_i2c.h 30 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_i2c.h
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief This file contains all the functions prototypes for the I2C firmware
  8. * library.
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  13. *
  14. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  15. * You may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at:
  17. *
  18. * http://www.st.com/software_license_agreement_liberty_v2
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. ******************************************************************************
  27. */
  28. /* Define to prevent recursive inclusion -------------------------------------*/
  29. #ifndef __STM32F4xx_I2C_H
  30. #define __STM32F4xx_I2C_H
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /* Includes ------------------------------------------------------------------*/
  35. #include "stm32f4xx.h"
  36. /** @addtogroup STM32F4xx_StdPeriph_Driver
  37. * @{
  38. */
  39. /** @addtogroup I2C
  40. * @{
  41. */
  42. /* Exported types ------------------------------------------------------------*/
  43. /**
  44. * @brief I2C Init structure definition
  45. */
  46. typedef struct
  47. {
  48. uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
  49. This parameter must be set to a value lower than 400kHz */
  50. uint16_t I2C_Mode; /*!< Specifies the I2C mode.
  51. This parameter can be a value of @ref I2C_mode */
  52. uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
  53. This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
  54. uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
  55. This parameter can be a 7-bit or 10-bit address. */
  56. uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
  57. This parameter can be a value of @ref I2C_acknowledgement */
  58. uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
  59. This parameter can be a value of @ref I2C_acknowledged_address */
  60. }I2C_InitTypeDef;
  61. /* Exported constants --------------------------------------------------------*/
  62. /** @defgroup I2C_Exported_Constants
  63. * @{
  64. */
  65. #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
  66. ((PERIPH) == I2C2) || \
  67. ((PERIPH) == I2C3))
  68. /** @defgroup I2C_Digital_Filter
  69. * @{
  70. */
  71. #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
  72. /**
  73. * @}
  74. */
  75. /** @defgroup I2C_mode
  76. * @{
  77. */
  78. #define I2C_Mode_I2C ((uint16_t)0x0000)
  79. #define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
  80. #define I2C_Mode_SMBusHost ((uint16_t)0x000A)
  81. #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
  82. ((MODE) == I2C_Mode_SMBusDevice) || \
  83. ((MODE) == I2C_Mode_SMBusHost))
  84. /**
  85. * @}
  86. */
  87. /** @defgroup I2C_duty_cycle_in_fast_mode
  88. * @{
  89. */
  90. #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
  91. #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
  92. #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
  93. ((CYCLE) == I2C_DutyCycle_2))
  94. /**
  95. * @}
  96. */
  97. /** @defgroup I2C_acknowledgement
  98. * @{
  99. */
  100. #define I2C_Ack_Enable ((uint16_t)0x0400)
  101. #define I2C_Ack_Disable ((uint16_t)0x0000)
  102. #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
  103. ((STATE) == I2C_Ack_Disable))
  104. /**
  105. * @}
  106. */
  107. /** @defgroup I2C_transfer_direction
  108. * @{
  109. */
  110. #define I2C_Direction_Transmitter ((uint8_t)0x00)
  111. #define I2C_Direction_Receiver ((uint8_t)0x01)
  112. #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
  113. ((DIRECTION) == I2C_Direction_Receiver))
  114. /**
  115. * @}
  116. */
  117. /** @defgroup I2C_acknowledged_address
  118. * @{
  119. */
  120. #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
  121. #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
  122. #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
  123. ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
  124. /**
  125. * @}
  126. */
  127. /** @defgroup I2C_registers
  128. * @{
  129. */
  130. #define I2C_Register_CR1 ((uint8_t)0x00)
  131. #define I2C_Register_CR2 ((uint8_t)0x04)
  132. #define I2C_Register_OAR1 ((uint8_t)0x08)
  133. #define I2C_Register_OAR2 ((uint8_t)0x0C)
  134. #define I2C_Register_DR ((uint8_t)0x10)
  135. #define I2C_Register_SR1 ((uint8_t)0x14)
  136. #define I2C_Register_SR2 ((uint8_t)0x18)
  137. #define I2C_Register_CCR ((uint8_t)0x1C)
  138. #define I2C_Register_TRISE ((uint8_t)0x20)
  139. #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
  140. ((REGISTER) == I2C_Register_CR2) || \
  141. ((REGISTER) == I2C_Register_OAR1) || \
  142. ((REGISTER) == I2C_Register_OAR2) || \
  143. ((REGISTER) == I2C_Register_DR) || \
  144. ((REGISTER) == I2C_Register_SR1) || \
  145. ((REGISTER) == I2C_Register_SR2) || \
  146. ((REGISTER) == I2C_Register_CCR) || \
  147. ((REGISTER) == I2C_Register_TRISE))
  148. /**
  149. * @}
  150. */
  151. /** @defgroup I2C_NACK_position
  152. * @{
  153. */
  154. #define I2C_NACKPosition_Next ((uint16_t)0x0800)
  155. #define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
  156. #define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \
  157. ((POSITION) == I2C_NACKPosition_Current))
  158. /**
  159. * @}
  160. */
  161. /** @defgroup I2C_SMBus_alert_pin_level
  162. * @{
  163. */
  164. #define I2C_SMBusAlert_Low ((uint16_t)0x2000)
  165. #define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
  166. #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
  167. ((ALERT) == I2C_SMBusAlert_High))
  168. /**
  169. * @}
  170. */
  171. /** @defgroup I2C_PEC_position
  172. * @{
  173. */
  174. #define I2C_PECPosition_Next ((uint16_t)0x0800)
  175. #define I2C_PECPosition_Current ((uint16_t)0xF7FF)
  176. #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
  177. ((POSITION) == I2C_PECPosition_Current))
  178. /**
  179. * @}
  180. */
  181. /** @defgroup I2C_interrupts_definition
  182. * @{
  183. */
  184. #define I2C_IT_BUF ((uint16_t)0x0400)
  185. #define I2C_IT_EVT ((uint16_t)0x0200)
  186. #define I2C_IT_ERR ((uint16_t)0x0100)
  187. #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
  188. /**
  189. * @}
  190. */
  191. /** @defgroup I2C_interrupts_definition
  192. * @{
  193. */
  194. #define I2C_IT_SMBALERT ((uint32_t)0x01008000)
  195. #define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
  196. #define I2C_IT_PECERR ((uint32_t)0x01001000)
  197. #define I2C_IT_OVR ((uint32_t)0x01000800)
  198. #define I2C_IT_AF ((uint32_t)0x01000400)
  199. #define I2C_IT_ARLO ((uint32_t)0x01000200)
  200. #define I2C_IT_BERR ((uint32_t)0x01000100)
  201. #define I2C_IT_TXE ((uint32_t)0x06000080)
  202. #define I2C_IT_RXNE ((uint32_t)0x06000040)
  203. #define I2C_IT_STOPF ((uint32_t)0x02000010)
  204. #define I2C_IT_ADD10 ((uint32_t)0x02000008)
  205. #define I2C_IT_BTF ((uint32_t)0x02000004)
  206. #define I2C_IT_ADDR ((uint32_t)0x02000002)
  207. #define I2C_IT_SB ((uint32_t)0x02000001)
  208. #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
  209. #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
  210. ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
  211. ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
  212. ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
  213. ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
  214. ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
  215. ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
  216. /**
  217. * @}
  218. */
  219. /** @defgroup I2C_flags_definition
  220. * @{
  221. */
  222. /**
  223. * @brief SR2 register flags
  224. */
  225. #define I2C_FLAG_DUALF ((uint32_t)0x00800000)
  226. #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
  227. #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
  228. #define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
  229. #define I2C_FLAG_TRA ((uint32_t)0x00040000)
  230. #define I2C_FLAG_BUSY ((uint32_t)0x00020000)
  231. #define I2C_FLAG_MSL ((uint32_t)0x00010000)
  232. /**
  233. * @brief SR1 register flags
  234. */
  235. #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
  236. #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
  237. #define I2C_FLAG_PECERR ((uint32_t)0x10001000)
  238. #define I2C_FLAG_OVR ((uint32_t)0x10000800)
  239. #define I2C_FLAG_AF ((uint32_t)0x10000400)
  240. #define I2C_FLAG_ARLO ((uint32_t)0x10000200)
  241. #define I2C_FLAG_BERR ((uint32_t)0x10000100)
  242. #define I2C_FLAG_TXE ((uint32_t)0x10000080)
  243. #define I2C_FLAG_RXNE ((uint32_t)0x10000040)
  244. #define I2C_FLAG_STOPF ((uint32_t)0x10000010)
  245. #define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
  246. #define I2C_FLAG_BTF ((uint32_t)0x10000004)
  247. #define I2C_FLAG_ADDR ((uint32_t)0x10000002)
  248. #define I2C_FLAG_SB ((uint32_t)0x10000001)
  249. #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
  250. #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
  251. ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
  252. ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
  253. ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
  254. ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
  255. ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
  256. ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
  257. ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
  258. ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
  259. ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
  260. ((FLAG) == I2C_FLAG_SB))
  261. /**
  262. * @}
  263. */
  264. /** @defgroup I2C_Events
  265. * @{
  266. */
  267. /**
  268. ===============================================================================
  269. I2C Master Events (Events grouped in order of communication)
  270. ===============================================================================
  271. */
  272. /**
  273. * @brief Communication start
  274. *
  275. * After sending the START condition (I2C_GenerateSTART() function) the master
  276. * has to wait for this event. It means that the Start condition has been correctly
  277. * released on the I2C bus (the bus is free, no other devices is communicating).
  278. *
  279. */
  280. /* --EV5 */
  281. #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
  282. /**
  283. * @brief Address Acknowledge
  284. *
  285. * After checking on EV5 (start condition correctly released on the bus), the
  286. * master sends the address of the slave(s) with which it will communicate
  287. * (I2C_Send7bitAddress() function, it also determines the direction of the communication:
  288. * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges
  289. * his address. If an acknowledge is sent on the bus, one of the following events will
  290. * be set:
  291. *
  292. * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
  293. * event is set.
  294. *
  295. * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
  296. * is set
  297. *
  298. * 3) In case of 10-Bit addressing mode, the master (just after generating the START
  299. * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData()
  300. * function). Then master should wait on EV9. It means that the 10-bit addressing
  301. * header has been correctly sent on the bus. Then master should send the second part of
  302. * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master
  303. * should wait for event EV6.
  304. *
  305. */
  306. /* --EV6 */
  307. #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
  308. #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
  309. /* --EV9 */
  310. #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
  311. /**
  312. * @brief Communication events
  313. *
  314. * If a communication is established (START condition generated and slave address
  315. * acknowledged) then the master has to check on one of the following events for
  316. * communication procedures:
  317. *
  318. * 1) Master Receiver mode: The master has to wait on the event EV7 then to read
  319. * the data received from the slave (I2C_ReceiveData() function).
  320. *
  321. * 2) Master Transmitter mode: The master has to send data (I2C_SendData()
  322. * function) then to wait on event EV8 or EV8_2.
  323. * These two events are similar:
  324. * - EV8 means that the data has been written in the data register and is
  325. * being shifted out.
  326. * - EV8_2 means that the data has been physically shifted out and output
  327. * on the bus.
  328. * In most cases, using EV8 is sufficient for the application.
  329. * Using EV8_2 leads to a slower communication but ensure more reliable test.
  330. * EV8_2 is also more suitable than EV8 for testing on the last data transmission
  331. * (before Stop condition generation).
  332. *
  333. * @note In case the user software does not guarantee that this event EV7 is
  334. * managed before the current byte end of transfer, then user may check on EV7
  335. * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).
  336. * In this case the communication may be slower.
  337. *
  338. */
  339. /* Master RECEIVER mode -----------------------------*/
  340. /* --EV7 */
  341. #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
  342. /* Master TRANSMITTER mode --------------------------*/
  343. /* --EV8 */
  344. #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
  345. /* --EV8_2 */
  346. #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
  347. /**
  348. ===============================================================================
  349. I2C Slave Events (Events grouped in order of communication)
  350. ===============================================================================
  351. */
  352. /**
  353. * @brief Communication start events
  354. *
  355. * Wait on one of these events at the start of the communication. It means that
  356. * the I2C peripheral detected a Start condition on the bus (generated by master
  357. * device) followed by the peripheral address. The peripheral generates an ACK
  358. * condition on the bus (if the acknowledge feature is enabled through function
  359. * I2C_AcknowledgeConfig()) and the events listed above are set :
  360. *
  361. * 1) In normal case (only one address managed by the slave), when the address
  362. * sent by the master matches the own address of the peripheral (configured by
  363. * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
  364. * (where XXX could be TRANSMITTER or RECEIVER).
  365. *
  366. * 2) In case the address sent by the master matches the second address of the
  367. * peripheral (configured by the function I2C_OwnAddress2Config() and enabled
  368. * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED
  369. * (where XXX could be TRANSMITTER or RECEIVER) are set.
  370. *
  371. * 3) In case the address sent by the master is General Call (address 0x00) and
  372. * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
  373. * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
  374. *
  375. */
  376. /* --EV1 (all the events below are variants of EV1) */
  377. /* 1) Case of One Single Address managed by the slave */
  378. #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
  379. #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
  380. /* 2) Case of Dual address managed by the slave */
  381. #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
  382. #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
  383. /* 3) Case of General Call enabled for the slave */
  384. #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
  385. /**
  386. * @brief Communication events
  387. *
  388. * Wait on one of these events when EV1 has already been checked and:
  389. *
  390. * - Slave RECEIVER mode:
  391. * - EV2: When the application is expecting a data byte to be received.
  392. * - EV4: When the application is expecting the end of the communication: master
  393. * sends a stop condition and data transmission is stopped.
  394. *
  395. * - Slave Transmitter mode:
  396. * - EV3: When a byte has been transmitted by the slave and the application is expecting
  397. * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
  398. * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be
  399. * used when the user software doesn't guarantee the EV3 is managed before the
  400. * current byte end of transfer.
  401. * - EV3_2: When the master sends a NACK in order to tell slave that data transmission
  402. * shall end (before sending the STOP condition). In this case slave has to stop sending
  403. * data bytes and expect a Stop condition on the bus.
  404. *
  405. * @note In case the user software does not guarantee that the event EV2 is
  406. * managed before the current byte end of transfer, then user may check on EV2
  407. * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).
  408. * In this case the communication may be slower.
  409. *
  410. */
  411. /* Slave RECEIVER mode --------------------------*/
  412. /* --EV2 */
  413. #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
  414. /* --EV4 */
  415. #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
  416. /* Slave TRANSMITTER mode -----------------------*/
  417. /* --EV3 */
  418. #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
  419. #define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
  420. /* --EV3_2 */
  421. #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
  422. /*
  423. ===============================================================================
  424. End of Events Description
  425. ===============================================================================
  426. */
  427. #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
  428. ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
  429. ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
  430. ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
  431. ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
  432. ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
  433. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
  434. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
  435. ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
  436. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
  437. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
  438. ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
  439. ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
  440. ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
  441. ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
  442. ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
  443. ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
  444. ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
  445. ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
  446. ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
  447. /**
  448. * @}
  449. */
  450. /** @defgroup I2C_own_address1
  451. * @{
  452. */
  453. #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
  454. /**
  455. * @}
  456. */
  457. /** @defgroup I2C_clock_speed
  458. * @{
  459. */
  460. #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
  461. /**
  462. * @}
  463. */
  464. /**
  465. * @}
  466. */
  467. /* Exported macro ------------------------------------------------------------*/
  468. /* Exported functions --------------------------------------------------------*/
  469. /* Function used to set the I2C configuration to the default reset state *****/
  470. void I2C_DeInit(I2C_TypeDef* I2Cx);
  471. /* Initialization and Configuration functions *********************************/
  472. void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
  473. void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
  474. void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  475. void I2C_DigitalFilterConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DigitalFilter);
  476. void I2C_AnalogFilterCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  477. void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
  478. void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
  479. void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
  480. void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
  481. void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
  482. void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  483. void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  484. void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  485. void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  486. void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
  487. void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition);
  488. void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
  489. void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  490. /* Data transfers functions ***************************************************/
  491. void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
  492. uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
  493. /* PEC management functions ***************************************************/
  494. void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
  495. void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
  496. void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
  497. uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
  498. /* DMA transfers management functions *****************************************/
  499. void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  500. void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  501. /* Interrupts, events and flags management functions **************************/
  502. uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
  503. void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
  504. /*
  505. ===============================================================================
  506. I2C State Monitoring Functions
  507. ===============================================================================
  508. This I2C driver provides three different ways for I2C state monitoring
  509. depending on the application requirements and constraints:
  510. 1. Basic state monitoring (Using I2C_CheckEvent() function)
  511. -----------------------------------------------------------
  512. It compares the status registers (SR1 and SR2) content to a given event
  513. (can be the combination of one or more flags).
  514. It returns SUCCESS if the current status includes the given flags
  515. and returns ERROR if one or more flags are missing in the current status.
  516. - When to use
  517. - This function is suitable for most applications as well as for startup
  518. activity since the events are fully described in the product reference
  519. manual (RM0090).
  520. - It is also suitable for users who need to define their own events.
  521. - Limitations
  522. - If an error occurs (ie. error flags are set besides to the monitored
  523. flags), the I2C_CheckEvent() function may return SUCCESS despite
  524. the communication hold or corrupted real state.
  525. In this case, it is advised to use error interrupts to monitor
  526. the error events and handle them in the interrupt IRQ handler.
  527. Note
  528. For error management, it is advised to use the following functions:
  529. - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
  530. - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
  531. Where x is the peripheral instance (I2C1, I2C2 ...)
  532. - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the
  533. I2Cx_ER_IRQHandler() function in order to determine which error occurred.
  534. - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
  535. and/or I2C_GenerateStop() in order to clear the error flag and source
  536. and return to correct communication status.
  537. 2. Advanced state monitoring (Using the function I2C_GetLastEvent())
  538. --------------------------------------------------------------------
  539. Using the function I2C_GetLastEvent() which returns the image of both status
  540. registers in a single word (uint32_t) (Status Register 2 value is shifted left
  541. by 16 bits and concatenated to Status Register 1).
  542. - When to use
  543. - This function is suitable for the same applications above but it
  544. allows to overcome the mentioned limitation of I2C_GetFlagStatus()
  545. function.
  546. - The returned value could be compared to events already defined in
  547. this file or to custom values defined by user.
  548. This function is suitable when multiple flags are monitored at the
  549. same time.
  550. - At the opposite of I2C_CheckEvent() function, this function allows
  551. user to choose when an event is accepted (when all events flags are
  552. set and no other flags are set or just when the needed flags are set
  553. like I2C_CheckEvent() function.
  554. - Limitations
  555. - User may need to define his own events.
  556. - Same remark concerning the error management is applicable for this
  557. function if user decides to check only regular communication flags
  558. (and ignores error flags).
  559. 3. Flag-based state monitoring (Using the function I2C_GetFlagStatus())
  560. -----------------------------------------------------------------------
  561. Using the function I2C_GetFlagStatus() which simply returns the status of
  562. one single flag (ie. I2C_FLAG_RXNE ...).
  563. - When to use
  564. - This function could be used for specific applications or in debug
  565. phase.
  566. - It is suitable when only one flag checking is needed (most I2C
  567. events are monitored through multiple flags).
  568. - Limitations:
  569. - When calling this function, the Status register is accessed.
  570. Some flags are cleared when the status register is accessed.
  571. So checking the status of one Flag, may clear other ones.
  572. - Function may need to be called twice or more in order to monitor
  573. one single event.
  574. */
  575. /*
  576. ===============================================================================
  577. 1. Basic state monitoring
  578. ===============================================================================
  579. */
  580. ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
  581. /*
  582. ===============================================================================
  583. 2. Advanced state monitoring
  584. ===============================================================================
  585. */
  586. uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
  587. /*
  588. ===============================================================================
  589. 3. Flag-based state monitoring
  590. ===============================================================================
  591. */
  592. FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
  593. void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
  594. ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
  595. void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
  596. #ifdef __cplusplus
  597. }
  598. #endif
  599. #endif /*__STM32F4xx_I2C_H */
  600. /**
  601. * @}
  602. */
  603. /**
  604. * @}
  605. */
  606. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/