startup_stm32f40_41xxx.s 23 KB

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  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32f40_41xxx.s
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 06-March-2015
  7. * @brief STM32F40xxx/41xxx Devices vector table for Atollic TrueSTUDIO toolchain.
  8. * This module performs:
  9. * - Set the initial SP
  10. * - Set the initial PC == Reset_Handler,
  11. * - Set the vector table entries with the exceptions ISR address
  12. * - Configure the clock system and the external SRAM mounted on
  13. * STM324xG-EVAL board to be used as data memory (optional,
  14. * to be enabled by user)
  15. * - Branches to main in the C library (which eventually
  16. * calls main()).
  17. * After Reset the Cortex-M4 processor is in Thread mode,
  18. * priority is Privileged, and the Stack is set to Main.
  19. ******************************************************************************
  20. * @attention
  21. *
  22. * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  23. *
  24. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  25. * You may not use this file except in compliance with the License.
  26. * You may obtain a copy of the License at:
  27. *
  28. * http://www.st.com/software_license_agreement_liberty_v2
  29. *
  30. * Unless required by applicable law or agreed to in writing, software
  31. * distributed under the License is distributed on an "AS IS" BASIS,
  32. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  33. * See the License for the specific language governing permissions and
  34. * limitations under the License.
  35. *
  36. ******************************************************************************
  37. */
  38. .syntax unified
  39. .cpu cortex-m3
  40. .fpu softvfp
  41. .thumb
  42. .global g_pfnVectors
  43. .global Default_Handler
  44. /* start address for the initialization values of the .data section.
  45. defined in linker script */
  46. .word _sidata
  47. /* start address for the .data section. defined in linker script */
  48. .word _sdata
  49. /* end address for the .data section. defined in linker script */
  50. .word _edata
  51. /* start address for the .bss section. defined in linker script */
  52. .word _sbss
  53. /* end address for the .bss section. defined in linker script */
  54. .word _ebss
  55. /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  56. /**
  57. * @brief This is the code that gets called when the processor first
  58. * starts execution following a reset event. Only the absolutely
  59. * necessary set is performed, after which the application
  60. * supplied main() routine is called.
  61. * @param None
  62. * @retval : None
  63. */
  64. .section .text.Reset_Handler
  65. .weak Reset_Handler
  66. .type Reset_Handler, %function
  67. Reset_Handler:
  68. /* Copy the data segment initializers from flash to SRAM */
  69. movs r1, #0
  70. b LoopCopyDataInit
  71. CopyDataInit:
  72. ldr r3, =_sidata
  73. ldr r3, [r3, r1]
  74. str r3, [r0, r1]
  75. adds r1, r1, #4
  76. LoopCopyDataInit:
  77. ldr r0, =_sdata
  78. ldr r3, =_edata
  79. adds r2, r0, r1
  80. cmp r2, r3
  81. bcc CopyDataInit
  82. ldr r2, =_sbss
  83. b LoopFillZerobss
  84. /* Zero fill the bss segment. */
  85. FillZerobss:
  86. movs r3, #0
  87. str r3, [r2], #4
  88. LoopFillZerobss:
  89. ldr r3, = _ebss
  90. cmp r2, r3
  91. bcc FillZerobss
  92. /* Call the clock system intitialization function.*/
  93. bl SystemInit
  94. /* Call static constructors */
  95. bl __libc_init_array
  96. /* Call the application's entry point.*/
  97. bl main
  98. bx lr
  99. .size Reset_Handler, .-Reset_Handler
  100. /**
  101. * @brief This is the code that gets called when the processor receives an
  102. * unexpected interrupt. This simply enters an infinite loop, preserving
  103. * the system state for examination by a debugger.
  104. * @param None
  105. * @retval None
  106. */
  107. .section .text.Default_Handler,"ax",%progbits
  108. Default_Handler:
  109. Infinite_Loop:
  110. b Infinite_Loop
  111. .size Default_Handler, .-Default_Handler
  112. /******************************************************************************
  113. *
  114. * The minimal vector table for a Cortex M3. Note that the proper constructs
  115. * must be placed on this to ensure that it ends up at physical address
  116. * 0x0000.0000.
  117. *
  118. *******************************************************************************/
  119. .section .isr_vector,"a",%progbits
  120. .type g_pfnVectors, %object
  121. .size g_pfnVectors, .-g_pfnVectors
  122. g_pfnVectors:
  123. .word _estack
  124. .word Reset_Handler
  125. .word NMI_Handler
  126. .word HardFault_Handler
  127. .word MemManage_Handler
  128. .word BusFault_Handler
  129. .word UsageFault_Handler
  130. .word 0
  131. .word 0
  132. .word 0
  133. .word 0
  134. .word SVC_Handler
  135. .word DebugMon_Handler
  136. .word 0
  137. .word PendSV_Handler
  138. .word SysTick_Handler
  139. /* External Interrupts */
  140. .word WWDG_IRQHandler /* Window WatchDog */
  141. .word PVD_IRQHandler /* PVD through EXTI Line detection */
  142. .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  143. .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  144. .word FLASH_IRQHandler /* FLASH */
  145. .word RCC_IRQHandler /* RCC */
  146. .word EXTI0_IRQHandler /* EXTI Line0 */
  147. .word EXTI1_IRQHandler /* EXTI Line1 */
  148. .word EXTI2_IRQHandler /* EXTI Line2 */
  149. .word EXTI3_IRQHandler /* EXTI Line3 */
  150. .word EXTI4_IRQHandler /* EXTI Line4 */
  151. .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  152. .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  153. .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  154. .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  155. .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  156. .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  157. .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  158. .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  159. .word CAN1_TX_IRQHandler /* CAN1 TX */
  160. .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
  161. .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
  162. .word CAN1_SCE_IRQHandler /* CAN1 SCE */
  163. .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  164. .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
  165. .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
  166. .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
  167. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  168. .word TIM2_IRQHandler /* TIM2 */
  169. .word TIM3_IRQHandler /* TIM3 */
  170. .word TIM4_IRQHandler /* TIM4 */
  171. .word I2C1_EV_IRQHandler /* I2C1 Event */
  172. .word I2C1_ER_IRQHandler /* I2C1 Error */
  173. .word I2C2_EV_IRQHandler /* I2C2 Event */
  174. .word I2C2_ER_IRQHandler /* I2C2 Error */
  175. .word SPI1_IRQHandler /* SPI1 */
  176. .word SPI2_IRQHandler /* SPI2 */
  177. .word USART1_IRQHandler /* USART1 */
  178. .word USART2_IRQHandler /* USART2 */
  179. .word USART3_IRQHandler /* USART3 */
  180. .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  181. .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  182. .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
  183. .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
  184. .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
  185. .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
  186. .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
  187. .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  188. .word FSMC_IRQHandler /* FSMC */
  189. .word SDIO_IRQHandler /* SDIO */
  190. .word TIM5_IRQHandler /* TIM5 */
  191. .word SPI3_IRQHandler /* SPI3 */
  192. .word UART4_IRQHandler /* UART4 */
  193. .word UART5_IRQHandler /* UART5 */
  194. .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
  195. .word TIM7_IRQHandler /* TIM7 */
  196. .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  197. .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  198. .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  199. .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  200. .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  201. .word ETH_IRQHandler /* Ethernet */
  202. .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
  203. .word CAN2_TX_IRQHandler /* CAN2 TX */
  204. .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
  205. .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
  206. .word CAN2_SCE_IRQHandler /* CAN2 SCE */
  207. .word OTG_FS_IRQHandler /* USB OTG FS */
  208. .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  209. .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  210. .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  211. .word USART6_IRQHandler /* USART6 */
  212. .word I2C3_EV_IRQHandler /* I2C3 event */
  213. .word I2C3_ER_IRQHandler /* I2C3 error */
  214. .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
  215. .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
  216. .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
  217. .word OTG_HS_IRQHandler /* USB OTG HS */
  218. .word DCMI_IRQHandler /* DCMI */
  219. .word CRYP_IRQHandler /* CRYP crypto */
  220. .word HASH_RNG_IRQHandler /* Hash and Rng */
  221. .word FPU_IRQHandler /* FPU */
  222. /*******************************************************************************
  223. *
  224. * Provide weak aliases for each Exception handler to the Default_Handler.
  225. * As they are weak aliases, any function with the same name will override
  226. * this definition.
  227. *
  228. *******************************************************************************/
  229. .weak NMI_Handler
  230. .thumb_set NMI_Handler,Default_Handler
  231. .weak HardFault_Handler
  232. .thumb_set HardFault_Handler,Default_Handler
  233. .weak MemManage_Handler
  234. .thumb_set MemManage_Handler,Default_Handler
  235. .weak BusFault_Handler
  236. .thumb_set BusFault_Handler,Default_Handler
  237. .weak UsageFault_Handler
  238. .thumb_set UsageFault_Handler,Default_Handler
  239. .weak SVC_Handler
  240. .thumb_set SVC_Handler,Default_Handler
  241. .weak DebugMon_Handler
  242. .thumb_set DebugMon_Handler,Default_Handler
  243. .weak PendSV_Handler
  244. .thumb_set PendSV_Handler,Default_Handler
  245. .weak SysTick_Handler
  246. .thumb_set SysTick_Handler,Default_Handler
  247. .weak WWDG_IRQHandler
  248. .thumb_set WWDG_IRQHandler,Default_Handler
  249. .weak PVD_IRQHandler
  250. .thumb_set PVD_IRQHandler,Default_Handler
  251. .weak TAMP_STAMP_IRQHandler
  252. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  253. .weak RTC_WKUP_IRQHandler
  254. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  255. .weak FLASH_IRQHandler
  256. .thumb_set FLASH_IRQHandler,Default_Handler
  257. .weak RCC_IRQHandler
  258. .thumb_set RCC_IRQHandler,Default_Handler
  259. .weak EXTI0_IRQHandler
  260. .thumb_set EXTI0_IRQHandler,Default_Handler
  261. .weak EXTI1_IRQHandler
  262. .thumb_set EXTI1_IRQHandler,Default_Handler
  263. .weak EXTI2_IRQHandler
  264. .thumb_set EXTI2_IRQHandler,Default_Handler
  265. .weak EXTI3_IRQHandler
  266. .thumb_set EXTI3_IRQHandler,Default_Handler
  267. .weak EXTI4_IRQHandler
  268. .thumb_set EXTI4_IRQHandler,Default_Handler
  269. .weak DMA1_Stream0_IRQHandler
  270. .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
  271. .weak DMA1_Stream1_IRQHandler
  272. .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
  273. .weak DMA1_Stream2_IRQHandler
  274. .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
  275. .weak DMA1_Stream3_IRQHandler
  276. .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
  277. .weak DMA1_Stream4_IRQHandler
  278. .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
  279. .weak DMA1_Stream5_IRQHandler
  280. .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
  281. .weak DMA1_Stream6_IRQHandler
  282. .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
  283. .weak ADC_IRQHandler
  284. .thumb_set ADC_IRQHandler,Default_Handler
  285. .weak CAN1_TX_IRQHandler
  286. .thumb_set CAN1_TX_IRQHandler,Default_Handler
  287. .weak CAN1_RX0_IRQHandler
  288. .thumb_set CAN1_RX0_IRQHandler,Default_Handler
  289. .weak CAN1_RX1_IRQHandler
  290. .thumb_set CAN1_RX1_IRQHandler,Default_Handler
  291. .weak CAN1_SCE_IRQHandler
  292. .thumb_set CAN1_SCE_IRQHandler,Default_Handler
  293. .weak EXTI9_5_IRQHandler
  294. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  295. .weak TIM1_BRK_TIM9_IRQHandler
  296. .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
  297. .weak TIM1_UP_TIM10_IRQHandler
  298. .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
  299. .weak TIM1_TRG_COM_TIM11_IRQHandler
  300. .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
  301. .weak TIM1_CC_IRQHandler
  302. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  303. .weak TIM2_IRQHandler
  304. .thumb_set TIM2_IRQHandler,Default_Handler
  305. .weak TIM3_IRQHandler
  306. .thumb_set TIM3_IRQHandler,Default_Handler
  307. .weak TIM4_IRQHandler
  308. .thumb_set TIM4_IRQHandler,Default_Handler
  309. .weak I2C1_EV_IRQHandler
  310. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  311. .weak I2C1_ER_IRQHandler
  312. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  313. .weak I2C2_EV_IRQHandler
  314. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  315. .weak I2C2_ER_IRQHandler
  316. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  317. .weak SPI1_IRQHandler
  318. .thumb_set SPI1_IRQHandler,Default_Handler
  319. .weak SPI2_IRQHandler
  320. .thumb_set SPI2_IRQHandler,Default_Handler
  321. .weak USART1_IRQHandler
  322. .thumb_set USART1_IRQHandler,Default_Handler
  323. .weak USART2_IRQHandler
  324. .thumb_set USART2_IRQHandler,Default_Handler
  325. .weak USART3_IRQHandler
  326. .thumb_set USART3_IRQHandler,Default_Handler
  327. .weak EXTI15_10_IRQHandler
  328. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  329. .weak RTC_Alarm_IRQHandler
  330. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  331. .weak OTG_FS_WKUP_IRQHandler
  332. .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
  333. .weak TIM8_BRK_TIM12_IRQHandler
  334. .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
  335. .weak TIM8_UP_TIM13_IRQHandler
  336. .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
  337. .weak TIM8_TRG_COM_TIM14_IRQHandler
  338. .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
  339. .weak TIM8_CC_IRQHandler
  340. .thumb_set TIM8_CC_IRQHandler,Default_Handler
  341. .weak DMA1_Stream7_IRQHandler
  342. .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
  343. .weak FSMC_IRQHandler
  344. .thumb_set FSMC_IRQHandler,Default_Handler
  345. .weak SDIO_IRQHandler
  346. .thumb_set SDIO_IRQHandler,Default_Handler
  347. .weak TIM5_IRQHandler
  348. .thumb_set TIM5_IRQHandler,Default_Handler
  349. .weak SPI3_IRQHandler
  350. .thumb_set SPI3_IRQHandler,Default_Handler
  351. .weak UART4_IRQHandler
  352. .thumb_set UART4_IRQHandler,Default_Handler
  353. .weak UART5_IRQHandler
  354. .thumb_set UART5_IRQHandler,Default_Handler
  355. .weak TIM6_DAC_IRQHandler
  356. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  357. .weak TIM7_IRQHandler
  358. .thumb_set TIM7_IRQHandler,Default_Handler
  359. .weak DMA2_Stream0_IRQHandler
  360. .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
  361. .weak DMA2_Stream1_IRQHandler
  362. .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
  363. .weak DMA2_Stream2_IRQHandler
  364. .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
  365. .weak DMA2_Stream3_IRQHandler
  366. .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
  367. .weak DMA2_Stream4_IRQHandler
  368. .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
  369. .weak ETH_IRQHandler
  370. .thumb_set ETH_IRQHandler,Default_Handler
  371. .weak ETH_WKUP_IRQHandler
  372. .thumb_set ETH_WKUP_IRQHandler,Default_Handler
  373. .weak CAN2_TX_IRQHandler
  374. .thumb_set CAN2_TX_IRQHandler,Default_Handler
  375. .weak CAN2_RX0_IRQHandler
  376. .thumb_set CAN2_RX0_IRQHandler,Default_Handler
  377. .weak CAN2_RX1_IRQHandler
  378. .thumb_set CAN2_RX1_IRQHandler,Default_Handler
  379. .weak CAN2_SCE_IRQHandler
  380. .thumb_set CAN2_SCE_IRQHandler,Default_Handler
  381. .weak OTG_FS_IRQHandler
  382. .thumb_set OTG_FS_IRQHandler,Default_Handler
  383. .weak DMA2_Stream5_IRQHandler
  384. .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
  385. .weak DMA2_Stream6_IRQHandler
  386. .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
  387. .weak DMA2_Stream7_IRQHandler
  388. .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
  389. .weak USART6_IRQHandler
  390. .thumb_set USART6_IRQHandler,Default_Handler
  391. .weak I2C3_EV_IRQHandler
  392. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  393. .weak I2C3_ER_IRQHandler
  394. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  395. .weak OTG_HS_EP1_OUT_IRQHandler
  396. .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
  397. .weak OTG_HS_EP1_IN_IRQHandler
  398. .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
  399. .weak OTG_HS_WKUP_IRQHandler
  400. .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
  401. .weak OTG_HS_IRQHandler
  402. .thumb_set OTG_HS_IRQHandler,Default_Handler
  403. .weak DCMI_IRQHandler
  404. .thumb_set DCMI_IRQHandler,Default_Handler
  405. .weak CRYP_IRQHandler
  406. .thumb_set CRYP_IRQHandler,Default_Handler
  407. .weak HASH_RNG_IRQHandler
  408. .thumb_set HASH_RNG_IRQHandler,Default_Handler
  409. .weak FPU_IRQHandler
  410. .thumb_set FPU_IRQHandler,Default_Handler
  411. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/