STM32F40x.svd 1.8 MB

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  1. <?xml version="1.0" encoding="utf-8" standalone="no"?>
  2. <device schemaVersion="1.1"
  3. xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"
  4. xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
  5. <name>STM32F40x</name>
  6. <!-- modified by Keil 03.01.2017 -->
  7. <version>1.5</version>
  8. <description>STM32F40x</description>
  9. <!--Bus Interface Properties-->
  10. <!--Cortex-M4 is byte addressable-->
  11. <addressUnitBits>8</addressUnitBits>
  12. <!--the maximum data bit width accessible within a single transfer-->
  13. <width>32</width>
  14. <!--Register Default Properties-->
  15. <size>0x20</size>
  16. <resetValue>0x0</resetValue>
  17. <resetMask>0xFFFFFFFF</resetMask>
  18. <peripherals>
  19. <peripheral> <name>RNG</name>
  20. <description>Random number generator</description>
  21. <groupName>RNG</groupName>
  22. <baseAddress>0x50060800</baseAddress>
  23. <addressBlock>
  24. <offset>0x0</offset>
  25. <size>0x400</size>
  26. <usage>registers</usage>
  27. </addressBlock>
  28. <interrupt>
  29. <name>FPU</name>
  30. <description>FPU interrupt</description>
  31. <value>81</value>
  32. </interrupt>
  33. <registers>
  34. <register> <name>CR</name>
  35. <displayName>CR</displayName>
  36. <description>control register</description>
  37. <addressOffset>0x0</addressOffset>
  38. <size>0x20</size>
  39. <access>read-write</access>
  40. <resetValue>0x00000000</resetValue>
  41. <fields>
  42. <field> <name>IE</name>
  43. <description>Interrupt enable</description>
  44. <bitOffset>3</bitOffset>
  45. <bitWidth>1</bitWidth>
  46. </field>
  47. <field> <name>RNGEN</name>
  48. <description>Random number generator enable</description>
  49. <bitOffset>2</bitOffset>
  50. <bitWidth>1</bitWidth>
  51. </field>
  52. </fields>
  53. </register>
  54. <register> <name>SR</name>
  55. <displayName>SR</displayName>
  56. <description>status register</description>
  57. <addressOffset>0x4</addressOffset>
  58. <size>0x20</size>
  59. <resetValue>0x00000000</resetValue>
  60. <fields>
  61. <field> <name>SEIS</name>
  62. <description>Seed error interrupt status</description>
  63. <bitOffset>6</bitOffset>
  64. <bitWidth>1</bitWidth>
  65. <access>read-write</access>
  66. </field>
  67. <field> <name>CEIS</name>
  68. <description>Clock error interrupt status</description>
  69. <bitOffset>5</bitOffset>
  70. <bitWidth>1</bitWidth>
  71. <access>read-write</access>
  72. </field>
  73. <field> <name>SECS</name>
  74. <description>Seed error current status</description>
  75. <bitOffset>2</bitOffset>
  76. <bitWidth>1</bitWidth>
  77. <access>read-only</access>
  78. </field>
  79. <field> <name>CECS</name>
  80. <description>Clock error current status</description>
  81. <bitOffset>1</bitOffset>
  82. <bitWidth>1</bitWidth>
  83. <access>read-only</access>
  84. </field>
  85. <field> <name>DRDY</name>
  86. <description>Data ready</description>
  87. <bitOffset>0</bitOffset>
  88. <bitWidth>1</bitWidth>
  89. <access>read-only</access>
  90. </field>
  91. </fields>
  92. </register>
  93. <register> <name>DR</name>
  94. <displayName>DR</displayName>
  95. <description>data register</description>
  96. <addressOffset>0x8</addressOffset>
  97. <size>0x20</size>
  98. <access>read-only</access>
  99. <resetValue>0x00000000</resetValue>
  100. <fields>
  101. <field> <name>RNDATA</name>
  102. <description>Random data</description>
  103. <bitOffset>0</bitOffset>
  104. <bitWidth>32</bitWidth>
  105. </field>
  106. </fields>
  107. </register>
  108. </registers>
  109. </peripheral>
  110. <peripheral> <name>DCMI</name>
  111. <description>Digital camera interface</description>
  112. <groupName>DCMI</groupName>
  113. <baseAddress>0x50050000</baseAddress>
  114. <addressBlock>
  115. <offset>0x0</offset>
  116. <size>0x400</size>
  117. <usage>registers</usage>
  118. </addressBlock>
  119. <interrupt>
  120. <name>DCMI</name>
  121. <description>DCMI global interrupt</description>
  122. <value>78</value>
  123. </interrupt>
  124. <registers>
  125. <register> <name>CR</name>
  126. <displayName>CR</displayName>
  127. <description>control register 1</description>
  128. <addressOffset>0x0</addressOffset>
  129. <size>0x20</size>
  130. <access>read-write</access>
  131. <resetValue>0x0000</resetValue>
  132. <fields>
  133. <field> <name>ENABLE</name>
  134. <description>DCMI enable</description>
  135. <bitOffset>14</bitOffset>
  136. <bitWidth>1</bitWidth>
  137. </field>
  138. <field> <name>EDM</name>
  139. <description>Extended data mode</description>
  140. <bitOffset>10</bitOffset>
  141. <bitWidth>2</bitWidth>
  142. </field>
  143. <field> <name>FCRC</name>
  144. <description>Frame capture rate control</description>
  145. <bitOffset>8</bitOffset>
  146. <bitWidth>2</bitWidth>
  147. </field>
  148. <field> <name>VSPOL</name>
  149. <description>Vertical synchronization polarity</description>
  150. <bitOffset>7</bitOffset>
  151. <bitWidth>1</bitWidth>
  152. </field>
  153. <field> <name>HSPOL</name>
  154. <description>Horizontal synchronization polarity</description>
  155. <bitOffset>6</bitOffset>
  156. <bitWidth>1</bitWidth>
  157. </field>
  158. <field> <name>PCKPOL</name>
  159. <description>Pixel clock polarity</description>
  160. <bitOffset>5</bitOffset>
  161. <bitWidth>1</bitWidth>
  162. </field>
  163. <field> <name>ESS</name>
  164. <description>Embedded synchronization select</description>
  165. <bitOffset>4</bitOffset>
  166. <bitWidth>1</bitWidth>
  167. </field>
  168. <field> <name>JPEG</name>
  169. <description>JPEG format</description>
  170. <bitOffset>3</bitOffset>
  171. <bitWidth>1</bitWidth>
  172. </field>
  173. <field> <name>CROP</name>
  174. <description>Crop feature</description>
  175. <bitOffset>2</bitOffset>
  176. <bitWidth>1</bitWidth>
  177. </field>
  178. <field> <name>CM</name>
  179. <description>Capture mode</description>
  180. <bitOffset>1</bitOffset>
  181. <bitWidth>1</bitWidth>
  182. </field>
  183. <field> <name>CAPTURE</name>
  184. <description>Capture enable</description>
  185. <bitOffset>0</bitOffset>
  186. <bitWidth>1</bitWidth>
  187. </field>
  188. </fields>
  189. </register>
  190. <register> <name>SR</name>
  191. <displayName>SR</displayName>
  192. <description>status register</description>
  193. <addressOffset>0x4</addressOffset>
  194. <size>0x20</size>
  195. <access>read-only</access>
  196. <resetValue>0x0000</resetValue>
  197. <fields>
  198. <field> <name>FNE</name>
  199. <description>FIFO not empty</description>
  200. <bitOffset>2</bitOffset>
  201. <bitWidth>1</bitWidth>
  202. </field>
  203. <field> <name>VSYNC</name>
  204. <description>VSYNC</description>
  205. <bitOffset>1</bitOffset>
  206. <bitWidth>1</bitWidth>
  207. </field>
  208. <field> <name>HSYNC</name>
  209. <description>HSYNC</description>
  210. <bitOffset>0</bitOffset>
  211. <bitWidth>1</bitWidth>
  212. </field>
  213. </fields>
  214. </register>
  215. <register> <name>RIS</name>
  216. <displayName>RIS</displayName>
  217. <description>raw interrupt status register</description>
  218. <addressOffset>0x8</addressOffset>
  219. <size>0x20</size>
  220. <access>read-only</access>
  221. <resetValue>0x0000</resetValue>
  222. <fields>
  223. <field> <name>LINE_RIS</name>
  224. <description>Line raw interrupt status</description>
  225. <bitOffset>4</bitOffset>
  226. <bitWidth>1</bitWidth>
  227. </field>
  228. <field> <name>VSYNC_RIS</name>
  229. <description>VSYNC raw interrupt status</description>
  230. <bitOffset>3</bitOffset>
  231. <bitWidth>1</bitWidth>
  232. </field>
  233. <field> <name>ERR_RIS</name>
  234. <description>Synchronization error raw interrupt status</description>
  235. <bitOffset>2</bitOffset>
  236. <bitWidth>1</bitWidth>
  237. </field>
  238. <field> <name>OVR_RIS</name>
  239. <description>Overrun raw interrupt
  240. status</description>
  241. <bitOffset>1</bitOffset>
  242. <bitWidth>1</bitWidth>
  243. </field>
  244. <field> <name>FRAME_RIS</name>
  245. <description>Capture complete raw interrupt
  246. status</description>
  247. <bitOffset>0</bitOffset>
  248. <bitWidth>1</bitWidth>
  249. </field>
  250. </fields>
  251. </register>
  252. <register> <name>IER</name>
  253. <displayName>IER</displayName>
  254. <description>interrupt enable register</description>
  255. <addressOffset>0xC</addressOffset>
  256. <size>0x20</size>
  257. <access>read-write</access>
  258. <resetValue>0x0000</resetValue>
  259. <fields>
  260. <field> <name>LINE_IE</name>
  261. <description>Line interrupt enable</description>
  262. <bitOffset>4</bitOffset>
  263. <bitWidth>1</bitWidth>
  264. </field>
  265. <field> <name>VSYNC_IE</name>
  266. <description>VSYNC interrupt enable</description>
  267. <bitOffset>3</bitOffset>
  268. <bitWidth>1</bitWidth>
  269. </field>
  270. <field> <name>ERR_IE</name>
  271. <description>Synchronization error interrupt
  272. enable</description>
  273. <bitOffset>2</bitOffset>
  274. <bitWidth>1</bitWidth>
  275. </field>
  276. <field> <name>OVR_IE</name>
  277. <description>Overrun interrupt enable</description>
  278. <bitOffset>1</bitOffset>
  279. <bitWidth>1</bitWidth>
  280. </field>
  281. <field> <name>FRAME_IE</name>
  282. <description>Capture complete interrupt enable</description>
  283. <bitOffset>0</bitOffset>
  284. <bitWidth>1</bitWidth>
  285. </field>
  286. </fields>
  287. </register>
  288. <register> <name>MIS</name>
  289. <displayName>MIS</displayName>
  290. <description>masked interrupt status register</description>
  291. <addressOffset>0x10</addressOffset>
  292. <size>0x20</size>
  293. <access>read-only</access>
  294. <resetValue>0x0000</resetValue>
  295. <fields>
  296. <field> <name>LINE_MIS</name>
  297. <description>Line masked interrupt status</description>
  298. <bitOffset>4</bitOffset>
  299. <bitWidth>1</bitWidth>
  300. </field>
  301. <field> <name>VSYNC_MIS</name>
  302. <description>VSYNC masked interrupt status</description>
  303. <bitOffset>3</bitOffset>
  304. <bitWidth>1</bitWidth>
  305. </field>
  306. <field> <name>ERR_MIS</name>
  307. <description>Synchronization error masked interrupt status</description>
  308. <bitOffset>2</bitOffset>
  309. <bitWidth>1</bitWidth>
  310. </field>
  311. <field> <name>OVR_MIS</name>
  312. <description>Overrun masked interrupt status</description>
  313. <bitOffset>1</bitOffset>
  314. <bitWidth>1</bitWidth>
  315. </field>
  316. <field> <name>FRAME_MIS</name>
  317. <description>Capture complete masked interrupt status</description>
  318. <bitOffset>0</bitOffset>
  319. <bitWidth>1</bitWidth>
  320. </field>
  321. </fields>
  322. </register>
  323. <register> <name>ICR</name>
  324. <displayName>ICR</displayName>
  325. <description>interrupt clear register</description>
  326. <addressOffset>0x14</addressOffset>
  327. <size>0x20</size>
  328. <access>write-only</access>
  329. <resetValue>0x0000</resetValue>
  330. <fields>
  331. <field> <name>LINE_ISC</name>
  332. <description>line interrupt status clear</description>
  333. <bitOffset>4</bitOffset>
  334. <bitWidth>1</bitWidth>
  335. </field>
  336. <field> <name>VSYNC_ISC</name>
  337. <description>Vertical synch interrupt status clear</description>
  338. <bitOffset>3</bitOffset>
  339. <bitWidth>1</bitWidth>
  340. </field>
  341. <field> <name>ERR_ISC</name>
  342. <description>Synchronization error interrupt status clear</description>
  343. <bitOffset>2</bitOffset>
  344. <bitWidth>1</bitWidth>
  345. </field>
  346. <field> <name>OVR_ISC</name>
  347. <description>Overrun interrupt status clear</description>
  348. <bitOffset>1</bitOffset>
  349. <bitWidth>1</bitWidth>
  350. </field>
  351. <field> <name>FRAME_ISC</name>
  352. <description>Capture complete interrupt status clear</description>
  353. <bitOffset>0</bitOffset>
  354. <bitWidth>1</bitWidth>
  355. </field>
  356. </fields>
  357. </register>
  358. <register> <name>ESCR</name>
  359. <displayName>ESCR</displayName>
  360. <description>embedded synchronization code register</description>
  361. <addressOffset>0x18</addressOffset>
  362. <size>0x20</size>
  363. <access>read-write</access>
  364. <resetValue>0x0000</resetValue>
  365. <fields>
  366. <field> <name>FEC</name>
  367. <description>Frame end delimiter code</description>
  368. <bitOffset>24</bitOffset>
  369. <bitWidth>8</bitWidth>
  370. </field>
  371. <field> <name>LEC</name>
  372. <description>Line end delimiter code</description>
  373. <bitOffset>16</bitOffset>
  374. <bitWidth>8</bitWidth>
  375. </field>
  376. <field> <name>LSC</name>
  377. <description>Line start delimiter code</description>
  378. <bitOffset>8</bitOffset>
  379. <bitWidth>8</bitWidth>
  380. </field>
  381. <field> <name>FSC</name>
  382. <description>Frame start delimiter code</description>
  383. <bitOffset>0</bitOffset>
  384. <bitWidth>8</bitWidth>
  385. </field>
  386. </fields>
  387. </register>
  388. <register> <name>ESUR</name>
  389. <displayName>ESUR</displayName>
  390. <description>embedded synchronization unmask register</description>
  391. <addressOffset>0x1C</addressOffset>
  392. <size>0x20</size>
  393. <access>read-write</access>
  394. <resetValue>0x0000</resetValue>
  395. <fields>
  396. <field> <name>FEU</name>
  397. <description>Frame end delimiter unmask</description>
  398. <bitOffset>24</bitOffset>
  399. <bitWidth>8</bitWidth>
  400. </field>
  401. <field> <name>LEU</name>
  402. <description>Line end delimiter unmask</description>
  403. <bitOffset>16</bitOffset>
  404. <bitWidth>8</bitWidth>
  405. </field>
  406. <field> <name>LSU</name>
  407. <description>Line start delimiter unmask</description>
  408. <bitOffset>8</bitOffset>
  409. <bitWidth>8</bitWidth>
  410. </field>
  411. <field> <name>FSU</name>
  412. <description>Frame start delimiter unmask</description>
  413. <bitOffset>0</bitOffset>
  414. <bitWidth>8</bitWidth>
  415. </field>
  416. </fields>
  417. </register>
  418. <register> <name>CWSTRT</name>
  419. <displayName>CWSTRT</displayName>
  420. <description>crop window start</description>
  421. <addressOffset>0x20</addressOffset>
  422. <size>0x20</size>
  423. <access>read-write</access>
  424. <resetValue>0x0000</resetValue>
  425. <fields>
  426. <field> <name>VST</name>
  427. <description>Vertical start line count</description>
  428. <bitOffset>16</bitOffset>
  429. <bitWidth>13</bitWidth>
  430. </field>
  431. <field> <name>HOFFCNT</name>
  432. <description>Horizontal offset count</description>
  433. <bitOffset>0</bitOffset>
  434. <bitWidth>14</bitWidth>
  435. </field>
  436. </fields>
  437. </register>
  438. <register> <name>CWSIZE</name>
  439. <displayName>CWSIZE</displayName>
  440. <description>crop window size</description>
  441. <addressOffset>0x24</addressOffset>
  442. <size>0x20</size>
  443. <access>read-write</access>
  444. <resetValue>0x0000</resetValue>
  445. <fields>
  446. <field> <name>VLINE</name>
  447. <description>Vertical line count</description>
  448. <bitOffset>16</bitOffset>
  449. <bitWidth>14</bitWidth>
  450. </field>
  451. <field> <name>CAPCNT</name>
  452. <description>Capture count</description>
  453. <bitOffset>0</bitOffset>
  454. <bitWidth>14</bitWidth>
  455. </field>
  456. </fields>
  457. </register>
  458. <register> <name>DR</name>
  459. <displayName>DR</displayName>
  460. <description>data register</description>
  461. <addressOffset>0x28</addressOffset>
  462. <size>0x20</size>
  463. <access>read-only</access>
  464. <resetValue>0x0000</resetValue>
  465. <fields>
  466. <field> <name>Byte3</name>
  467. <description>Data byte 3</description>
  468. <bitOffset>24</bitOffset>
  469. <bitWidth>8</bitWidth>
  470. </field>
  471. <field> <name>Byte2</name>
  472. <description>Data byte 2</description>
  473. <bitOffset>16</bitOffset>
  474. <bitWidth>8</bitWidth>
  475. </field>
  476. <field> <name>Byte1</name>
  477. <description>Data byte 1</description>
  478. <bitOffset>8</bitOffset>
  479. <bitWidth>8</bitWidth>
  480. </field>
  481. <field> <name>Byte0</name>
  482. <description>Data byte 0</description>
  483. <bitOffset>0</bitOffset>
  484. <bitWidth>8</bitWidth>
  485. </field>
  486. </fields>
  487. </register>
  488. </registers>
  489. </peripheral>
  490. <peripheral> <name>FSMC</name>
  491. <description>Flexible static memory controller</description>
  492. <groupName>FSMC</groupName>
  493. <baseAddress>0xA0000000</baseAddress>
  494. <addressBlock>
  495. <offset>0x0</offset>
  496. <size>0x400</size>
  497. <usage>registers</usage>
  498. </addressBlock>
  499. <interrupt>
  500. <name>FSMC</name>
  501. <description>FSMC global interrupt</description>
  502. <value>48</value>
  503. </interrupt>
  504. <registers>
  505. <register> <name>BCR1</name>
  506. <displayName>BCR1</displayName>
  507. <description>SRAM/NOR-Flash chip-select control register 1</description>
  508. <addressOffset>0x0</addressOffset>
  509. <size>0x20</size>
  510. <access>read-write</access>
  511. <resetValue>0x000030D0</resetValue>
  512. <fields>
  513. <field> <name>CBURSTRW</name>
  514. <description>CBURSTRW</description>
  515. <bitOffset>19</bitOffset>
  516. <bitWidth>1</bitWidth>
  517. </field>
  518. <field> <name>ASYNCWAIT</name>
  519. <description>ASYNCWAIT</description>
  520. <bitOffset>15</bitOffset>
  521. <bitWidth>1</bitWidth>
  522. </field>
  523. <field> <name>EXTMOD</name>
  524. <description>EXTMOD</description>
  525. <bitOffset>14</bitOffset>
  526. <bitWidth>1</bitWidth>
  527. </field>
  528. <field> <name>WAITEN</name>
  529. <description>WAITEN</description>
  530. <bitOffset>13</bitOffset>
  531. <bitWidth>1</bitWidth>
  532. </field>
  533. <field> <name>WREN</name>
  534. <description>WREN</description>
  535. <bitOffset>12</bitOffset>
  536. <bitWidth>1</bitWidth>
  537. </field>
  538. <field> <name>WAITCFG</name>
  539. <description>WAITCFG</description>
  540. <bitOffset>11</bitOffset>
  541. <bitWidth>1</bitWidth>
  542. </field>
  543. <field> <name>WAITPOL</name>
  544. <description>WAITPOL</description>
  545. <bitOffset>9</bitOffset>
  546. <bitWidth>1</bitWidth>
  547. </field>
  548. <field> <name>BURSTEN</name>
  549. <description>BURSTEN</description>
  550. <bitOffset>8</bitOffset>
  551. <bitWidth>1</bitWidth>
  552. </field>
  553. <field> <name>FACCEN</name>
  554. <description>FACCEN</description>
  555. <bitOffset>6</bitOffset>
  556. <bitWidth>1</bitWidth>
  557. </field>
  558. <field> <name>MWID</name>
  559. <description>MWID</description>
  560. <bitOffset>4</bitOffset>
  561. <bitWidth>2</bitWidth>
  562. </field>
  563. <field> <name>MTYP</name>
  564. <description>MTYP</description>
  565. <bitOffset>2</bitOffset>
  566. <bitWidth>2</bitWidth>
  567. </field>
  568. <field> <name>MUXEN</name>
  569. <description>MUXEN</description>
  570. <bitOffset>1</bitOffset>
  571. <bitWidth>1</bitWidth>
  572. </field>
  573. <field> <name>MBKEN</name>
  574. <description>MBKEN</description>
  575. <bitOffset>0</bitOffset>
  576. <bitWidth>1</bitWidth>
  577. </field>
  578. </fields>
  579. </register>
  580. <register> <name>BTR1</name>
  581. <displayName>BTR1</displayName>
  582. <description>SRAM/NOR-Flash chip-select timing register 1</description>
  583. <addressOffset>0x4</addressOffset>
  584. <size>0x20</size>
  585. <access>read-write</access>
  586. <resetValue>0xFFFFFFFF</resetValue>
  587. <fields>
  588. <field> <name>ACCMOD</name>
  589. <description>ACCMOD</description>
  590. <bitOffset>28</bitOffset>
  591. <bitWidth>2</bitWidth>
  592. </field>
  593. <field> <name>DATLAT</name>
  594. <description>DATLAT</description>
  595. <bitOffset>24</bitOffset>
  596. <bitWidth>4</bitWidth>
  597. </field>
  598. <field> <name>CLKDIV</name>
  599. <description>CLKDIV</description>
  600. <bitOffset>20</bitOffset>
  601. <bitWidth>4</bitWidth>
  602. </field>
  603. <field> <name>BUSTURN</name>
  604. <description>BUSTURN</description>
  605. <bitOffset>16</bitOffset>
  606. <bitWidth>4</bitWidth>
  607. </field>
  608. <field> <name>DATAST</name>
  609. <description>DATAST</description>
  610. <bitOffset>8</bitOffset>
  611. <bitWidth>8</bitWidth>
  612. </field>
  613. <field> <name>ADDHLD</name>
  614. <description>ADDHLD</description>
  615. <bitOffset>4</bitOffset>
  616. <bitWidth>4</bitWidth>
  617. </field>
  618. <field> <name>ADDSET</name>
  619. <description>ADDSET</description>
  620. <bitOffset>0</bitOffset>
  621. <bitWidth>4</bitWidth>
  622. </field>
  623. </fields>
  624. </register>
  625. <register> <name>BCR2</name>
  626. <displayName>BCR2</displayName>
  627. <description>SRAM/NOR-Flash chip-select control register 2</description>
  628. <addressOffset>0x8</addressOffset>
  629. <size>0x20</size>
  630. <access>read-write</access>
  631. <resetValue>0x000030D0</resetValue>
  632. <fields>
  633. <field> <name>CBURSTRW</name>
  634. <description>CBURSTRW</description>
  635. <bitOffset>19</bitOffset>
  636. <bitWidth>1</bitWidth>
  637. </field>
  638. <field> <name>ASYNCWAIT</name>
  639. <description>ASYNCWAIT</description>
  640. <bitOffset>15</bitOffset>
  641. <bitWidth>1</bitWidth>
  642. </field>
  643. <field> <name>EXTMOD</name>
  644. <description>EXTMOD</description>
  645. <bitOffset>14</bitOffset>
  646. <bitWidth>1</bitWidth>
  647. </field>
  648. <field> <name>WAITEN</name>
  649. <description>WAITEN</description>
  650. <bitOffset>13</bitOffset>
  651. <bitWidth>1</bitWidth>
  652. </field>
  653. <field> <name>WREN</name>
  654. <description>WREN</description>
  655. <bitOffset>12</bitOffset>
  656. <bitWidth>1</bitWidth>
  657. </field>
  658. <field> <name>WAITCFG</name>
  659. <description>WAITCFG</description>
  660. <bitOffset>11</bitOffset>
  661. <bitWidth>1</bitWidth>
  662. </field>
  663. <field> <name>WRAPMOD</name>
  664. <description>WRAPMOD</description>
  665. <bitOffset>10</bitOffset>
  666. <bitWidth>1</bitWidth>
  667. </field>
  668. <field> <name>WAITPOL</name>
  669. <description>WAITPOL</description>
  670. <bitOffset>9</bitOffset>
  671. <bitWidth>1</bitWidth>
  672. </field>
  673. <field> <name>BURSTEN</name>
  674. <description>BURSTEN</description>
  675. <bitOffset>8</bitOffset>
  676. <bitWidth>1</bitWidth>
  677. </field>
  678. <field> <name>FACCEN</name>
  679. <description>FACCEN</description>
  680. <bitOffset>6</bitOffset>
  681. <bitWidth>1</bitWidth>
  682. </field>
  683. <field> <name>MWID</name>
  684. <description>MWID</description>
  685. <bitOffset>4</bitOffset>
  686. <bitWidth>2</bitWidth>
  687. </field>
  688. <field> <name>MTYP</name>
  689. <description>MTYP</description>
  690. <bitOffset>2</bitOffset>
  691. <bitWidth>2</bitWidth>
  692. </field>
  693. <field> <name>MUXEN</name>
  694. <description>MUXEN</description>
  695. <bitOffset>1</bitOffset>
  696. <bitWidth>1</bitWidth>
  697. </field>
  698. <field> <name>MBKEN</name>
  699. <description>MBKEN</description>
  700. <bitOffset>0</bitOffset>
  701. <bitWidth>1</bitWidth>
  702. </field>
  703. </fields>
  704. </register>
  705. <register> <name>BTR2</name>
  706. <displayName>BTR2</displayName>
  707. <description>SRAM/NOR-Flash chip-select timing register 2</description>
  708. <addressOffset>0xC</addressOffset>
  709. <size>0x20</size>
  710. <access>read-write</access>
  711. <resetValue>0xFFFFFFFF</resetValue>
  712. <fields>
  713. <field> <name>ACCMOD</name>
  714. <description>ACCMOD</description>
  715. <bitOffset>28</bitOffset>
  716. <bitWidth>2</bitWidth>
  717. </field>
  718. <field> <name>DATLAT</name>
  719. <description>DATLAT</description>
  720. <bitOffset>24</bitOffset>
  721. <bitWidth>4</bitWidth>
  722. </field>
  723. <field> <name>CLKDIV</name>
  724. <description>CLKDIV</description>
  725. <bitOffset>20</bitOffset>
  726. <bitWidth>4</bitWidth>
  727. </field>
  728. <field> <name>BUSTURN</name>
  729. <description>BUSTURN</description>
  730. <bitOffset>16</bitOffset>
  731. <bitWidth>4</bitWidth>
  732. </field>
  733. <field> <name>DATAST</name>
  734. <description>DATAST</description>
  735. <bitOffset>8</bitOffset>
  736. <bitWidth>8</bitWidth>
  737. </field>
  738. <field> <name>ADDHLD</name>
  739. <description>ADDHLD</description>
  740. <bitOffset>4</bitOffset>
  741. <bitWidth>4</bitWidth>
  742. </field>
  743. <field> <name>ADDSET</name>
  744. <description>ADDSET</description>
  745. <bitOffset>0</bitOffset>
  746. <bitWidth>4</bitWidth>
  747. </field>
  748. </fields>
  749. </register>
  750. <register> <name>BCR3</name>
  751. <displayName>BCR3</displayName>
  752. <description>SRAM/NOR-Flash chip-select control register 3</description>
  753. <addressOffset>0x10</addressOffset>
  754. <size>0x20</size>
  755. <access>read-write</access>
  756. <resetValue>0x000030D0</resetValue>
  757. <fields>
  758. <field> <name>CBURSTRW</name>
  759. <description>CBURSTRW</description>
  760. <bitOffset>19</bitOffset>
  761. <bitWidth>1</bitWidth>
  762. </field>
  763. <field> <name>ASYNCWAIT</name>
  764. <description>ASYNCWAIT</description>
  765. <bitOffset>15</bitOffset>
  766. <bitWidth>1</bitWidth>
  767. </field>
  768. <field> <name>EXTMOD</name>
  769. <description>EXTMOD</description>
  770. <bitOffset>14</bitOffset>
  771. <bitWidth>1</bitWidth>
  772. </field>
  773. <field> <name>WAITEN</name>
  774. <description>WAITEN</description>
  775. <bitOffset>13</bitOffset>
  776. <bitWidth>1</bitWidth>
  777. </field>
  778. <field> <name>WREN</name>
  779. <description>WREN</description>
  780. <bitOffset>12</bitOffset>
  781. <bitWidth>1</bitWidth>
  782. </field>
  783. <field> <name>WAITCFG</name>
  784. <description>WAITCFG</description>
  785. <bitOffset>11</bitOffset>
  786. <bitWidth>1</bitWidth>
  787. </field>
  788. <field> <name>WRAPMOD</name>
  789. <description>WRAPMOD</description>
  790. <bitOffset>10</bitOffset>
  791. <bitWidth>1</bitWidth>
  792. </field>
  793. <field> <name>WAITPOL</name>
  794. <description>WAITPOL</description>
  795. <bitOffset>9</bitOffset>
  796. <bitWidth>1</bitWidth>
  797. </field>
  798. <field> <name>BURSTEN</name>
  799. <description>BURSTEN</description>
  800. <bitOffset>8</bitOffset>
  801. <bitWidth>1</bitWidth>
  802. </field>
  803. <field> <name>FACCEN</name>
  804. <description>FACCEN</description>
  805. <bitOffset>6</bitOffset>
  806. <bitWidth>1</bitWidth>
  807. </field>
  808. <field> <name>MWID</name>
  809. <description>MWID</description>
  810. <bitOffset>4</bitOffset>
  811. <bitWidth>2</bitWidth>
  812. </field>
  813. <field> <name>MTYP</name>
  814. <description>MTYP</description>
  815. <bitOffset>2</bitOffset>
  816. <bitWidth>2</bitWidth>
  817. </field>
  818. <field> <name>MUXEN</name>
  819. <description>MUXEN</description>
  820. <bitOffset>1</bitOffset>
  821. <bitWidth>1</bitWidth>
  822. </field>
  823. <field> <name>MBKEN</name>
  824. <description>MBKEN</description>
  825. <bitOffset>0</bitOffset>
  826. <bitWidth>1</bitWidth>
  827. </field>
  828. </fields>
  829. </register>
  830. <register> <name>BTR3</name>
  831. <displayName>BTR3</displayName>
  832. <description>SRAM/NOR-Flash chip-select timing register 3</description>
  833. <addressOffset>0x14</addressOffset>
  834. <size>0x20</size>
  835. <access>read-write</access>
  836. <resetValue>0xFFFFFFFF</resetValue>
  837. <fields>
  838. <field> <name>ACCMOD</name>
  839. <description>ACCMOD</description>
  840. <bitOffset>28</bitOffset>
  841. <bitWidth>2</bitWidth>
  842. </field>
  843. <field> <name>DATLAT</name>
  844. <description>DATLAT</description>
  845. <bitOffset>24</bitOffset>
  846. <bitWidth>4</bitWidth>
  847. </field>
  848. <field> <name>CLKDIV</name>
  849. <description>CLKDIV</description>
  850. <bitOffset>20</bitOffset>
  851. <bitWidth>4</bitWidth>
  852. </field>
  853. <field> <name>BUSTURN</name>
  854. <description>BUSTURN</description>
  855. <bitOffset>16</bitOffset>
  856. <bitWidth>4</bitWidth>
  857. </field>
  858. <field> <name>DATAST</name>
  859. <description>DATAST</description>
  860. <bitOffset>8</bitOffset>
  861. <bitWidth>8</bitWidth>
  862. </field>
  863. <field> <name>ADDHLD</name>
  864. <description>ADDHLD</description>
  865. <bitOffset>4</bitOffset>
  866. <bitWidth>4</bitWidth>
  867. </field>
  868. <field> <name>ADDSET</name>
  869. <description>ADDSET</description>
  870. <bitOffset>0</bitOffset>
  871. <bitWidth>4</bitWidth>
  872. </field>
  873. </fields>
  874. </register>
  875. <register> <name>BCR4</name>
  876. <displayName>BCR4</displayName>
  877. <description>SRAM/NOR-Flash chip-select control register 4</description>
  878. <addressOffset>0x18</addressOffset>
  879. <size>0x20</size>
  880. <access>read-write</access>
  881. <resetValue>0x000030D0</resetValue>
  882. <fields>
  883. <field> <name>CBURSTRW</name>
  884. <description>CBURSTRW</description>
  885. <bitOffset>19</bitOffset>
  886. <bitWidth>1</bitWidth>
  887. </field>
  888. <field> <name>ASYNCWAIT</name>
  889. <description>ASYNCWAIT</description>
  890. <bitOffset>15</bitOffset>
  891. <bitWidth>1</bitWidth>
  892. </field>
  893. <field> <name>EXTMOD</name>
  894. <description>EXTMOD</description>
  895. <bitOffset>14</bitOffset>
  896. <bitWidth>1</bitWidth>
  897. </field>
  898. <field> <name>WAITEN</name>
  899. <description>WAITEN</description>
  900. <bitOffset>13</bitOffset>
  901. <bitWidth>1</bitWidth>
  902. </field>
  903. <field> <name>WREN</name>
  904. <description>WREN</description>
  905. <bitOffset>12</bitOffset>
  906. <bitWidth>1</bitWidth>
  907. </field>
  908. <field> <name>WAITCFG</name>
  909. <description>WAITCFG</description>
  910. <bitOffset>11</bitOffset>
  911. <bitWidth>1</bitWidth>
  912. </field>
  913. <field> <name>WRAPMOD</name>
  914. <description>WRAPMOD</description>
  915. <bitOffset>10</bitOffset>
  916. <bitWidth>1</bitWidth>
  917. </field>
  918. <field> <name>WAITPOL</name>
  919. <description>WAITPOL</description>
  920. <bitOffset>9</bitOffset>
  921. <bitWidth>1</bitWidth>
  922. </field>
  923. <field> <name>BURSTEN</name>
  924. <description>BURSTEN</description>
  925. <bitOffset>8</bitOffset>
  926. <bitWidth>1</bitWidth>
  927. </field>
  928. <field> <name>FACCEN</name>
  929. <description>FACCEN</description>
  930. <bitOffset>6</bitOffset>
  931. <bitWidth>1</bitWidth>
  932. </field>
  933. <field> <name>MWID</name>
  934. <description>MWID</description>
  935. <bitOffset>4</bitOffset>
  936. <bitWidth>2</bitWidth>
  937. </field>
  938. <field> <name>MTYP</name>
  939. <description>MTYP</description>
  940. <bitOffset>2</bitOffset>
  941. <bitWidth>2</bitWidth>
  942. </field>
  943. <field> <name>MUXEN</name>
  944. <description>MUXEN</description>
  945. <bitOffset>1</bitOffset>
  946. <bitWidth>1</bitWidth>
  947. </field>
  948. <field> <name>MBKEN</name>
  949. <description>MBKEN</description>
  950. <bitOffset>0</bitOffset>
  951. <bitWidth>1</bitWidth>
  952. </field>
  953. </fields>
  954. </register>
  955. <register> <name>BTR4</name>
  956. <displayName>BTR4</displayName>
  957. <description>SRAM/NOR-Flash chip-select timing register 4</description>
  958. <addressOffset>0x1C</addressOffset>
  959. <size>0x20</size>
  960. <access>read-write</access>
  961. <resetValue>0xFFFFFFFF</resetValue>
  962. <fields>
  963. <field> <name>ACCMOD</name>
  964. <description>ACCMOD</description>
  965. <bitOffset>28</bitOffset>
  966. <bitWidth>2</bitWidth>
  967. </field>
  968. <field> <name>DATLAT</name>
  969. <description>DATLAT</description>
  970. <bitOffset>24</bitOffset>
  971. <bitWidth>4</bitWidth>
  972. </field>
  973. <field> <name>CLKDIV</name>
  974. <description>CLKDIV</description>
  975. <bitOffset>20</bitOffset>
  976. <bitWidth>4</bitWidth>
  977. </field>
  978. <field> <name>BUSTURN</name>
  979. <description>BUSTURN</description>
  980. <bitOffset>16</bitOffset>
  981. <bitWidth>4</bitWidth>
  982. </field>
  983. <field> <name>DATAST</name>
  984. <description>DATAST</description>
  985. <bitOffset>8</bitOffset>
  986. <bitWidth>8</bitWidth>
  987. </field>
  988. <field> <name>ADDHLD</name>
  989. <description>ADDHLD</description>
  990. <bitOffset>4</bitOffset>
  991. <bitWidth>4</bitWidth>
  992. </field>
  993. <field> <name>ADDSET</name>
  994. <description>ADDSET</description>
  995. <bitOffset>0</bitOffset>
  996. <bitWidth>4</bitWidth>
  997. </field>
  998. </fields>
  999. </register>
  1000. <register> <name>PCR2</name>
  1001. <displayName>PCR2</displayName>
  1002. <description>PC Card/NAND Flash control register 2</description>
  1003. <addressOffset>0x60</addressOffset>
  1004. <size>0x20</size>
  1005. <access>read-write</access>
  1006. <resetValue>0x00000018</resetValue>
  1007. <fields>
  1008. <field> <name>ECCPS</name>
  1009. <description>ECCPS</description>
  1010. <bitOffset>17</bitOffset>
  1011. <bitWidth>3</bitWidth>
  1012. </field>
  1013. <field> <name>TAR</name>
  1014. <description>TAR</description>
  1015. <bitOffset>13</bitOffset>
  1016. <bitWidth>4</bitWidth>
  1017. </field>
  1018. <field> <name>TCLR</name>
  1019. <description>TCLR</description>
  1020. <bitOffset>9</bitOffset>
  1021. <bitWidth>4</bitWidth>
  1022. </field>
  1023. <field> <name>ECCEN</name>
  1024. <description>ECCEN</description>
  1025. <bitOffset>6</bitOffset>
  1026. <bitWidth>1</bitWidth>
  1027. </field>
  1028. <field> <name>PWID</name>
  1029. <description>PWID</description>
  1030. <bitOffset>4</bitOffset>
  1031. <bitWidth>2</bitWidth>
  1032. </field>
  1033. <field> <name>PTYP</name>
  1034. <description>PTYP</description>
  1035. <bitOffset>3</bitOffset>
  1036. <bitWidth>1</bitWidth>
  1037. </field>
  1038. <field> <name>PBKEN</name>
  1039. <description>PBKEN</description>
  1040. <bitOffset>2</bitOffset>
  1041. <bitWidth>1</bitWidth>
  1042. </field>
  1043. <field> <name>PWAITEN</name>
  1044. <description>PWAITEN</description>
  1045. <bitOffset>1</bitOffset>
  1046. <bitWidth>1</bitWidth>
  1047. </field>
  1048. </fields>
  1049. </register>
  1050. <register> <name>SR2</name>
  1051. <displayName>SR2</displayName>
  1052. <description>FIFO status and interrupt register 2</description>
  1053. <addressOffset>0x64</addressOffset>
  1054. <size>0x20</size>
  1055. <resetValue>0x00000040</resetValue>
  1056. <fields>
  1057. <field> <name>FEMPT</name>
  1058. <description>FEMPT</description>
  1059. <bitOffset>6</bitOffset>
  1060. <bitWidth>1</bitWidth>
  1061. <access>read-only</access>
  1062. </field>
  1063. <field> <name>IFEN</name>
  1064. <description>IFEN</description>
  1065. <bitOffset>5</bitOffset>
  1066. <bitWidth>1</bitWidth>
  1067. <access>read-write</access>
  1068. </field>
  1069. <field> <name>ILEN</name>
  1070. <description>ILEN</description>
  1071. <bitOffset>4</bitOffset>
  1072. <bitWidth>1</bitWidth>
  1073. <access>read-write</access>
  1074. </field>
  1075. <field> <name>IREN</name>
  1076. <description>IREN</description>
  1077. <bitOffset>3</bitOffset>
  1078. <bitWidth>1</bitWidth>
  1079. <access>read-write</access>
  1080. </field>
  1081. <field> <name>IFS</name>
  1082. <description>IFS</description>
  1083. <bitOffset>2</bitOffset>
  1084. <bitWidth>1</bitWidth>
  1085. <access>read-write</access>
  1086. </field>
  1087. <field> <name>ILS</name>
  1088. <description>ILS</description>
  1089. <bitOffset>1</bitOffset>
  1090. <bitWidth>1</bitWidth>
  1091. <access>read-write</access>
  1092. </field>
  1093. <field> <name>IRS</name>
  1094. <description>IRS</description>
  1095. <bitOffset>0</bitOffset>
  1096. <bitWidth>1</bitWidth>
  1097. <access>read-write</access>
  1098. </field>
  1099. </fields>
  1100. </register>
  1101. <register> <name>PMEM2</name>
  1102. <displayName>PMEM2</displayName>
  1103. <description>Common memory space timing register
  1104. 2</description>
  1105. <addressOffset>0x68</addressOffset>
  1106. <size>0x20</size>
  1107. <access>read-write</access>
  1108. <resetValue>0xFCFCFCFC</resetValue>
  1109. <fields>
  1110. <field> <name>MEMHIZx</name>
  1111. <description>MEMHIZx</description>
  1112. <bitOffset>24</bitOffset>
  1113. <bitWidth>8</bitWidth>
  1114. </field>
  1115. <field> <name>MEMHOLDx</name>
  1116. <description>MEMHOLDx</description>
  1117. <bitOffset>16</bitOffset>
  1118. <bitWidth>8</bitWidth>
  1119. </field>
  1120. <field> <name>MEMWAITx</name>
  1121. <description>MEMWAITx</description>
  1122. <bitOffset>8</bitOffset>
  1123. <bitWidth>8</bitWidth>
  1124. </field>
  1125. <field> <name>MEMSETx</name>
  1126. <description>MEMSETx</description>
  1127. <bitOffset>0</bitOffset>
  1128. <bitWidth>8</bitWidth>
  1129. </field>
  1130. </fields>
  1131. </register>
  1132. <register> <name>PATT2</name>
  1133. <displayName>PATT2</displayName>
  1134. <description>Attribute memory space timing register
  1135. 2</description>
  1136. <addressOffset>0x6C</addressOffset>
  1137. <size>0x20</size>
  1138. <access>read-write</access>
  1139. <resetValue>0xFCFCFCFC</resetValue>
  1140. <fields>
  1141. <field> <name>ATTHIZx</name>
  1142. <description>ATTHIZx</description>
  1143. <bitOffset>24</bitOffset>
  1144. <bitWidth>8</bitWidth>
  1145. </field>
  1146. <field> <name>ATTHOLDx</name>
  1147. <description>ATTHOLDx</description>
  1148. <bitOffset>16</bitOffset>
  1149. <bitWidth>8</bitWidth>
  1150. </field>
  1151. <field> <name>ATTWAITx</name>
  1152. <description>ATTWAITx</description>
  1153. <bitOffset>8</bitOffset>
  1154. <bitWidth>8</bitWidth>
  1155. </field>
  1156. <field> <name>ATTSETx</name>
  1157. <description>ATTSETx</description>
  1158. <bitOffset>0</bitOffset>
  1159. <bitWidth>8</bitWidth>
  1160. </field>
  1161. </fields>
  1162. </register>
  1163. <register> <name>ECCR2</name>
  1164. <displayName>ECCR2</displayName>
  1165. <description>ECC result register 2</description>
  1166. <addressOffset>0x74</addressOffset>
  1167. <size>0x20</size>
  1168. <access>read-only</access>
  1169. <resetValue>0x00000000</resetValue>
  1170. <fields>
  1171. <field> <name>ECCx</name>
  1172. <description>ECCx</description>
  1173. <bitOffset>0</bitOffset>
  1174. <bitWidth>32</bitWidth>
  1175. </field>
  1176. </fields>
  1177. </register>
  1178. <register> <name>PCR3</name>
  1179. <displayName>PCR3</displayName>
  1180. <description>PC Card/NAND Flash control register 3</description>
  1181. <addressOffset>0x80</addressOffset>
  1182. <size>0x20</size>
  1183. <access>read-write</access>
  1184. <resetValue>0x00000018</resetValue>
  1185. <fields>
  1186. <field> <name>ECCPS</name>
  1187. <description>ECCPS</description>
  1188. <bitOffset>17</bitOffset>
  1189. <bitWidth>3</bitWidth>
  1190. </field>
  1191. <field> <name>TAR</name>
  1192. <description>TAR</description>
  1193. <bitOffset>13</bitOffset>
  1194. <bitWidth>4</bitWidth>
  1195. </field>
  1196. <field> <name>TCLR</name>
  1197. <description>TCLR</description>
  1198. <bitOffset>9</bitOffset>
  1199. <bitWidth>4</bitWidth>
  1200. </field>
  1201. <field> <name>ECCEN</name>
  1202. <description>ECCEN</description>
  1203. <bitOffset>6</bitOffset>
  1204. <bitWidth>1</bitWidth>
  1205. </field>
  1206. <field> <name>PWID</name>
  1207. <description>PWID</description>
  1208. <bitOffset>4</bitOffset>
  1209. <bitWidth>2</bitWidth>
  1210. </field>
  1211. <field> <name>PTYP</name>
  1212. <description>PTYP</description>
  1213. <bitOffset>3</bitOffset>
  1214. <bitWidth>1</bitWidth>
  1215. </field>
  1216. <field> <name>PBKEN</name>
  1217. <description>PBKEN</description>
  1218. <bitOffset>2</bitOffset>
  1219. <bitWidth>1</bitWidth>
  1220. </field>
  1221. <field> <name>PWAITEN</name>
  1222. <description>PWAITEN</description>
  1223. <bitOffset>1</bitOffset>
  1224. <bitWidth>1</bitWidth>
  1225. </field>
  1226. </fields>
  1227. </register>
  1228. <register> <name>SR3</name>
  1229. <displayName>SR3</displayName>
  1230. <description>FIFO status and interrupt register
  1231. 3</description>
  1232. <addressOffset>0x84</addressOffset>
  1233. <size>0x20</size>
  1234. <resetValue>0x00000040</resetValue>
  1235. <fields>
  1236. <field> <name>FEMPT</name>
  1237. <description>FEMPT</description>
  1238. <bitOffset>6</bitOffset>
  1239. <bitWidth>1</bitWidth>
  1240. <access>read-only</access>
  1241. </field>
  1242. <field> <name>IFEN</name>
  1243. <description>IFEN</description>
  1244. <bitOffset>5</bitOffset>
  1245. <bitWidth>1</bitWidth>
  1246. <access>read-write</access>
  1247. </field>
  1248. <field> <name>ILEN</name>
  1249. <description>ILEN</description>
  1250. <bitOffset>4</bitOffset>
  1251. <bitWidth>1</bitWidth>
  1252. <access>read-write</access>
  1253. </field>
  1254. <field> <name>IREN</name>
  1255. <description>IREN</description>
  1256. <bitOffset>3</bitOffset>
  1257. <bitWidth>1</bitWidth>
  1258. <access>read-write</access>
  1259. </field>
  1260. <field> <name>IFS</name>
  1261. <description>IFS</description>
  1262. <bitOffset>2</bitOffset>
  1263. <bitWidth>1</bitWidth>
  1264. <access>read-write</access>
  1265. </field>
  1266. <field> <name>ILS</name>
  1267. <description>ILS</description>
  1268. <bitOffset>1</bitOffset>
  1269. <bitWidth>1</bitWidth>
  1270. <access>read-write</access>
  1271. </field>
  1272. <field> <name>IRS</name>
  1273. <description>IRS</description>
  1274. <bitOffset>0</bitOffset>
  1275. <bitWidth>1</bitWidth>
  1276. <access>read-write</access>
  1277. </field>
  1278. </fields>
  1279. </register>
  1280. <register> <name>PMEM3</name>
  1281. <displayName>PMEM3</displayName>
  1282. <description>Common memory space timing register
  1283. 3</description>
  1284. <addressOffset>0x88</addressOffset>
  1285. <size>0x20</size>
  1286. <access>read-write</access>
  1287. <resetValue>0xFCFCFCFC</resetValue>
  1288. <fields>
  1289. <field> <name>MEMHIZx</name>
  1290. <description>MEMHIZx</description>
  1291. <bitOffset>24</bitOffset>
  1292. <bitWidth>8</bitWidth>
  1293. </field>
  1294. <field> <name>MEMHOLDx</name>
  1295. <description>MEMHOLDx</description>
  1296. <bitOffset>16</bitOffset>
  1297. <bitWidth>8</bitWidth>
  1298. </field>
  1299. <field> <name>MEMWAITx</name>
  1300. <description>MEMWAITx</description>
  1301. <bitOffset>8</bitOffset>
  1302. <bitWidth>8</bitWidth>
  1303. </field>
  1304. <field> <name>MEMSETx</name>
  1305. <description>MEMSETx</description>
  1306. <bitOffset>0</bitOffset>
  1307. <bitWidth>8</bitWidth>
  1308. </field>
  1309. </fields>
  1310. </register>
  1311. <register> <name>PATT3</name>
  1312. <displayName>PATT3</displayName>
  1313. <description>Attribute memory space timing register
  1314. 3</description>
  1315. <addressOffset>0x8C</addressOffset>
  1316. <size>0x20</size>
  1317. <access>read-write</access>
  1318. <resetValue>0xFCFCFCFC</resetValue>
  1319. <fields>
  1320. <field> <name>ATTHIZx</name>
  1321. <description>ATTHIZx</description>
  1322. <bitOffset>24</bitOffset>
  1323. <bitWidth>8</bitWidth>
  1324. </field>
  1325. <field> <name>ATTHOLDx</name>
  1326. <description>ATTHOLDx</description>
  1327. <bitOffset>16</bitOffset>
  1328. <bitWidth>8</bitWidth>
  1329. </field>
  1330. <field> <name>ATTWAITx</name>
  1331. <description>ATTWAITx</description>
  1332. <bitOffset>8</bitOffset>
  1333. <bitWidth>8</bitWidth>
  1334. </field>
  1335. <field> <name>ATTSETx</name>
  1336. <description>ATTSETx</description>
  1337. <bitOffset>0</bitOffset>
  1338. <bitWidth>8</bitWidth>
  1339. </field>
  1340. </fields>
  1341. </register>
  1342. <register> <name>ECCR3</name>
  1343. <displayName>ECCR3</displayName>
  1344. <description>ECC result register 3</description>
  1345. <addressOffset>0x94</addressOffset>
  1346. <size>0x20</size>
  1347. <access>read-only</access>
  1348. <resetValue>0x00000000</resetValue>
  1349. <fields>
  1350. <field> <name>ECCx</name>
  1351. <description>ECCx</description>
  1352. <bitOffset>0</bitOffset>
  1353. <bitWidth>32</bitWidth>
  1354. </field>
  1355. </fields>
  1356. </register>
  1357. <register> <name>PCR4</name>
  1358. <displayName>PCR4</displayName>
  1359. <description>PC Card/NAND Flash control register
  1360. 4</description>
  1361. <addressOffset>0xA0</addressOffset>
  1362. <size>0x20</size>
  1363. <access>read-write</access>
  1364. <resetValue>0x00000018</resetValue>
  1365. <fields>
  1366. <field> <name>ECCPS</name>
  1367. <description>ECCPS</description>
  1368. <bitOffset>17</bitOffset>
  1369. <bitWidth>3</bitWidth>
  1370. </field>
  1371. <field> <name>TAR</name>
  1372. <description>TAR</description>
  1373. <bitOffset>13</bitOffset>
  1374. <bitWidth>4</bitWidth>
  1375. </field>
  1376. <field> <name>TCLR</name>
  1377. <description>TCLR</description>
  1378. <bitOffset>9</bitOffset>
  1379. <bitWidth>4</bitWidth>
  1380. </field>
  1381. <field> <name>ECCEN</name>
  1382. <description>ECCEN</description>
  1383. <bitOffset>6</bitOffset>
  1384. <bitWidth>1</bitWidth>
  1385. </field>
  1386. <field> <name>PWID</name>
  1387. <description>PWID</description>
  1388. <bitOffset>4</bitOffset>
  1389. <bitWidth>2</bitWidth>
  1390. </field>
  1391. <field> <name>PTYP</name>
  1392. <description>PTYP</description>
  1393. <bitOffset>3</bitOffset>
  1394. <bitWidth>1</bitWidth>
  1395. </field>
  1396. <field> <name>PBKEN</name>
  1397. <description>PBKEN</description>
  1398. <bitOffset>2</bitOffset>
  1399. <bitWidth>1</bitWidth>
  1400. </field>
  1401. <field> <name>PWAITEN</name>
  1402. <description>PWAITEN</description>
  1403. <bitOffset>1</bitOffset>
  1404. <bitWidth>1</bitWidth>
  1405. </field>
  1406. </fields>
  1407. </register>
  1408. <register> <name>SR4</name>
  1409. <displayName>SR4</displayName>
  1410. <description>FIFO status and interrupt register
  1411. 4</description>
  1412. <addressOffset>0xA4</addressOffset>
  1413. <size>0x20</size>
  1414. <resetValue>0x00000040</resetValue>
  1415. <fields>
  1416. <field> <name>FEMPT</name>
  1417. <description>FEMPT</description>
  1418. <bitOffset>6</bitOffset>
  1419. <bitWidth>1</bitWidth>
  1420. <access>read-only</access>
  1421. </field>
  1422. <field> <name>IFEN</name>
  1423. <description>IFEN</description>
  1424. <bitOffset>5</bitOffset>
  1425. <bitWidth>1</bitWidth>
  1426. <access>read-write</access>
  1427. </field>
  1428. <field> <name>ILEN</name>
  1429. <description>ILEN</description>
  1430. <bitOffset>4</bitOffset>
  1431. <bitWidth>1</bitWidth>
  1432. <access>read-write</access>
  1433. </field>
  1434. <field> <name>IREN</name>
  1435. <description>IREN</description>
  1436. <bitOffset>3</bitOffset>
  1437. <bitWidth>1</bitWidth>
  1438. <access>read-write</access>
  1439. </field>
  1440. <field> <name>IFS</name>
  1441. <description>IFS</description>
  1442. <bitOffset>2</bitOffset>
  1443. <bitWidth>1</bitWidth>
  1444. <access>read-write</access>
  1445. </field>
  1446. <field> <name>ILS</name>
  1447. <description>ILS</description>
  1448. <bitOffset>1</bitOffset>
  1449. <bitWidth>1</bitWidth>
  1450. <access>read-write</access>
  1451. </field>
  1452. <field> <name>IRS</name>
  1453. <description>IRS</description>
  1454. <bitOffset>0</bitOffset>
  1455. <bitWidth>1</bitWidth>
  1456. <access>read-write</access>
  1457. </field>
  1458. </fields>
  1459. </register>
  1460. <register> <name>PMEM4</name>
  1461. <displayName>PMEM4</displayName>
  1462. <description>Common memory space timing register
  1463. 4</description>
  1464. <addressOffset>0xA8</addressOffset>
  1465. <size>0x20</size>
  1466. <access>read-write</access>
  1467. <resetValue>0xFCFCFCFC</resetValue>
  1468. <fields>
  1469. <field> <name>MEMHIZx</name>
  1470. <description>MEMHIZx</description>
  1471. <bitOffset>24</bitOffset>
  1472. <bitWidth>8</bitWidth>
  1473. </field>
  1474. <field> <name>MEMHOLDx</name>
  1475. <description>MEMHOLDx</description>
  1476. <bitOffset>16</bitOffset>
  1477. <bitWidth>8</bitWidth>
  1478. </field>
  1479. <field> <name>MEMWAITx</name>
  1480. <description>MEMWAITx</description>
  1481. <bitOffset>8</bitOffset>
  1482. <bitWidth>8</bitWidth>
  1483. </field>
  1484. <field> <name>MEMSETx</name>
  1485. <description>MEMSETx</description>
  1486. <bitOffset>0</bitOffset>
  1487. <bitWidth>8</bitWidth>
  1488. </field>
  1489. </fields>
  1490. </register>
  1491. <register> <name>PATT4</name>
  1492. <displayName>PATT4</displayName>
  1493. <description>Attribute memory space timing register
  1494. 4</description>
  1495. <addressOffset>0xAC</addressOffset>
  1496. <size>0x20</size>
  1497. <access>read-write</access>
  1498. <resetValue>0xFCFCFCFC</resetValue>
  1499. <fields>
  1500. <field> <name>ATTHIZx</name>
  1501. <description>ATTHIZx</description>
  1502. <bitOffset>24</bitOffset>
  1503. <bitWidth>8</bitWidth>
  1504. </field>
  1505. <field> <name>ATTHOLDx</name>
  1506. <description>ATTHOLDx</description>
  1507. <bitOffset>16</bitOffset>
  1508. <bitWidth>8</bitWidth>
  1509. </field>
  1510. <field> <name>ATTWAITx</name>
  1511. <description>ATTWAITx</description>
  1512. <bitOffset>8</bitOffset>
  1513. <bitWidth>8</bitWidth>
  1514. </field>
  1515. <field> <name>ATTSETx</name>
  1516. <description>ATTSETx</description>
  1517. <bitOffset>0</bitOffset>
  1518. <bitWidth>8</bitWidth>
  1519. </field>
  1520. </fields>
  1521. </register>
  1522. <register> <name>PIO4</name>
  1523. <displayName>PIO4</displayName>
  1524. <description>I/O space timing register 4</description>
  1525. <addressOffset>0xB0</addressOffset>
  1526. <size>0x20</size>
  1527. <access>read-write</access>
  1528. <resetValue>0xFCFCFCFC</resetValue>
  1529. <fields>
  1530. <field> <name>IOHIZx</name>
  1531. <description>IOHIZx</description>
  1532. <bitOffset>24</bitOffset>
  1533. <bitWidth>8</bitWidth>
  1534. </field>
  1535. <field> <name>IOHOLDx</name>
  1536. <description>IOHOLDx</description>
  1537. <bitOffset>16</bitOffset>
  1538. <bitWidth>8</bitWidth>
  1539. </field>
  1540. <field> <name>IOWAITx</name>
  1541. <description>IOWAITx</description>
  1542. <bitOffset>8</bitOffset>
  1543. <bitWidth>8</bitWidth>
  1544. </field>
  1545. <field> <name>IOSETx</name>
  1546. <description>IOSETx</description>
  1547. <bitOffset>0</bitOffset>
  1548. <bitWidth>8</bitWidth>
  1549. </field>
  1550. </fields>
  1551. </register>
  1552. <register> <name>BWTR1</name>
  1553. <displayName>BWTR1</displayName>
  1554. <description>SRAM/NOR-Flash write timing registers
  1555. 1</description>
  1556. <addressOffset>0x104</addressOffset>
  1557. <size>0x20</size>
  1558. <access>read-write</access>
  1559. <resetValue>0x0FFFFFFF</resetValue>
  1560. <fields>
  1561. <field> <name>ACCMOD</name>
  1562. <description>ACCMOD</description>
  1563. <bitOffset>28</bitOffset>
  1564. <bitWidth>2</bitWidth>
  1565. </field>
  1566. <field> <name>DATLAT</name>
  1567. <description>DATLAT</description>
  1568. <bitOffset>24</bitOffset>
  1569. <bitWidth>4</bitWidth>
  1570. </field>
  1571. <field> <name>CLKDIV</name>
  1572. <description>CLKDIV</description>
  1573. <bitOffset>20</bitOffset>
  1574. <bitWidth>4</bitWidth>
  1575. </field>
  1576. <field> <name>DATAST</name>
  1577. <description>DATAST</description>
  1578. <bitOffset>8</bitOffset>
  1579. <bitWidth>8</bitWidth>
  1580. </field>
  1581. <field> <name>ADDHLD</name>
  1582. <description>ADDHLD</description>
  1583. <bitOffset>4</bitOffset>
  1584. <bitWidth>4</bitWidth>
  1585. </field>
  1586. <field> <name>ADDSET</name>
  1587. <description>ADDSET</description>
  1588. <bitOffset>0</bitOffset>
  1589. <bitWidth>4</bitWidth>
  1590. </field>
  1591. </fields>
  1592. </register>
  1593. <register> <name>BWTR2</name>
  1594. <displayName>BWTR2</displayName>
  1595. <description>SRAM/NOR-Flash write timing registers
  1596. 2</description>
  1597. <addressOffset>0x10C</addressOffset>
  1598. <size>0x20</size>
  1599. <access>read-write</access>
  1600. <resetValue>0x0FFFFFFF</resetValue>
  1601. <fields>
  1602. <field> <name>ACCMOD</name>
  1603. <description>ACCMOD</description>
  1604. <bitOffset>28</bitOffset>
  1605. <bitWidth>2</bitWidth>
  1606. </field>
  1607. <field> <name>DATLAT</name>
  1608. <description>DATLAT</description>
  1609. <bitOffset>24</bitOffset>
  1610. <bitWidth>4</bitWidth>
  1611. </field>
  1612. <field> <name>CLKDIV</name>
  1613. <description>CLKDIV</description>
  1614. <bitOffset>20</bitOffset>
  1615. <bitWidth>4</bitWidth>
  1616. </field>
  1617. <field> <name>DATAST</name>
  1618. <description>DATAST</description>
  1619. <bitOffset>8</bitOffset>
  1620. <bitWidth>8</bitWidth>
  1621. </field>
  1622. <field> <name>ADDHLD</name>
  1623. <description>ADDHLD</description>
  1624. <bitOffset>4</bitOffset>
  1625. <bitWidth>4</bitWidth>
  1626. </field>
  1627. <field> <name>ADDSET</name>
  1628. <description>ADDSET</description>
  1629. <bitOffset>0</bitOffset>
  1630. <bitWidth>4</bitWidth>
  1631. </field>
  1632. </fields>
  1633. </register>
  1634. <register> <name>BWTR3</name>
  1635. <displayName>BWTR3</displayName>
  1636. <description>SRAM/NOR-Flash write timing registers
  1637. 3</description>
  1638. <addressOffset>0x114</addressOffset>
  1639. <size>0x20</size>
  1640. <access>read-write</access>
  1641. <resetValue>0x0FFFFFFF</resetValue>
  1642. <fields>
  1643. <field> <name>ACCMOD</name>
  1644. <description>ACCMOD</description>
  1645. <bitOffset>28</bitOffset>
  1646. <bitWidth>2</bitWidth>
  1647. </field>
  1648. <field> <name>DATLAT</name>
  1649. <description>DATLAT</description>
  1650. <bitOffset>24</bitOffset>
  1651. <bitWidth>4</bitWidth>
  1652. </field>
  1653. <field> <name>CLKDIV</name>
  1654. <description>CLKDIV</description>
  1655. <bitOffset>20</bitOffset>
  1656. <bitWidth>4</bitWidth>
  1657. </field>
  1658. <field> <name>DATAST</name>
  1659. <description>DATAST</description>
  1660. <bitOffset>8</bitOffset>
  1661. <bitWidth>8</bitWidth>
  1662. </field>
  1663. <field> <name>ADDHLD</name>
  1664. <description>ADDHLD</description>
  1665. <bitOffset>4</bitOffset>
  1666. <bitWidth>4</bitWidth>
  1667. </field>
  1668. <field> <name>ADDSET</name>
  1669. <description>ADDSET</description>
  1670. <bitOffset>0</bitOffset>
  1671. <bitWidth>4</bitWidth>
  1672. </field>
  1673. </fields>
  1674. </register>
  1675. <register> <name>BWTR4</name>
  1676. <displayName>BWTR4</displayName>
  1677. <description>SRAM/NOR-Flash write timing registers
  1678. 4</description>
  1679. <addressOffset>0x11C</addressOffset>
  1680. <size>0x20</size>
  1681. <access>read-write</access>
  1682. <resetValue>0x0FFFFFFF</resetValue>
  1683. <fields>
  1684. <field> <name>ACCMOD</name>
  1685. <description>ACCMOD</description>
  1686. <bitOffset>28</bitOffset>
  1687. <bitWidth>2</bitWidth>
  1688. </field>
  1689. <field> <name>DATLAT</name>
  1690. <description>DATLAT</description>
  1691. <bitOffset>24</bitOffset>
  1692. <bitWidth>4</bitWidth>
  1693. </field>
  1694. <field> <name>CLKDIV</name>
  1695. <description>CLKDIV</description>
  1696. <bitOffset>20</bitOffset>
  1697. <bitWidth>4</bitWidth>
  1698. </field>
  1699. <field> <name>DATAST</name>
  1700. <description>DATAST</description>
  1701. <bitOffset>8</bitOffset>
  1702. <bitWidth>8</bitWidth>
  1703. </field>
  1704. <field> <name>ADDHLD</name>
  1705. <description>ADDHLD</description>
  1706. <bitOffset>4</bitOffset>
  1707. <bitWidth>4</bitWidth>
  1708. </field>
  1709. <field> <name>ADDSET</name>
  1710. <description>ADDSET</description>
  1711. <bitOffset>0</bitOffset>
  1712. <bitWidth>4</bitWidth>
  1713. </field>
  1714. </fields>
  1715. </register>
  1716. </registers>
  1717. </peripheral>
  1718. <peripheral> <name>DBG</name>
  1719. <description>Debug support</description>
  1720. <groupName>DBG</groupName>
  1721. <baseAddress>0xE0042000</baseAddress>
  1722. <addressBlock>
  1723. <offset>0x0</offset>
  1724. <size>0x400</size>
  1725. <usage>registers</usage>
  1726. </addressBlock>
  1727. <registers>
  1728. <register> <name>DBGMCU_IDCODE</name>
  1729. <displayName>DBGMCU_IDCODE</displayName>
  1730. <description>IDCODE</description>
  1731. <addressOffset>0x0</addressOffset>
  1732. <size>0x20</size>
  1733. <access>read-only</access>
  1734. <resetValue>0x10006411</resetValue>
  1735. <fields>
  1736. <field> <name>DEV_ID</name>
  1737. <description>DEV_ID</description>
  1738. <bitOffset>0</bitOffset>
  1739. <bitWidth>12</bitWidth>
  1740. </field>
  1741. <field> <name>REV_ID</name>
  1742. <description>REV_ID</description>
  1743. <bitOffset>16</bitOffset>
  1744. <bitWidth>16</bitWidth>
  1745. </field>
  1746. </fields>
  1747. </register>
  1748. <register> <name>DBGMCU_CR</name>
  1749. <displayName>DBGMCU_CR</displayName>
  1750. <description>Control Register</description>
  1751. <addressOffset>0x4</addressOffset>
  1752. <size>0x20</size>
  1753. <access>read-write</access>
  1754. <resetValue>0x00000000</resetValue>
  1755. <fields>
  1756. <field> <name>DBG_SLEEP</name>
  1757. <description>DBG_SLEEP</description>
  1758. <bitOffset>0</bitOffset>
  1759. <bitWidth>1</bitWidth>
  1760. </field>
  1761. <field> <name>DBG_STOP</name>
  1762. <description>DBG_STOP</description>
  1763. <bitOffset>1</bitOffset>
  1764. <bitWidth>1</bitWidth>
  1765. </field>
  1766. <field> <name>DBG_STANDBY</name>
  1767. <description>DBG_STANDBY</description>
  1768. <bitOffset>2</bitOffset>
  1769. <bitWidth>1</bitWidth>
  1770. </field>
  1771. <field> <name>TRACE_IOEN</name>
  1772. <description>TRACE_IOEN</description>
  1773. <bitOffset>5</bitOffset>
  1774. <bitWidth>1</bitWidth>
  1775. </field>
  1776. <field> <name>TRACE_MODE</name>
  1777. <description>TRACE_MODE</description>
  1778. <bitOffset>6</bitOffset>
  1779. <bitWidth>2</bitWidth>
  1780. </field>
  1781. <field> <name>DBG_I2C2_SMBUS_TIMEOUT</name>
  1782. <description>DBG_I2C2_SMBUS_TIMEOUT</description>
  1783. <bitOffset>16</bitOffset>
  1784. <bitWidth>1</bitWidth>
  1785. </field>
  1786. <field> <name>DBG_TIM8_STOP</name>
  1787. <description>DBG_TIM8_STOP</description>
  1788. <bitOffset>17</bitOffset>
  1789. <bitWidth>1</bitWidth>
  1790. </field>
  1791. <field> <name>DBG_TIM5_STOP</name>
  1792. <description>DBG_TIM5_STOP</description>
  1793. <bitOffset>18</bitOffset>
  1794. <bitWidth>1</bitWidth>
  1795. </field>
  1796. <field> <name>DBG_TIM6_STOP</name>
  1797. <description>DBG_TIM6_STOP</description>
  1798. <bitOffset>19</bitOffset>
  1799. <bitWidth>1</bitWidth>
  1800. </field>
  1801. <field> <name>DBG_TIM7_STOP</name>
  1802. <description>DBG_TIM7_STOP</description>
  1803. <bitOffset>20</bitOffset>
  1804. <bitWidth>1</bitWidth>
  1805. </field>
  1806. </fields>
  1807. </register>
  1808. <register> <name>DBGMCU_APB1_FZ</name>
  1809. <displayName>DBGMCU_APB1_FZ</displayName>
  1810. <description>Debug MCU APB1 Freeze registe</description>
  1811. <addressOffset>0x8</addressOffset>
  1812. <size>0x20</size>
  1813. <access>read-write</access>
  1814. <resetValue>0x00000000</resetValue>
  1815. <fields>
  1816. <field> <name>DBG_TIM2_STOP</name>
  1817. <description>DBG_TIM2_STOP</description>
  1818. <bitOffset>0</bitOffset>
  1819. <bitWidth>1</bitWidth>
  1820. </field>
  1821. <field> <name>DBG_TIM3_STOP</name>
  1822. <description>DBG_TIM3 _STOP</description>
  1823. <bitOffset>1</bitOffset>
  1824. <bitWidth>1</bitWidth>
  1825. </field>
  1826. <field> <name>DBG_TIM4_STOP</name>
  1827. <description>DBG_TIM4_STOP</description>
  1828. <bitOffset>2</bitOffset>
  1829. <bitWidth>1</bitWidth>
  1830. </field>
  1831. <field> <name>DBG_TIM5_STOP</name>
  1832. <description>DBG_TIM5_STOP</description>
  1833. <bitOffset>3</bitOffset>
  1834. <bitWidth>1</bitWidth>
  1835. </field>
  1836. <field> <name>DBG_TIM6_STOP</name>
  1837. <description>DBG_TIM6_STOP</description>
  1838. <bitOffset>4</bitOffset>
  1839. <bitWidth>1</bitWidth>
  1840. </field>
  1841. <field> <name>DBG_TIM7_STOP</name>
  1842. <description>DBG_TIM7_STOP</description>
  1843. <bitOffset>5</bitOffset>
  1844. <bitWidth>1</bitWidth>
  1845. </field>
  1846. <field> <name>DBG_TIM12_STOP</name>
  1847. <description>DBG_TIM12_STOP</description>
  1848. <bitOffset>6</bitOffset>
  1849. <bitWidth>1</bitWidth>
  1850. </field>
  1851. <field> <name>DBG_TIM13_STOP</name>
  1852. <description>DBG_TIM13_STOP</description>
  1853. <bitOffset>7</bitOffset>
  1854. <bitWidth>1</bitWidth>
  1855. </field>
  1856. <field> <name>DBG_TIM14_STOP</name>
  1857. <description>DBG_TIM14_STOP</description>
  1858. <bitOffset>8</bitOffset>
  1859. <bitWidth>1</bitWidth>
  1860. </field>
  1861. <field> <name>DBG_WWDG_STOP</name>
  1862. <description>DBG_WWDG_STOP</description>
  1863. <bitOffset>11</bitOffset>
  1864. <bitWidth>1</bitWidth>
  1865. </field>
  1866. <field> <name>DBG_IWDEG_STOP</name>
  1867. <description>DBG_IWDEG_STOP</description>
  1868. <bitOffset>12</bitOffset>
  1869. <bitWidth>1</bitWidth>
  1870. </field>
  1871. <field> <name>DBG_J2C1_SMBUS_TIMEOUT</name>
  1872. <description>DBG_J2C1_SMBUS_TIMEOUT</description>
  1873. <bitOffset>21</bitOffset>
  1874. <bitWidth>1</bitWidth>
  1875. </field>
  1876. <field> <name>DBG_J2C2_SMBUS_TIMEOUT</name>
  1877. <description>DBG_J2C2_SMBUS_TIMEOUT</description>
  1878. <bitOffset>22</bitOffset>
  1879. <bitWidth>1</bitWidth>
  1880. </field>
  1881. <field> <name>DBG_J2C3SMBUS_TIMEOUT</name>
  1882. <description>DBG_J2C3SMBUS_TIMEOUT</description>
  1883. <bitOffset>23</bitOffset>
  1884. <bitWidth>1</bitWidth>
  1885. </field>
  1886. <field> <name>DBG_CAN1_STOP</name>
  1887. <description>DBG_CAN1_STOP</description>
  1888. <bitOffset>25</bitOffset>
  1889. <bitWidth>1</bitWidth>
  1890. </field>
  1891. <field> <name>DBG_CAN2_STOP</name>
  1892. <description>DBG_CAN2_STOP</description>
  1893. <bitOffset>26</bitOffset>
  1894. <bitWidth>1</bitWidth>
  1895. </field>
  1896. </fields>
  1897. </register>
  1898. <register> <name>DBGMCU_APB2_FZ</name>
  1899. <displayName>DBGMCU_APB2_FZ</displayName>
  1900. <description>Debug MCU APB2 Freeze registe</description>
  1901. <addressOffset>0xC</addressOffset>
  1902. <size>0x20</size>
  1903. <access>read-write</access>
  1904. <resetValue>0x00000000</resetValue>
  1905. <fields>
  1906. <field> <name>DBG_TIM1_STOP</name>
  1907. <description>TIM1 counter stopped when core is
  1908. halted</description>
  1909. <bitOffset>0</bitOffset>
  1910. <bitWidth>1</bitWidth>
  1911. </field>
  1912. <field> <name>DBG_TIM8_STOP</name>
  1913. <description>TIM8 counter stopped when core is
  1914. halted</description>
  1915. <bitOffset>1</bitOffset>
  1916. <bitWidth>1</bitWidth>
  1917. </field>
  1918. <field> <name>DBG_TIM9_STOP</name>
  1919. <description>TIM9 counter stopped when core is
  1920. halted</description>
  1921. <bitOffset>16</bitOffset>
  1922. <bitWidth>1</bitWidth>
  1923. </field>
  1924. <field> <name>DBG_TIM10_STOP</name>
  1925. <description>TIM10 counter stopped when core is
  1926. halted</description>
  1927. <bitOffset>17</bitOffset>
  1928. <bitWidth>1</bitWidth>
  1929. </field>
  1930. <field> <name>DBG_TIM11_STOP</name>
  1931. <description>TIM11 counter stopped when core is
  1932. halted</description>
  1933. <bitOffset>18</bitOffset>
  1934. <bitWidth>1</bitWidth>
  1935. </field>
  1936. </fields>
  1937. </register>
  1938. </registers>
  1939. </peripheral>
  1940. <peripheral> <name>DMA2</name>
  1941. <description>DMA controller</description>
  1942. <groupName>DMA</groupName>
  1943. <baseAddress>0x40026400</baseAddress>
  1944. <addressBlock>
  1945. <offset>0x0</offset>
  1946. <size>0x400</size>
  1947. <usage>registers</usage>
  1948. </addressBlock>
  1949. <interrupt>
  1950. <name>DMA2_Stream0</name>
  1951. <description>DMA2 Stream0 global interrupt</description>
  1952. <value>56</value>
  1953. </interrupt>
  1954. <interrupt>
  1955. <name>DMA2_Stream1</name>
  1956. <description>DMA2 Stream1 global interrupt</description>
  1957. <value>57</value>
  1958. </interrupt>
  1959. <interrupt>
  1960. <name>DMA2_Stream2</name>
  1961. <description>DMA2 Stream2 global interrupt</description>
  1962. <value>58</value>
  1963. </interrupt>
  1964. <interrupt>
  1965. <name>DMA2_Stream3</name>
  1966. <description>DMA2 Stream3 global interrupt</description>
  1967. <value>59</value>
  1968. </interrupt>
  1969. <interrupt>
  1970. <name>DMA2_Stream4</name>
  1971. <description>DMA2 Stream4 global interrupt</description>
  1972. <value>60</value>
  1973. </interrupt>
  1974. <interrupt>
  1975. <name>DMA2_Stream5</name>
  1976. <description>DMA2 Stream5 global interrupt</description>
  1977. <value>68</value>
  1978. </interrupt>
  1979. <interrupt>
  1980. <name>DMA2_Stream6</name>
  1981. <description>DMA2 Stream6 global interrupt</description>
  1982. <value>69</value>
  1983. </interrupt>
  1984. <interrupt>
  1985. <name>DMA2_Stream7</name>
  1986. <description>DMA2 Stream7 global interrupt</description>
  1987. <value>70</value>
  1988. </interrupt>
  1989. <registers>
  1990. <register> <name>LISR</name>
  1991. <displayName>LISR</displayName>
  1992. <description>low interrupt status register</description>
  1993. <addressOffset>0x0</addressOffset>
  1994. <size>0x20</size>
  1995. <access>read-only</access>
  1996. <resetValue>0x00000000</resetValue>
  1997. <fields>
  1998. <field> <name>TCIF3</name>
  1999. <description>Stream x transfer complete interrupt
  2000. flag (x = 3..0)</description>
  2001. <bitOffset>27</bitOffset>
  2002. <bitWidth>1</bitWidth>
  2003. </field>
  2004. <field> <name>HTIF3</name>
  2005. <description>Stream x half transfer interrupt flag
  2006. (x=3..0)</description>
  2007. <bitOffset>26</bitOffset>
  2008. <bitWidth>1</bitWidth>
  2009. </field>
  2010. <field> <name>TEIF3</name>
  2011. <description>Stream x transfer error interrupt flag
  2012. (x=3..0)</description>
  2013. <bitOffset>25</bitOffset>
  2014. <bitWidth>1</bitWidth>
  2015. </field>
  2016. <field> <name>DMEIF3</name>
  2017. <description>Stream x direct mode error interrupt
  2018. flag (x=3..0)</description>
  2019. <bitOffset>24</bitOffset>
  2020. <bitWidth>1</bitWidth>
  2021. </field>
  2022. <field> <name>FEIF3</name>
  2023. <description>Stream x FIFO error interrupt flag
  2024. (x=3..0)</description>
  2025. <bitOffset>22</bitOffset>
  2026. <bitWidth>1</bitWidth>
  2027. </field>
  2028. <field> <name>TCIF2</name>
  2029. <description>Stream x transfer complete interrupt
  2030. flag (x = 3..0)</description>
  2031. <bitOffset>21</bitOffset>
  2032. <bitWidth>1</bitWidth>
  2033. </field>
  2034. <field> <name>HTIF2</name>
  2035. <description>Stream x half transfer interrupt flag
  2036. (x=3..0)</description>
  2037. <bitOffset>20</bitOffset>
  2038. <bitWidth>1</bitWidth>
  2039. </field>
  2040. <field> <name>TEIF2</name>
  2041. <description>Stream x transfer error interrupt flag
  2042. (x=3..0)</description>
  2043. <bitOffset>19</bitOffset>
  2044. <bitWidth>1</bitWidth>
  2045. </field>
  2046. <field> <name>DMEIF2</name>
  2047. <description>Stream x direct mode error interrupt
  2048. flag (x=3..0)</description>
  2049. <bitOffset>18</bitOffset>
  2050. <bitWidth>1</bitWidth>
  2051. </field>
  2052. <field> <name>FEIF2</name>
  2053. <description>Stream x FIFO error interrupt flag
  2054. (x=3..0)</description>
  2055. <bitOffset>16</bitOffset>
  2056. <bitWidth>1</bitWidth>
  2057. </field>
  2058. <field> <name>TCIF1</name>
  2059. <description>Stream x transfer complete interrupt
  2060. flag (x = 3..0)</description>
  2061. <bitOffset>11</bitOffset>
  2062. <bitWidth>1</bitWidth>
  2063. </field>
  2064. <field> <name>HTIF1</name>
  2065. <description>Stream x half transfer interrupt flag
  2066. (x=3..0)</description>
  2067. <bitOffset>10</bitOffset>
  2068. <bitWidth>1</bitWidth>
  2069. </field>
  2070. <field> <name>TEIF1</name>
  2071. <description>Stream x transfer error interrupt flag
  2072. (x=3..0)</description>
  2073. <bitOffset>9</bitOffset>
  2074. <bitWidth>1</bitWidth>
  2075. </field>
  2076. <field> <name>DMEIF1</name>
  2077. <description>Stream x direct mode error interrupt
  2078. flag (x=3..0)</description>
  2079. <bitOffset>8</bitOffset>
  2080. <bitWidth>1</bitWidth>
  2081. </field>
  2082. <field> <name>FEIF1</name>
  2083. <description>Stream x FIFO error interrupt flag
  2084. (x=3..0)</description>
  2085. <bitOffset>6</bitOffset>
  2086. <bitWidth>1</bitWidth>
  2087. </field>
  2088. <field> <name>TCIF0</name>
  2089. <description>Stream x transfer complete interrupt
  2090. flag (x = 3..0)</description>
  2091. <bitOffset>5</bitOffset>
  2092. <bitWidth>1</bitWidth>
  2093. </field>
  2094. <field> <name>HTIF0</name>
  2095. <description>Stream x half transfer interrupt flag
  2096. (x=3..0)</description>
  2097. <bitOffset>4</bitOffset>
  2098. <bitWidth>1</bitWidth>
  2099. </field>
  2100. <field> <name>TEIF0</name>
  2101. <description>Stream x transfer error interrupt flag
  2102. (x=3..0)</description>
  2103. <bitOffset>3</bitOffset>
  2104. <bitWidth>1</bitWidth>
  2105. </field>
  2106. <field> <name>DMEIF0</name>
  2107. <description>Stream x direct mode error interrupt
  2108. flag (x=3..0)</description>
  2109. <bitOffset>2</bitOffset>
  2110. <bitWidth>1</bitWidth>
  2111. </field>
  2112. <field> <name>FEIF0</name>
  2113. <description>Stream x FIFO error interrupt flag
  2114. (x=3..0)</description>
  2115. <bitOffset>0</bitOffset>
  2116. <bitWidth>1</bitWidth>
  2117. </field>
  2118. </fields>
  2119. </register>
  2120. <register> <name>HISR</name>
  2121. <displayName>HISR</displayName>
  2122. <description>high interrupt status register</description>
  2123. <addressOffset>0x4</addressOffset>
  2124. <size>0x20</size>
  2125. <access>read-only</access>
  2126. <resetValue>0x00000000</resetValue>
  2127. <fields>
  2128. <field> <name>TCIF7</name>
  2129. <description>Stream x transfer complete interrupt
  2130. flag (x=7..4)</description>
  2131. <bitOffset>27</bitOffset>
  2132. <bitWidth>1</bitWidth>
  2133. </field>
  2134. <field> <name>HTIF7</name>
  2135. <description>Stream x half transfer interrupt flag
  2136. (x=7..4)</description>
  2137. <bitOffset>26</bitOffset>
  2138. <bitWidth>1</bitWidth>
  2139. </field>
  2140. <field> <name>TEIF7</name>
  2141. <description>Stream x transfer error interrupt flag
  2142. (x=7..4)</description>
  2143. <bitOffset>25</bitOffset>
  2144. <bitWidth>1</bitWidth>
  2145. </field>
  2146. <field> <name>DMEIF7</name>
  2147. <description>Stream x direct mode error interrupt
  2148. flag (x=7..4)</description>
  2149. <bitOffset>24</bitOffset>
  2150. <bitWidth>1</bitWidth>
  2151. </field>
  2152. <field> <name>FEIF7</name>
  2153. <description>Stream x FIFO error interrupt flag
  2154. (x=7..4)</description>
  2155. <bitOffset>22</bitOffset>
  2156. <bitWidth>1</bitWidth>
  2157. </field>
  2158. <field> <name>TCIF6</name>
  2159. <description>Stream x transfer complete interrupt
  2160. flag (x=7..4)</description>
  2161. <bitOffset>21</bitOffset>
  2162. <bitWidth>1</bitWidth>
  2163. </field>
  2164. <field> <name>HTIF6</name>
  2165. <description>Stream x half transfer interrupt flag
  2166. (x=7..4)</description>
  2167. <bitOffset>20</bitOffset>
  2168. <bitWidth>1</bitWidth>
  2169. </field>
  2170. <field> <name>TEIF6</name>
  2171. <description>Stream x transfer error interrupt flag
  2172. (x=7..4)</description>
  2173. <bitOffset>19</bitOffset>
  2174. <bitWidth>1</bitWidth>
  2175. </field>
  2176. <field> <name>DMEIF6</name>
  2177. <description>Stream x direct mode error interrupt
  2178. flag (x=7..4)</description>
  2179. <bitOffset>18</bitOffset>
  2180. <bitWidth>1</bitWidth>
  2181. </field>
  2182. <field> <name>FEIF6</name>
  2183. <description>Stream x FIFO error interrupt flag
  2184. (x=7..4)</description>
  2185. <bitOffset>16</bitOffset>
  2186. <bitWidth>1</bitWidth>
  2187. </field>
  2188. <field> <name>TCIF5</name>
  2189. <description>Stream x transfer complete interrupt
  2190. flag (x=7..4)</description>
  2191. <bitOffset>11</bitOffset>
  2192. <bitWidth>1</bitWidth>
  2193. </field>
  2194. <field> <name>HTIF5</name>
  2195. <description>Stream x half transfer interrupt flag
  2196. (x=7..4)</description>
  2197. <bitOffset>10</bitOffset>
  2198. <bitWidth>1</bitWidth>
  2199. </field>
  2200. <field> <name>TEIF5</name>
  2201. <description>Stream x transfer error interrupt flag
  2202. (x=7..4)</description>
  2203. <bitOffset>9</bitOffset>
  2204. <bitWidth>1</bitWidth>
  2205. </field>
  2206. <field> <name>DMEIF5</name>
  2207. <description>Stream x direct mode error interrupt
  2208. flag (x=7..4)</description>
  2209. <bitOffset>8</bitOffset>
  2210. <bitWidth>1</bitWidth>
  2211. </field>
  2212. <field> <name>FEIF5</name>
  2213. <description>Stream x FIFO error interrupt flag
  2214. (x=7..4)</description>
  2215. <bitOffset>6</bitOffset>
  2216. <bitWidth>1</bitWidth>
  2217. </field>
  2218. <field> <name>TCIF4</name>
  2219. <description>Stream x transfer complete interrupt
  2220. flag (x=7..4)</description>
  2221. <bitOffset>5</bitOffset>
  2222. <bitWidth>1</bitWidth>
  2223. </field>
  2224. <field> <name>HTIF4</name>
  2225. <description>Stream x half transfer interrupt flag
  2226. (x=7..4)</description>
  2227. <bitOffset>4</bitOffset>
  2228. <bitWidth>1</bitWidth>
  2229. </field>
  2230. <field> <name>TEIF4</name>
  2231. <description>Stream x transfer error interrupt flag
  2232. (x=7..4)</description>
  2233. <bitOffset>3</bitOffset>
  2234. <bitWidth>1</bitWidth>
  2235. </field>
  2236. <field> <name>DMEIF4</name>
  2237. <description>Stream x direct mode error interrupt
  2238. flag (x=7..4)</description>
  2239. <bitOffset>2</bitOffset>
  2240. <bitWidth>1</bitWidth>
  2241. </field>
  2242. <field> <name>FEIF4</name>
  2243. <description>Stream x FIFO error interrupt flag
  2244. (x=7..4)</description>
  2245. <bitOffset>0</bitOffset>
  2246. <bitWidth>1</bitWidth>
  2247. </field>
  2248. </fields>
  2249. </register>
  2250. <register> <name>LIFCR</name>
  2251. <displayName>LIFCR</displayName>
  2252. <description>low interrupt flag clear
  2253. register</description>
  2254. <addressOffset>0x8</addressOffset>
  2255. <size>0x20</size>
  2256. <access>read-write</access>
  2257. <resetValue>0x00000000</resetValue>
  2258. <fields>
  2259. <field> <name>CTCIF3</name>
  2260. <description>Stream x clear transfer complete
  2261. interrupt flag (x = 3..0)</description>
  2262. <bitOffset>27</bitOffset>
  2263. <bitWidth>1</bitWidth>
  2264. </field>
  2265. <field> <name>CHTIF3</name>
  2266. <description>Stream x clear half transfer interrupt
  2267. flag (x = 3..0)</description>
  2268. <bitOffset>26</bitOffset>
  2269. <bitWidth>1</bitWidth>
  2270. </field>
  2271. <field> <name>CTEIF3</name>
  2272. <description>Stream x clear transfer error interrupt
  2273. flag (x = 3..0)</description>
  2274. <bitOffset>25</bitOffset>
  2275. <bitWidth>1</bitWidth>
  2276. </field>
  2277. <field> <name>CDMEIF3</name>
  2278. <description>Stream x clear direct mode error
  2279. interrupt flag (x = 3..0)</description>
  2280. <bitOffset>24</bitOffset>
  2281. <bitWidth>1</bitWidth>
  2282. </field>
  2283. <field> <name>CFEIF3</name>
  2284. <description>Stream x clear FIFO error interrupt flag
  2285. (x = 3..0)</description>
  2286. <bitOffset>22</bitOffset>
  2287. <bitWidth>1</bitWidth>
  2288. </field>
  2289. <field> <name>CTCIF2</name>
  2290. <description>Stream x clear transfer complete
  2291. interrupt flag (x = 3..0)</description>
  2292. <bitOffset>21</bitOffset>
  2293. <bitWidth>1</bitWidth>
  2294. </field>
  2295. <field> <name>CHTIF2</name>
  2296. <description>Stream x clear half transfer interrupt
  2297. flag (x = 3..0)</description>
  2298. <bitOffset>20</bitOffset>
  2299. <bitWidth>1</bitWidth>
  2300. </field>
  2301. <field> <name>CTEIF2</name>
  2302. <description>Stream x clear transfer error interrupt
  2303. flag (x = 3..0)</description>
  2304. <bitOffset>19</bitOffset>
  2305. <bitWidth>1</bitWidth>
  2306. </field>
  2307. <field> <name>CDMEIF2</name>
  2308. <description>Stream x clear direct mode error
  2309. interrupt flag (x = 3..0)</description>
  2310. <bitOffset>18</bitOffset>
  2311. <bitWidth>1</bitWidth>
  2312. </field>
  2313. <field> <name>CFEIF2</name>
  2314. <description>Stream x clear FIFO error interrupt flag
  2315. (x = 3..0)</description>
  2316. <bitOffset>16</bitOffset>
  2317. <bitWidth>1</bitWidth>
  2318. </field>
  2319. <field> <name>CTCIF1</name>
  2320. <description>Stream x clear transfer complete
  2321. interrupt flag (x = 3..0)</description>
  2322. <bitOffset>11</bitOffset>
  2323. <bitWidth>1</bitWidth>
  2324. </field>
  2325. <field> <name>CHTIF1</name>
  2326. <description>Stream x clear half transfer interrupt
  2327. flag (x = 3..0)</description>
  2328. <bitOffset>10</bitOffset>
  2329. <bitWidth>1</bitWidth>
  2330. </field>
  2331. <field> <name>CTEIF1</name>
  2332. <description>Stream x clear transfer error interrupt
  2333. flag (x = 3..0)</description>
  2334. <bitOffset>9</bitOffset>
  2335. <bitWidth>1</bitWidth>
  2336. </field>
  2337. <field> <name>CDMEIF1</name>
  2338. <description>Stream x clear direct mode error
  2339. interrupt flag (x = 3..0)</description>
  2340. <bitOffset>8</bitOffset>
  2341. <bitWidth>1</bitWidth>
  2342. </field>
  2343. <field> <name>CFEIF1</name>
  2344. <description>Stream x clear FIFO error interrupt flag
  2345. (x = 3..0)</description>
  2346. <bitOffset>6</bitOffset>
  2347. <bitWidth>1</bitWidth>
  2348. </field>
  2349. <field> <name>CTCIF0</name>
  2350. <description>Stream x clear transfer complete
  2351. interrupt flag (x = 3..0)</description>
  2352. <bitOffset>5</bitOffset>
  2353. <bitWidth>1</bitWidth>
  2354. </field>
  2355. <field> <name>CHTIF0</name>
  2356. <description>Stream x clear half transfer interrupt
  2357. flag (x = 3..0)</description>
  2358. <bitOffset>4</bitOffset>
  2359. <bitWidth>1</bitWidth>
  2360. </field>
  2361. <field> <name>CTEIF0</name>
  2362. <description>Stream x clear transfer error interrupt
  2363. flag (x = 3..0)</description>
  2364. <bitOffset>3</bitOffset>
  2365. <bitWidth>1</bitWidth>
  2366. </field>
  2367. <field> <name>CDMEIF0</name>
  2368. <description>Stream x clear direct mode error
  2369. interrupt flag (x = 3..0)</description>
  2370. <bitOffset>2</bitOffset>
  2371. <bitWidth>1</bitWidth>
  2372. </field>
  2373. <field> <name>CFEIF0</name>
  2374. <description>Stream x clear FIFO error interrupt flag
  2375. (x = 3..0)</description>
  2376. <bitOffset>0</bitOffset>
  2377. <bitWidth>1</bitWidth>
  2378. </field>
  2379. </fields>
  2380. </register>
  2381. <register> <name>HIFCR</name>
  2382. <displayName>HIFCR</displayName>
  2383. <description>high interrupt flag clear
  2384. register</description>
  2385. <addressOffset>0xC</addressOffset>
  2386. <size>0x20</size>
  2387. <access>read-write</access>
  2388. <resetValue>0x00000000</resetValue>
  2389. <fields>
  2390. <field> <name>CTCIF7</name>
  2391. <description>Stream x clear transfer complete
  2392. interrupt flag (x = 7..4)</description>
  2393. <bitOffset>27</bitOffset>
  2394. <bitWidth>1</bitWidth>
  2395. </field>
  2396. <field> <name>CHTIF7</name>
  2397. <description>Stream x clear half transfer interrupt
  2398. flag (x = 7..4)</description>
  2399. <bitOffset>26</bitOffset>
  2400. <bitWidth>1</bitWidth>
  2401. </field>
  2402. <field> <name>CTEIF7</name>
  2403. <description>Stream x clear transfer error interrupt
  2404. flag (x = 7..4)</description>
  2405. <bitOffset>25</bitOffset>
  2406. <bitWidth>1</bitWidth>
  2407. </field>
  2408. <field> <name>CDMEIF7</name>
  2409. <description>Stream x clear direct mode error
  2410. interrupt flag (x = 7..4)</description>
  2411. <bitOffset>24</bitOffset>
  2412. <bitWidth>1</bitWidth>
  2413. </field>
  2414. <field> <name>CFEIF7</name>
  2415. <description>Stream x clear FIFO error interrupt flag
  2416. (x = 7..4)</description>
  2417. <bitOffset>22</bitOffset>
  2418. <bitWidth>1</bitWidth>
  2419. </field>
  2420. <field> <name>CTCIF6</name>
  2421. <description>Stream x clear transfer complete
  2422. interrupt flag (x = 7..4)</description>
  2423. <bitOffset>21</bitOffset>
  2424. <bitWidth>1</bitWidth>
  2425. </field>
  2426. <field> <name>CHTIF6</name>
  2427. <description>Stream x clear half transfer interrupt
  2428. flag (x = 7..4)</description>
  2429. <bitOffset>20</bitOffset>
  2430. <bitWidth>1</bitWidth>
  2431. </field>
  2432. <field> <name>CTEIF6</name>
  2433. <description>Stream x clear transfer error interrupt
  2434. flag (x = 7..4)</description>
  2435. <bitOffset>19</bitOffset>
  2436. <bitWidth>1</bitWidth>
  2437. </field>
  2438. <field> <name>CDMEIF6</name>
  2439. <description>Stream x clear direct mode error
  2440. interrupt flag (x = 7..4)</description>
  2441. <bitOffset>18</bitOffset>
  2442. <bitWidth>1</bitWidth>
  2443. </field>
  2444. <field> <name>CFEIF6</name>
  2445. <description>Stream x clear FIFO error interrupt flag
  2446. (x = 7..4)</description>
  2447. <bitOffset>16</bitOffset>
  2448. <bitWidth>1</bitWidth>
  2449. </field>
  2450. <field> <name>CTCIF5</name>
  2451. <description>Stream x clear transfer complete
  2452. interrupt flag (x = 7..4)</description>
  2453. <bitOffset>11</bitOffset>
  2454. <bitWidth>1</bitWidth>
  2455. </field>
  2456. <field> <name>CHTIF5</name>
  2457. <description>Stream x clear half transfer interrupt
  2458. flag (x = 7..4)</description>
  2459. <bitOffset>10</bitOffset>
  2460. <bitWidth>1</bitWidth>
  2461. </field>
  2462. <field> <name>CTEIF5</name>
  2463. <description>Stream x clear transfer error interrupt
  2464. flag (x = 7..4)</description>
  2465. <bitOffset>9</bitOffset>
  2466. <bitWidth>1</bitWidth>
  2467. </field>
  2468. <field> <name>CDMEIF5</name>
  2469. <description>Stream x clear direct mode error
  2470. interrupt flag (x = 7..4)</description>
  2471. <bitOffset>8</bitOffset>
  2472. <bitWidth>1</bitWidth>
  2473. </field>
  2474. <field> <name>CFEIF5</name>
  2475. <description>Stream x clear FIFO error interrupt flag
  2476. (x = 7..4)</description>
  2477. <bitOffset>6</bitOffset>
  2478. <bitWidth>1</bitWidth>
  2479. </field>
  2480. <field> <name>CTCIF4</name>
  2481. <description>Stream x clear transfer complete
  2482. interrupt flag (x = 7..4)</description>
  2483. <bitOffset>5</bitOffset>
  2484. <bitWidth>1</bitWidth>
  2485. </field>
  2486. <field> <name>CHTIF4</name>
  2487. <description>Stream x clear half transfer interrupt
  2488. flag (x = 7..4)</description>
  2489. <bitOffset>4</bitOffset>
  2490. <bitWidth>1</bitWidth>
  2491. </field>
  2492. <field> <name>CTEIF4</name>
  2493. <description>Stream x clear transfer error interrupt
  2494. flag (x = 7..4)</description>
  2495. <bitOffset>3</bitOffset>
  2496. <bitWidth>1</bitWidth>
  2497. </field>
  2498. <field> <name>CDMEIF4</name>
  2499. <description>Stream x clear direct mode error
  2500. interrupt flag (x = 7..4)</description>
  2501. <bitOffset>2</bitOffset>
  2502. <bitWidth>1</bitWidth>
  2503. </field>
  2504. <field> <name>CFEIF4</name>
  2505. <description>Stream x clear FIFO error interrupt flag
  2506. (x = 7..4)</description>
  2507. <bitOffset>0</bitOffset>
  2508. <bitWidth>1</bitWidth>
  2509. </field>
  2510. </fields>
  2511. </register>
  2512. <register> <name>S0CR</name>
  2513. <displayName>S0CR</displayName>
  2514. <description>stream x configuration
  2515. register</description>
  2516. <addressOffset>0x10</addressOffset>
  2517. <size>0x20</size>
  2518. <access>read-write</access>
  2519. <resetValue>0x00000000</resetValue>
  2520. <fields>
  2521. <field> <name>CHSEL</name>
  2522. <description>Channel selection</description>
  2523. <bitOffset>25</bitOffset>
  2524. <bitWidth>3</bitWidth>
  2525. </field>
  2526. <field> <name>MBURST</name>
  2527. <description>Memory burst transfer
  2528. configuration</description>
  2529. <bitOffset>23</bitOffset>
  2530. <bitWidth>2</bitWidth>
  2531. </field>
  2532. <field> <name>PBURST</name>
  2533. <description>Peripheral burst transfer
  2534. configuration</description>
  2535. <bitOffset>21</bitOffset>
  2536. <bitWidth>2</bitWidth>
  2537. </field>
  2538. <field> <name>CT</name>
  2539. <description>Current target (only in double buffer
  2540. mode)</description>
  2541. <bitOffset>19</bitOffset>
  2542. <bitWidth>1</bitWidth>
  2543. </field>
  2544. <field> <name>DBM</name>
  2545. <description>Double buffer mode</description>
  2546. <bitOffset>18</bitOffset>
  2547. <bitWidth>1</bitWidth>
  2548. </field>
  2549. <field> <name>PL</name>
  2550. <description>Priority level</description>
  2551. <bitOffset>16</bitOffset>
  2552. <bitWidth>2</bitWidth>
  2553. </field>
  2554. <field> <name>PINCOS</name>
  2555. <description>Peripheral increment offset
  2556. size</description>
  2557. <bitOffset>15</bitOffset>
  2558. <bitWidth>1</bitWidth>
  2559. </field>
  2560. <field> <name>MSIZE</name>
  2561. <description>Memory data size</description>
  2562. <bitOffset>13</bitOffset>
  2563. <bitWidth>2</bitWidth>
  2564. </field>
  2565. <field> <name>PSIZE</name>
  2566. <description>Peripheral data size</description>
  2567. <bitOffset>11</bitOffset>
  2568. <bitWidth>2</bitWidth>
  2569. </field>
  2570. <field> <name>MINC</name>
  2571. <description>Memory increment mode</description>
  2572. <bitOffset>10</bitOffset>
  2573. <bitWidth>1</bitWidth>
  2574. </field>
  2575. <field> <name>PINC</name>
  2576. <description>Peripheral increment mode</description>
  2577. <bitOffset>9</bitOffset>
  2578. <bitWidth>1</bitWidth>
  2579. </field>
  2580. <field> <name>CIRC</name>
  2581. <description>Circular mode</description>
  2582. <bitOffset>8</bitOffset>
  2583. <bitWidth>1</bitWidth>
  2584. </field>
  2585. <field> <name>DIR</name>
  2586. <description>Data transfer direction</description>
  2587. <bitOffset>6</bitOffset>
  2588. <bitWidth>2</bitWidth>
  2589. </field>
  2590. <field> <name>PFCTRL</name>
  2591. <description>Peripheral flow controller</description>
  2592. <bitOffset>5</bitOffset>
  2593. <bitWidth>1</bitWidth>
  2594. </field>
  2595. <field> <name>TCIE</name>
  2596. <description>Transfer complete interrupt
  2597. enable</description>
  2598. <bitOffset>4</bitOffset>
  2599. <bitWidth>1</bitWidth>
  2600. </field>
  2601. <field> <name>HTIE</name>
  2602. <description>Half transfer interrupt
  2603. enable</description>
  2604. <bitOffset>3</bitOffset>
  2605. <bitWidth>1</bitWidth>
  2606. </field>
  2607. <field> <name>TEIE</name>
  2608. <description>Transfer error interrupt
  2609. enable</description>
  2610. <bitOffset>2</bitOffset>
  2611. <bitWidth>1</bitWidth>
  2612. </field>
  2613. <field> <name>DMEIE</name>
  2614. <description>Direct mode error interrupt
  2615. enable</description>
  2616. <bitOffset>1</bitOffset>
  2617. <bitWidth>1</bitWidth>
  2618. </field>
  2619. <field> <name>EN</name>
  2620. <description>Stream enable / flag stream ready when
  2621. read low</description>
  2622. <bitOffset>0</bitOffset>
  2623. <bitWidth>1</bitWidth>
  2624. </field>
  2625. </fields>
  2626. </register>
  2627. <register> <name>S0NDTR</name>
  2628. <displayName>S0NDTR</displayName>
  2629. <description>stream x number of data
  2630. register</description>
  2631. <addressOffset>0x14</addressOffset>
  2632. <size>0x20</size>
  2633. <access>read-write</access>
  2634. <resetValue>0x00000000</resetValue>
  2635. <fields>
  2636. <field> <name>NDT</name>
  2637. <description>Number of data items to
  2638. transfer</description>
  2639. <bitOffset>0</bitOffset>
  2640. <bitWidth>16</bitWidth>
  2641. </field>
  2642. </fields>
  2643. </register>
  2644. <register> <name>S0PAR</name>
  2645. <displayName>S0PAR</displayName>
  2646. <description>stream x peripheral address
  2647. register</description>
  2648. <addressOffset>0x18</addressOffset>
  2649. <size>0x20</size>
  2650. <access>read-write</access>
  2651. <resetValue>0x00000000</resetValue>
  2652. <fields>
  2653. <field> <name>PA</name>
  2654. <description>Peripheral address</description>
  2655. <bitOffset>0</bitOffset>
  2656. <bitWidth>32</bitWidth>
  2657. </field>
  2658. </fields>
  2659. </register>
  2660. <register> <name>S0M0AR</name>
  2661. <displayName>S0M0AR</displayName>
  2662. <description>stream x memory 0 address
  2663. register</description>
  2664. <addressOffset>0x1C</addressOffset>
  2665. <size>0x20</size>
  2666. <access>read-write</access>
  2667. <resetValue>0x00000000</resetValue>
  2668. <fields>
  2669. <field> <name>M0A</name>
  2670. <description>Memory 0 address</description>
  2671. <bitOffset>0</bitOffset>
  2672. <bitWidth>32</bitWidth>
  2673. </field>
  2674. </fields>
  2675. </register>
  2676. <register> <name>S0M1AR</name>
  2677. <displayName>S0M1AR</displayName>
  2678. <description>stream x memory 1 address
  2679. register</description>
  2680. <addressOffset>0x20</addressOffset>
  2681. <size>0x20</size>
  2682. <access>read-write</access>
  2683. <resetValue>0x00000000</resetValue>
  2684. <fields>
  2685. <field> <name>M1A</name>
  2686. <description>Memory 1 address (used in case of Double
  2687. buffer mode)</description>
  2688. <bitOffset>0</bitOffset>
  2689. <bitWidth>32</bitWidth>
  2690. </field>
  2691. </fields>
  2692. </register>
  2693. <register> <name>S0FCR</name>
  2694. <displayName>S0FCR</displayName>
  2695. <description>stream x FIFO control register</description>
  2696. <addressOffset>0x24</addressOffset>
  2697. <size>0x20</size>
  2698. <resetValue>0x00000021</resetValue>
  2699. <fields>
  2700. <field> <name>FEIE</name>
  2701. <description>FIFO error interrupt
  2702. enable</description>
  2703. <bitOffset>7</bitOffset>
  2704. <bitWidth>1</bitWidth>
  2705. <access>read-write</access>
  2706. </field>
  2707. <field> <name>FS</name>
  2708. <description>FIFO status</description>
  2709. <bitOffset>3</bitOffset>
  2710. <bitWidth>3</bitWidth>
  2711. <access>read-only</access>
  2712. </field>
  2713. <field> <name>DMDIS</name>
  2714. <description>Direct mode disable</description>
  2715. <bitOffset>2</bitOffset>
  2716. <bitWidth>1</bitWidth>
  2717. <access>read-write</access>
  2718. </field>
  2719. <field> <name>FTH</name>
  2720. <description>FIFO threshold selection</description>
  2721. <bitOffset>0</bitOffset>
  2722. <bitWidth>2</bitWidth>
  2723. <access>read-write</access>
  2724. </field>
  2725. </fields>
  2726. </register>
  2727. <register> <name>S1CR</name>
  2728. <displayName>S1CR</displayName>
  2729. <description>stream x configuration
  2730. register</description>
  2731. <addressOffset>0x28</addressOffset>
  2732. <size>0x20</size>
  2733. <access>read-write</access>
  2734. <resetValue>0x00000000</resetValue>
  2735. <fields>
  2736. <field> <name>CHSEL</name>
  2737. <description>Channel selection</description>
  2738. <bitOffset>25</bitOffset>
  2739. <bitWidth>3</bitWidth>
  2740. </field>
  2741. <field> <name>MBURST</name>
  2742. <description>Memory burst transfer
  2743. configuration</description>
  2744. <bitOffset>23</bitOffset>
  2745. <bitWidth>2</bitWidth>
  2746. </field>
  2747. <field> <name>PBURST</name>
  2748. <description>Peripheral burst transfer
  2749. configuration</description>
  2750. <bitOffset>21</bitOffset>
  2751. <bitWidth>2</bitWidth>
  2752. </field>
  2753. <field> <name>ACK</name>
  2754. <description>ACK</description>
  2755. <bitOffset>20</bitOffset>
  2756. <bitWidth>1</bitWidth>
  2757. </field>
  2758. <field> <name>CT</name>
  2759. <description>Current target (only in double buffer
  2760. mode)</description>
  2761. <bitOffset>19</bitOffset>
  2762. <bitWidth>1</bitWidth>
  2763. </field>
  2764. <field> <name>DBM</name>
  2765. <description>Double buffer mode</description>
  2766. <bitOffset>18</bitOffset>
  2767. <bitWidth>1</bitWidth>
  2768. </field>
  2769. <field> <name>PL</name>
  2770. <description>Priority level</description>
  2771. <bitOffset>16</bitOffset>
  2772. <bitWidth>2</bitWidth>
  2773. </field>
  2774. <field> <name>PINCOS</name>
  2775. <description>Peripheral increment offset
  2776. size</description>
  2777. <bitOffset>15</bitOffset>
  2778. <bitWidth>1</bitWidth>
  2779. </field>
  2780. <field> <name>MSIZE</name>
  2781. <description>Memory data size</description>
  2782. <bitOffset>13</bitOffset>
  2783. <bitWidth>2</bitWidth>
  2784. </field>
  2785. <field> <name>PSIZE</name>
  2786. <description>Peripheral data size</description>
  2787. <bitOffset>11</bitOffset>
  2788. <bitWidth>2</bitWidth>
  2789. </field>
  2790. <field> <name>MINC</name>
  2791. <description>Memory increment mode</description>
  2792. <bitOffset>10</bitOffset>
  2793. <bitWidth>1</bitWidth>
  2794. </field>
  2795. <field> <name>PINC</name>
  2796. <description>Peripheral increment mode</description>
  2797. <bitOffset>9</bitOffset>
  2798. <bitWidth>1</bitWidth>
  2799. </field>
  2800. <field> <name>CIRC</name>
  2801. <description>Circular mode</description>
  2802. <bitOffset>8</bitOffset>
  2803. <bitWidth>1</bitWidth>
  2804. </field>
  2805. <field> <name>DIR</name>
  2806. <description>Data transfer direction</description>
  2807. <bitOffset>6</bitOffset>
  2808. <bitWidth>2</bitWidth>
  2809. </field>
  2810. <field> <name>PFCTRL</name>
  2811. <description>Peripheral flow controller</description>
  2812. <bitOffset>5</bitOffset>
  2813. <bitWidth>1</bitWidth>
  2814. </field>
  2815. <field> <name>TCIE</name>
  2816. <description>Transfer complete interrupt
  2817. enable</description>
  2818. <bitOffset>4</bitOffset>
  2819. <bitWidth>1</bitWidth>
  2820. </field>
  2821. <field> <name>HTIE</name>
  2822. <description>Half transfer interrupt
  2823. enable</description>
  2824. <bitOffset>3</bitOffset>
  2825. <bitWidth>1</bitWidth>
  2826. </field>
  2827. <field> <name>TEIE</name>
  2828. <description>Transfer error interrupt
  2829. enable</description>
  2830. <bitOffset>2</bitOffset>
  2831. <bitWidth>1</bitWidth>
  2832. </field>
  2833. <field> <name>DMEIE</name>
  2834. <description>Direct mode error interrupt
  2835. enable</description>
  2836. <bitOffset>1</bitOffset>
  2837. <bitWidth>1</bitWidth>
  2838. </field>
  2839. <field> <name>EN</name>
  2840. <description>Stream enable / flag stream ready when
  2841. read low</description>
  2842. <bitOffset>0</bitOffset>
  2843. <bitWidth>1</bitWidth>
  2844. </field>
  2845. </fields>
  2846. </register>
  2847. <register> <name>S1NDTR</name>
  2848. <displayName>S1NDTR</displayName>
  2849. <description>stream x number of data
  2850. register</description>
  2851. <addressOffset>0x2C</addressOffset>
  2852. <size>0x20</size>
  2853. <access>read-write</access>
  2854. <resetValue>0x00000000</resetValue>
  2855. <fields>
  2856. <field> <name>NDT</name>
  2857. <description>Number of data items to
  2858. transfer</description>
  2859. <bitOffset>0</bitOffset>
  2860. <bitWidth>16</bitWidth>
  2861. </field>
  2862. </fields>
  2863. </register>
  2864. <register> <name>S1PAR</name>
  2865. <displayName>S1PAR</displayName>
  2866. <description>stream x peripheral address
  2867. register</description>
  2868. <addressOffset>0x30</addressOffset>
  2869. <size>0x20</size>
  2870. <access>read-write</access>
  2871. <resetValue>0x00000000</resetValue>
  2872. <fields>
  2873. <field> <name>PA</name>
  2874. <description>Peripheral address</description>
  2875. <bitOffset>0</bitOffset>
  2876. <bitWidth>32</bitWidth>
  2877. </field>
  2878. </fields>
  2879. </register>
  2880. <register> <name>S1M0AR</name>
  2881. <displayName>S1M0AR</displayName>
  2882. <description>stream x memory 0 address
  2883. register</description>
  2884. <addressOffset>0x34</addressOffset>
  2885. <size>0x20</size>
  2886. <access>read-write</access>
  2887. <resetValue>0x00000000</resetValue>
  2888. <fields>
  2889. <field> <name>M0A</name>
  2890. <description>Memory 0 address</description>
  2891. <bitOffset>0</bitOffset>
  2892. <bitWidth>32</bitWidth>
  2893. </field>
  2894. </fields>
  2895. </register>
  2896. <register> <name>S1M1AR</name>
  2897. <displayName>S1M1AR</displayName>
  2898. <description>stream x memory 1 address
  2899. register</description>
  2900. <addressOffset>0x38</addressOffset>
  2901. <size>0x20</size>
  2902. <access>read-write</access>
  2903. <resetValue>0x00000000</resetValue>
  2904. <fields>
  2905. <field> <name>M1A</name>
  2906. <description>Memory 1 address (used in case of Double
  2907. buffer mode)</description>
  2908. <bitOffset>0</bitOffset>
  2909. <bitWidth>32</bitWidth>
  2910. </field>
  2911. </fields>
  2912. </register>
  2913. <register> <name>S1FCR</name>
  2914. <displayName>S1FCR</displayName>
  2915. <description>stream x FIFO control register</description>
  2916. <addressOffset>0x3C</addressOffset>
  2917. <size>0x20</size>
  2918. <resetValue>0x00000021</resetValue>
  2919. <fields>
  2920. <field> <name>FEIE</name>
  2921. <description>FIFO error interrupt
  2922. enable</description>
  2923. <bitOffset>7</bitOffset>
  2924. <bitWidth>1</bitWidth>
  2925. <access>read-write</access>
  2926. </field>
  2927. <field> <name>FS</name>
  2928. <description>FIFO status</description>
  2929. <bitOffset>3</bitOffset>
  2930. <bitWidth>3</bitWidth>
  2931. <access>read-only</access>
  2932. </field>
  2933. <field> <name>DMDIS</name>
  2934. <description>Direct mode disable</description>
  2935. <bitOffset>2</bitOffset>
  2936. <bitWidth>1</bitWidth>
  2937. <access>read-write</access>
  2938. </field>
  2939. <field> <name>FTH</name>
  2940. <description>FIFO threshold selection</description>
  2941. <bitOffset>0</bitOffset>
  2942. <bitWidth>2</bitWidth>
  2943. <access>read-write</access>
  2944. </field>
  2945. </fields>
  2946. </register>
  2947. <register> <name>S2CR</name>
  2948. <displayName>S2CR</displayName>
  2949. <description>stream x configuration
  2950. register</description>
  2951. <addressOffset>0x40</addressOffset>
  2952. <size>0x20</size>
  2953. <access>read-write</access>
  2954. <resetValue>0x00000000</resetValue>
  2955. <fields>
  2956. <field> <name>CHSEL</name>
  2957. <description>Channel selection</description>
  2958. <bitOffset>25</bitOffset>
  2959. <bitWidth>3</bitWidth>
  2960. </field>
  2961. <field> <name>MBURST</name>
  2962. <description>Memory burst transfer
  2963. configuration</description>
  2964. <bitOffset>23</bitOffset>
  2965. <bitWidth>2</bitWidth>
  2966. </field>
  2967. <field> <name>PBURST</name>
  2968. <description>Peripheral burst transfer
  2969. configuration</description>
  2970. <bitOffset>21</bitOffset>
  2971. <bitWidth>2</bitWidth>
  2972. </field>
  2973. <field> <name>ACK</name>
  2974. <description>ACK</description>
  2975. <bitOffset>20</bitOffset>
  2976. <bitWidth>1</bitWidth>
  2977. </field>
  2978. <field> <name>CT</name>
  2979. <description>Current target (only in double buffer
  2980. mode)</description>
  2981. <bitOffset>19</bitOffset>
  2982. <bitWidth>1</bitWidth>
  2983. </field>
  2984. <field> <name>DBM</name>
  2985. <description>Double buffer mode</description>
  2986. <bitOffset>18</bitOffset>
  2987. <bitWidth>1</bitWidth>
  2988. </field>
  2989. <field> <name>PL</name>
  2990. <description>Priority level</description>
  2991. <bitOffset>16</bitOffset>
  2992. <bitWidth>2</bitWidth>
  2993. </field>
  2994. <field> <name>PINCOS</name>
  2995. <description>Peripheral increment offset
  2996. size</description>
  2997. <bitOffset>15</bitOffset>
  2998. <bitWidth>1</bitWidth>
  2999. </field>
  3000. <field> <name>MSIZE</name>
  3001. <description>Memory data size</description>
  3002. <bitOffset>13</bitOffset>
  3003. <bitWidth>2</bitWidth>
  3004. </field>
  3005. <field> <name>PSIZE</name>
  3006. <description>Peripheral data size</description>
  3007. <bitOffset>11</bitOffset>
  3008. <bitWidth>2</bitWidth>
  3009. </field>
  3010. <field> <name>MINC</name>
  3011. <description>Memory increment mode</description>
  3012. <bitOffset>10</bitOffset>
  3013. <bitWidth>1</bitWidth>
  3014. </field>
  3015. <field> <name>PINC</name>
  3016. <description>Peripheral increment mode</description>
  3017. <bitOffset>9</bitOffset>
  3018. <bitWidth>1</bitWidth>
  3019. </field>
  3020. <field> <name>CIRC</name>
  3021. <description>Circular mode</description>
  3022. <bitOffset>8</bitOffset>
  3023. <bitWidth>1</bitWidth>
  3024. </field>
  3025. <field> <name>DIR</name>
  3026. <description>Data transfer direction</description>
  3027. <bitOffset>6</bitOffset>
  3028. <bitWidth>2</bitWidth>
  3029. </field>
  3030. <field> <name>PFCTRL</name>
  3031. <description>Peripheral flow controller</description>
  3032. <bitOffset>5</bitOffset>
  3033. <bitWidth>1</bitWidth>
  3034. </field>
  3035. <field> <name>TCIE</name>
  3036. <description>Transfer complete interrupt
  3037. enable</description>
  3038. <bitOffset>4</bitOffset>
  3039. <bitWidth>1</bitWidth>
  3040. </field>
  3041. <field> <name>HTIE</name>
  3042. <description>Half transfer interrupt
  3043. enable</description>
  3044. <bitOffset>3</bitOffset>
  3045. <bitWidth>1</bitWidth>
  3046. </field>
  3047. <field> <name>TEIE</name>
  3048. <description>Transfer error interrupt
  3049. enable</description>
  3050. <bitOffset>2</bitOffset>
  3051. <bitWidth>1</bitWidth>
  3052. </field>
  3053. <field> <name>DMEIE</name>
  3054. <description>Direct mode error interrupt
  3055. enable</description>
  3056. <bitOffset>1</bitOffset>
  3057. <bitWidth>1</bitWidth>
  3058. </field>
  3059. <field> <name>EN</name>
  3060. <description>Stream enable / flag stream ready when
  3061. read low</description>
  3062. <bitOffset>0</bitOffset>
  3063. <bitWidth>1</bitWidth>
  3064. </field>
  3065. </fields>
  3066. </register>
  3067. <register> <name>S2NDTR</name>
  3068. <displayName>S2NDTR</displayName>
  3069. <description>stream x number of data
  3070. register</description>
  3071. <addressOffset>0x44</addressOffset>
  3072. <size>0x20</size>
  3073. <access>read-write</access>
  3074. <resetValue>0x00000000</resetValue>
  3075. <fields>
  3076. <field> <name>NDT</name>
  3077. <description>Number of data items to
  3078. transfer</description>
  3079. <bitOffset>0</bitOffset>
  3080. <bitWidth>16</bitWidth>
  3081. </field>
  3082. </fields>
  3083. </register>
  3084. <register> <name>S2PAR</name>
  3085. <displayName>S2PAR</displayName>
  3086. <description>stream x peripheral address
  3087. register</description>
  3088. <addressOffset>0x48</addressOffset>
  3089. <size>0x20</size>
  3090. <access>read-write</access>
  3091. <resetValue>0x00000000</resetValue>
  3092. <fields>
  3093. <field> <name>PA</name>
  3094. <description>Peripheral address</description>
  3095. <bitOffset>0</bitOffset>
  3096. <bitWidth>32</bitWidth>
  3097. </field>
  3098. </fields>
  3099. </register>
  3100. <register> <name>S2M0AR</name>
  3101. <displayName>S2M0AR</displayName>
  3102. <description>stream x memory 0 address
  3103. register</description>
  3104. <addressOffset>0x4C</addressOffset>
  3105. <size>0x20</size>
  3106. <access>read-write</access>
  3107. <resetValue>0x00000000</resetValue>
  3108. <fields>
  3109. <field> <name>M0A</name>
  3110. <description>Memory 0 address</description>
  3111. <bitOffset>0</bitOffset>
  3112. <bitWidth>32</bitWidth>
  3113. </field>
  3114. </fields>
  3115. </register>
  3116. <register> <name>S2M1AR</name>
  3117. <displayName>S2M1AR</displayName>
  3118. <description>stream x memory 1 address
  3119. register</description>
  3120. <addressOffset>0x50</addressOffset>
  3121. <size>0x20</size>
  3122. <access>read-write</access>
  3123. <resetValue>0x00000000</resetValue>
  3124. <fields>
  3125. <field> <name>M1A</name>
  3126. <description>Memory 1 address (used in case of Double
  3127. buffer mode)</description>
  3128. <bitOffset>0</bitOffset>
  3129. <bitWidth>32</bitWidth>
  3130. </field>
  3131. </fields>
  3132. </register>
  3133. <register> <name>S2FCR</name>
  3134. <displayName>S2FCR</displayName>
  3135. <description>stream x FIFO control register</description>
  3136. <addressOffset>0x54</addressOffset>
  3137. <size>0x20</size>
  3138. <resetValue>0x00000021</resetValue>
  3139. <fields>
  3140. <field> <name>FEIE</name>
  3141. <description>FIFO error interrupt
  3142. enable</description>
  3143. <bitOffset>7</bitOffset>
  3144. <bitWidth>1</bitWidth>
  3145. <access>read-write</access>
  3146. </field>
  3147. <field> <name>FS</name>
  3148. <description>FIFO status</description>
  3149. <bitOffset>3</bitOffset>
  3150. <bitWidth>3</bitWidth>
  3151. <access>read-only</access>
  3152. </field>
  3153. <field> <name>DMDIS</name>
  3154. <description>Direct mode disable</description>
  3155. <bitOffset>2</bitOffset>
  3156. <bitWidth>1</bitWidth>
  3157. <access>read-write</access>
  3158. </field>
  3159. <field> <name>FTH</name>
  3160. <description>FIFO threshold selection</description>
  3161. <bitOffset>0</bitOffset>
  3162. <bitWidth>2</bitWidth>
  3163. <access>read-write</access>
  3164. </field>
  3165. </fields>
  3166. </register>
  3167. <register> <name>S3CR</name>
  3168. <displayName>S3CR</displayName>
  3169. <description>stream x configuration
  3170. register</description>
  3171. <addressOffset>0x58</addressOffset>
  3172. <size>0x20</size>
  3173. <access>read-write</access>
  3174. <resetValue>0x00000000</resetValue>
  3175. <fields>
  3176. <field> <name>CHSEL</name>
  3177. <description>Channel selection</description>
  3178. <bitOffset>25</bitOffset>
  3179. <bitWidth>3</bitWidth>
  3180. </field>
  3181. <field> <name>MBURST</name>
  3182. <description>Memory burst transfer
  3183. configuration</description>
  3184. <bitOffset>23</bitOffset>
  3185. <bitWidth>2</bitWidth>
  3186. </field>
  3187. <field> <name>PBURST</name>
  3188. <description>Peripheral burst transfer
  3189. configuration</description>
  3190. <bitOffset>21</bitOffset>
  3191. <bitWidth>2</bitWidth>
  3192. </field>
  3193. <field> <name>ACK</name>
  3194. <description>ACK</description>
  3195. <bitOffset>20</bitOffset>
  3196. <bitWidth>1</bitWidth>
  3197. </field>
  3198. <field> <name>CT</name>
  3199. <description>Current target (only in double buffer
  3200. mode)</description>
  3201. <bitOffset>19</bitOffset>
  3202. <bitWidth>1</bitWidth>
  3203. </field>
  3204. <field> <name>DBM</name>
  3205. <description>Double buffer mode</description>
  3206. <bitOffset>18</bitOffset>
  3207. <bitWidth>1</bitWidth>
  3208. </field>
  3209. <field> <name>PL</name>
  3210. <description>Priority level</description>
  3211. <bitOffset>16</bitOffset>
  3212. <bitWidth>2</bitWidth>
  3213. </field>
  3214. <field> <name>PINCOS</name>
  3215. <description>Peripheral increment offset
  3216. size</description>
  3217. <bitOffset>15</bitOffset>
  3218. <bitWidth>1</bitWidth>
  3219. </field>
  3220. <field> <name>MSIZE</name>
  3221. <description>Memory data size</description>
  3222. <bitOffset>13</bitOffset>
  3223. <bitWidth>2</bitWidth>
  3224. </field>
  3225. <field> <name>PSIZE</name>
  3226. <description>Peripheral data size</description>
  3227. <bitOffset>11</bitOffset>
  3228. <bitWidth>2</bitWidth>
  3229. </field>
  3230. <field> <name>MINC</name>
  3231. <description>Memory increment mode</description>
  3232. <bitOffset>10</bitOffset>
  3233. <bitWidth>1</bitWidth>
  3234. </field>
  3235. <field> <name>PINC</name>
  3236. <description>Peripheral increment mode</description>
  3237. <bitOffset>9</bitOffset>
  3238. <bitWidth>1</bitWidth>
  3239. </field>
  3240. <field> <name>CIRC</name>
  3241. <description>Circular mode</description>
  3242. <bitOffset>8</bitOffset>
  3243. <bitWidth>1</bitWidth>
  3244. </field>
  3245. <field> <name>DIR</name>
  3246. <description>Data transfer direction</description>
  3247. <bitOffset>6</bitOffset>
  3248. <bitWidth>2</bitWidth>
  3249. </field>
  3250. <field> <name>PFCTRL</name>
  3251. <description>Peripheral flow controller</description>
  3252. <bitOffset>5</bitOffset>
  3253. <bitWidth>1</bitWidth>
  3254. </field>
  3255. <field> <name>TCIE</name>
  3256. <description>Transfer complete interrupt
  3257. enable</description>
  3258. <bitOffset>4</bitOffset>
  3259. <bitWidth>1</bitWidth>
  3260. </field>
  3261. <field> <name>HTIE</name>
  3262. <description>Half transfer interrupt
  3263. enable</description>
  3264. <bitOffset>3</bitOffset>
  3265. <bitWidth>1</bitWidth>
  3266. </field>
  3267. <field> <name>TEIE</name>
  3268. <description>Transfer error interrupt
  3269. enable</description>
  3270. <bitOffset>2</bitOffset>
  3271. <bitWidth>1</bitWidth>
  3272. </field>
  3273. <field> <name>DMEIE</name>
  3274. <description>Direct mode error interrupt
  3275. enable</description>
  3276. <bitOffset>1</bitOffset>
  3277. <bitWidth>1</bitWidth>
  3278. </field>
  3279. <field> <name>EN</name>
  3280. <description>Stream enable / flag stream ready when
  3281. read low</description>
  3282. <bitOffset>0</bitOffset>
  3283. <bitWidth>1</bitWidth>
  3284. </field>
  3285. </fields>
  3286. </register>
  3287. <register> <name>S3NDTR</name>
  3288. <displayName>S3NDTR</displayName>
  3289. <description>stream x number of data
  3290. register</description>
  3291. <addressOffset>0x5C</addressOffset>
  3292. <size>0x20</size>
  3293. <access>read-write</access>
  3294. <resetValue>0x00000000</resetValue>
  3295. <fields>
  3296. <field> <name>NDT</name>
  3297. <description>Number of data items to
  3298. transfer</description>
  3299. <bitOffset>0</bitOffset>
  3300. <bitWidth>16</bitWidth>
  3301. </field>
  3302. </fields>
  3303. </register>
  3304. <register> <name>S3PAR</name>
  3305. <displayName>S3PAR</displayName>
  3306. <description>stream x peripheral address
  3307. register</description>
  3308. <addressOffset>0x60</addressOffset>
  3309. <size>0x20</size>
  3310. <access>read-write</access>
  3311. <resetValue>0x00000000</resetValue>
  3312. <fields>
  3313. <field> <name>PA</name>
  3314. <description>Peripheral address</description>
  3315. <bitOffset>0</bitOffset>
  3316. <bitWidth>32</bitWidth>
  3317. </field>
  3318. </fields>
  3319. </register>
  3320. <register> <name>S3M0AR</name>
  3321. <displayName>S3M0AR</displayName>
  3322. <description>stream x memory 0 address
  3323. register</description>
  3324. <addressOffset>0x64</addressOffset>
  3325. <size>0x20</size>
  3326. <access>read-write</access>
  3327. <resetValue>0x00000000</resetValue>
  3328. <fields>
  3329. <field> <name>M0A</name>
  3330. <description>Memory 0 address</description>
  3331. <bitOffset>0</bitOffset>
  3332. <bitWidth>32</bitWidth>
  3333. </field>
  3334. </fields>
  3335. </register>
  3336. <register> <name>S3M1AR</name>
  3337. <displayName>S3M1AR</displayName>
  3338. <description>stream x memory 1 address
  3339. register</description>
  3340. <addressOffset>0x68</addressOffset>
  3341. <size>0x20</size>
  3342. <access>read-write</access>
  3343. <resetValue>0x00000000</resetValue>
  3344. <fields>
  3345. <field> <name>M1A</name>
  3346. <description>Memory 1 address (used in case of Double
  3347. buffer mode)</description>
  3348. <bitOffset>0</bitOffset>
  3349. <bitWidth>32</bitWidth>
  3350. </field>
  3351. </fields>
  3352. </register>
  3353. <register> <name>S3FCR</name>
  3354. <displayName>S3FCR</displayName>
  3355. <description>stream x FIFO control register</description>
  3356. <addressOffset>0x6C</addressOffset>
  3357. <size>0x20</size>
  3358. <resetValue>0x00000021</resetValue>
  3359. <fields>
  3360. <field> <name>FEIE</name>
  3361. <description>FIFO error interrupt
  3362. enable</description>
  3363. <bitOffset>7</bitOffset>
  3364. <bitWidth>1</bitWidth>
  3365. <access>read-write</access>
  3366. </field>
  3367. <field> <name>FS</name>
  3368. <description>FIFO status</description>
  3369. <bitOffset>3</bitOffset>
  3370. <bitWidth>3</bitWidth>
  3371. <access>read-only</access>
  3372. </field>
  3373. <field> <name>DMDIS</name>
  3374. <description>Direct mode disable</description>
  3375. <bitOffset>2</bitOffset>
  3376. <bitWidth>1</bitWidth>
  3377. <access>read-write</access>
  3378. </field>
  3379. <field> <name>FTH</name>
  3380. <description>FIFO threshold selection</description>
  3381. <bitOffset>0</bitOffset>
  3382. <bitWidth>2</bitWidth>
  3383. <access>read-write</access>
  3384. </field>
  3385. </fields>
  3386. </register>
  3387. <register> <name>S4CR</name>
  3388. <displayName>S4CR</displayName>
  3389. <description>stream x configuration
  3390. register</description>
  3391. <addressOffset>0x70</addressOffset>
  3392. <size>0x20</size>
  3393. <access>read-write</access>
  3394. <resetValue>0x00000000</resetValue>
  3395. <fields>
  3396. <field> <name>CHSEL</name>
  3397. <description>Channel selection</description>
  3398. <bitOffset>25</bitOffset>
  3399. <bitWidth>3</bitWidth>
  3400. </field>
  3401. <field> <name>MBURST</name>
  3402. <description>Memory burst transfer
  3403. configuration</description>
  3404. <bitOffset>23</bitOffset>
  3405. <bitWidth>2</bitWidth>
  3406. </field>
  3407. <field> <name>PBURST</name>
  3408. <description>Peripheral burst transfer
  3409. configuration</description>
  3410. <bitOffset>21</bitOffset>
  3411. <bitWidth>2</bitWidth>
  3412. </field>
  3413. <field> <name>ACK</name>
  3414. <description>ACK</description>
  3415. <bitOffset>20</bitOffset>
  3416. <bitWidth>1</bitWidth>
  3417. </field>
  3418. <field> <name>CT</name>
  3419. <description>Current target (only in double buffer
  3420. mode)</description>
  3421. <bitOffset>19</bitOffset>
  3422. <bitWidth>1</bitWidth>
  3423. </field>
  3424. <field> <name>DBM</name>
  3425. <description>Double buffer mode</description>
  3426. <bitOffset>18</bitOffset>
  3427. <bitWidth>1</bitWidth>
  3428. </field>
  3429. <field> <name>PL</name>
  3430. <description>Priority level</description>
  3431. <bitOffset>16</bitOffset>
  3432. <bitWidth>2</bitWidth>
  3433. </field>
  3434. <field> <name>PINCOS</name>
  3435. <description>Peripheral increment offset
  3436. size</description>
  3437. <bitOffset>15</bitOffset>
  3438. <bitWidth>1</bitWidth>
  3439. </field>
  3440. <field> <name>MSIZE</name>
  3441. <description>Memory data size</description>
  3442. <bitOffset>13</bitOffset>
  3443. <bitWidth>2</bitWidth>
  3444. </field>
  3445. <field> <name>PSIZE</name>
  3446. <description>Peripheral data size</description>
  3447. <bitOffset>11</bitOffset>
  3448. <bitWidth>2</bitWidth>
  3449. </field>
  3450. <field> <name>MINC</name>
  3451. <description>Memory increment mode</description>
  3452. <bitOffset>10</bitOffset>
  3453. <bitWidth>1</bitWidth>
  3454. </field>
  3455. <field> <name>PINC</name>
  3456. <description>Peripheral increment mode</description>
  3457. <bitOffset>9</bitOffset>
  3458. <bitWidth>1</bitWidth>
  3459. </field>
  3460. <field> <name>CIRC</name>
  3461. <description>Circular mode</description>
  3462. <bitOffset>8</bitOffset>
  3463. <bitWidth>1</bitWidth>
  3464. </field>
  3465. <field> <name>DIR</name>
  3466. <description>Data transfer direction</description>
  3467. <bitOffset>6</bitOffset>
  3468. <bitWidth>2</bitWidth>
  3469. </field>
  3470. <field> <name>PFCTRL</name>
  3471. <description>Peripheral flow controller</description>
  3472. <bitOffset>5</bitOffset>
  3473. <bitWidth>1</bitWidth>
  3474. </field>
  3475. <field> <name>TCIE</name>
  3476. <description>Transfer complete interrupt
  3477. enable</description>
  3478. <bitOffset>4</bitOffset>
  3479. <bitWidth>1</bitWidth>
  3480. </field>
  3481. <field> <name>HTIE</name>
  3482. <description>Half transfer interrupt
  3483. enable</description>
  3484. <bitOffset>3</bitOffset>
  3485. <bitWidth>1</bitWidth>
  3486. </field>
  3487. <field> <name>TEIE</name>
  3488. <description>Transfer error interrupt
  3489. enable</description>
  3490. <bitOffset>2</bitOffset>
  3491. <bitWidth>1</bitWidth>
  3492. </field>
  3493. <field> <name>DMEIE</name>
  3494. <description>Direct mode error interrupt
  3495. enable</description>
  3496. <bitOffset>1</bitOffset>
  3497. <bitWidth>1</bitWidth>
  3498. </field>
  3499. <field> <name>EN</name>
  3500. <description>Stream enable / flag stream ready when
  3501. read low</description>
  3502. <bitOffset>0</bitOffset>
  3503. <bitWidth>1</bitWidth>
  3504. </field>
  3505. </fields>
  3506. </register>
  3507. <register> <name>S4NDTR</name>
  3508. <displayName>S4NDTR</displayName>
  3509. <description>stream x number of data
  3510. register</description>
  3511. <addressOffset>0x74</addressOffset>
  3512. <size>0x20</size>
  3513. <access>read-write</access>
  3514. <resetValue>0x00000000</resetValue>
  3515. <fields>
  3516. <field> <name>NDT</name>
  3517. <description>Number of data items to
  3518. transfer</description>
  3519. <bitOffset>0</bitOffset>
  3520. <bitWidth>16</bitWidth>
  3521. </field>
  3522. </fields>
  3523. </register>
  3524. <register> <name>S4PAR</name>
  3525. <displayName>S4PAR</displayName>
  3526. <description>stream x peripheral address
  3527. register</description>
  3528. <addressOffset>0x78</addressOffset>
  3529. <size>0x20</size>
  3530. <access>read-write</access>
  3531. <resetValue>0x00000000</resetValue>
  3532. <fields>
  3533. <field> <name>PA</name>
  3534. <description>Peripheral address</description>
  3535. <bitOffset>0</bitOffset>
  3536. <bitWidth>32</bitWidth>
  3537. </field>
  3538. </fields>
  3539. </register>
  3540. <register> <name>S4M0AR</name>
  3541. <displayName>S4M0AR</displayName>
  3542. <description>stream x memory 0 address
  3543. register</description>
  3544. <addressOffset>0x7C</addressOffset>
  3545. <size>0x20</size>
  3546. <access>read-write</access>
  3547. <resetValue>0x00000000</resetValue>
  3548. <fields>
  3549. <field> <name>M0A</name>
  3550. <description>Memory 0 address</description>
  3551. <bitOffset>0</bitOffset>
  3552. <bitWidth>32</bitWidth>
  3553. </field>
  3554. </fields>
  3555. </register>
  3556. <register> <name>S4M1AR</name>
  3557. <displayName>S4M1AR</displayName>
  3558. <description>stream x memory 1 address
  3559. register</description>
  3560. <addressOffset>0x80</addressOffset>
  3561. <size>0x20</size>
  3562. <access>read-write</access>
  3563. <resetValue>0x00000000</resetValue>
  3564. <fields>
  3565. <field> <name>M1A</name>
  3566. <description>Memory 1 address (used in case of Double
  3567. buffer mode)</description>
  3568. <bitOffset>0</bitOffset>
  3569. <bitWidth>32</bitWidth>
  3570. </field>
  3571. </fields>
  3572. </register>
  3573. <register> <name>S4FCR</name>
  3574. <displayName>S4FCR</displayName>
  3575. <description>stream x FIFO control register</description>
  3576. <addressOffset>0x84</addressOffset>
  3577. <size>0x20</size>
  3578. <resetValue>0x00000021</resetValue>
  3579. <fields>
  3580. <field> <name>FEIE</name>
  3581. <description>FIFO error interrupt
  3582. enable</description>
  3583. <bitOffset>7</bitOffset>
  3584. <bitWidth>1</bitWidth>
  3585. <access>read-write</access>
  3586. </field>
  3587. <field> <name>FS</name>
  3588. <description>FIFO status</description>
  3589. <bitOffset>3</bitOffset>
  3590. <bitWidth>3</bitWidth>
  3591. <access>read-only</access>
  3592. </field>
  3593. <field> <name>DMDIS</name>
  3594. <description>Direct mode disable</description>
  3595. <bitOffset>2</bitOffset>
  3596. <bitWidth>1</bitWidth>
  3597. <access>read-write</access>
  3598. </field>
  3599. <field> <name>FTH</name>
  3600. <description>FIFO threshold selection</description>
  3601. <bitOffset>0</bitOffset>
  3602. <bitWidth>2</bitWidth>
  3603. <access>read-write</access>
  3604. </field>
  3605. </fields>
  3606. </register>
  3607. <register> <name>S5CR</name>
  3608. <displayName>S5CR</displayName>
  3609. <description>stream x configuration
  3610. register</description>
  3611. <addressOffset>0x88</addressOffset>
  3612. <size>0x20</size>
  3613. <access>read-write</access>
  3614. <resetValue>0x00000000</resetValue>
  3615. <fields>
  3616. <field> <name>CHSEL</name>
  3617. <description>Channel selection</description>
  3618. <bitOffset>25</bitOffset>
  3619. <bitWidth>3</bitWidth>
  3620. </field>
  3621. <field> <name>MBURST</name>
  3622. <description>Memory burst transfer
  3623. configuration</description>
  3624. <bitOffset>23</bitOffset>
  3625. <bitWidth>2</bitWidth>
  3626. </field>
  3627. <field> <name>PBURST</name>
  3628. <description>Peripheral burst transfer
  3629. configuration</description>
  3630. <bitOffset>21</bitOffset>
  3631. <bitWidth>2</bitWidth>
  3632. </field>
  3633. <field> <name>ACK</name>
  3634. <description>ACK</description>
  3635. <bitOffset>20</bitOffset>
  3636. <bitWidth>1</bitWidth>
  3637. </field>
  3638. <field> <name>CT</name>
  3639. <description>Current target (only in double buffer
  3640. mode)</description>
  3641. <bitOffset>19</bitOffset>
  3642. <bitWidth>1</bitWidth>
  3643. </field>
  3644. <field> <name>DBM</name>
  3645. <description>Double buffer mode</description>
  3646. <bitOffset>18</bitOffset>
  3647. <bitWidth>1</bitWidth>
  3648. </field>
  3649. <field> <name>PL</name>
  3650. <description>Priority level</description>
  3651. <bitOffset>16</bitOffset>
  3652. <bitWidth>2</bitWidth>
  3653. </field>
  3654. <field> <name>PINCOS</name>
  3655. <description>Peripheral increment offset
  3656. size</description>
  3657. <bitOffset>15</bitOffset>
  3658. <bitWidth>1</bitWidth>
  3659. </field>
  3660. <field> <name>MSIZE</name>
  3661. <description>Memory data size</description>
  3662. <bitOffset>13</bitOffset>
  3663. <bitWidth>2</bitWidth>
  3664. </field>
  3665. <field> <name>PSIZE</name>
  3666. <description>Peripheral data size</description>
  3667. <bitOffset>11</bitOffset>
  3668. <bitWidth>2</bitWidth>
  3669. </field>
  3670. <field> <name>MINC</name>
  3671. <description>Memory increment mode</description>
  3672. <bitOffset>10</bitOffset>
  3673. <bitWidth>1</bitWidth>
  3674. </field>
  3675. <field> <name>PINC</name>
  3676. <description>Peripheral increment mode</description>
  3677. <bitOffset>9</bitOffset>
  3678. <bitWidth>1</bitWidth>
  3679. </field>
  3680. <field> <name>CIRC</name>
  3681. <description>Circular mode</description>
  3682. <bitOffset>8</bitOffset>
  3683. <bitWidth>1</bitWidth>
  3684. </field>
  3685. <field> <name>DIR</name>
  3686. <description>Data transfer direction</description>
  3687. <bitOffset>6</bitOffset>
  3688. <bitWidth>2</bitWidth>
  3689. </field>
  3690. <field> <name>PFCTRL</name>
  3691. <description>Peripheral flow controller</description>
  3692. <bitOffset>5</bitOffset>
  3693. <bitWidth>1</bitWidth>
  3694. </field>
  3695. <field> <name>TCIE</name>
  3696. <description>Transfer complete interrupt
  3697. enable</description>
  3698. <bitOffset>4</bitOffset>
  3699. <bitWidth>1</bitWidth>
  3700. </field>
  3701. <field> <name>HTIE</name>
  3702. <description>Half transfer interrupt
  3703. enable</description>
  3704. <bitOffset>3</bitOffset>
  3705. <bitWidth>1</bitWidth>
  3706. </field>
  3707. <field> <name>TEIE</name>
  3708. <description>Transfer error interrupt
  3709. enable</description>
  3710. <bitOffset>2</bitOffset>
  3711. <bitWidth>1</bitWidth>
  3712. </field>
  3713. <field> <name>DMEIE</name>
  3714. <description>Direct mode error interrupt
  3715. enable</description>
  3716. <bitOffset>1</bitOffset>
  3717. <bitWidth>1</bitWidth>
  3718. </field>
  3719. <field> <name>EN</name>
  3720. <description>Stream enable / flag stream ready when
  3721. read low</description>
  3722. <bitOffset>0</bitOffset>
  3723. <bitWidth>1</bitWidth>
  3724. </field>
  3725. </fields>
  3726. </register>
  3727. <register> <name>S5NDTR</name>
  3728. <displayName>S5NDTR</displayName>
  3729. <description>stream x number of data
  3730. register</description>
  3731. <addressOffset>0x8C</addressOffset>
  3732. <size>0x20</size>
  3733. <access>read-write</access>
  3734. <resetValue>0x00000000</resetValue>
  3735. <fields>
  3736. <field> <name>NDT</name>
  3737. <description>Number of data items to
  3738. transfer</description>
  3739. <bitOffset>0</bitOffset>
  3740. <bitWidth>16</bitWidth>
  3741. </field>
  3742. </fields>
  3743. </register>
  3744. <register> <name>S5PAR</name>
  3745. <displayName>S5PAR</displayName>
  3746. <description>stream x peripheral address
  3747. register</description>
  3748. <addressOffset>0x90</addressOffset>
  3749. <size>0x20</size>
  3750. <access>read-write</access>
  3751. <resetValue>0x00000000</resetValue>
  3752. <fields>
  3753. <field> <name>PA</name>
  3754. <description>Peripheral address</description>
  3755. <bitOffset>0</bitOffset>
  3756. <bitWidth>32</bitWidth>
  3757. </field>
  3758. </fields>
  3759. </register>
  3760. <register> <name>S5M0AR</name>
  3761. <displayName>S5M0AR</displayName>
  3762. <description>stream x memory 0 address
  3763. register</description>
  3764. <addressOffset>0x94</addressOffset>
  3765. <size>0x20</size>
  3766. <access>read-write</access>
  3767. <resetValue>0x00000000</resetValue>
  3768. <fields>
  3769. <field> <name>M0A</name>
  3770. <description>Memory 0 address</description>
  3771. <bitOffset>0</bitOffset>
  3772. <bitWidth>32</bitWidth>
  3773. </field>
  3774. </fields>
  3775. </register>
  3776. <register> <name>S5M1AR</name>
  3777. <displayName>S5M1AR</displayName>
  3778. <description>stream x memory 1 address
  3779. register</description>
  3780. <addressOffset>0x98</addressOffset>
  3781. <size>0x20</size>
  3782. <access>read-write</access>
  3783. <resetValue>0x00000000</resetValue>
  3784. <fields>
  3785. <field> <name>M1A</name>
  3786. <description>Memory 1 address (used in case of Double
  3787. buffer mode)</description>
  3788. <bitOffset>0</bitOffset>
  3789. <bitWidth>32</bitWidth>
  3790. </field>
  3791. </fields>
  3792. </register>
  3793. <register> <name>S5FCR</name>
  3794. <displayName>S5FCR</displayName>
  3795. <description>stream x FIFO control register</description>
  3796. <addressOffset>0x9C</addressOffset>
  3797. <size>0x20</size>
  3798. <resetValue>0x00000021</resetValue>
  3799. <fields>
  3800. <field> <name>FEIE</name>
  3801. <description>FIFO error interrupt
  3802. enable</description>
  3803. <bitOffset>7</bitOffset>
  3804. <bitWidth>1</bitWidth>
  3805. <access>read-write</access>
  3806. </field>
  3807. <field> <name>FS</name>
  3808. <description>FIFO status</description>
  3809. <bitOffset>3</bitOffset>
  3810. <bitWidth>3</bitWidth>
  3811. <access>read-only</access>
  3812. </field>
  3813. <field> <name>DMDIS</name>
  3814. <description>Direct mode disable</description>
  3815. <bitOffset>2</bitOffset>
  3816. <bitWidth>1</bitWidth>
  3817. <access>read-write</access>
  3818. </field>
  3819. <field> <name>FTH</name>
  3820. <description>FIFO threshold selection</description>
  3821. <bitOffset>0</bitOffset>
  3822. <bitWidth>2</bitWidth>
  3823. <access>read-write</access>
  3824. </field>
  3825. </fields>
  3826. </register>
  3827. <register> <name>S6CR</name>
  3828. <displayName>S6CR</displayName>
  3829. <description>stream x configuration
  3830. register</description>
  3831. <addressOffset>0xA0</addressOffset>
  3832. <size>0x20</size>
  3833. <access>read-write</access>
  3834. <resetValue>0x00000000</resetValue>
  3835. <fields>
  3836. <field> <name>CHSEL</name>
  3837. <description>Channel selection</description>
  3838. <bitOffset>25</bitOffset>
  3839. <bitWidth>3</bitWidth>
  3840. </field>
  3841. <field> <name>MBURST</name>
  3842. <description>Memory burst transfer
  3843. configuration</description>
  3844. <bitOffset>23</bitOffset>
  3845. <bitWidth>2</bitWidth>
  3846. </field>
  3847. <field> <name>PBURST</name>
  3848. <description>Peripheral burst transfer
  3849. configuration</description>
  3850. <bitOffset>21</bitOffset>
  3851. <bitWidth>2</bitWidth>
  3852. </field>
  3853. <field> <name>ACK</name>
  3854. <description>ACK</description>
  3855. <bitOffset>20</bitOffset>
  3856. <bitWidth>1</bitWidth>
  3857. </field>
  3858. <field> <name>CT</name>
  3859. <description>Current target (only in double buffer
  3860. mode)</description>
  3861. <bitOffset>19</bitOffset>
  3862. <bitWidth>1</bitWidth>
  3863. </field>
  3864. <field> <name>DBM</name>
  3865. <description>Double buffer mode</description>
  3866. <bitOffset>18</bitOffset>
  3867. <bitWidth>1</bitWidth>
  3868. </field>
  3869. <field> <name>PL</name>
  3870. <description>Priority level</description>
  3871. <bitOffset>16</bitOffset>
  3872. <bitWidth>2</bitWidth>
  3873. </field>
  3874. <field> <name>PINCOS</name>
  3875. <description>Peripheral increment offset
  3876. size</description>
  3877. <bitOffset>15</bitOffset>
  3878. <bitWidth>1</bitWidth>
  3879. </field>
  3880. <field> <name>MSIZE</name>
  3881. <description>Memory data size</description>
  3882. <bitOffset>13</bitOffset>
  3883. <bitWidth>2</bitWidth>
  3884. </field>
  3885. <field> <name>PSIZE</name>
  3886. <description>Peripheral data size</description>
  3887. <bitOffset>11</bitOffset>
  3888. <bitWidth>2</bitWidth>
  3889. </field>
  3890. <field> <name>MINC</name>
  3891. <description>Memory increment mode</description>
  3892. <bitOffset>10</bitOffset>
  3893. <bitWidth>1</bitWidth>
  3894. </field>
  3895. <field> <name>PINC</name>
  3896. <description>Peripheral increment mode</description>
  3897. <bitOffset>9</bitOffset>
  3898. <bitWidth>1</bitWidth>
  3899. </field>
  3900. <field> <name>CIRC</name>
  3901. <description>Circular mode</description>
  3902. <bitOffset>8</bitOffset>
  3903. <bitWidth>1</bitWidth>
  3904. </field>
  3905. <field> <name>DIR</name>
  3906. <description>Data transfer direction</description>
  3907. <bitOffset>6</bitOffset>
  3908. <bitWidth>2</bitWidth>
  3909. </field>
  3910. <field> <name>PFCTRL</name>
  3911. <description>Peripheral flow controller</description>
  3912. <bitOffset>5</bitOffset>
  3913. <bitWidth>1</bitWidth>
  3914. </field>
  3915. <field> <name>TCIE</name>
  3916. <description>Transfer complete interrupt
  3917. enable</description>
  3918. <bitOffset>4</bitOffset>
  3919. <bitWidth>1</bitWidth>
  3920. </field>
  3921. <field> <name>HTIE</name>
  3922. <description>Half transfer interrupt
  3923. enable</description>
  3924. <bitOffset>3</bitOffset>
  3925. <bitWidth>1</bitWidth>
  3926. </field>
  3927. <field> <name>TEIE</name>
  3928. <description>Transfer error interrupt
  3929. enable</description>
  3930. <bitOffset>2</bitOffset>
  3931. <bitWidth>1</bitWidth>
  3932. </field>
  3933. <field> <name>DMEIE</name>
  3934. <description>Direct mode error interrupt
  3935. enable</description>
  3936. <bitOffset>1</bitOffset>
  3937. <bitWidth>1</bitWidth>
  3938. </field>
  3939. <field> <name>EN</name>
  3940. <description>Stream enable / flag stream ready when
  3941. read low</description>
  3942. <bitOffset>0</bitOffset>
  3943. <bitWidth>1</bitWidth>
  3944. </field>
  3945. </fields>
  3946. </register>
  3947. <register> <name>S6NDTR</name>
  3948. <displayName>S6NDTR</displayName>
  3949. <description>stream x number of data
  3950. register</description>
  3951. <addressOffset>0xA4</addressOffset>
  3952. <size>0x20</size>
  3953. <access>read-write</access>
  3954. <resetValue>0x00000000</resetValue>
  3955. <fields>
  3956. <field> <name>NDT</name>
  3957. <description>Number of data items to
  3958. transfer</description>
  3959. <bitOffset>0</bitOffset>
  3960. <bitWidth>16</bitWidth>
  3961. </field>
  3962. </fields>
  3963. </register>
  3964. <register> <name>S6PAR</name>
  3965. <displayName>S6PAR</displayName>
  3966. <description>stream x peripheral address
  3967. register</description>
  3968. <addressOffset>0xA8</addressOffset>
  3969. <size>0x20</size>
  3970. <access>read-write</access>
  3971. <resetValue>0x00000000</resetValue>
  3972. <fields>
  3973. <field> <name>PA</name>
  3974. <description>Peripheral address</description>
  3975. <bitOffset>0</bitOffset>
  3976. <bitWidth>32</bitWidth>
  3977. </field>
  3978. </fields>
  3979. </register>
  3980. <register> <name>S6M0AR</name>
  3981. <displayName>S6M0AR</displayName>
  3982. <description>stream x memory 0 address
  3983. register</description>
  3984. <addressOffset>0xAC</addressOffset>
  3985. <size>0x20</size>
  3986. <access>read-write</access>
  3987. <resetValue>0x00000000</resetValue>
  3988. <fields>
  3989. <field> <name>M0A</name>
  3990. <description>Memory 0 address</description>
  3991. <bitOffset>0</bitOffset>
  3992. <bitWidth>32</bitWidth>
  3993. </field>
  3994. </fields>
  3995. </register>
  3996. <register> <name>S6M1AR</name>
  3997. <displayName>S6M1AR</displayName>
  3998. <description>stream x memory 1 address
  3999. register</description>
  4000. <addressOffset>0xB0</addressOffset>
  4001. <size>0x20</size>
  4002. <access>read-write</access>
  4003. <resetValue>0x00000000</resetValue>
  4004. <fields>
  4005. <field> <name>M1A</name>
  4006. <description>Memory 1 address (used in case of Double
  4007. buffer mode)</description>
  4008. <bitOffset>0</bitOffset>
  4009. <bitWidth>32</bitWidth>
  4010. </field>
  4011. </fields>
  4012. </register>
  4013. <register> <name>S6FCR</name>
  4014. <displayName>S6FCR</displayName>
  4015. <description>stream x FIFO control register</description>
  4016. <addressOffset>0xB4</addressOffset>
  4017. <size>0x20</size>
  4018. <resetValue>0x00000021</resetValue>
  4019. <fields>
  4020. <field> <name>FEIE</name>
  4021. <description>FIFO error interrupt
  4022. enable</description>
  4023. <bitOffset>7</bitOffset>
  4024. <bitWidth>1</bitWidth>
  4025. <access>read-write</access>
  4026. </field>
  4027. <field> <name>FS</name>
  4028. <description>FIFO status</description>
  4029. <bitOffset>3</bitOffset>
  4030. <bitWidth>3</bitWidth>
  4031. <access>read-only</access>
  4032. </field>
  4033. <field> <name>DMDIS</name>
  4034. <description>Direct mode disable</description>
  4035. <bitOffset>2</bitOffset>
  4036. <bitWidth>1</bitWidth>
  4037. <access>read-write</access>
  4038. </field>
  4039. <field> <name>FTH</name>
  4040. <description>FIFO threshold selection</description>
  4041. <bitOffset>0</bitOffset>
  4042. <bitWidth>2</bitWidth>
  4043. <access>read-write</access>
  4044. </field>
  4045. </fields>
  4046. </register>
  4047. <register> <name>S7CR</name>
  4048. <displayName>S7CR</displayName>
  4049. <description>stream x configuration
  4050. register</description>
  4051. <addressOffset>0xB8</addressOffset>
  4052. <size>0x20</size>
  4053. <access>read-write</access>
  4054. <resetValue>0x00000000</resetValue>
  4055. <fields>
  4056. <field> <name>CHSEL</name>
  4057. <description>Channel selection</description>
  4058. <bitOffset>25</bitOffset>
  4059. <bitWidth>3</bitWidth>
  4060. </field>
  4061. <field> <name>MBURST</name>
  4062. <description>Memory burst transfer
  4063. configuration</description>
  4064. <bitOffset>23</bitOffset>
  4065. <bitWidth>2</bitWidth>
  4066. </field>
  4067. <field> <name>PBURST</name>
  4068. <description>Peripheral burst transfer
  4069. configuration</description>
  4070. <bitOffset>21</bitOffset>
  4071. <bitWidth>2</bitWidth>
  4072. </field>
  4073. <field> <name>ACK</name>
  4074. <description>ACK</description>
  4075. <bitOffset>20</bitOffset>
  4076. <bitWidth>1</bitWidth>
  4077. </field>
  4078. <field> <name>CT</name>
  4079. <description>Current target (only in double buffer
  4080. mode)</description>
  4081. <bitOffset>19</bitOffset>
  4082. <bitWidth>1</bitWidth>
  4083. </field>
  4084. <field> <name>DBM</name>
  4085. <description>Double buffer mode</description>
  4086. <bitOffset>18</bitOffset>
  4087. <bitWidth>1</bitWidth>
  4088. </field>
  4089. <field> <name>PL</name>
  4090. <description>Priority level</description>
  4091. <bitOffset>16</bitOffset>
  4092. <bitWidth>2</bitWidth>
  4093. </field>
  4094. <field> <name>PINCOS</name>
  4095. <description>Peripheral increment offset
  4096. size</description>
  4097. <bitOffset>15</bitOffset>
  4098. <bitWidth>1</bitWidth>
  4099. </field>
  4100. <field> <name>MSIZE</name>
  4101. <description>Memory data size</description>
  4102. <bitOffset>13</bitOffset>
  4103. <bitWidth>2</bitWidth>
  4104. </field>
  4105. <field> <name>PSIZE</name>
  4106. <description>Peripheral data size</description>
  4107. <bitOffset>11</bitOffset>
  4108. <bitWidth>2</bitWidth>
  4109. </field>
  4110. <field> <name>MINC</name>
  4111. <description>Memory increment mode</description>
  4112. <bitOffset>10</bitOffset>
  4113. <bitWidth>1</bitWidth>
  4114. </field>
  4115. <field> <name>PINC</name>
  4116. <description>Peripheral increment mode</description>
  4117. <bitOffset>9</bitOffset>
  4118. <bitWidth>1</bitWidth>
  4119. </field>
  4120. <field> <name>CIRC</name>
  4121. <description>Circular mode</description>
  4122. <bitOffset>8</bitOffset>
  4123. <bitWidth>1</bitWidth>
  4124. </field>
  4125. <field> <name>DIR</name>
  4126. <description>Data transfer direction</description>
  4127. <bitOffset>6</bitOffset>
  4128. <bitWidth>2</bitWidth>
  4129. </field>
  4130. <field> <name>PFCTRL</name>
  4131. <description>Peripheral flow controller</description>
  4132. <bitOffset>5</bitOffset>
  4133. <bitWidth>1</bitWidth>
  4134. </field>
  4135. <field> <name>TCIE</name>
  4136. <description>Transfer complete interrupt
  4137. enable</description>
  4138. <bitOffset>4</bitOffset>
  4139. <bitWidth>1</bitWidth>
  4140. </field>
  4141. <field> <name>HTIE</name>
  4142. <description>Half transfer interrupt
  4143. enable</description>
  4144. <bitOffset>3</bitOffset>
  4145. <bitWidth>1</bitWidth>
  4146. </field>
  4147. <field> <name>TEIE</name>
  4148. <description>Transfer error interrupt
  4149. enable</description>
  4150. <bitOffset>2</bitOffset>
  4151. <bitWidth>1</bitWidth>
  4152. </field>
  4153. <field> <name>DMEIE</name>
  4154. <description>Direct mode error interrupt
  4155. enable</description>
  4156. <bitOffset>1</bitOffset>
  4157. <bitWidth>1</bitWidth>
  4158. </field>
  4159. <field> <name>EN</name>
  4160. <description>Stream enable / flag stream ready when
  4161. read low</description>
  4162. <bitOffset>0</bitOffset>
  4163. <bitWidth>1</bitWidth>
  4164. </field>
  4165. </fields>
  4166. </register>
  4167. <register> <name>S7NDTR</name>
  4168. <displayName>S7NDTR</displayName>
  4169. <description>stream x number of data
  4170. register</description>
  4171. <addressOffset>0xBC</addressOffset>
  4172. <size>0x20</size>
  4173. <access>read-write</access>
  4174. <resetValue>0x00000000</resetValue>
  4175. <fields>
  4176. <field> <name>NDT</name>
  4177. <description>Number of data items to
  4178. transfer</description>
  4179. <bitOffset>0</bitOffset>
  4180. <bitWidth>16</bitWidth>
  4181. </field>
  4182. </fields>
  4183. </register>
  4184. <register> <name>S7PAR</name>
  4185. <displayName>S7PAR</displayName>
  4186. <description>stream x peripheral address
  4187. register</description>
  4188. <addressOffset>0xC0</addressOffset>
  4189. <size>0x20</size>
  4190. <access>read-write</access>
  4191. <resetValue>0x00000000</resetValue>
  4192. <fields>
  4193. <field> <name>PA</name>
  4194. <description>Peripheral address</description>
  4195. <bitOffset>0</bitOffset>
  4196. <bitWidth>32</bitWidth>
  4197. </field>
  4198. </fields>
  4199. </register>
  4200. <register> <name>S7M0AR</name>
  4201. <displayName>S7M0AR</displayName>
  4202. <description>stream x memory 0 address
  4203. register</description>
  4204. <addressOffset>0xC4</addressOffset>
  4205. <size>0x20</size>
  4206. <access>read-write</access>
  4207. <resetValue>0x00000000</resetValue>
  4208. <fields>
  4209. <field> <name>M0A</name>
  4210. <description>Memory 0 address</description>
  4211. <bitOffset>0</bitOffset>
  4212. <bitWidth>32</bitWidth>
  4213. </field>
  4214. </fields>
  4215. </register>
  4216. <register> <name>S7M1AR</name>
  4217. <displayName>S7M1AR</displayName>
  4218. <description>stream x memory 1 address
  4219. register</description>
  4220. <addressOffset>0xC8</addressOffset>
  4221. <size>0x20</size>
  4222. <access>read-write</access>
  4223. <resetValue>0x00000000</resetValue>
  4224. <fields>
  4225. <field> <name>M1A</name>
  4226. <description>Memory 1 address (used in case of Double
  4227. buffer mode)</description>
  4228. <bitOffset>0</bitOffset>
  4229. <bitWidth>32</bitWidth>
  4230. </field>
  4231. </fields>
  4232. </register>
  4233. <register> <name>S7FCR</name>
  4234. <displayName>S7FCR</displayName>
  4235. <description>stream x FIFO control register</description>
  4236. <addressOffset>0xCC</addressOffset>
  4237. <size>0x20</size>
  4238. <resetValue>0x00000021</resetValue>
  4239. <fields>
  4240. <field> <name>FEIE</name>
  4241. <description>FIFO error interrupt
  4242. enable</description>
  4243. <bitOffset>7</bitOffset>
  4244. <bitWidth>1</bitWidth>
  4245. <access>read-write</access>
  4246. </field>
  4247. <field> <name>FS</name>
  4248. <description>FIFO status</description>
  4249. <bitOffset>3</bitOffset>
  4250. <bitWidth>3</bitWidth>
  4251. <access>read-only</access>
  4252. </field>
  4253. <field> <name>DMDIS</name>
  4254. <description>Direct mode disable</description>
  4255. <bitOffset>2</bitOffset>
  4256. <bitWidth>1</bitWidth>
  4257. <access>read-write</access>
  4258. </field>
  4259. <field> <name>FTH</name>
  4260. <description>FIFO threshold selection</description>
  4261. <bitOffset>0</bitOffset>
  4262. <bitWidth>2</bitWidth>
  4263. <access>read-write</access>
  4264. </field>
  4265. </fields>
  4266. </register>
  4267. </registers>
  4268. </peripheral>
  4269. <peripheral derivedFrom="DMA2">
  4270. <name>DMA1</name>
  4271. <baseAddress>0x40026000</baseAddress>
  4272. <interrupt>
  4273. <name>DMA1_Stream0</name>
  4274. <description>DMA1 Stream0 global interrupt</description>
  4275. <value>11</value>
  4276. </interrupt>
  4277. <interrupt>
  4278. <name>DMA1_Stream1</name>
  4279. <description>DMA1 Stream1 global interrupt</description>
  4280. <value>12</value>
  4281. </interrupt>
  4282. <interrupt>
  4283. <name>DMA1_Stream2</name>
  4284. <description>DMA1 Stream2 global interrupt</description>
  4285. <value>13</value>
  4286. </interrupt>
  4287. <interrupt>
  4288. <name>DMA1_Stream3</name>
  4289. <description>DMA1 Stream3 global interrupt</description>
  4290. <value>14</value>
  4291. </interrupt>
  4292. <interrupt>
  4293. <name>DMA1_Stream4</name>
  4294. <description>DMA1 Stream4 global interrupt</description>
  4295. <value>15</value>
  4296. </interrupt>
  4297. <interrupt>
  4298. <name>DMA1_Stream5</name>
  4299. <description>DMA1 Stream5 global interrupt</description>
  4300. <value>16</value>
  4301. </interrupt>
  4302. <interrupt>
  4303. <name>DMA1_Stream6</name>
  4304. <description>DMA1 Stream6 global interrupt</description>
  4305. <value>17</value>
  4306. </interrupt>
  4307. <interrupt>
  4308. <name>DMA1_Stream7</name>
  4309. <description>DMA1 Stream7 global interrupt</description>
  4310. <value>47</value>
  4311. </interrupt>
  4312. </peripheral>
  4313. <peripheral> <name>RCC</name>
  4314. <description>Reset and clock control</description>
  4315. <groupName>RCC</groupName>
  4316. <baseAddress>0x40023800</baseAddress>
  4317. <addressBlock>
  4318. <offset>0x0</offset>
  4319. <size>0x400</size>
  4320. <usage>registers</usage>
  4321. </addressBlock>
  4322. <interrupt>
  4323. <name>RCC</name>
  4324. <description>RCC global interrupt</description>
  4325. <value>5</value>
  4326. </interrupt>
  4327. <registers>
  4328. <register> <name>CR</name>
  4329. <displayName>CR</displayName>
  4330. <description>clock control register</description>
  4331. <addressOffset>0x0</addressOffset>
  4332. <size>0x20</size>
  4333. <resetValue>0x00000083</resetValue>
  4334. <fields>
  4335. <field> <name>PLLI2SRDY</name>
  4336. <description>PLLI2S clock ready flag</description>
  4337. <bitOffset>27</bitOffset>
  4338. <bitWidth>1</bitWidth>
  4339. <access>read-only</access>
  4340. </field>
  4341. <field> <name>PLLI2SON</name>
  4342. <description>PLLI2S enable</description>
  4343. <bitOffset>26</bitOffset>
  4344. <bitWidth>1</bitWidth>
  4345. <access>read-write</access>
  4346. </field>
  4347. <field> <name>PLLRDY</name>
  4348. <description>Main PLL (PLL) clock ready
  4349. flag</description>
  4350. <bitOffset>25</bitOffset>
  4351. <bitWidth>1</bitWidth>
  4352. <access>read-only</access>
  4353. </field>
  4354. <field> <name>PLLON</name>
  4355. <description>Main PLL (PLL) enable</description>
  4356. <bitOffset>24</bitOffset>
  4357. <bitWidth>1</bitWidth>
  4358. <access>read-write</access>
  4359. </field>
  4360. <field> <name>CSSON</name>
  4361. <description>Clock security system
  4362. enable</description>
  4363. <bitOffset>19</bitOffset>
  4364. <bitWidth>1</bitWidth>
  4365. <access>read-write</access>
  4366. </field>
  4367. <field> <name>HSEBYP</name>
  4368. <description>HSE clock bypass</description>
  4369. <bitOffset>18</bitOffset>
  4370. <bitWidth>1</bitWidth>
  4371. <access>read-write</access>
  4372. </field>
  4373. <field> <name>HSERDY</name>
  4374. <description>HSE clock ready flag</description>
  4375. <bitOffset>17</bitOffset>
  4376. <bitWidth>1</bitWidth>
  4377. <access>read-only</access>
  4378. </field>
  4379. <field> <name>HSEON</name>
  4380. <description>HSE clock enable</description>
  4381. <bitOffset>16</bitOffset>
  4382. <bitWidth>1</bitWidth>
  4383. <access>read-write</access>
  4384. </field>
  4385. <field> <name>HSICAL</name>
  4386. <description>Internal high-speed clock
  4387. calibration</description>
  4388. <bitOffset>8</bitOffset>
  4389. <bitWidth>8</bitWidth>
  4390. <access>read-only</access>
  4391. </field>
  4392. <field> <name>HSITRIM</name>
  4393. <description>Internal high-speed clock
  4394. trimming</description>
  4395. <bitOffset>3</bitOffset>
  4396. <bitWidth>5</bitWidth>
  4397. <access>read-write</access>
  4398. </field>
  4399. <field> <name>HSIRDY</name>
  4400. <description>Internal high-speed clock ready
  4401. flag</description>
  4402. <bitOffset>1</bitOffset>
  4403. <bitWidth>1</bitWidth>
  4404. <access>read-only</access>
  4405. </field>
  4406. <field> <name>HSION</name>
  4407. <description>Internal high-speed clock
  4408. enable</description>
  4409. <bitOffset>0</bitOffset>
  4410. <bitWidth>1</bitWidth>
  4411. <access>read-write</access>
  4412. </field>
  4413. </fields>
  4414. </register>
  4415. <register> <name>PLLCFGR</name>
  4416. <displayName>PLLCFGR</displayName>
  4417. <description>PLL configuration register</description>
  4418. <addressOffset>0x4</addressOffset>
  4419. <size>0x20</size>
  4420. <access>read-write</access>
  4421. <resetValue>0x24003010</resetValue>
  4422. <fields>
  4423. <field> <name>PLLQ3</name>
  4424. <description>Main PLL (PLL) division factor for USB
  4425. OTG FS, SDIO and random number generator
  4426. clocks</description>
  4427. <bitOffset>27</bitOffset>
  4428. <bitWidth>1</bitWidth>
  4429. </field>
  4430. <field> <name>PLLQ2</name>
  4431. <description>Main PLL (PLL) division factor for USB
  4432. OTG FS, SDIO and random number generator
  4433. clocks</description>
  4434. <bitOffset>26</bitOffset>
  4435. <bitWidth>1</bitWidth>
  4436. </field>
  4437. <field> <name>PLLQ1</name>
  4438. <description>Main PLL (PLL) division factor for USB
  4439. OTG FS, SDIO and random number generator
  4440. clocks</description>
  4441. <bitOffset>25</bitOffset>
  4442. <bitWidth>1</bitWidth>
  4443. </field>
  4444. <field> <name>PLLQ0</name>
  4445. <description>Main PLL (PLL) division factor for USB
  4446. OTG FS, SDIO and random number generator
  4447. clocks</description>
  4448. <bitOffset>24</bitOffset>
  4449. <bitWidth>1</bitWidth>
  4450. </field>
  4451. <field> <name>PLLSRC</name>
  4452. <description>Main PLL(PLL) and audio PLL (PLLI2S)
  4453. entry clock source</description>
  4454. <bitOffset>22</bitOffset>
  4455. <bitWidth>1</bitWidth>
  4456. </field>
  4457. <field> <name>PLLP1</name>
  4458. <description>Main PLL (PLL) division factor for main
  4459. system clock</description>
  4460. <bitOffset>17</bitOffset>
  4461. <bitWidth>1</bitWidth>
  4462. </field>
  4463. <field> <name>PLLP0</name>
  4464. <description>Main PLL (PLL) division factor for main
  4465. system clock</description>
  4466. <bitOffset>16</bitOffset>
  4467. <bitWidth>1</bitWidth>
  4468. </field>
  4469. <field> <name>PLLN8</name>
  4470. <description>Main PLL (PLL) multiplication factor for
  4471. VCO</description>
  4472. <bitOffset>14</bitOffset>
  4473. <bitWidth>1</bitWidth>
  4474. </field>
  4475. <field> <name>PLLN7</name>
  4476. <description>Main PLL (PLL) multiplication factor for
  4477. VCO</description>
  4478. <bitOffset>13</bitOffset>
  4479. <bitWidth>1</bitWidth>
  4480. </field>
  4481. <field> <name>PLLN6</name>
  4482. <description>Main PLL (PLL) multiplication factor for
  4483. VCO</description>
  4484. <bitOffset>12</bitOffset>
  4485. <bitWidth>1</bitWidth>
  4486. </field>
  4487. <field> <name>PLLN5</name>
  4488. <description>Main PLL (PLL) multiplication factor for
  4489. VCO</description>
  4490. <bitOffset>11</bitOffset>
  4491. <bitWidth>1</bitWidth>
  4492. </field>
  4493. <field> <name>PLLN4</name>
  4494. <description>Main PLL (PLL) multiplication factor for
  4495. VCO</description>
  4496. <bitOffset>10</bitOffset>
  4497. <bitWidth>1</bitWidth>
  4498. </field>
  4499. <field> <name>PLLN3</name>
  4500. <description>Main PLL (PLL) multiplication factor for
  4501. VCO</description>
  4502. <bitOffset>9</bitOffset>
  4503. <bitWidth>1</bitWidth>
  4504. </field>
  4505. <field> <name>PLLN2</name>
  4506. <description>Main PLL (PLL) multiplication factor for
  4507. VCO</description>
  4508. <bitOffset>8</bitOffset>
  4509. <bitWidth>1</bitWidth>
  4510. </field>
  4511. <field> <name>PLLN1</name>
  4512. <description>Main PLL (PLL) multiplication factor for
  4513. VCO</description>
  4514. <bitOffset>7</bitOffset>
  4515. <bitWidth>1</bitWidth>
  4516. </field>
  4517. <field> <name>PLLN0</name>
  4518. <description>Main PLL (PLL) multiplication factor for
  4519. VCO</description>
  4520. <bitOffset>6</bitOffset>
  4521. <bitWidth>1</bitWidth>
  4522. </field>
  4523. <field> <name>PLLM5</name>
  4524. <description>Division factor for the main PLL (PLL)
  4525. and audio PLL (PLLI2S) input clock</description>
  4526. <bitOffset>5</bitOffset>
  4527. <bitWidth>1</bitWidth>
  4528. </field>
  4529. <field> <name>PLLM4</name>
  4530. <description>Division factor for the main PLL (PLL)
  4531. and audio PLL (PLLI2S) input clock</description>
  4532. <bitOffset>4</bitOffset>
  4533. <bitWidth>1</bitWidth>
  4534. </field>
  4535. <field> <name>PLLM3</name>
  4536. <description>Division factor for the main PLL (PLL)
  4537. and audio PLL (PLLI2S) input clock</description>
  4538. <bitOffset>3</bitOffset>
  4539. <bitWidth>1</bitWidth>
  4540. </field>
  4541. <field> <name>PLLM2</name>
  4542. <description>Division factor for the main PLL (PLL)
  4543. and audio PLL (PLLI2S) input clock</description>
  4544. <bitOffset>2</bitOffset>
  4545. <bitWidth>1</bitWidth>
  4546. </field>
  4547. <field> <name>PLLM1</name>
  4548. <description>Division factor for the main PLL (PLL)
  4549. and audio PLL (PLLI2S) input clock</description>
  4550. <bitOffset>1</bitOffset>
  4551. <bitWidth>1</bitWidth>
  4552. </field>
  4553. <field> <name>PLLM0</name>
  4554. <description>Division factor for the main PLL (PLL)
  4555. and audio PLL (PLLI2S) input clock</description>
  4556. <bitOffset>0</bitOffset>
  4557. <bitWidth>1</bitWidth>
  4558. </field>
  4559. </fields>
  4560. </register>
  4561. <register> <name>CFGR</name>
  4562. <displayName>CFGR</displayName>
  4563. <description>clock configuration register</description>
  4564. <addressOffset>0x8</addressOffset>
  4565. <size>0x20</size>
  4566. <resetValue>0x00000000</resetValue>
  4567. <fields>
  4568. <field> <name>MCO2</name>
  4569. <description>Microcontroller clock output
  4570. 2</description>
  4571. <bitOffset>30</bitOffset>
  4572. <bitWidth>2</bitWidth>
  4573. <access>read-write</access>
  4574. </field>
  4575. <field> <name>MCO2PRE</name>
  4576. <description>MCO2 prescaler</description>
  4577. <bitOffset>27</bitOffset>
  4578. <bitWidth>3</bitWidth>
  4579. <access>read-write</access>
  4580. </field>
  4581. <field> <name>MCO1PRE</name>
  4582. <description>MCO1 prescaler</description>
  4583. <bitOffset>24</bitOffset>
  4584. <bitWidth>3</bitWidth>
  4585. <access>read-write</access>
  4586. </field>
  4587. <field> <name>I2SSRC</name>
  4588. <description>I2S clock selection</description>
  4589. <bitOffset>23</bitOffset>
  4590. <bitWidth>1</bitWidth>
  4591. <access>read-write</access>
  4592. </field>
  4593. <field> <name>MCO1</name>
  4594. <description>Microcontroller clock output
  4595. 1</description>
  4596. <bitOffset>21</bitOffset>
  4597. <bitWidth>2</bitWidth>
  4598. <access>read-write</access>
  4599. </field>
  4600. <field> <name>RTCPRE</name>
  4601. <description>HSE division factor for RTC
  4602. clock</description>
  4603. <bitOffset>16</bitOffset>
  4604. <bitWidth>5</bitWidth>
  4605. <access>read-write</access>
  4606. </field>
  4607. <field> <name>PPRE2</name>
  4608. <description>APB high-speed prescaler
  4609. (APB2)</description>
  4610. <bitOffset>13</bitOffset>
  4611. <bitWidth>3</bitWidth>
  4612. <access>read-write</access>
  4613. </field>
  4614. <field> <name>PPRE1</name>
  4615. <description>APB Low speed prescaler
  4616. (APB1)</description>
  4617. <bitOffset>10</bitOffset>
  4618. <bitWidth>3</bitWidth>
  4619. <access>read-write</access>
  4620. </field>
  4621. <field> <name>HPRE</name>
  4622. <description>AHB prescaler</description>
  4623. <bitOffset>4</bitOffset>
  4624. <bitWidth>4</bitWidth>
  4625. <access>read-write</access>
  4626. </field>
  4627. <field> <name>SWS1</name>
  4628. <description>System clock switch status</description>
  4629. <bitOffset>3</bitOffset>
  4630. <bitWidth>1</bitWidth>
  4631. <access>read-only</access>
  4632. </field>
  4633. <field> <name>SWS0</name>
  4634. <description>System clock switch status</description>
  4635. <bitOffset>2</bitOffset>
  4636. <bitWidth>1</bitWidth>
  4637. <access>read-only</access>
  4638. </field>
  4639. <field> <name>SW1</name>
  4640. <description>System clock switch</description>
  4641. <bitOffset>1</bitOffset>
  4642. <bitWidth>1</bitWidth>
  4643. <access>read-write</access>
  4644. </field>
  4645. <field> <name>SW0</name>
  4646. <description>System clock switch</description>
  4647. <bitOffset>0</bitOffset>
  4648. <bitWidth>1</bitWidth>
  4649. <access>read-write</access>
  4650. </field>
  4651. </fields>
  4652. </register>
  4653. <register> <name>CIR</name>
  4654. <displayName>CIR</displayName>
  4655. <description>clock interrupt register</description>
  4656. <addressOffset>0xC</addressOffset>
  4657. <size>0x20</size>
  4658. <resetValue>0x00000000</resetValue>
  4659. <fields>
  4660. <field> <name>CSSC</name>
  4661. <description>Clock security system interrupt
  4662. clear</description>
  4663. <bitOffset>23</bitOffset>
  4664. <bitWidth>1</bitWidth>
  4665. <access>write-only</access>
  4666. </field>
  4667. <field> <name>PLLI2SRDYC</name>
  4668. <description>PLLI2S ready interrupt
  4669. clear</description>
  4670. <bitOffset>21</bitOffset>
  4671. <bitWidth>1</bitWidth>
  4672. <access>write-only</access>
  4673. </field>
  4674. <field> <name>PLLRDYC</name>
  4675. <description>Main PLL(PLL) ready interrupt
  4676. clear</description>
  4677. <bitOffset>20</bitOffset>
  4678. <bitWidth>1</bitWidth>
  4679. <access>write-only</access>
  4680. </field>
  4681. <field> <name>HSERDYC</name>
  4682. <description>HSE ready interrupt clear</description>
  4683. <bitOffset>19</bitOffset>
  4684. <bitWidth>1</bitWidth>
  4685. <access>write-only</access>
  4686. </field>
  4687. <field> <name>HSIRDYC</name>
  4688. <description>HSI ready interrupt clear</description>
  4689. <bitOffset>18</bitOffset>
  4690. <bitWidth>1</bitWidth>
  4691. <access>write-only</access>
  4692. </field>
  4693. <field> <name>LSERDYC</name>
  4694. <description>LSE ready interrupt clear</description>
  4695. <bitOffset>17</bitOffset>
  4696. <bitWidth>1</bitWidth>
  4697. <access>write-only</access>
  4698. </field>
  4699. <field> <name>LSIRDYC</name>
  4700. <description>LSI ready interrupt clear</description>
  4701. <bitOffset>16</bitOffset>
  4702. <bitWidth>1</bitWidth>
  4703. <access>write-only</access>
  4704. </field>
  4705. <field> <name>PLLI2SRDYIE</name>
  4706. <description>PLLI2S ready interrupt
  4707. enable</description>
  4708. <bitOffset>13</bitOffset>
  4709. <bitWidth>1</bitWidth>
  4710. <access>read-write</access>
  4711. </field>
  4712. <field> <name>PLLRDYIE</name>
  4713. <description>Main PLL (PLL) ready interrupt
  4714. enable</description>
  4715. <bitOffset>12</bitOffset>
  4716. <bitWidth>1</bitWidth>
  4717. <access>read-write</access>
  4718. </field>
  4719. <field> <name>HSERDYIE</name>
  4720. <description>HSE ready interrupt enable</description>
  4721. <bitOffset>11</bitOffset>
  4722. <bitWidth>1</bitWidth>
  4723. <access>read-write</access>
  4724. </field>
  4725. <field> <name>HSIRDYIE</name>
  4726. <description>HSI ready interrupt enable</description>
  4727. <bitOffset>10</bitOffset>
  4728. <bitWidth>1</bitWidth>
  4729. <access>read-write</access>
  4730. </field>
  4731. <field> <name>LSERDYIE</name>
  4732. <description>LSE ready interrupt enable</description>
  4733. <bitOffset>9</bitOffset>
  4734. <bitWidth>1</bitWidth>
  4735. <access>read-write</access>
  4736. </field>
  4737. <field> <name>LSIRDYIE</name>
  4738. <description>LSI ready interrupt enable</description>
  4739. <bitOffset>8</bitOffset>
  4740. <bitWidth>1</bitWidth>
  4741. <access>read-write</access>
  4742. </field>
  4743. <field> <name>CSSF</name>
  4744. <description>Clock security system interrupt
  4745. flag</description>
  4746. <bitOffset>7</bitOffset>
  4747. <bitWidth>1</bitWidth>
  4748. <access>read-only</access>
  4749. </field>
  4750. <field> <name>PLLI2SRDYF</name>
  4751. <description>PLLI2S ready interrupt
  4752. flag</description>
  4753. <bitOffset>5</bitOffset>
  4754. <bitWidth>1</bitWidth>
  4755. <access>read-only</access>
  4756. </field>
  4757. <field> <name>PLLRDYF</name>
  4758. <description>Main PLL (PLL) ready interrupt
  4759. flag</description>
  4760. <bitOffset>4</bitOffset>
  4761. <bitWidth>1</bitWidth>
  4762. <access>read-only</access>
  4763. </field>
  4764. <field> <name>HSERDYF</name>
  4765. <description>HSE ready interrupt flag</description>
  4766. <bitOffset>3</bitOffset>
  4767. <bitWidth>1</bitWidth>
  4768. <access>read-only</access>
  4769. </field>
  4770. <field> <name>HSIRDYF</name>
  4771. <description>HSI ready interrupt flag</description>
  4772. <bitOffset>2</bitOffset>
  4773. <bitWidth>1</bitWidth>
  4774. <access>read-only</access>
  4775. </field>
  4776. <field> <name>LSERDYF</name>
  4777. <description>LSE ready interrupt flag</description>
  4778. <bitOffset>1</bitOffset>
  4779. <bitWidth>1</bitWidth>
  4780. <access>read-only</access>
  4781. </field>
  4782. <field> <name>LSIRDYF</name>
  4783. <description>LSI ready interrupt flag</description>
  4784. <bitOffset>0</bitOffset>
  4785. <bitWidth>1</bitWidth>
  4786. <access>read-only</access>
  4787. </field>
  4788. </fields>
  4789. </register>
  4790. <register> <name>AHB1RSTR</name>
  4791. <displayName>AHB1RSTR</displayName>
  4792. <description>AHB1 peripheral reset register</description>
  4793. <addressOffset>0x10</addressOffset>
  4794. <size>0x20</size>
  4795. <access>read-write</access>
  4796. <resetValue>0x00000000</resetValue>
  4797. <fields>
  4798. <field> <name>OTGHSRST</name>
  4799. <description>USB OTG HS module reset</description>
  4800. <bitOffset>29</bitOffset>
  4801. <bitWidth>1</bitWidth>
  4802. </field>
  4803. <field> <name>ETHMACRST</name>
  4804. <description>Ethernet MAC reset</description>
  4805. <bitOffset>25</bitOffset>
  4806. <bitWidth>1</bitWidth>
  4807. </field>
  4808. <field> <name>DMA2RST</name>
  4809. <description>DMA2 reset</description>
  4810. <bitOffset>22</bitOffset>
  4811. <bitWidth>1</bitWidth>
  4812. </field>
  4813. <field> <name>DMA1RST</name>
  4814. <description>DMA2 reset</description>
  4815. <bitOffset>21</bitOffset>
  4816. <bitWidth>1</bitWidth>
  4817. </field>
  4818. <field> <name>CRCRST</name>
  4819. <description>CRC reset</description>
  4820. <bitOffset>12</bitOffset>
  4821. <bitWidth>1</bitWidth>
  4822. </field>
  4823. <field> <name>GPIOIRST</name>
  4824. <description>IO port I reset</description>
  4825. <bitOffset>8</bitOffset>
  4826. <bitWidth>1</bitWidth>
  4827. </field>
  4828. <field> <name>GPIOHRST</name>
  4829. <description>IO port H reset</description>
  4830. <bitOffset>7</bitOffset>
  4831. <bitWidth>1</bitWidth>
  4832. </field>
  4833. <field> <name>GPIOGRST</name>
  4834. <description>IO port G reset</description>
  4835. <bitOffset>6</bitOffset>
  4836. <bitWidth>1</bitWidth>
  4837. </field>
  4838. <field> <name>GPIOFRST</name>
  4839. <description>IO port F reset</description>
  4840. <bitOffset>5</bitOffset>
  4841. <bitWidth>1</bitWidth>
  4842. </field>
  4843. <field> <name>GPIOERST</name>
  4844. <description>IO port E reset</description>
  4845. <bitOffset>4</bitOffset>
  4846. <bitWidth>1</bitWidth>
  4847. </field>
  4848. <field> <name>GPIODRST</name>
  4849. <description>IO port D reset</description>
  4850. <bitOffset>3</bitOffset>
  4851. <bitWidth>1</bitWidth>
  4852. </field>
  4853. <field> <name>GPIOCRST</name>
  4854. <description>IO port C reset</description>
  4855. <bitOffset>2</bitOffset>
  4856. <bitWidth>1</bitWidth>
  4857. </field>
  4858. <field> <name>GPIOBRST</name>
  4859. <description>IO port B reset</description>
  4860. <bitOffset>1</bitOffset>
  4861. <bitWidth>1</bitWidth>
  4862. </field>
  4863. <field> <name>GPIOARST</name>
  4864. <description>IO port A reset</description>
  4865. <bitOffset>0</bitOffset>
  4866. <bitWidth>1</bitWidth>
  4867. </field>
  4868. </fields>
  4869. </register>
  4870. <register> <name>AHB2RSTR</name>
  4871. <displayName>AHB2RSTR</displayName>
  4872. <description>AHB2 peripheral reset register</description>
  4873. <addressOffset>0x14</addressOffset>
  4874. <size>0x20</size>
  4875. <access>read-write</access>
  4876. <resetValue>0x00000000</resetValue>
  4877. <fields>
  4878. <field> <name>OTGFSRST</name>
  4879. <description>USB OTG FS module reset</description>
  4880. <bitOffset>7</bitOffset>
  4881. <bitWidth>1</bitWidth>
  4882. </field>
  4883. <field> <name>RNGRST</name>
  4884. <description>Random number generator module
  4885. reset</description>
  4886. <bitOffset>6</bitOffset>
  4887. <bitWidth>1</bitWidth>
  4888. </field>
  4889. <field> <name>DCMIRST</name>
  4890. <description>Camera interface reset</description>
  4891. <bitOffset>0</bitOffset>
  4892. <bitWidth>1</bitWidth>
  4893. </field>
  4894. </fields>
  4895. </register>
  4896. <register> <name>AHB3RSTR</name>
  4897. <displayName>AHB3RSTR</displayName>
  4898. <description>AHB3 peripheral reset register</description>
  4899. <addressOffset>0x18</addressOffset>
  4900. <size>0x20</size>
  4901. <access>read-write</access>
  4902. <resetValue>0x00000000</resetValue>
  4903. <fields>
  4904. <field> <name>FSMCRST</name>
  4905. <description>Flexible static memory controller module
  4906. reset</description>
  4907. <bitOffset>0</bitOffset>
  4908. <bitWidth>1</bitWidth>
  4909. </field>
  4910. </fields>
  4911. </register>
  4912. <register> <name>APB1RSTR</name>
  4913. <displayName>APB1RSTR</displayName>
  4914. <description>APB1 peripheral reset register</description>
  4915. <addressOffset>0x20</addressOffset>
  4916. <size>0x20</size>
  4917. <access>read-write</access>
  4918. <resetValue>0x00000000</resetValue>
  4919. <fields>
  4920. <field> <name>DACRST</name>
  4921. <description>DAC reset</description>
  4922. <bitOffset>29</bitOffset>
  4923. <bitWidth>1</bitWidth>
  4924. </field>
  4925. <field> <name>PWRRST</name>
  4926. <description>Power interface reset</description>
  4927. <bitOffset>28</bitOffset>
  4928. <bitWidth>1</bitWidth>
  4929. </field>
  4930. <field> <name>CAN2RST</name>
  4931. <description>CAN2 reset</description>
  4932. <bitOffset>26</bitOffset>
  4933. <bitWidth>1</bitWidth>
  4934. </field>
  4935. <field> <name>CAN1RST</name>
  4936. <description>CAN1 reset</description>
  4937. <bitOffset>25</bitOffset>
  4938. <bitWidth>1</bitWidth>
  4939. </field>
  4940. <field> <name>I2C3RST</name>
  4941. <description>I2C3 reset</description>
  4942. <bitOffset>23</bitOffset>
  4943. <bitWidth>1</bitWidth>
  4944. </field>
  4945. <field> <name>I2C2RST</name>
  4946. <description>I2C 2 reset</description>
  4947. <bitOffset>22</bitOffset>
  4948. <bitWidth>1</bitWidth>
  4949. </field>
  4950. <field> <name>I2C1RST</name>
  4951. <description>I2C 1 reset</description>
  4952. <bitOffset>21</bitOffset>
  4953. <bitWidth>1</bitWidth>
  4954. </field>
  4955. <field> <name>UART5RST</name>
  4956. <description>USART 5 reset</description>
  4957. <bitOffset>20</bitOffset>
  4958. <bitWidth>1</bitWidth>
  4959. </field>
  4960. <field> <name>UART4RST</name>
  4961. <description>USART 4 reset</description>
  4962. <bitOffset>19</bitOffset>
  4963. <bitWidth>1</bitWidth>
  4964. </field>
  4965. <field> <name>UART3RST</name>
  4966. <description>USART 3 reset</description>
  4967. <bitOffset>18</bitOffset>
  4968. <bitWidth>1</bitWidth>
  4969. </field>
  4970. <field> <name>UART2RST</name>
  4971. <description>USART 2 reset</description>
  4972. <bitOffset>17</bitOffset>
  4973. <bitWidth>1</bitWidth>
  4974. </field>
  4975. <field> <name>SPI3RST</name>
  4976. <description>SPI 3 reset</description>
  4977. <bitOffset>15</bitOffset>
  4978. <bitWidth>1</bitWidth>
  4979. </field>
  4980. <field> <name>SPI2RST</name>
  4981. <description>SPI 2 reset</description>
  4982. <bitOffset>14</bitOffset>
  4983. <bitWidth>1</bitWidth>
  4984. </field>
  4985. <field> <name>WWDGRST</name>
  4986. <description>Window watchdog reset</description>
  4987. <bitOffset>11</bitOffset>
  4988. <bitWidth>1</bitWidth>
  4989. </field>
  4990. <field> <name>TIM14RST</name>
  4991. <description>TIM14 reset</description>
  4992. <bitOffset>8</bitOffset>
  4993. <bitWidth>1</bitWidth>
  4994. </field>
  4995. <field> <name>TIM13RST</name>
  4996. <description>TIM13 reset</description>
  4997. <bitOffset>7</bitOffset>
  4998. <bitWidth>1</bitWidth>
  4999. </field>
  5000. <field> <name>TIM12RST</name>
  5001. <description>TIM12 reset</description>
  5002. <bitOffset>6</bitOffset>
  5003. <bitWidth>1</bitWidth>
  5004. </field>
  5005. <field> <name>TIM7RST</name>
  5006. <description>TIM7 reset</description>
  5007. <bitOffset>5</bitOffset>
  5008. <bitWidth>1</bitWidth>
  5009. </field>
  5010. <field> <name>TIM6RST</name>
  5011. <description>TIM6 reset</description>
  5012. <bitOffset>4</bitOffset>
  5013. <bitWidth>1</bitWidth>
  5014. </field>
  5015. <field> <name>TIM5RST</name>
  5016. <description>TIM5 reset</description>
  5017. <bitOffset>3</bitOffset>
  5018. <bitWidth>1</bitWidth>
  5019. </field>
  5020. <field> <name>TIM4RST</name>
  5021. <description>TIM4 reset</description>
  5022. <bitOffset>2</bitOffset>
  5023. <bitWidth>1</bitWidth>
  5024. </field>
  5025. <field> <name>TIM3RST</name>
  5026. <description>TIM3 reset</description>
  5027. <bitOffset>1</bitOffset>
  5028. <bitWidth>1</bitWidth>
  5029. </field>
  5030. <field> <name>TIM2RST</name>
  5031. <description>TIM2 reset</description>
  5032. <bitOffset>0</bitOffset>
  5033. <bitWidth>1</bitWidth>
  5034. </field>
  5035. </fields>
  5036. </register>
  5037. <register> <name>APB2RSTR</name>
  5038. <displayName>APB2RSTR</displayName>
  5039. <description>APB2 peripheral reset register</description>
  5040. <addressOffset>0x24</addressOffset>
  5041. <size>0x20</size>
  5042. <access>read-write</access>
  5043. <resetValue>0x00000000</resetValue>
  5044. <fields>
  5045. <field> <name>TIM11RST</name>
  5046. <description>TIM11 reset</description>
  5047. <bitOffset>18</bitOffset>
  5048. <bitWidth>1</bitWidth>
  5049. </field>
  5050. <field> <name>TIM10RST</name>
  5051. <description>TIM10 reset</description>
  5052. <bitOffset>17</bitOffset>
  5053. <bitWidth>1</bitWidth>
  5054. </field>
  5055. <field> <name>TIM9RST</name>
  5056. <description>TIM9 reset</description>
  5057. <bitOffset>16</bitOffset>
  5058. <bitWidth>1</bitWidth>
  5059. </field>
  5060. <field> <name>SYSCFGRST</name>
  5061. <description>System configuration controller
  5062. reset</description>
  5063. <bitOffset>14</bitOffset>
  5064. <bitWidth>1</bitWidth>
  5065. </field>
  5066. <field> <name>SPI1RST</name>
  5067. <description>SPI 1 reset</description>
  5068. <bitOffset>12</bitOffset>
  5069. <bitWidth>1</bitWidth>
  5070. </field>
  5071. <field> <name>SDIORST</name>
  5072. <description>SDIO reset</description>
  5073. <bitOffset>11</bitOffset>
  5074. <bitWidth>1</bitWidth>
  5075. </field>
  5076. <field> <name>ADCRST</name>
  5077. <description>ADC interface reset (common to all
  5078. ADCs)</description>
  5079. <bitOffset>8</bitOffset>
  5080. <bitWidth>1</bitWidth>
  5081. </field>
  5082. <field> <name>USART6RST</name>
  5083. <description>USART6 reset</description>
  5084. <bitOffset>5</bitOffset>
  5085. <bitWidth>1</bitWidth>
  5086. </field>
  5087. <field> <name>USART1RST</name>
  5088. <description>USART1 reset</description>
  5089. <bitOffset>4</bitOffset>
  5090. <bitWidth>1</bitWidth>
  5091. </field>
  5092. <field> <name>TIM8RST</name>
  5093. <description>TIM8 reset</description>
  5094. <bitOffset>1</bitOffset>
  5095. <bitWidth>1</bitWidth>
  5096. </field>
  5097. <field> <name>TIM1RST</name>
  5098. <description>TIM1 reset</description>
  5099. <bitOffset>0</bitOffset>
  5100. <bitWidth>1</bitWidth>
  5101. </field>
  5102. </fields>
  5103. </register>
  5104. <register> <name>AHB1ENR</name>
  5105. <displayName>AHB1ENR</displayName>
  5106. <description>AHB1 peripheral clock register</description>
  5107. <addressOffset>0x30</addressOffset>
  5108. <size>0x20</size>
  5109. <access>read-write</access>
  5110. <resetValue>0x00100000</resetValue>
  5111. <fields>
  5112. <field> <name>OTGHSULPIEN</name>
  5113. <description>USB OTG HSULPI clock
  5114. enable</description>
  5115. <bitOffset>30</bitOffset>
  5116. <bitWidth>1</bitWidth>
  5117. </field>
  5118. <field> <name>OTGHSEN</name>
  5119. <description>USB OTG HS clock enable</description>
  5120. <bitOffset>29</bitOffset>
  5121. <bitWidth>1</bitWidth>
  5122. </field>
  5123. <field> <name>ETHMACPTPEN</name>
  5124. <description>Ethernet PTP clock enable</description>
  5125. <bitOffset>28</bitOffset>
  5126. <bitWidth>1</bitWidth>
  5127. </field>
  5128. <field> <name>ETHMACRXEN</name>
  5129. <description>Ethernet Reception clock
  5130. enable</description>
  5131. <bitOffset>27</bitOffset>
  5132. <bitWidth>1</bitWidth>
  5133. </field>
  5134. <field> <name>ETHMACTXEN</name>
  5135. <description>Ethernet Transmission clock
  5136. enable</description>
  5137. <bitOffset>26</bitOffset>
  5138. <bitWidth>1</bitWidth>
  5139. </field>
  5140. <field> <name>ETHMACEN</name>
  5141. <description>Ethernet MAC clock enable</description>
  5142. <bitOffset>25</bitOffset>
  5143. <bitWidth>1</bitWidth>
  5144. </field>
  5145. <field> <name>DMA2EN</name>
  5146. <description>DMA2 clock enable</description>
  5147. <bitOffset>22</bitOffset>
  5148. <bitWidth>1</bitWidth>
  5149. </field>
  5150. <field> <name>DMA1EN</name>
  5151. <description>DMA1 clock enable</description>
  5152. <bitOffset>21</bitOffset>
  5153. <bitWidth>1</bitWidth>
  5154. </field>
  5155. <field> <name>BKPSRAMEN</name>
  5156. <description>Backup SRAM interface clock
  5157. enable</description>
  5158. <bitOffset>18</bitOffset>
  5159. <bitWidth>1</bitWidth>
  5160. </field>
  5161. <field> <name>CRCEN</name>
  5162. <description>CRC clock enable</description>
  5163. <bitOffset>12</bitOffset>
  5164. <bitWidth>1</bitWidth>
  5165. </field>
  5166. <field> <name>GPIOIEN</name>
  5167. <description>IO port I clock enable</description>
  5168. <bitOffset>8</bitOffset>
  5169. <bitWidth>1</bitWidth>
  5170. </field>
  5171. <field> <name>GPIOHEN</name>
  5172. <description>IO port H clock enable</description>
  5173. <bitOffset>7</bitOffset>
  5174. <bitWidth>1</bitWidth>
  5175. </field>
  5176. <field> <name>GPIOGEN</name>
  5177. <description>IO port G clock enable</description>
  5178. <bitOffset>6</bitOffset>
  5179. <bitWidth>1</bitWidth>
  5180. </field>
  5181. <field> <name>GPIOFEN</name>
  5182. <description>IO port F clock enable</description>
  5183. <bitOffset>5</bitOffset>
  5184. <bitWidth>1</bitWidth>
  5185. </field>
  5186. <field> <name>GPIOEEN</name>
  5187. <description>IO port E clock enable</description>
  5188. <bitOffset>4</bitOffset>
  5189. <bitWidth>1</bitWidth>
  5190. </field>
  5191. <field> <name>GPIODEN</name>
  5192. <description>IO port D clock enable</description>
  5193. <bitOffset>3</bitOffset>
  5194. <bitWidth>1</bitWidth>
  5195. </field>
  5196. <field> <name>GPIOCEN</name>
  5197. <description>IO port C clock enable</description>
  5198. <bitOffset>2</bitOffset>
  5199. <bitWidth>1</bitWidth>
  5200. </field>
  5201. <field> <name>GPIOBEN</name>
  5202. <description>IO port B clock enable</description>
  5203. <bitOffset>1</bitOffset>
  5204. <bitWidth>1</bitWidth>
  5205. </field>
  5206. <field> <name>GPIOAEN</name>
  5207. <description>IO port A clock enable</description>
  5208. <bitOffset>0</bitOffset>
  5209. <bitWidth>1</bitWidth>
  5210. </field>
  5211. </fields>
  5212. </register>
  5213. <register> <name>AHB2ENR</name>
  5214. <displayName>AHB2ENR</displayName>
  5215. <description>AHB2 peripheral clock enable
  5216. register</description>
  5217. <addressOffset>0x34</addressOffset>
  5218. <size>0x20</size>
  5219. <access>read-write</access>
  5220. <resetValue>0x00000000</resetValue>
  5221. <fields>
  5222. <field> <name>OTGFSEN</name>
  5223. <description>USB OTG FS clock enable</description>
  5224. <bitOffset>7</bitOffset>
  5225. <bitWidth>1</bitWidth>
  5226. </field>
  5227. <field> <name>RNGEN</name>
  5228. <description>Random number generator clock
  5229. enable</description>
  5230. <bitOffset>6</bitOffset>
  5231. <bitWidth>1</bitWidth>
  5232. </field>
  5233. <field> <name>DCMIEN</name>
  5234. <description>Camera interface enable</description>
  5235. <bitOffset>0</bitOffset>
  5236. <bitWidth>1</bitWidth>
  5237. </field>
  5238. </fields>
  5239. </register>
  5240. <register> <name>AHB3ENR</name>
  5241. <displayName>AHB3ENR</displayName>
  5242. <description>AHB3 peripheral clock enable
  5243. register</description>
  5244. <addressOffset>0x38</addressOffset>
  5245. <size>0x20</size>
  5246. <access>read-write</access>
  5247. <resetValue>0x00000000</resetValue>
  5248. <fields>
  5249. <field> <name>FSMCEN</name>
  5250. <description>Flexible static memory controller module
  5251. clock enable</description>
  5252. <bitOffset>0</bitOffset>
  5253. <bitWidth>1</bitWidth>
  5254. </field>
  5255. </fields>
  5256. </register>
  5257. <register> <name>APB1ENR</name>
  5258. <displayName>APB1ENR</displayName>
  5259. <description>APB1 peripheral clock enable
  5260. register</description>
  5261. <addressOffset>0x40</addressOffset>
  5262. <size>0x20</size>
  5263. <access>read-write</access>
  5264. <resetValue>0x00000000</resetValue>
  5265. <fields>
  5266. <field> <name>DACEN</name>
  5267. <description>DAC interface clock enable</description>
  5268. <bitOffset>29</bitOffset>
  5269. <bitWidth>1</bitWidth>
  5270. </field>
  5271. <field> <name>PWREN</name>
  5272. <description>Power interface clock
  5273. enable</description>
  5274. <bitOffset>28</bitOffset>
  5275. <bitWidth>1</bitWidth>
  5276. </field>
  5277. <field> <name>CAN2EN</name>
  5278. <description>CAN 2 clock enable</description>
  5279. <bitOffset>26</bitOffset>
  5280. <bitWidth>1</bitWidth>
  5281. </field>
  5282. <field> <name>CAN1EN</name>
  5283. <description>CAN 1 clock enable</description>
  5284. <bitOffset>25</bitOffset>
  5285. <bitWidth>1</bitWidth>
  5286. </field>
  5287. <field> <name>I2C3EN</name>
  5288. <description>I2C3 clock enable</description>
  5289. <bitOffset>23</bitOffset>
  5290. <bitWidth>1</bitWidth>
  5291. </field>
  5292. <field> <name>I2C2EN</name>
  5293. <description>I2C2 clock enable</description>
  5294. <bitOffset>22</bitOffset>
  5295. <bitWidth>1</bitWidth>
  5296. </field>
  5297. <field> <name>I2C1EN</name>
  5298. <description>I2C1 clock enable</description>
  5299. <bitOffset>21</bitOffset>
  5300. <bitWidth>1</bitWidth>
  5301. </field>
  5302. <field> <name>UART5EN</name>
  5303. <description>UART5 clock enable</description>
  5304. <bitOffset>20</bitOffset>
  5305. <bitWidth>1</bitWidth>
  5306. </field>
  5307. <field> <name>UART4EN</name>
  5308. <description>UART4 clock enable</description>
  5309. <bitOffset>19</bitOffset>
  5310. <bitWidth>1</bitWidth>
  5311. </field>
  5312. <field> <name>USART3EN</name>
  5313. <description>USART3 clock enable</description>
  5314. <bitOffset>18</bitOffset>
  5315. <bitWidth>1</bitWidth>
  5316. </field>
  5317. <field> <name>USART2EN</name>
  5318. <description>USART 2 clock enable</description>
  5319. <bitOffset>17</bitOffset>
  5320. <bitWidth>1</bitWidth>
  5321. </field>
  5322. <field> <name>SPI3EN</name>
  5323. <description>SPI3 clock enable</description>
  5324. <bitOffset>15</bitOffset>
  5325. <bitWidth>1</bitWidth>
  5326. </field>
  5327. <field> <name>SPI2EN</name>
  5328. <description>SPI2 clock enable</description>
  5329. <bitOffset>14</bitOffset>
  5330. <bitWidth>1</bitWidth>
  5331. </field>
  5332. <field> <name>WWDGEN</name>
  5333. <description>Window watchdog clock
  5334. enable</description>
  5335. <bitOffset>11</bitOffset>
  5336. <bitWidth>1</bitWidth>
  5337. </field>
  5338. <field> <name>TIM14EN</name>
  5339. <description>TIM14 clock enable</description>
  5340. <bitOffset>8</bitOffset>
  5341. <bitWidth>1</bitWidth>
  5342. </field>
  5343. <field> <name>TIM13EN</name>
  5344. <description>TIM13 clock enable</description>
  5345. <bitOffset>7</bitOffset>
  5346. <bitWidth>1</bitWidth>
  5347. </field>
  5348. <field> <name>TIM12EN</name>
  5349. <description>TIM12 clock enable</description>
  5350. <bitOffset>6</bitOffset>
  5351. <bitWidth>1</bitWidth>
  5352. </field>
  5353. <field> <name>TIM7EN</name>
  5354. <description>TIM7 clock enable</description>
  5355. <bitOffset>5</bitOffset>
  5356. <bitWidth>1</bitWidth>
  5357. </field>
  5358. <field> <name>TIM6EN</name>
  5359. <description>TIM6 clock enable</description>
  5360. <bitOffset>4</bitOffset>
  5361. <bitWidth>1</bitWidth>
  5362. </field>
  5363. <field> <name>TIM5EN</name>
  5364. <description>TIM5 clock enable</description>
  5365. <bitOffset>3</bitOffset>
  5366. <bitWidth>1</bitWidth>
  5367. </field>
  5368. <field> <name>TIM4EN</name>
  5369. <description>TIM4 clock enable</description>
  5370. <bitOffset>2</bitOffset>
  5371. <bitWidth>1</bitWidth>
  5372. </field>
  5373. <field> <name>TIM3EN</name>
  5374. <description>TIM3 clock enable</description>
  5375. <bitOffset>1</bitOffset>
  5376. <bitWidth>1</bitWidth>
  5377. </field>
  5378. <field> <name>TIM2EN</name>
  5379. <description>TIM2 clock enable</description>
  5380. <bitOffset>0</bitOffset>
  5381. <bitWidth>1</bitWidth>
  5382. </field>
  5383. </fields>
  5384. </register>
  5385. <register> <name>APB2ENR</name>
  5386. <displayName>APB2ENR</displayName>
  5387. <description>APB2 peripheral clock enable
  5388. register</description>
  5389. <addressOffset>0x44</addressOffset>
  5390. <size>0x20</size>
  5391. <access>read-write</access>
  5392. <resetValue>0x00000000</resetValue>
  5393. <fields>
  5394. <field> <name>TIM11EN</name>
  5395. <description>TIM11 clock enable</description>
  5396. <bitOffset>18</bitOffset>
  5397. <bitWidth>1</bitWidth>
  5398. </field>
  5399. <field> <name>TIM10EN</name>
  5400. <description>TIM10 clock enable</description>
  5401. <bitOffset>17</bitOffset>
  5402. <bitWidth>1</bitWidth>
  5403. </field>
  5404. <field> <name>TIM9EN</name>
  5405. <description>TIM9 clock enable</description>
  5406. <bitOffset>16</bitOffset>
  5407. <bitWidth>1</bitWidth>
  5408. </field>
  5409. <field> <name>SYSCFGEN</name>
  5410. <description>System configuration controller clock
  5411. enable</description>
  5412. <bitOffset>14</bitOffset>
  5413. <bitWidth>1</bitWidth>
  5414. </field>
  5415. <field> <name>SPI1EN</name>
  5416. <description>SPI1 clock enable</description>
  5417. <bitOffset>12</bitOffset>
  5418. <bitWidth>1</bitWidth>
  5419. </field>
  5420. <field> <name>SDIOEN</name>
  5421. <description>SDIO clock enable</description>
  5422. <bitOffset>11</bitOffset>
  5423. <bitWidth>1</bitWidth>
  5424. </field>
  5425. <field> <name>ADC3EN</name>
  5426. <description>ADC3 clock enable</description>
  5427. <bitOffset>10</bitOffset>
  5428. <bitWidth>1</bitWidth>
  5429. </field>
  5430. <field> <name>ADC2EN</name>
  5431. <description>ADC2 clock enable</description>
  5432. <bitOffset>9</bitOffset>
  5433. <bitWidth>1</bitWidth>
  5434. </field>
  5435. <field> <name>ADC1EN</name>
  5436. <description>ADC1 clock enable</description>
  5437. <bitOffset>8</bitOffset>
  5438. <bitWidth>1</bitWidth>
  5439. </field>
  5440. <field> <name>USART6EN</name>
  5441. <description>USART6 clock enable</description>
  5442. <bitOffset>5</bitOffset>
  5443. <bitWidth>1</bitWidth>
  5444. </field>
  5445. <field> <name>USART1EN</name>
  5446. <description>USART1 clock enable</description>
  5447. <bitOffset>4</bitOffset>
  5448. <bitWidth>1</bitWidth>
  5449. </field>
  5450. <field> <name>TIM8EN</name>
  5451. <description>TIM8 clock enable</description>
  5452. <bitOffset>1</bitOffset>
  5453. <bitWidth>1</bitWidth>
  5454. </field>
  5455. <field> <name>TIM1EN</name>
  5456. <description>TIM1 clock enable</description>
  5457. <bitOffset>0</bitOffset>
  5458. <bitWidth>1</bitWidth>
  5459. </field>
  5460. </fields>
  5461. </register>
  5462. <register> <name>AHB1LPENR</name>
  5463. <displayName>AHB1LPENR</displayName>
  5464. <description>AHB1 peripheral clock enable in low power
  5465. mode register</description>
  5466. <addressOffset>0x50</addressOffset>
  5467. <size>0x20</size>
  5468. <access>read-write</access>
  5469. <resetValue>0x7E6791FF</resetValue>
  5470. <fields>
  5471. <field> <name>OTGHSULPILPEN</name>
  5472. <description>USB OTG HS ULPI clock enable during
  5473. Sleep mode</description>
  5474. <bitOffset>30</bitOffset>
  5475. <bitWidth>1</bitWidth>
  5476. </field>
  5477. <field> <name>OTGHSLPEN</name>
  5478. <description>USB OTG HS clock enable during Sleep
  5479. mode</description>
  5480. <bitOffset>29</bitOffset>
  5481. <bitWidth>1</bitWidth>
  5482. </field>
  5483. <field> <name>ETHMACPTPLPEN</name>
  5484. <description>Ethernet PTP clock enable during Sleep
  5485. mode</description>
  5486. <bitOffset>28</bitOffset>
  5487. <bitWidth>1</bitWidth>
  5488. </field>
  5489. <field> <name>ETHMACRXLPEN</name>
  5490. <description>Ethernet reception clock enable during
  5491. Sleep mode</description>
  5492. <bitOffset>27</bitOffset>
  5493. <bitWidth>1</bitWidth>
  5494. </field>
  5495. <field> <name>ETHMACTXLPEN</name>
  5496. <description>Ethernet transmission clock enable
  5497. during Sleep mode</description>
  5498. <bitOffset>26</bitOffset>
  5499. <bitWidth>1</bitWidth>
  5500. </field>
  5501. <field> <name>ETHMACLPEN</name>
  5502. <description>Ethernet MAC clock enable during Sleep
  5503. mode</description>
  5504. <bitOffset>25</bitOffset>
  5505. <bitWidth>1</bitWidth>
  5506. </field>
  5507. <field> <name>DMA2LPEN</name>
  5508. <description>DMA2 clock enable during Sleep
  5509. mode</description>
  5510. <bitOffset>22</bitOffset>
  5511. <bitWidth>1</bitWidth>
  5512. </field>
  5513. <field> <name>DMA1LPEN</name>
  5514. <description>DMA1 clock enable during Sleep
  5515. mode</description>
  5516. <bitOffset>21</bitOffset>
  5517. <bitWidth>1</bitWidth>
  5518. </field>
  5519. <field> <name>BKPSRAMLPEN</name>
  5520. <description>Backup SRAM interface clock enable
  5521. during Sleep mode</description>
  5522. <bitOffset>18</bitOffset>
  5523. <bitWidth>1</bitWidth>
  5524. </field>
  5525. <field> <name>SRAM2LPEN</name>
  5526. <description>SRAM 2 interface clock enable during
  5527. Sleep mode</description>
  5528. <bitOffset>17</bitOffset>
  5529. <bitWidth>1</bitWidth>
  5530. </field>
  5531. <field> <name>SRAM1LPEN</name>
  5532. <description>SRAM 1interface clock enable during
  5533. Sleep mode</description>
  5534. <bitOffset>16</bitOffset>
  5535. <bitWidth>1</bitWidth>
  5536. </field>
  5537. <field> <name>FLITFLPEN</name>
  5538. <description>Flash interface clock enable during
  5539. Sleep mode</description>
  5540. <bitOffset>15</bitOffset>
  5541. <bitWidth>1</bitWidth>
  5542. </field>
  5543. <field> <name>CRCLPEN</name>
  5544. <description>CRC clock enable during Sleep
  5545. mode</description>
  5546. <bitOffset>12</bitOffset>
  5547. <bitWidth>1</bitWidth>
  5548. </field>
  5549. <field> <name>GPIOILPEN</name>
  5550. <description>IO port I clock enable during Sleep
  5551. mode</description>
  5552. <bitOffset>8</bitOffset>
  5553. <bitWidth>1</bitWidth>
  5554. </field>
  5555. <field> <name>GPIOHLPEN</name>
  5556. <description>IO port H clock enable during Sleep
  5557. mode</description>
  5558. <bitOffset>7</bitOffset>
  5559. <bitWidth>1</bitWidth>
  5560. </field>
  5561. <field> <name>GPIOGLPEN</name>
  5562. <description>IO port G clock enable during Sleep
  5563. mode</description>
  5564. <bitOffset>6</bitOffset>
  5565. <bitWidth>1</bitWidth>
  5566. </field>
  5567. <field> <name>GPIOFLPEN</name>
  5568. <description>IO port F clock enable during Sleep
  5569. mode</description>
  5570. <bitOffset>5</bitOffset>
  5571. <bitWidth>1</bitWidth>
  5572. </field>
  5573. <field> <name>GPIOELPEN</name>
  5574. <description>IO port E clock enable during Sleep
  5575. mode</description>
  5576. <bitOffset>4</bitOffset>
  5577. <bitWidth>1</bitWidth>
  5578. </field>
  5579. <field> <name>GPIODLPEN</name>
  5580. <description>IO port D clock enable during Sleep
  5581. mode</description>
  5582. <bitOffset>3</bitOffset>
  5583. <bitWidth>1</bitWidth>
  5584. </field>
  5585. <field> <name>GPIOCLPEN</name>
  5586. <description>IO port C clock enable during Sleep
  5587. mode</description>
  5588. <bitOffset>2</bitOffset>
  5589. <bitWidth>1</bitWidth>
  5590. </field>
  5591. <field> <name>GPIOBLPEN</name>
  5592. <description>IO port B clock enable during Sleep
  5593. mode</description>
  5594. <bitOffset>1</bitOffset>
  5595. <bitWidth>1</bitWidth>
  5596. </field>
  5597. <field> <name>GPIOALPEN</name>
  5598. <description>IO port A clock enable during sleep
  5599. mode</description>
  5600. <bitOffset>0</bitOffset>
  5601. <bitWidth>1</bitWidth>
  5602. </field>
  5603. </fields>
  5604. </register>
  5605. <register> <name>AHB2LPENR</name>
  5606. <displayName>AHB2LPENR</displayName>
  5607. <description>AHB2 peripheral clock enable in low power
  5608. mode register</description>
  5609. <addressOffset>0x54</addressOffset>
  5610. <size>0x20</size>
  5611. <access>read-write</access>
  5612. <resetValue>0x000000F1</resetValue>
  5613. <fields>
  5614. <field> <name>OTGFSLPEN</name>
  5615. <description>USB OTG FS clock enable during Sleep
  5616. mode</description>
  5617. <bitOffset>7</bitOffset>
  5618. <bitWidth>1</bitWidth>
  5619. </field>
  5620. <field> <name>RNGLPEN</name>
  5621. <description>Random number generator clock enable
  5622. during Sleep mode</description>
  5623. <bitOffset>6</bitOffset>
  5624. <bitWidth>1</bitWidth>
  5625. </field>
  5626. <field> <name>DCMILPEN</name>
  5627. <description>Camera interface enable during Sleep
  5628. mode</description>
  5629. <bitOffset>0</bitOffset>
  5630. <bitWidth>1</bitWidth>
  5631. </field>
  5632. </fields>
  5633. </register>
  5634. <register> <name>AHB3LPENR</name>
  5635. <displayName>AHB3LPENR</displayName>
  5636. <description>AHB3 peripheral clock enable in low power
  5637. mode register</description>
  5638. <addressOffset>0x58</addressOffset>
  5639. <size>0x20</size>
  5640. <access>read-write</access>
  5641. <resetValue>0x00000001</resetValue>
  5642. <fields>
  5643. <field> <name>FSMCLPEN</name>
  5644. <description>Flexible static memory controller module
  5645. clock enable during Sleep mode</description>
  5646. <bitOffset>0</bitOffset>
  5647. <bitWidth>1</bitWidth>
  5648. </field>
  5649. </fields>
  5650. </register>
  5651. <register> <name>APB1LPENR</name>
  5652. <displayName>APB1LPENR</displayName>
  5653. <description>APB1 peripheral clock enable in low power
  5654. mode register</description>
  5655. <addressOffset>0x60</addressOffset>
  5656. <size>0x20</size>
  5657. <access>read-write</access>
  5658. <resetValue>0x36FEC9FF</resetValue>
  5659. <fields>
  5660. <field> <name>DACLPEN</name>
  5661. <description>DAC interface clock enable during Sleep
  5662. mode</description>
  5663. <bitOffset>29</bitOffset>
  5664. <bitWidth>1</bitWidth>
  5665. </field>
  5666. <field> <name>PWRLPEN</name>
  5667. <description>Power interface clock enable during
  5668. Sleep mode</description>
  5669. <bitOffset>28</bitOffset>
  5670. <bitWidth>1</bitWidth>
  5671. </field>
  5672. <field> <name>CAN2LPEN</name>
  5673. <description>CAN 2 clock enable during Sleep
  5674. mode</description>
  5675. <bitOffset>26</bitOffset>
  5676. <bitWidth>1</bitWidth>
  5677. </field>
  5678. <field> <name>CAN1LPEN</name>
  5679. <description>CAN 1 clock enable during Sleep
  5680. mode</description>
  5681. <bitOffset>25</bitOffset>
  5682. <bitWidth>1</bitWidth>
  5683. </field>
  5684. <field> <name>I2C3LPEN</name>
  5685. <description>I2C3 clock enable during Sleep
  5686. mode</description>
  5687. <bitOffset>23</bitOffset>
  5688. <bitWidth>1</bitWidth>
  5689. </field>
  5690. <field> <name>I2C2LPEN</name>
  5691. <description>I2C2 clock enable during Sleep
  5692. mode</description>
  5693. <bitOffset>22</bitOffset>
  5694. <bitWidth>1</bitWidth>
  5695. </field>
  5696. <field> <name>I2C1LPEN</name>
  5697. <description>I2C1 clock enable during Sleep
  5698. mode</description>
  5699. <bitOffset>21</bitOffset>
  5700. <bitWidth>1</bitWidth>
  5701. </field>
  5702. <field> <name>UART5LPEN</name>
  5703. <description>UART5 clock enable during Sleep
  5704. mode</description>
  5705. <bitOffset>20</bitOffset>
  5706. <bitWidth>1</bitWidth>
  5707. </field>
  5708. <field> <name>UART4LPEN</name>
  5709. <description>UART4 clock enable during Sleep
  5710. mode</description>
  5711. <bitOffset>19</bitOffset>
  5712. <bitWidth>1</bitWidth>
  5713. </field>
  5714. <field> <name>USART3LPEN</name>
  5715. <description>USART3 clock enable during Sleep
  5716. mode</description>
  5717. <bitOffset>18</bitOffset>
  5718. <bitWidth>1</bitWidth>
  5719. </field>
  5720. <field> <name>USART2LPEN</name>
  5721. <description>USART2 clock enable during Sleep
  5722. mode</description>
  5723. <bitOffset>17</bitOffset>
  5724. <bitWidth>1</bitWidth>
  5725. </field>
  5726. <field> <name>SPI3LPEN</name>
  5727. <description>SPI3 clock enable during Sleep
  5728. mode</description>
  5729. <bitOffset>15</bitOffset>
  5730. <bitWidth>1</bitWidth>
  5731. </field>
  5732. <field> <name>SPI2LPEN</name>
  5733. <description>SPI2 clock enable during Sleep
  5734. mode</description>
  5735. <bitOffset>14</bitOffset>
  5736. <bitWidth>1</bitWidth>
  5737. </field>
  5738. <field> <name>WWDGLPEN</name>
  5739. <description>Window watchdog clock enable during
  5740. Sleep mode</description>
  5741. <bitOffset>11</bitOffset>
  5742. <bitWidth>1</bitWidth>
  5743. </field>
  5744. <field> <name>TIM14LPEN</name>
  5745. <description>TIM14 clock enable during Sleep
  5746. mode</description>
  5747. <bitOffset>8</bitOffset>
  5748. <bitWidth>1</bitWidth>
  5749. </field>
  5750. <field> <name>TIM13LPEN</name>
  5751. <description>TIM13 clock enable during Sleep
  5752. mode</description>
  5753. <bitOffset>7</bitOffset>
  5754. <bitWidth>1</bitWidth>
  5755. </field>
  5756. <field> <name>TIM12LPEN</name>
  5757. <description>TIM12 clock enable during Sleep
  5758. mode</description>
  5759. <bitOffset>6</bitOffset>
  5760. <bitWidth>1</bitWidth>
  5761. </field>
  5762. <field> <name>TIM7LPEN</name>
  5763. <description>TIM7 clock enable during Sleep
  5764. mode</description>
  5765. <bitOffset>5</bitOffset>
  5766. <bitWidth>1</bitWidth>
  5767. </field>
  5768. <field> <name>TIM6LPEN</name>
  5769. <description>TIM6 clock enable during Sleep
  5770. mode</description>
  5771. <bitOffset>4</bitOffset>
  5772. <bitWidth>1</bitWidth>
  5773. </field>
  5774. <field> <name>TIM5LPEN</name>
  5775. <description>TIM5 clock enable during Sleep
  5776. mode</description>
  5777. <bitOffset>3</bitOffset>
  5778. <bitWidth>1</bitWidth>
  5779. </field>
  5780. <field> <name>TIM4LPEN</name>
  5781. <description>TIM4 clock enable during Sleep
  5782. mode</description>
  5783. <bitOffset>2</bitOffset>
  5784. <bitWidth>1</bitWidth>
  5785. </field>
  5786. <field> <name>TIM3LPEN</name>
  5787. <description>TIM3 clock enable during Sleep
  5788. mode</description>
  5789. <bitOffset>1</bitOffset>
  5790. <bitWidth>1</bitWidth>
  5791. </field>
  5792. <field> <name>TIM2LPEN</name>
  5793. <description>TIM2 clock enable during Sleep
  5794. mode</description>
  5795. <bitOffset>0</bitOffset>
  5796. <bitWidth>1</bitWidth>
  5797. </field>
  5798. </fields>
  5799. </register>
  5800. <register> <name>APB2LPENR</name>
  5801. <displayName>APB2LPENR</displayName>
  5802. <description>APB2 peripheral clock enabled in low power
  5803. mode register</description>
  5804. <addressOffset>0x64</addressOffset>
  5805. <size>0x20</size>
  5806. <access>read-write</access>
  5807. <resetValue>0x00075F33</resetValue>
  5808. <fields>
  5809. <field> <name>TIM11LPEN</name>
  5810. <description>TIM11 clock enable during Sleep
  5811. mode</description>
  5812. <bitOffset>18</bitOffset>
  5813. <bitWidth>1</bitWidth>
  5814. </field>
  5815. <field> <name>TIM10LPEN</name>
  5816. <description>TIM10 clock enable during Sleep
  5817. mode</description>
  5818. <bitOffset>17</bitOffset>
  5819. <bitWidth>1</bitWidth>
  5820. </field>
  5821. <field> <name>TIM9LPEN</name>
  5822. <description>TIM9 clock enable during sleep
  5823. mode</description>
  5824. <bitOffset>16</bitOffset>
  5825. <bitWidth>1</bitWidth>
  5826. </field>
  5827. <field> <name>SYSCFGLPEN</name>
  5828. <description>System configuration controller clock
  5829. enable during Sleep mode</description>
  5830. <bitOffset>14</bitOffset>
  5831. <bitWidth>1</bitWidth>
  5832. </field>
  5833. <field> <name>SPI1LPEN</name>
  5834. <description>SPI 1 clock enable during Sleep
  5835. mode</description>
  5836. <bitOffset>12</bitOffset>
  5837. <bitWidth>1</bitWidth>
  5838. </field>
  5839. <field> <name>SDIOLPEN</name>
  5840. <description>SDIO clock enable during Sleep
  5841. mode</description>
  5842. <bitOffset>11</bitOffset>
  5843. <bitWidth>1</bitWidth>
  5844. </field>
  5845. <field> <name>ADC3LPEN</name>
  5846. <description>ADC 3 clock enable during Sleep
  5847. mode</description>
  5848. <bitOffset>10</bitOffset>
  5849. <bitWidth>1</bitWidth>
  5850. </field>
  5851. <field> <name>ADC2LPEN</name>
  5852. <description>ADC2 clock enable during Sleep
  5853. mode</description>
  5854. <bitOffset>9</bitOffset>
  5855. <bitWidth>1</bitWidth>
  5856. </field>
  5857. <field> <name>ADC1LPEN</name>
  5858. <description>ADC1 clock enable during Sleep
  5859. mode</description>
  5860. <bitOffset>8</bitOffset>
  5861. <bitWidth>1</bitWidth>
  5862. </field>
  5863. <field> <name>USART6LPEN</name>
  5864. <description>USART6 clock enable during Sleep
  5865. mode</description>
  5866. <bitOffset>5</bitOffset>
  5867. <bitWidth>1</bitWidth>
  5868. </field>
  5869. <field> <name>USART1LPEN</name>
  5870. <description>USART1 clock enable during Sleep
  5871. mode</description>
  5872. <bitOffset>4</bitOffset>
  5873. <bitWidth>1</bitWidth>
  5874. </field>
  5875. <field> <name>TIM8LPEN</name>
  5876. <description>TIM8 clock enable during Sleep
  5877. mode</description>
  5878. <bitOffset>1</bitOffset>
  5879. <bitWidth>1</bitWidth>
  5880. </field>
  5881. <field> <name>TIM1LPEN</name>
  5882. <description>TIM1 clock enable during Sleep
  5883. mode</description>
  5884. <bitOffset>0</bitOffset>
  5885. <bitWidth>1</bitWidth>
  5886. </field>
  5887. </fields>
  5888. </register>
  5889. <register> <name>BDCR</name>
  5890. <displayName>BDCR</displayName>
  5891. <description>Backup domain control register</description>
  5892. <addressOffset>0x70</addressOffset>
  5893. <size>0x20</size>
  5894. <resetValue>0x00000000</resetValue>
  5895. <fields>
  5896. <field> <name>BDRST</name>
  5897. <description>Backup domain software
  5898. reset</description>
  5899. <bitOffset>16</bitOffset>
  5900. <bitWidth>1</bitWidth>
  5901. <access>read-write</access>
  5902. </field>
  5903. <field> <name>RTCEN</name>
  5904. <description>RTC clock enable</description>
  5905. <bitOffset>15</bitOffset>
  5906. <bitWidth>1</bitWidth>
  5907. <access>read-write</access>
  5908. </field>
  5909. <field> <name>RTCSEL1</name>
  5910. <description>RTC clock source selection</description>
  5911. <bitOffset>9</bitOffset>
  5912. <bitWidth>1</bitWidth>
  5913. <access>read-write</access>
  5914. </field>
  5915. <field> <name>RTCSEL0</name>
  5916. <description>RTC clock source selection</description>
  5917. <bitOffset>8</bitOffset>
  5918. <bitWidth>1</bitWidth>
  5919. <access>read-write</access>
  5920. </field>
  5921. <field> <name>LSEBYP</name>
  5922. <description>External low-speed oscillator
  5923. bypass</description>
  5924. <bitOffset>2</bitOffset>
  5925. <bitWidth>1</bitWidth>
  5926. <access>read-write</access>
  5927. </field>
  5928. <field> <name>LSERDY</name>
  5929. <description>External low-speed oscillator
  5930. ready</description>
  5931. <bitOffset>1</bitOffset>
  5932. <bitWidth>1</bitWidth>
  5933. <access>read-only</access>
  5934. </field>
  5935. <field> <name>LSEON</name>
  5936. <description>External low-speed oscillator
  5937. enable</description>
  5938. <bitOffset>0</bitOffset>
  5939. <bitWidth>1</bitWidth>
  5940. <access>read-write</access>
  5941. </field>
  5942. </fields>
  5943. </register>
  5944. <register> <name>CSR</name>
  5945. <displayName>CSR</displayName>
  5946. <description>clock control &amp; status
  5947. register</description>
  5948. <addressOffset>0x74</addressOffset>
  5949. <size>0x20</size>
  5950. <resetValue>0x0E000000</resetValue>
  5951. <fields>
  5952. <field> <name>LPWRRSTF</name>
  5953. <description>Low-power reset flag</description>
  5954. <bitOffset>31</bitOffset>
  5955. <bitWidth>1</bitWidth>
  5956. <access>read-write</access>
  5957. </field>
  5958. <field> <name>WWDGRSTF</name>
  5959. <description>Window watchdog reset flag</description>
  5960. <bitOffset>30</bitOffset>
  5961. <bitWidth>1</bitWidth>
  5962. <access>read-write</access>
  5963. </field>
  5964. <field> <name>WDGRSTF</name>
  5965. <description>Independent watchdog reset
  5966. flag</description>
  5967. <bitOffset>29</bitOffset>
  5968. <bitWidth>1</bitWidth>
  5969. <access>read-write</access>
  5970. </field>
  5971. <field> <name>SFTRSTF</name>
  5972. <description>Software reset flag</description>
  5973. <bitOffset>28</bitOffset>
  5974. <bitWidth>1</bitWidth>
  5975. <access>read-write</access>
  5976. </field>
  5977. <field> <name>PORRSTF</name>
  5978. <description>POR/PDR reset flag</description>
  5979. <bitOffset>27</bitOffset>
  5980. <bitWidth>1</bitWidth>
  5981. <access>read-write</access>
  5982. </field>
  5983. <field> <name>PADRSTF</name>
  5984. <description>PIN reset flag</description>
  5985. <bitOffset>26</bitOffset>
  5986. <bitWidth>1</bitWidth>
  5987. <access>read-write</access>
  5988. </field>
  5989. <field> <name>BORRSTF</name>
  5990. <description>BOR reset flag</description>
  5991. <bitOffset>25</bitOffset>
  5992. <bitWidth>1</bitWidth>
  5993. <access>read-write</access>
  5994. </field>
  5995. <field> <name>RMVF</name>
  5996. <description>Remove reset flag</description>
  5997. <bitOffset>24</bitOffset>
  5998. <bitWidth>1</bitWidth>
  5999. <access>read-write</access>
  6000. </field>
  6001. <field> <name>LSIRDY</name>
  6002. <description>Internal low-speed oscillator
  6003. ready</description>
  6004. <bitOffset>1</bitOffset>
  6005. <bitWidth>1</bitWidth>
  6006. <access>read-only</access>
  6007. </field>
  6008. <field> <name>LSION</name>
  6009. <description>Internal low-speed oscillator
  6010. enable</description>
  6011. <bitOffset>0</bitOffset>
  6012. <bitWidth>1</bitWidth>
  6013. <access>read-write</access>
  6014. </field>
  6015. </fields>
  6016. </register>
  6017. <register> <name>SSCGR</name>
  6018. <displayName>SSCGR</displayName>
  6019. <description>spread spectrum clock generation
  6020. register</description>
  6021. <addressOffset>0x80</addressOffset>
  6022. <size>0x20</size>
  6023. <access>read-write</access>
  6024. <resetValue>0x00000000</resetValue>
  6025. <fields>
  6026. <field> <name>SSCGEN</name>
  6027. <description>Spread spectrum modulation
  6028. enable</description>
  6029. <bitOffset>31</bitOffset>
  6030. <bitWidth>1</bitWidth>
  6031. </field>
  6032. <field> <name>SPREADSEL</name>
  6033. <description>Spread Select</description>
  6034. <bitOffset>30</bitOffset>
  6035. <bitWidth>1</bitWidth>
  6036. </field>
  6037. <field> <name>INCSTEP</name>
  6038. <description>Incrementation step</description>
  6039. <bitOffset>13</bitOffset>
  6040. <bitWidth>15</bitWidth>
  6041. </field>
  6042. <field> <name>MODPER</name>
  6043. <description>Modulation period</description>
  6044. <bitOffset>0</bitOffset>
  6045. <bitWidth>13</bitWidth>
  6046. </field>
  6047. </fields>
  6048. </register>
  6049. <register> <name>PLLI2SCFGR</name>
  6050. <displayName>PLLI2SCFGR</displayName>
  6051. <description>PLLI2S configuration register</description>
  6052. <addressOffset>0x84</addressOffset>
  6053. <size>0x20</size>
  6054. <access>read-write</access>
  6055. <resetValue>0x20003000</resetValue>
  6056. <fields>
  6057. <field> <name>PLLI2SRx</name>
  6058. <description>PLLI2S division factor for I2S
  6059. clocks</description>
  6060. <bitOffset>28</bitOffset>
  6061. <bitWidth>3</bitWidth>
  6062. </field>
  6063. <field> <name>PLLI2SNx</name>
  6064. <description>PLLI2S multiplication factor for
  6065. VCO</description>
  6066. <bitOffset>6</bitOffset>
  6067. <bitWidth>9</bitWidth>
  6068. </field>
  6069. </fields>
  6070. </register>
  6071. </registers>
  6072. </peripheral>
  6073. <peripheral> <name>GPIOI</name>
  6074. <description>General-purpose I/Os</description>
  6075. <groupName>GPIO</groupName>
  6076. <baseAddress>0x40022000</baseAddress>
  6077. <addressBlock>
  6078. <offset>0x0</offset>
  6079. <size>0x400</size>
  6080. <usage>registers</usage>
  6081. </addressBlock>
  6082. <registers>
  6083. <register> <name>MODER</name>
  6084. <displayName>MODER</displayName>
  6085. <description>GPIO port mode register</description>
  6086. <addressOffset>0x0</addressOffset>
  6087. <size>0x20</size>
  6088. <access>read-write</access>
  6089. <resetValue>0x00000000</resetValue>
  6090. <fields>
  6091. <field> <name>MODER15</name>
  6092. <description>Port x configuration bits (y =
  6093. 0..15)</description>
  6094. <bitOffset>30</bitOffset>
  6095. <bitWidth>2</bitWidth>
  6096. </field>
  6097. <field> <name>MODER14</name>
  6098. <description>Port x configuration bits (y =
  6099. 0..15)</description>
  6100. <bitOffset>28</bitOffset>
  6101. <bitWidth>2</bitWidth>
  6102. </field>
  6103. <field> <name>MODER13</name>
  6104. <description>Port x configuration bits (y =
  6105. 0..15)</description>
  6106. <bitOffset>26</bitOffset>
  6107. <bitWidth>2</bitWidth>
  6108. </field>
  6109. <field> <name>MODER12</name>
  6110. <description>Port x configuration bits (y =
  6111. 0..15)</description>
  6112. <bitOffset>24</bitOffset>
  6113. <bitWidth>2</bitWidth>
  6114. </field>
  6115. <field> <name>MODER11</name>
  6116. <description>Port x configuration bits (y =
  6117. 0..15)</description>
  6118. <bitOffset>22</bitOffset>
  6119. <bitWidth>2</bitWidth>
  6120. </field>
  6121. <field> <name>MODER10</name>
  6122. <description>Port x configuration bits (y =
  6123. 0..15)</description>
  6124. <bitOffset>20</bitOffset>
  6125. <bitWidth>2</bitWidth>
  6126. </field>
  6127. <field> <name>MODER9</name>
  6128. <description>Port x configuration bits (y =
  6129. 0..15)</description>
  6130. <bitOffset>18</bitOffset>
  6131. <bitWidth>2</bitWidth>
  6132. </field>
  6133. <field> <name>MODER8</name>
  6134. <description>Port x configuration bits (y =
  6135. 0..15)</description>
  6136. <bitOffset>16</bitOffset>
  6137. <bitWidth>2</bitWidth>
  6138. </field>
  6139. <field> <name>MODER7</name>
  6140. <description>Port x configuration bits (y =
  6141. 0..15)</description>
  6142. <bitOffset>14</bitOffset>
  6143. <bitWidth>2</bitWidth>
  6144. </field>
  6145. <field> <name>MODER6</name>
  6146. <description>Port x configuration bits (y =
  6147. 0..15)</description>
  6148. <bitOffset>12</bitOffset>
  6149. <bitWidth>2</bitWidth>
  6150. </field>
  6151. <field> <name>MODER5</name>
  6152. <description>Port x configuration bits (y =
  6153. 0..15)</description>
  6154. <bitOffset>10</bitOffset>
  6155. <bitWidth>2</bitWidth>
  6156. </field>
  6157. <field> <name>MODER4</name>
  6158. <description>Port x configuration bits (y =
  6159. 0..15)</description>
  6160. <bitOffset>8</bitOffset>
  6161. <bitWidth>2</bitWidth>
  6162. </field>
  6163. <field> <name>MODER3</name>
  6164. <description>Port x configuration bits (y =
  6165. 0..15)</description>
  6166. <bitOffset>6</bitOffset>
  6167. <bitWidth>2</bitWidth>
  6168. </field>
  6169. <field> <name>MODER2</name>
  6170. <description>Port x configuration bits (y =
  6171. 0..15)</description>
  6172. <bitOffset>4</bitOffset>
  6173. <bitWidth>2</bitWidth>
  6174. </field>
  6175. <field> <name>MODER1</name>
  6176. <description>Port x configuration bits (y =
  6177. 0..15)</description>
  6178. <bitOffset>2</bitOffset>
  6179. <bitWidth>2</bitWidth>
  6180. </field>
  6181. <field> <name>MODER0</name>
  6182. <description>Port x configuration bits (y =
  6183. 0..15)</description>
  6184. <bitOffset>0</bitOffset>
  6185. <bitWidth>2</bitWidth>
  6186. </field>
  6187. </fields>
  6188. </register>
  6189. <register> <name>OTYPER</name>
  6190. <displayName>OTYPER</displayName>
  6191. <description>GPIO port output type register</description>
  6192. <addressOffset>0x4</addressOffset>
  6193. <size>0x20</size>
  6194. <access>read-write</access>
  6195. <resetValue>0x00000000</resetValue>
  6196. <fields>
  6197. <field> <name>OT15</name>
  6198. <description>Port x configuration bits (y =
  6199. 0..15)</description>
  6200. <bitOffset>15</bitOffset>
  6201. <bitWidth>1</bitWidth>
  6202. </field>
  6203. <field> <name>OT14</name>
  6204. <description>Port x configuration bits (y =
  6205. 0..15)</description>
  6206. <bitOffset>14</bitOffset>
  6207. <bitWidth>1</bitWidth>
  6208. </field>
  6209. <field> <name>OT13</name>
  6210. <description>Port x configuration bits (y =
  6211. 0..15)</description>
  6212. <bitOffset>13</bitOffset>
  6213. <bitWidth>1</bitWidth>
  6214. </field>
  6215. <field> <name>OT12</name>
  6216. <description>Port x configuration bits (y =
  6217. 0..15)</description>
  6218. <bitOffset>12</bitOffset>
  6219. <bitWidth>1</bitWidth>
  6220. </field>
  6221. <field> <name>OT11</name>
  6222. <description>Port x configuration bits (y =
  6223. 0..15)</description>
  6224. <bitOffset>11</bitOffset>
  6225. <bitWidth>1</bitWidth>
  6226. </field>
  6227. <field> <name>OT10</name>
  6228. <description>Port x configuration bits (y =
  6229. 0..15)</description>
  6230. <bitOffset>10</bitOffset>
  6231. <bitWidth>1</bitWidth>
  6232. </field>
  6233. <field> <name>OT9</name>
  6234. <description>Port x configuration bits (y =
  6235. 0..15)</description>
  6236. <bitOffset>9</bitOffset>
  6237. <bitWidth>1</bitWidth>
  6238. </field>
  6239. <field> <name>OT8</name>
  6240. <description>Port x configuration bits (y =
  6241. 0..15)</description>
  6242. <bitOffset>8</bitOffset>
  6243. <bitWidth>1</bitWidth>
  6244. </field>
  6245. <field> <name>OT7</name>
  6246. <description>Port x configuration bits (y =
  6247. 0..15)</description>
  6248. <bitOffset>7</bitOffset>
  6249. <bitWidth>1</bitWidth>
  6250. </field>
  6251. <field> <name>OT6</name>
  6252. <description>Port x configuration bits (y =
  6253. 0..15)</description>
  6254. <bitOffset>6</bitOffset>
  6255. <bitWidth>1</bitWidth>
  6256. </field>
  6257. <field> <name>OT5</name>
  6258. <description>Port x configuration bits (y =
  6259. 0..15)</description>
  6260. <bitOffset>5</bitOffset>
  6261. <bitWidth>1</bitWidth>
  6262. </field>
  6263. <field> <name>OT4</name>
  6264. <description>Port x configuration bits (y =
  6265. 0..15)</description>
  6266. <bitOffset>4</bitOffset>
  6267. <bitWidth>1</bitWidth>
  6268. </field>
  6269. <field> <name>OT3</name>
  6270. <description>Port x configuration bits (y =
  6271. 0..15)</description>
  6272. <bitOffset>3</bitOffset>
  6273. <bitWidth>1</bitWidth>
  6274. </field>
  6275. <field> <name>OT2</name>
  6276. <description>Port x configuration bits (y =
  6277. 0..15)</description>
  6278. <bitOffset>2</bitOffset>
  6279. <bitWidth>1</bitWidth>
  6280. </field>
  6281. <field> <name>OT1</name>
  6282. <description>Port x configuration bits (y =
  6283. 0..15)</description>
  6284. <bitOffset>1</bitOffset>
  6285. <bitWidth>1</bitWidth>
  6286. </field>
  6287. <field> <name>OT0</name>
  6288. <description>Port x configuration bits (y =
  6289. 0..15)</description>
  6290. <bitOffset>0</bitOffset>
  6291. <bitWidth>1</bitWidth>
  6292. </field>
  6293. </fields>
  6294. </register>
  6295. <register> <name>OSPEEDR</name>
  6296. <displayName>OSPEEDR</displayName>
  6297. <description>GPIO port output speed
  6298. register</description>
  6299. <addressOffset>0x8</addressOffset>
  6300. <size>0x20</size>
  6301. <access>read-write</access>
  6302. <resetValue>0x00000000</resetValue>
  6303. <fields>
  6304. <field> <name>OSPEEDR15</name>
  6305. <description>Port x configuration bits (y =
  6306. 0..15)</description>
  6307. <bitOffset>30</bitOffset>
  6308. <bitWidth>2</bitWidth>
  6309. </field>
  6310. <field> <name>OSPEEDR14</name>
  6311. <description>Port x configuration bits (y =
  6312. 0..15)</description>
  6313. <bitOffset>28</bitOffset>
  6314. <bitWidth>2</bitWidth>
  6315. </field>
  6316. <field> <name>OSPEEDR13</name>
  6317. <description>Port x configuration bits (y =
  6318. 0..15)</description>
  6319. <bitOffset>26</bitOffset>
  6320. <bitWidth>2</bitWidth>
  6321. </field>
  6322. <field> <name>OSPEEDR12</name>
  6323. <description>Port x configuration bits (y =
  6324. 0..15)</description>
  6325. <bitOffset>24</bitOffset>
  6326. <bitWidth>2</bitWidth>
  6327. </field>
  6328. <field> <name>OSPEEDR11</name>
  6329. <description>Port x configuration bits (y =
  6330. 0..15)</description>
  6331. <bitOffset>22</bitOffset>
  6332. <bitWidth>2</bitWidth>
  6333. </field>
  6334. <field> <name>OSPEEDR10</name>
  6335. <description>Port x configuration bits (y =
  6336. 0..15)</description>
  6337. <bitOffset>20</bitOffset>
  6338. <bitWidth>2</bitWidth>
  6339. </field>
  6340. <field> <name>OSPEEDR9</name>
  6341. <description>Port x configuration bits (y =
  6342. 0..15)</description>
  6343. <bitOffset>18</bitOffset>
  6344. <bitWidth>2</bitWidth>
  6345. </field>
  6346. <field> <name>OSPEEDR8</name>
  6347. <description>Port x configuration bits (y =
  6348. 0..15)</description>
  6349. <bitOffset>16</bitOffset>
  6350. <bitWidth>2</bitWidth>
  6351. </field>
  6352. <field> <name>OSPEEDR7</name>
  6353. <description>Port x configuration bits (y =
  6354. 0..15)</description>
  6355. <bitOffset>14</bitOffset>
  6356. <bitWidth>2</bitWidth>
  6357. </field>
  6358. <field> <name>OSPEEDR6</name>
  6359. <description>Port x configuration bits (y =
  6360. 0..15)</description>
  6361. <bitOffset>12</bitOffset>
  6362. <bitWidth>2</bitWidth>
  6363. </field>
  6364. <field> <name>OSPEEDR5</name>
  6365. <description>Port x configuration bits (y =
  6366. 0..15)</description>
  6367. <bitOffset>10</bitOffset>
  6368. <bitWidth>2</bitWidth>
  6369. </field>
  6370. <field> <name>OSPEEDR4</name>
  6371. <description>Port x configuration bits (y =
  6372. 0..15)</description>
  6373. <bitOffset>8</bitOffset>
  6374. <bitWidth>2</bitWidth>
  6375. </field>
  6376. <field> <name>OSPEEDR3</name>
  6377. <description>Port x configuration bits (y =
  6378. 0..15)</description>
  6379. <bitOffset>6</bitOffset>
  6380. <bitWidth>2</bitWidth>
  6381. </field>
  6382. <field> <name>OSPEEDR2</name>
  6383. <description>Port x configuration bits (y =
  6384. 0..15)</description>
  6385. <bitOffset>4</bitOffset>
  6386. <bitWidth>2</bitWidth>
  6387. </field>
  6388. <field> <name>OSPEEDR1</name>
  6389. <description>Port x configuration bits (y =
  6390. 0..15)</description>
  6391. <bitOffset>2</bitOffset>
  6392. <bitWidth>2</bitWidth>
  6393. </field>
  6394. <field> <name>OSPEEDR0</name>
  6395. <description>Port x configuration bits (y =
  6396. 0..15)</description>
  6397. <bitOffset>0</bitOffset>
  6398. <bitWidth>2</bitWidth>
  6399. </field>
  6400. </fields>
  6401. </register>
  6402. <register> <name>PUPDR</name>
  6403. <displayName>PUPDR</displayName>
  6404. <description>GPIO port pull-up/pull-down
  6405. register</description>
  6406. <addressOffset>0xC</addressOffset>
  6407. <size>0x20</size>
  6408. <access>read-write</access>
  6409. <resetValue>0x00000000</resetValue>
  6410. <fields>
  6411. <field> <name>PUPDR15</name>
  6412. <description>Port x configuration bits (y =
  6413. 0..15)</description>
  6414. <bitOffset>30</bitOffset>
  6415. <bitWidth>2</bitWidth>
  6416. </field>
  6417. <field> <name>PUPDR14</name>
  6418. <description>Port x configuration bits (y =
  6419. 0..15)</description>
  6420. <bitOffset>28</bitOffset>
  6421. <bitWidth>2</bitWidth>
  6422. </field>
  6423. <field> <name>PUPDR13</name>
  6424. <description>Port x configuration bits (y =
  6425. 0..15)</description>
  6426. <bitOffset>26</bitOffset>
  6427. <bitWidth>2</bitWidth>
  6428. </field>
  6429. <field> <name>PUPDR12</name>
  6430. <description>Port x configuration bits (y =
  6431. 0..15)</description>
  6432. <bitOffset>24</bitOffset>
  6433. <bitWidth>2</bitWidth>
  6434. </field>
  6435. <field> <name>PUPDR11</name>
  6436. <description>Port x configuration bits (y =
  6437. 0..15)</description>
  6438. <bitOffset>22</bitOffset>
  6439. <bitWidth>2</bitWidth>
  6440. </field>
  6441. <field> <name>PUPDR10</name>
  6442. <description>Port x configuration bits (y =
  6443. 0..15)</description>
  6444. <bitOffset>20</bitOffset>
  6445. <bitWidth>2</bitWidth>
  6446. </field>
  6447. <field> <name>PUPDR9</name>
  6448. <description>Port x configuration bits (y =
  6449. 0..15)</description>
  6450. <bitOffset>18</bitOffset>
  6451. <bitWidth>2</bitWidth>
  6452. </field>
  6453. <field> <name>PUPDR8</name>
  6454. <description>Port x configuration bits (y =
  6455. 0..15)</description>
  6456. <bitOffset>16</bitOffset>
  6457. <bitWidth>2</bitWidth>
  6458. </field>
  6459. <field> <name>PUPDR7</name>
  6460. <description>Port x configuration bits (y =
  6461. 0..15)</description>
  6462. <bitOffset>14</bitOffset>
  6463. <bitWidth>2</bitWidth>
  6464. </field>
  6465. <field> <name>PUPDR6</name>
  6466. <description>Port x configuration bits (y =
  6467. 0..15)</description>
  6468. <bitOffset>12</bitOffset>
  6469. <bitWidth>2</bitWidth>
  6470. </field>
  6471. <field> <name>PUPDR5</name>
  6472. <description>Port x configuration bits (y =
  6473. 0..15)</description>
  6474. <bitOffset>10</bitOffset>
  6475. <bitWidth>2</bitWidth>
  6476. </field>
  6477. <field> <name>PUPDR4</name>
  6478. <description>Port x configuration bits (y =
  6479. 0..15)</description>
  6480. <bitOffset>8</bitOffset>
  6481. <bitWidth>2</bitWidth>
  6482. </field>
  6483. <field> <name>PUPDR3</name>
  6484. <description>Port x configuration bits (y =
  6485. 0..15)</description>
  6486. <bitOffset>6</bitOffset>
  6487. <bitWidth>2</bitWidth>
  6488. </field>
  6489. <field> <name>PUPDR2</name>
  6490. <description>Port x configuration bits (y =
  6491. 0..15)</description>
  6492. <bitOffset>4</bitOffset>
  6493. <bitWidth>2</bitWidth>
  6494. </field>
  6495. <field> <name>PUPDR1</name>
  6496. <description>Port x configuration bits (y =
  6497. 0..15)</description>
  6498. <bitOffset>2</bitOffset>
  6499. <bitWidth>2</bitWidth>
  6500. </field>
  6501. <field> <name>PUPDR0</name>
  6502. <description>Port x configuration bits (y =
  6503. 0..15)</description>
  6504. <bitOffset>0</bitOffset>
  6505. <bitWidth>2</bitWidth>
  6506. </field>
  6507. </fields>
  6508. </register>
  6509. <register> <name>IDR</name>
  6510. <displayName>IDR</displayName>
  6511. <description>GPIO port input data register</description>
  6512. <addressOffset>0x10</addressOffset>
  6513. <size>0x20</size>
  6514. <access>read-only</access>
  6515. <resetValue>0x00000000</resetValue>
  6516. <fields>
  6517. <field> <name>IDR15</name>
  6518. <description>Port input data (y =
  6519. 0..15)</description>
  6520. <bitOffset>15</bitOffset>
  6521. <bitWidth>1</bitWidth>
  6522. </field>
  6523. <field> <name>IDR14</name>
  6524. <description>Port input data (y =
  6525. 0..15)</description>
  6526. <bitOffset>14</bitOffset>
  6527. <bitWidth>1</bitWidth>
  6528. </field>
  6529. <field> <name>IDR13</name>
  6530. <description>Port input data (y =
  6531. 0..15)</description>
  6532. <bitOffset>13</bitOffset>
  6533. <bitWidth>1</bitWidth>
  6534. </field>
  6535. <field> <name>IDR12</name>
  6536. <description>Port input data (y =
  6537. 0..15)</description>
  6538. <bitOffset>12</bitOffset>
  6539. <bitWidth>1</bitWidth>
  6540. </field>
  6541. <field> <name>IDR11</name>
  6542. <description>Port input data (y =
  6543. 0..15)</description>
  6544. <bitOffset>11</bitOffset>
  6545. <bitWidth>1</bitWidth>
  6546. </field>
  6547. <field> <name>IDR10</name>
  6548. <description>Port input data (y =
  6549. 0..15)</description>
  6550. <bitOffset>10</bitOffset>
  6551. <bitWidth>1</bitWidth>
  6552. </field>
  6553. <field> <name>IDR9</name>
  6554. <description>Port input data (y =
  6555. 0..15)</description>
  6556. <bitOffset>9</bitOffset>
  6557. <bitWidth>1</bitWidth>
  6558. </field>
  6559. <field> <name>IDR8</name>
  6560. <description>Port input data (y =
  6561. 0..15)</description>
  6562. <bitOffset>8</bitOffset>
  6563. <bitWidth>1</bitWidth>
  6564. </field>
  6565. <field> <name>IDR7</name>
  6566. <description>Port input data (y =
  6567. 0..15)</description>
  6568. <bitOffset>7</bitOffset>
  6569. <bitWidth>1</bitWidth>
  6570. </field>
  6571. <field> <name>IDR6</name>
  6572. <description>Port input data (y =
  6573. 0..15)</description>
  6574. <bitOffset>6</bitOffset>
  6575. <bitWidth>1</bitWidth>
  6576. </field>
  6577. <field> <name>IDR5</name>
  6578. <description>Port input data (y =
  6579. 0..15)</description>
  6580. <bitOffset>5</bitOffset>
  6581. <bitWidth>1</bitWidth>
  6582. </field>
  6583. <field> <name>IDR4</name>
  6584. <description>Port input data (y =
  6585. 0..15)</description>
  6586. <bitOffset>4</bitOffset>
  6587. <bitWidth>1</bitWidth>
  6588. </field>
  6589. <field> <name>IDR3</name>
  6590. <description>Port input data (y =
  6591. 0..15)</description>
  6592. <bitOffset>3</bitOffset>
  6593. <bitWidth>1</bitWidth>
  6594. </field>
  6595. <field> <name>IDR2</name>
  6596. <description>Port input data (y =
  6597. 0..15)</description>
  6598. <bitOffset>2</bitOffset>
  6599. <bitWidth>1</bitWidth>
  6600. </field>
  6601. <field> <name>IDR1</name>
  6602. <description>Port input data (y =
  6603. 0..15)</description>
  6604. <bitOffset>1</bitOffset>
  6605. <bitWidth>1</bitWidth>
  6606. </field>
  6607. <field> <name>IDR0</name>
  6608. <description>Port input data (y =
  6609. 0..15)</description>
  6610. <bitOffset>0</bitOffset>
  6611. <bitWidth>1</bitWidth>
  6612. </field>
  6613. </fields>
  6614. </register>
  6615. <register> <name>ODR</name>
  6616. <displayName>ODR</displayName>
  6617. <description>GPIO port output data register</description>
  6618. <addressOffset>0x14</addressOffset>
  6619. <size>0x20</size>
  6620. <access>read-write</access>
  6621. <resetValue>0x00000000</resetValue>
  6622. <fields>
  6623. <field> <name>ODR15</name>
  6624. <description>Port output data (y =
  6625. 0..15)</description>
  6626. <bitOffset>15</bitOffset>
  6627. <bitWidth>1</bitWidth>
  6628. </field>
  6629. <field> <name>ODR14</name>
  6630. <description>Port output data (y =
  6631. 0..15)</description>
  6632. <bitOffset>14</bitOffset>
  6633. <bitWidth>1</bitWidth>
  6634. </field>
  6635. <field> <name>ODR13</name>
  6636. <description>Port output data (y =
  6637. 0..15)</description>
  6638. <bitOffset>13</bitOffset>
  6639. <bitWidth>1</bitWidth>
  6640. </field>
  6641. <field> <name>ODR12</name>
  6642. <description>Port output data (y =
  6643. 0..15)</description>
  6644. <bitOffset>12</bitOffset>
  6645. <bitWidth>1</bitWidth>
  6646. </field>
  6647. <field> <name>ODR11</name>
  6648. <description>Port output data (y =
  6649. 0..15)</description>
  6650. <bitOffset>11</bitOffset>
  6651. <bitWidth>1</bitWidth>
  6652. </field>
  6653. <field> <name>ODR10</name>
  6654. <description>Port output data (y =
  6655. 0..15)</description>
  6656. <bitOffset>10</bitOffset>
  6657. <bitWidth>1</bitWidth>
  6658. </field>
  6659. <field> <name>ODR9</name>
  6660. <description>Port output data (y =
  6661. 0..15)</description>
  6662. <bitOffset>9</bitOffset>
  6663. <bitWidth>1</bitWidth>
  6664. </field>
  6665. <field> <name>ODR8</name>
  6666. <description>Port output data (y =
  6667. 0..15)</description>
  6668. <bitOffset>8</bitOffset>
  6669. <bitWidth>1</bitWidth>
  6670. </field>
  6671. <field> <name>ODR7</name>
  6672. <description>Port output data (y =
  6673. 0..15)</description>
  6674. <bitOffset>7</bitOffset>
  6675. <bitWidth>1</bitWidth>
  6676. </field>
  6677. <field> <name>ODR6</name>
  6678. <description>Port output data (y =
  6679. 0..15)</description>
  6680. <bitOffset>6</bitOffset>
  6681. <bitWidth>1</bitWidth>
  6682. </field>
  6683. <field> <name>ODR5</name>
  6684. <description>Port output data (y =
  6685. 0..15)</description>
  6686. <bitOffset>5</bitOffset>
  6687. <bitWidth>1</bitWidth>
  6688. </field>
  6689. <field> <name>ODR4</name>
  6690. <description>Port output data (y =
  6691. 0..15)</description>
  6692. <bitOffset>4</bitOffset>
  6693. <bitWidth>1</bitWidth>
  6694. </field>
  6695. <field> <name>ODR3</name>
  6696. <description>Port output data (y =
  6697. 0..15)</description>
  6698. <bitOffset>3</bitOffset>
  6699. <bitWidth>1</bitWidth>
  6700. </field>
  6701. <field> <name>ODR2</name>
  6702. <description>Port output data (y =
  6703. 0..15)</description>
  6704. <bitOffset>2</bitOffset>
  6705. <bitWidth>1</bitWidth>
  6706. </field>
  6707. <field> <name>ODR1</name>
  6708. <description>Port output data (y =
  6709. 0..15)</description>
  6710. <bitOffset>1</bitOffset>
  6711. <bitWidth>1</bitWidth>
  6712. </field>
  6713. <field> <name>ODR0</name>
  6714. <description>Port output data (y =
  6715. 0..15)</description>
  6716. <bitOffset>0</bitOffset>
  6717. <bitWidth>1</bitWidth>
  6718. </field>
  6719. </fields>
  6720. </register>
  6721. <register> <name>BSRR</name>
  6722. <displayName>BSRR</displayName>
  6723. <description>GPIO port bit set/reset
  6724. register</description>
  6725. <addressOffset>0x18</addressOffset>
  6726. <size>0x20</size>
  6727. <access>write-only</access>
  6728. <resetValue>0x00000000</resetValue>
  6729. <fields>
  6730. <field> <name>BR15</name>
  6731. <description>Port x reset bit y (y =
  6732. 0..15)</description>
  6733. <bitOffset>31</bitOffset>
  6734. <bitWidth>1</bitWidth>
  6735. </field>
  6736. <field> <name>BR14</name>
  6737. <description>Port x reset bit y (y =
  6738. 0..15)</description>
  6739. <bitOffset>30</bitOffset>
  6740. <bitWidth>1</bitWidth>
  6741. </field>
  6742. <field> <name>BR13</name>
  6743. <description>Port x reset bit y (y =
  6744. 0..15)</description>
  6745. <bitOffset>29</bitOffset>
  6746. <bitWidth>1</bitWidth>
  6747. </field>
  6748. <field> <name>BR12</name>
  6749. <description>Port x reset bit y (y =
  6750. 0..15)</description>
  6751. <bitOffset>28</bitOffset>
  6752. <bitWidth>1</bitWidth>
  6753. </field>
  6754. <field> <name>BR11</name>
  6755. <description>Port x reset bit y (y =
  6756. 0..15)</description>
  6757. <bitOffset>27</bitOffset>
  6758. <bitWidth>1</bitWidth>
  6759. </field>
  6760. <field> <name>BR10</name>
  6761. <description>Port x reset bit y (y =
  6762. 0..15)</description>
  6763. <bitOffset>26</bitOffset>
  6764. <bitWidth>1</bitWidth>
  6765. </field>
  6766. <field> <name>BR9</name>
  6767. <description>Port x reset bit y (y =
  6768. 0..15)</description>
  6769. <bitOffset>25</bitOffset>
  6770. <bitWidth>1</bitWidth>
  6771. </field>
  6772. <field> <name>BR8</name>
  6773. <description>Port x reset bit y (y =
  6774. 0..15)</description>
  6775. <bitOffset>24</bitOffset>
  6776. <bitWidth>1</bitWidth>
  6777. </field>
  6778. <field> <name>BR7</name>
  6779. <description>Port x reset bit y (y =
  6780. 0..15)</description>
  6781. <bitOffset>23</bitOffset>
  6782. <bitWidth>1</bitWidth>
  6783. </field>
  6784. <field> <name>BR6</name>
  6785. <description>Port x reset bit y (y =
  6786. 0..15)</description>
  6787. <bitOffset>22</bitOffset>
  6788. <bitWidth>1</bitWidth>
  6789. </field>
  6790. <field> <name>BR5</name>
  6791. <description>Port x reset bit y (y =
  6792. 0..15)</description>
  6793. <bitOffset>21</bitOffset>
  6794. <bitWidth>1</bitWidth>
  6795. </field>
  6796. <field> <name>BR4</name>
  6797. <description>Port x reset bit y (y =
  6798. 0..15)</description>
  6799. <bitOffset>20</bitOffset>
  6800. <bitWidth>1</bitWidth>
  6801. </field>
  6802. <field> <name>BR3</name>
  6803. <description>Port x reset bit y (y =
  6804. 0..15)</description>
  6805. <bitOffset>19</bitOffset>
  6806. <bitWidth>1</bitWidth>
  6807. </field>
  6808. <field> <name>BR2</name>
  6809. <description>Port x reset bit y (y =
  6810. 0..15)</description>
  6811. <bitOffset>18</bitOffset>
  6812. <bitWidth>1</bitWidth>
  6813. </field>
  6814. <field> <name>BR1</name>
  6815. <description>Port x reset bit y (y =
  6816. 0..15)</description>
  6817. <bitOffset>17</bitOffset>
  6818. <bitWidth>1</bitWidth>
  6819. </field>
  6820. <field> <name>BR0</name>
  6821. <description>Port x set bit y (y=
  6822. 0..15)</description>
  6823. <bitOffset>16</bitOffset>
  6824. <bitWidth>1</bitWidth>
  6825. </field>
  6826. <field> <name>BS15</name>
  6827. <description>Port x set bit y (y=
  6828. 0..15)</description>
  6829. <bitOffset>15</bitOffset>
  6830. <bitWidth>1</bitWidth>
  6831. </field>
  6832. <field> <name>BS14</name>
  6833. <description>Port x set bit y (y=
  6834. 0..15)</description>
  6835. <bitOffset>14</bitOffset>
  6836. <bitWidth>1</bitWidth>
  6837. </field>
  6838. <field> <name>BS13</name>
  6839. <description>Port x set bit y (y=
  6840. 0..15)</description>
  6841. <bitOffset>13</bitOffset>
  6842. <bitWidth>1</bitWidth>
  6843. </field>
  6844. <field> <name>BS12</name>
  6845. <description>Port x set bit y (y=
  6846. 0..15)</description>
  6847. <bitOffset>12</bitOffset>
  6848. <bitWidth>1</bitWidth>
  6849. </field>
  6850. <field> <name>BS11</name>
  6851. <description>Port x set bit y (y=
  6852. 0..15)</description>
  6853. <bitOffset>11</bitOffset>
  6854. <bitWidth>1</bitWidth>
  6855. </field>
  6856. <field> <name>BS10</name>
  6857. <description>Port x set bit y (y=
  6858. 0..15)</description>
  6859. <bitOffset>10</bitOffset>
  6860. <bitWidth>1</bitWidth>
  6861. </field>
  6862. <field> <name>BS9</name>
  6863. <description>Port x set bit y (y=
  6864. 0..15)</description>
  6865. <bitOffset>9</bitOffset>
  6866. <bitWidth>1</bitWidth>
  6867. </field>
  6868. <field> <name>BS8</name>
  6869. <description>Port x set bit y (y=
  6870. 0..15)</description>
  6871. <bitOffset>8</bitOffset>
  6872. <bitWidth>1</bitWidth>
  6873. </field>
  6874. <field> <name>BS7</name>
  6875. <description>Port x set bit y (y=
  6876. 0..15)</description>
  6877. <bitOffset>7</bitOffset>
  6878. <bitWidth>1</bitWidth>
  6879. </field>
  6880. <field> <name>BS6</name>
  6881. <description>Port x set bit y (y=
  6882. 0..15)</description>
  6883. <bitOffset>6</bitOffset>
  6884. <bitWidth>1</bitWidth>
  6885. </field>
  6886. <field> <name>BS5</name>
  6887. <description>Port x set bit y (y=
  6888. 0..15)</description>
  6889. <bitOffset>5</bitOffset>
  6890. <bitWidth>1</bitWidth>
  6891. </field>
  6892. <field> <name>BS4</name>
  6893. <description>Port x set bit y (y=
  6894. 0..15)</description>
  6895. <bitOffset>4</bitOffset>
  6896. <bitWidth>1</bitWidth>
  6897. </field>
  6898. <field> <name>BS3</name>
  6899. <description>Port x set bit y (y=
  6900. 0..15)</description>
  6901. <bitOffset>3</bitOffset>
  6902. <bitWidth>1</bitWidth>
  6903. </field>
  6904. <field> <name>BS2</name>
  6905. <description>Port x set bit y (y=
  6906. 0..15)</description>
  6907. <bitOffset>2</bitOffset>
  6908. <bitWidth>1</bitWidth>
  6909. </field>
  6910. <field> <name>BS1</name>
  6911. <description>Port x set bit y (y=
  6912. 0..15)</description>
  6913. <bitOffset>1</bitOffset>
  6914. <bitWidth>1</bitWidth>
  6915. </field>
  6916. <field> <name>BS0</name>
  6917. <description>Port x set bit y (y=
  6918. 0..15)</description>
  6919. <bitOffset>0</bitOffset>
  6920. <bitWidth>1</bitWidth>
  6921. </field>
  6922. </fields>
  6923. </register>
  6924. <register> <name>LCKR</name>
  6925. <displayName>LCKR</displayName>
  6926. <description>GPIO port configuration lock
  6927. register</description>
  6928. <addressOffset>0x1C</addressOffset>
  6929. <size>0x20</size>
  6930. <access>read-write</access>
  6931. <resetValue>0x00000000</resetValue>
  6932. <fields>
  6933. <field> <name>LCKK</name>
  6934. <description>Port x lock bit y (y=
  6935. 0..15)</description>
  6936. <bitOffset>16</bitOffset>
  6937. <bitWidth>1</bitWidth>
  6938. </field>
  6939. <field> <name>LCK15</name>
  6940. <description>Port x lock bit y (y=
  6941. 0..15)</description>
  6942. <bitOffset>15</bitOffset>
  6943. <bitWidth>1</bitWidth>
  6944. </field>
  6945. <field> <name>LCK14</name>
  6946. <description>Port x lock bit y (y=
  6947. 0..15)</description>
  6948. <bitOffset>14</bitOffset>
  6949. <bitWidth>1</bitWidth>
  6950. </field>
  6951. <field> <name>LCK13</name>
  6952. <description>Port x lock bit y (y=
  6953. 0..15)</description>
  6954. <bitOffset>13</bitOffset>
  6955. <bitWidth>1</bitWidth>
  6956. </field>
  6957. <field> <name>LCK12</name>
  6958. <description>Port x lock bit y (y=
  6959. 0..15)</description>
  6960. <bitOffset>12</bitOffset>
  6961. <bitWidth>1</bitWidth>
  6962. </field>
  6963. <field> <name>LCK11</name>
  6964. <description>Port x lock bit y (y=
  6965. 0..15)</description>
  6966. <bitOffset>11</bitOffset>
  6967. <bitWidth>1</bitWidth>
  6968. </field>
  6969. <field> <name>LCK10</name>
  6970. <description>Port x lock bit y (y=
  6971. 0..15)</description>
  6972. <bitOffset>10</bitOffset>
  6973. <bitWidth>1</bitWidth>
  6974. </field>
  6975. <field> <name>LCK9</name>
  6976. <description>Port x lock bit y (y=
  6977. 0..15)</description>
  6978. <bitOffset>9</bitOffset>
  6979. <bitWidth>1</bitWidth>
  6980. </field>
  6981. <field> <name>LCK8</name>
  6982. <description>Port x lock bit y (y=
  6983. 0..15)</description>
  6984. <bitOffset>8</bitOffset>
  6985. <bitWidth>1</bitWidth>
  6986. </field>
  6987. <field> <name>LCK7</name>
  6988. <description>Port x lock bit y (y=
  6989. 0..15)</description>
  6990. <bitOffset>7</bitOffset>
  6991. <bitWidth>1</bitWidth>
  6992. </field>
  6993. <field> <name>LCK6</name>
  6994. <description>Port x lock bit y (y=
  6995. 0..15)</description>
  6996. <bitOffset>6</bitOffset>
  6997. <bitWidth>1</bitWidth>
  6998. </field>
  6999. <field> <name>LCK5</name>
  7000. <description>Port x lock bit y (y=
  7001. 0..15)</description>
  7002. <bitOffset>5</bitOffset>
  7003. <bitWidth>1</bitWidth>
  7004. </field>
  7005. <field> <name>LCK4</name>
  7006. <description>Port x lock bit y (y=
  7007. 0..15)</description>
  7008. <bitOffset>4</bitOffset>
  7009. <bitWidth>1</bitWidth>
  7010. </field>
  7011. <field> <name>LCK3</name>
  7012. <description>Port x lock bit y (y=
  7013. 0..15)</description>
  7014. <bitOffset>3</bitOffset>
  7015. <bitWidth>1</bitWidth>
  7016. </field>
  7017. <field> <name>LCK2</name>
  7018. <description>Port x lock bit y (y=
  7019. 0..15)</description>
  7020. <bitOffset>2</bitOffset>
  7021. <bitWidth>1</bitWidth>
  7022. </field>
  7023. <field> <name>LCK1</name>
  7024. <description>Port x lock bit y (y=
  7025. 0..15)</description>
  7026. <bitOffset>1</bitOffset>
  7027. <bitWidth>1</bitWidth>
  7028. </field>
  7029. <field> <name>LCK0</name>
  7030. <description>Port x lock bit y (y=
  7031. 0..15)</description>
  7032. <bitOffset>0</bitOffset>
  7033. <bitWidth>1</bitWidth>
  7034. </field>
  7035. </fields>
  7036. </register>
  7037. <register> <name>AFRL</name>
  7038. <displayName>AFRL</displayName>
  7039. <description>GPIO alternate function low
  7040. register</description>
  7041. <addressOffset>0x20</addressOffset>
  7042. <size>0x20</size>
  7043. <access>read-write</access>
  7044. <resetValue>0x00000000</resetValue>
  7045. <fields>
  7046. <field> <name>AFRL7</name>
  7047. <description>Alternate function selection for port x
  7048. bit y (y = 0..7)</description>
  7049. <bitOffset>28</bitOffset>
  7050. <bitWidth>4</bitWidth>
  7051. </field>
  7052. <field> <name>AFRL6</name>
  7053. <description>Alternate function selection for port x
  7054. bit y (y = 0..7)</description>
  7055. <bitOffset>24</bitOffset>
  7056. <bitWidth>4</bitWidth>
  7057. </field>
  7058. <field> <name>AFRL5</name>
  7059. <description>Alternate function selection for port x
  7060. bit y (y = 0..7)</description>
  7061. <bitOffset>20</bitOffset>
  7062. <bitWidth>4</bitWidth>
  7063. </field>
  7064. <field> <name>AFRL4</name>
  7065. <description>Alternate function selection for port x
  7066. bit y (y = 0..7)</description>
  7067. <bitOffset>16</bitOffset>
  7068. <bitWidth>4</bitWidth>
  7069. </field>
  7070. <field> <name>AFRL3</name>
  7071. <description>Alternate function selection for port x
  7072. bit y (y = 0..7)</description>
  7073. <bitOffset>12</bitOffset>
  7074. <bitWidth>4</bitWidth>
  7075. </field>
  7076. <field> <name>AFRL2</name>
  7077. <description>Alternate function selection for port x
  7078. bit y (y = 0..7)</description>
  7079. <bitOffset>8</bitOffset>
  7080. <bitWidth>4</bitWidth>
  7081. </field>
  7082. <field> <name>AFRL1</name>
  7083. <description>Alternate function selection for port x
  7084. bit y (y = 0..7)</description>
  7085. <bitOffset>4</bitOffset>
  7086. <bitWidth>4</bitWidth>
  7087. </field>
  7088. <field> <name>AFRL0</name>
  7089. <description>Alternate function selection for port x
  7090. bit y (y = 0..7)</description>
  7091. <bitOffset>0</bitOffset>
  7092. <bitWidth>4</bitWidth>
  7093. </field>
  7094. </fields>
  7095. </register>
  7096. <register> <name>AFRH</name>
  7097. <displayName>AFRH</displayName>
  7098. <description>GPIO alternate function high
  7099. register</description>
  7100. <addressOffset>0x24</addressOffset>
  7101. <size>0x20</size>
  7102. <access>read-write</access>
  7103. <resetValue>0x00000000</resetValue>
  7104. <fields>
  7105. <field> <name>AFRH15</name>
  7106. <description>Alternate function selection for port x
  7107. bit y (y = 8..15)</description>
  7108. <bitOffset>28</bitOffset>
  7109. <bitWidth>4</bitWidth>
  7110. </field>
  7111. <field> <name>AFRH14</name>
  7112. <description>Alternate function selection for port x
  7113. bit y (y = 8..15)</description>
  7114. <bitOffset>24</bitOffset>
  7115. <bitWidth>4</bitWidth>
  7116. </field>
  7117. <field> <name>AFRH13</name>
  7118. <description>Alternate function selection for port x
  7119. bit y (y = 8..15)</description>
  7120. <bitOffset>20</bitOffset>
  7121. <bitWidth>4</bitWidth>
  7122. </field>
  7123. <field> <name>AFRH12</name>
  7124. <description>Alternate function selection for port x
  7125. bit y (y = 8..15)</description>
  7126. <bitOffset>16</bitOffset>
  7127. <bitWidth>4</bitWidth>
  7128. </field>
  7129. <field> <name>AFRH11</name>
  7130. <description>Alternate function selection for port x
  7131. bit y (y = 8..15)</description>
  7132. <bitOffset>12</bitOffset>
  7133. <bitWidth>4</bitWidth>
  7134. </field>
  7135. <field> <name>AFRH10</name>
  7136. <description>Alternate function selection for port x
  7137. bit y (y = 8..15)</description>
  7138. <bitOffset>8</bitOffset>
  7139. <bitWidth>4</bitWidth>
  7140. </field>
  7141. <field> <name>AFRH9</name>
  7142. <description>Alternate function selection for port x
  7143. bit y (y = 8..15)</description>
  7144. <bitOffset>4</bitOffset>
  7145. <bitWidth>4</bitWidth>
  7146. </field>
  7147. <field> <name>AFRH8</name>
  7148. <description>Alternate function selection for port x
  7149. bit y (y = 8..15)</description>
  7150. <bitOffset>0</bitOffset>
  7151. <bitWidth>4</bitWidth>
  7152. </field>
  7153. </fields>
  7154. </register>
  7155. </registers>
  7156. </peripheral>
  7157. <peripheral derivedFrom="GPIOI"> <name>GPIOH</name>
  7158. <baseAddress>0x40021C00</baseAddress>
  7159. </peripheral>
  7160. <peripheral derivedFrom="GPIOI"> <name>GPIOG</name>
  7161. <baseAddress>0x40021800</baseAddress>
  7162. </peripheral>
  7163. <peripheral derivedFrom="GPIOI"> <name>GPIOF</name>
  7164. <baseAddress>0x40021400</baseAddress>
  7165. </peripheral>
  7166. <peripheral derivedFrom="GPIOI"> <name>GPIOE</name>
  7167. <baseAddress>0x40021000</baseAddress>
  7168. </peripheral>
  7169. <peripheral derivedFrom="GPIOI"> <name>GPIOD</name>
  7170. <baseAddress>0X40020C00</baseAddress>
  7171. </peripheral>
  7172. <peripheral derivedFrom="GPIOI"> <name>GPIOC</name>
  7173. <baseAddress>0x40020800</baseAddress>
  7174. </peripheral>
  7175. <peripheral> <name>GPIOB</name>
  7176. <description>General-purpose I/Os</description>
  7177. <groupName>GPIO</groupName>
  7178. <baseAddress>0x40020400</baseAddress>
  7179. <addressBlock>
  7180. <offset>0x0</offset>
  7181. <size>0x400</size>
  7182. <usage>registers</usage>
  7183. </addressBlock>
  7184. <registers>
  7185. <register> <name>MODER</name>
  7186. <displayName>MODER</displayName>
  7187. <description>GPIO port mode register</description>
  7188. <addressOffset>0x0</addressOffset>
  7189. <size>0x20</size>
  7190. <access>read-write</access>
  7191. <resetValue>0x00000280</resetValue>
  7192. <fields>
  7193. <field> <name>MODER15</name>
  7194. <description>Port x configuration bits (y =
  7195. 0..15)</description>
  7196. <bitOffset>30</bitOffset>
  7197. <bitWidth>2</bitWidth>
  7198. </field>
  7199. <field> <name>MODER14</name>
  7200. <description>Port x configuration bits (y =
  7201. 0..15)</description>
  7202. <bitOffset>28</bitOffset>
  7203. <bitWidth>2</bitWidth>
  7204. </field>
  7205. <field> <name>MODER13</name>
  7206. <description>Port x configuration bits (y =
  7207. 0..15)</description>
  7208. <bitOffset>26</bitOffset>
  7209. <bitWidth>2</bitWidth>
  7210. </field>
  7211. <field> <name>MODER12</name>
  7212. <description>Port x configuration bits (y =
  7213. 0..15)</description>
  7214. <bitOffset>24</bitOffset>
  7215. <bitWidth>2</bitWidth>
  7216. </field>
  7217. <field> <name>MODER11</name>
  7218. <description>Port x configuration bits (y =
  7219. 0..15)</description>
  7220. <bitOffset>22</bitOffset>
  7221. <bitWidth>2</bitWidth>
  7222. </field>
  7223. <field> <name>MODER10</name>
  7224. <description>Port x configuration bits (y =
  7225. 0..15)</description>
  7226. <bitOffset>20</bitOffset>
  7227. <bitWidth>2</bitWidth>
  7228. </field>
  7229. <field> <name>MODER9</name>
  7230. <description>Port x configuration bits (y =
  7231. 0..15)</description>
  7232. <bitOffset>18</bitOffset>
  7233. <bitWidth>2</bitWidth>
  7234. </field>
  7235. <field> <name>MODER8</name>
  7236. <description>Port x configuration bits (y =
  7237. 0..15)</description>
  7238. <bitOffset>16</bitOffset>
  7239. <bitWidth>2</bitWidth>
  7240. </field>
  7241. <field> <name>MODER7</name>
  7242. <description>Port x configuration bits (y =
  7243. 0..15)</description>
  7244. <bitOffset>14</bitOffset>
  7245. <bitWidth>2</bitWidth>
  7246. </field>
  7247. <field> <name>MODER6</name>
  7248. <description>Port x configuration bits (y =
  7249. 0..15)</description>
  7250. <bitOffset>12</bitOffset>
  7251. <bitWidth>2</bitWidth>
  7252. </field>
  7253. <field> <name>MODER5</name>
  7254. <description>Port x configuration bits (y =
  7255. 0..15)</description>
  7256. <bitOffset>10</bitOffset>
  7257. <bitWidth>2</bitWidth>
  7258. </field>
  7259. <field> <name>MODER4</name>
  7260. <description>Port x configuration bits (y =
  7261. 0..15)</description>
  7262. <bitOffset>8</bitOffset>
  7263. <bitWidth>2</bitWidth>
  7264. </field>
  7265. <field> <name>MODER3</name>
  7266. <description>Port x configuration bits (y =
  7267. 0..15)</description>
  7268. <bitOffset>6</bitOffset>
  7269. <bitWidth>2</bitWidth>
  7270. </field>
  7271. <field> <name>MODER2</name>
  7272. <description>Port x configuration bits (y =
  7273. 0..15)</description>
  7274. <bitOffset>4</bitOffset>
  7275. <bitWidth>2</bitWidth>
  7276. </field>
  7277. <field> <name>MODER1</name>
  7278. <description>Port x configuration bits (y =
  7279. 0..15)</description>
  7280. <bitOffset>2</bitOffset>
  7281. <bitWidth>2</bitWidth>
  7282. </field>
  7283. <field> <name>MODER0</name>
  7284. <description>Port x configuration bits (y =
  7285. 0..15)</description>
  7286. <bitOffset>0</bitOffset>
  7287. <bitWidth>2</bitWidth>
  7288. </field>
  7289. </fields>
  7290. </register>
  7291. <register> <name>OTYPER</name>
  7292. <displayName>OTYPER</displayName>
  7293. <description>GPIO port output type register</description>
  7294. <addressOffset>0x4</addressOffset>
  7295. <size>0x20</size>
  7296. <access>read-write</access>
  7297. <resetValue>0x00000000</resetValue>
  7298. <fields>
  7299. <field> <name>OT15</name>
  7300. <description>Port x configuration bits (y =
  7301. 0..15)</description>
  7302. <bitOffset>15</bitOffset>
  7303. <bitWidth>1</bitWidth>
  7304. </field>
  7305. <field> <name>OT14</name>
  7306. <description>Port x configuration bits (y =
  7307. 0..15)</description>
  7308. <bitOffset>14</bitOffset>
  7309. <bitWidth>1</bitWidth>
  7310. </field>
  7311. <field> <name>OT13</name>
  7312. <description>Port x configuration bits (y =
  7313. 0..15)</description>
  7314. <bitOffset>13</bitOffset>
  7315. <bitWidth>1</bitWidth>
  7316. </field>
  7317. <field> <name>OT12</name>
  7318. <description>Port x configuration bits (y =
  7319. 0..15)</description>
  7320. <bitOffset>12</bitOffset>
  7321. <bitWidth>1</bitWidth>
  7322. </field>
  7323. <field> <name>OT11</name>
  7324. <description>Port x configuration bits (y =
  7325. 0..15)</description>
  7326. <bitOffset>11</bitOffset>
  7327. <bitWidth>1</bitWidth>
  7328. </field>
  7329. <field> <name>OT10</name>
  7330. <description>Port x configuration bits (y =
  7331. 0..15)</description>
  7332. <bitOffset>10</bitOffset>
  7333. <bitWidth>1</bitWidth>
  7334. </field>
  7335. <field> <name>OT9</name>
  7336. <description>Port x configuration bits (y =
  7337. 0..15)</description>
  7338. <bitOffset>9</bitOffset>
  7339. <bitWidth>1</bitWidth>
  7340. </field>
  7341. <field> <name>OT8</name>
  7342. <description>Port x configuration bits (y =
  7343. 0..15)</description>
  7344. <bitOffset>8</bitOffset>
  7345. <bitWidth>1</bitWidth>
  7346. </field>
  7347. <field> <name>OT7</name>
  7348. <description>Port x configuration bits (y =
  7349. 0..15)</description>
  7350. <bitOffset>7</bitOffset>
  7351. <bitWidth>1</bitWidth>
  7352. </field>
  7353. <field> <name>OT6</name>
  7354. <description>Port x configuration bits (y =
  7355. 0..15)</description>
  7356. <bitOffset>6</bitOffset>
  7357. <bitWidth>1</bitWidth>
  7358. </field>
  7359. <field> <name>OT5</name>
  7360. <description>Port x configuration bits (y =
  7361. 0..15)</description>
  7362. <bitOffset>5</bitOffset>
  7363. <bitWidth>1</bitWidth>
  7364. </field>
  7365. <field> <name>OT4</name>
  7366. <description>Port x configuration bits (y =
  7367. 0..15)</description>
  7368. <bitOffset>4</bitOffset>
  7369. <bitWidth>1</bitWidth>
  7370. </field>
  7371. <field> <name>OT3</name>
  7372. <description>Port x configuration bits (y =
  7373. 0..15)</description>
  7374. <bitOffset>3</bitOffset>
  7375. <bitWidth>1</bitWidth>
  7376. </field>
  7377. <field> <name>OT2</name>
  7378. <description>Port x configuration bits (y =
  7379. 0..15)</description>
  7380. <bitOffset>2</bitOffset>
  7381. <bitWidth>1</bitWidth>
  7382. </field>
  7383. <field> <name>OT1</name>
  7384. <description>Port x configuration bits (y =
  7385. 0..15)</description>
  7386. <bitOffset>1</bitOffset>
  7387. <bitWidth>1</bitWidth>
  7388. </field>
  7389. <field> <name>OT0</name>
  7390. <description>Port x configuration bits (y =
  7391. 0..15)</description>
  7392. <bitOffset>0</bitOffset>
  7393. <bitWidth>1</bitWidth>
  7394. </field>
  7395. </fields>
  7396. </register>
  7397. <register> <name>OSPEEDR</name>
  7398. <displayName>OSPEEDR</displayName>
  7399. <description>GPIO port output speed
  7400. register</description>
  7401. <addressOffset>0x8</addressOffset>
  7402. <size>0x20</size>
  7403. <access>read-write</access>
  7404. <resetValue>0x000000C0</resetValue>
  7405. <fields>
  7406. <field> <name>OSPEEDR15</name>
  7407. <description>Port x configuration bits (y =
  7408. 0..15)</description>
  7409. <bitOffset>30</bitOffset>
  7410. <bitWidth>2</bitWidth>
  7411. </field>
  7412. <field> <name>OSPEEDR14</name>
  7413. <description>Port x configuration bits (y =
  7414. 0..15)</description>
  7415. <bitOffset>28</bitOffset>
  7416. <bitWidth>2</bitWidth>
  7417. </field>
  7418. <field> <name>OSPEEDR13</name>
  7419. <description>Port x configuration bits (y =
  7420. 0..15)</description>
  7421. <bitOffset>26</bitOffset>
  7422. <bitWidth>2</bitWidth>
  7423. </field>
  7424. <field> <name>OSPEEDR12</name>
  7425. <description>Port x configuration bits (y =
  7426. 0..15)</description>
  7427. <bitOffset>24</bitOffset>
  7428. <bitWidth>2</bitWidth>
  7429. </field>
  7430. <field> <name>OSPEEDR11</name>
  7431. <description>Port x configuration bits (y =
  7432. 0..15)</description>
  7433. <bitOffset>22</bitOffset>
  7434. <bitWidth>2</bitWidth>
  7435. </field>
  7436. <field> <name>OSPEEDR10</name>
  7437. <description>Port x configuration bits (y =
  7438. 0..15)</description>
  7439. <bitOffset>20</bitOffset>
  7440. <bitWidth>2</bitWidth>
  7441. </field>
  7442. <field> <name>OSPEEDR9</name>
  7443. <description>Port x configuration bits (y =
  7444. 0..15)</description>
  7445. <bitOffset>18</bitOffset>
  7446. <bitWidth>2</bitWidth>
  7447. </field>
  7448. <field> <name>OSPEEDR8</name>
  7449. <description>Port x configuration bits (y =
  7450. 0..15)</description>
  7451. <bitOffset>16</bitOffset>
  7452. <bitWidth>2</bitWidth>
  7453. </field>
  7454. <field> <name>OSPEEDR7</name>
  7455. <description>Port x configuration bits (y =
  7456. 0..15)</description>
  7457. <bitOffset>14</bitOffset>
  7458. <bitWidth>2</bitWidth>
  7459. </field>
  7460. <field> <name>OSPEEDR6</name>
  7461. <description>Port x configuration bits (y =
  7462. 0..15)</description>
  7463. <bitOffset>12</bitOffset>
  7464. <bitWidth>2</bitWidth>
  7465. </field>
  7466. <field> <name>OSPEEDR5</name>
  7467. <description>Port x configuration bits (y =
  7468. 0..15)</description>
  7469. <bitOffset>10</bitOffset>
  7470. <bitWidth>2</bitWidth>
  7471. </field>
  7472. <field> <name>OSPEEDR4</name>
  7473. <description>Port x configuration bits (y =
  7474. 0..15)</description>
  7475. <bitOffset>8</bitOffset>
  7476. <bitWidth>2</bitWidth>
  7477. </field>
  7478. <field> <name>OSPEEDR3</name>
  7479. <description>Port x configuration bits (y =
  7480. 0..15)</description>
  7481. <bitOffset>6</bitOffset>
  7482. <bitWidth>2</bitWidth>
  7483. </field>
  7484. <field> <name>OSPEEDR2</name>
  7485. <description>Port x configuration bits (y =
  7486. 0..15)</description>
  7487. <bitOffset>4</bitOffset>
  7488. <bitWidth>2</bitWidth>
  7489. </field>
  7490. <field> <name>OSPEEDR1</name>
  7491. <description>Port x configuration bits (y =
  7492. 0..15)</description>
  7493. <bitOffset>2</bitOffset>
  7494. <bitWidth>2</bitWidth>
  7495. </field>
  7496. <field> <name>OSPEEDR0</name>
  7497. <description>Port x configuration bits (y =
  7498. 0..15)</description>
  7499. <bitOffset>0</bitOffset>
  7500. <bitWidth>2</bitWidth>
  7501. </field>
  7502. </fields>
  7503. </register>
  7504. <register> <name>PUPDR</name>
  7505. <displayName>PUPDR</displayName>
  7506. <description>GPIO port pull-up/pull-down
  7507. register</description>
  7508. <addressOffset>0xC</addressOffset>
  7509. <size>0x20</size>
  7510. <access>read-write</access>
  7511. <resetValue>0x00000100</resetValue>
  7512. <fields>
  7513. <field> <name>PUPDR15</name>
  7514. <description>Port x configuration bits (y =
  7515. 0..15)</description>
  7516. <bitOffset>30</bitOffset>
  7517. <bitWidth>2</bitWidth>
  7518. </field>
  7519. <field> <name>PUPDR14</name>
  7520. <description>Port x configuration bits (y =
  7521. 0..15)</description>
  7522. <bitOffset>28</bitOffset>
  7523. <bitWidth>2</bitWidth>
  7524. </field>
  7525. <field> <name>PUPDR13</name>
  7526. <description>Port x configuration bits (y =
  7527. 0..15)</description>
  7528. <bitOffset>26</bitOffset>
  7529. <bitWidth>2</bitWidth>
  7530. </field>
  7531. <field> <name>PUPDR12</name>
  7532. <description>Port x configuration bits (y =
  7533. 0..15)</description>
  7534. <bitOffset>24</bitOffset>
  7535. <bitWidth>2</bitWidth>
  7536. </field>
  7537. <field> <name>PUPDR11</name>
  7538. <description>Port x configuration bits (y =
  7539. 0..15)</description>
  7540. <bitOffset>22</bitOffset>
  7541. <bitWidth>2</bitWidth>
  7542. </field>
  7543. <field> <name>PUPDR10</name>
  7544. <description>Port x configuration bits (y =
  7545. 0..15)</description>
  7546. <bitOffset>20</bitOffset>
  7547. <bitWidth>2</bitWidth>
  7548. </field>
  7549. <field> <name>PUPDR9</name>
  7550. <description>Port x configuration bits (y =
  7551. 0..15)</description>
  7552. <bitOffset>18</bitOffset>
  7553. <bitWidth>2</bitWidth>
  7554. </field>
  7555. <field> <name>PUPDR8</name>
  7556. <description>Port x configuration bits (y =
  7557. 0..15)</description>
  7558. <bitOffset>16</bitOffset>
  7559. <bitWidth>2</bitWidth>
  7560. </field>
  7561. <field> <name>PUPDR7</name>
  7562. <description>Port x configuration bits (y =
  7563. 0..15)</description>
  7564. <bitOffset>14</bitOffset>
  7565. <bitWidth>2</bitWidth>
  7566. </field>
  7567. <field> <name>PUPDR6</name>
  7568. <description>Port x configuration bits (y =
  7569. 0..15)</description>
  7570. <bitOffset>12</bitOffset>
  7571. <bitWidth>2</bitWidth>
  7572. </field>
  7573. <field> <name>PUPDR5</name>
  7574. <description>Port x configuration bits (y =
  7575. 0..15)</description>
  7576. <bitOffset>10</bitOffset>
  7577. <bitWidth>2</bitWidth>
  7578. </field>
  7579. <field> <name>PUPDR4</name>
  7580. <description>Port x configuration bits (y =
  7581. 0..15)</description>
  7582. <bitOffset>8</bitOffset>
  7583. <bitWidth>2</bitWidth>
  7584. </field>
  7585. <field> <name>PUPDR3</name>
  7586. <description>Port x configuration bits (y =
  7587. 0..15)</description>
  7588. <bitOffset>6</bitOffset>
  7589. <bitWidth>2</bitWidth>
  7590. </field>
  7591. <field> <name>PUPDR2</name>
  7592. <description>Port x configuration bits (y =
  7593. 0..15)</description>
  7594. <bitOffset>4</bitOffset>
  7595. <bitWidth>2</bitWidth>
  7596. </field>
  7597. <field> <name>PUPDR1</name>
  7598. <description>Port x configuration bits (y =
  7599. 0..15)</description>
  7600. <bitOffset>2</bitOffset>
  7601. <bitWidth>2</bitWidth>
  7602. </field>
  7603. <field> <name>PUPDR0</name>
  7604. <description>Port x configuration bits (y =
  7605. 0..15)</description>
  7606. <bitOffset>0</bitOffset>
  7607. <bitWidth>2</bitWidth>
  7608. </field>
  7609. </fields>
  7610. </register>
  7611. <register> <name>IDR</name>
  7612. <displayName>IDR</displayName>
  7613. <description>GPIO port input data register</description>
  7614. <addressOffset>0x10</addressOffset>
  7615. <size>0x20</size>
  7616. <access>read-only</access>
  7617. <resetValue>0x00000000</resetValue>
  7618. <fields>
  7619. <field> <name>IDR15</name>
  7620. <description>Port input data (y =
  7621. 0..15)</description>
  7622. <bitOffset>15</bitOffset>
  7623. <bitWidth>1</bitWidth>
  7624. </field>
  7625. <field> <name>IDR14</name>
  7626. <description>Port input data (y =
  7627. 0..15)</description>
  7628. <bitOffset>14</bitOffset>
  7629. <bitWidth>1</bitWidth>
  7630. </field>
  7631. <field> <name>IDR13</name>
  7632. <description>Port input data (y =
  7633. 0..15)</description>
  7634. <bitOffset>13</bitOffset>
  7635. <bitWidth>1</bitWidth>
  7636. </field>
  7637. <field> <name>IDR12</name>
  7638. <description>Port input data (y =
  7639. 0..15)</description>
  7640. <bitOffset>12</bitOffset>
  7641. <bitWidth>1</bitWidth>
  7642. </field>
  7643. <field> <name>IDR11</name>
  7644. <description>Port input data (y =
  7645. 0..15)</description>
  7646. <bitOffset>11</bitOffset>
  7647. <bitWidth>1</bitWidth>
  7648. </field>
  7649. <field> <name>IDR10</name>
  7650. <description>Port input data (y =
  7651. 0..15)</description>
  7652. <bitOffset>10</bitOffset>
  7653. <bitWidth>1</bitWidth>
  7654. </field>
  7655. <field> <name>IDR9</name>
  7656. <description>Port input data (y =
  7657. 0..15)</description>
  7658. <bitOffset>9</bitOffset>
  7659. <bitWidth>1</bitWidth>
  7660. </field>
  7661. <field> <name>IDR8</name>
  7662. <description>Port input data (y =
  7663. 0..15)</description>
  7664. <bitOffset>8</bitOffset>
  7665. <bitWidth>1</bitWidth>
  7666. </field>
  7667. <field> <name>IDR7</name>
  7668. <description>Port input data (y =
  7669. 0..15)</description>
  7670. <bitOffset>7</bitOffset>
  7671. <bitWidth>1</bitWidth>
  7672. </field>
  7673. <field> <name>IDR6</name>
  7674. <description>Port input data (y =
  7675. 0..15)</description>
  7676. <bitOffset>6</bitOffset>
  7677. <bitWidth>1</bitWidth>
  7678. </field>
  7679. <field> <name>IDR5</name>
  7680. <description>Port input data (y =
  7681. 0..15)</description>
  7682. <bitOffset>5</bitOffset>
  7683. <bitWidth>1</bitWidth>
  7684. </field>
  7685. <field> <name>IDR4</name>
  7686. <description>Port input data (y =
  7687. 0..15)</description>
  7688. <bitOffset>4</bitOffset>
  7689. <bitWidth>1</bitWidth>
  7690. </field>
  7691. <field> <name>IDR3</name>
  7692. <description>Port input data (y =
  7693. 0..15)</description>
  7694. <bitOffset>3</bitOffset>
  7695. <bitWidth>1</bitWidth>
  7696. </field>
  7697. <field> <name>IDR2</name>
  7698. <description>Port input data (y =
  7699. 0..15)</description>
  7700. <bitOffset>2</bitOffset>
  7701. <bitWidth>1</bitWidth>
  7702. </field>
  7703. <field> <name>IDR1</name>
  7704. <description>Port input data (y =
  7705. 0..15)</description>
  7706. <bitOffset>1</bitOffset>
  7707. <bitWidth>1</bitWidth>
  7708. </field>
  7709. <field> <name>IDR0</name>
  7710. <description>Port input data (y =
  7711. 0..15)</description>
  7712. <bitOffset>0</bitOffset>
  7713. <bitWidth>1</bitWidth>
  7714. </field>
  7715. </fields>
  7716. </register>
  7717. <register> <name>ODR</name>
  7718. <displayName>ODR</displayName>
  7719. <description>GPIO port output data register</description>
  7720. <addressOffset>0x14</addressOffset>
  7721. <size>0x20</size>
  7722. <access>read-write</access>
  7723. <resetValue>0x00000000</resetValue>
  7724. <fields>
  7725. <field> <name>ODR15</name>
  7726. <description>Port output data (y =
  7727. 0..15)</description>
  7728. <bitOffset>15</bitOffset>
  7729. <bitWidth>1</bitWidth>
  7730. </field>
  7731. <field> <name>ODR14</name>
  7732. <description>Port output data (y =
  7733. 0..15)</description>
  7734. <bitOffset>14</bitOffset>
  7735. <bitWidth>1</bitWidth>
  7736. </field>
  7737. <field> <name>ODR13</name>
  7738. <description>Port output data (y =
  7739. 0..15)</description>
  7740. <bitOffset>13</bitOffset>
  7741. <bitWidth>1</bitWidth>
  7742. </field>
  7743. <field> <name>ODR12</name>
  7744. <description>Port output data (y =
  7745. 0..15)</description>
  7746. <bitOffset>12</bitOffset>
  7747. <bitWidth>1</bitWidth>
  7748. </field>
  7749. <field> <name>ODR11</name>
  7750. <description>Port output data (y =
  7751. 0..15)</description>
  7752. <bitOffset>11</bitOffset>
  7753. <bitWidth>1</bitWidth>
  7754. </field>
  7755. <field> <name>ODR10</name>
  7756. <description>Port output data (y =
  7757. 0..15)</description>
  7758. <bitOffset>10</bitOffset>
  7759. <bitWidth>1</bitWidth>
  7760. </field>
  7761. <field> <name>ODR9</name>
  7762. <description>Port output data (y =
  7763. 0..15)</description>
  7764. <bitOffset>9</bitOffset>
  7765. <bitWidth>1</bitWidth>
  7766. </field>
  7767. <field> <name>ODR8</name>
  7768. <description>Port output data (y =
  7769. 0..15)</description>
  7770. <bitOffset>8</bitOffset>
  7771. <bitWidth>1</bitWidth>
  7772. </field>
  7773. <field> <name>ODR7</name>
  7774. <description>Port output data (y =
  7775. 0..15)</description>
  7776. <bitOffset>7</bitOffset>
  7777. <bitWidth>1</bitWidth>
  7778. </field>
  7779. <field> <name>ODR6</name>
  7780. <description>Port output data (y =
  7781. 0..15)</description>
  7782. <bitOffset>6</bitOffset>
  7783. <bitWidth>1</bitWidth>
  7784. </field>
  7785. <field> <name>ODR5</name>
  7786. <description>Port output data (y =
  7787. 0..15)</description>
  7788. <bitOffset>5</bitOffset>
  7789. <bitWidth>1</bitWidth>
  7790. </field>
  7791. <field> <name>ODR4</name>
  7792. <description>Port output data (y =
  7793. 0..15)</description>
  7794. <bitOffset>4</bitOffset>
  7795. <bitWidth>1</bitWidth>
  7796. </field>
  7797. <field> <name>ODR3</name>
  7798. <description>Port output data (y =
  7799. 0..15)</description>
  7800. <bitOffset>3</bitOffset>
  7801. <bitWidth>1</bitWidth>
  7802. </field>
  7803. <field> <name>ODR2</name>
  7804. <description>Port output data (y =
  7805. 0..15)</description>
  7806. <bitOffset>2</bitOffset>
  7807. <bitWidth>1</bitWidth>
  7808. </field>
  7809. <field> <name>ODR1</name>
  7810. <description>Port output data (y =
  7811. 0..15)</description>
  7812. <bitOffset>1</bitOffset>
  7813. <bitWidth>1</bitWidth>
  7814. </field>
  7815. <field> <name>ODR0</name>
  7816. <description>Port output data (y =
  7817. 0..15)</description>
  7818. <bitOffset>0</bitOffset>
  7819. <bitWidth>1</bitWidth>
  7820. </field>
  7821. </fields>
  7822. </register>
  7823. <register> <name>BSRR</name>
  7824. <displayName>BSRR</displayName>
  7825. <description>GPIO port bit set/reset
  7826. register</description>
  7827. <addressOffset>0x18</addressOffset>
  7828. <size>0x20</size>
  7829. <access>write-only</access>
  7830. <resetValue>0x00000000</resetValue>
  7831. <fields>
  7832. <field> <name>BR15</name>
  7833. <description>Port x reset bit y (y =
  7834. 0..15)</description>
  7835. <bitOffset>31</bitOffset>
  7836. <bitWidth>1</bitWidth>
  7837. </field>
  7838. <field> <name>BR14</name>
  7839. <description>Port x reset bit y (y =
  7840. 0..15)</description>
  7841. <bitOffset>30</bitOffset>
  7842. <bitWidth>1</bitWidth>
  7843. </field>
  7844. <field> <name>BR13</name>
  7845. <description>Port x reset bit y (y =
  7846. 0..15)</description>
  7847. <bitOffset>29</bitOffset>
  7848. <bitWidth>1</bitWidth>
  7849. </field>
  7850. <field> <name>BR12</name>
  7851. <description>Port x reset bit y (y =
  7852. 0..15)</description>
  7853. <bitOffset>28</bitOffset>
  7854. <bitWidth>1</bitWidth>
  7855. </field>
  7856. <field> <name>BR11</name>
  7857. <description>Port x reset bit y (y =
  7858. 0..15)</description>
  7859. <bitOffset>27</bitOffset>
  7860. <bitWidth>1</bitWidth>
  7861. </field>
  7862. <field> <name>BR10</name>
  7863. <description>Port x reset bit y (y =
  7864. 0..15)</description>
  7865. <bitOffset>26</bitOffset>
  7866. <bitWidth>1</bitWidth>
  7867. </field>
  7868. <field> <name>BR9</name>
  7869. <description>Port x reset bit y (y =
  7870. 0..15)</description>
  7871. <bitOffset>25</bitOffset>
  7872. <bitWidth>1</bitWidth>
  7873. </field>
  7874. <field> <name>BR8</name>
  7875. <description>Port x reset bit y (y =
  7876. 0..15)</description>
  7877. <bitOffset>24</bitOffset>
  7878. <bitWidth>1</bitWidth>
  7879. </field>
  7880. <field> <name>BR7</name>
  7881. <description>Port x reset bit y (y =
  7882. 0..15)</description>
  7883. <bitOffset>23</bitOffset>
  7884. <bitWidth>1</bitWidth>
  7885. </field>
  7886. <field> <name>BR6</name>
  7887. <description>Port x reset bit y (y =
  7888. 0..15)</description>
  7889. <bitOffset>22</bitOffset>
  7890. <bitWidth>1</bitWidth>
  7891. </field>
  7892. <field> <name>BR5</name>
  7893. <description>Port x reset bit y (y =
  7894. 0..15)</description>
  7895. <bitOffset>21</bitOffset>
  7896. <bitWidth>1</bitWidth>
  7897. </field>
  7898. <field> <name>BR4</name>
  7899. <description>Port x reset bit y (y =
  7900. 0..15)</description>
  7901. <bitOffset>20</bitOffset>
  7902. <bitWidth>1</bitWidth>
  7903. </field>
  7904. <field> <name>BR3</name>
  7905. <description>Port x reset bit y (y =
  7906. 0..15)</description>
  7907. <bitOffset>19</bitOffset>
  7908. <bitWidth>1</bitWidth>
  7909. </field>
  7910. <field> <name>BR2</name>
  7911. <description>Port x reset bit y (y =
  7912. 0..15)</description>
  7913. <bitOffset>18</bitOffset>
  7914. <bitWidth>1</bitWidth>
  7915. </field>
  7916. <field> <name>BR1</name>
  7917. <description>Port x reset bit y (y =
  7918. 0..15)</description>
  7919. <bitOffset>17</bitOffset>
  7920. <bitWidth>1</bitWidth>
  7921. </field>
  7922. <field> <name>BR0</name>
  7923. <description>Port x set bit y (y=
  7924. 0..15)</description>
  7925. <bitOffset>16</bitOffset>
  7926. <bitWidth>1</bitWidth>
  7927. </field>
  7928. <field> <name>BS15</name>
  7929. <description>Port x set bit y (y=
  7930. 0..15)</description>
  7931. <bitOffset>15</bitOffset>
  7932. <bitWidth>1</bitWidth>
  7933. </field>
  7934. <field> <name>BS14</name>
  7935. <description>Port x set bit y (y=
  7936. 0..15)</description>
  7937. <bitOffset>14</bitOffset>
  7938. <bitWidth>1</bitWidth>
  7939. </field>
  7940. <field> <name>BS13</name>
  7941. <description>Port x set bit y (y=
  7942. 0..15)</description>
  7943. <bitOffset>13</bitOffset>
  7944. <bitWidth>1</bitWidth>
  7945. </field>
  7946. <field> <name>BS12</name>
  7947. <description>Port x set bit y (y=
  7948. 0..15)</description>
  7949. <bitOffset>12</bitOffset>
  7950. <bitWidth>1</bitWidth>
  7951. </field>
  7952. <field> <name>BS11</name>
  7953. <description>Port x set bit y (y=
  7954. 0..15)</description>
  7955. <bitOffset>11</bitOffset>
  7956. <bitWidth>1</bitWidth>
  7957. </field>
  7958. <field> <name>BS10</name>
  7959. <description>Port x set bit y (y=
  7960. 0..15)</description>
  7961. <bitOffset>10</bitOffset>
  7962. <bitWidth>1</bitWidth>
  7963. </field>
  7964. <field> <name>BS9</name>
  7965. <description>Port x set bit y (y=
  7966. 0..15)</description>
  7967. <bitOffset>9</bitOffset>
  7968. <bitWidth>1</bitWidth>
  7969. </field>
  7970. <field> <name>BS8</name>
  7971. <description>Port x set bit y (y=
  7972. 0..15)</description>
  7973. <bitOffset>8</bitOffset>
  7974. <bitWidth>1</bitWidth>
  7975. </field>
  7976. <field> <name>BS7</name>
  7977. <description>Port x set bit y (y=
  7978. 0..15)</description>
  7979. <bitOffset>7</bitOffset>
  7980. <bitWidth>1</bitWidth>
  7981. </field>
  7982. <field> <name>BS6</name>
  7983. <description>Port x set bit y (y=
  7984. 0..15)</description>
  7985. <bitOffset>6</bitOffset>
  7986. <bitWidth>1</bitWidth>
  7987. </field>
  7988. <field> <name>BS5</name>
  7989. <description>Port x set bit y (y=
  7990. 0..15)</description>
  7991. <bitOffset>5</bitOffset>
  7992. <bitWidth>1</bitWidth>
  7993. </field>
  7994. <field> <name>BS4</name>
  7995. <description>Port x set bit y (y=
  7996. 0..15)</description>
  7997. <bitOffset>4</bitOffset>
  7998. <bitWidth>1</bitWidth>
  7999. </field>
  8000. <field> <name>BS3</name>
  8001. <description>Port x set bit y (y=
  8002. 0..15)</description>
  8003. <bitOffset>3</bitOffset>
  8004. <bitWidth>1</bitWidth>
  8005. </field>
  8006. <field> <name>BS2</name>
  8007. <description>Port x set bit y (y=
  8008. 0..15)</description>
  8009. <bitOffset>2</bitOffset>
  8010. <bitWidth>1</bitWidth>
  8011. </field>
  8012. <field> <name>BS1</name>
  8013. <description>Port x set bit y (y=
  8014. 0..15)</description>
  8015. <bitOffset>1</bitOffset>
  8016. <bitWidth>1</bitWidth>
  8017. </field>
  8018. <field> <name>BS0</name>
  8019. <description>Port x set bit y (y=
  8020. 0..15)</description>
  8021. <bitOffset>0</bitOffset>
  8022. <bitWidth>1</bitWidth>
  8023. </field>
  8024. </fields>
  8025. </register>
  8026. <register> <name>LCKR</name>
  8027. <displayName>LCKR</displayName>
  8028. <description>GPIO port configuration lock
  8029. register</description>
  8030. <addressOffset>0x1C</addressOffset>
  8031. <size>0x20</size>
  8032. <access>read-write</access>
  8033. <resetValue>0x00000000</resetValue>
  8034. <fields>
  8035. <field> <name>LCKK</name>
  8036. <description>Port x lock bit y (y=
  8037. 0..15)</description>
  8038. <bitOffset>16</bitOffset>
  8039. <bitWidth>1</bitWidth>
  8040. </field>
  8041. <field> <name>LCK15</name>
  8042. <description>Port x lock bit y (y=
  8043. 0..15)</description>
  8044. <bitOffset>15</bitOffset>
  8045. <bitWidth>1</bitWidth>
  8046. </field>
  8047. <field> <name>LCK14</name>
  8048. <description>Port x lock bit y (y=
  8049. 0..15)</description>
  8050. <bitOffset>14</bitOffset>
  8051. <bitWidth>1</bitWidth>
  8052. </field>
  8053. <field> <name>LCK13</name>
  8054. <description>Port x lock bit y (y=
  8055. 0..15)</description>
  8056. <bitOffset>13</bitOffset>
  8057. <bitWidth>1</bitWidth>
  8058. </field>
  8059. <field> <name>LCK12</name>
  8060. <description>Port x lock bit y (y=
  8061. 0..15)</description>
  8062. <bitOffset>12</bitOffset>
  8063. <bitWidth>1</bitWidth>
  8064. </field>
  8065. <field> <name>LCK11</name>
  8066. <description>Port x lock bit y (y=
  8067. 0..15)</description>
  8068. <bitOffset>11</bitOffset>
  8069. <bitWidth>1</bitWidth>
  8070. </field>
  8071. <field> <name>LCK10</name>
  8072. <description>Port x lock bit y (y=
  8073. 0..15)</description>
  8074. <bitOffset>10</bitOffset>
  8075. <bitWidth>1</bitWidth>
  8076. </field>
  8077. <field> <name>LCK9</name>
  8078. <description>Port x lock bit y (y=
  8079. 0..15)</description>
  8080. <bitOffset>9</bitOffset>
  8081. <bitWidth>1</bitWidth>
  8082. </field>
  8083. <field> <name>LCK8</name>
  8084. <description>Port x lock bit y (y=
  8085. 0..15)</description>
  8086. <bitOffset>8</bitOffset>
  8087. <bitWidth>1</bitWidth>
  8088. </field>
  8089. <field> <name>LCK7</name>
  8090. <description>Port x lock bit y (y=
  8091. 0..15)</description>
  8092. <bitOffset>7</bitOffset>
  8093. <bitWidth>1</bitWidth>
  8094. </field>
  8095. <field> <name>LCK6</name>
  8096. <description>Port x lock bit y (y=
  8097. 0..15)</description>
  8098. <bitOffset>6</bitOffset>
  8099. <bitWidth>1</bitWidth>
  8100. </field>
  8101. <field> <name>LCK5</name>
  8102. <description>Port x lock bit y (y=
  8103. 0..15)</description>
  8104. <bitOffset>5</bitOffset>
  8105. <bitWidth>1</bitWidth>
  8106. </field>
  8107. <field> <name>LCK4</name>
  8108. <description>Port x lock bit y (y=
  8109. 0..15)</description>
  8110. <bitOffset>4</bitOffset>
  8111. <bitWidth>1</bitWidth>
  8112. </field>
  8113. <field> <name>LCK3</name>
  8114. <description>Port x lock bit y (y=
  8115. 0..15)</description>
  8116. <bitOffset>3</bitOffset>
  8117. <bitWidth>1</bitWidth>
  8118. </field>
  8119. <field> <name>LCK2</name>
  8120. <description>Port x lock bit y (y=
  8121. 0..15)</description>
  8122. <bitOffset>2</bitOffset>
  8123. <bitWidth>1</bitWidth>
  8124. </field>
  8125. <field> <name>LCK1</name>
  8126. <description>Port x lock bit y (y=
  8127. 0..15)</description>
  8128. <bitOffset>1</bitOffset>
  8129. <bitWidth>1</bitWidth>
  8130. </field>
  8131. <field> <name>LCK0</name>
  8132. <description>Port x lock bit y (y=
  8133. 0..15)</description>
  8134. <bitOffset>0</bitOffset>
  8135. <bitWidth>1</bitWidth>
  8136. </field>
  8137. </fields>
  8138. </register>
  8139. <register> <name>AFRL</name>
  8140. <displayName>AFRL</displayName>
  8141. <description>GPIO alternate function low
  8142. register</description>
  8143. <addressOffset>0x20</addressOffset>
  8144. <size>0x20</size>
  8145. <access>read-write</access>
  8146. <resetValue>0x00000000</resetValue>
  8147. <fields>
  8148. <field> <name>AFRL7</name>
  8149. <description>Alternate function selection for port x
  8150. bit y (y = 0..7)</description>
  8151. <bitOffset>28</bitOffset>
  8152. <bitWidth>4</bitWidth>
  8153. </field>
  8154. <field> <name>AFRL6</name>
  8155. <description>Alternate function selection for port x
  8156. bit y (y = 0..7)</description>
  8157. <bitOffset>24</bitOffset>
  8158. <bitWidth>4</bitWidth>
  8159. </field>
  8160. <field> <name>AFRL5</name>
  8161. <description>Alternate function selection for port x
  8162. bit y (y = 0..7)</description>
  8163. <bitOffset>20</bitOffset>
  8164. <bitWidth>4</bitWidth>
  8165. </field>
  8166. <field> <name>AFRL4</name>
  8167. <description>Alternate function selection for port x
  8168. bit y (y = 0..7)</description>
  8169. <bitOffset>16</bitOffset>
  8170. <bitWidth>4</bitWidth>
  8171. </field>
  8172. <field> <name>AFRL3</name>
  8173. <description>Alternate function selection for port x
  8174. bit y (y = 0..7)</description>
  8175. <bitOffset>12</bitOffset>
  8176. <bitWidth>4</bitWidth>
  8177. </field>
  8178. <field> <name>AFRL2</name>
  8179. <description>Alternate function selection for port x
  8180. bit y (y = 0..7)</description>
  8181. <bitOffset>8</bitOffset>
  8182. <bitWidth>4</bitWidth>
  8183. </field>
  8184. <field> <name>AFRL1</name>
  8185. <description>Alternate function selection for port x
  8186. bit y (y = 0..7)</description>
  8187. <bitOffset>4</bitOffset>
  8188. <bitWidth>4</bitWidth>
  8189. </field>
  8190. <field> <name>AFRL0</name>
  8191. <description>Alternate function selection for port x
  8192. bit y (y = 0..7)</description>
  8193. <bitOffset>0</bitOffset>
  8194. <bitWidth>4</bitWidth>
  8195. </field>
  8196. </fields>
  8197. </register>
  8198. <register> <name>AFRH</name>
  8199. <displayName>AFRH</displayName>
  8200. <description>GPIO alternate function high
  8201. register</description>
  8202. <addressOffset>0x24</addressOffset>
  8203. <size>0x20</size>
  8204. <access>read-write</access>
  8205. <resetValue>0x00000000</resetValue>
  8206. <fields>
  8207. <field> <name>AFRH15</name>
  8208. <description>Alternate function selection for port x
  8209. bit y (y = 8..15)</description>
  8210. <bitOffset>28</bitOffset>
  8211. <bitWidth>4</bitWidth>
  8212. </field>
  8213. <field> <name>AFRH14</name>
  8214. <description>Alternate function selection for port x
  8215. bit y (y = 8..15)</description>
  8216. <bitOffset>24</bitOffset>
  8217. <bitWidth>4</bitWidth>
  8218. </field>
  8219. <field> <name>AFRH13</name>
  8220. <description>Alternate function selection for port x
  8221. bit y (y = 8..15)</description>
  8222. <bitOffset>20</bitOffset>
  8223. <bitWidth>4</bitWidth>
  8224. </field>
  8225. <field> <name>AFRH12</name>
  8226. <description>Alternate function selection for port x
  8227. bit y (y = 8..15)</description>
  8228. <bitOffset>16</bitOffset>
  8229. <bitWidth>4</bitWidth>
  8230. </field>
  8231. <field> <name>AFRH11</name>
  8232. <description>Alternate function selection for port x
  8233. bit y (y = 8..15)</description>
  8234. <bitOffset>12</bitOffset>
  8235. <bitWidth>4</bitWidth>
  8236. </field>
  8237. <field> <name>AFRH10</name>
  8238. <description>Alternate function selection for port x
  8239. bit y (y = 8..15)</description>
  8240. <bitOffset>8</bitOffset>
  8241. <bitWidth>4</bitWidth>
  8242. </field>
  8243. <field> <name>AFRH9</name>
  8244. <description>Alternate function selection for port x
  8245. bit y (y = 8..15)</description>
  8246. <bitOffset>4</bitOffset>
  8247. <bitWidth>4</bitWidth>
  8248. </field>
  8249. <field> <name>AFRH8</name>
  8250. <description>Alternate function selection for port x
  8251. bit y (y = 8..15)</description>
  8252. <bitOffset>0</bitOffset>
  8253. <bitWidth>4</bitWidth>
  8254. </field>
  8255. </fields>
  8256. </register>
  8257. </registers>
  8258. </peripheral>
  8259. <peripheral> <name>GPIOA</name>
  8260. <description>General-purpose I/Os</description>
  8261. <groupName>GPIO</groupName>
  8262. <baseAddress>0x40020000</baseAddress>
  8263. <addressBlock>
  8264. <offset>0x0</offset>
  8265. <size>0x400</size>
  8266. <usage>registers</usage>
  8267. </addressBlock>
  8268. <registers>
  8269. <register> <name>MODER</name>
  8270. <displayName>MODER</displayName>
  8271. <description>GPIO port mode register</description>
  8272. <addressOffset>0x0</addressOffset>
  8273. <size>0x20</size>
  8274. <access>read-write</access>
  8275. <resetValue>0xA8000000</resetValue>
  8276. <fields>
  8277. <field> <name>MODER15</name>
  8278. <description>Port x configuration bits (y =
  8279. 0..15)</description>
  8280. <bitOffset>30</bitOffset>
  8281. <bitWidth>2</bitWidth>
  8282. </field>
  8283. <field> <name>MODER14</name>
  8284. <description>Port x configuration bits (y =
  8285. 0..15)</description>
  8286. <bitOffset>28</bitOffset>
  8287. <bitWidth>2</bitWidth>
  8288. </field>
  8289. <field> <name>MODER13</name>
  8290. <description>Port x configuration bits (y =
  8291. 0..15)</description>
  8292. <bitOffset>26</bitOffset>
  8293. <bitWidth>2</bitWidth>
  8294. </field>
  8295. <field> <name>MODER12</name>
  8296. <description>Port x configuration bits (y =
  8297. 0..15)</description>
  8298. <bitOffset>24</bitOffset>
  8299. <bitWidth>2</bitWidth>
  8300. </field>
  8301. <field> <name>MODER11</name>
  8302. <description>Port x configuration bits (y =
  8303. 0..15)</description>
  8304. <bitOffset>22</bitOffset>
  8305. <bitWidth>2</bitWidth>
  8306. </field>
  8307. <field> <name>MODER10</name>
  8308. <description>Port x configuration bits (y =
  8309. 0..15)</description>
  8310. <bitOffset>20</bitOffset>
  8311. <bitWidth>2</bitWidth>
  8312. </field>
  8313. <field> <name>MODER9</name>
  8314. <description>Port x configuration bits (y =
  8315. 0..15)</description>
  8316. <bitOffset>18</bitOffset>
  8317. <bitWidth>2</bitWidth>
  8318. </field>
  8319. <field> <name>MODER8</name>
  8320. <description>Port x configuration bits (y =
  8321. 0..15)</description>
  8322. <bitOffset>16</bitOffset>
  8323. <bitWidth>2</bitWidth>
  8324. </field>
  8325. <field> <name>MODER7</name>
  8326. <description>Port x configuration bits (y =
  8327. 0..15)</description>
  8328. <bitOffset>14</bitOffset>
  8329. <bitWidth>2</bitWidth>
  8330. </field>
  8331. <field> <name>MODER6</name>
  8332. <description>Port x configuration bits (y =
  8333. 0..15)</description>
  8334. <bitOffset>12</bitOffset>
  8335. <bitWidth>2</bitWidth>
  8336. </field>
  8337. <field> <name>MODER5</name>
  8338. <description>Port x configuration bits (y =
  8339. 0..15)</description>
  8340. <bitOffset>10</bitOffset>
  8341. <bitWidth>2</bitWidth>
  8342. </field>
  8343. <field> <name>MODER4</name>
  8344. <description>Port x configuration bits (y =
  8345. 0..15)</description>
  8346. <bitOffset>8</bitOffset>
  8347. <bitWidth>2</bitWidth>
  8348. </field>
  8349. <field> <name>MODER3</name>
  8350. <description>Port x configuration bits (y =
  8351. 0..15)</description>
  8352. <bitOffset>6</bitOffset>
  8353. <bitWidth>2</bitWidth>
  8354. </field>
  8355. <field> <name>MODER2</name>
  8356. <description>Port x configuration bits (y =
  8357. 0..15)</description>
  8358. <bitOffset>4</bitOffset>
  8359. <bitWidth>2</bitWidth>
  8360. </field>
  8361. <field> <name>MODER1</name>
  8362. <description>Port x configuration bits (y =
  8363. 0..15)</description>
  8364. <bitOffset>2</bitOffset>
  8365. <bitWidth>2</bitWidth>
  8366. </field>
  8367. <field> <name>MODER0</name>
  8368. <description>Port x configuration bits (y =
  8369. 0..15)</description>
  8370. <bitOffset>0</bitOffset>
  8371. <bitWidth>2</bitWidth>
  8372. </field>
  8373. </fields>
  8374. </register>
  8375. <register> <name>OTYPER</name>
  8376. <displayName>OTYPER</displayName>
  8377. <description>GPIO port output type register</description>
  8378. <addressOffset>0x4</addressOffset>
  8379. <size>0x20</size>
  8380. <access>read-write</access>
  8381. <resetValue>0x00000000</resetValue>
  8382. <fields>
  8383. <field> <name>OT15</name>
  8384. <description>Port x configuration bits (y =
  8385. 0..15)</description>
  8386. <bitOffset>15</bitOffset>
  8387. <bitWidth>1</bitWidth>
  8388. </field>
  8389. <field> <name>OT14</name>
  8390. <description>Port x configuration bits (y =
  8391. 0..15)</description>
  8392. <bitOffset>14</bitOffset>
  8393. <bitWidth>1</bitWidth>
  8394. </field>
  8395. <field> <name>OT13</name>
  8396. <description>Port x configuration bits (y =
  8397. 0..15)</description>
  8398. <bitOffset>13</bitOffset>
  8399. <bitWidth>1</bitWidth>
  8400. </field>
  8401. <field> <name>OT12</name>
  8402. <description>Port x configuration bits (y =
  8403. 0..15)</description>
  8404. <bitOffset>12</bitOffset>
  8405. <bitWidth>1</bitWidth>
  8406. </field>
  8407. <field> <name>OT11</name>
  8408. <description>Port x configuration bits (y =
  8409. 0..15)</description>
  8410. <bitOffset>11</bitOffset>
  8411. <bitWidth>1</bitWidth>
  8412. </field>
  8413. <field> <name>OT10</name>
  8414. <description>Port x configuration bits (y =
  8415. 0..15)</description>
  8416. <bitOffset>10</bitOffset>
  8417. <bitWidth>1</bitWidth>
  8418. </field>
  8419. <field> <name>OT9</name>
  8420. <description>Port x configuration bits (y =
  8421. 0..15)</description>
  8422. <bitOffset>9</bitOffset>
  8423. <bitWidth>1</bitWidth>
  8424. </field>
  8425. <field> <name>OT8</name>
  8426. <description>Port x configuration bits (y =
  8427. 0..15)</description>
  8428. <bitOffset>8</bitOffset>
  8429. <bitWidth>1</bitWidth>
  8430. </field>
  8431. <field> <name>OT7</name>
  8432. <description>Port x configuration bits (y =
  8433. 0..15)</description>
  8434. <bitOffset>7</bitOffset>
  8435. <bitWidth>1</bitWidth>
  8436. </field>
  8437. <field> <name>OT6</name>
  8438. <description>Port x configuration bits (y =
  8439. 0..15)</description>
  8440. <bitOffset>6</bitOffset>
  8441. <bitWidth>1</bitWidth>
  8442. </field>
  8443. <field> <name>OT5</name>
  8444. <description>Port x configuration bits (y =
  8445. 0..15)</description>
  8446. <bitOffset>5</bitOffset>
  8447. <bitWidth>1</bitWidth>
  8448. </field>
  8449. <field> <name>OT4</name>
  8450. <description>Port x configuration bits (y =
  8451. 0..15)</description>
  8452. <bitOffset>4</bitOffset>
  8453. <bitWidth>1</bitWidth>
  8454. </field>
  8455. <field> <name>OT3</name>
  8456. <description>Port x configuration bits (y =
  8457. 0..15)</description>
  8458. <bitOffset>3</bitOffset>
  8459. <bitWidth>1</bitWidth>
  8460. </field>
  8461. <field> <name>OT2</name>
  8462. <description>Port x configuration bits (y =
  8463. 0..15)</description>
  8464. <bitOffset>2</bitOffset>
  8465. <bitWidth>1</bitWidth>
  8466. </field>
  8467. <field> <name>OT1</name>
  8468. <description>Port x configuration bits (y =
  8469. 0..15)</description>
  8470. <bitOffset>1</bitOffset>
  8471. <bitWidth>1</bitWidth>
  8472. </field>
  8473. <field> <name>OT0</name>
  8474. <description>Port x configuration bits (y =
  8475. 0..15)</description>
  8476. <bitOffset>0</bitOffset>
  8477. <bitWidth>1</bitWidth>
  8478. </field>
  8479. </fields>
  8480. </register>
  8481. <register> <name>OSPEEDR</name>
  8482. <displayName>OSPEEDR</displayName>
  8483. <description>GPIO port output speed
  8484. register</description>
  8485. <addressOffset>0x8</addressOffset>
  8486. <size>0x20</size>
  8487. <access>read-write</access>
  8488. <resetValue>0x00000000</resetValue>
  8489. <fields>
  8490. <field> <name>OSPEEDR15</name>
  8491. <description>Port x configuration bits (y =
  8492. 0..15)</description>
  8493. <bitOffset>30</bitOffset>
  8494. <bitWidth>2</bitWidth>
  8495. </field>
  8496. <field> <name>OSPEEDR14</name>
  8497. <description>Port x configuration bits (y =
  8498. 0..15)</description>
  8499. <bitOffset>28</bitOffset>
  8500. <bitWidth>2</bitWidth>
  8501. </field>
  8502. <field> <name>OSPEEDR13</name>
  8503. <description>Port x configuration bits (y =
  8504. 0..15)</description>
  8505. <bitOffset>26</bitOffset>
  8506. <bitWidth>2</bitWidth>
  8507. </field>
  8508. <field> <name>OSPEEDR12</name>
  8509. <description>Port x configuration bits (y =
  8510. 0..15)</description>
  8511. <bitOffset>24</bitOffset>
  8512. <bitWidth>2</bitWidth>
  8513. </field>
  8514. <field> <name>OSPEEDR11</name>
  8515. <description>Port x configuration bits (y =
  8516. 0..15)</description>
  8517. <bitOffset>22</bitOffset>
  8518. <bitWidth>2</bitWidth>
  8519. </field>
  8520. <field> <name>OSPEEDR10</name>
  8521. <description>Port x configuration bits (y =
  8522. 0..15)</description>
  8523. <bitOffset>20</bitOffset>
  8524. <bitWidth>2</bitWidth>
  8525. </field>
  8526. <field> <name>OSPEEDR9</name>
  8527. <description>Port x configuration bits (y =
  8528. 0..15)</description>
  8529. <bitOffset>18</bitOffset>
  8530. <bitWidth>2</bitWidth>
  8531. </field>
  8532. <field> <name>OSPEEDR8</name>
  8533. <description>Port x configuration bits (y =
  8534. 0..15)</description>
  8535. <bitOffset>16</bitOffset>
  8536. <bitWidth>2</bitWidth>
  8537. </field>
  8538. <field> <name>OSPEEDR7</name>
  8539. <description>Port x configuration bits (y =
  8540. 0..15)</description>
  8541. <bitOffset>14</bitOffset>
  8542. <bitWidth>2</bitWidth>
  8543. </field>
  8544. <field> <name>OSPEEDR6</name>
  8545. <description>Port x configuration bits (y =
  8546. 0..15)</description>
  8547. <bitOffset>12</bitOffset>
  8548. <bitWidth>2</bitWidth>
  8549. </field>
  8550. <field> <name>OSPEEDR5</name>
  8551. <description>Port x configuration bits (y =
  8552. 0..15)</description>
  8553. <bitOffset>10</bitOffset>
  8554. <bitWidth>2</bitWidth>
  8555. </field>
  8556. <field> <name>OSPEEDR4</name>
  8557. <description>Port x configuration bits (y =
  8558. 0..15)</description>
  8559. <bitOffset>8</bitOffset>
  8560. <bitWidth>2</bitWidth>
  8561. </field>
  8562. <field> <name>OSPEEDR3</name>
  8563. <description>Port x configuration bits (y =
  8564. 0..15)</description>
  8565. <bitOffset>6</bitOffset>
  8566. <bitWidth>2</bitWidth>
  8567. </field>
  8568. <field> <name>OSPEEDR2</name>
  8569. <description>Port x configuration bits (y =
  8570. 0..15)</description>
  8571. <bitOffset>4</bitOffset>
  8572. <bitWidth>2</bitWidth>
  8573. </field>
  8574. <field> <name>OSPEEDR1</name>
  8575. <description>Port x configuration bits (y =
  8576. 0..15)</description>
  8577. <bitOffset>2</bitOffset>
  8578. <bitWidth>2</bitWidth>
  8579. </field>
  8580. <field> <name>OSPEEDR0</name>
  8581. <description>Port x configuration bits (y =
  8582. 0..15)</description>
  8583. <bitOffset>0</bitOffset>
  8584. <bitWidth>2</bitWidth>
  8585. </field>
  8586. </fields>
  8587. </register>
  8588. <register> <name>PUPDR</name>
  8589. <displayName>PUPDR</displayName>
  8590. <description>GPIO port pull-up/pull-down
  8591. register</description>
  8592. <addressOffset>0xC</addressOffset>
  8593. <size>0x20</size>
  8594. <access>read-write</access>
  8595. <resetValue>0x64000000</resetValue>
  8596. <fields>
  8597. <field> <name>PUPDR15</name>
  8598. <description>Port x configuration bits (y =
  8599. 0..15)</description>
  8600. <bitOffset>30</bitOffset>
  8601. <bitWidth>2</bitWidth>
  8602. </field>
  8603. <field> <name>PUPDR14</name>
  8604. <description>Port x configuration bits (y =
  8605. 0..15)</description>
  8606. <bitOffset>28</bitOffset>
  8607. <bitWidth>2</bitWidth>
  8608. </field>
  8609. <field> <name>PUPDR13</name>
  8610. <description>Port x configuration bits (y =
  8611. 0..15)</description>
  8612. <bitOffset>26</bitOffset>
  8613. <bitWidth>2</bitWidth>
  8614. </field>
  8615. <field> <name>PUPDR12</name>
  8616. <description>Port x configuration bits (y =
  8617. 0..15)</description>
  8618. <bitOffset>24</bitOffset>
  8619. <bitWidth>2</bitWidth>
  8620. </field>
  8621. <field> <name>PUPDR11</name>
  8622. <description>Port x configuration bits (y =
  8623. 0..15)</description>
  8624. <bitOffset>22</bitOffset>
  8625. <bitWidth>2</bitWidth>
  8626. </field>
  8627. <field> <name>PUPDR10</name>
  8628. <description>Port x configuration bits (y =
  8629. 0..15)</description>
  8630. <bitOffset>20</bitOffset>
  8631. <bitWidth>2</bitWidth>
  8632. </field>
  8633. <field> <name>PUPDR9</name>
  8634. <description>Port x configuration bits (y =
  8635. 0..15)</description>
  8636. <bitOffset>18</bitOffset>
  8637. <bitWidth>2</bitWidth>
  8638. </field>
  8639. <field> <name>PUPDR8</name>
  8640. <description>Port x configuration bits (y =
  8641. 0..15)</description>
  8642. <bitOffset>16</bitOffset>
  8643. <bitWidth>2</bitWidth>
  8644. </field>
  8645. <field> <name>PUPDR7</name>
  8646. <description>Port x configuration bits (y =
  8647. 0..15)</description>
  8648. <bitOffset>14</bitOffset>
  8649. <bitWidth>2</bitWidth>
  8650. </field>
  8651. <field> <name>PUPDR6</name>
  8652. <description>Port x configuration bits (y =
  8653. 0..15)</description>
  8654. <bitOffset>12</bitOffset>
  8655. <bitWidth>2</bitWidth>
  8656. </field>
  8657. <field> <name>PUPDR5</name>
  8658. <description>Port x configuration bits (y =
  8659. 0..15)</description>
  8660. <bitOffset>10</bitOffset>
  8661. <bitWidth>2</bitWidth>
  8662. </field>
  8663. <field> <name>PUPDR4</name>
  8664. <description>Port x configuration bits (y =
  8665. 0..15)</description>
  8666. <bitOffset>8</bitOffset>
  8667. <bitWidth>2</bitWidth>
  8668. </field>
  8669. <field> <name>PUPDR3</name>
  8670. <description>Port x configuration bits (y =
  8671. 0..15)</description>
  8672. <bitOffset>6</bitOffset>
  8673. <bitWidth>2</bitWidth>
  8674. </field>
  8675. <field> <name>PUPDR2</name>
  8676. <description>Port x configuration bits (y =
  8677. 0..15)</description>
  8678. <bitOffset>4</bitOffset>
  8679. <bitWidth>2</bitWidth>
  8680. </field>
  8681. <field> <name>PUPDR1</name>
  8682. <description>Port x configuration bits (y =
  8683. 0..15)</description>
  8684. <bitOffset>2</bitOffset>
  8685. <bitWidth>2</bitWidth>
  8686. </field>
  8687. <field> <name>PUPDR0</name>
  8688. <description>Port x configuration bits (y =
  8689. 0..15)</description>
  8690. <bitOffset>0</bitOffset>
  8691. <bitWidth>2</bitWidth>
  8692. </field>
  8693. </fields>
  8694. </register>
  8695. <register> <name>IDR</name>
  8696. <displayName>IDR</displayName>
  8697. <description>GPIO port input data register</description>
  8698. <addressOffset>0x10</addressOffset>
  8699. <size>0x20</size>
  8700. <access>read-only</access>
  8701. <resetValue>0x00000000</resetValue>
  8702. <fields>
  8703. <field> <name>IDR15</name>
  8704. <description>Port input data (y =
  8705. 0..15)</description>
  8706. <bitOffset>15</bitOffset>
  8707. <bitWidth>1</bitWidth>
  8708. </field>
  8709. <field> <name>IDR14</name>
  8710. <description>Port input data (y =
  8711. 0..15)</description>
  8712. <bitOffset>14</bitOffset>
  8713. <bitWidth>1</bitWidth>
  8714. </field>
  8715. <field> <name>IDR13</name>
  8716. <description>Port input data (y =
  8717. 0..15)</description>
  8718. <bitOffset>13</bitOffset>
  8719. <bitWidth>1</bitWidth>
  8720. </field>
  8721. <field> <name>IDR12</name>
  8722. <description>Port input data (y =
  8723. 0..15)</description>
  8724. <bitOffset>12</bitOffset>
  8725. <bitWidth>1</bitWidth>
  8726. </field>
  8727. <field> <name>IDR11</name>
  8728. <description>Port input data (y =
  8729. 0..15)</description>
  8730. <bitOffset>11</bitOffset>
  8731. <bitWidth>1</bitWidth>
  8732. </field>
  8733. <field> <name>IDR10</name>
  8734. <description>Port input data (y =
  8735. 0..15)</description>
  8736. <bitOffset>10</bitOffset>
  8737. <bitWidth>1</bitWidth>
  8738. </field>
  8739. <field> <name>IDR9</name>
  8740. <description>Port input data (y =
  8741. 0..15)</description>
  8742. <bitOffset>9</bitOffset>
  8743. <bitWidth>1</bitWidth>
  8744. </field>
  8745. <field> <name>IDR8</name>
  8746. <description>Port input data (y =
  8747. 0..15)</description>
  8748. <bitOffset>8</bitOffset>
  8749. <bitWidth>1</bitWidth>
  8750. </field>
  8751. <field> <name>IDR7</name>
  8752. <description>Port input data (y =
  8753. 0..15)</description>
  8754. <bitOffset>7</bitOffset>
  8755. <bitWidth>1</bitWidth>
  8756. </field>
  8757. <field> <name>IDR6</name>
  8758. <description>Port input data (y =
  8759. 0..15)</description>
  8760. <bitOffset>6</bitOffset>
  8761. <bitWidth>1</bitWidth>
  8762. </field>
  8763. <field> <name>IDR5</name>
  8764. <description>Port input data (y =
  8765. 0..15)</description>
  8766. <bitOffset>5</bitOffset>
  8767. <bitWidth>1</bitWidth>
  8768. </field>
  8769. <field> <name>IDR4</name>
  8770. <description>Port input data (y =
  8771. 0..15)</description>
  8772. <bitOffset>4</bitOffset>
  8773. <bitWidth>1</bitWidth>
  8774. </field>
  8775. <field> <name>IDR3</name>
  8776. <description>Port input data (y =
  8777. 0..15)</description>
  8778. <bitOffset>3</bitOffset>
  8779. <bitWidth>1</bitWidth>
  8780. </field>
  8781. <field> <name>IDR2</name>
  8782. <description>Port input data (y =
  8783. 0..15)</description>
  8784. <bitOffset>2</bitOffset>
  8785. <bitWidth>1</bitWidth>
  8786. </field>
  8787. <field> <name>IDR1</name>
  8788. <description>Port input data (y =
  8789. 0..15)</description>
  8790. <bitOffset>1</bitOffset>
  8791. <bitWidth>1</bitWidth>
  8792. </field>
  8793. <field> <name>IDR0</name>
  8794. <description>Port input data (y =
  8795. 0..15)</description>
  8796. <bitOffset>0</bitOffset>
  8797. <bitWidth>1</bitWidth>
  8798. </field>
  8799. </fields>
  8800. </register>
  8801. <register> <name>ODR</name>
  8802. <displayName>ODR</displayName>
  8803. <description>GPIO port output data register</description>
  8804. <addressOffset>0x14</addressOffset>
  8805. <size>0x20</size>
  8806. <access>read-write</access>
  8807. <resetValue>0x00000000</resetValue>
  8808. <fields>
  8809. <field> <name>ODR15</name>
  8810. <description>Port output data (y =
  8811. 0..15)</description>
  8812. <bitOffset>15</bitOffset>
  8813. <bitWidth>1</bitWidth>
  8814. </field>
  8815. <field> <name>ODR14</name>
  8816. <description>Port output data (y =
  8817. 0..15)</description>
  8818. <bitOffset>14</bitOffset>
  8819. <bitWidth>1</bitWidth>
  8820. </field>
  8821. <field> <name>ODR13</name>
  8822. <description>Port output data (y =
  8823. 0..15)</description>
  8824. <bitOffset>13</bitOffset>
  8825. <bitWidth>1</bitWidth>
  8826. </field>
  8827. <field> <name>ODR12</name>
  8828. <description>Port output data (y =
  8829. 0..15)</description>
  8830. <bitOffset>12</bitOffset>
  8831. <bitWidth>1</bitWidth>
  8832. </field>
  8833. <field> <name>ODR11</name>
  8834. <description>Port output data (y =
  8835. 0..15)</description>
  8836. <bitOffset>11</bitOffset>
  8837. <bitWidth>1</bitWidth>
  8838. </field>
  8839. <field> <name>ODR10</name>
  8840. <description>Port output data (y =
  8841. 0..15)</description>
  8842. <bitOffset>10</bitOffset>
  8843. <bitWidth>1</bitWidth>
  8844. </field>
  8845. <field> <name>ODR9</name>
  8846. <description>Port output data (y =
  8847. 0..15)</description>
  8848. <bitOffset>9</bitOffset>
  8849. <bitWidth>1</bitWidth>
  8850. </field>
  8851. <field> <name>ODR8</name>
  8852. <description>Port output data (y =
  8853. 0..15)</description>
  8854. <bitOffset>8</bitOffset>
  8855. <bitWidth>1</bitWidth>
  8856. </field>
  8857. <field> <name>ODR7</name>
  8858. <description>Port output data (y =
  8859. 0..15)</description>
  8860. <bitOffset>7</bitOffset>
  8861. <bitWidth>1</bitWidth>
  8862. </field>
  8863. <field> <name>ODR6</name>
  8864. <description>Port output data (y =
  8865. 0..15)</description>
  8866. <bitOffset>6</bitOffset>
  8867. <bitWidth>1</bitWidth>
  8868. </field>
  8869. <field> <name>ODR5</name>
  8870. <description>Port output data (y =
  8871. 0..15)</description>
  8872. <bitOffset>5</bitOffset>
  8873. <bitWidth>1</bitWidth>
  8874. </field>
  8875. <field> <name>ODR4</name>
  8876. <description>Port output data (y =
  8877. 0..15)</description>
  8878. <bitOffset>4</bitOffset>
  8879. <bitWidth>1</bitWidth>
  8880. </field>
  8881. <field> <name>ODR3</name>
  8882. <description>Port output data (y =
  8883. 0..15)</description>
  8884. <bitOffset>3</bitOffset>
  8885. <bitWidth>1</bitWidth>
  8886. </field>
  8887. <field> <name>ODR2</name>
  8888. <description>Port output data (y =
  8889. 0..15)</description>
  8890. <bitOffset>2</bitOffset>
  8891. <bitWidth>1</bitWidth>
  8892. </field>
  8893. <field> <name>ODR1</name>
  8894. <description>Port output data (y =
  8895. 0..15)</description>
  8896. <bitOffset>1</bitOffset>
  8897. <bitWidth>1</bitWidth>
  8898. </field>
  8899. <field> <name>ODR0</name>
  8900. <description>Port output data (y =
  8901. 0..15)</description>
  8902. <bitOffset>0</bitOffset>
  8903. <bitWidth>1</bitWidth>
  8904. </field>
  8905. </fields>
  8906. </register>
  8907. <register> <name>BSRR</name>
  8908. <displayName>BSRR</displayName>
  8909. <description>GPIO port bit set/reset
  8910. register</description>
  8911. <addressOffset>0x18</addressOffset>
  8912. <size>0x20</size>
  8913. <access>write-only</access>
  8914. <resetValue>0x00000000</resetValue>
  8915. <fields>
  8916. <field> <name>BR15</name>
  8917. <description>Port x reset bit y (y =
  8918. 0..15)</description>
  8919. <bitOffset>31</bitOffset>
  8920. <bitWidth>1</bitWidth>
  8921. </field>
  8922. <field> <name>BR14</name>
  8923. <description>Port x reset bit y (y =
  8924. 0..15)</description>
  8925. <bitOffset>30</bitOffset>
  8926. <bitWidth>1</bitWidth>
  8927. </field>
  8928. <field> <name>BR13</name>
  8929. <description>Port x reset bit y (y =
  8930. 0..15)</description>
  8931. <bitOffset>29</bitOffset>
  8932. <bitWidth>1</bitWidth>
  8933. </field>
  8934. <field> <name>BR12</name>
  8935. <description>Port x reset bit y (y =
  8936. 0..15)</description>
  8937. <bitOffset>28</bitOffset>
  8938. <bitWidth>1</bitWidth>
  8939. </field>
  8940. <field> <name>BR11</name>
  8941. <description>Port x reset bit y (y =
  8942. 0..15)</description>
  8943. <bitOffset>27</bitOffset>
  8944. <bitWidth>1</bitWidth>
  8945. </field>
  8946. <field> <name>BR10</name>
  8947. <description>Port x reset bit y (y =
  8948. 0..15)</description>
  8949. <bitOffset>26</bitOffset>
  8950. <bitWidth>1</bitWidth>
  8951. </field>
  8952. <field> <name>BR9</name>
  8953. <description>Port x reset bit y (y =
  8954. 0..15)</description>
  8955. <bitOffset>25</bitOffset>
  8956. <bitWidth>1</bitWidth>
  8957. </field>
  8958. <field> <name>BR8</name>
  8959. <description>Port x reset bit y (y =
  8960. 0..15)</description>
  8961. <bitOffset>24</bitOffset>
  8962. <bitWidth>1</bitWidth>
  8963. </field>
  8964. <field> <name>BR7</name>
  8965. <description>Port x reset bit y (y =
  8966. 0..15)</description>
  8967. <bitOffset>23</bitOffset>
  8968. <bitWidth>1</bitWidth>
  8969. </field>
  8970. <field> <name>BR6</name>
  8971. <description>Port x reset bit y (y =
  8972. 0..15)</description>
  8973. <bitOffset>22</bitOffset>
  8974. <bitWidth>1</bitWidth>
  8975. </field>
  8976. <field> <name>BR5</name>
  8977. <description>Port x reset bit y (y =
  8978. 0..15)</description>
  8979. <bitOffset>21</bitOffset>
  8980. <bitWidth>1</bitWidth>
  8981. </field>
  8982. <field> <name>BR4</name>
  8983. <description>Port x reset bit y (y =
  8984. 0..15)</description>
  8985. <bitOffset>20</bitOffset>
  8986. <bitWidth>1</bitWidth>
  8987. </field>
  8988. <field> <name>BR3</name>
  8989. <description>Port x reset bit y (y =
  8990. 0..15)</description>
  8991. <bitOffset>19</bitOffset>
  8992. <bitWidth>1</bitWidth>
  8993. </field>
  8994. <field> <name>BR2</name>
  8995. <description>Port x reset bit y (y =
  8996. 0..15)</description>
  8997. <bitOffset>18</bitOffset>
  8998. <bitWidth>1</bitWidth>
  8999. </field>
  9000. <field> <name>BR1</name>
  9001. <description>Port x reset bit y (y =
  9002. 0..15)</description>
  9003. <bitOffset>17</bitOffset>
  9004. <bitWidth>1</bitWidth>
  9005. </field>
  9006. <field> <name>BR0</name>
  9007. <description>Port x set bit y (y=
  9008. 0..15)</description>
  9009. <bitOffset>16</bitOffset>
  9010. <bitWidth>1</bitWidth>
  9011. </field>
  9012. <field> <name>BS15</name>
  9013. <description>Port x set bit y (y=
  9014. 0..15)</description>
  9015. <bitOffset>15</bitOffset>
  9016. <bitWidth>1</bitWidth>
  9017. </field>
  9018. <field> <name>BS14</name>
  9019. <description>Port x set bit y (y=
  9020. 0..15)</description>
  9021. <bitOffset>14</bitOffset>
  9022. <bitWidth>1</bitWidth>
  9023. </field>
  9024. <field> <name>BS13</name>
  9025. <description>Port x set bit y (y=
  9026. 0..15)</description>
  9027. <bitOffset>13</bitOffset>
  9028. <bitWidth>1</bitWidth>
  9029. </field>
  9030. <field> <name>BS12</name>
  9031. <description>Port x set bit y (y=
  9032. 0..15)</description>
  9033. <bitOffset>12</bitOffset>
  9034. <bitWidth>1</bitWidth>
  9035. </field>
  9036. <field> <name>BS11</name>
  9037. <description>Port x set bit y (y=
  9038. 0..15)</description>
  9039. <bitOffset>11</bitOffset>
  9040. <bitWidth>1</bitWidth>
  9041. </field>
  9042. <field> <name>BS10</name>
  9043. <description>Port x set bit y (y=
  9044. 0..15)</description>
  9045. <bitOffset>10</bitOffset>
  9046. <bitWidth>1</bitWidth>
  9047. </field>
  9048. <field> <name>BS9</name>
  9049. <description>Port x set bit y (y=
  9050. 0..15)</description>
  9051. <bitOffset>9</bitOffset>
  9052. <bitWidth>1</bitWidth>
  9053. </field>
  9054. <field> <name>BS8</name>
  9055. <description>Port x set bit y (y=
  9056. 0..15)</description>
  9057. <bitOffset>8</bitOffset>
  9058. <bitWidth>1</bitWidth>
  9059. </field>
  9060. <field> <name>BS7</name>
  9061. <description>Port x set bit y (y=
  9062. 0..15)</description>
  9063. <bitOffset>7</bitOffset>
  9064. <bitWidth>1</bitWidth>
  9065. </field>
  9066. <field> <name>BS6</name>
  9067. <description>Port x set bit y (y=
  9068. 0..15)</description>
  9069. <bitOffset>6</bitOffset>
  9070. <bitWidth>1</bitWidth>
  9071. </field>
  9072. <field> <name>BS5</name>
  9073. <description>Port x set bit y (y=
  9074. 0..15)</description>
  9075. <bitOffset>5</bitOffset>
  9076. <bitWidth>1</bitWidth>
  9077. </field>
  9078. <field> <name>BS4</name>
  9079. <description>Port x set bit y (y=
  9080. 0..15)</description>
  9081. <bitOffset>4</bitOffset>
  9082. <bitWidth>1</bitWidth>
  9083. </field>
  9084. <field> <name>BS3</name>
  9085. <description>Port x set bit y (y=
  9086. 0..15)</description>
  9087. <bitOffset>3</bitOffset>
  9088. <bitWidth>1</bitWidth>
  9089. </field>
  9090. <field> <name>BS2</name>
  9091. <description>Port x set bit y (y=
  9092. 0..15)</description>
  9093. <bitOffset>2</bitOffset>
  9094. <bitWidth>1</bitWidth>
  9095. </field>
  9096. <field> <name>BS1</name>
  9097. <description>Port x set bit y (y=
  9098. 0..15)</description>
  9099. <bitOffset>1</bitOffset>
  9100. <bitWidth>1</bitWidth>
  9101. </field>
  9102. <field> <name>BS0</name>
  9103. <description>Port x set bit y (y=
  9104. 0..15)</description>
  9105. <bitOffset>0</bitOffset>
  9106. <bitWidth>1</bitWidth>
  9107. </field>
  9108. </fields>
  9109. </register>
  9110. <register> <name>LCKR</name>
  9111. <displayName>LCKR</displayName>
  9112. <description>GPIO port configuration lock
  9113. register</description>
  9114. <addressOffset>0x1C</addressOffset>
  9115. <size>0x20</size>
  9116. <access>read-write</access>
  9117. <resetValue>0x00000000</resetValue>
  9118. <fields>
  9119. <field> <name>LCKK</name>
  9120. <description>Port x lock bit y (y=
  9121. 0..15)</description>
  9122. <bitOffset>16</bitOffset>
  9123. <bitWidth>1</bitWidth>
  9124. </field>
  9125. <field> <name>LCK15</name>
  9126. <description>Port x lock bit y (y=
  9127. 0..15)</description>
  9128. <bitOffset>15</bitOffset>
  9129. <bitWidth>1</bitWidth>
  9130. </field>
  9131. <field> <name>LCK14</name>
  9132. <description>Port x lock bit y (y=
  9133. 0..15)</description>
  9134. <bitOffset>14</bitOffset>
  9135. <bitWidth>1</bitWidth>
  9136. </field>
  9137. <field> <name>LCK13</name>
  9138. <description>Port x lock bit y (y=
  9139. 0..15)</description>
  9140. <bitOffset>13</bitOffset>
  9141. <bitWidth>1</bitWidth>
  9142. </field>
  9143. <field> <name>LCK12</name>
  9144. <description>Port x lock bit y (y=
  9145. 0..15)</description>
  9146. <bitOffset>12</bitOffset>
  9147. <bitWidth>1</bitWidth>
  9148. </field>
  9149. <field> <name>LCK11</name>
  9150. <description>Port x lock bit y (y=
  9151. 0..15)</description>
  9152. <bitOffset>11</bitOffset>
  9153. <bitWidth>1</bitWidth>
  9154. </field>
  9155. <field> <name>LCK10</name>
  9156. <description>Port x lock bit y (y=
  9157. 0..15)</description>
  9158. <bitOffset>10</bitOffset>
  9159. <bitWidth>1</bitWidth>
  9160. </field>
  9161. <field> <name>LCK9</name>
  9162. <description>Port x lock bit y (y=
  9163. 0..15)</description>
  9164. <bitOffset>9</bitOffset>
  9165. <bitWidth>1</bitWidth>
  9166. </field>
  9167. <field> <name>LCK8</name>
  9168. <description>Port x lock bit y (y=
  9169. 0..15)</description>
  9170. <bitOffset>8</bitOffset>
  9171. <bitWidth>1</bitWidth>
  9172. </field>
  9173. <field> <name>LCK7</name>
  9174. <description>Port x lock bit y (y=
  9175. 0..15)</description>
  9176. <bitOffset>7</bitOffset>
  9177. <bitWidth>1</bitWidth>
  9178. </field>
  9179. <field> <name>LCK6</name>
  9180. <description>Port x lock bit y (y=
  9181. 0..15)</description>
  9182. <bitOffset>6</bitOffset>
  9183. <bitWidth>1</bitWidth>
  9184. </field>
  9185. <field> <name>LCK5</name>
  9186. <description>Port x lock bit y (y=
  9187. 0..15)</description>
  9188. <bitOffset>5</bitOffset>
  9189. <bitWidth>1</bitWidth>
  9190. </field>
  9191. <field> <name>LCK4</name>
  9192. <description>Port x lock bit y (y=
  9193. 0..15)</description>
  9194. <bitOffset>4</bitOffset>
  9195. <bitWidth>1</bitWidth>
  9196. </field>
  9197. <field> <name>LCK3</name>
  9198. <description>Port x lock bit y (y=
  9199. 0..15)</description>
  9200. <bitOffset>3</bitOffset>
  9201. <bitWidth>1</bitWidth>
  9202. </field>
  9203. <field> <name>LCK2</name>
  9204. <description>Port x lock bit y (y=
  9205. 0..15)</description>
  9206. <bitOffset>2</bitOffset>
  9207. <bitWidth>1</bitWidth>
  9208. </field>
  9209. <field> <name>LCK1</name>
  9210. <description>Port x lock bit y (y=
  9211. 0..15)</description>
  9212. <bitOffset>1</bitOffset>
  9213. <bitWidth>1</bitWidth>
  9214. </field>
  9215. <field> <name>LCK0</name>
  9216. <description>Port x lock bit y (y=
  9217. 0..15)</description>
  9218. <bitOffset>0</bitOffset>
  9219. <bitWidth>1</bitWidth>
  9220. </field>
  9221. </fields>
  9222. </register>
  9223. <register> <name>AFRL</name>
  9224. <displayName>AFRL</displayName>
  9225. <description>GPIO alternate function low
  9226. register</description>
  9227. <addressOffset>0x20</addressOffset>
  9228. <size>0x20</size>
  9229. <access>read-write</access>
  9230. <resetValue>0x00000000</resetValue>
  9231. <fields>
  9232. <field> <name>AFRL7</name>
  9233. <description>Alternate function selection for port x
  9234. bit y (y = 0..7)</description>
  9235. <bitOffset>28</bitOffset>
  9236. <bitWidth>4</bitWidth>
  9237. </field>
  9238. <field> <name>AFRL6</name>
  9239. <description>Alternate function selection for port x
  9240. bit y (y = 0..7)</description>
  9241. <bitOffset>24</bitOffset>
  9242. <bitWidth>4</bitWidth>
  9243. </field>
  9244. <field> <name>AFRL5</name>
  9245. <description>Alternate function selection for port x
  9246. bit y (y = 0..7)</description>
  9247. <bitOffset>20</bitOffset>
  9248. <bitWidth>4</bitWidth>
  9249. </field>
  9250. <field> <name>AFRL4</name>
  9251. <description>Alternate function selection for port x
  9252. bit y (y = 0..7)</description>
  9253. <bitOffset>16</bitOffset>
  9254. <bitWidth>4</bitWidth>
  9255. </field>
  9256. <field> <name>AFRL3</name>
  9257. <description>Alternate function selection for port x
  9258. bit y (y = 0..7)</description>
  9259. <bitOffset>12</bitOffset>
  9260. <bitWidth>4</bitWidth>
  9261. </field>
  9262. <field> <name>AFRL2</name>
  9263. <description>Alternate function selection for port x
  9264. bit y (y = 0..7)</description>
  9265. <bitOffset>8</bitOffset>
  9266. <bitWidth>4</bitWidth>
  9267. </field>
  9268. <field> <name>AFRL1</name>
  9269. <description>Alternate function selection for port x
  9270. bit y (y = 0..7)</description>
  9271. <bitOffset>4</bitOffset>
  9272. <bitWidth>4</bitWidth>
  9273. </field>
  9274. <field> <name>AFRL0</name>
  9275. <description>Alternate function selection for port x
  9276. bit y (y = 0..7)</description>
  9277. <bitOffset>0</bitOffset>
  9278. <bitWidth>4</bitWidth>
  9279. </field>
  9280. </fields>
  9281. </register>
  9282. <register> <name>AFRH</name>
  9283. <displayName>AFRH</displayName>
  9284. <description>GPIO alternate function high
  9285. register</description>
  9286. <addressOffset>0x24</addressOffset>
  9287. <size>0x20</size>
  9288. <access>read-write</access>
  9289. <resetValue>0x00000000</resetValue>
  9290. <fields>
  9291. <field> <name>AFRH15</name>
  9292. <description>Alternate function selection for port x
  9293. bit y (y = 8..15)</description>
  9294. <bitOffset>28</bitOffset>
  9295. <bitWidth>4</bitWidth>
  9296. </field>
  9297. <field> <name>AFRH14</name>
  9298. <description>Alternate function selection for port x
  9299. bit y (y = 8..15)</description>
  9300. <bitOffset>24</bitOffset>
  9301. <bitWidth>4</bitWidth>
  9302. </field>
  9303. <field> <name>AFRH13</name>
  9304. <description>Alternate function selection for port x
  9305. bit y (y = 8..15)</description>
  9306. <bitOffset>20</bitOffset>
  9307. <bitWidth>4</bitWidth>
  9308. </field>
  9309. <field> <name>AFRH12</name>
  9310. <description>Alternate function selection for port x
  9311. bit y (y = 8..15)</description>
  9312. <bitOffset>16</bitOffset>
  9313. <bitWidth>4</bitWidth>
  9314. </field>
  9315. <field> <name>AFRH11</name>
  9316. <description>Alternate function selection for port x
  9317. bit y (y = 8..15)</description>
  9318. <bitOffset>12</bitOffset>
  9319. <bitWidth>4</bitWidth>
  9320. </field>
  9321. <field> <name>AFRH10</name>
  9322. <description>Alternate function selection for port x
  9323. bit y (y = 8..15)</description>
  9324. <bitOffset>8</bitOffset>
  9325. <bitWidth>4</bitWidth>
  9326. </field>
  9327. <field> <name>AFRH9</name>
  9328. <description>Alternate function selection for port x
  9329. bit y (y = 8..15)</description>
  9330. <bitOffset>4</bitOffset>
  9331. <bitWidth>4</bitWidth>
  9332. </field>
  9333. <field> <name>AFRH8</name>
  9334. <description>Alternate function selection for port x
  9335. bit y (y = 8..15)</description>
  9336. <bitOffset>0</bitOffset>
  9337. <bitWidth>4</bitWidth>
  9338. </field>
  9339. </fields>
  9340. </register>
  9341. </registers>
  9342. </peripheral>
  9343. <peripheral> <name>SYSCFG</name>
  9344. <description>System configuration controller</description>
  9345. <groupName>SYSCFG</groupName>
  9346. <baseAddress>0x40013800</baseAddress>
  9347. <addressBlock>
  9348. <offset>0x0</offset>
  9349. <size>0x400</size>
  9350. <usage>registers</usage>
  9351. </addressBlock>
  9352. <registers>
  9353. <register> <name>MEMRM</name>
  9354. <displayName>MEMRM</displayName>
  9355. <description>memory remap register</description>
  9356. <addressOffset>0x0</addressOffset>
  9357. <size>0x20</size>
  9358. <access>read-write</access>
  9359. <resetValue>0x00000000</resetValue>
  9360. <fields>
  9361. <field> <name>MEM_MODE</name>
  9362. <description>MEM_MODE</description>
  9363. <bitOffset>0</bitOffset>
  9364. <bitWidth>2</bitWidth>
  9365. </field>
  9366. </fields>
  9367. </register>
  9368. <register> <name>PMC</name>
  9369. <displayName>PMC</displayName>
  9370. <description>peripheral mode configuration
  9371. register</description>
  9372. <addressOffset>0x4</addressOffset>
  9373. <size>0x20</size>
  9374. <access>read-write</access>
  9375. <resetValue>0x00000000</resetValue>
  9376. <fields>
  9377. <field> <name>MII_RMII_SEL</name>
  9378. <description>Ethernet PHY interface
  9379. selection</description>
  9380. <bitOffset>23</bitOffset>
  9381. <bitWidth>1</bitWidth>
  9382. </field>
  9383. </fields>
  9384. </register>
  9385. <register> <name>EXTICR1</name>
  9386. <displayName>EXTICR1</displayName>
  9387. <description>external interrupt configuration register
  9388. 1</description>
  9389. <addressOffset>0x8</addressOffset>
  9390. <size>0x20</size>
  9391. <access>read-write</access>
  9392. <resetValue>0x0000</resetValue>
  9393. <fields>
  9394. <field> <name>EXTI3</name>
  9395. <description>EXTI x configuration (x = 0 to
  9396. 3)</description>
  9397. <bitOffset>12</bitOffset>
  9398. <bitWidth>4</bitWidth>
  9399. </field>
  9400. <field> <name>EXTI2</name>
  9401. <description>EXTI x configuration (x = 0 to
  9402. 3)</description>
  9403. <bitOffset>8</bitOffset>
  9404. <bitWidth>4</bitWidth>
  9405. </field>
  9406. <field> <name>EXTI1</name>
  9407. <description>EXTI x configuration (x = 0 to
  9408. 3)</description>
  9409. <bitOffset>4</bitOffset>
  9410. <bitWidth>4</bitWidth>
  9411. </field>
  9412. <field> <name>EXTI0</name>
  9413. <description>EXTI x configuration (x = 0 to
  9414. 3)</description>
  9415. <bitOffset>0</bitOffset>
  9416. <bitWidth>4</bitWidth>
  9417. </field>
  9418. </fields>
  9419. </register>
  9420. <register> <name>EXTICR2</name>
  9421. <displayName>EXTICR2</displayName>
  9422. <description>external interrupt configuration register
  9423. 2</description>
  9424. <addressOffset>0xC</addressOffset>
  9425. <size>0x20</size>
  9426. <access>read-write</access>
  9427. <resetValue>0x0000</resetValue>
  9428. <fields>
  9429. <field> <name>EXTI7</name>
  9430. <description>EXTI x configuration (x = 4 to
  9431. 7)</description>
  9432. <bitOffset>12</bitOffset>
  9433. <bitWidth>4</bitWidth>
  9434. </field>
  9435. <field> <name>EXTI6</name>
  9436. <description>EXTI x configuration (x = 4 to
  9437. 7)</description>
  9438. <bitOffset>8</bitOffset>
  9439. <bitWidth>4</bitWidth>
  9440. </field>
  9441. <field> <name>EXTI5</name>
  9442. <description>EXTI x configuration (x = 4 to
  9443. 7)</description>
  9444. <bitOffset>4</bitOffset>
  9445. <bitWidth>4</bitWidth>
  9446. </field>
  9447. <field> <name>EXTI4</name>
  9448. <description>EXTI x configuration (x = 4 to
  9449. 7)</description>
  9450. <bitOffset>0</bitOffset>
  9451. <bitWidth>4</bitWidth>
  9452. </field>
  9453. </fields>
  9454. </register>
  9455. <register> <name>EXTICR3</name>
  9456. <displayName>EXTICR3</displayName>
  9457. <description>external interrupt configuration register
  9458. 3</description>
  9459. <addressOffset>0x10</addressOffset>
  9460. <size>0x20</size>
  9461. <access>read-write</access>
  9462. <resetValue>0x0000</resetValue>
  9463. <fields>
  9464. <field> <name>EXTI11</name>
  9465. <description>EXTI x configuration (x = 8 to
  9466. 11)</description>
  9467. <bitOffset>12</bitOffset>
  9468. <bitWidth>4</bitWidth>
  9469. </field>
  9470. <field> <name>EXTI10</name>
  9471. <description>EXTI10</description>
  9472. <bitOffset>8</bitOffset>
  9473. <bitWidth>4</bitWidth>
  9474. </field>
  9475. <field> <name>EXTI9</name>
  9476. <description>EXTI x configuration (x = 8 to
  9477. 11)</description>
  9478. <bitOffset>4</bitOffset>
  9479. <bitWidth>4</bitWidth>
  9480. </field>
  9481. <field> <name>EXTI8</name>
  9482. <description>EXTI x configuration (x = 8 to
  9483. 11)</description>
  9484. <bitOffset>0</bitOffset>
  9485. <bitWidth>4</bitWidth>
  9486. </field>
  9487. </fields>
  9488. </register>
  9489. <register> <name>EXTICR4</name>
  9490. <displayName>EXTICR4</displayName>
  9491. <description>external interrupt configuration register
  9492. 4</description>
  9493. <addressOffset>0x14</addressOffset>
  9494. <size>0x20</size>
  9495. <access>read-write</access>
  9496. <resetValue>0x0000</resetValue>
  9497. <fields>
  9498. <field> <name>EXTI15</name>
  9499. <description>EXTI x configuration (x = 12 to
  9500. 15)</description>
  9501. <bitOffset>12</bitOffset>
  9502. <bitWidth>4</bitWidth>
  9503. </field>
  9504. <field> <name>EXTI14</name>
  9505. <description>EXTI x configuration (x = 12 to
  9506. 15)</description>
  9507. <bitOffset>8</bitOffset>
  9508. <bitWidth>4</bitWidth>
  9509. </field>
  9510. <field> <name>EXTI13</name>
  9511. <description>EXTI x configuration (x = 12 to
  9512. 15)</description>
  9513. <bitOffset>4</bitOffset>
  9514. <bitWidth>4</bitWidth>
  9515. </field>
  9516. <field> <name>EXTI12</name>
  9517. <description>EXTI x configuration (x = 12 to
  9518. 15)</description>
  9519. <bitOffset>0</bitOffset>
  9520. <bitWidth>4</bitWidth>
  9521. </field>
  9522. </fields>
  9523. </register>
  9524. <register> <name>CMPCR</name>
  9525. <displayName>CMPCR</displayName>
  9526. <description>Compensation cell control
  9527. register</description>
  9528. <addressOffset>0x20</addressOffset>
  9529. <size>0x20</size>
  9530. <access>read-only</access>
  9531. <resetValue>0x00000000</resetValue>
  9532. <fields>
  9533. <field> <name>READY</name>
  9534. <description>READY</description>
  9535. <bitOffset>8</bitOffset>
  9536. <bitWidth>1</bitWidth>
  9537. </field>
  9538. <field> <name>CMP_PD</name>
  9539. <description>Compensation cell
  9540. power-down</description>
  9541. <bitOffset>0</bitOffset>
  9542. <bitWidth>1</bitWidth>
  9543. </field>
  9544. </fields>
  9545. </register>
  9546. </registers>
  9547. </peripheral>
  9548. <peripheral> <name>SPI1</name>
  9549. <description>Serial peripheral interface</description>
  9550. <groupName>SPI</groupName>
  9551. <baseAddress>0x40013000</baseAddress>
  9552. <addressBlock>
  9553. <offset>0x0</offset>
  9554. <size>0x400</size>
  9555. <usage>registers</usage>
  9556. </addressBlock>
  9557. <interrupt>
  9558. <name>SPI1</name>
  9559. <description>SPI1 global interrupt</description>
  9560. <value>35</value>
  9561. </interrupt>
  9562. <registers>
  9563. <register> <name>CR1</name>
  9564. <displayName>CR1</displayName>
  9565. <description>control register 1</description>
  9566. <addressOffset>0x0</addressOffset>
  9567. <size>0x20</size>
  9568. <access>read-write</access>
  9569. <resetValue>0x0000</resetValue>
  9570. <fields>
  9571. <field> <name>BIDIMODE</name>
  9572. <description>Bidirectional data mode
  9573. enable</description>
  9574. <bitOffset>15</bitOffset>
  9575. <bitWidth>1</bitWidth>
  9576. </field>
  9577. <field> <name>BIDIOE</name>
  9578. <description>Output enable in bidirectional
  9579. mode</description>
  9580. <bitOffset>14</bitOffset>
  9581. <bitWidth>1</bitWidth>
  9582. </field>
  9583. <field> <name>CRCEN</name>
  9584. <description>Hardware CRC calculation
  9585. enable</description>
  9586. <bitOffset>13</bitOffset>
  9587. <bitWidth>1</bitWidth>
  9588. </field>
  9589. <field> <name>CRCNEXT</name>
  9590. <description>CRC transfer next</description>
  9591. <bitOffset>12</bitOffset>
  9592. <bitWidth>1</bitWidth>
  9593. </field>
  9594. <field> <name>DFF</name>
  9595. <description>Data frame format</description>
  9596. <bitOffset>11</bitOffset>
  9597. <bitWidth>1</bitWidth>
  9598. </field>
  9599. <field> <name>RXONLY</name>
  9600. <description>Receive only</description>
  9601. <bitOffset>10</bitOffset>
  9602. <bitWidth>1</bitWidth>
  9603. </field>
  9604. <field> <name>SSM</name>
  9605. <description>Software slave management</description>
  9606. <bitOffset>9</bitOffset>
  9607. <bitWidth>1</bitWidth>
  9608. </field>
  9609. <field> <name>SSI</name>
  9610. <description>Internal slave select</description>
  9611. <bitOffset>8</bitOffset>
  9612. <bitWidth>1</bitWidth>
  9613. </field>
  9614. <field> <name>LSBFIRST</name>
  9615. <description>Frame format</description>
  9616. <bitOffset>7</bitOffset>
  9617. <bitWidth>1</bitWidth>
  9618. </field>
  9619. <field> <name>SPE</name>
  9620. <description>SPI enable</description>
  9621. <bitOffset>6</bitOffset>
  9622. <bitWidth>1</bitWidth>
  9623. </field>
  9624. <field> <name>BR</name>
  9625. <description>Baud rate control</description>
  9626. <bitOffset>3</bitOffset>
  9627. <bitWidth>3</bitWidth>
  9628. </field>
  9629. <field> <name>MSTR</name>
  9630. <description>Master selection</description>
  9631. <bitOffset>2</bitOffset>
  9632. <bitWidth>1</bitWidth>
  9633. </field>
  9634. <field> <name>CPOL</name>
  9635. <description>Clock polarity</description>
  9636. <bitOffset>1</bitOffset>
  9637. <bitWidth>1</bitWidth>
  9638. </field>
  9639. <field> <name>CPHA</name>
  9640. <description>Clock phase</description>
  9641. <bitOffset>0</bitOffset>
  9642. <bitWidth>1</bitWidth>
  9643. </field>
  9644. </fields>
  9645. </register>
  9646. <register> <name>CR2</name>
  9647. <displayName>CR2</displayName>
  9648. <description>control register 2</description>
  9649. <addressOffset>0x4</addressOffset>
  9650. <size>0x20</size>
  9651. <access>read-write</access>
  9652. <resetValue>0x0000</resetValue>
  9653. <fields>
  9654. <field> <name>TXEIE</name>
  9655. <description>Tx buffer empty interrupt
  9656. enable</description>
  9657. <bitOffset>7</bitOffset>
  9658. <bitWidth>1</bitWidth>
  9659. </field>
  9660. <field> <name>RXNEIE</name>
  9661. <description>RX buffer not empty interrupt
  9662. enable</description>
  9663. <bitOffset>6</bitOffset>
  9664. <bitWidth>1</bitWidth>
  9665. </field>
  9666. <field> <name>ERRIE</name>
  9667. <description>Error interrupt enable</description>
  9668. <bitOffset>5</bitOffset>
  9669. <bitWidth>1</bitWidth>
  9670. </field>
  9671. <field> <name>FRF</name>
  9672. <description>Frame format</description>
  9673. <bitOffset>4</bitOffset>
  9674. <bitWidth>1</bitWidth>
  9675. </field>
  9676. <field> <name>SSOE</name>
  9677. <description>SS output enable</description>
  9678. <bitOffset>2</bitOffset>
  9679. <bitWidth>1</bitWidth>
  9680. </field>
  9681. <field> <name>TXDMAEN</name>
  9682. <description>Tx buffer DMA enable</description>
  9683. <bitOffset>1</bitOffset>
  9684. <bitWidth>1</bitWidth>
  9685. </field>
  9686. <field> <name>RXDMAEN</name>
  9687. <description>Rx buffer DMA enable</description>
  9688. <bitOffset>0</bitOffset>
  9689. <bitWidth>1</bitWidth>
  9690. </field>
  9691. </fields>
  9692. </register>
  9693. <register> <name>SR</name>
  9694. <displayName>SR</displayName>
  9695. <description>status register</description>
  9696. <addressOffset>0x8</addressOffset>
  9697. <size>0x20</size>
  9698. <resetValue>0x0002</resetValue>
  9699. <fields>
  9700. <field> <name>TIFRFE</name>
  9701. <description>TI frame format error</description>
  9702. <bitOffset>8</bitOffset>
  9703. <bitWidth>1</bitWidth>
  9704. <access>read-only</access>
  9705. </field>
  9706. <field> <name>BSY</name>
  9707. <description>Busy flag</description>
  9708. <bitOffset>7</bitOffset>
  9709. <bitWidth>1</bitWidth>
  9710. <access>read-only</access>
  9711. </field>
  9712. <field> <name>OVR</name>
  9713. <description>Overrun flag</description>
  9714. <bitOffset>6</bitOffset>
  9715. <bitWidth>1</bitWidth>
  9716. <access>read-only</access>
  9717. </field>
  9718. <field> <name>MODF</name>
  9719. <description>Mode fault</description>
  9720. <bitOffset>5</bitOffset>
  9721. <bitWidth>1</bitWidth>
  9722. <access>read-only</access>
  9723. </field>
  9724. <field> <name>CRCERR</name>
  9725. <description>CRC error flag</description>
  9726. <bitOffset>4</bitOffset>
  9727. <bitWidth>1</bitWidth>
  9728. <access>read-write</access>
  9729. </field>
  9730. <field> <name>UDR</name>
  9731. <description>Underrun flag</description>
  9732. <bitOffset>3</bitOffset>
  9733. <bitWidth>1</bitWidth>
  9734. <access>read-only</access>
  9735. </field>
  9736. <field> <name>CHSIDE</name>
  9737. <description>Channel side</description>
  9738. <bitOffset>2</bitOffset>
  9739. <bitWidth>1</bitWidth>
  9740. <access>read-only</access>
  9741. </field>
  9742. <field> <name>TXE</name>
  9743. <description>Transmit buffer empty</description>
  9744. <bitOffset>1</bitOffset>
  9745. <bitWidth>1</bitWidth>
  9746. <access>read-only</access>
  9747. </field>
  9748. <field> <name>RXNE</name>
  9749. <description>Receive buffer not empty</description>
  9750. <bitOffset>0</bitOffset>
  9751. <bitWidth>1</bitWidth>
  9752. <access>read-only</access>
  9753. </field>
  9754. </fields>
  9755. </register>
  9756. <register> <name>DR</name>
  9757. <displayName>DR</displayName>
  9758. <description>data register</description>
  9759. <addressOffset>0xC</addressOffset>
  9760. <size>0x20</size>
  9761. <access>read-write</access>
  9762. <resetValue>0x0000</resetValue>
  9763. <fields>
  9764. <field> <name>DR</name>
  9765. <description>Data register</description>
  9766. <bitOffset>0</bitOffset>
  9767. <bitWidth>16</bitWidth>
  9768. </field>
  9769. </fields>
  9770. </register>
  9771. <register> <name>CRCPR</name>
  9772. <displayName>CRCPR</displayName>
  9773. <description>CRC polynomial register</description>
  9774. <addressOffset>0x10</addressOffset>
  9775. <size>0x20</size>
  9776. <access>read-write</access>
  9777. <resetValue>0x0007</resetValue>
  9778. <fields>
  9779. <field> <name>CRCPOLY</name>
  9780. <description>CRC polynomial register</description>
  9781. <bitOffset>0</bitOffset>
  9782. <bitWidth>16</bitWidth>
  9783. </field>
  9784. </fields>
  9785. </register>
  9786. <register> <name>RXCRCR</name>
  9787. <displayName>RXCRCR</displayName>
  9788. <description>RX CRC register</description>
  9789. <addressOffset>0x14</addressOffset>
  9790. <size>0x20</size>
  9791. <access>read-only</access>
  9792. <resetValue>0x0000</resetValue>
  9793. <fields>
  9794. <field> <name>RxCRC</name>
  9795. <description>Rx CRC register</description>
  9796. <bitOffset>0</bitOffset>
  9797. <bitWidth>16</bitWidth>
  9798. </field>
  9799. </fields>
  9800. </register>
  9801. <register> <name>TXCRCR</name>
  9802. <displayName>TXCRCR</displayName>
  9803. <description>TX CRC register</description>
  9804. <addressOffset>0x18</addressOffset>
  9805. <size>0x20</size>
  9806. <access>read-only</access>
  9807. <resetValue>0x0000</resetValue>
  9808. <fields>
  9809. <field> <name>TxCRC</name>
  9810. <description>Tx CRC register</description>
  9811. <bitOffset>0</bitOffset>
  9812. <bitWidth>16</bitWidth>
  9813. </field>
  9814. </fields>
  9815. </register>
  9816. <register> <name>I2SCFGR</name>
  9817. <displayName>I2SCFGR</displayName>
  9818. <description>I2S configuration register</description>
  9819. <addressOffset>0x1C</addressOffset>
  9820. <size>0x20</size>
  9821. <access>read-write</access>
  9822. <resetValue>0x0000</resetValue>
  9823. <fields>
  9824. <field> <name>I2SMOD</name>
  9825. <description>I2S mode selection</description>
  9826. <bitOffset>11</bitOffset>
  9827. <bitWidth>1</bitWidth>
  9828. </field>
  9829. <field> <name>I2SE</name>
  9830. <description>I2S Enable</description>
  9831. <bitOffset>10</bitOffset>
  9832. <bitWidth>1</bitWidth>
  9833. </field>
  9834. <field> <name>I2SCFG</name>
  9835. <description>I2S configuration mode</description>
  9836. <bitOffset>8</bitOffset>
  9837. <bitWidth>2</bitWidth>
  9838. </field>
  9839. <field> <name>PCMSYNC</name>
  9840. <description>PCM frame synchronization</description>
  9841. <bitOffset>7</bitOffset>
  9842. <bitWidth>1</bitWidth>
  9843. </field>
  9844. <field> <name>I2SSTD</name>
  9845. <description>I2S standard selection</description>
  9846. <bitOffset>4</bitOffset>
  9847. <bitWidth>2</bitWidth>
  9848. </field>
  9849. <field> <name>CKPOL</name>
  9850. <description>Steady state clock
  9851. polarity</description>
  9852. <bitOffset>3</bitOffset>
  9853. <bitWidth>1</bitWidth>
  9854. </field>
  9855. <field> <name>DATLEN</name>
  9856. <description>Data length to be
  9857. transferred</description>
  9858. <bitOffset>1</bitOffset>
  9859. <bitWidth>2</bitWidth>
  9860. </field>
  9861. <field> <name>CHLEN</name>
  9862. <description>Channel length (number of bits per audio
  9863. channel)</description>
  9864. <bitOffset>0</bitOffset>
  9865. <bitWidth>1</bitWidth>
  9866. </field>
  9867. </fields>
  9868. </register>
  9869. <register> <name>I2SPR</name>
  9870. <displayName>I2SPR</displayName>
  9871. <description>I2S prescaler register</description>
  9872. <addressOffset>0x20</addressOffset>
  9873. <size>0x20</size>
  9874. <access>read-write</access>
  9875. <resetValue>00000010</resetValue>
  9876. <fields>
  9877. <field> <name>MCKOE</name>
  9878. <description>Master clock output enable</description>
  9879. <bitOffset>9</bitOffset>
  9880. <bitWidth>1</bitWidth>
  9881. </field>
  9882. <field> <name>ODD</name>
  9883. <description>Odd factor for the
  9884. prescaler</description>
  9885. <bitOffset>8</bitOffset>
  9886. <bitWidth>1</bitWidth>
  9887. </field>
  9888. <field> <name>I2SDIV</name>
  9889. <description>I2S Linear prescaler</description>
  9890. <bitOffset>0</bitOffset>
  9891. <bitWidth>8</bitWidth>
  9892. </field>
  9893. </fields>
  9894. </register>
  9895. </registers>
  9896. </peripheral>
  9897. <peripheral derivedFrom="SPI1"> <name>SPI2</name>
  9898. <baseAddress>0x40003800</baseAddress>
  9899. <interrupt>
  9900. <name>SPI2</name>
  9901. <description>SPI2 global interrupt</description>
  9902. <value>36</value>
  9903. </interrupt>
  9904. </peripheral>
  9905. <peripheral derivedFrom="SPI1"> <name>SPI3</name>
  9906. <baseAddress>0x40003C00</baseAddress>
  9907. <interrupt>
  9908. <name>SPI3</name>
  9909. <description>SPI3 global interrupt</description>
  9910. <value>51</value>
  9911. </interrupt>
  9912. </peripheral>
  9913. <peripheral derivedFrom="SPI1"> <name>I2S2ext</name>
  9914. <baseAddress>0x40003400</baseAddress>
  9915. </peripheral>
  9916. <peripheral derivedFrom="SPI1"> <name>I2S3ext</name>
  9917. <baseAddress>0x40004000</baseAddress>
  9918. </peripheral>
  9919. <peripheral> <name>SDIO</name>
  9920. <description>Secure digital input/output
  9921. interface</description>
  9922. <groupName>SDIO</groupName>
  9923. <baseAddress>0x40012C00</baseAddress>
  9924. <addressBlock>
  9925. <offset>0x0</offset>
  9926. <size>0x400</size>
  9927. <usage>registers</usage>
  9928. </addressBlock>
  9929. <interrupt>
  9930. <name>SDIO</name>
  9931. <description>SDIO global interrupt</description>
  9932. <value>49</value>
  9933. </interrupt>
  9934. <registers>
  9935. <register> <name>POWER</name>
  9936. <displayName>POWER</displayName>
  9937. <description>power control register</description>
  9938. <addressOffset>0x0</addressOffset>
  9939. <size>0x20</size>
  9940. <access>read-write</access>
  9941. <resetValue>0x00000000</resetValue>
  9942. <fields>
  9943. <field> <name>PWRCTRL</name>
  9944. <description>PWRCTRL</description>
  9945. <bitOffset>0</bitOffset>
  9946. <bitWidth>2</bitWidth>
  9947. </field>
  9948. </fields>
  9949. </register>
  9950. <register> <name>CLKCR</name>
  9951. <displayName>CLKCR</displayName>
  9952. <description>SDI clock control register</description>
  9953. <addressOffset>0x4</addressOffset>
  9954. <size>0x20</size>
  9955. <access>read-write</access>
  9956. <resetValue>0x00000000</resetValue>
  9957. <fields>
  9958. <field> <name>HWFC_EN</name>
  9959. <description>HW Flow Control enable</description>
  9960. <bitOffset>14</bitOffset>
  9961. <bitWidth>1</bitWidth>
  9962. </field>
  9963. <field> <name>NEGEDGE</name>
  9964. <description>SDIO_CK dephasing selection
  9965. bit</description>
  9966. <bitOffset>13</bitOffset>
  9967. <bitWidth>1</bitWidth>
  9968. </field>
  9969. <field> <name>WIDBUS</name>
  9970. <description>Wide bus mode enable bit</description>
  9971. <bitOffset>11</bitOffset>
  9972. <bitWidth>2</bitWidth>
  9973. </field>
  9974. <field> <name>BYPASS</name>
  9975. <description>Clock divider bypass enable
  9976. bit</description>
  9977. <bitOffset>10</bitOffset>
  9978. <bitWidth>1</bitWidth>
  9979. </field>
  9980. <field> <name>PWRSAV</name>
  9981. <description>Power saving configuration
  9982. bit</description>
  9983. <bitOffset>9</bitOffset>
  9984. <bitWidth>1</bitWidth>
  9985. </field>
  9986. <field> <name>CLKEN</name>
  9987. <description>Clock enable bit</description>
  9988. <bitOffset>8</bitOffset>
  9989. <bitWidth>1</bitWidth>
  9990. </field>
  9991. <field> <name>CLKDIV</name>
  9992. <description>Clock divide factor</description>
  9993. <bitOffset>0</bitOffset>
  9994. <bitWidth>8</bitWidth>
  9995. </field>
  9996. </fields>
  9997. </register>
  9998. <register> <name>ARG</name>
  9999. <displayName>ARG</displayName>
  10000. <description>argument register</description>
  10001. <addressOffset>0x8</addressOffset>
  10002. <size>0x20</size>
  10003. <access>read-write</access>
  10004. <resetValue>0x00000000</resetValue>
  10005. <fields>
  10006. <field> <name>CMDARG</name>
  10007. <description>Command argument</description>
  10008. <bitOffset>0</bitOffset>
  10009. <bitWidth>32</bitWidth>
  10010. </field>
  10011. </fields>
  10012. </register>
  10013. <register> <name>CMD</name>
  10014. <displayName>CMD</displayName>
  10015. <description>command register</description>
  10016. <addressOffset>0xC</addressOffset>
  10017. <size>0x20</size>
  10018. <access>read-write</access>
  10019. <resetValue>0x00000000</resetValue>
  10020. <fields>
  10021. <field> <name>CE_ATACMD</name>
  10022. <description>CE-ATA command</description>
  10023. <bitOffset>14</bitOffset>
  10024. <bitWidth>1</bitWidth>
  10025. </field>
  10026. <field> <name>nIEN</name>
  10027. <description>not Interrupt Enable</description>
  10028. <bitOffset>13</bitOffset>
  10029. <bitWidth>1</bitWidth>
  10030. </field>
  10031. <field> <name>ENCMDcompl</name>
  10032. <description>Enable CMD completion</description>
  10033. <bitOffset>12</bitOffset>
  10034. <bitWidth>1</bitWidth>
  10035. </field>
  10036. <field> <name>SDIOSuspend</name>
  10037. <description>SD I/O suspend command</description>
  10038. <bitOffset>11</bitOffset>
  10039. <bitWidth>1</bitWidth>
  10040. </field>
  10041. <field> <name>CPSMEN</name>
  10042. <description>Command path state machine (CPSM) Enable
  10043. bit</description>
  10044. <bitOffset>10</bitOffset>
  10045. <bitWidth>1</bitWidth>
  10046. </field>
  10047. <field> <name>WAITPEND</name>
  10048. <description>CPSM Waits for ends of data transfer
  10049. (CmdPend internal signal).</description>
  10050. <bitOffset>9</bitOffset>
  10051. <bitWidth>1</bitWidth>
  10052. </field>
  10053. <field> <name>WAITINT</name>
  10054. <description>CPSM waits for interrupt
  10055. request</description>
  10056. <bitOffset>8</bitOffset>
  10057. <bitWidth>1</bitWidth>
  10058. </field>
  10059. <field> <name>WAITRESP</name>
  10060. <description>Wait for response bits</description>
  10061. <bitOffset>6</bitOffset>
  10062. <bitWidth>2</bitWidth>
  10063. </field>
  10064. <field> <name>CMDINDEX</name>
  10065. <description>Command index</description>
  10066. <bitOffset>0</bitOffset>
  10067. <bitWidth>6</bitWidth>
  10068. </field>
  10069. </fields>
  10070. </register>
  10071. <register> <name>RESPCMD</name>
  10072. <displayName>RESPCMD</displayName>
  10073. <description>command response register</description>
  10074. <addressOffset>0x10</addressOffset>
  10075. <size>0x20</size>
  10076. <access>read-only</access>
  10077. <resetValue>0x00000000</resetValue>
  10078. <fields>
  10079. <field> <name>RESPCMD</name>
  10080. <description>Response command index</description>
  10081. <bitOffset>0</bitOffset>
  10082. <bitWidth>6</bitWidth>
  10083. </field>
  10084. </fields>
  10085. </register>
  10086. <register> <name>RESP1</name>
  10087. <displayName>RESP1</displayName>
  10088. <description>response 1..4 register</description>
  10089. <addressOffset>0x14</addressOffset>
  10090. <size>0x20</size>
  10091. <access>read-only</access>
  10092. <resetValue>0x00000000</resetValue>
  10093. <fields>
  10094. <field> <name>CARDSTATUS1</name>
  10095. <description>see Table 132.</description>
  10096. <bitOffset>0</bitOffset>
  10097. <bitWidth>32</bitWidth>
  10098. </field>
  10099. </fields>
  10100. </register>
  10101. <register> <name>RESP2</name>
  10102. <displayName>RESP2</displayName>
  10103. <description>response 1..4 register</description>
  10104. <addressOffset>0x18</addressOffset>
  10105. <size>0x20</size>
  10106. <access>read-only</access>
  10107. <resetValue>0x00000000</resetValue>
  10108. <fields>
  10109. <field> <name>CARDSTATUS2</name>
  10110. <description>see Table 132.</description>
  10111. <bitOffset>0</bitOffset>
  10112. <bitWidth>32</bitWidth>
  10113. </field>
  10114. </fields>
  10115. </register>
  10116. <register> <name>RESP3</name>
  10117. <displayName>RESP3</displayName>
  10118. <description>response 1..4 register</description>
  10119. <addressOffset>0x1C</addressOffset>
  10120. <size>0x20</size>
  10121. <access>read-only</access>
  10122. <resetValue>0x00000000</resetValue>
  10123. <fields>
  10124. <field> <name>CARDSTATUS3</name>
  10125. <description>see Table 132.</description>
  10126. <bitOffset>0</bitOffset>
  10127. <bitWidth>32</bitWidth>
  10128. </field>
  10129. </fields>
  10130. </register>
  10131. <register> <name>RESP4</name>
  10132. <displayName>RESP4</displayName>
  10133. <description>response 1..4 register</description>
  10134. <addressOffset>0x20</addressOffset>
  10135. <size>0x20</size>
  10136. <access>read-only</access>
  10137. <resetValue>0x00000000</resetValue>
  10138. <fields>
  10139. <field> <name>CARDSTATUS4</name>
  10140. <description>see Table 132.</description>
  10141. <bitOffset>0</bitOffset>
  10142. <bitWidth>32</bitWidth>
  10143. </field>
  10144. </fields>
  10145. </register>
  10146. <register> <name>DTIMER</name>
  10147. <displayName>DTIMER</displayName>
  10148. <description>data timer register</description>
  10149. <addressOffset>0x24</addressOffset>
  10150. <size>0x20</size>
  10151. <access>read-write</access>
  10152. <resetValue>0x00000000</resetValue>
  10153. <fields>
  10154. <field> <name>DATATIME</name>
  10155. <description>Data timeout period</description>
  10156. <bitOffset>0</bitOffset>
  10157. <bitWidth>32</bitWidth>
  10158. </field>
  10159. </fields>
  10160. </register>
  10161. <register> <name>DLEN</name>
  10162. <displayName>DLEN</displayName>
  10163. <description>data length register</description>
  10164. <addressOffset>0x28</addressOffset>
  10165. <size>0x20</size>
  10166. <access>read-write</access>
  10167. <resetValue>0x00000000</resetValue>
  10168. <fields>
  10169. <field> <name>DATALENGTH</name>
  10170. <description>Data length value</description>
  10171. <bitOffset>0</bitOffset>
  10172. <bitWidth>25</bitWidth>
  10173. </field>
  10174. </fields>
  10175. </register>
  10176. <register> <name>DCTRL</name>
  10177. <displayName>DCTRL</displayName>
  10178. <description>data control register</description>
  10179. <addressOffset>0x2C</addressOffset>
  10180. <size>0x20</size>
  10181. <access>read-write</access>
  10182. <resetValue>0x00000000</resetValue>
  10183. <fields>
  10184. <field> <name>SDIOEN</name>
  10185. <description>SD I/O enable functions</description>
  10186. <bitOffset>11</bitOffset>
  10187. <bitWidth>1</bitWidth>
  10188. </field>
  10189. <field> <name>RWMOD</name>
  10190. <description>Read wait mode</description>
  10191. <bitOffset>10</bitOffset>
  10192. <bitWidth>1</bitWidth>
  10193. </field>
  10194. <field> <name>RWSTOP</name>
  10195. <description>Read wait stop</description>
  10196. <bitOffset>9</bitOffset>
  10197. <bitWidth>1</bitWidth>
  10198. </field>
  10199. <field> <name>RWSTART</name>
  10200. <description>Read wait start</description>
  10201. <bitOffset>8</bitOffset>
  10202. <bitWidth>1</bitWidth>
  10203. </field>
  10204. <field> <name>DBLOCKSIZE</name>
  10205. <description>Data block size</description>
  10206. <bitOffset>4</bitOffset>
  10207. <bitWidth>4</bitWidth>
  10208. </field>
  10209. <field> <name>DMAEN</name>
  10210. <description>DMA enable bit</description>
  10211. <bitOffset>3</bitOffset>
  10212. <bitWidth>1</bitWidth>
  10213. </field>
  10214. <field> <name>DTMODE</name>
  10215. <description>Data transfer mode selection 1: Stream
  10216. or SDIO multibyte data transfer.</description>
  10217. <bitOffset>2</bitOffset>
  10218. <bitWidth>1</bitWidth>
  10219. </field>
  10220. <field> <name>DTDIR</name>
  10221. <description>Data transfer direction
  10222. selection</description>
  10223. <bitOffset>1</bitOffset>
  10224. <bitWidth>1</bitWidth>
  10225. </field>
  10226. <field> <name>DTEN</name>
  10227. <description>DTEN</description>
  10228. <bitOffset>0</bitOffset>
  10229. <bitWidth>1</bitWidth>
  10230. </field>
  10231. </fields>
  10232. </register>
  10233. <register> <name>DCOUNT</name>
  10234. <displayName>DCOUNT</displayName>
  10235. <description>data counter register</description>
  10236. <addressOffset>0x30</addressOffset>
  10237. <size>0x20</size>
  10238. <access>read-only</access>
  10239. <resetValue>0x00000000</resetValue>
  10240. <fields>
  10241. <field> <name>DATACOUNT</name>
  10242. <description>Data count value</description>
  10243. <bitOffset>0</bitOffset>
  10244. <bitWidth>25</bitWidth>
  10245. </field>
  10246. </fields>
  10247. </register>
  10248. <register> <name>STA</name>
  10249. <displayName>STA</displayName>
  10250. <description>status register</description>
  10251. <addressOffset>0x34</addressOffset>
  10252. <size>0x20</size>
  10253. <access>read-only</access>
  10254. <resetValue>0x00000000</resetValue>
  10255. <fields>
  10256. <field> <name>CEATAEND</name>
  10257. <description>CE-ATA command completion signal
  10258. received for CMD61</description>
  10259. <bitOffset>23</bitOffset>
  10260. <bitWidth>1</bitWidth>
  10261. </field>
  10262. <field> <name>SDIOIT</name>
  10263. <description>SDIO interrupt received</description>
  10264. <bitOffset>22</bitOffset>
  10265. <bitWidth>1</bitWidth>
  10266. </field>
  10267. <field> <name>RXDAVL</name>
  10268. <description>Data available in receive
  10269. FIFO</description>
  10270. <bitOffset>21</bitOffset>
  10271. <bitWidth>1</bitWidth>
  10272. </field>
  10273. <field> <name>TXDAVL</name>
  10274. <description>Data available in transmit
  10275. FIFO</description>
  10276. <bitOffset>20</bitOffset>
  10277. <bitWidth>1</bitWidth>
  10278. </field>
  10279. <field> <name>RXFIFOE</name>
  10280. <description>Receive FIFO empty</description>
  10281. <bitOffset>19</bitOffset>
  10282. <bitWidth>1</bitWidth>
  10283. </field>
  10284. <field> <name>TXFIFOE</name>
  10285. <description>Transmit FIFO empty</description>
  10286. <bitOffset>18</bitOffset>
  10287. <bitWidth>1</bitWidth>
  10288. </field>
  10289. <field> <name>RXFIFOF</name>
  10290. <description>Receive FIFO full</description>
  10291. <bitOffset>17</bitOffset>
  10292. <bitWidth>1</bitWidth>
  10293. </field>
  10294. <field> <name>TXFIFOF</name>
  10295. <description>Transmit FIFO full</description>
  10296. <bitOffset>16</bitOffset>
  10297. <bitWidth>1</bitWidth>
  10298. </field>
  10299. <field> <name>RXFIFOHF</name>
  10300. <description>Receive FIFO half full: there are at
  10301. least 8 words in the FIFO</description>
  10302. <bitOffset>15</bitOffset>
  10303. <bitWidth>1</bitWidth>
  10304. </field>
  10305. <field> <name>TXFIFOHE</name>
  10306. <description>Transmit FIFO half empty: at least 8
  10307. words can be written into the FIFO</description>
  10308. <bitOffset>14</bitOffset>
  10309. <bitWidth>1</bitWidth>
  10310. </field>
  10311. <field> <name>RXACT</name>
  10312. <description>Data receive in progress</description>
  10313. <bitOffset>13</bitOffset>
  10314. <bitWidth>1</bitWidth>
  10315. </field>
  10316. <field> <name>TXACT</name>
  10317. <description>Data transmit in progress</description>
  10318. <bitOffset>12</bitOffset>
  10319. <bitWidth>1</bitWidth>
  10320. </field>
  10321. <field> <name>CMDACT</name>
  10322. <description>Command transfer in
  10323. progress</description>
  10324. <bitOffset>11</bitOffset>
  10325. <bitWidth>1</bitWidth>
  10326. </field>
  10327. <field> <name>DBCKEND</name>
  10328. <description>Data block sent/received (CRC check
  10329. passed)</description>
  10330. <bitOffset>10</bitOffset>
  10331. <bitWidth>1</bitWidth>
  10332. </field>
  10333. <field> <name>STBITERR</name>
  10334. <description>Start bit not detected on all data
  10335. signals in wide bus mode</description>
  10336. <bitOffset>9</bitOffset>
  10337. <bitWidth>1</bitWidth>
  10338. </field>
  10339. <field> <name>DATAEND</name>
  10340. <description>Data end (data counter, SDIDCOUNT, is
  10341. zero)</description>
  10342. <bitOffset>8</bitOffset>
  10343. <bitWidth>1</bitWidth>
  10344. </field>
  10345. <field> <name>CMDSENT</name>
  10346. <description>Command sent (no response
  10347. required)</description>
  10348. <bitOffset>7</bitOffset>
  10349. <bitWidth>1</bitWidth>
  10350. </field>
  10351. <field> <name>CMDREND</name>
  10352. <description>Command response received (CRC check
  10353. passed)</description>
  10354. <bitOffset>6</bitOffset>
  10355. <bitWidth>1</bitWidth>
  10356. </field>
  10357. <field> <name>RXOVERR</name>
  10358. <description>Received FIFO overrun
  10359. error</description>
  10360. <bitOffset>5</bitOffset>
  10361. <bitWidth>1</bitWidth>
  10362. </field>
  10363. <field> <name>TXUNDERR</name>
  10364. <description>Transmit FIFO underrun
  10365. error</description>
  10366. <bitOffset>4</bitOffset>
  10367. <bitWidth>1</bitWidth>
  10368. </field>
  10369. <field> <name>DTIMEOUT</name>
  10370. <description>Data timeout</description>
  10371. <bitOffset>3</bitOffset>
  10372. <bitWidth>1</bitWidth>
  10373. </field>
  10374. <field> <name>CTIMEOUT</name>
  10375. <description>Command response timeout</description>
  10376. <bitOffset>2</bitOffset>
  10377. <bitWidth>1</bitWidth>
  10378. </field>
  10379. <field> <name>DCRCFAIL</name>
  10380. <description>Data block sent/received (CRC check
  10381. failed)</description>
  10382. <bitOffset>1</bitOffset>
  10383. <bitWidth>1</bitWidth>
  10384. </field>
  10385. <field> <name>CCRCFAIL</name>
  10386. <description>Command response received (CRC check
  10387. failed)</description>
  10388. <bitOffset>0</bitOffset>
  10389. <bitWidth>1</bitWidth>
  10390. </field>
  10391. </fields>
  10392. </register>
  10393. <register> <name>ICR</name>
  10394. <displayName>ICR</displayName>
  10395. <description>interrupt clear register</description>
  10396. <addressOffset>0x38</addressOffset>
  10397. <size>0x20</size>
  10398. <access>read-write</access>
  10399. <resetValue>0x00000000</resetValue>
  10400. <fields>
  10401. <field> <name>CEATAENDC</name>
  10402. <description>CEATAEND flag clear bit</description>
  10403. <bitOffset>23</bitOffset>
  10404. <bitWidth>1</bitWidth>
  10405. </field>
  10406. <field> <name>SDIOITC</name>
  10407. <description>SDIOIT flag clear bit</description>
  10408. <bitOffset>22</bitOffset>
  10409. <bitWidth>1</bitWidth>
  10410. </field>
  10411. <field> <name>DBCKENDC</name>
  10412. <description>DBCKEND flag clear bit</description>
  10413. <bitOffset>10</bitOffset>
  10414. <bitWidth>1</bitWidth>
  10415. </field>
  10416. <field> <name>STBITERRC</name>
  10417. <description>STBITERR flag clear bit</description>
  10418. <bitOffset>9</bitOffset>
  10419. <bitWidth>1</bitWidth>
  10420. </field>
  10421. <field> <name>DATAENDC</name>
  10422. <description>DATAEND flag clear bit</description>
  10423. <bitOffset>8</bitOffset>
  10424. <bitWidth>1</bitWidth>
  10425. </field>
  10426. <field> <name>CMDSENTC</name>
  10427. <description>CMDSENT flag clear bit</description>
  10428. <bitOffset>7</bitOffset>
  10429. <bitWidth>1</bitWidth>
  10430. </field>
  10431. <field> <name>CMDRENDC</name>
  10432. <description>CMDREND flag clear bit</description>
  10433. <bitOffset>6</bitOffset>
  10434. <bitWidth>1</bitWidth>
  10435. </field>
  10436. <field> <name>RXOVERRC</name>
  10437. <description>RXOVERR flag clear bit</description>
  10438. <bitOffset>5</bitOffset>
  10439. <bitWidth>1</bitWidth>
  10440. </field>
  10441. <field> <name>TXUNDERRC</name>
  10442. <description>TXUNDERR flag clear bit</description>
  10443. <bitOffset>4</bitOffset>
  10444. <bitWidth>1</bitWidth>
  10445. </field>
  10446. <field> <name>DTIMEOUTC</name>
  10447. <description>DTIMEOUT flag clear bit</description>
  10448. <bitOffset>3</bitOffset>
  10449. <bitWidth>1</bitWidth>
  10450. </field>
  10451. <field> <name>CTIMEOUTC</name>
  10452. <description>CTIMEOUT flag clear bit</description>
  10453. <bitOffset>2</bitOffset>
  10454. <bitWidth>1</bitWidth>
  10455. </field>
  10456. <field> <name>DCRCFAILC</name>
  10457. <description>DCRCFAIL flag clear bit</description>
  10458. <bitOffset>1</bitOffset>
  10459. <bitWidth>1</bitWidth>
  10460. </field>
  10461. <field> <name>CCRCFAILC</name>
  10462. <description>CCRCFAIL flag clear bit</description>
  10463. <bitOffset>0</bitOffset>
  10464. <bitWidth>1</bitWidth>
  10465. </field>
  10466. </fields>
  10467. </register>
  10468. <register> <name>MASK</name>
  10469. <displayName>MASK</displayName>
  10470. <description>mask register</description>
  10471. <addressOffset>0x3C</addressOffset>
  10472. <size>0x20</size>
  10473. <access>read-write</access>
  10474. <resetValue>0x00000000</resetValue>
  10475. <fields>
  10476. <field> <name>CEATAENDIE</name>
  10477. <description>CE-ATA command completion signal
  10478. received interrupt enable</description>
  10479. <bitOffset>23</bitOffset>
  10480. <bitWidth>1</bitWidth>
  10481. </field>
  10482. <field> <name>SDIOITIE</name>
  10483. <description>SDIO mode interrupt received interrupt
  10484. enable</description>
  10485. <bitOffset>22</bitOffset>
  10486. <bitWidth>1</bitWidth>
  10487. </field>
  10488. <field> <name>RXDAVLIE</name>
  10489. <description>Data available in Rx FIFO interrupt
  10490. enable</description>
  10491. <bitOffset>21</bitOffset>
  10492. <bitWidth>1</bitWidth>
  10493. </field>
  10494. <field> <name>TXDAVLIE</name>
  10495. <description>Data available in Tx FIFO interrupt
  10496. enable</description>
  10497. <bitOffset>20</bitOffset>
  10498. <bitWidth>1</bitWidth>
  10499. </field>
  10500. <field> <name>RXFIFOEIE</name>
  10501. <description>Rx FIFO empty interrupt
  10502. enable</description>
  10503. <bitOffset>19</bitOffset>
  10504. <bitWidth>1</bitWidth>
  10505. </field>
  10506. <field> <name>TXFIFOEIE</name>
  10507. <description>Tx FIFO empty interrupt
  10508. enable</description>
  10509. <bitOffset>18</bitOffset>
  10510. <bitWidth>1</bitWidth>
  10511. </field>
  10512. <field> <name>RXFIFOFIE</name>
  10513. <description>Rx FIFO full interrupt
  10514. enable</description>
  10515. <bitOffset>17</bitOffset>
  10516. <bitWidth>1</bitWidth>
  10517. </field>
  10518. <field> <name>TXFIFOFIE</name>
  10519. <description>Tx FIFO full interrupt
  10520. enable</description>
  10521. <bitOffset>16</bitOffset>
  10522. <bitWidth>1</bitWidth>
  10523. </field>
  10524. <field> <name>RXFIFOHFIE</name>
  10525. <description>Rx FIFO half full interrupt
  10526. enable</description>
  10527. <bitOffset>15</bitOffset>
  10528. <bitWidth>1</bitWidth>
  10529. </field>
  10530. <field> <name>TXFIFOHEIE</name>
  10531. <description>Tx FIFO half empty interrupt
  10532. enable</description>
  10533. <bitOffset>14</bitOffset>
  10534. <bitWidth>1</bitWidth>
  10535. </field>
  10536. <field> <name>RXACTIE</name>
  10537. <description>Data receive acting interrupt
  10538. enable</description>
  10539. <bitOffset>13</bitOffset>
  10540. <bitWidth>1</bitWidth>
  10541. </field>
  10542. <field> <name>TXACTIE</name>
  10543. <description>Data transmit acting interrupt
  10544. enable</description>
  10545. <bitOffset>12</bitOffset>
  10546. <bitWidth>1</bitWidth>
  10547. </field>
  10548. <field> <name>CMDACTIE</name>
  10549. <description>Command acting interrupt
  10550. enable</description>
  10551. <bitOffset>11</bitOffset>
  10552. <bitWidth>1</bitWidth>
  10553. </field>
  10554. <field> <name>DBCKENDIE</name>
  10555. <description>Data block end interrupt
  10556. enable</description>
  10557. <bitOffset>10</bitOffset>
  10558. <bitWidth>1</bitWidth>
  10559. </field>
  10560. <field> <name>STBITERRIE</name>
  10561. <description>Start bit error interrupt
  10562. enable</description>
  10563. <bitOffset>9</bitOffset>
  10564. <bitWidth>1</bitWidth>
  10565. </field>
  10566. <field> <name>DATAENDIE</name>
  10567. <description>Data end interrupt enable</description>
  10568. <bitOffset>8</bitOffset>
  10569. <bitWidth>1</bitWidth>
  10570. </field>
  10571. <field> <name>CMDSENTIE</name>
  10572. <description>Command sent interrupt
  10573. enable</description>
  10574. <bitOffset>7</bitOffset>
  10575. <bitWidth>1</bitWidth>
  10576. </field>
  10577. <field> <name>CMDRENDIE</name>
  10578. <description>Command response received interrupt
  10579. enable</description>
  10580. <bitOffset>6</bitOffset>
  10581. <bitWidth>1</bitWidth>
  10582. </field>
  10583. <field> <name>RXOVERRIE</name>
  10584. <description>Rx FIFO overrun error interrupt
  10585. enable</description>
  10586. <bitOffset>5</bitOffset>
  10587. <bitWidth>1</bitWidth>
  10588. </field>
  10589. <field> <name>TXUNDERRIE</name>
  10590. <description>Tx FIFO underrun error interrupt
  10591. enable</description>
  10592. <bitOffset>4</bitOffset>
  10593. <bitWidth>1</bitWidth>
  10594. </field>
  10595. <field> <name>DTIMEOUTIE</name>
  10596. <description>Data timeout interrupt
  10597. enable</description>
  10598. <bitOffset>3</bitOffset>
  10599. <bitWidth>1</bitWidth>
  10600. </field>
  10601. <field> <name>CTIMEOUTIE</name>
  10602. <description>Command timeout interrupt
  10603. enable</description>
  10604. <bitOffset>2</bitOffset>
  10605. <bitWidth>1</bitWidth>
  10606. </field>
  10607. <field> <name>DCRCFAILIE</name>
  10608. <description>Data CRC fail interrupt
  10609. enable</description>
  10610. <bitOffset>1</bitOffset>
  10611. <bitWidth>1</bitWidth>
  10612. </field>
  10613. <field> <name>CCRCFAILIE</name>
  10614. <description>Command CRC fail interrupt
  10615. enable</description>
  10616. <bitOffset>0</bitOffset>
  10617. <bitWidth>1</bitWidth>
  10618. </field>
  10619. </fields>
  10620. </register>
  10621. <register> <name>FIFOCNT</name>
  10622. <displayName>FIFOCNT</displayName>
  10623. <description>FIFO counter register</description>
  10624. <addressOffset>0x48</addressOffset>
  10625. <size>0x20</size>
  10626. <access>read-only</access>
  10627. <resetValue>0x00000000</resetValue>
  10628. <fields>
  10629. <field> <name>FIFOCOUNT</name>
  10630. <description>Remaining number of words to be written
  10631. to or read from the FIFO.</description>
  10632. <bitOffset>0</bitOffset>
  10633. <bitWidth>24</bitWidth>
  10634. </field>
  10635. </fields>
  10636. </register>
  10637. <register> <name>FIFO</name>
  10638. <displayName>FIFO</displayName>
  10639. <description>data FIFO register</description>
  10640. <addressOffset>0x80</addressOffset>
  10641. <size>0x20</size>
  10642. <access>read-write</access>
  10643. <resetValue>0x00000000</resetValue>
  10644. <fields>
  10645. <field> <name>FIFOData</name>
  10646. <description>Receive and transmit FIFO
  10647. data</description>
  10648. <bitOffset>0</bitOffset>
  10649. <bitWidth>32</bitWidth>
  10650. </field>
  10651. </fields>
  10652. </register>
  10653. </registers>
  10654. </peripheral>
  10655. <peripheral> <name>ADC1</name>
  10656. <description>Analog-to-digital converter</description>
  10657. <groupName>ADC</groupName>
  10658. <baseAddress>0x40012000</baseAddress>
  10659. <addressBlock>
  10660. <offset>0x0</offset>
  10661. <size>0x400</size>
  10662. <usage>registers</usage>
  10663. </addressBlock>
  10664. <interrupt>
  10665. <name>ADC</name>
  10666. <description>ADC1 global interrupt</description>
  10667. <value>18</value>
  10668. </interrupt>
  10669. <registers>
  10670. <register> <name>SR</name>
  10671. <displayName>SR</displayName>
  10672. <description>status register</description>
  10673. <addressOffset>0x0</addressOffset>
  10674. <size>0x20</size>
  10675. <access>read-write</access>
  10676. <resetValue>0x00000000</resetValue>
  10677. <fields>
  10678. <field> <name>OVR</name>
  10679. <description>Overrun</description>
  10680. <bitOffset>5</bitOffset>
  10681. <bitWidth>1</bitWidth>
  10682. </field>
  10683. <field> <name>STRT</name>
  10684. <description>Regular channel start flag</description>
  10685. <bitOffset>4</bitOffset>
  10686. <bitWidth>1</bitWidth>
  10687. </field>
  10688. <field> <name>JSTRT</name>
  10689. <description>Injected channel start
  10690. flag</description>
  10691. <bitOffset>3</bitOffset>
  10692. <bitWidth>1</bitWidth>
  10693. </field>
  10694. <field> <name>JEOC</name>
  10695. <description>Injected channel end of
  10696. conversion</description>
  10697. <bitOffset>2</bitOffset>
  10698. <bitWidth>1</bitWidth>
  10699. </field>
  10700. <field> <name>EOC</name>
  10701. <description>Regular channel end of
  10702. conversion</description>
  10703. <bitOffset>1</bitOffset>
  10704. <bitWidth>1</bitWidth>
  10705. </field>
  10706. <field> <name>AWD</name>
  10707. <description>Analog watchdog flag</description>
  10708. <bitOffset>0</bitOffset>
  10709. <bitWidth>1</bitWidth>
  10710. </field>
  10711. </fields>
  10712. </register>
  10713. <register> <name>CR1</name>
  10714. <displayName>CR1</displayName>
  10715. <description>control register 1</description>
  10716. <addressOffset>0x4</addressOffset>
  10717. <size>0x20</size>
  10718. <access>read-write</access>
  10719. <resetValue>0x00000000</resetValue>
  10720. <fields>
  10721. <field> <name>OVRIE</name>
  10722. <description>Overrun interrupt enable</description>
  10723. <bitOffset>26</bitOffset>
  10724. <bitWidth>1</bitWidth>
  10725. </field>
  10726. <field> <name>RES</name>
  10727. <description>Resolution</description>
  10728. <bitOffset>24</bitOffset>
  10729. <bitWidth>2</bitWidth>
  10730. </field>
  10731. <field> <name>AWDEN</name>
  10732. <description>Analog watchdog enable on regular
  10733. channels</description>
  10734. <bitOffset>23</bitOffset>
  10735. <bitWidth>1</bitWidth>
  10736. </field>
  10737. <field> <name>JAWDEN</name>
  10738. <description>Analog watchdog enable on injected
  10739. channels</description>
  10740. <bitOffset>22</bitOffset>
  10741. <bitWidth>1</bitWidth>
  10742. </field>
  10743. <field> <name>DISCNUM</name>
  10744. <description>Discontinuous mode channel
  10745. count</description>
  10746. <bitOffset>13</bitOffset>
  10747. <bitWidth>3</bitWidth>
  10748. </field>
  10749. <field> <name>JDISCEN</name>
  10750. <description>Discontinuous mode on injected
  10751. channels</description>
  10752. <bitOffset>12</bitOffset>
  10753. <bitWidth>1</bitWidth>
  10754. </field>
  10755. <field> <name>DISCEN</name>
  10756. <description>Discontinuous mode on regular
  10757. channels</description>
  10758. <bitOffset>11</bitOffset>
  10759. <bitWidth>1</bitWidth>
  10760. </field>
  10761. <field> <name>JAUTO</name>
  10762. <description>Automatic injected group
  10763. conversion</description>
  10764. <bitOffset>10</bitOffset>
  10765. <bitWidth>1</bitWidth>
  10766. </field>
  10767. <field> <name>AWDSGL</name>
  10768. <description>Enable the watchdog on a single channel
  10769. in scan mode</description>
  10770. <bitOffset>9</bitOffset>
  10771. <bitWidth>1</bitWidth>
  10772. </field>
  10773. <field> <name>SCAN</name>
  10774. <description>Scan mode</description>
  10775. <bitOffset>8</bitOffset>
  10776. <bitWidth>1</bitWidth>
  10777. </field>
  10778. <field> <name>JEOCIE</name>
  10779. <description>Interrupt enable for injected
  10780. channels</description>
  10781. <bitOffset>7</bitOffset>
  10782. <bitWidth>1</bitWidth>
  10783. </field>
  10784. <field> <name>AWDIE</name>
  10785. <description>Analog watchdog interrupt
  10786. enable</description>
  10787. <bitOffset>6</bitOffset>
  10788. <bitWidth>1</bitWidth>
  10789. </field>
  10790. <field> <name>EOCIE</name>
  10791. <description>Interrupt enable for EOC</description>
  10792. <bitOffset>5</bitOffset>
  10793. <bitWidth>1</bitWidth>
  10794. </field>
  10795. <field> <name>AWDCH</name>
  10796. <description>Analog watchdog channel select
  10797. bits</description>
  10798. <bitOffset>0</bitOffset>
  10799. <bitWidth>5</bitWidth>
  10800. </field>
  10801. </fields>
  10802. </register>
  10803. <register> <name>CR2</name>
  10804. <displayName>CR2</displayName>
  10805. <description>control register 2</description>
  10806. <addressOffset>0x8</addressOffset>
  10807. <size>0x20</size>
  10808. <access>read-write</access>
  10809. <resetValue>0x00000000</resetValue>
  10810. <fields>
  10811. <field> <name>SWSTART</name>
  10812. <description>Start conversion of regular
  10813. channels</description>
  10814. <bitOffset>30</bitOffset>
  10815. <bitWidth>1</bitWidth>
  10816. </field>
  10817. <field> <name>EXTEN</name>
  10818. <description>External trigger enable for regular
  10819. channels</description>
  10820. <bitOffset>28</bitOffset>
  10821. <bitWidth>2</bitWidth>
  10822. </field>
  10823. <field> <name>EXTSEL</name>
  10824. <description>External event select for regular
  10825. group</description>
  10826. <bitOffset>24</bitOffset>
  10827. <bitWidth>4</bitWidth>
  10828. </field>
  10829. <field> <name>JSWSTART</name>
  10830. <description>Start conversion of injected
  10831. channels</description>
  10832. <bitOffset>22</bitOffset>
  10833. <bitWidth>1</bitWidth>
  10834. </field>
  10835. <field> <name>JEXTEN</name>
  10836. <description>External trigger enable for injected
  10837. channels</description>
  10838. <bitOffset>20</bitOffset>
  10839. <bitWidth>2</bitWidth>
  10840. </field>
  10841. <field> <name>JEXTSEL</name>
  10842. <description>External event select for injected
  10843. group</description>
  10844. <bitOffset>16</bitOffset>
  10845. <bitWidth>4</bitWidth>
  10846. </field>
  10847. <field> <name>ALIGN</name>
  10848. <description>Data alignment</description>
  10849. <bitOffset>11</bitOffset>
  10850. <bitWidth>1</bitWidth>
  10851. </field>
  10852. <field> <name>EOCS</name>
  10853. <description>End of conversion
  10854. selection</description>
  10855. <bitOffset>10</bitOffset>
  10856. <bitWidth>1</bitWidth>
  10857. </field>
  10858. <field> <name>DDS</name>
  10859. <description>DMA disable selection (for single ADC
  10860. mode)</description>
  10861. <bitOffset>9</bitOffset>
  10862. <bitWidth>1</bitWidth>
  10863. </field>
  10864. <field> <name>DMA</name>
  10865. <description>Direct memory access mode (for single
  10866. ADC mode)</description>
  10867. <bitOffset>8</bitOffset>
  10868. <bitWidth>1</bitWidth>
  10869. </field>
  10870. <field> <name>CONT</name>
  10871. <description>Continuous conversion</description>
  10872. <bitOffset>1</bitOffset>
  10873. <bitWidth>1</bitWidth>
  10874. </field>
  10875. <field> <name>ADON</name>
  10876. <description>A/D Converter ON / OFF</description>
  10877. <bitOffset>0</bitOffset>
  10878. <bitWidth>1</bitWidth>
  10879. </field>
  10880. </fields>
  10881. </register>
  10882. <register> <name>SMPR1</name>
  10883. <displayName>SMPR1</displayName>
  10884. <description>sample time register 1</description>
  10885. <addressOffset>0xC</addressOffset>
  10886. <size>0x20</size>
  10887. <access>read-write</access>
  10888. <resetValue>0x00000000</resetValue>
  10889. <fields>
  10890. <field> <name>SMPx_x</name>
  10891. <description>Sample time bits</description>
  10892. <bitOffset>0</bitOffset>
  10893. <bitWidth>32</bitWidth>
  10894. </field>
  10895. </fields>
  10896. </register>
  10897. <register> <name>SMPR2</name>
  10898. <displayName>SMPR2</displayName>
  10899. <description>sample time register 2</description>
  10900. <addressOffset>0x10</addressOffset>
  10901. <size>0x20</size>
  10902. <access>read-write</access>
  10903. <resetValue>0x00000000</resetValue>
  10904. <fields>
  10905. <field> <name>SMPx_x</name>
  10906. <description>Sample time bits</description>
  10907. <bitOffset>0</bitOffset>
  10908. <bitWidth>32</bitWidth>
  10909. </field>
  10910. </fields>
  10911. </register>
  10912. <register> <name>JOFR1</name>
  10913. <displayName>JOFR1</displayName>
  10914. <description>injected channel data offset register
  10915. x</description>
  10916. <addressOffset>0x14</addressOffset>
  10917. <size>0x20</size>
  10918. <access>read-write</access>
  10919. <resetValue>0x00000000</resetValue>
  10920. <fields>
  10921. <field> <name>JOFFSET1</name>
  10922. <description>Data offset for injected channel
  10923. x</description>
  10924. <bitOffset>0</bitOffset>
  10925. <bitWidth>12</bitWidth>
  10926. </field>
  10927. </fields>
  10928. </register>
  10929. <register> <name>JOFR2</name>
  10930. <displayName>JOFR2</displayName>
  10931. <description>injected channel data offset register
  10932. x</description>
  10933. <addressOffset>0x18</addressOffset>
  10934. <size>0x20</size>
  10935. <access>read-write</access>
  10936. <resetValue>0x00000000</resetValue>
  10937. <fields>
  10938. <field> <name>JOFFSET2</name>
  10939. <description>Data offset for injected channel
  10940. x</description>
  10941. <bitOffset>0</bitOffset>
  10942. <bitWidth>12</bitWidth>
  10943. </field>
  10944. </fields>
  10945. </register>
  10946. <register> <name>JOFR3</name>
  10947. <displayName>JOFR3</displayName>
  10948. <description>injected channel data offset register
  10949. x</description>
  10950. <addressOffset>0x1C</addressOffset>
  10951. <size>0x20</size>
  10952. <access>read-write</access>
  10953. <resetValue>0x00000000</resetValue>
  10954. <fields>
  10955. <field> <name>JOFFSET3</name>
  10956. <description>Data offset for injected channel
  10957. x</description>
  10958. <bitOffset>0</bitOffset>
  10959. <bitWidth>12</bitWidth>
  10960. </field>
  10961. </fields>
  10962. </register>
  10963. <register> <name>JOFR4</name>
  10964. <displayName>JOFR4</displayName>
  10965. <description>injected channel data offset register
  10966. x</description>
  10967. <addressOffset>0x20</addressOffset>
  10968. <size>0x20</size>
  10969. <access>read-write</access>
  10970. <resetValue>0x00000000</resetValue>
  10971. <fields>
  10972. <field> <name>JOFFSET4</name>
  10973. <description>Data offset for injected channel
  10974. x</description>
  10975. <bitOffset>0</bitOffset>
  10976. <bitWidth>12</bitWidth>
  10977. </field>
  10978. </fields>
  10979. </register>
  10980. <register> <name>HTR</name>
  10981. <displayName>HTR</displayName>
  10982. <description>watchdog higher threshold
  10983. register</description>
  10984. <addressOffset>0x24</addressOffset>
  10985. <size>0x20</size>
  10986. <access>read-write</access>
  10987. <resetValue>0x00000FFF</resetValue>
  10988. <fields>
  10989. <field> <name>HT</name>
  10990. <description>Analog watchdog higher
  10991. threshold</description>
  10992. <bitOffset>0</bitOffset>
  10993. <bitWidth>12</bitWidth>
  10994. </field>
  10995. </fields>
  10996. </register>
  10997. <register> <name>LTR</name>
  10998. <displayName>LTR</displayName>
  10999. <description>watchdog lower threshold
  11000. register</description>
  11001. <addressOffset>0x28</addressOffset>
  11002. <size>0x20</size>
  11003. <access>read-write</access>
  11004. <resetValue>0x00000000</resetValue>
  11005. <fields>
  11006. <field> <name>LT</name>
  11007. <description>Analog watchdog lower
  11008. threshold</description>
  11009. <bitOffset>0</bitOffset>
  11010. <bitWidth>12</bitWidth>
  11011. </field>
  11012. </fields>
  11013. </register>
  11014. <register> <name>SQR1</name>
  11015. <displayName>SQR1</displayName>
  11016. <description>regular sequence register 1</description>
  11017. <addressOffset>0x2C</addressOffset>
  11018. <size>0x20</size>
  11019. <access>read-write</access>
  11020. <resetValue>0x00000000</resetValue>
  11021. <fields>
  11022. <field> <name>L</name>
  11023. <description>Regular channel sequence
  11024. length</description>
  11025. <bitOffset>20</bitOffset>
  11026. <bitWidth>4</bitWidth>
  11027. </field>
  11028. <field> <name>SQ16</name>
  11029. <description>16th conversion in regular
  11030. sequence</description>
  11031. <bitOffset>15</bitOffset>
  11032. <bitWidth>5</bitWidth>
  11033. </field>
  11034. <field> <name>SQ15</name>
  11035. <description>15th conversion in regular
  11036. sequence</description>
  11037. <bitOffset>10</bitOffset>
  11038. <bitWidth>5</bitWidth>
  11039. </field>
  11040. <field> <name>SQ14</name>
  11041. <description>14th conversion in regular
  11042. sequence</description>
  11043. <bitOffset>5</bitOffset>
  11044. <bitWidth>5</bitWidth>
  11045. </field>
  11046. <field> <name>SQ13</name>
  11047. <description>13th conversion in regular
  11048. sequence</description>
  11049. <bitOffset>0</bitOffset>
  11050. <bitWidth>5</bitWidth>
  11051. </field>
  11052. </fields>
  11053. </register>
  11054. <register> <name>SQR2</name>
  11055. <displayName>SQR2</displayName>
  11056. <description>regular sequence register 2</description>
  11057. <addressOffset>0x30</addressOffset>
  11058. <size>0x20</size>
  11059. <access>read-write</access>
  11060. <resetValue>0x00000000</resetValue>
  11061. <fields>
  11062. <field> <name>SQ12</name>
  11063. <description>12th conversion in regular
  11064. sequence</description>
  11065. <bitOffset>25</bitOffset>
  11066. <bitWidth>5</bitWidth>
  11067. </field>
  11068. <field> <name>SQ11</name>
  11069. <description>11th conversion in regular
  11070. sequence</description>
  11071. <bitOffset>20</bitOffset>
  11072. <bitWidth>5</bitWidth>
  11073. </field>
  11074. <field> <name>SQ10</name>
  11075. <description>10th conversion in regular
  11076. sequence</description>
  11077. <bitOffset>15</bitOffset>
  11078. <bitWidth>5</bitWidth>
  11079. </field>
  11080. <field> <name>SQ9</name>
  11081. <description>9th conversion in regular
  11082. sequence</description>
  11083. <bitOffset>10</bitOffset>
  11084. <bitWidth>5</bitWidth>
  11085. </field>
  11086. <field> <name>SQ8</name>
  11087. <description>8th conversion in regular
  11088. sequence</description>
  11089. <bitOffset>5</bitOffset>
  11090. <bitWidth>5</bitWidth>
  11091. </field>
  11092. <field> <name>SQ7</name>
  11093. <description>7th conversion in regular
  11094. sequence</description>
  11095. <bitOffset>0</bitOffset>
  11096. <bitWidth>5</bitWidth>
  11097. </field>
  11098. </fields>
  11099. </register>
  11100. <register> <name>SQR3</name>
  11101. <displayName>SQR3</displayName>
  11102. <description>regular sequence register 3</description>
  11103. <addressOffset>0x34</addressOffset>
  11104. <size>0x20</size>
  11105. <access>read-write</access>
  11106. <resetValue>0x00000000</resetValue>
  11107. <fields>
  11108. <field> <name>SQ6</name>
  11109. <description>6th conversion in regular
  11110. sequence</description>
  11111. <bitOffset>25</bitOffset>
  11112. <bitWidth>5</bitWidth>
  11113. </field>
  11114. <field> <name>SQ5</name>
  11115. <description>5th conversion in regular
  11116. sequence</description>
  11117. <bitOffset>20</bitOffset>
  11118. <bitWidth>5</bitWidth>
  11119. </field>
  11120. <field> <name>SQ4</name>
  11121. <description>4th conversion in regular
  11122. sequence</description>
  11123. <bitOffset>15</bitOffset>
  11124. <bitWidth>5</bitWidth>
  11125. </field>
  11126. <field> <name>SQ3</name>
  11127. <description>3rd conversion in regular
  11128. sequence</description>
  11129. <bitOffset>10</bitOffset>
  11130. <bitWidth>5</bitWidth>
  11131. </field>
  11132. <field> <name>SQ2</name>
  11133. <description>2nd conversion in regular
  11134. sequence</description>
  11135. <bitOffset>5</bitOffset>
  11136. <bitWidth>5</bitWidth>
  11137. </field>
  11138. <field> <name>SQ1</name>
  11139. <description>1st conversion in regular
  11140. sequence</description>
  11141. <bitOffset>0</bitOffset>
  11142. <bitWidth>5</bitWidth>
  11143. </field>
  11144. </fields>
  11145. </register>
  11146. <register> <name>JSQR</name>
  11147. <displayName>JSQR</displayName>
  11148. <description>injected sequence register</description>
  11149. <addressOffset>0x38</addressOffset>
  11150. <size>0x20</size>
  11151. <access>read-write</access>
  11152. <resetValue>0x00000000</resetValue>
  11153. <fields>
  11154. <field> <name>JL</name>
  11155. <description>Injected sequence length</description>
  11156. <bitOffset>20</bitOffset>
  11157. <bitWidth>2</bitWidth>
  11158. </field>
  11159. <field> <name>JSQ4</name>
  11160. <description>4th conversion in injected
  11161. sequence</description>
  11162. <bitOffset>15</bitOffset>
  11163. <bitWidth>5</bitWidth>
  11164. </field>
  11165. <field> <name>JSQ3</name>
  11166. <description>3rd conversion in injected
  11167. sequence</description>
  11168. <bitOffset>10</bitOffset>
  11169. <bitWidth>5</bitWidth>
  11170. </field>
  11171. <field> <name>JSQ2</name>
  11172. <description>2nd conversion in injected
  11173. sequence</description>
  11174. <bitOffset>5</bitOffset>
  11175. <bitWidth>5</bitWidth>
  11176. </field>
  11177. <field> <name>JSQ1</name>
  11178. <description>1st conversion in injected
  11179. sequence</description>
  11180. <bitOffset>0</bitOffset>
  11181. <bitWidth>5</bitWidth>
  11182. </field>
  11183. </fields>
  11184. </register>
  11185. <register> <name>JDR1</name>
  11186. <displayName>JDR1</displayName>
  11187. <description>injected data register x</description>
  11188. <addressOffset>0x3C</addressOffset>
  11189. <size>0x20</size>
  11190. <access>read-only</access>
  11191. <resetValue>0x00000000</resetValue>
  11192. <fields>
  11193. <field> <name>JDATA</name>
  11194. <description>Injected data</description>
  11195. <bitOffset>0</bitOffset>
  11196. <bitWidth>16</bitWidth>
  11197. </field>
  11198. </fields>
  11199. </register>
  11200. <register> <name>JDR2</name>
  11201. <displayName>JDR2</displayName>
  11202. <description>injected data register x</description>
  11203. <addressOffset>0x40</addressOffset>
  11204. <size>0x20</size>
  11205. <access>read-only</access>
  11206. <resetValue>0x00000000</resetValue>
  11207. <fields>
  11208. <field> <name>JDATA</name>
  11209. <description>Injected data</description>
  11210. <bitOffset>0</bitOffset>
  11211. <bitWidth>16</bitWidth>
  11212. </field>
  11213. </fields>
  11214. </register>
  11215. <register> <name>JDR3</name>
  11216. <displayName>JDR3</displayName>
  11217. <description>injected data register x</description>
  11218. <addressOffset>0x44</addressOffset>
  11219. <size>0x20</size>
  11220. <access>read-only</access>
  11221. <resetValue>0x00000000</resetValue>
  11222. <fields>
  11223. <field> <name>JDATA</name>
  11224. <description>Injected data</description>
  11225. <bitOffset>0</bitOffset>
  11226. <bitWidth>16</bitWidth>
  11227. </field>
  11228. </fields>
  11229. </register>
  11230. <register> <name>JDR4</name>
  11231. <displayName>JDR4</displayName>
  11232. <description>injected data register x</description>
  11233. <addressOffset>0x48</addressOffset>
  11234. <size>0x20</size>
  11235. <access>read-only</access>
  11236. <resetValue>0x00000000</resetValue>
  11237. <fields>
  11238. <field> <name>JDATA</name>
  11239. <description>Injected data</description>
  11240. <bitOffset>0</bitOffset>
  11241. <bitWidth>16</bitWidth>
  11242. </field>
  11243. </fields>
  11244. </register>
  11245. <register> <name>DR</name>
  11246. <displayName>DR</displayName>
  11247. <description>regular data register</description>
  11248. <addressOffset>0x4C</addressOffset>
  11249. <size>0x20</size>
  11250. <access>read-only</access>
  11251. <resetValue>0x00000000</resetValue>
  11252. <fields>
  11253. <field> <name>DATA</name>
  11254. <description>Regular data</description>
  11255. <bitOffset>0</bitOffset>
  11256. <bitWidth>16</bitWidth>
  11257. </field>
  11258. </fields>
  11259. </register>
  11260. </registers>
  11261. </peripheral>
  11262. <peripheral derivedFrom="ADC1"> <name>ADC2</name>
  11263. <baseAddress>0x40012100</baseAddress>
  11264. <interrupt>
  11265. <name>ADC</name>
  11266. <description>ADC2 global interrupts</description>
  11267. <value>18</value>
  11268. </interrupt>
  11269. </peripheral>
  11270. <peripheral derivedFrom="ADC1"> <name>ADC3</name>
  11271. <baseAddress>0x40012200</baseAddress>
  11272. <interrupt>
  11273. <name>ADC</name>
  11274. <description>ADC3 global interrupts</description>
  11275. <value>18</value>
  11276. </interrupt>
  11277. </peripheral>
  11278. <peripheral> <name>USART6</name>
  11279. <description>Universal synchronous asynchronous receiver
  11280. transmitter</description>
  11281. <groupName>USART</groupName>
  11282. <baseAddress>0x40011400</baseAddress>
  11283. <addressBlock>
  11284. <offset>0x0</offset>
  11285. <size>0x400</size>
  11286. <usage>registers</usage>
  11287. </addressBlock>
  11288. <interrupt>
  11289. <name>USART6</name>
  11290. <description>USART6 global interrupt</description>
  11291. <value>71</value>
  11292. </interrupt>
  11293. <registers>
  11294. <register> <name>SR</name>
  11295. <displayName>SR</displayName>
  11296. <description>Status register</description>
  11297. <addressOffset>0x0</addressOffset>
  11298. <size>0x20</size>
  11299. <resetValue>0x00C00000</resetValue>
  11300. <fields>
  11301. <field> <name>CTS</name>
  11302. <description>CTS flag</description>
  11303. <bitOffset>9</bitOffset>
  11304. <bitWidth>1</bitWidth>
  11305. <access>read-write</access>
  11306. </field>
  11307. <field> <name>LBD</name>
  11308. <description>LIN break detection flag</description>
  11309. <bitOffset>8</bitOffset>
  11310. <bitWidth>1</bitWidth>
  11311. <access>read-write</access>
  11312. </field>
  11313. <field> <name>TXE</name>
  11314. <description>Transmit data register
  11315. empty</description>
  11316. <bitOffset>7</bitOffset>
  11317. <bitWidth>1</bitWidth>
  11318. <access>read-only</access>
  11319. </field>
  11320. <field> <name>TC</name>
  11321. <description>Transmission complete</description>
  11322. <bitOffset>6</bitOffset>
  11323. <bitWidth>1</bitWidth>
  11324. <access>read-write</access>
  11325. </field>
  11326. <field> <name>RXNE</name>
  11327. <description>Read data register not
  11328. empty</description>
  11329. <bitOffset>5</bitOffset>
  11330. <bitWidth>1</bitWidth>
  11331. <access>read-write</access>
  11332. </field>
  11333. <field> <name>IDLE</name>
  11334. <description>IDLE line detected</description>
  11335. <bitOffset>4</bitOffset>
  11336. <bitWidth>1</bitWidth>
  11337. <access>read-only</access>
  11338. </field>
  11339. <field> <name>ORE</name>
  11340. <description>Overrun error</description>
  11341. <bitOffset>3</bitOffset>
  11342. <bitWidth>1</bitWidth>
  11343. <access>read-only</access>
  11344. </field>
  11345. <field> <name>NF</name>
  11346. <description>Noise detected flag</description>
  11347. <bitOffset>2</bitOffset>
  11348. <bitWidth>1</bitWidth>
  11349. <access>read-only</access>
  11350. </field>
  11351. <field> <name>FE</name>
  11352. <description>Framing error</description>
  11353. <bitOffset>1</bitOffset>
  11354. <bitWidth>1</bitWidth>
  11355. <access>read-only</access>
  11356. </field>
  11357. <field> <name>PE</name>
  11358. <description>Parity error</description>
  11359. <bitOffset>0</bitOffset>
  11360. <bitWidth>1</bitWidth>
  11361. <access>read-only</access>
  11362. </field>
  11363. </fields>
  11364. </register>
  11365. <register> <name>DR</name>
  11366. <displayName>DR</displayName>
  11367. <description>Data register</description>
  11368. <addressOffset>0x4</addressOffset>
  11369. <size>0x20</size>
  11370. <access>read-write</access>
  11371. <resetValue>0x00000000</resetValue>
  11372. <fields>
  11373. <field> <name>DR</name>
  11374. <description>Data value</description>
  11375. <bitOffset>0</bitOffset>
  11376. <bitWidth>9</bitWidth>
  11377. </field>
  11378. </fields>
  11379. </register>
  11380. <register> <name>BRR</name>
  11381. <displayName>BRR</displayName>
  11382. <description>Baud rate register</description>
  11383. <addressOffset>0x8</addressOffset>
  11384. <size>0x20</size>
  11385. <access>read-write</access>
  11386. <resetValue>0x0000</resetValue>
  11387. <fields>
  11388. <field> <name>DIV_Mantissa</name>
  11389. <description>mantissa of USARTDIV</description>
  11390. <bitOffset>4</bitOffset>
  11391. <bitWidth>12</bitWidth>
  11392. </field>
  11393. <field> <name>DIV_Fraction</name>
  11394. <description>fraction of USARTDIV</description>
  11395. <bitOffset>0</bitOffset>
  11396. <bitWidth>4</bitWidth>
  11397. </field>
  11398. </fields>
  11399. </register>
  11400. <register> <name>CR1</name>
  11401. <displayName>CR1</displayName>
  11402. <description>Control register 1</description>
  11403. <addressOffset>0xC</addressOffset>
  11404. <size>0x20</size>
  11405. <access>read-write</access>
  11406. <resetValue>0x0000</resetValue>
  11407. <fields>
  11408. <field> <name>OVER8</name>
  11409. <description>Oversampling mode</description>
  11410. <bitOffset>15</bitOffset>
  11411. <bitWidth>1</bitWidth>
  11412. </field>
  11413. <field> <name>UE</name>
  11414. <description>USART enable</description>
  11415. <bitOffset>13</bitOffset>
  11416. <bitWidth>1</bitWidth>
  11417. </field>
  11418. <field> <name>M</name>
  11419. <description>Word length</description>
  11420. <bitOffset>12</bitOffset>
  11421. <bitWidth>1</bitWidth>
  11422. </field>
  11423. <field> <name>WAKE</name>
  11424. <description>Wakeup method</description>
  11425. <bitOffset>11</bitOffset>
  11426. <bitWidth>1</bitWidth>
  11427. </field>
  11428. <field> <name>PCE</name>
  11429. <description>Parity control enable</description>
  11430. <bitOffset>10</bitOffset>
  11431. <bitWidth>1</bitWidth>
  11432. </field>
  11433. <field> <name>PS</name>
  11434. <description>Parity selection</description>
  11435. <bitOffset>9</bitOffset>
  11436. <bitWidth>1</bitWidth>
  11437. </field>
  11438. <field> <name>PEIE</name>
  11439. <description>PE interrupt enable</description>
  11440. <bitOffset>8</bitOffset>
  11441. <bitWidth>1</bitWidth>
  11442. </field>
  11443. <field> <name>TXEIE</name>
  11444. <description>TXE interrupt enable</description>
  11445. <bitOffset>7</bitOffset>
  11446. <bitWidth>1</bitWidth>
  11447. </field>
  11448. <field> <name>TCIE</name>
  11449. <description>Transmission complete interrupt
  11450. enable</description>
  11451. <bitOffset>6</bitOffset>
  11452. <bitWidth>1</bitWidth>
  11453. </field>
  11454. <field> <name>RXNEIE</name>
  11455. <description>RXNE interrupt enable</description>
  11456. <bitOffset>5</bitOffset>
  11457. <bitWidth>1</bitWidth>
  11458. </field>
  11459. <field> <name>IDLEIE</name>
  11460. <description>IDLE interrupt enable</description>
  11461. <bitOffset>4</bitOffset>
  11462. <bitWidth>1</bitWidth>
  11463. </field>
  11464. <field> <name>TE</name>
  11465. <description>Transmitter enable</description>
  11466. <bitOffset>3</bitOffset>
  11467. <bitWidth>1</bitWidth>
  11468. </field>
  11469. <field> <name>RE</name>
  11470. <description>Receiver enable</description>
  11471. <bitOffset>2</bitOffset>
  11472. <bitWidth>1</bitWidth>
  11473. </field>
  11474. <field> <name>RWU</name>
  11475. <description>Receiver wakeup</description>
  11476. <bitOffset>1</bitOffset>
  11477. <bitWidth>1</bitWidth>
  11478. </field>
  11479. <field> <name>SBK</name>
  11480. <description>Send break</description>
  11481. <bitOffset>0</bitOffset>
  11482. <bitWidth>1</bitWidth>
  11483. </field>
  11484. </fields>
  11485. </register>
  11486. <register> <name>CR2</name>
  11487. <displayName>CR2</displayName>
  11488. <description>Control register 2</description>
  11489. <addressOffset>0x10</addressOffset>
  11490. <size>0x20</size>
  11491. <access>read-write</access>
  11492. <resetValue>0x0000</resetValue>
  11493. <fields>
  11494. <field> <name>LINEN</name>
  11495. <description>LIN mode enable</description>
  11496. <bitOffset>14</bitOffset>
  11497. <bitWidth>1</bitWidth>
  11498. </field>
  11499. <field> <name>STOP</name>
  11500. <description>STOP bits</description>
  11501. <bitOffset>12</bitOffset>
  11502. <bitWidth>2</bitWidth>
  11503. </field>
  11504. <field> <name>CLKEN</name>
  11505. <description>Clock enable</description>
  11506. <bitOffset>11</bitOffset>
  11507. <bitWidth>1</bitWidth>
  11508. </field>
  11509. <field> <name>CPOL</name>
  11510. <description>Clock polarity</description>
  11511. <bitOffset>10</bitOffset>
  11512. <bitWidth>1</bitWidth>
  11513. </field>
  11514. <field> <name>CPHA</name>
  11515. <description>Clock phase</description>
  11516. <bitOffset>9</bitOffset>
  11517. <bitWidth>1</bitWidth>
  11518. </field>
  11519. <field> <name>LBCL</name>
  11520. <description>Last bit clock pulse</description>
  11521. <bitOffset>8</bitOffset>
  11522. <bitWidth>1</bitWidth>
  11523. </field>
  11524. <field> <name>LBDIE</name>
  11525. <description>LIN break detection interrupt
  11526. enable</description>
  11527. <bitOffset>6</bitOffset>
  11528. <bitWidth>1</bitWidth>
  11529. </field>
  11530. <field> <name>LBDL</name>
  11531. <description>lin break detection length</description>
  11532. <bitOffset>5</bitOffset>
  11533. <bitWidth>1</bitWidth>
  11534. </field>
  11535. <field> <name>ADD</name>
  11536. <description>Address of the USART node</description>
  11537. <bitOffset>0</bitOffset>
  11538. <bitWidth>4</bitWidth>
  11539. </field>
  11540. </fields>
  11541. </register>
  11542. <register> <name>CR3</name>
  11543. <displayName>CR3</displayName>
  11544. <description>Control register 3</description>
  11545. <addressOffset>0x14</addressOffset>
  11546. <size>0x20</size>
  11547. <access>read-write</access>
  11548. <resetValue>0x0000</resetValue>
  11549. <fields>
  11550. <field> <name>ONEBIT</name>
  11551. <description>One sample bit method
  11552. enable</description>
  11553. <bitOffset>11</bitOffset>
  11554. <bitWidth>1</bitWidth>
  11555. </field>
  11556. <field> <name>CTSIE</name>
  11557. <description>CTS interrupt enable</description>
  11558. <bitOffset>10</bitOffset>
  11559. <bitWidth>1</bitWidth>
  11560. </field>
  11561. <field> <name>CTSE</name>
  11562. <description>CTS enable</description>
  11563. <bitOffset>9</bitOffset>
  11564. <bitWidth>1</bitWidth>
  11565. </field>
  11566. <field> <name>RTSE</name>
  11567. <description>RTS enable</description>
  11568. <bitOffset>8</bitOffset>
  11569. <bitWidth>1</bitWidth>
  11570. </field>
  11571. <field> <name>DMAT</name>
  11572. <description>DMA enable transmitter</description>
  11573. <bitOffset>7</bitOffset>
  11574. <bitWidth>1</bitWidth>
  11575. </field>
  11576. <field> <name>DMAR</name>
  11577. <description>DMA enable receiver</description>
  11578. <bitOffset>6</bitOffset>
  11579. <bitWidth>1</bitWidth>
  11580. </field>
  11581. <field> <name>SCEN</name>
  11582. <description>Smartcard mode enable</description>
  11583. <bitOffset>5</bitOffset>
  11584. <bitWidth>1</bitWidth>
  11585. </field>
  11586. <field> <name>NACK</name>
  11587. <description>Smartcard NACK enable</description>
  11588. <bitOffset>4</bitOffset>
  11589. <bitWidth>1</bitWidth>
  11590. </field>
  11591. <field> <name>HDSEL</name>
  11592. <description>Half-duplex selection</description>
  11593. <bitOffset>3</bitOffset>
  11594. <bitWidth>1</bitWidth>
  11595. </field>
  11596. <field> <name>IRLP</name>
  11597. <description>IrDA low-power</description>
  11598. <bitOffset>2</bitOffset>
  11599. <bitWidth>1</bitWidth>
  11600. </field>
  11601. <field> <name>IREN</name>
  11602. <description>IrDA mode enable</description>
  11603. <bitOffset>1</bitOffset>
  11604. <bitWidth>1</bitWidth>
  11605. </field>
  11606. <field> <name>EIE</name>
  11607. <description>Error interrupt enable</description>
  11608. <bitOffset>0</bitOffset>
  11609. <bitWidth>1</bitWidth>
  11610. </field>
  11611. </fields>
  11612. </register>
  11613. <register> <name>GTPR</name>
  11614. <displayName>GTPR</displayName>
  11615. <description>Guard time and prescaler
  11616. register</description>
  11617. <addressOffset>0x18</addressOffset>
  11618. <size>0x20</size>
  11619. <access>read-write</access>
  11620. <resetValue>0x0000</resetValue>
  11621. <fields>
  11622. <field> <name>GT</name>
  11623. <description>Guard time value</description>
  11624. <bitOffset>8</bitOffset>
  11625. <bitWidth>8</bitWidth>
  11626. </field>
  11627. <field> <name>PSC</name>
  11628. <description>Prescaler value</description>
  11629. <bitOffset>0</bitOffset>
  11630. <bitWidth>8</bitWidth>
  11631. </field>
  11632. </fields>
  11633. </register>
  11634. </registers>
  11635. </peripheral>
  11636. <peripheral derivedFrom="USART6"> <name>USART1</name>
  11637. <baseAddress>0x40011000</baseAddress>
  11638. <interrupt>
  11639. <name>USART1</name>
  11640. <description>USART1 global interrupt</description>
  11641. <value>37</value>
  11642. </interrupt>
  11643. </peripheral>
  11644. <peripheral derivedFrom="USART6"> <name>USART2</name>
  11645. <baseAddress>0x40004400</baseAddress>
  11646. <interrupt>
  11647. <name>USART2</name>
  11648. <description>USART2 global interrupt</description>
  11649. <value>38</value>
  11650. </interrupt>
  11651. </peripheral>
  11652. <peripheral derivedFrom="USART6"> <name>USART3</name>
  11653. <baseAddress>0x40004800</baseAddress>
  11654. <interrupt>
  11655. <name>USART3</name>
  11656. <description>USART3 global interrupt</description>
  11657. <value>39</value>
  11658. </interrupt>
  11659. </peripheral>
  11660. <peripheral> <name>DAC</name>
  11661. <description>Digital-to-analog converter</description>
  11662. <groupName>DAC</groupName>
  11663. <baseAddress>0x40007400</baseAddress>
  11664. <addressBlock>
  11665. <offset>0x0</offset>
  11666. <size>0x400</size>
  11667. <usage>registers</usage>
  11668. </addressBlock>
  11669. <interrupt>
  11670. <name>TIM6_DAC</name>
  11671. <description>TIM6 global interrupt, DAC1 and DAC2 underrun
  11672. error interrupt</description>
  11673. <value>54</value>
  11674. </interrupt>
  11675. <registers>
  11676. <register> <name>CR</name>
  11677. <displayName>CR</displayName>
  11678. <description>control register</description>
  11679. <addressOffset>0x0</addressOffset>
  11680. <size>0x20</size>
  11681. <access>read-write</access>
  11682. <resetValue>0x00000000</resetValue>
  11683. <fields>
  11684. <field> <name>DMAUDRIE2</name>
  11685. <description>DAC channel2 DMA underrun interrupt
  11686. enable</description>
  11687. <bitOffset>29</bitOffset>
  11688. <bitWidth>1</bitWidth>
  11689. </field>
  11690. <field> <name>DMAEN2</name>
  11691. <description>DAC channel2 DMA enable</description>
  11692. <bitOffset>28</bitOffset>
  11693. <bitWidth>1</bitWidth>
  11694. </field>
  11695. <field> <name>MAMP2</name>
  11696. <description>DAC channel2 mask/amplitude
  11697. selector</description>
  11698. <bitOffset>24</bitOffset>
  11699. <bitWidth>4</bitWidth>
  11700. </field>
  11701. <field> <name>WAVE2</name>
  11702. <description>DAC channel2 noise/triangle wave
  11703. generation enable</description>
  11704. <bitOffset>22</bitOffset>
  11705. <bitWidth>2</bitWidth>
  11706. </field>
  11707. <field> <name>TSEL2</name>
  11708. <description>DAC channel2 trigger
  11709. selection</description>
  11710. <bitOffset>19</bitOffset>
  11711. <bitWidth>3</bitWidth>
  11712. </field>
  11713. <field> <name>TEN2</name>
  11714. <description>DAC channel2 trigger
  11715. enable</description>
  11716. <bitOffset>18</bitOffset>
  11717. <bitWidth>1</bitWidth>
  11718. </field>
  11719. <field> <name>BOFF2</name>
  11720. <description>DAC channel2 output buffer
  11721. disable</description>
  11722. <bitOffset>17</bitOffset>
  11723. <bitWidth>1</bitWidth>
  11724. </field>
  11725. <field> <name>EN2</name>
  11726. <description>DAC channel2 enable</description>
  11727. <bitOffset>16</bitOffset>
  11728. <bitWidth>1</bitWidth>
  11729. </field>
  11730. <field> <name>DMAUDRIE1</name>
  11731. <description>DAC channel1 DMA Underrun Interrupt
  11732. enable</description>
  11733. <bitOffset>13</bitOffset>
  11734. <bitWidth>1</bitWidth>
  11735. </field>
  11736. <field> <name>DMAEN1</name>
  11737. <description>DAC channel1 DMA enable</description>
  11738. <bitOffset>12</bitOffset>
  11739. <bitWidth>1</bitWidth>
  11740. </field>
  11741. <field> <name>MAMP1</name>
  11742. <description>DAC channel1 mask/amplitude
  11743. selector</description>
  11744. <bitOffset>8</bitOffset>
  11745. <bitWidth>4</bitWidth>
  11746. </field>
  11747. <field> <name>WAVE1</name>
  11748. <description>DAC channel1 noise/triangle wave
  11749. generation enable</description>
  11750. <bitOffset>6</bitOffset>
  11751. <bitWidth>2</bitWidth>
  11752. </field>
  11753. <field> <name>TSEL1</name>
  11754. <description>DAC channel1 trigger
  11755. selection</description>
  11756. <bitOffset>3</bitOffset>
  11757. <bitWidth>3</bitWidth>
  11758. </field>
  11759. <field> <name>TEN1</name>
  11760. <description>DAC channel1 trigger
  11761. enable</description>
  11762. <bitOffset>2</bitOffset>
  11763. <bitWidth>1</bitWidth>
  11764. </field>
  11765. <field> <name>BOFF1</name>
  11766. <description>DAC channel1 output buffer
  11767. disable</description>
  11768. <bitOffset>1</bitOffset>
  11769. <bitWidth>1</bitWidth>
  11770. </field>
  11771. <field> <name>EN1</name>
  11772. <description>DAC channel1 enable</description>
  11773. <bitOffset>0</bitOffset>
  11774. <bitWidth>1</bitWidth>
  11775. </field>
  11776. </fields>
  11777. </register>
  11778. <register> <name>SWTRIGR</name>
  11779. <displayName>SWTRIGR</displayName>
  11780. <description>software trigger register</description>
  11781. <addressOffset>0x4</addressOffset>
  11782. <size>0x20</size>
  11783. <access>write-only</access>
  11784. <resetValue>0x00000000</resetValue>
  11785. <fields>
  11786. <field> <name>SWTRIG2</name>
  11787. <description>DAC channel2 software
  11788. trigger</description>
  11789. <bitOffset>1</bitOffset>
  11790. <bitWidth>1</bitWidth>
  11791. </field>
  11792. <field> <name>SWTRIG1</name>
  11793. <description>DAC channel1 software
  11794. trigger</description>
  11795. <bitOffset>0</bitOffset>
  11796. <bitWidth>1</bitWidth>
  11797. </field>
  11798. </fields>
  11799. </register>
  11800. <register> <name>DHR12R1</name>
  11801. <displayName>DHR12R1</displayName>
  11802. <description>channel1 12-bit right-aligned data holding
  11803. register</description>
  11804. <addressOffset>0x8</addressOffset>
  11805. <size>0x20</size>
  11806. <access>read-write</access>
  11807. <resetValue>0x00000000</resetValue>
  11808. <fields>
  11809. <field> <name>DACC1DHR</name>
  11810. <description>DAC channel1 12-bit right-aligned
  11811. data</description>
  11812. <bitOffset>0</bitOffset>
  11813. <bitWidth>12</bitWidth>
  11814. </field>
  11815. </fields>
  11816. </register>
  11817. <register> <name>DHR12L1</name>
  11818. <displayName>DHR12L1</displayName>
  11819. <description>channel1 12-bit left aligned data holding
  11820. register</description>
  11821. <addressOffset>0xC</addressOffset>
  11822. <size>0x20</size>
  11823. <access>read-write</access>
  11824. <resetValue>0x00000000</resetValue>
  11825. <fields>
  11826. <field> <name>DACC1DHR</name>
  11827. <description>DAC channel1 12-bit left-aligned
  11828. data</description>
  11829. <bitOffset>4</bitOffset>
  11830. <bitWidth>12</bitWidth>
  11831. </field>
  11832. </fields>
  11833. </register>
  11834. <register> <name>DHR8R1</name>
  11835. <displayName>DHR8R1</displayName>
  11836. <description>channel1 8-bit right aligned data holding
  11837. register</description>
  11838. <addressOffset>0x10</addressOffset>
  11839. <size>0x20</size>
  11840. <access>read-write</access>
  11841. <resetValue>0x00000000</resetValue>
  11842. <fields>
  11843. <field> <name>DACC1DHR</name>
  11844. <description>DAC channel1 8-bit right-aligned
  11845. data</description>
  11846. <bitOffset>0</bitOffset>
  11847. <bitWidth>8</bitWidth>
  11848. </field>
  11849. </fields>
  11850. </register>
  11851. <register> <name>DHR12R2</name>
  11852. <displayName>DHR12R2</displayName>
  11853. <description>channel2 12-bit right aligned data holding
  11854. register</description>
  11855. <addressOffset>0x14</addressOffset>
  11856. <size>0x20</size>
  11857. <access>read-write</access>
  11858. <resetValue>0x00000000</resetValue>
  11859. <fields>
  11860. <field> <name>DACC2DHR</name>
  11861. <description>DAC channel2 12-bit right-aligned
  11862. data</description>
  11863. <bitOffset>0</bitOffset>
  11864. <bitWidth>12</bitWidth>
  11865. </field>
  11866. </fields>
  11867. </register>
  11868. <register> <name>DHR12L2</name>
  11869. <displayName>DHR12L2</displayName>
  11870. <description>channel2 12-bit left aligned data holding
  11871. register</description>
  11872. <addressOffset>0x18</addressOffset>
  11873. <size>0x20</size>
  11874. <access>read-write</access>
  11875. <resetValue>0x00000000</resetValue>
  11876. <fields>
  11877. <field> <name>DACC2DHR</name>
  11878. <description>DAC channel2 12-bit left-aligned
  11879. data</description>
  11880. <bitOffset>4</bitOffset>
  11881. <bitWidth>12</bitWidth>
  11882. </field>
  11883. </fields>
  11884. </register>
  11885. <register> <name>DHR8R2</name>
  11886. <displayName>DHR8R2</displayName>
  11887. <description>channel2 8-bit right-aligned data holding
  11888. register</description>
  11889. <addressOffset>0x1C</addressOffset>
  11890. <size>0x20</size>
  11891. <access>read-write</access>
  11892. <resetValue>0x00000000</resetValue>
  11893. <fields>
  11894. <field> <name>DACC2DHR</name>
  11895. <description>DAC channel2 8-bit right-aligned
  11896. data</description>
  11897. <bitOffset>0</bitOffset>
  11898. <bitWidth>8</bitWidth>
  11899. </field>
  11900. </fields>
  11901. </register>
  11902. <register> <name>DHR12RD</name>
  11903. <displayName>DHR12RD</displayName>
  11904. <description>Dual DAC 12-bit right-aligned data holding
  11905. register</description>
  11906. <addressOffset>0x20</addressOffset>
  11907. <size>0x20</size>
  11908. <access>read-write</access>
  11909. <resetValue>0x00000000</resetValue>
  11910. <fields>
  11911. <field> <name>DACC2DHR</name>
  11912. <description>DAC channel2 12-bit right-aligned
  11913. data</description>
  11914. <bitOffset>16</bitOffset>
  11915. <bitWidth>12</bitWidth>
  11916. </field>
  11917. <field> <name>DACC1DHR</name>
  11918. <description>DAC channel1 12-bit right-aligned
  11919. data</description>
  11920. <bitOffset>0</bitOffset>
  11921. <bitWidth>12</bitWidth>
  11922. </field>
  11923. </fields>
  11924. </register>
  11925. <register> <name>DHR12LD</name>
  11926. <displayName>DHR12LD</displayName>
  11927. <description>DUAL DAC 12-bit left aligned data holding
  11928. register</description>
  11929. <addressOffset>0x24</addressOffset>
  11930. <size>0x20</size>
  11931. <access>read-write</access>
  11932. <resetValue>0x00000000</resetValue>
  11933. <fields>
  11934. <field> <name>DACC2DHR</name>
  11935. <description>DAC channel2 12-bit left-aligned
  11936. data</description>
  11937. <bitOffset>20</bitOffset>
  11938. <bitWidth>12</bitWidth>
  11939. </field>
  11940. <field> <name>DACC1DHR</name>
  11941. <description>DAC channel1 12-bit left-aligned
  11942. data</description>
  11943. <bitOffset>4</bitOffset>
  11944. <bitWidth>12</bitWidth>
  11945. </field>
  11946. </fields>
  11947. </register>
  11948. <register> <name>DHR8RD</name>
  11949. <displayName>DHR8RD</displayName>
  11950. <description>DUAL DAC 8-bit right aligned data holding
  11951. register</description>
  11952. <addressOffset>0x28</addressOffset>
  11953. <size>0x20</size>
  11954. <access>read-write</access>
  11955. <resetValue>0x00000000</resetValue>
  11956. <fields>
  11957. <field> <name>DACC2DHR</name>
  11958. <description>DAC channel2 8-bit right-aligned
  11959. data</description>
  11960. <bitOffset>8</bitOffset>
  11961. <bitWidth>8</bitWidth>
  11962. </field>
  11963. <field> <name>DACC1DHR</name>
  11964. <description>DAC channel1 8-bit right-aligned
  11965. data</description>
  11966. <bitOffset>0</bitOffset>
  11967. <bitWidth>8</bitWidth>
  11968. </field>
  11969. </fields>
  11970. </register>
  11971. <register> <name>DOR1</name>
  11972. <displayName>DOR1</displayName>
  11973. <description>channel1 data output register</description>
  11974. <addressOffset>0x2C</addressOffset>
  11975. <size>0x20</size>
  11976. <access>read-only</access>
  11977. <resetValue>0x00000000</resetValue>
  11978. <fields>
  11979. <field> <name>DACC1DOR</name>
  11980. <description>DAC channel1 data output</description>
  11981. <bitOffset>0</bitOffset>
  11982. <bitWidth>12</bitWidth>
  11983. </field>
  11984. </fields>
  11985. </register>
  11986. <register> <name>DOR2</name>
  11987. <displayName>DOR2</displayName>
  11988. <description>channel2 data output register</description>
  11989. <addressOffset>0x30</addressOffset>
  11990. <size>0x20</size>
  11991. <access>read-only</access>
  11992. <resetValue>0x00000000</resetValue>
  11993. <fields>
  11994. <field> <name>DACC2DOR</name>
  11995. <description>DAC channel2 data output</description>
  11996. <bitOffset>0</bitOffset>
  11997. <bitWidth>12</bitWidth>
  11998. </field>
  11999. </fields>
  12000. </register>
  12001. <register> <name>SR</name>
  12002. <displayName>SR</displayName>
  12003. <description>status register</description>
  12004. <addressOffset>0x34</addressOffset>
  12005. <size>0x20</size>
  12006. <access>read-write</access>
  12007. <resetValue>0x00000000</resetValue>
  12008. <fields>
  12009. <field> <name>DMAUDR2</name>
  12010. <description>DAC channel2 DMA underrun
  12011. flag</description>
  12012. <bitOffset>29</bitOffset>
  12013. <bitWidth>1</bitWidth>
  12014. </field>
  12015. <field> <name>DMAUDR1</name>
  12016. <description>DAC channel1 DMA underrun
  12017. flag</description>
  12018. <bitOffset>13</bitOffset>
  12019. <bitWidth>1</bitWidth>
  12020. </field>
  12021. </fields>
  12022. </register>
  12023. </registers>
  12024. </peripheral>
  12025. <peripheral> <name>PWR</name>
  12026. <description>Power control</description>
  12027. <groupName>PWR</groupName>
  12028. <baseAddress>0x40007000</baseAddress>
  12029. <addressBlock>
  12030. <offset>0x0</offset>
  12031. <size>0x400</size>
  12032. <usage>registers</usage>
  12033. </addressBlock>
  12034. <interrupt>
  12035. <name>PVD</name>
  12036. <description>PVD through EXTI line detection
  12037. interrupt</description>
  12038. <value>1</value>
  12039. </interrupt>
  12040. <registers>
  12041. <register> <name>CR</name>
  12042. <displayName>CR</displayName>
  12043. <description>power control register</description>
  12044. <addressOffset>0x0</addressOffset>
  12045. <size>0x20</size>
  12046. <access>read-write</access>
  12047. <resetValue>0x00000000</resetValue>
  12048. <fields>
  12049. <field> <name>FPDS</name>
  12050. <description>Flash power down in Stop
  12051. mode</description>
  12052. <bitOffset>9</bitOffset>
  12053. <bitWidth>1</bitWidth>
  12054. </field>
  12055. <field> <name>DBP</name>
  12056. <description>Disable backup domain write
  12057. protection</description>
  12058. <bitOffset>8</bitOffset>
  12059. <bitWidth>1</bitWidth>
  12060. </field>
  12061. <field> <name>PLS</name>
  12062. <description>PVD level selection</description>
  12063. <bitOffset>5</bitOffset>
  12064. <bitWidth>3</bitWidth>
  12065. </field>
  12066. <field> <name>PVDE</name>
  12067. <description>Power voltage detector
  12068. enable</description>
  12069. <bitOffset>4</bitOffset>
  12070. <bitWidth>1</bitWidth>
  12071. </field>
  12072. <field> <name>CSBF</name>
  12073. <description>Clear standby flag</description>
  12074. <bitOffset>3</bitOffset>
  12075. <bitWidth>1</bitWidth>
  12076. </field>
  12077. <field> <name>CWUF</name>
  12078. <description>Clear wakeup flag</description>
  12079. <bitOffset>2</bitOffset>
  12080. <bitWidth>1</bitWidth>
  12081. </field>
  12082. <field> <name>PDDS</name>
  12083. <description>Power down deepsleep</description>
  12084. <bitOffset>1</bitOffset>
  12085. <bitWidth>1</bitWidth>
  12086. </field>
  12087. <field> <name>LPDS</name>
  12088. <description>Low-power deep sleep</description>
  12089. <bitOffset>0</bitOffset>
  12090. <bitWidth>1</bitWidth>
  12091. </field>
  12092. </fields>
  12093. </register>
  12094. <register> <name>CSR</name>
  12095. <displayName>CSR</displayName>
  12096. <description>power control/status register</description>
  12097. <addressOffset>0x4</addressOffset>
  12098. <size>0x20</size>
  12099. <resetValue>0x00000000</resetValue>
  12100. <fields>
  12101. <field> <name>WUF</name>
  12102. <description>Wakeup flag</description>
  12103. <bitOffset>0</bitOffset>
  12104. <bitWidth>1</bitWidth>
  12105. <access>read-only</access>
  12106. </field>
  12107. <field> <name>SBF</name>
  12108. <description>Standby flag</description>
  12109. <bitOffset>1</bitOffset>
  12110. <bitWidth>1</bitWidth>
  12111. <access>read-only</access>
  12112. </field>
  12113. <field> <name>PVDO</name>
  12114. <description>PVD output</description>
  12115. <bitOffset>2</bitOffset>
  12116. <bitWidth>1</bitWidth>
  12117. <access>read-only</access>
  12118. </field>
  12119. <field> <name>BRR</name>
  12120. <description>Backup regulator ready</description>
  12121. <bitOffset>3</bitOffset>
  12122. <bitWidth>1</bitWidth>
  12123. <access>read-only</access>
  12124. </field>
  12125. <field> <name>EWUP</name>
  12126. <description>Enable WKUP pin</description>
  12127. <bitOffset>8</bitOffset>
  12128. <bitWidth>1</bitWidth>
  12129. <access>read-write</access>
  12130. </field>
  12131. <field> <name>BRE</name>
  12132. <description>Backup regulator enable</description>
  12133. <bitOffset>9</bitOffset>
  12134. <bitWidth>1</bitWidth>
  12135. <access>read-write</access>
  12136. </field>
  12137. <field> <name>VOSRDY</name>
  12138. <description>Regulator voltage scaling output
  12139. selection ready bit</description>
  12140. <bitOffset>14</bitOffset>
  12141. <bitWidth>1</bitWidth>
  12142. <access>read-write</access>
  12143. </field>
  12144. </fields>
  12145. </register>
  12146. </registers>
  12147. </peripheral>
  12148. <peripheral> <name>I2C3</name>
  12149. <description>Inter-integrated circuit</description>
  12150. <groupName>I2C</groupName>
  12151. <baseAddress>0x40005C00</baseAddress>
  12152. <addressBlock>
  12153. <offset>0x0</offset>
  12154. <size>0x400</size>
  12155. <usage>registers</usage>
  12156. </addressBlock>
  12157. <interrupt>
  12158. <name>I2C3_EV</name>
  12159. <description>I2C3 event interrupt</description>
  12160. <value>72</value>
  12161. </interrupt>
  12162. <interrupt>
  12163. <name>I2C3_ER</name>
  12164. <description>I2C3 error interrupt</description>
  12165. <value>73</value>
  12166. </interrupt>
  12167. <registers>
  12168. <register> <name>CR1</name>
  12169. <displayName>CR1</displayName>
  12170. <description>Control register 1</description>
  12171. <addressOffset>0x0</addressOffset>
  12172. <size>0x20</size>
  12173. <access>read-write</access>
  12174. <resetValue>0x0000</resetValue>
  12175. <fields>
  12176. <field> <name>SWRST</name>
  12177. <description>Software reset</description>
  12178. <bitOffset>15</bitOffset>
  12179. <bitWidth>1</bitWidth>
  12180. </field>
  12181. <field> <name>ALERT</name>
  12182. <description>SMBus alert</description>
  12183. <bitOffset>13</bitOffset>
  12184. <bitWidth>1</bitWidth>
  12185. </field>
  12186. <field> <name>PEC</name>
  12187. <description>Packet error checking</description>
  12188. <bitOffset>12</bitOffset>
  12189. <bitWidth>1</bitWidth>
  12190. </field>
  12191. <field> <name>POS</name>
  12192. <description>Acknowledge/PEC Position (for data
  12193. reception)</description>
  12194. <bitOffset>11</bitOffset>
  12195. <bitWidth>1</bitWidth>
  12196. </field>
  12197. <field> <name>ACK</name>
  12198. <description>Acknowledge enable</description>
  12199. <bitOffset>10</bitOffset>
  12200. <bitWidth>1</bitWidth>
  12201. </field>
  12202. <field> <name>STOP</name>
  12203. <description>Stop generation</description>
  12204. <bitOffset>9</bitOffset>
  12205. <bitWidth>1</bitWidth>
  12206. </field>
  12207. <field> <name>START</name>
  12208. <description>Start generation</description>
  12209. <bitOffset>8</bitOffset>
  12210. <bitWidth>1</bitWidth>
  12211. </field>
  12212. <field> <name>NOSTRETCH</name>
  12213. <description>Clock stretching disable (Slave
  12214. mode)</description>
  12215. <bitOffset>7</bitOffset>
  12216. <bitWidth>1</bitWidth>
  12217. </field>
  12218. <field> <name>ENGC</name>
  12219. <description>General call enable</description>
  12220. <bitOffset>6</bitOffset>
  12221. <bitWidth>1</bitWidth>
  12222. </field>
  12223. <field> <name>ENPEC</name>
  12224. <description>PEC enable</description>
  12225. <bitOffset>5</bitOffset>
  12226. <bitWidth>1</bitWidth>
  12227. </field>
  12228. <field> <name>ENARP</name>
  12229. <description>ARP enable</description>
  12230. <bitOffset>4</bitOffset>
  12231. <bitWidth>1</bitWidth>
  12232. </field>
  12233. <field> <name>SMBTYPE</name>
  12234. <description>SMBus type</description>
  12235. <bitOffset>3</bitOffset>
  12236. <bitWidth>1</bitWidth>
  12237. </field>
  12238. <field> <name>SMBUS</name>
  12239. <description>SMBus mode</description>
  12240. <bitOffset>1</bitOffset>
  12241. <bitWidth>1</bitWidth>
  12242. </field>
  12243. <field> <name>PE</name>
  12244. <description>Peripheral enable</description>
  12245. <bitOffset>0</bitOffset>
  12246. <bitWidth>1</bitWidth>
  12247. </field>
  12248. </fields>
  12249. </register>
  12250. <register> <name>CR2</name>
  12251. <displayName>CR2</displayName>
  12252. <description>Control register 2</description>
  12253. <addressOffset>0x4</addressOffset>
  12254. <size>0x20</size>
  12255. <access>read-write</access>
  12256. <resetValue>0x0000</resetValue>
  12257. <fields>
  12258. <field> <name>LAST</name>
  12259. <description>DMA last transfer</description>
  12260. <bitOffset>12</bitOffset>
  12261. <bitWidth>1</bitWidth>
  12262. </field>
  12263. <field> <name>DMAEN</name>
  12264. <description>DMA requests enable</description>
  12265. <bitOffset>11</bitOffset>
  12266. <bitWidth>1</bitWidth>
  12267. </field>
  12268. <field> <name>ITBUFEN</name>
  12269. <description>Buffer interrupt enable</description>
  12270. <bitOffset>10</bitOffset>
  12271. <bitWidth>1</bitWidth>
  12272. </field>
  12273. <field> <name>ITEVTEN</name>
  12274. <description>Event interrupt enable</description>
  12275. <bitOffset>9</bitOffset>
  12276. <bitWidth>1</bitWidth>
  12277. </field>
  12278. <field> <name>ITERREN</name>
  12279. <description>Error interrupt enable</description>
  12280. <bitOffset>8</bitOffset>
  12281. <bitWidth>1</bitWidth>
  12282. </field>
  12283. <field> <name>FREQ</name>
  12284. <description>Peripheral clock frequency</description>
  12285. <bitOffset>0</bitOffset>
  12286. <bitWidth>6</bitWidth>
  12287. </field>
  12288. </fields>
  12289. </register>
  12290. <register> <name>OAR1</name>
  12291. <displayName>OAR1</displayName>
  12292. <description>Own address register 1</description>
  12293. <addressOffset>0x8</addressOffset>
  12294. <size>0x20</size>
  12295. <access>read-write</access>
  12296. <resetValue>0x0000</resetValue>
  12297. <fields>
  12298. <field> <name>ADDMODE</name>
  12299. <description>Addressing mode (slave
  12300. mode)</description>
  12301. <bitOffset>15</bitOffset>
  12302. <bitWidth>1</bitWidth>
  12303. </field>
  12304. <field> <name>ADD10</name>
  12305. <description>Interface address</description>
  12306. <bitOffset>8</bitOffset>
  12307. <bitWidth>2</bitWidth>
  12308. </field>
  12309. <field> <name>ADD7</name>
  12310. <description>Interface address</description>
  12311. <bitOffset>1</bitOffset>
  12312. <bitWidth>7</bitWidth>
  12313. </field>
  12314. <field> <name>ADD0</name>
  12315. <description>Interface address</description>
  12316. <bitOffset>0</bitOffset>
  12317. <bitWidth>1</bitWidth>
  12318. </field>
  12319. </fields>
  12320. </register>
  12321. <register> <name>OAR2</name>
  12322. <displayName>OAR2</displayName>
  12323. <description>Own address register 2</description>
  12324. <addressOffset>0xC</addressOffset>
  12325. <size>0x20</size>
  12326. <access>read-write</access>
  12327. <resetValue>0x0000</resetValue>
  12328. <fields>
  12329. <field> <name>ADD2</name>
  12330. <description>Interface address</description>
  12331. <bitOffset>1</bitOffset>
  12332. <bitWidth>7</bitWidth>
  12333. </field>
  12334. <field> <name>ENDUAL</name>
  12335. <description>Dual addressing mode
  12336. enable</description>
  12337. <bitOffset>0</bitOffset>
  12338. <bitWidth>1</bitWidth>
  12339. </field>
  12340. </fields>
  12341. </register>
  12342. <register> <name>DR</name>
  12343. <displayName>DR</displayName>
  12344. <description>Data register</description>
  12345. <addressOffset>0x10</addressOffset>
  12346. <size>0x20</size>
  12347. <access>read-write</access>
  12348. <resetValue>0x0000</resetValue>
  12349. <fields>
  12350. <field> <name>DR</name>
  12351. <description>8-bit data register</description>
  12352. <bitOffset>0</bitOffset>
  12353. <bitWidth>8</bitWidth>
  12354. </field>
  12355. </fields>
  12356. </register>
  12357. <register> <name>SR1</name>
  12358. <displayName>SR1</displayName>
  12359. <description>Status register 1</description>
  12360. <addressOffset>0x14</addressOffset>
  12361. <size>0x20</size>
  12362. <resetValue>0x0000</resetValue>
  12363. <fields>
  12364. <field> <name>SMBALERT</name>
  12365. <description>SMBus alert</description>
  12366. <bitOffset>15</bitOffset>
  12367. <bitWidth>1</bitWidth>
  12368. <access>read-write</access>
  12369. </field>
  12370. <field> <name>TIMEOUT</name>
  12371. <description>Timeout or Tlow error</description>
  12372. <bitOffset>14</bitOffset>
  12373. <bitWidth>1</bitWidth>
  12374. <access>read-write</access>
  12375. </field>
  12376. <field> <name>PECERR</name>
  12377. <description>PEC Error in reception</description>
  12378. <bitOffset>12</bitOffset>
  12379. <bitWidth>1</bitWidth>
  12380. <access>read-write</access>
  12381. </field>
  12382. <field> <name>OVR</name>
  12383. <description>Overrun/Underrun</description>
  12384. <bitOffset>11</bitOffset>
  12385. <bitWidth>1</bitWidth>
  12386. <access>read-write</access>
  12387. </field>
  12388. <field> <name>AF</name>
  12389. <description>Acknowledge failure</description>
  12390. <bitOffset>10</bitOffset>
  12391. <bitWidth>1</bitWidth>
  12392. <access>read-write</access>
  12393. </field>
  12394. <field> <name>ARLO</name>
  12395. <description>Arbitration lost (master
  12396. mode)</description>
  12397. <bitOffset>9</bitOffset>
  12398. <bitWidth>1</bitWidth>
  12399. <access>read-write</access>
  12400. </field>
  12401. <field> <name>BERR</name>
  12402. <description>Bus error</description>
  12403. <bitOffset>8</bitOffset>
  12404. <bitWidth>1</bitWidth>
  12405. <access>read-write</access>
  12406. </field>
  12407. <field> <name>TxE</name>
  12408. <description>Data register empty
  12409. (transmitters)</description>
  12410. <bitOffset>7</bitOffset>
  12411. <bitWidth>1</bitWidth>
  12412. <access>read-only</access>
  12413. </field>
  12414. <field> <name>RxNE</name>
  12415. <description>Data register not empty
  12416. (receivers)</description>
  12417. <bitOffset>6</bitOffset>
  12418. <bitWidth>1</bitWidth>
  12419. <access>read-only</access>
  12420. </field>
  12421. <field> <name>STOPF</name>
  12422. <description>Stop detection (slave
  12423. mode)</description>
  12424. <bitOffset>4</bitOffset>
  12425. <bitWidth>1</bitWidth>
  12426. <access>read-only</access>
  12427. </field>
  12428. <field> <name>ADD10</name>
  12429. <description>10-bit header sent (Master
  12430. mode)</description>
  12431. <bitOffset>3</bitOffset>
  12432. <bitWidth>1</bitWidth>
  12433. <access>read-only</access>
  12434. </field>
  12435. <field> <name>BTF</name>
  12436. <description>Byte transfer finished</description>
  12437. <bitOffset>2</bitOffset>
  12438. <bitWidth>1</bitWidth>
  12439. <access>read-only</access>
  12440. </field>
  12441. <field> <name>ADDR</name>
  12442. <description>Address sent (master mode)/matched
  12443. (slave mode)</description>
  12444. <bitOffset>1</bitOffset>
  12445. <bitWidth>1</bitWidth>
  12446. <access>read-only</access>
  12447. </field>
  12448. <field> <name>SB</name>
  12449. <description>Start bit (Master mode)</description>
  12450. <bitOffset>0</bitOffset>
  12451. <bitWidth>1</bitWidth>
  12452. <access>read-only</access>
  12453. </field>
  12454. </fields>
  12455. </register>
  12456. <register> <name>SR2</name>
  12457. <displayName>SR2</displayName>
  12458. <description>Status register 2</description>
  12459. <addressOffset>0x18</addressOffset>
  12460. <size>0x20</size>
  12461. <access>read-only</access>
  12462. <resetValue>0x0000</resetValue>
  12463. <fields>
  12464. <field> <name>PEC</name>
  12465. <description>acket error checking
  12466. register</description>
  12467. <bitOffset>8</bitOffset>
  12468. <bitWidth>8</bitWidth>
  12469. </field>
  12470. <field> <name>DUALF</name>
  12471. <description>Dual flag (Slave mode)</description>
  12472. <bitOffset>7</bitOffset>
  12473. <bitWidth>1</bitWidth>
  12474. </field>
  12475. <field> <name>SMBHOST</name>
  12476. <description>SMBus host header (Slave
  12477. mode)</description>
  12478. <bitOffset>6</bitOffset>
  12479. <bitWidth>1</bitWidth>
  12480. </field>
  12481. <field> <name>SMBDEFAULT</name>
  12482. <description>SMBus device default address (Slave
  12483. mode)</description>
  12484. <bitOffset>5</bitOffset>
  12485. <bitWidth>1</bitWidth>
  12486. </field>
  12487. <field> <name>GENCALL</name>
  12488. <description>General call address (Slave
  12489. mode)</description>
  12490. <bitOffset>4</bitOffset>
  12491. <bitWidth>1</bitWidth>
  12492. </field>
  12493. <field> <name>TRA</name>
  12494. <description>Transmitter/receiver</description>
  12495. <bitOffset>2</bitOffset>
  12496. <bitWidth>1</bitWidth>
  12497. </field>
  12498. <field> <name>BUSY</name>
  12499. <description>Bus busy</description>
  12500. <bitOffset>1</bitOffset>
  12501. <bitWidth>1</bitWidth>
  12502. </field>
  12503. <field> <name>MSL</name>
  12504. <description>Master/slave</description>
  12505. <bitOffset>0</bitOffset>
  12506. <bitWidth>1</bitWidth>
  12507. </field>
  12508. </fields>
  12509. </register>
  12510. <register> <name>CCR</name>
  12511. <displayName>CCR</displayName>
  12512. <description>Clock control register</description>
  12513. <addressOffset>0x1C</addressOffset>
  12514. <size>0x20</size>
  12515. <access>read-write</access>
  12516. <resetValue>0x0000</resetValue>
  12517. <fields>
  12518. <field> <name>F_S</name>
  12519. <description>I2C master mode selection</description>
  12520. <bitOffset>15</bitOffset>
  12521. <bitWidth>1</bitWidth>
  12522. </field>
  12523. <field> <name>DUTY</name>
  12524. <description>Fast mode duty cycle</description>
  12525. <bitOffset>14</bitOffset>
  12526. <bitWidth>1</bitWidth>
  12527. </field>
  12528. <field> <name>CCR</name>
  12529. <description>Clock control register in Fast/Standard
  12530. mode (Master mode)</description>
  12531. <bitOffset>0</bitOffset>
  12532. <bitWidth>12</bitWidth>
  12533. </field>
  12534. </fields>
  12535. </register>
  12536. <register> <name>TRISE</name>
  12537. <displayName>TRISE</displayName>
  12538. <description>TRISE register</description>
  12539. <addressOffset>0x20</addressOffset>
  12540. <size>0x20</size>
  12541. <access>read-write</access>
  12542. <resetValue>0x0002</resetValue>
  12543. <fields>
  12544. <field> <name>TRISE</name>
  12545. <description>Maximum rise time in Fast/Standard mode
  12546. (Master mode)</description>
  12547. <bitOffset>0</bitOffset>
  12548. <bitWidth>6</bitWidth>
  12549. </field>
  12550. </fields>
  12551. </register>
  12552. </registers>
  12553. </peripheral>
  12554. <peripheral derivedFrom="I2C3"> <name>I2C2</name>
  12555. <baseAddress>0x40005800</baseAddress>
  12556. <interrupt>
  12557. <name>I2C2_EV</name>
  12558. <description>I2C2 event interrupt</description>
  12559. <value>33</value>
  12560. </interrupt>
  12561. <interrupt>
  12562. <name>I2C2_ER</name>
  12563. <description>I2C2 error interrupt</description>
  12564. <value>34</value>
  12565. </interrupt>
  12566. </peripheral>
  12567. <peripheral derivedFrom="I2C3"> <name>I2C1</name>
  12568. <baseAddress>0x40005400</baseAddress>
  12569. <interrupt>
  12570. <name>I2C1_EV</name>
  12571. <description>I2C1 event interrupt</description>
  12572. <value>31</value>
  12573. </interrupt>
  12574. <interrupt>
  12575. <name>I2C1_ER</name>
  12576. <description>I2C1 error interrupt</description>
  12577. <value>32</value>
  12578. </interrupt>
  12579. </peripheral>
  12580. <peripheral> <name>IWDG</name>
  12581. <description>Independent watchdog</description>
  12582. <groupName>IWDG</groupName>
  12583. <baseAddress>0x40003000</baseAddress>
  12584. <addressBlock>
  12585. <offset>0x0</offset>
  12586. <size>0x400</size>
  12587. <usage>registers</usage>
  12588. </addressBlock>
  12589. <registers>
  12590. <register> <name>KR</name>
  12591. <displayName>KR</displayName>
  12592. <description>Key register</description>
  12593. <addressOffset>0x0</addressOffset>
  12594. <size>0x20</size>
  12595. <access>write-only</access>
  12596. <resetValue>0x00000000</resetValue>
  12597. <fields>
  12598. <field> <name>KEY</name>
  12599. <description>Key value (write only, read
  12600. 0000h)</description>
  12601. <bitOffset>0</bitOffset>
  12602. <bitWidth>16</bitWidth>
  12603. </field>
  12604. </fields>
  12605. </register>
  12606. <register> <name>PR</name>
  12607. <displayName>PR</displayName>
  12608. <description>Prescaler register</description>
  12609. <addressOffset>0x4</addressOffset>
  12610. <size>0x20</size>
  12611. <access>read-write</access>
  12612. <resetValue>0x00000000</resetValue>
  12613. <fields>
  12614. <field> <name>PR</name>
  12615. <description>Prescaler divider</description>
  12616. <bitOffset>0</bitOffset>
  12617. <bitWidth>3</bitWidth>
  12618. </field>
  12619. </fields>
  12620. </register>
  12621. <register> <name>RLR</name>
  12622. <displayName>RLR</displayName>
  12623. <description>Reload register</description>
  12624. <addressOffset>0x8</addressOffset>
  12625. <size>0x20</size>
  12626. <access>read-write</access>
  12627. <resetValue>0x00000FFF</resetValue>
  12628. <fields>
  12629. <field> <name>RL</name>
  12630. <description>Watchdog counter reload
  12631. value</description>
  12632. <bitOffset>0</bitOffset>
  12633. <bitWidth>12</bitWidth>
  12634. </field>
  12635. </fields>
  12636. </register>
  12637. <register> <name>SR</name>
  12638. <displayName>SR</displayName>
  12639. <description>Status register</description>
  12640. <addressOffset>0xC</addressOffset>
  12641. <size>0x20</size>
  12642. <access>read-only</access>
  12643. <resetValue>0x00000000</resetValue>
  12644. <fields>
  12645. <field> <name>RVU</name>
  12646. <description>Watchdog counter reload value
  12647. update</description>
  12648. <bitOffset>1</bitOffset>
  12649. <bitWidth>1</bitWidth>
  12650. </field>
  12651. <field> <name>PVU</name>
  12652. <description>Watchdog prescaler value
  12653. update</description>
  12654. <bitOffset>0</bitOffset>
  12655. <bitWidth>1</bitWidth>
  12656. </field>
  12657. </fields>
  12658. </register>
  12659. </registers>
  12660. </peripheral>
  12661. <peripheral> <name>WWDG</name>
  12662. <description>Window watchdog</description>
  12663. <groupName>WWDG</groupName>
  12664. <baseAddress>0x40002C00</baseAddress>
  12665. <addressBlock>
  12666. <offset>0x0</offset>
  12667. <size>0x400</size>
  12668. <usage>registers</usage>
  12669. </addressBlock>
  12670. <interrupt>
  12671. <name>WWDG</name>
  12672. <description>Window Watchdog interrupt</description>
  12673. <value>0</value>
  12674. </interrupt>
  12675. <registers>
  12676. <register> <name>CR</name>
  12677. <displayName>CR</displayName>
  12678. <description>Control register</description>
  12679. <addressOffset>0x0</addressOffset>
  12680. <size>0x20</size>
  12681. <access>read-write</access>
  12682. <resetValue>0x7F</resetValue>
  12683. <fields>
  12684. <field> <name>WDGA</name>
  12685. <description>Activation bit</description>
  12686. <bitOffset>7</bitOffset>
  12687. <bitWidth>1</bitWidth>
  12688. </field>
  12689. <field> <name>T</name>
  12690. <description>7-bit counter (MSB to LSB)</description>
  12691. <bitOffset>0</bitOffset>
  12692. <bitWidth>7</bitWidth>
  12693. </field>
  12694. </fields>
  12695. </register>
  12696. <register> <name>CFR</name>
  12697. <displayName>CFR</displayName>
  12698. <description>Configuration register</description>
  12699. <addressOffset>0x4</addressOffset>
  12700. <size>0x20</size>
  12701. <access>read-write</access>
  12702. <resetValue>0x7F</resetValue>
  12703. <fields>
  12704. <field> <name>EWI</name>
  12705. <description>Early wakeup interrupt</description>
  12706. <bitOffset>9</bitOffset>
  12707. <bitWidth>1</bitWidth>
  12708. </field>
  12709. <field> <name>WDGTB1</name>
  12710. <description>Timer base</description>
  12711. <bitOffset>8</bitOffset>
  12712. <bitWidth>1</bitWidth>
  12713. </field>
  12714. <field> <name>WDGTB0</name>
  12715. <description>Timer base</description>
  12716. <bitOffset>7</bitOffset>
  12717. <bitWidth>1</bitWidth>
  12718. </field>
  12719. <field> <name>W</name>
  12720. <description>7-bit window value</description>
  12721. <bitOffset>0</bitOffset>
  12722. <bitWidth>7</bitWidth>
  12723. </field>
  12724. </fields>
  12725. </register>
  12726. <register> <name>SR</name>
  12727. <displayName>SR</displayName>
  12728. <description>Status register</description>
  12729. <addressOffset>0x8</addressOffset>
  12730. <size>0x20</size>
  12731. <access>read-write</access>
  12732. <resetValue>0x00</resetValue>
  12733. <fields>
  12734. <field> <name>EWIF</name>
  12735. <description>Early wakeup interrupt
  12736. flag</description>
  12737. <bitOffset>0</bitOffset>
  12738. <bitWidth>1</bitWidth>
  12739. </field>
  12740. </fields>
  12741. </register>
  12742. </registers>
  12743. </peripheral>
  12744. <peripheral> <name>RTC</name>
  12745. <description>Real-time clock</description>
  12746. <groupName>RTC</groupName>
  12747. <baseAddress>0x40002800</baseAddress>
  12748. <addressBlock>
  12749. <offset>0x0</offset>
  12750. <size>0x400</size>
  12751. <usage>registers</usage>
  12752. </addressBlock>
  12753. <interrupt>
  12754. <name>RTC_WKUP</name>
  12755. <description>RTC Wakeup interrupt through the EXTI
  12756. line</description>
  12757. <value>3</value>
  12758. </interrupt>
  12759. <interrupt>
  12760. <name>RTC_Alarm</name>
  12761. <description>RTC Alarms (A and B) through EXTI line
  12762. interrupt</description>
  12763. <value>41</value>
  12764. </interrupt>
  12765. <registers>
  12766. <register> <name>TR</name>
  12767. <displayName>TR</displayName>
  12768. <description>time register</description>
  12769. <addressOffset>0x0</addressOffset>
  12770. <size>0x20</size>
  12771. <access>read-write</access>
  12772. <resetValue>0x00000000</resetValue>
  12773. <fields>
  12774. <field> <name>PM</name>
  12775. <description>AM/PM notation</description>
  12776. <bitOffset>22</bitOffset>
  12777. <bitWidth>1</bitWidth>
  12778. </field>
  12779. <field> <name>HT</name>
  12780. <description>Hour tens in BCD format</description>
  12781. <bitOffset>20</bitOffset>
  12782. <bitWidth>2</bitWidth>
  12783. </field>
  12784. <field> <name>HU</name>
  12785. <description>Hour units in BCD format</description>
  12786. <bitOffset>16</bitOffset>
  12787. <bitWidth>4</bitWidth>
  12788. </field>
  12789. <field> <name>MNT</name>
  12790. <description>Minute tens in BCD format</description>
  12791. <bitOffset>12</bitOffset>
  12792. <bitWidth>3</bitWidth>
  12793. </field>
  12794. <field> <name>MNU</name>
  12795. <description>Minute units in BCD format</description>
  12796. <bitOffset>8</bitOffset>
  12797. <bitWidth>4</bitWidth>
  12798. </field>
  12799. <field> <name>ST</name>
  12800. <description>Second tens in BCD format</description>
  12801. <bitOffset>4</bitOffset>
  12802. <bitWidth>3</bitWidth>
  12803. </field>
  12804. <field> <name>SU</name>
  12805. <description>Second units in BCD format</description>
  12806. <bitOffset>0</bitOffset>
  12807. <bitWidth>4</bitWidth>
  12808. </field>
  12809. </fields>
  12810. </register>
  12811. <register> <name>DR</name>
  12812. <displayName>DR</displayName>
  12813. <description>date register</description>
  12814. <addressOffset>0x4</addressOffset>
  12815. <size>0x20</size>
  12816. <access>read-write</access>
  12817. <resetValue>0x00002101</resetValue>
  12818. <fields>
  12819. <field> <name>YT</name>
  12820. <description>Year tens in BCD format</description>
  12821. <bitOffset>20</bitOffset>
  12822. <bitWidth>4</bitWidth>
  12823. </field>
  12824. <field> <name>YU</name>
  12825. <description>Year units in BCD format</description>
  12826. <bitOffset>16</bitOffset>
  12827. <bitWidth>4</bitWidth>
  12828. </field>
  12829. <field> <name>WDU</name>
  12830. <description>Week day units</description>
  12831. <bitOffset>13</bitOffset>
  12832. <bitWidth>3</bitWidth>
  12833. </field>
  12834. <field> <name>MT</name>
  12835. <description>Month tens in BCD format</description>
  12836. <bitOffset>12</bitOffset>
  12837. <bitWidth>1</bitWidth>
  12838. </field>
  12839. <field> <name>MU</name>
  12840. <description>Month units in BCD format</description>
  12841. <bitOffset>8</bitOffset>
  12842. <bitWidth>4</bitWidth>
  12843. </field>
  12844. <field> <name>DT</name>
  12845. <description>Date tens in BCD format</description>
  12846. <bitOffset>4</bitOffset>
  12847. <bitWidth>2</bitWidth>
  12848. </field>
  12849. <field> <name>DU</name>
  12850. <description>Date units in BCD format</description>
  12851. <bitOffset>0</bitOffset>
  12852. <bitWidth>4</bitWidth>
  12853. </field>
  12854. </fields>
  12855. </register>
  12856. <register> <name>CR</name>
  12857. <displayName>CR</displayName>
  12858. <description>control register</description>
  12859. <addressOffset>0x8</addressOffset>
  12860. <size>0x20</size>
  12861. <access>read-write</access>
  12862. <resetValue>0x00000000</resetValue>
  12863. <fields>
  12864. <field> <name>COE</name>
  12865. <description>Calibration output enable</description>
  12866. <bitOffset>23</bitOffset>
  12867. <bitWidth>1</bitWidth>
  12868. </field>
  12869. <field> <name>OSEL</name>
  12870. <description>Output selection</description>
  12871. <bitOffset>21</bitOffset>
  12872. <bitWidth>2</bitWidth>
  12873. </field>
  12874. <field> <name>POL</name>
  12875. <description>Output polarity</description>
  12876. <bitOffset>20</bitOffset>
  12877. <bitWidth>1</bitWidth>
  12878. </field>
  12879. <field> <name>BKP</name>
  12880. <description>Backup</description>
  12881. <bitOffset>18</bitOffset>
  12882. <bitWidth>1</bitWidth>
  12883. </field>
  12884. <field> <name>SUB1H</name>
  12885. <description>Subtract 1 hour (winter time
  12886. change)</description>
  12887. <bitOffset>17</bitOffset>
  12888. <bitWidth>1</bitWidth>
  12889. </field>
  12890. <field> <name>ADD1H</name>
  12891. <description>Add 1 hour (summer time
  12892. change)</description>
  12893. <bitOffset>16</bitOffset>
  12894. <bitWidth>1</bitWidth>
  12895. </field>
  12896. <field> <name>TSIE</name>
  12897. <description>Time-stamp interrupt
  12898. enable</description>
  12899. <bitOffset>15</bitOffset>
  12900. <bitWidth>1</bitWidth>
  12901. </field>
  12902. <field> <name>WUTIE</name>
  12903. <description>Wakeup timer interrupt
  12904. enable</description>
  12905. <bitOffset>14</bitOffset>
  12906. <bitWidth>1</bitWidth>
  12907. </field>
  12908. <field> <name>ALRBIE</name>
  12909. <description>Alarm B interrupt enable</description>
  12910. <bitOffset>13</bitOffset>
  12911. <bitWidth>1</bitWidth>
  12912. </field>
  12913. <field> <name>ALRAIE</name>
  12914. <description>Alarm A interrupt enable</description>
  12915. <bitOffset>12</bitOffset>
  12916. <bitWidth>1</bitWidth>
  12917. </field>
  12918. <field> <name>TSE</name>
  12919. <description>Time stamp enable</description>
  12920. <bitOffset>11</bitOffset>
  12921. <bitWidth>1</bitWidth>
  12922. </field>
  12923. <field> <name>WUTE</name>
  12924. <description>Wakeup timer enable</description>
  12925. <bitOffset>10</bitOffset>
  12926. <bitWidth>1</bitWidth>
  12927. </field>
  12928. <field> <name>ALRBE</name>
  12929. <description>Alarm B enable</description>
  12930. <bitOffset>9</bitOffset>
  12931. <bitWidth>1</bitWidth>
  12932. </field>
  12933. <field> <name>ALRAE</name>
  12934. <description>Alarm A enable</description>
  12935. <bitOffset>8</bitOffset>
  12936. <bitWidth>1</bitWidth>
  12937. </field>
  12938. <field> <name>DCE</name>
  12939. <description>Coarse digital calibration
  12940. enable</description>
  12941. <bitOffset>7</bitOffset>
  12942. <bitWidth>1</bitWidth>
  12943. </field>
  12944. <field> <name>FMT</name>
  12945. <description>Hour format</description>
  12946. <bitOffset>6</bitOffset>
  12947. <bitWidth>1</bitWidth>
  12948. </field>
  12949. <field> <name>REFCKON</name>
  12950. <description>Reference clock detection enable (50 or
  12951. 60 Hz)</description>
  12952. <bitOffset>4</bitOffset>
  12953. <bitWidth>1</bitWidth>
  12954. </field>
  12955. <field> <name>TSEDGE</name>
  12956. <description>Time-stamp event active
  12957. edge</description>
  12958. <bitOffset>3</bitOffset>
  12959. <bitWidth>1</bitWidth>
  12960. </field>
  12961. <field> <name>WCKSEL</name>
  12962. <description>Wakeup clock selection</description>
  12963. <bitOffset>0</bitOffset>
  12964. <bitWidth>3</bitWidth>
  12965. </field>
  12966. </fields>
  12967. </register>
  12968. <register> <name>ISR</name>
  12969. <displayName>ISR</displayName>
  12970. <description>initialization and status
  12971. register</description>
  12972. <addressOffset>0xC</addressOffset>
  12973. <size>0x20</size>
  12974. <resetValue>0x00000007</resetValue>
  12975. <fields>
  12976. <field> <name>ALRAWF</name>
  12977. <description>Alarm A write flag</description>
  12978. <bitOffset>0</bitOffset>
  12979. <bitWidth>1</bitWidth>
  12980. <access>read-only</access>
  12981. </field>
  12982. <field> <name>ALRBWF</name>
  12983. <description>Alarm B write flag</description>
  12984. <bitOffset>1</bitOffset>
  12985. <bitWidth>1</bitWidth>
  12986. <access>read-only</access>
  12987. </field>
  12988. <field> <name>WUTWF</name>
  12989. <description>Wakeup timer write flag</description>
  12990. <bitOffset>2</bitOffset>
  12991. <bitWidth>1</bitWidth>
  12992. <access>read-only</access>
  12993. </field>
  12994. <field> <name>SHPF</name>
  12995. <description>Shift operation pending</description>
  12996. <bitOffset>3</bitOffset>
  12997. <bitWidth>1</bitWidth>
  12998. <access>read-write</access>
  12999. </field>
  13000. <field> <name>INITS</name>
  13001. <description>Initialization status flag</description>
  13002. <bitOffset>4</bitOffset>
  13003. <bitWidth>1</bitWidth>
  13004. <access>read-only</access>
  13005. </field>
  13006. <field> <name>RSF</name>
  13007. <description>Registers synchronization
  13008. flag</description>
  13009. <bitOffset>5</bitOffset>
  13010. <bitWidth>1</bitWidth>
  13011. <access>read-write</access>
  13012. </field>
  13013. <field> <name>INITF</name>
  13014. <description>Initialization flag</description>
  13015. <bitOffset>6</bitOffset>
  13016. <bitWidth>1</bitWidth>
  13017. <access>read-only</access>
  13018. </field>
  13019. <field> <name>INIT</name>
  13020. <description>Initialization mode</description>
  13021. <bitOffset>7</bitOffset>
  13022. <bitWidth>1</bitWidth>
  13023. <access>read-write</access>
  13024. </field>
  13025. <field> <name>ALRAF</name>
  13026. <description>Alarm A flag</description>
  13027. <bitOffset>8</bitOffset>
  13028. <bitWidth>1</bitWidth>
  13029. <access>read-write</access>
  13030. </field>
  13031. <field> <name>ALRBF</name>
  13032. <description>Alarm B flag</description>
  13033. <bitOffset>9</bitOffset>
  13034. <bitWidth>1</bitWidth>
  13035. <access>read-write</access>
  13036. </field>
  13037. <field> <name>WUTF</name>
  13038. <description>Wakeup timer flag</description>
  13039. <bitOffset>10</bitOffset>
  13040. <bitWidth>1</bitWidth>
  13041. <access>read-write</access>
  13042. </field>
  13043. <field> <name>TSF</name>
  13044. <description>Time-stamp flag</description>
  13045. <bitOffset>11</bitOffset>
  13046. <bitWidth>1</bitWidth>
  13047. <access>read-write</access>
  13048. </field>
  13049. <field> <name>TSOVF</name>
  13050. <description>Time-stamp overflow flag</description>
  13051. <bitOffset>12</bitOffset>
  13052. <bitWidth>1</bitWidth>
  13053. <access>read-write</access>
  13054. </field>
  13055. <field> <name>TAMP1F</name>
  13056. <description>Tamper detection flag</description>
  13057. <bitOffset>13</bitOffset>
  13058. <bitWidth>1</bitWidth>
  13059. <access>read-write</access>
  13060. </field>
  13061. <field> <name>TAMP2F</name>
  13062. <description>TAMPER2 detection flag</description>
  13063. <bitOffset>14</bitOffset>
  13064. <bitWidth>1</bitWidth>
  13065. <access>read-write</access>
  13066. </field>
  13067. <field> <name>RECALPF</name>
  13068. <description>Recalibration pending Flag</description>
  13069. <bitOffset>16</bitOffset>
  13070. <bitWidth>1</bitWidth>
  13071. <access>read-only</access>
  13072. </field>
  13073. </fields>
  13074. </register>
  13075. <register> <name>PRER</name>
  13076. <displayName>PRER</displayName>
  13077. <description>prescaler register</description>
  13078. <addressOffset>0x10</addressOffset>
  13079. <size>0x20</size>
  13080. <access>read-write</access>
  13081. <resetValue>0x007F00FF</resetValue>
  13082. <fields>
  13083. <field> <name>PREDIV_A</name>
  13084. <description>Asynchronous prescaler
  13085. factor</description>
  13086. <bitOffset>16</bitOffset>
  13087. <bitWidth>7</bitWidth>
  13088. </field>
  13089. <field> <name>PREDIV_S</name>
  13090. <description>Synchronous prescaler
  13091. factor</description>
  13092. <bitOffset>0</bitOffset>
  13093. <bitWidth>15</bitWidth>
  13094. </field>
  13095. </fields>
  13096. </register>
  13097. <register> <name>WUTR</name>
  13098. <displayName>WUTR</displayName>
  13099. <description>wakeup timer register</description>
  13100. <addressOffset>0x14</addressOffset>
  13101. <size>0x20</size>
  13102. <access>read-write</access>
  13103. <resetValue>0x0000FFFF</resetValue>
  13104. <fields>
  13105. <field> <name>WUT</name>
  13106. <description>Wakeup auto-reload value
  13107. bits</description>
  13108. <bitOffset>0</bitOffset>
  13109. <bitWidth>16</bitWidth>
  13110. </field>
  13111. </fields>
  13112. </register>
  13113. <register> <name>CALIBR</name>
  13114. <displayName>CALIBR</displayName>
  13115. <description>calibration register</description>
  13116. <addressOffset>0x18</addressOffset>
  13117. <size>0x20</size>
  13118. <access>read-write</access>
  13119. <resetValue>0x00000000</resetValue>
  13120. <fields>
  13121. <field> <name>DCS</name>
  13122. <description>Digital calibration sign</description>
  13123. <bitOffset>7</bitOffset>
  13124. <bitWidth>1</bitWidth>
  13125. </field>
  13126. <field> <name>DC</name>
  13127. <description>Digital calibration</description>
  13128. <bitOffset>0</bitOffset>
  13129. <bitWidth>5</bitWidth>
  13130. </field>
  13131. </fields>
  13132. </register>
  13133. <register> <name>ALRMAR</name>
  13134. <displayName>ALRMAR</displayName>
  13135. <description>alarm A register</description>
  13136. <addressOffset>0x1C</addressOffset>
  13137. <size>0x20</size>
  13138. <access>read-write</access>
  13139. <resetValue>0x00000000</resetValue>
  13140. <fields>
  13141. <field> <name>MSK4</name>
  13142. <description>Alarm A date mask</description>
  13143. <bitOffset>31</bitOffset>
  13144. <bitWidth>1</bitWidth>
  13145. </field>
  13146. <field> <name>WDSEL</name>
  13147. <description>Week day selection</description>
  13148. <bitOffset>30</bitOffset>
  13149. <bitWidth>1</bitWidth>
  13150. </field>
  13151. <field> <name>DT</name>
  13152. <description>Date tens in BCD format</description>
  13153. <bitOffset>28</bitOffset>
  13154. <bitWidth>2</bitWidth>
  13155. </field>
  13156. <field> <name>DU</name>
  13157. <description>Date units or day in BCD
  13158. format</description>
  13159. <bitOffset>24</bitOffset>
  13160. <bitWidth>4</bitWidth>
  13161. </field>
  13162. <field> <name>MSK3</name>
  13163. <description>Alarm A hours mask</description>
  13164. <bitOffset>23</bitOffset>
  13165. <bitWidth>1</bitWidth>
  13166. </field>
  13167. <field> <name>PM</name>
  13168. <description>AM/PM notation</description>
  13169. <bitOffset>22</bitOffset>
  13170. <bitWidth>1</bitWidth>
  13171. </field>
  13172. <field> <name>HT</name>
  13173. <description>Hour tens in BCD format</description>
  13174. <bitOffset>20</bitOffset>
  13175. <bitWidth>2</bitWidth>
  13176. </field>
  13177. <field> <name>HU</name>
  13178. <description>Hour units in BCD format</description>
  13179. <bitOffset>16</bitOffset>
  13180. <bitWidth>4</bitWidth>
  13181. </field>
  13182. <field> <name>MSK2</name>
  13183. <description>Alarm A minutes mask</description>
  13184. <bitOffset>15</bitOffset>
  13185. <bitWidth>1</bitWidth>
  13186. </field>
  13187. <field> <name>MNT</name>
  13188. <description>Minute tens in BCD format</description>
  13189. <bitOffset>12</bitOffset>
  13190. <bitWidth>3</bitWidth>
  13191. </field>
  13192. <field> <name>MNU</name>
  13193. <description>Minute units in BCD format</description>
  13194. <bitOffset>8</bitOffset>
  13195. <bitWidth>4</bitWidth>
  13196. </field>
  13197. <field> <name>MSK1</name>
  13198. <description>Alarm A seconds mask</description>
  13199. <bitOffset>7</bitOffset>
  13200. <bitWidth>1</bitWidth>
  13201. </field>
  13202. <field> <name>ST</name>
  13203. <description>Second tens in BCD format</description>
  13204. <bitOffset>4</bitOffset>
  13205. <bitWidth>3</bitWidth>
  13206. </field>
  13207. <field> <name>SU</name>
  13208. <description>Second units in BCD format</description>
  13209. <bitOffset>0</bitOffset>
  13210. <bitWidth>4</bitWidth>
  13211. </field>
  13212. </fields>
  13213. </register>
  13214. <register> <name>ALRMBR</name>
  13215. <displayName>ALRMBR</displayName>
  13216. <description>alarm B register</description>
  13217. <addressOffset>0x20</addressOffset>
  13218. <size>0x20</size>
  13219. <access>read-write</access>
  13220. <resetValue>0x00000000</resetValue>
  13221. <fields>
  13222. <field> <name>MSK4</name>
  13223. <description>Alarm B date mask</description>
  13224. <bitOffset>31</bitOffset>
  13225. <bitWidth>1</bitWidth>
  13226. </field>
  13227. <field> <name>WDSEL</name>
  13228. <description>Week day selection</description>
  13229. <bitOffset>30</bitOffset>
  13230. <bitWidth>1</bitWidth>
  13231. </field>
  13232. <field> <name>DT</name>
  13233. <description>Date tens in BCD format</description>
  13234. <bitOffset>28</bitOffset>
  13235. <bitWidth>2</bitWidth>
  13236. </field>
  13237. <field> <name>DU</name>
  13238. <description>Date units or day in BCD
  13239. format</description>
  13240. <bitOffset>24</bitOffset>
  13241. <bitWidth>4</bitWidth>
  13242. </field>
  13243. <field> <name>MSK3</name>
  13244. <description>Alarm B hours mask</description>
  13245. <bitOffset>23</bitOffset>
  13246. <bitWidth>1</bitWidth>
  13247. </field>
  13248. <field> <name>PM</name>
  13249. <description>AM/PM notation</description>
  13250. <bitOffset>22</bitOffset>
  13251. <bitWidth>1</bitWidth>
  13252. </field>
  13253. <field> <name>HT</name>
  13254. <description>Hour tens in BCD format</description>
  13255. <bitOffset>20</bitOffset>
  13256. <bitWidth>2</bitWidth>
  13257. </field>
  13258. <field> <name>HU</name>
  13259. <description>Hour units in BCD format</description>
  13260. <bitOffset>16</bitOffset>
  13261. <bitWidth>4</bitWidth>
  13262. </field>
  13263. <field> <name>MSK2</name>
  13264. <description>Alarm B minutes mask</description>
  13265. <bitOffset>15</bitOffset>
  13266. <bitWidth>1</bitWidth>
  13267. </field>
  13268. <field> <name>MNT</name>
  13269. <description>Minute tens in BCD format</description>
  13270. <bitOffset>12</bitOffset>
  13271. <bitWidth>3</bitWidth>
  13272. </field>
  13273. <field> <name>MNU</name>
  13274. <description>Minute units in BCD format</description>
  13275. <bitOffset>8</bitOffset>
  13276. <bitWidth>4</bitWidth>
  13277. </field>
  13278. <field> <name>MSK1</name>
  13279. <description>Alarm B seconds mask</description>
  13280. <bitOffset>7</bitOffset>
  13281. <bitWidth>1</bitWidth>
  13282. </field>
  13283. <field> <name>ST</name>
  13284. <description>Second tens in BCD format</description>
  13285. <bitOffset>4</bitOffset>
  13286. <bitWidth>3</bitWidth>
  13287. </field>
  13288. <field> <name>SU</name>
  13289. <description>Second units in BCD format</description>
  13290. <bitOffset>0</bitOffset>
  13291. <bitWidth>4</bitWidth>
  13292. </field>
  13293. </fields>
  13294. </register>
  13295. <register> <name>WPR</name>
  13296. <displayName>WPR</displayName>
  13297. <description>write protection register</description>
  13298. <addressOffset>0x24</addressOffset>
  13299. <size>0x20</size>
  13300. <access>write-only</access>
  13301. <resetValue>0x00000000</resetValue>
  13302. <fields>
  13303. <field> <name>KEY</name>
  13304. <description>Write protection key</description>
  13305. <bitOffset>0</bitOffset>
  13306. <bitWidth>8</bitWidth>
  13307. </field>
  13308. </fields>
  13309. </register>
  13310. <register> <name>SSR</name>
  13311. <displayName>SSR</displayName>
  13312. <description>sub second register</description>
  13313. <addressOffset>0x28</addressOffset>
  13314. <size>0x20</size>
  13315. <access>read-only</access>
  13316. <resetValue>0x00000000</resetValue>
  13317. <fields>
  13318. <field> <name>SS</name>
  13319. <description>Sub second value</description>
  13320. <bitOffset>0</bitOffset>
  13321. <bitWidth>16</bitWidth>
  13322. </field>
  13323. </fields>
  13324. </register>
  13325. <register> <name>SHIFTR</name>
  13326. <displayName>SHIFTR</displayName>
  13327. <description>shift control register</description>
  13328. <addressOffset>0x2C</addressOffset>
  13329. <size>0x20</size>
  13330. <access>write-only</access>
  13331. <resetValue>0x00000000</resetValue>
  13332. <fields>
  13333. <field> <name>ADD1S</name>
  13334. <description>Add one second</description>
  13335. <bitOffset>31</bitOffset>
  13336. <bitWidth>1</bitWidth>
  13337. </field>
  13338. <field> <name>SUBFS</name>
  13339. <description>Subtract a fraction of a
  13340. second</description>
  13341. <bitOffset>0</bitOffset>
  13342. <bitWidth>15</bitWidth>
  13343. </field>
  13344. </fields>
  13345. </register>
  13346. <register> <name>TSTR</name>
  13347. <displayName>TSTR</displayName>
  13348. <description>time stamp time register</description>
  13349. <addressOffset>0x30</addressOffset>
  13350. <size>0x20</size>
  13351. <access>read-only</access>
  13352. <resetValue>0x00000000</resetValue>
  13353. <fields>
  13354. <field> <name>ALARMOUTTYPE</name>
  13355. <description>AFO_ALARM output type</description>
  13356. <bitOffset>18</bitOffset>
  13357. <bitWidth>1</bitWidth>
  13358. </field>
  13359. <field> <name>TSINSEL</name>
  13360. <description>TIMESTAMP mapping</description>
  13361. <bitOffset>17</bitOffset>
  13362. <bitWidth>1</bitWidth>
  13363. </field>
  13364. <field> <name>TAMP1INSEL</name>
  13365. <description>TAMPER1 mapping</description>
  13366. <bitOffset>16</bitOffset>
  13367. <bitWidth>1</bitWidth>
  13368. </field>
  13369. <field> <name>TAMPIE</name>
  13370. <description>Tamper interrupt enable</description>
  13371. <bitOffset>2</bitOffset>
  13372. <bitWidth>1</bitWidth>
  13373. </field>
  13374. <field> <name>TAMP1TRG</name>
  13375. <description>Active level for tamper 1</description>
  13376. <bitOffset>1</bitOffset>
  13377. <bitWidth>1</bitWidth>
  13378. </field>
  13379. <field> <name>TAMP1E</name>
  13380. <description>Tamper 1 detection enable</description>
  13381. <bitOffset>0</bitOffset>
  13382. <bitWidth>1</bitWidth>
  13383. </field>
  13384. </fields>
  13385. </register>
  13386. <register> <name>TSDR</name>
  13387. <displayName>TSDR</displayName>
  13388. <description>time stamp date register</description>
  13389. <addressOffset>0x34</addressOffset>
  13390. <size>0x20</size>
  13391. <access>read-only</access>
  13392. <resetValue>0x00000000</resetValue>
  13393. <fields>
  13394. <field> <name>WDU</name>
  13395. <description>Week day units</description>
  13396. <bitOffset>13</bitOffset>
  13397. <bitWidth>3</bitWidth>
  13398. </field>
  13399. <field> <name>MT</name>
  13400. <description>Month tens in BCD format</description>
  13401. <bitOffset>12</bitOffset>
  13402. <bitWidth>1</bitWidth>
  13403. </field>
  13404. <field> <name>MU</name>
  13405. <description>Month units in BCD format</description>
  13406. <bitOffset>8</bitOffset>
  13407. <bitWidth>4</bitWidth>
  13408. </field>
  13409. <field> <name>DT</name>
  13410. <description>Date tens in BCD format</description>
  13411. <bitOffset>4</bitOffset>
  13412. <bitWidth>2</bitWidth>
  13413. </field>
  13414. <field> <name>DU</name>
  13415. <description>Date units in BCD format</description>
  13416. <bitOffset>0</bitOffset>
  13417. <bitWidth>4</bitWidth>
  13418. </field>
  13419. </fields>
  13420. </register>
  13421. <register> <name>TSSSR</name>
  13422. <displayName>TSSSR</displayName>
  13423. <description>timestamp sub second register</description>
  13424. <addressOffset>0x38</addressOffset>
  13425. <size>0x20</size>
  13426. <access>read-only</access>
  13427. <resetValue>0x00000000</resetValue>
  13428. <fields>
  13429. <field> <name>SS</name>
  13430. <description>Sub second value</description>
  13431. <bitOffset>0</bitOffset>
  13432. <bitWidth>16</bitWidth>
  13433. </field>
  13434. </fields>
  13435. </register>
  13436. <register> <name>CALR</name>
  13437. <displayName>CALR</displayName>
  13438. <description>calibration register</description>
  13439. <addressOffset>0x3C</addressOffset>
  13440. <size>0x20</size>
  13441. <access>read-write</access>
  13442. <resetValue>0x00000000</resetValue>
  13443. <fields>
  13444. <field> <name>CALP</name>
  13445. <description>Increase frequency of RTC by 488.5
  13446. ppm</description>
  13447. <bitOffset>15</bitOffset>
  13448. <bitWidth>1</bitWidth>
  13449. </field>
  13450. <field> <name>CALW8</name>
  13451. <description>Use an 8-second calibration cycle
  13452. period</description>
  13453. <bitOffset>14</bitOffset>
  13454. <bitWidth>1</bitWidth>
  13455. </field>
  13456. <field> <name>CALW16</name>
  13457. <description>Use a 16-second calibration cycle
  13458. period</description>
  13459. <bitOffset>13</bitOffset>
  13460. <bitWidth>1</bitWidth>
  13461. </field>
  13462. <field> <name>CALM</name>
  13463. <description>Calibration minus</description>
  13464. <bitOffset>0</bitOffset>
  13465. <bitWidth>9</bitWidth>
  13466. </field>
  13467. </fields>
  13468. </register>
  13469. <register> <name>TAFCR</name>
  13470. <displayName>TAFCR</displayName>
  13471. <description>tamper and alternate function configuration
  13472. register</description>
  13473. <addressOffset>0x40</addressOffset>
  13474. <size>0x20</size>
  13475. <access>read-write</access>
  13476. <resetValue>0x00000000</resetValue>
  13477. <fields>
  13478. <field> <name>ALARMOUTTYPE</name>
  13479. <description>AFO_ALARM output type</description>
  13480. <bitOffset>18</bitOffset>
  13481. <bitWidth>1</bitWidth>
  13482. </field>
  13483. <field> <name>TSINSEL</name>
  13484. <description>TIMESTAMP mapping</description>
  13485. <bitOffset>17</bitOffset>
  13486. <bitWidth>1</bitWidth>
  13487. </field>
  13488. <field> <name>TAMP1INSEL</name>
  13489. <description>TAMPER1 mapping</description>
  13490. <bitOffset>16</bitOffset>
  13491. <bitWidth>1</bitWidth>
  13492. </field>
  13493. <field> <name>TAMPPUDIS</name>
  13494. <description>TAMPER pull-up disable</description>
  13495. <bitOffset>15</bitOffset>
  13496. <bitWidth>1</bitWidth>
  13497. </field>
  13498. <field> <name>TAMPPRCH</name>
  13499. <description>Tamper precharge duration</description>
  13500. <bitOffset>13</bitOffset>
  13501. <bitWidth>2</bitWidth>
  13502. </field>
  13503. <field> <name>TAMPFLT</name>
  13504. <description>Tamper filter count</description>
  13505. <bitOffset>11</bitOffset>
  13506. <bitWidth>2</bitWidth>
  13507. </field>
  13508. <field> <name>TAMPFREQ</name>
  13509. <description>Tamper sampling frequency</description>
  13510. <bitOffset>8</bitOffset>
  13511. <bitWidth>3</bitWidth>
  13512. </field>
  13513. <field> <name>TAMPTS</name>
  13514. <description>Activate timestamp on tamper detection
  13515. event</description>
  13516. <bitOffset>7</bitOffset>
  13517. <bitWidth>1</bitWidth>
  13518. </field>
  13519. <field> <name>TAMP2TRG</name>
  13520. <description>Active level for tamper 2</description>
  13521. <bitOffset>4</bitOffset>
  13522. <bitWidth>1</bitWidth>
  13523. </field>
  13524. <field> <name>TAMP2E</name>
  13525. <description>Tamper 2 detection enable</description>
  13526. <bitOffset>3</bitOffset>
  13527. <bitWidth>1</bitWidth>
  13528. </field>
  13529. <field> <name>TAMPIE</name>
  13530. <description>Tamper interrupt enable</description>
  13531. <bitOffset>2</bitOffset>
  13532. <bitWidth>1</bitWidth>
  13533. </field>
  13534. <field> <name>TAMP1TRG</name>
  13535. <description>Active level for tamper 1</description>
  13536. <bitOffset>1</bitOffset>
  13537. <bitWidth>1</bitWidth>
  13538. </field>
  13539. <field> <name>TAMP1E</name>
  13540. <description>Tamper 1 detection enable</description>
  13541. <bitOffset>0</bitOffset>
  13542. <bitWidth>1</bitWidth>
  13543. </field>
  13544. </fields>
  13545. </register>
  13546. <register> <name>ALRMASSR</name>
  13547. <displayName>ALRMASSR</displayName>
  13548. <description>alarm A sub second register</description>
  13549. <addressOffset>0x44</addressOffset>
  13550. <size>0x20</size>
  13551. <access>read-write</access>
  13552. <resetValue>0x00000000</resetValue>
  13553. <fields>
  13554. <field> <name>MASKSS</name>
  13555. <description>Mask the most-significant bits starting
  13556. at this bit</description>
  13557. <bitOffset>24</bitOffset>
  13558. <bitWidth>4</bitWidth>
  13559. </field>
  13560. <field> <name>SS</name>
  13561. <description>Sub seconds value</description>
  13562. <bitOffset>0</bitOffset>
  13563. <bitWidth>15</bitWidth>
  13564. </field>
  13565. </fields>
  13566. </register>
  13567. <register> <name>ALRMBSSR</name>
  13568. <displayName>ALRMBSSR</displayName>
  13569. <description>alarm B sub second register</description>
  13570. <addressOffset>0x48</addressOffset>
  13571. <size>0x20</size>
  13572. <access>read-write</access>
  13573. <resetValue>0x00000000</resetValue>
  13574. <fields>
  13575. <field> <name>MASKSS</name>
  13576. <description>Mask the most-significant bits starting
  13577. at this bit</description>
  13578. <bitOffset>24</bitOffset>
  13579. <bitWidth>4</bitWidth>
  13580. </field>
  13581. <field> <name>SS</name>
  13582. <description>Sub seconds value</description>
  13583. <bitOffset>0</bitOffset>
  13584. <bitWidth>15</bitWidth>
  13585. </field>
  13586. </fields>
  13587. </register>
  13588. <register> <name>BKP0R</name>
  13589. <displayName>BKP0R</displayName>
  13590. <description>backup register</description>
  13591. <addressOffset>0x50</addressOffset>
  13592. <size>0x20</size>
  13593. <access>read-write</access>
  13594. <resetValue>0x00000000</resetValue>
  13595. <fields>
  13596. <field> <name>BKP</name>
  13597. <description>BKP</description>
  13598. <bitOffset>0</bitOffset>
  13599. <bitWidth>32</bitWidth>
  13600. </field>
  13601. </fields>
  13602. </register>
  13603. <register> <name>BKP1R</name>
  13604. <displayName>BKP1R</displayName>
  13605. <description>backup register</description>
  13606. <addressOffset>0x54</addressOffset>
  13607. <size>0x20</size>
  13608. <access>read-write</access>
  13609. <resetValue>0x00000000</resetValue>
  13610. <fields>
  13611. <field> <name>BKP</name>
  13612. <description>BKP</description>
  13613. <bitOffset>0</bitOffset>
  13614. <bitWidth>32</bitWidth>
  13615. </field>
  13616. </fields>
  13617. </register>
  13618. <register> <name>BKP2R</name>
  13619. <displayName>BKP2R</displayName>
  13620. <description>backup register</description>
  13621. <addressOffset>0x58</addressOffset>
  13622. <size>0x20</size>
  13623. <access>read-write</access>
  13624. <resetValue>0x00000000</resetValue>
  13625. <fields>
  13626. <field> <name>BKP</name>
  13627. <description>BKP</description>
  13628. <bitOffset>0</bitOffset>
  13629. <bitWidth>32</bitWidth>
  13630. </field>
  13631. </fields>
  13632. </register>
  13633. <register> <name>BKP3R</name>
  13634. <displayName>BKP3R</displayName>
  13635. <description>backup register</description>
  13636. <addressOffset>0x5C</addressOffset>
  13637. <size>0x20</size>
  13638. <access>read-write</access>
  13639. <resetValue>0x00000000</resetValue>
  13640. <fields>
  13641. <field> <name>BKP</name>
  13642. <description>BKP</description>
  13643. <bitOffset>0</bitOffset>
  13644. <bitWidth>32</bitWidth>
  13645. </field>
  13646. </fields>
  13647. </register>
  13648. <register> <name>BKP4R</name>
  13649. <displayName>BKP4R</displayName>
  13650. <description>backup register</description>
  13651. <addressOffset>0x60</addressOffset>
  13652. <size>0x20</size>
  13653. <access>read-write</access>
  13654. <resetValue>0x00000000</resetValue>
  13655. <fields>
  13656. <field> <name>BKP</name>
  13657. <description>BKP</description>
  13658. <bitOffset>0</bitOffset>
  13659. <bitWidth>32</bitWidth>
  13660. </field>
  13661. </fields>
  13662. </register>
  13663. <register> <name>BKP5R</name>
  13664. <displayName>BKP5R</displayName>
  13665. <description>backup register</description>
  13666. <addressOffset>0x64</addressOffset>
  13667. <size>0x20</size>
  13668. <access>read-write</access>
  13669. <resetValue>0x00000000</resetValue>
  13670. <fields>
  13671. <field> <name>BKP</name>
  13672. <description>BKP</description>
  13673. <bitOffset>0</bitOffset>
  13674. <bitWidth>32</bitWidth>
  13675. </field>
  13676. </fields>
  13677. </register>
  13678. <register> <name>BKP6R</name>
  13679. <displayName>BKP6R</displayName>
  13680. <description>backup register</description>
  13681. <addressOffset>0x68</addressOffset>
  13682. <size>0x20</size>
  13683. <access>read-write</access>
  13684. <resetValue>0x00000000</resetValue>
  13685. <fields>
  13686. <field> <name>BKP</name>
  13687. <description>BKP</description>
  13688. <bitOffset>0</bitOffset>
  13689. <bitWidth>32</bitWidth>
  13690. </field>
  13691. </fields>
  13692. </register>
  13693. <register> <name>BKP7R</name>
  13694. <displayName>BKP7R</displayName>
  13695. <description>backup register</description>
  13696. <addressOffset>0x6C</addressOffset>
  13697. <size>0x20</size>
  13698. <access>read-write</access>
  13699. <resetValue>0x00000000</resetValue>
  13700. <fields>
  13701. <field> <name>BKP</name>
  13702. <description>BKP</description>
  13703. <bitOffset>0</bitOffset>
  13704. <bitWidth>32</bitWidth>
  13705. </field>
  13706. </fields>
  13707. </register>
  13708. <register> <name>BKP8R</name>
  13709. <displayName>BKP8R</displayName>
  13710. <description>backup register</description>
  13711. <addressOffset>0x70</addressOffset>
  13712. <size>0x20</size>
  13713. <access>read-write</access>
  13714. <resetValue>0x00000000</resetValue>
  13715. <fields>
  13716. <field> <name>BKP</name>
  13717. <description>BKP</description>
  13718. <bitOffset>0</bitOffset>
  13719. <bitWidth>32</bitWidth>
  13720. </field>
  13721. </fields>
  13722. </register>
  13723. <register> <name>BKP9R</name>
  13724. <displayName>BKP9R</displayName>
  13725. <description>backup register</description>
  13726. <addressOffset>0x74</addressOffset>
  13727. <size>0x20</size>
  13728. <access>read-write</access>
  13729. <resetValue>0x00000000</resetValue>
  13730. <fields>
  13731. <field> <name>BKP</name>
  13732. <description>BKP</description>
  13733. <bitOffset>0</bitOffset>
  13734. <bitWidth>32</bitWidth>
  13735. </field>
  13736. </fields>
  13737. </register>
  13738. <register> <name>BKP10R</name>
  13739. <displayName>BKP10R</displayName>
  13740. <description>backup register</description>
  13741. <addressOffset>0x78</addressOffset>
  13742. <size>0x20</size>
  13743. <access>read-write</access>
  13744. <resetValue>0x00000000</resetValue>
  13745. <fields>
  13746. <field> <name>BKP</name>
  13747. <description>BKP</description>
  13748. <bitOffset>0</bitOffset>
  13749. <bitWidth>32</bitWidth>
  13750. </field>
  13751. </fields>
  13752. </register>
  13753. <register> <name>BKP11R</name>
  13754. <displayName>BKP11R</displayName>
  13755. <description>backup register</description>
  13756. <addressOffset>0x7C</addressOffset>
  13757. <size>0x20</size>
  13758. <access>read-write</access>
  13759. <resetValue>0x00000000</resetValue>
  13760. <fields>
  13761. <field> <name>BKP</name>
  13762. <description>BKP</description>
  13763. <bitOffset>0</bitOffset>
  13764. <bitWidth>32</bitWidth>
  13765. </field>
  13766. </fields>
  13767. </register>
  13768. <register> <name>BKP12R</name>
  13769. <displayName>BKP12R</displayName>
  13770. <description>backup register</description>
  13771. <addressOffset>0x80</addressOffset>
  13772. <size>0x20</size>
  13773. <access>read-write</access>
  13774. <resetValue>0x00000000</resetValue>
  13775. <fields>
  13776. <field> <name>BKP</name>
  13777. <description>BKP</description>
  13778. <bitOffset>0</bitOffset>
  13779. <bitWidth>32</bitWidth>
  13780. </field>
  13781. </fields>
  13782. </register>
  13783. <register> <name>BKP13R</name>
  13784. <displayName>BKP13R</displayName>
  13785. <description>backup register</description>
  13786. <addressOffset>0x84</addressOffset>
  13787. <size>0x20</size>
  13788. <access>read-write</access>
  13789. <resetValue>0x00000000</resetValue>
  13790. <fields>
  13791. <field> <name>BKP</name>
  13792. <description>BKP</description>
  13793. <bitOffset>0</bitOffset>
  13794. <bitWidth>32</bitWidth>
  13795. </field>
  13796. </fields>
  13797. </register>
  13798. <register> <name>BKP14R</name>
  13799. <displayName>BKP14R</displayName>
  13800. <description>backup register</description>
  13801. <addressOffset>0x88</addressOffset>
  13802. <size>0x20</size>
  13803. <access>read-write</access>
  13804. <resetValue>0x00000000</resetValue>
  13805. <fields>
  13806. <field> <name>BKP</name>
  13807. <description>BKP</description>
  13808. <bitOffset>0</bitOffset>
  13809. <bitWidth>32</bitWidth>
  13810. </field>
  13811. </fields>
  13812. </register>
  13813. <register> <name>BKP15R</name>
  13814. <displayName>BKP15R</displayName>
  13815. <description>backup register</description>
  13816. <addressOffset>0x8C</addressOffset>
  13817. <size>0x20</size>
  13818. <access>read-write</access>
  13819. <resetValue>0x00000000</resetValue>
  13820. <fields>
  13821. <field> <name>BKP</name>
  13822. <description>BKP</description>
  13823. <bitOffset>0</bitOffset>
  13824. <bitWidth>32</bitWidth>
  13825. </field>
  13826. </fields>
  13827. </register>
  13828. <register> <name>BKP16R</name>
  13829. <displayName>BKP16R</displayName>
  13830. <description>backup register</description>
  13831. <addressOffset>0x90</addressOffset>
  13832. <size>0x20</size>
  13833. <access>read-write</access>
  13834. <resetValue>0x00000000</resetValue>
  13835. <fields>
  13836. <field> <name>BKP</name>
  13837. <description>BKP</description>
  13838. <bitOffset>0</bitOffset>
  13839. <bitWidth>32</bitWidth>
  13840. </field>
  13841. </fields>
  13842. </register>
  13843. <register> <name>BKP17R</name>
  13844. <displayName>BKP17R</displayName>
  13845. <description>backup register</description>
  13846. <addressOffset>0x94</addressOffset>
  13847. <size>0x20</size>
  13848. <access>read-write</access>
  13849. <resetValue>0x00000000</resetValue>
  13850. <fields>
  13851. <field> <name>BKP</name>
  13852. <description>BKP</description>
  13853. <bitOffset>0</bitOffset>
  13854. <bitWidth>32</bitWidth>
  13855. </field>
  13856. </fields>
  13857. </register>
  13858. <register> <name>BKP18R</name>
  13859. <displayName>BKP18R</displayName>
  13860. <description>backup register</description>
  13861. <addressOffset>0x98</addressOffset>
  13862. <size>0x20</size>
  13863. <access>read-write</access>
  13864. <resetValue>0x00000000</resetValue>
  13865. <fields>
  13866. <field> <name>BKP</name>
  13867. <description>BKP</description>
  13868. <bitOffset>0</bitOffset>
  13869. <bitWidth>32</bitWidth>
  13870. </field>
  13871. </fields>
  13872. </register>
  13873. <register> <name>BKP19R</name>
  13874. <displayName>BKP19R</displayName>
  13875. <description>backup register</description>
  13876. <addressOffset>0x9C</addressOffset>
  13877. <size>0x20</size>
  13878. <access>read-write</access>
  13879. <resetValue>0x00000000</resetValue>
  13880. <fields>
  13881. <field> <name>BKP</name>
  13882. <description>BKP</description>
  13883. <bitOffset>0</bitOffset>
  13884. <bitWidth>32</bitWidth>
  13885. </field>
  13886. </fields>
  13887. </register>
  13888. </registers>
  13889. </peripheral>
  13890. <peripheral> <name>UART4</name>
  13891. <description>Universal synchronous asynchronous receiver
  13892. transmitter</description>
  13893. <groupName>USART</groupName>
  13894. <baseAddress>0x40004C00</baseAddress>
  13895. <addressBlock>
  13896. <offset>0x0</offset>
  13897. <size>0x400</size>
  13898. <usage>registers</usage>
  13899. </addressBlock>
  13900. <interrupt>
  13901. <name>UART4</name>
  13902. <description>UART4 global interrupt</description>
  13903. <value>52</value>
  13904. </interrupt>
  13905. <registers>
  13906. <register> <name>SR</name>
  13907. <displayName>SR</displayName>
  13908. <description>Status register</description>
  13909. <addressOffset>0x0</addressOffset>
  13910. <size>0x20</size>
  13911. <resetValue>0x00C00000</resetValue>
  13912. <fields>
  13913. <field> <name>LBD</name>
  13914. <description>LIN break detection flag</description>
  13915. <bitOffset>8</bitOffset>
  13916. <bitWidth>1</bitWidth>
  13917. <access>read-write</access>
  13918. </field>
  13919. <field> <name>TXE</name>
  13920. <description>Transmit data register
  13921. empty</description>
  13922. <bitOffset>7</bitOffset>
  13923. <bitWidth>1</bitWidth>
  13924. <access>read-only</access>
  13925. </field>
  13926. <field> <name>TC</name>
  13927. <description>Transmission complete</description>
  13928. <bitOffset>6</bitOffset>
  13929. <bitWidth>1</bitWidth>
  13930. <access>read-write</access>
  13931. </field>
  13932. <field> <name>RXNE</name>
  13933. <description>Read data register not
  13934. empty</description>
  13935. <bitOffset>5</bitOffset>
  13936. <bitWidth>1</bitWidth>
  13937. <access>read-write</access>
  13938. </field>
  13939. <field> <name>IDLE</name>
  13940. <description>IDLE line detected</description>
  13941. <bitOffset>4</bitOffset>
  13942. <bitWidth>1</bitWidth>
  13943. <access>read-only</access>
  13944. </field>
  13945. <field> <name>ORE</name>
  13946. <description>Overrun error</description>
  13947. <bitOffset>3</bitOffset>
  13948. <bitWidth>1</bitWidth>
  13949. <access>read-only</access>
  13950. </field>
  13951. <field> <name>NF</name>
  13952. <description>Noise detected flag</description>
  13953. <bitOffset>2</bitOffset>
  13954. <bitWidth>1</bitWidth>
  13955. <access>read-only</access>
  13956. </field>
  13957. <field> <name>FE</name>
  13958. <description>Framing error</description>
  13959. <bitOffset>1</bitOffset>
  13960. <bitWidth>1</bitWidth>
  13961. <access>read-only</access>
  13962. </field>
  13963. <field> <name>PE</name>
  13964. <description>Parity error</description>
  13965. <bitOffset>0</bitOffset>
  13966. <bitWidth>1</bitWidth>
  13967. <access>read-only</access>
  13968. </field>
  13969. </fields>
  13970. </register>
  13971. <register> <name>DR</name>
  13972. <displayName>DR</displayName>
  13973. <description>Data register</description>
  13974. <addressOffset>0x4</addressOffset>
  13975. <size>0x20</size>
  13976. <access>read-write</access>
  13977. <resetValue>0x00000000</resetValue>
  13978. <fields>
  13979. <field> <name>DR</name>
  13980. <description>Data value</description>
  13981. <bitOffset>0</bitOffset>
  13982. <bitWidth>9</bitWidth>
  13983. </field>
  13984. </fields>
  13985. </register>
  13986. <register> <name>BRR</name>
  13987. <displayName>BRR</displayName>
  13988. <description>Baud rate register</description>
  13989. <addressOffset>0x8</addressOffset>
  13990. <size>0x20</size>
  13991. <access>read-write</access>
  13992. <resetValue>0x0000</resetValue>
  13993. <fields>
  13994. <field> <name>DIV_Mantissa</name>
  13995. <description>mantissa of USARTDIV</description>
  13996. <bitOffset>4</bitOffset>
  13997. <bitWidth>12</bitWidth>
  13998. </field>
  13999. <field> <name>DIV_Fraction</name>
  14000. <description>fraction of USARTDIV</description>
  14001. <bitOffset>0</bitOffset>
  14002. <bitWidth>4</bitWidth>
  14003. </field>
  14004. </fields>
  14005. </register>
  14006. <register> <name>CR1</name>
  14007. <displayName>CR1</displayName>
  14008. <description>Control register 1</description>
  14009. <addressOffset>0xC</addressOffset>
  14010. <size>0x20</size>
  14011. <access>read-write</access>
  14012. <resetValue>0x0000</resetValue>
  14013. <fields>
  14014. <field> <name>OVER8</name>
  14015. <description>Oversampling mode</description>
  14016. <bitOffset>15</bitOffset>
  14017. <bitWidth>1</bitWidth>
  14018. </field>
  14019. <field> <name>UE</name>
  14020. <description>USART enable</description>
  14021. <bitOffset>13</bitOffset>
  14022. <bitWidth>1</bitWidth>
  14023. </field>
  14024. <field> <name>M</name>
  14025. <description>Word length</description>
  14026. <bitOffset>12</bitOffset>
  14027. <bitWidth>1</bitWidth>
  14028. </field>
  14029. <field> <name>WAKE</name>
  14030. <description>Wakeup method</description>
  14031. <bitOffset>11</bitOffset>
  14032. <bitWidth>1</bitWidth>
  14033. </field>
  14034. <field> <name>PCE</name>
  14035. <description>Parity control enable</description>
  14036. <bitOffset>10</bitOffset>
  14037. <bitWidth>1</bitWidth>
  14038. </field>
  14039. <field> <name>PS</name>
  14040. <description>Parity selection</description>
  14041. <bitOffset>9</bitOffset>
  14042. <bitWidth>1</bitWidth>
  14043. </field>
  14044. <field> <name>PEIE</name>
  14045. <description>PE interrupt enable</description>
  14046. <bitOffset>8</bitOffset>
  14047. <bitWidth>1</bitWidth>
  14048. </field>
  14049. <field> <name>TXEIE</name>
  14050. <description>TXE interrupt enable</description>
  14051. <bitOffset>7</bitOffset>
  14052. <bitWidth>1</bitWidth>
  14053. </field>
  14054. <field> <name>TCIE</name>
  14055. <description>Transmission complete interrupt
  14056. enable</description>
  14057. <bitOffset>6</bitOffset>
  14058. <bitWidth>1</bitWidth>
  14059. </field>
  14060. <field> <name>RXNEIE</name>
  14061. <description>RXNE interrupt enable</description>
  14062. <bitOffset>5</bitOffset>
  14063. <bitWidth>1</bitWidth>
  14064. </field>
  14065. <field> <name>IDLEIE</name>
  14066. <description>IDLE interrupt enable</description>
  14067. <bitOffset>4</bitOffset>
  14068. <bitWidth>1</bitWidth>
  14069. </field>
  14070. <field> <name>TE</name>
  14071. <description>Transmitter enable</description>
  14072. <bitOffset>3</bitOffset>
  14073. <bitWidth>1</bitWidth>
  14074. </field>
  14075. <field> <name>RE</name>
  14076. <description>Receiver enable</description>
  14077. <bitOffset>2</bitOffset>
  14078. <bitWidth>1</bitWidth>
  14079. </field>
  14080. <field> <name>RWU</name>
  14081. <description>Receiver wakeup</description>
  14082. <bitOffset>1</bitOffset>
  14083. <bitWidth>1</bitWidth>
  14084. </field>
  14085. <field> <name>SBK</name>
  14086. <description>Send break</description>
  14087. <bitOffset>0</bitOffset>
  14088. <bitWidth>1</bitWidth>
  14089. </field>
  14090. </fields>
  14091. </register>
  14092. <register> <name>CR2</name>
  14093. <displayName>CR2</displayName>
  14094. <description>Control register 2</description>
  14095. <addressOffset>0x10</addressOffset>
  14096. <size>0x20</size>
  14097. <access>read-write</access>
  14098. <resetValue>0x0000</resetValue>
  14099. <fields>
  14100. <field> <name>LINEN</name>
  14101. <description>LIN mode enable</description>
  14102. <bitOffset>14</bitOffset>
  14103. <bitWidth>1</bitWidth>
  14104. </field>
  14105. <field> <name>STOP</name>
  14106. <description>STOP bits</description>
  14107. <bitOffset>12</bitOffset>
  14108. <bitWidth>2</bitWidth>
  14109. </field>
  14110. <field> <name>LBDIE</name>
  14111. <description>LIN break detection interrupt
  14112. enable</description>
  14113. <bitOffset>6</bitOffset>
  14114. <bitWidth>1</bitWidth>
  14115. </field>
  14116. <field> <name>LBDL</name>
  14117. <description>lin break detection length</description>
  14118. <bitOffset>5</bitOffset>
  14119. <bitWidth>1</bitWidth>
  14120. </field>
  14121. <field> <name>ADD</name>
  14122. <description>Address of the USART node</description>
  14123. <bitOffset>0</bitOffset>
  14124. <bitWidth>4</bitWidth>
  14125. </field>
  14126. </fields>
  14127. </register>
  14128. <register> <name>CR3</name>
  14129. <displayName>CR3</displayName>
  14130. <description>Control register 3</description>
  14131. <addressOffset>0x14</addressOffset>
  14132. <size>0x20</size>
  14133. <access>read-write</access>
  14134. <resetValue>0x0000</resetValue>
  14135. <fields>
  14136. <field> <name>ONEBIT</name>
  14137. <description>One sample bit method
  14138. enable</description>
  14139. <bitOffset>11</bitOffset>
  14140. <bitWidth>1</bitWidth>
  14141. </field>
  14142. <field> <name>DMAT</name>
  14143. <description>DMA enable transmitter</description>
  14144. <bitOffset>7</bitOffset>
  14145. <bitWidth>1</bitWidth>
  14146. </field>
  14147. <field> <name>DMAR</name>
  14148. <description>DMA enable receiver</description>
  14149. <bitOffset>6</bitOffset>
  14150. <bitWidth>1</bitWidth>
  14151. </field>
  14152. <field> <name>HDSEL</name>
  14153. <description>Half-duplex selection</description>
  14154. <bitOffset>3</bitOffset>
  14155. <bitWidth>1</bitWidth>
  14156. </field>
  14157. <field> <name>IRLP</name>
  14158. <description>IrDA low-power</description>
  14159. <bitOffset>2</bitOffset>
  14160. <bitWidth>1</bitWidth>
  14161. </field>
  14162. <field> <name>IREN</name>
  14163. <description>IrDA mode enable</description>
  14164. <bitOffset>1</bitOffset>
  14165. <bitWidth>1</bitWidth>
  14166. </field>
  14167. <field> <name>EIE</name>
  14168. <description>Error interrupt enable</description>
  14169. <bitOffset>0</bitOffset>
  14170. <bitWidth>1</bitWidth>
  14171. </field>
  14172. </fields>
  14173. </register>
  14174. </registers>
  14175. </peripheral>
  14176. <peripheral derivedFrom="UART4"> <name>UART5</name>
  14177. <baseAddress>0x40005000</baseAddress>
  14178. <interrupt>
  14179. <name>UART5</name>
  14180. <description>UART5 global interrupt</description>
  14181. <value>53</value>
  14182. </interrupt>
  14183. </peripheral>
  14184. <peripheral> <name>C_ADC</name>
  14185. <description>Common ADC registers</description>
  14186. <groupName>ADC</groupName>
  14187. <baseAddress>0x40012300</baseAddress>
  14188. <addressBlock>
  14189. <offset>0x0</offset>
  14190. <size>0x400</size>
  14191. <usage>registers</usage>
  14192. </addressBlock>
  14193. <registers>
  14194. <register> <name>CSR</name>
  14195. <displayName>CSR</displayName>
  14196. <description>ADC Common status register</description>
  14197. <addressOffset>0x0</addressOffset>
  14198. <size>0x20</size>
  14199. <access>read-only</access>
  14200. <resetValue>0x00000000</resetValue>
  14201. <fields>
  14202. <field> <name>OVR3</name>
  14203. <description>Overrun flag of ADC3</description>
  14204. <bitOffset>21</bitOffset>
  14205. <bitWidth>1</bitWidth>
  14206. </field>
  14207. <field> <name>STRT3</name>
  14208. <description>Regular channel Start flag of ADC
  14209. 3</description>
  14210. <bitOffset>20</bitOffset>
  14211. <bitWidth>1</bitWidth>
  14212. </field>
  14213. <field> <name>JSTRT3</name>
  14214. <description>Injected channel Start flag of ADC
  14215. 3</description>
  14216. <bitOffset>19</bitOffset>
  14217. <bitWidth>1</bitWidth>
  14218. </field>
  14219. <field> <name>JEOC3</name>
  14220. <description>Injected channel end of conversion of
  14221. ADC 3</description>
  14222. <bitOffset>18</bitOffset>
  14223. <bitWidth>1</bitWidth>
  14224. </field>
  14225. <field> <name>EOC3</name>
  14226. <description>End of conversion of ADC 3</description>
  14227. <bitOffset>17</bitOffset>
  14228. <bitWidth>1</bitWidth>
  14229. </field>
  14230. <field> <name>AWD3</name>
  14231. <description>Analog watchdog flag of ADC
  14232. 3</description>
  14233. <bitOffset>16</bitOffset>
  14234. <bitWidth>1</bitWidth>
  14235. </field>
  14236. <field> <name>OVR2</name>
  14237. <description>Overrun flag of ADC 2</description>
  14238. <bitOffset>13</bitOffset>
  14239. <bitWidth>1</bitWidth>
  14240. </field>
  14241. <field> <name>STRT2</name>
  14242. <description>Regular channel Start flag of ADC
  14243. 2</description>
  14244. <bitOffset>12</bitOffset>
  14245. <bitWidth>1</bitWidth>
  14246. </field>
  14247. <field> <name>JSTRT2</name>
  14248. <description>Injected channel Start flag of ADC
  14249. 2</description>
  14250. <bitOffset>11</bitOffset>
  14251. <bitWidth>1</bitWidth>
  14252. </field>
  14253. <field> <name>JEOC2</name>
  14254. <description>Injected channel end of conversion of
  14255. ADC 2</description>
  14256. <bitOffset>10</bitOffset>
  14257. <bitWidth>1</bitWidth>
  14258. </field>
  14259. <field> <name>EOC2</name>
  14260. <description>End of conversion of ADC 2</description>
  14261. <bitOffset>9</bitOffset>
  14262. <bitWidth>1</bitWidth>
  14263. </field>
  14264. <field> <name>AWD2</name>
  14265. <description>Analog watchdog flag of ADC
  14266. 2</description>
  14267. <bitOffset>8</bitOffset>
  14268. <bitWidth>1</bitWidth>
  14269. </field>
  14270. <field> <name>OVR1</name>
  14271. <description>Overrun flag of ADC 1</description>
  14272. <bitOffset>5</bitOffset>
  14273. <bitWidth>1</bitWidth>
  14274. </field>
  14275. <field> <name>STRT1</name>
  14276. <description>Regular channel Start flag of ADC
  14277. 1</description>
  14278. <bitOffset>4</bitOffset>
  14279. <bitWidth>1</bitWidth>
  14280. </field>
  14281. <field> <name>JSTRT1</name>
  14282. <description>Injected channel Start flag of ADC
  14283. 1</description>
  14284. <bitOffset>3</bitOffset>
  14285. <bitWidth>1</bitWidth>
  14286. </field>
  14287. <field> <name>JEOC1</name>
  14288. <description>Injected channel end of conversion of
  14289. ADC 1</description>
  14290. <bitOffset>2</bitOffset>
  14291. <bitWidth>1</bitWidth>
  14292. </field>
  14293. <field> <name>EOC1</name>
  14294. <description>End of conversion of ADC 1</description>
  14295. <bitOffset>1</bitOffset>
  14296. <bitWidth>1</bitWidth>
  14297. </field>
  14298. <field> <name>AWD1</name>
  14299. <description>Analog watchdog flag of ADC
  14300. 1</description>
  14301. <bitOffset>0</bitOffset>
  14302. <bitWidth>1</bitWidth>
  14303. </field>
  14304. </fields>
  14305. </register>
  14306. <register> <name>CCR</name>
  14307. <displayName>CCR</displayName>
  14308. <description>ADC common control register</description>
  14309. <addressOffset>0x4</addressOffset>
  14310. <size>0x20</size>
  14311. <access>read-write</access>
  14312. <resetValue>0x00000000</resetValue>
  14313. <fields>
  14314. <field> <name>TSVREFE</name>
  14315. <description>Temperature sensor and VREFINT
  14316. enable</description>
  14317. <bitOffset>23</bitOffset>
  14318. <bitWidth>1</bitWidth>
  14319. </field>
  14320. <field> <name>VBATE</name>
  14321. <description>VBAT enable</description>
  14322. <bitOffset>22</bitOffset>
  14323. <bitWidth>1</bitWidth>
  14324. </field>
  14325. <field> <name>ADCPRE</name>
  14326. <description>ADC prescaler</description>
  14327. <bitOffset>16</bitOffset>
  14328. <bitWidth>2</bitWidth>
  14329. </field>
  14330. <field> <name>DMA</name>
  14331. <description>Direct memory access mode for multi ADC
  14332. mode</description>
  14333. <bitOffset>14</bitOffset>
  14334. <bitWidth>2</bitWidth>
  14335. </field>
  14336. <field> <name>DDS</name>
  14337. <description>DMA disable selection for multi-ADC
  14338. mode</description>
  14339. <bitOffset>13</bitOffset>
  14340. <bitWidth>1</bitWidth>
  14341. </field>
  14342. <field> <name>DELAY</name>
  14343. <description>Delay between 2 sampling
  14344. phases</description>
  14345. <bitOffset>8</bitOffset>
  14346. <bitWidth>4</bitWidth>
  14347. </field>
  14348. <field> <name>MULT</name>
  14349. <description>Multi ADC mode selection</description>
  14350. <bitOffset>0</bitOffset>
  14351. <bitWidth>5</bitWidth>
  14352. </field>
  14353. </fields>
  14354. </register>
  14355. <register> <name>CDR</name>
  14356. <displayName>CDR</displayName>
  14357. <description>ADC common regular data register for dual
  14358. and triple modes</description>
  14359. <addressOffset>0x8</addressOffset>
  14360. <size>0x20</size>
  14361. <access>read-only</access>
  14362. <resetValue>0x00000000</resetValue>
  14363. <fields>
  14364. <field> <name>DATA2</name>
  14365. <description>2nd data item of a pair of regular
  14366. conversions</description>
  14367. <bitOffset>16</bitOffset>
  14368. <bitWidth>16</bitWidth>
  14369. </field>
  14370. <field> <name>DATA1</name>
  14371. <description>1st data item of a pair of regular
  14372. conversions</description>
  14373. <bitOffset>0</bitOffset>
  14374. <bitWidth>16</bitWidth>
  14375. </field>
  14376. </fields>
  14377. </register>
  14378. </registers>
  14379. </peripheral>
  14380. <peripheral> <name>TIM1</name>
  14381. <description>Advanced-timers</description>
  14382. <groupName>TIM</groupName>
  14383. <baseAddress>0x40010000</baseAddress>
  14384. <addressBlock>
  14385. <offset>0x0</offset>
  14386. <size>0x400</size>
  14387. <usage>registers</usage>
  14388. </addressBlock>
  14389. <interrupt>
  14390. <name>TIM1_BRK_TIM9</name>
  14391. <description>TIM1 Break interrupt and TIM9 global
  14392. interrupt</description>
  14393. <value>24</value>
  14394. </interrupt>
  14395. <interrupt>
  14396. <name>TIM1_UP_TIM10</name>
  14397. <description>TIM1 Update interrupt and TIM10 global
  14398. interrupt</description>
  14399. <value>25</value>
  14400. </interrupt>
  14401. <interrupt>
  14402. <name>TIM1_TRG_COM_TIM11</name>
  14403. <description>TIM1 Trigger and Commutation interrupts and
  14404. TIM11 global interrupt</description>
  14405. <value>26</value>
  14406. </interrupt>
  14407. <interrupt>
  14408. <name>TIM1_CC</name>
  14409. <description>TIM1 Capture Compare interrupt</description>
  14410. <value>27</value>
  14411. </interrupt>
  14412. <registers>
  14413. <register> <name>CR1</name>
  14414. <displayName>CR1</displayName>
  14415. <description>control register 1</description>
  14416. <addressOffset>0x0</addressOffset>
  14417. <size>0x20</size>
  14418. <access>read-write</access>
  14419. <resetValue>0x0000</resetValue>
  14420. <fields>
  14421. <field> <name>CKD</name>
  14422. <description>Clock division</description>
  14423. <bitOffset>8</bitOffset>
  14424. <bitWidth>2</bitWidth>
  14425. </field>
  14426. <field> <name>ARPE</name>
  14427. <description>Auto-reload preload enable</description>
  14428. <bitOffset>7</bitOffset>
  14429. <bitWidth>1</bitWidth>
  14430. </field>
  14431. <field> <name>CMS</name>
  14432. <description>Center-aligned mode
  14433. selection</description>
  14434. <bitOffset>5</bitOffset>
  14435. <bitWidth>2</bitWidth>
  14436. </field>
  14437. <field> <name>DIR</name>
  14438. <description>Direction</description>
  14439. <bitOffset>4</bitOffset>
  14440. <bitWidth>1</bitWidth>
  14441. </field>
  14442. <field> <name>OPM</name>
  14443. <description>One-pulse mode</description>
  14444. <bitOffset>3</bitOffset>
  14445. <bitWidth>1</bitWidth>
  14446. </field>
  14447. <field> <name>URS</name>
  14448. <description>Update request source</description>
  14449. <bitOffset>2</bitOffset>
  14450. <bitWidth>1</bitWidth>
  14451. </field>
  14452. <field> <name>UDIS</name>
  14453. <description>Update disable</description>
  14454. <bitOffset>1</bitOffset>
  14455. <bitWidth>1</bitWidth>
  14456. </field>
  14457. <field> <name>CEN</name>
  14458. <description>Counter enable</description>
  14459. <bitOffset>0</bitOffset>
  14460. <bitWidth>1</bitWidth>
  14461. </field>
  14462. </fields>
  14463. </register>
  14464. <register> <name>CR2</name>
  14465. <displayName>CR2</displayName>
  14466. <description>control register 2</description>
  14467. <addressOffset>0x4</addressOffset>
  14468. <size>0x20</size>
  14469. <access>read-write</access>
  14470. <resetValue>0x0000</resetValue>
  14471. <fields>
  14472. <field> <name>OIS4</name>
  14473. <description>Output Idle state 4</description>
  14474. <bitOffset>14</bitOffset>
  14475. <bitWidth>1</bitWidth>
  14476. </field>
  14477. <field> <name>OIS3N</name>
  14478. <description>Output Idle state 3</description>
  14479. <bitOffset>13</bitOffset>
  14480. <bitWidth>1</bitWidth>
  14481. </field>
  14482. <field> <name>OIS3</name>
  14483. <description>Output Idle state 3</description>
  14484. <bitOffset>12</bitOffset>
  14485. <bitWidth>1</bitWidth>
  14486. </field>
  14487. <field> <name>OIS2N</name>
  14488. <description>Output Idle state 2</description>
  14489. <bitOffset>11</bitOffset>
  14490. <bitWidth>1</bitWidth>
  14491. </field>
  14492. <field> <name>OIS2</name>
  14493. <description>Output Idle state 2</description>
  14494. <bitOffset>10</bitOffset>
  14495. <bitWidth>1</bitWidth>
  14496. </field>
  14497. <field> <name>OIS1N</name>
  14498. <description>Output Idle state 1</description>
  14499. <bitOffset>9</bitOffset>
  14500. <bitWidth>1</bitWidth>
  14501. </field>
  14502. <field> <name>OIS1</name>
  14503. <description>Output Idle state 1</description>
  14504. <bitOffset>8</bitOffset>
  14505. <bitWidth>1</bitWidth>
  14506. </field>
  14507. <field> <name>TI1S</name>
  14508. <description>TI1 selection</description>
  14509. <bitOffset>7</bitOffset>
  14510. <bitWidth>1</bitWidth>
  14511. </field>
  14512. <field> <name>MMS</name>
  14513. <description>Master mode selection</description>
  14514. <bitOffset>4</bitOffset>
  14515. <bitWidth>3</bitWidth>
  14516. </field>
  14517. <field> <name>CCDS</name>
  14518. <description>Capture/compare DMA
  14519. selection</description>
  14520. <bitOffset>3</bitOffset>
  14521. <bitWidth>1</bitWidth>
  14522. </field>
  14523. <field> <name>CCUS</name>
  14524. <description>Capture/compare control update
  14525. selection</description>
  14526. <bitOffset>2</bitOffset>
  14527. <bitWidth>1</bitWidth>
  14528. </field>
  14529. <field> <name>CCPC</name>
  14530. <description>Capture/compare preloaded
  14531. control</description>
  14532. <bitOffset>0</bitOffset>
  14533. <bitWidth>1</bitWidth>
  14534. </field>
  14535. </fields>
  14536. </register>
  14537. <register> <name>SMCR</name>
  14538. <displayName>SMCR</displayName>
  14539. <description>slave mode control register</description>
  14540. <addressOffset>0x8</addressOffset>
  14541. <size>0x20</size>
  14542. <access>read-write</access>
  14543. <resetValue>0x0000</resetValue>
  14544. <fields>
  14545. <field> <name>ETP</name>
  14546. <description>External trigger polarity</description>
  14547. <bitOffset>15</bitOffset>
  14548. <bitWidth>1</bitWidth>
  14549. </field>
  14550. <field> <name>ECE</name>
  14551. <description>External clock enable</description>
  14552. <bitOffset>14</bitOffset>
  14553. <bitWidth>1</bitWidth>
  14554. </field>
  14555. <field> <name>ETPS</name>
  14556. <description>External trigger prescaler</description>
  14557. <bitOffset>12</bitOffset>
  14558. <bitWidth>2</bitWidth>
  14559. </field>
  14560. <field> <name>ETF</name>
  14561. <description>External trigger filter</description>
  14562. <bitOffset>8</bitOffset>
  14563. <bitWidth>4</bitWidth>
  14564. </field>
  14565. <field> <name>MSM</name>
  14566. <description>Master/Slave mode</description>
  14567. <bitOffset>7</bitOffset>
  14568. <bitWidth>1</bitWidth>
  14569. </field>
  14570. <field> <name>TS</name>
  14571. <description>Trigger selection</description>
  14572. <bitOffset>4</bitOffset>
  14573. <bitWidth>3</bitWidth>
  14574. </field>
  14575. <field> <name>SMS</name>
  14576. <description>Slave mode selection</description>
  14577. <bitOffset>0</bitOffset>
  14578. <bitWidth>3</bitWidth>
  14579. </field>
  14580. </fields>
  14581. </register>
  14582. <register> <name>DIER</name>
  14583. <displayName>DIER</displayName>
  14584. <description>DMA/Interrupt enable register</description>
  14585. <addressOffset>0xC</addressOffset>
  14586. <size>0x20</size>
  14587. <access>read-write</access>
  14588. <resetValue>0x0000</resetValue>
  14589. <fields>
  14590. <field> <name>TDE</name>
  14591. <description>Trigger DMA request enable</description>
  14592. <bitOffset>14</bitOffset>
  14593. <bitWidth>1</bitWidth>
  14594. </field>
  14595. <field> <name>COMDE</name>
  14596. <description>COM DMA request enable</description>
  14597. <bitOffset>13</bitOffset>
  14598. <bitWidth>1</bitWidth>
  14599. </field>
  14600. <field> <name>CC4DE</name>
  14601. <description>Capture/Compare 4 DMA request
  14602. enable</description>
  14603. <bitOffset>12</bitOffset>
  14604. <bitWidth>1</bitWidth>
  14605. </field>
  14606. <field> <name>CC3DE</name>
  14607. <description>Capture/Compare 3 DMA request
  14608. enable</description>
  14609. <bitOffset>11</bitOffset>
  14610. <bitWidth>1</bitWidth>
  14611. </field>
  14612. <field> <name>CC2DE</name>
  14613. <description>Capture/Compare 2 DMA request
  14614. enable</description>
  14615. <bitOffset>10</bitOffset>
  14616. <bitWidth>1</bitWidth>
  14617. </field>
  14618. <field> <name>CC1DE</name>
  14619. <description>Capture/Compare 1 DMA request
  14620. enable</description>
  14621. <bitOffset>9</bitOffset>
  14622. <bitWidth>1</bitWidth>
  14623. </field>
  14624. <field> <name>UDE</name>
  14625. <description>Update DMA request enable</description>
  14626. <bitOffset>8</bitOffset>
  14627. <bitWidth>1</bitWidth>
  14628. </field>
  14629. <field> <name>TIE</name>
  14630. <description>Trigger interrupt enable</description>
  14631. <bitOffset>6</bitOffset>
  14632. <bitWidth>1</bitWidth>
  14633. </field>
  14634. <field> <name>CC4IE</name>
  14635. <description>Capture/Compare 4 interrupt
  14636. enable</description>
  14637. <bitOffset>4</bitOffset>
  14638. <bitWidth>1</bitWidth>
  14639. </field>
  14640. <field> <name>CC3IE</name>
  14641. <description>Capture/Compare 3 interrupt
  14642. enable</description>
  14643. <bitOffset>3</bitOffset>
  14644. <bitWidth>1</bitWidth>
  14645. </field>
  14646. <field> <name>CC2IE</name>
  14647. <description>Capture/Compare 2 interrupt
  14648. enable</description>
  14649. <bitOffset>2</bitOffset>
  14650. <bitWidth>1</bitWidth>
  14651. </field>
  14652. <field> <name>CC1IE</name>
  14653. <description>Capture/Compare 1 interrupt
  14654. enable</description>
  14655. <bitOffset>1</bitOffset>
  14656. <bitWidth>1</bitWidth>
  14657. </field>
  14658. <field> <name>UIE</name>
  14659. <description>Update interrupt enable</description>
  14660. <bitOffset>0</bitOffset>
  14661. <bitWidth>1</bitWidth>
  14662. </field>
  14663. <field> <name>BIE</name>
  14664. <description>Break interrupt enable</description>
  14665. <bitOffset>7</bitOffset>
  14666. <bitWidth>1</bitWidth>
  14667. </field>
  14668. <field> <name>COMIE</name>
  14669. <description>COM interrupt enable</description>
  14670. <bitOffset>5</bitOffset>
  14671. <bitWidth>1</bitWidth>
  14672. </field>
  14673. </fields>
  14674. </register>
  14675. <register> <name>SR</name>
  14676. <displayName>SR</displayName>
  14677. <description>status register</description>
  14678. <addressOffset>0x10</addressOffset>
  14679. <size>0x20</size>
  14680. <access>read-write</access>
  14681. <resetValue>0x0000</resetValue>
  14682. <fields>
  14683. <field> <name>CC4OF</name>
  14684. <description>Capture/Compare 4 overcapture
  14685. flag</description>
  14686. <bitOffset>12</bitOffset>
  14687. <bitWidth>1</bitWidth>
  14688. </field>
  14689. <field> <name>CC3OF</name>
  14690. <description>Capture/Compare 3 overcapture
  14691. flag</description>
  14692. <bitOffset>11</bitOffset>
  14693. <bitWidth>1</bitWidth>
  14694. </field>
  14695. <field> <name>CC2OF</name>
  14696. <description>Capture/compare 2 overcapture
  14697. flag</description>
  14698. <bitOffset>10</bitOffset>
  14699. <bitWidth>1</bitWidth>
  14700. </field>
  14701. <field> <name>CC1OF</name>
  14702. <description>Capture/Compare 1 overcapture
  14703. flag</description>
  14704. <bitOffset>9</bitOffset>
  14705. <bitWidth>1</bitWidth>
  14706. </field>
  14707. <field> <name>BIF</name>
  14708. <description>Break interrupt flag</description>
  14709. <bitOffset>7</bitOffset>
  14710. <bitWidth>1</bitWidth>
  14711. </field>
  14712. <field> <name>TIF</name>
  14713. <description>Trigger interrupt flag</description>
  14714. <bitOffset>6</bitOffset>
  14715. <bitWidth>1</bitWidth>
  14716. </field>
  14717. <field> <name>COMIF</name>
  14718. <description>COM interrupt flag</description>
  14719. <bitOffset>5</bitOffset>
  14720. <bitWidth>1</bitWidth>
  14721. </field>
  14722. <field> <name>CC4IF</name>
  14723. <description>Capture/Compare 4 interrupt
  14724. flag</description>
  14725. <bitOffset>4</bitOffset>
  14726. <bitWidth>1</bitWidth>
  14727. </field>
  14728. <field> <name>CC3IF</name>
  14729. <description>Capture/Compare 3 interrupt
  14730. flag</description>
  14731. <bitOffset>3</bitOffset>
  14732. <bitWidth>1</bitWidth>
  14733. </field>
  14734. <field> <name>CC2IF</name>
  14735. <description>Capture/Compare 2 interrupt
  14736. flag</description>
  14737. <bitOffset>2</bitOffset>
  14738. <bitWidth>1</bitWidth>
  14739. </field>
  14740. <field> <name>CC1IF</name>
  14741. <description>Capture/compare 1 interrupt
  14742. flag</description>
  14743. <bitOffset>1</bitOffset>
  14744. <bitWidth>1</bitWidth>
  14745. </field>
  14746. <field> <name>UIF</name>
  14747. <description>Update interrupt flag</description>
  14748. <bitOffset>0</bitOffset>
  14749. <bitWidth>1</bitWidth>
  14750. </field>
  14751. </fields>
  14752. </register>
  14753. <register> <name>EGR</name>
  14754. <displayName>EGR</displayName>
  14755. <description>event generation register</description>
  14756. <addressOffset>0x14</addressOffset>
  14757. <size>0x20</size>
  14758. <access>write-only</access>
  14759. <resetValue>0x0000</resetValue>
  14760. <fields>
  14761. <field> <name>BG</name>
  14762. <description>Break generation</description>
  14763. <bitOffset>7</bitOffset>
  14764. <bitWidth>1</bitWidth>
  14765. </field>
  14766. <field> <name>TG</name>
  14767. <description>Trigger generation</description>
  14768. <bitOffset>6</bitOffset>
  14769. <bitWidth>1</bitWidth>
  14770. </field>
  14771. <field> <name>COMG</name>
  14772. <description>Capture/Compare control update
  14773. generation</description>
  14774. <bitOffset>5</bitOffset>
  14775. <bitWidth>1</bitWidth>
  14776. </field>
  14777. <field> <name>CC4G</name>
  14778. <description>Capture/compare 4
  14779. generation</description>
  14780. <bitOffset>4</bitOffset>
  14781. <bitWidth>1</bitWidth>
  14782. </field>
  14783. <field> <name>CC3G</name>
  14784. <description>Capture/compare 3
  14785. generation</description>
  14786. <bitOffset>3</bitOffset>
  14787. <bitWidth>1</bitWidth>
  14788. </field>
  14789. <field> <name>CC2G</name>
  14790. <description>Capture/compare 2
  14791. generation</description>
  14792. <bitOffset>2</bitOffset>
  14793. <bitWidth>1</bitWidth>
  14794. </field>
  14795. <field> <name>CC1G</name>
  14796. <description>Capture/compare 1
  14797. generation</description>
  14798. <bitOffset>1</bitOffset>
  14799. <bitWidth>1</bitWidth>
  14800. </field>
  14801. <field> <name>UG</name>
  14802. <description>Update generation</description>
  14803. <bitOffset>0</bitOffset>
  14804. <bitWidth>1</bitWidth>
  14805. </field>
  14806. </fields>
  14807. </register>
  14808. <register> <name>CCMR1_Output</name>
  14809. <displayName>CCMR1_Output</displayName>
  14810. <description>capture/compare mode register 1 (output
  14811. mode)</description>
  14812. <addressOffset>0x18</addressOffset>
  14813. <size>0x20</size>
  14814. <access>read-write</access>
  14815. <resetValue>0x00000000</resetValue>
  14816. <fields>
  14817. <field> <name>OC2CE</name>
  14818. <description>Output Compare 2 clear enable</description>
  14819. <bitOffset>15</bitOffset>
  14820. <bitWidth>1</bitWidth>
  14821. </field>
  14822. <field> <name>OC2M</name>
  14823. <description>Output Compare 2 mode</description>
  14824. <bitOffset>12</bitOffset>
  14825. <bitWidth>3</bitWidth>
  14826. </field>
  14827. <field> <name>OC2PE</name>
  14828. <description>Output Compare 2 preload enable</description>
  14829. <bitOffset>11</bitOffset>
  14830. <bitWidth>1</bitWidth>
  14831. </field>
  14832. <field> <name>OC2FE</name>
  14833. <description>Output Compare 2 fast enable</description>
  14834. <bitOffset>10</bitOffset>
  14835. <bitWidth>1</bitWidth>
  14836. </field>
  14837. <field> <name>CC2S</name>
  14838. <description>Capture/Compare 2 selection</description>
  14839. <bitOffset>8</bitOffset>
  14840. <bitWidth>2</bitWidth>
  14841. </field>
  14842. <field> <name>OC1CE</name>
  14843. <description>Output Compare 1 clear enable</description>
  14844. <bitOffset>7</bitOffset>
  14845. <bitWidth>1</bitWidth>
  14846. </field>
  14847. <field> <name>OC1M</name>
  14848. <description>Output Compare 1 mode</description>
  14849. <bitOffset>4</bitOffset>
  14850. <bitWidth>3</bitWidth>
  14851. </field>
  14852. <field> <name>OC1PE</name>
  14853. <description>Output Compare 1 preload
  14854. enable</description>
  14855. <bitOffset>3</bitOffset>
  14856. <bitWidth>1</bitWidth>
  14857. </field>
  14858. <field> <name>OC1FE</name>
  14859. <description>Output Compare 1 fast enable</description>
  14860. <bitOffset>2</bitOffset>
  14861. <bitWidth>1</bitWidth>
  14862. </field>
  14863. <field> <name>CC1S</name>
  14864. <description>Capture/Compare 1 selection</description>
  14865. <bitOffset>0</bitOffset>
  14866. <bitWidth>2</bitWidth>
  14867. </field>
  14868. </fields>
  14869. </register>
  14870. <register> <name>CCMR1_Input</name>
  14871. <displayName>CCMR1_Input</displayName>
  14872. <description>capture/compare mode register 1 (input
  14873. mode)</description>
  14874. <alternateRegister>CCMR1_Output</alternateRegister>
  14875. <addressOffset>0x18</addressOffset>
  14876. <size>0x20</size>
  14877. <access>read-write</access>
  14878. <resetValue>0x00000000</resetValue>
  14879. <fields>
  14880. <field> <name>IC2F</name>
  14881. <description>Input capture 2 filter</description>
  14882. <bitOffset>12</bitOffset>
  14883. <bitWidth>4</bitWidth>
  14884. </field>
  14885. <field> <name>IC2PSC</name>
  14886. <description>Input capture 2 prescaler</description>
  14887. <bitOffset>10</bitOffset>
  14888. <bitWidth>2</bitWidth>
  14889. </field>
  14890. <field> <name>CC2S</name>
  14891. <description>Capture/Compare 2 selection</description>
  14892. <bitOffset>8</bitOffset>
  14893. <bitWidth>2</bitWidth>
  14894. </field>
  14895. <field> <name>IC1F</name>
  14896. <description>Input capture 1 filter</description>
  14897. <bitOffset>4</bitOffset>
  14898. <bitWidth>4</bitWidth>
  14899. </field>
  14900. <field> <name>IC1PSC</name>
  14901. <description>Input capture 1 prescaler</description>
  14902. <bitOffset>2</bitOffset>
  14903. <bitWidth>2</bitWidth>
  14904. </field>
  14905. <field> <name>CC1S</name>
  14906. <description>Capture/Compare 1 selection</description>
  14907. <bitOffset>0</bitOffset>
  14908. <bitWidth>2</bitWidth>
  14909. </field>
  14910. </fields>
  14911. </register>
  14912. <register> <name>CCMR2_Output</name>
  14913. <displayName>CCMR2_Output</displayName>
  14914. <description>capture/compare mode register 2 (output mode)</description>
  14915. <addressOffset>0x1C</addressOffset>
  14916. <size>0x20</size>
  14917. <access>read-write</access>
  14918. <resetValue>0x00000000</resetValue>
  14919. <fields>
  14920. <field> <name>OC4CE</name>
  14921. <description>Output compare 4 clear enable</description>
  14922. <bitOffset>15</bitOffset>
  14923. <bitWidth>1</bitWidth>
  14924. </field>
  14925. <field> <name>OC4M</name>
  14926. <description>Output compare 4 mode</description>
  14927. <bitOffset>12</bitOffset>
  14928. <bitWidth>3</bitWidth>
  14929. </field>
  14930. <field> <name>OC4PE</name>
  14931. <description>Output compare 4 preload enable</description>
  14932. <bitOffset>11</bitOffset>
  14933. <bitWidth>1</bitWidth>
  14934. </field>
  14935. <field> <name>OC4FE</name>
  14936. <description>Output compare 4 fast enable</description>
  14937. <bitOffset>10</bitOffset>
  14938. <bitWidth>1</bitWidth>
  14939. </field>
  14940. <field> <name>CC4S</name>
  14941. <description>Capture/Compare 4 selection</description>
  14942. <bitOffset>8</bitOffset>
  14943. <bitWidth>2</bitWidth>
  14944. </field>
  14945. <field> <name>OC3CE</name>
  14946. <description>Output compare 3 clear enable</description>
  14947. <bitOffset>7</bitOffset>
  14948. <bitWidth>1</bitWidth>
  14949. </field>
  14950. <field> <name>OC3M</name>
  14951. <description>Output compare 3 mode</description>
  14952. <bitOffset>4</bitOffset>
  14953. <bitWidth>3</bitWidth>
  14954. </field>
  14955. <field> <name>OC3PE</name>
  14956. <description>Output compare 3 preload enable</description>
  14957. <bitOffset>3</bitOffset>
  14958. <bitWidth>1</bitWidth>
  14959. </field>
  14960. <field> <name>OC3FE</name>
  14961. <description>Output compare 3 fast enable</description>
  14962. <bitOffset>2</bitOffset>
  14963. <bitWidth>1</bitWidth>
  14964. </field>
  14965. <field> <name>CC3S</name>
  14966. <description>Capture/Compare 3 selection</description>
  14967. <bitOffset>0</bitOffset>
  14968. <bitWidth>2</bitWidth>
  14969. </field>
  14970. </fields>
  14971. </register>
  14972. <register> <name>CCMR2_Input</name>
  14973. <displayName>CCMR2_Input</displayName>
  14974. <description>capture/compare mode register 2 (input mode)</description>
  14975. <alternateRegister>CCMR2_Output</alternateRegister>
  14976. <addressOffset>0x1C</addressOffset>
  14977. <size>0x20</size>
  14978. <access>read-write</access>
  14979. <resetValue>0x00000000</resetValue>
  14980. <fields>
  14981. <field> <name>IC4F</name>
  14982. <description>Input capture 4 filter</description>
  14983. <bitOffset>12</bitOffset>
  14984. <bitWidth>4</bitWidth>
  14985. </field>
  14986. <field> <name>IC4PSC</name>
  14987. <description>Input capture 4 prescaler</description>
  14988. <bitOffset>10</bitOffset>
  14989. <bitWidth>2</bitWidth>
  14990. </field>
  14991. <field> <name>CC4S</name>
  14992. <description>Capture/Compare 4 selection</description>
  14993. <bitOffset>8</bitOffset>
  14994. <bitWidth>2</bitWidth>
  14995. </field>
  14996. <field> <name>IC3F</name>
  14997. <description>Input capture 3 filter</description>
  14998. <bitOffset>4</bitOffset>
  14999. <bitWidth>4</bitWidth>
  15000. </field>
  15001. <field> <name>IC3PSC</name>
  15002. <description>Input capture 3 prescaler</description>
  15003. <bitOffset>2</bitOffset>
  15004. <bitWidth>2</bitWidth>
  15005. </field>
  15006. <field> <name>CC3S</name>
  15007. <description>Capture/compare 3 selection</description>
  15008. <bitOffset>0</bitOffset>
  15009. <bitWidth>2</bitWidth>
  15010. </field>
  15011. </fields>
  15012. </register>
  15013. <register> <name>CCER</name>
  15014. <displayName>CCER</displayName>
  15015. <description>capture/compare enable register</description>
  15016. <addressOffset>0x20</addressOffset>
  15017. <size>0x20</size>
  15018. <access>read-write</access>
  15019. <resetValue>0x0000</resetValue>
  15020. <fields>
  15021. <field> <name>CC4P</name>
  15022. <description>Capture/Compare 3 output Polarity</description>
  15023. <bitOffset>13</bitOffset>
  15024. <bitWidth>1</bitWidth>
  15025. </field>
  15026. <field> <name>CC4E</name>
  15027. <description>Capture/Compare 4 output enable</description>
  15028. <bitOffset>12</bitOffset>
  15029. <bitWidth>1</bitWidth>
  15030. </field>
  15031. <field> <name>CC3NP</name>
  15032. <description>Capture/Compare 3 output Polarity</description>
  15033. <bitOffset>11</bitOffset>
  15034. <bitWidth>1</bitWidth>
  15035. </field>
  15036. <field> <name>CC3NE</name>
  15037. <description>Capture/Compare 3 complementary output enable</description>
  15038. <bitOffset>10</bitOffset>
  15039. <bitWidth>1</bitWidth>
  15040. </field>
  15041. <field> <name>CC3P</name>
  15042. <description>Capture/Compare 3 output Polarity</description>
  15043. <bitOffset>9</bitOffset>
  15044. <bitWidth>1</bitWidth>
  15045. </field>
  15046. <field> <name>CC3E</name>
  15047. <description>Capture/Compare 3 output enable</description>
  15048. <bitOffset>8</bitOffset>
  15049. <bitWidth>1</bitWidth>
  15050. </field>
  15051. <field> <name>CC2NP</name>
  15052. <description>Capture/Compare 2 output Polarity</description>
  15053. <bitOffset>7</bitOffset>
  15054. <bitWidth>1</bitWidth>
  15055. </field>
  15056. <field> <name>CC2NE</name>
  15057. <description>Capture/Compare 2 complementary output enable</description>
  15058. <bitOffset>6</bitOffset>
  15059. <bitWidth>1</bitWidth>
  15060. </field>
  15061. <field> <name>CC2P</name>
  15062. <description>Capture/Compare 2 output Polarity</description>
  15063. <bitOffset>5</bitOffset>
  15064. <bitWidth>1</bitWidth>
  15065. </field>
  15066. <field> <name>CC2E</name>
  15067. <description>Capture/Compare 2 output enable</description>
  15068. <bitOffset>4</bitOffset>
  15069. <bitWidth>1</bitWidth>
  15070. </field>
  15071. <field> <name>CC1NP</name>
  15072. <description>Capture/Compare 1 output Polarity</description>
  15073. <bitOffset>3</bitOffset>
  15074. <bitWidth>1</bitWidth>
  15075. </field>
  15076. <field> <name>CC1NE</name>
  15077. <description>Capture/Compare 1 complementary output enable</description>
  15078. <bitOffset>2</bitOffset>
  15079. <bitWidth>1</bitWidth>
  15080. </field>
  15081. <field> <name>CC1P</name>
  15082. <description>Capture/Compare 1 output
  15083. Polarity</description>
  15084. <bitOffset>1</bitOffset>
  15085. <bitWidth>1</bitWidth>
  15086. </field>
  15087. <field> <name>CC1E</name>
  15088. <description>Capture/Compare 1 output
  15089. enable</description>
  15090. <bitOffset>0</bitOffset>
  15091. <bitWidth>1</bitWidth>
  15092. </field>
  15093. </fields>
  15094. </register>
  15095. <register> <name>CNT</name>
  15096. <displayName>CNT</displayName>
  15097. <description>counter</description>
  15098. <addressOffset>0x24</addressOffset>
  15099. <size>0x20</size>
  15100. <access>read-write</access>
  15101. <resetValue>0x00000000</resetValue>
  15102. <fields>
  15103. <field> <name>CNT</name>
  15104. <description>counter value</description>
  15105. <bitOffset>0</bitOffset>
  15106. <bitWidth>16</bitWidth>
  15107. </field>
  15108. </fields>
  15109. </register>
  15110. <register> <name>PSC</name>
  15111. <displayName>PSC</displayName>
  15112. <description>prescaler</description>
  15113. <addressOffset>0x28</addressOffset>
  15114. <size>0x20</size>
  15115. <access>read-write</access>
  15116. <resetValue>0x0000</resetValue>
  15117. <fields>
  15118. <field> <name>PSC</name>
  15119. <description>Prescaler value</description>
  15120. <bitOffset>0</bitOffset>
  15121. <bitWidth>16</bitWidth>
  15122. </field>
  15123. </fields>
  15124. </register>
  15125. <register> <name>ARR</name>
  15126. <displayName>ARR</displayName>
  15127. <description>auto-reload register</description>
  15128. <addressOffset>0x2C</addressOffset>
  15129. <size>0x20</size>
  15130. <access>read-write</access>
  15131. <resetValue>0x00000000</resetValue>
  15132. <fields>
  15133. <field> <name>ARR</name>
  15134. <description>Auto-reload value</description>
  15135. <bitOffset>0</bitOffset>
  15136. <bitWidth>16</bitWidth>
  15137. </field>
  15138. </fields>
  15139. </register>
  15140. <register> <name>CCR1</name>
  15141. <displayName>CCR1</displayName>
  15142. <description>capture/compare register 1</description>
  15143. <addressOffset>0x34</addressOffset>
  15144. <size>0x20</size>
  15145. <access>read-write</access>
  15146. <resetValue>0x00000000</resetValue>
  15147. <fields>
  15148. <field> <name>CCR1</name>
  15149. <description>Capture/Compare 1 value</description>
  15150. <bitOffset>0</bitOffset>
  15151. <bitWidth>16</bitWidth>
  15152. </field>
  15153. </fields>
  15154. </register>
  15155. <register> <name>CCR2</name>
  15156. <displayName>CCR2</displayName>
  15157. <description>capture/compare register 2</description>
  15158. <addressOffset>0x38</addressOffset>
  15159. <size>0x20</size>
  15160. <access>read-write</access>
  15161. <resetValue>0x00000000</resetValue>
  15162. <fields>
  15163. <field> <name>CCR2</name>
  15164. <description>Capture/Compare 2 value</description>
  15165. <bitOffset>0</bitOffset>
  15166. <bitWidth>16</bitWidth>
  15167. </field>
  15168. </fields>
  15169. </register>
  15170. <register> <name>CCR3</name>
  15171. <displayName>CCR3</displayName>
  15172. <description>capture/compare register 3</description>
  15173. <addressOffset>0x3C</addressOffset>
  15174. <size>0x20</size>
  15175. <access>read-write</access>
  15176. <resetValue>0x00000000</resetValue>
  15177. <fields>
  15178. <field> <name>CCR3</name>
  15179. <description>Capture/Compare value</description>
  15180. <bitOffset>0</bitOffset>
  15181. <bitWidth>16</bitWidth>
  15182. </field>
  15183. </fields>
  15184. </register>
  15185. <register> <name>CCR4</name>
  15186. <displayName>CCR4</displayName>
  15187. <description>capture/compare register 4</description>
  15188. <addressOffset>0x40</addressOffset>
  15189. <size>0x20</size>
  15190. <access>read-write</access>
  15191. <resetValue>0x00000000</resetValue>
  15192. <fields>
  15193. <field> <name>CCR4</name>
  15194. <description>Capture/Compare value</description>
  15195. <bitOffset>0</bitOffset>
  15196. <bitWidth>16</bitWidth>
  15197. </field>
  15198. </fields>
  15199. </register>
  15200. <register> <name>DCR</name>
  15201. <displayName>DCR</displayName>
  15202. <description>DMA control register</description>
  15203. <addressOffset>0x48</addressOffset>
  15204. <size>0x20</size>
  15205. <access>read-write</access>
  15206. <resetValue>0x0000</resetValue>
  15207. <fields>
  15208. <field> <name>DBL</name>
  15209. <description>DMA burst length</description>
  15210. <bitOffset>8</bitOffset>
  15211. <bitWidth>5</bitWidth>
  15212. </field>
  15213. <field> <name>DBA</name>
  15214. <description>DMA base address</description>
  15215. <bitOffset>0</bitOffset>
  15216. <bitWidth>5</bitWidth>
  15217. </field>
  15218. </fields>
  15219. </register>
  15220. <register> <name>DMAR</name>
  15221. <displayName>DMAR</displayName>
  15222. <description>DMA address for full transfer</description>
  15223. <addressOffset>0x4C</addressOffset>
  15224. <size>0x20</size>
  15225. <access>read-write</access>
  15226. <resetValue>0x0000</resetValue>
  15227. <fields>
  15228. <field> <name>DMAB</name>
  15229. <description>DMA register for burst accesses</description>
  15230. <bitOffset>0</bitOffset>
  15231. <bitWidth>16</bitWidth>
  15232. </field>
  15233. </fields>
  15234. </register>
  15235. <register> <name>RCR</name>
  15236. <displayName>RCR</displayName>
  15237. <description>repetition counter register</description>
  15238. <addressOffset>0x30</addressOffset>
  15239. <size>0x20</size>
  15240. <access>read-write</access>
  15241. <resetValue>0x0000</resetValue>
  15242. <fields>
  15243. <field> <name>REP</name>
  15244. <description>Repetition counter value</description>
  15245. <bitOffset>0</bitOffset>
  15246. <bitWidth>8</bitWidth>
  15247. </field>
  15248. </fields>
  15249. </register>
  15250. <register> <name>BDTR</name>
  15251. <displayName>BDTR</displayName>
  15252. <description>break and dead-time register</description>
  15253. <addressOffset>0x44</addressOffset>
  15254. <size>0x20</size>
  15255. <access>read-write</access>
  15256. <resetValue>0x0000</resetValue>
  15257. <fields>
  15258. <field> <name>MOE</name>
  15259. <description>Main output enable</description>
  15260. <bitOffset>15</bitOffset>
  15261. <bitWidth>1</bitWidth>
  15262. </field>
  15263. <field> <name>AOE</name>
  15264. <description>Automatic output enable</description>
  15265. <bitOffset>14</bitOffset>
  15266. <bitWidth>1</bitWidth>
  15267. </field>
  15268. <field> <name>BKP</name>
  15269. <description>Break polarity</description>
  15270. <bitOffset>13</bitOffset>
  15271. <bitWidth>1</bitWidth>
  15272. </field>
  15273. <field> <name>BKE</name>
  15274. <description>Break enable</description>
  15275. <bitOffset>12</bitOffset>
  15276. <bitWidth>1</bitWidth>
  15277. </field>
  15278. <field> <name>OSSR</name>
  15279. <description>Off-state selection for Run mode</description>
  15280. <bitOffset>11</bitOffset>
  15281. <bitWidth>1</bitWidth>
  15282. </field>
  15283. <field> <name>OSSI</name>
  15284. <description>Off-state selection for Idle mode</description>
  15285. <bitOffset>10</bitOffset>
  15286. <bitWidth>1</bitWidth>
  15287. </field>
  15288. <field> <name>LOCK</name>
  15289. <description>Lock configuration</description>
  15290. <bitOffset>8</bitOffset>
  15291. <bitWidth>2</bitWidth>
  15292. </field>
  15293. <field> <name>DTG</name>
  15294. <description>Dead-time generator setup</description>
  15295. <bitOffset>0</bitOffset>
  15296. <bitWidth>8</bitWidth>
  15297. </field>
  15298. </fields>
  15299. </register>
  15300. </registers>
  15301. </peripheral>
  15302. <peripheral derivedFrom="TIM1"> <name>TIM8</name>
  15303. <baseAddress>0x40010400</baseAddress>
  15304. <interrupt>
  15305. <name>TIM8_BRK_TIM12</name>
  15306. <description>TIM8 Break interrupt and TIM12 global interrupt</description>
  15307. <value>43</value>
  15308. </interrupt>
  15309. <interrupt>
  15310. <name>TIM8_UP_TIM13</name>
  15311. <description>TIM8 Update interrupt and TIM13 global interrupt</description>
  15312. <value>44</value>
  15313. </interrupt>
  15314. <interrupt>
  15315. <name>TIM8_TRG_COM_TIM14</name>
  15316. <description>TIM8 Trigger and Commutation interrupts and TIM14 global interrupt</description>
  15317. <value>45</value>
  15318. </interrupt>
  15319. <interrupt>
  15320. <name>TIM8_CC</name>
  15321. <description>TIM8 Capture Compare interrupt</description>
  15322. <value>46</value>
  15323. </interrupt>
  15324. </peripheral>
  15325. <peripheral> <name>TIM2</name>
  15326. <description>General purpose timers</description>
  15327. <groupName>TIM</groupName>
  15328. <baseAddress>0x40000000</baseAddress>
  15329. <addressBlock>
  15330. <offset>0x0</offset>
  15331. <size>0x400</size>
  15332. <usage>registers</usage>
  15333. </addressBlock>
  15334. <interrupt>
  15335. <name>TIM2</name>
  15336. <description>TIM2 global interrupt</description>
  15337. <value>28</value>
  15338. </interrupt>
  15339. <registers>
  15340. <register> <name>CR1</name>
  15341. <displayName>CR1</displayName>
  15342. <description>control register 1</description>
  15343. <addressOffset>0x0</addressOffset>
  15344. <size>0x20</size>
  15345. <access>read-write</access>
  15346. <resetValue>0x0000</resetValue>
  15347. <fields>
  15348. <field> <name>CKD</name>
  15349. <description>Clock division</description>
  15350. <bitOffset>8</bitOffset>
  15351. <bitWidth>2</bitWidth>
  15352. </field>
  15353. <field> <name>ARPE</name>
  15354. <description>Auto-reload preload enable</description>
  15355. <bitOffset>7</bitOffset>
  15356. <bitWidth>1</bitWidth>
  15357. </field>
  15358. <field> <name>CMS</name>
  15359. <description>Center-aligned mode selection</description>
  15360. <bitOffset>5</bitOffset>
  15361. <bitWidth>2</bitWidth>
  15362. </field>
  15363. <field> <name>DIR</name>
  15364. <description>Direction</description>
  15365. <bitOffset>4</bitOffset>
  15366. <bitWidth>1</bitWidth>
  15367. </field>
  15368. <field> <name>OPM</name>
  15369. <description>One-pulse mode</description>
  15370. <bitOffset>3</bitOffset>
  15371. <bitWidth>1</bitWidth>
  15372. </field>
  15373. <field> <name>URS</name>
  15374. <description>Update request source</description>
  15375. <bitOffset>2</bitOffset>
  15376. <bitWidth>1</bitWidth>
  15377. </field>
  15378. <field> <name>UDIS</name>
  15379. <description>Update disable</description>
  15380. <bitOffset>1</bitOffset>
  15381. <bitWidth>1</bitWidth>
  15382. </field>
  15383. <field> <name>CEN</name>
  15384. <description>Counter enable</description>
  15385. <bitOffset>0</bitOffset>
  15386. <bitWidth>1</bitWidth>
  15387. </field>
  15388. </fields>
  15389. </register>
  15390. <register> <name>CR2</name>
  15391. <displayName>CR2</displayName>
  15392. <description>control register 2</description>
  15393. <addressOffset>0x4</addressOffset>
  15394. <size>0x20</size>
  15395. <access>read-write</access>
  15396. <resetValue>0x0000</resetValue>
  15397. <fields>
  15398. <field> <name>TI1S</name>
  15399. <description>TI1 selection</description>
  15400. <bitOffset>7</bitOffset>
  15401. <bitWidth>1</bitWidth>
  15402. </field>
  15403. <field> <name>MMS</name>
  15404. <description>Master mode selection</description>
  15405. <bitOffset>4</bitOffset>
  15406. <bitWidth>3</bitWidth>
  15407. </field>
  15408. <field> <name>CCDS</name>
  15409. <description>Capture/compare DMA
  15410. selection</description>
  15411. <bitOffset>3</bitOffset>
  15412. <bitWidth>1</bitWidth>
  15413. </field>
  15414. </fields>
  15415. </register>
  15416. <register> <name>SMCR</name>
  15417. <displayName>SMCR</displayName>
  15418. <description>slave mode control register</description>
  15419. <addressOffset>0x8</addressOffset>
  15420. <size>0x20</size>
  15421. <access>read-write</access>
  15422. <resetValue>0x0000</resetValue>
  15423. <fields>
  15424. <field> <name>ETP</name>
  15425. <description>External trigger polarity</description>
  15426. <bitOffset>15</bitOffset>
  15427. <bitWidth>1</bitWidth>
  15428. </field>
  15429. <field> <name>ECE</name>
  15430. <description>External clock enable</description>
  15431. <bitOffset>14</bitOffset>
  15432. <bitWidth>1</bitWidth>
  15433. </field>
  15434. <field> <name>ETPS</name>
  15435. <description>External trigger prescaler</description>
  15436. <bitOffset>12</bitOffset>
  15437. <bitWidth>2</bitWidth>
  15438. </field>
  15439. <field> <name>ETF</name>
  15440. <description>External trigger filter</description>
  15441. <bitOffset>8</bitOffset>
  15442. <bitWidth>4</bitWidth>
  15443. </field>
  15444. <field> <name>MSM</name>
  15445. <description>Master/Slave mode</description>
  15446. <bitOffset>7</bitOffset>
  15447. <bitWidth>1</bitWidth>
  15448. </field>
  15449. <field> <name>TS</name>
  15450. <description>Trigger selection</description>
  15451. <bitOffset>4</bitOffset>
  15452. <bitWidth>3</bitWidth>
  15453. </field>
  15454. <field> <name>SMS</name>
  15455. <description>Slave mode selection</description>
  15456. <bitOffset>0</bitOffset>
  15457. <bitWidth>3</bitWidth>
  15458. </field>
  15459. </fields>
  15460. </register>
  15461. <register> <name>DIER</name>
  15462. <displayName>DIER</displayName>
  15463. <description>DMA/Interrupt enable register</description>
  15464. <addressOffset>0xC</addressOffset>
  15465. <size>0x20</size>
  15466. <access>read-write</access>
  15467. <resetValue>0x0000</resetValue>
  15468. <fields>
  15469. <field> <name>TDE</name>
  15470. <description>Trigger DMA request enable</description>
  15471. <bitOffset>14</bitOffset>
  15472. <bitWidth>1</bitWidth>
  15473. </field>
  15474. <field> <name>CC4DE</name>
  15475. <description>Capture/Compare 4 DMA request enable</description>
  15476. <bitOffset>12</bitOffset>
  15477. <bitWidth>1</bitWidth>
  15478. </field>
  15479. <field> <name>CC3DE</name>
  15480. <description>Capture/Compare 3 DMA request enable</description>
  15481. <bitOffset>11</bitOffset>
  15482. <bitWidth>1</bitWidth>
  15483. </field>
  15484. <field> <name>CC2DE</name>
  15485. <description>Capture/Compare 2 DMA request enable</description>
  15486. <bitOffset>10</bitOffset>
  15487. <bitWidth>1</bitWidth>
  15488. </field>
  15489. <field> <name>CC1DE</name>
  15490. <description>Capture/Compare 1 DMA request enable</description>
  15491. <bitOffset>9</bitOffset>
  15492. <bitWidth>1</bitWidth>
  15493. </field>
  15494. <field> <name>UDE</name>
  15495. <description>Update DMA request enable</description>
  15496. <bitOffset>8</bitOffset>
  15497. <bitWidth>1</bitWidth>
  15498. </field>
  15499. <field> <name>TIE</name>
  15500. <description>Trigger interrupt enable</description>
  15501. <bitOffset>6</bitOffset>
  15502. <bitWidth>1</bitWidth>
  15503. </field>
  15504. <field> <name>CC4IE</name>
  15505. <description>Capture/Compare 4 interrupt
  15506. enable</description>
  15507. <bitOffset>4</bitOffset>
  15508. <bitWidth>1</bitWidth>
  15509. </field>
  15510. <field> <name>CC3IE</name>
  15511. <description>Capture/Compare 3 interrupt
  15512. enable</description>
  15513. <bitOffset>3</bitOffset>
  15514. <bitWidth>1</bitWidth>
  15515. </field>
  15516. <field> <name>CC2IE</name>
  15517. <description>Capture/Compare 2 interrupt
  15518. enable</description>
  15519. <bitOffset>2</bitOffset>
  15520. <bitWidth>1</bitWidth>
  15521. </field>
  15522. <field> <name>CC1IE</name>
  15523. <description>Capture/Compare 1 interrupt
  15524. enable</description>
  15525. <bitOffset>1</bitOffset>
  15526. <bitWidth>1</bitWidth>
  15527. </field>
  15528. <field> <name>UIE</name>
  15529. <description>Update interrupt enable</description>
  15530. <bitOffset>0</bitOffset>
  15531. <bitWidth>1</bitWidth>
  15532. </field>
  15533. </fields>
  15534. </register>
  15535. <register> <name>SR</name>
  15536. <displayName>SR</displayName>
  15537. <description>status register</description>
  15538. <addressOffset>0x10</addressOffset>
  15539. <size>0x20</size>
  15540. <access>read-write</access>
  15541. <resetValue>0x0000</resetValue>
  15542. <fields>
  15543. <field> <name>CC4OF</name>
  15544. <description>Capture/Compare 4 overcapture flag</description>
  15545. <bitOffset>12</bitOffset>
  15546. <bitWidth>1</bitWidth>
  15547. </field>
  15548. <field> <name>CC3OF</name>
  15549. <description>Capture/Compare 3 overcapture flag</description>
  15550. <bitOffset>11</bitOffset>
  15551. <bitWidth>1</bitWidth>
  15552. </field>
  15553. <field> <name>CC2OF</name>
  15554. <description>Capture/compare 2 overcapture flag</description>
  15555. <bitOffset>10</bitOffset>
  15556. <bitWidth>1</bitWidth>
  15557. </field>
  15558. <field> <name>CC1OF</name>
  15559. <description>Capture/Compare 1 overcapture flag</description>
  15560. <bitOffset>9</bitOffset>
  15561. <bitWidth>1</bitWidth>
  15562. </field>
  15563. <field> <name>TIF</name>
  15564. <description>Trigger interrupt flag</description>
  15565. <bitOffset>6</bitOffset>
  15566. <bitWidth>1</bitWidth>
  15567. </field>
  15568. <field> <name>CC4IF</name>
  15569. <description>Capture/Compare 4 interrupt flag</description>
  15570. <bitOffset>4</bitOffset>
  15571. <bitWidth>1</bitWidth>
  15572. </field>
  15573. <field> <name>CC3IF</name>
  15574. <description>Capture/Compare 3 interrupt flag</description>
  15575. <bitOffset>3</bitOffset>
  15576. <bitWidth>1</bitWidth>
  15577. </field>
  15578. <field> <name>CC2IF</name>
  15579. <description>Capture/Compare 2 interrupt flag</description>
  15580. <bitOffset>2</bitOffset>
  15581. <bitWidth>1</bitWidth>
  15582. </field>
  15583. <field> <name>CC1IF</name>
  15584. <description>Capture/compare 1 interrupt flag</description>
  15585. <bitOffset>1</bitOffset>
  15586. <bitWidth>1</bitWidth>
  15587. </field>
  15588. <field> <name>UIF</name>
  15589. <description>Update interrupt flag</description>
  15590. <bitOffset>0</bitOffset>
  15591. <bitWidth>1</bitWidth>
  15592. </field>
  15593. </fields>
  15594. </register>
  15595. <register> <name>EGR</name>
  15596. <displayName>EGR</displayName>
  15597. <description>event generation register</description>
  15598. <addressOffset>0x14</addressOffset>
  15599. <size>0x20</size>
  15600. <access>write-only</access>
  15601. <resetValue>0x0000</resetValue>
  15602. <fields>
  15603. <field> <name>TG</name>
  15604. <description>Trigger generation</description>
  15605. <bitOffset>6</bitOffset>
  15606. <bitWidth>1</bitWidth>
  15607. </field>
  15608. <field> <name>CC4G</name>
  15609. <description>Capture/compare 4 generation</description>
  15610. <bitOffset>4</bitOffset>
  15611. <bitWidth>1</bitWidth>
  15612. </field>
  15613. <field> <name>CC3G</name>
  15614. <description>Capture/compare 3 generation</description>
  15615. <bitOffset>3</bitOffset>
  15616. <bitWidth>1</bitWidth>
  15617. </field>
  15618. <field> <name>CC2G</name>
  15619. <description>Capture/compare 2 generation</description>
  15620. <bitOffset>2</bitOffset>
  15621. <bitWidth>1</bitWidth>
  15622. </field>
  15623. <field> <name>CC1G</name>
  15624. <description>Capture/compare 1 generation</description>
  15625. <bitOffset>1</bitOffset>
  15626. <bitWidth>1</bitWidth>
  15627. </field>
  15628. <field> <name>UG</name>
  15629. <description>Update generation</description>
  15630. <bitOffset>0</bitOffset>
  15631. <bitWidth>1</bitWidth>
  15632. </field>
  15633. </fields>
  15634. </register>
  15635. <register> <name>CCMR1_Output</name>
  15636. <displayName>CCMR1_Output</displayName>
  15637. <description>capture/compare mode register 1 (output mode)</description>
  15638. <addressOffset>0x18</addressOffset>
  15639. <size>0x20</size>
  15640. <access>read-write</access>
  15641. <resetValue>0x00000000</resetValue>
  15642. <fields>
  15643. <field> <name>OC2CE</name>
  15644. <description>OC2CE</description>
  15645. <bitOffset>15</bitOffset>
  15646. <bitWidth>1</bitWidth>
  15647. </field>
  15648. <field> <name>OC2M</name>
  15649. <description>OC2M</description>
  15650. <bitOffset>12</bitOffset>
  15651. <bitWidth>3</bitWidth>
  15652. </field>
  15653. <field> <name>OC2PE</name>
  15654. <description>OC2PE</description>
  15655. <bitOffset>11</bitOffset>
  15656. <bitWidth>1</bitWidth>
  15657. </field>
  15658. <field> <name>OC2FE</name>
  15659. <description>OC2FE</description>
  15660. <bitOffset>10</bitOffset>
  15661. <bitWidth>1</bitWidth>
  15662. </field>
  15663. <field> <name>CC2S</name>
  15664. <description>CC2S</description>
  15665. <bitOffset>8</bitOffset>
  15666. <bitWidth>2</bitWidth>
  15667. </field>
  15668. <field> <name>OC1CE</name>
  15669. <description>OC1CE</description>
  15670. <bitOffset>7</bitOffset>
  15671. <bitWidth>1</bitWidth>
  15672. </field>
  15673. <field> <name>OC1M</name>
  15674. <description>OC1M</description>
  15675. <bitOffset>4</bitOffset>
  15676. <bitWidth>3</bitWidth>
  15677. </field>
  15678. <field> <name>OC1PE</name>
  15679. <description>OC1PE</description>
  15680. <bitOffset>3</bitOffset>
  15681. <bitWidth>1</bitWidth>
  15682. </field>
  15683. <field> <name>OC1FE</name>
  15684. <description>OC1FE</description>
  15685. <bitOffset>2</bitOffset>
  15686. <bitWidth>1</bitWidth>
  15687. </field>
  15688. <field> <name>CC1S</name>
  15689. <description>CC1S</description>
  15690. <bitOffset>0</bitOffset>
  15691. <bitWidth>2</bitWidth>
  15692. </field>
  15693. </fields>
  15694. </register>
  15695. <register> <name>CCMR1_Input</name>
  15696. <displayName>CCMR1_Input</displayName>
  15697. <description>capture/compare mode register 1 (input mode)</description>
  15698. <alternateRegister>CCMR1_Output</alternateRegister>
  15699. <addressOffset>0x18</addressOffset>
  15700. <size>0x20</size>
  15701. <access>read-write</access>
  15702. <resetValue>0x00000000</resetValue>
  15703. <fields>
  15704. <field> <name>IC2F</name>
  15705. <description>Input capture 2 filter</description>
  15706. <bitOffset>12</bitOffset>
  15707. <bitWidth>4</bitWidth>
  15708. </field>
  15709. <field> <name>IC2PSC</name>
  15710. <description>Input capture 2 prescaler</description>
  15711. <bitOffset>10</bitOffset>
  15712. <bitWidth>2</bitWidth>
  15713. </field>
  15714. <field> <name>CC2S</name>
  15715. <description>Capture/Compare 2 selection</description>
  15716. <bitOffset>8</bitOffset>
  15717. <bitWidth>2</bitWidth>
  15718. </field>
  15719. <field> <name>IC1F</name>
  15720. <description>Input capture 1 filter</description>
  15721. <bitOffset>4</bitOffset>
  15722. <bitWidth>4</bitWidth>
  15723. </field>
  15724. <field> <name>IC1PSC</name>
  15725. <description>Input capture 1 prescaler</description>
  15726. <bitOffset>2</bitOffset>
  15727. <bitWidth>2</bitWidth>
  15728. </field>
  15729. <field> <name>CC1S</name>
  15730. <description>Capture/Compare 1 selection</description>
  15731. <bitOffset>0</bitOffset>
  15732. <bitWidth>2</bitWidth>
  15733. </field>
  15734. </fields>
  15735. </register>
  15736. <register> <name>CCMR2_Output</name>
  15737. <displayName>CCMR2_Output</displayName>
  15738. <description>capture/compare mode register 2 (output mode)</description>
  15739. <addressOffset>0x1C</addressOffset>
  15740. <size>0x20</size>
  15741. <access>read-write</access>
  15742. <resetValue>0x00000000</resetValue>
  15743. <fields>
  15744. <field> <name>OC4CE</name>
  15745. <description>OC4CE</description>
  15746. <bitOffset>15</bitOffset>
  15747. <bitWidth>1</bitWidth>
  15748. </field>
  15749. <field> <name>OC4M</name>
  15750. <description>OC4M</description>
  15751. <bitOffset>12</bitOffset>
  15752. <bitWidth>3</bitWidth>
  15753. </field>
  15754. <field> <name>OC4PE</name>
  15755. <description>OC4PE</description>
  15756. <bitOffset>11</bitOffset>
  15757. <bitWidth>1</bitWidth>
  15758. </field>
  15759. <field> <name>OC4FE</name>
  15760. <description>OC4FE</description>
  15761. <bitOffset>10</bitOffset>
  15762. <bitWidth>1</bitWidth>
  15763. </field>
  15764. <field> <name>CC4S</name>
  15765. <description>CC4S</description>
  15766. <bitOffset>8</bitOffset>
  15767. <bitWidth>2</bitWidth>
  15768. </field>
  15769. <field> <name>OC3CE</name>
  15770. <description>OC3CE</description>
  15771. <bitOffset>7</bitOffset>
  15772. <bitWidth>1</bitWidth>
  15773. </field>
  15774. <field> <name>OC3M</name>
  15775. <description>OC3M</description>
  15776. <bitOffset>4</bitOffset>
  15777. <bitWidth>3</bitWidth>
  15778. </field>
  15779. <field> <name>OC3PE</name>
  15780. <description>OC3PE</description>
  15781. <bitOffset>3</bitOffset>
  15782. <bitWidth>1</bitWidth>
  15783. </field>
  15784. <field> <name>OC3FE</name>
  15785. <description>OC3FE</description>
  15786. <bitOffset>2</bitOffset>
  15787. <bitWidth>1</bitWidth>
  15788. </field>
  15789. <field> <name>CC3S</name>
  15790. <description>CC3S</description>
  15791. <bitOffset>0</bitOffset>
  15792. <bitWidth>2</bitWidth>
  15793. </field>
  15794. </fields>
  15795. </register>
  15796. <register> <name>CCMR2_Input</name>
  15797. <displayName>CCMR2_Input</displayName>
  15798. <description>capture/compare mode register 2 (input mode)</description>
  15799. <alternateRegister>CCMR2_Output</alternateRegister>
  15800. <addressOffset>0x1C</addressOffset>
  15801. <size>0x20</size>
  15802. <access>read-write</access>
  15803. <resetValue>0x00000000</resetValue>
  15804. <fields>
  15805. <field> <name>IC4F</name>
  15806. <description>Input capture 4 filter</description>
  15807. <bitOffset>12</bitOffset>
  15808. <bitWidth>4</bitWidth>
  15809. </field>
  15810. <field> <name>IC4PSC</name>
  15811. <description>Input capture 4 prescaler</description>
  15812. <bitOffset>10</bitOffset>
  15813. <bitWidth>2</bitWidth>
  15814. </field>
  15815. <field> <name>CC4S</name>
  15816. <description>Capture/Compare 4 selection</description>
  15817. <bitOffset>8</bitOffset>
  15818. <bitWidth>2</bitWidth>
  15819. </field>
  15820. <field> <name>IC3F</name>
  15821. <description>Input capture 3 filter</description>
  15822. <bitOffset>4</bitOffset>
  15823. <bitWidth>4</bitWidth>
  15824. </field>
  15825. <field> <name>IC3PSC</name>
  15826. <description>Input capture 3 prescaler</description>
  15827. <bitOffset>2</bitOffset>
  15828. <bitWidth>2</bitWidth>
  15829. </field>
  15830. <field> <name>CC3S</name>
  15831. <description>Capture/compare 3 selection</description>
  15832. <bitOffset>0</bitOffset>
  15833. <bitWidth>2</bitWidth>
  15834. </field>
  15835. </fields>
  15836. </register>
  15837. <register> <name>CCER</name>
  15838. <displayName>CCER</displayName>
  15839. <description>capture/compare enable register</description>
  15840. <addressOffset>0x20</addressOffset>
  15841. <size>0x20</size>
  15842. <access>read-write</access>
  15843. <resetValue>0x0000</resetValue>
  15844. <fields>
  15845. <field> <name>CC4NP</name>
  15846. <description>Capture/Compare 4 output Polarity</description>
  15847. <bitOffset>15</bitOffset>
  15848. <bitWidth>1</bitWidth>
  15849. </field>
  15850. <field> <name>CC4P</name>
  15851. <description>Capture/Compare 3 output Polarity</description>
  15852. <bitOffset>13</bitOffset>
  15853. <bitWidth>1</bitWidth>
  15854. </field>
  15855. <field> <name>CC4E</name>
  15856. <description>Capture/Compare 4 output enable</description>
  15857. <bitOffset>12</bitOffset>
  15858. <bitWidth>1</bitWidth>
  15859. </field>
  15860. <field> <name>CC3NP</name>
  15861. <description>Capture/Compare 3 output Polarity</description>
  15862. <bitOffset>11</bitOffset>
  15863. <bitWidth>1</bitWidth>
  15864. </field>
  15865. <field> <name>CC3P</name>
  15866. <description>Capture/Compare 3 output Polarity</description>
  15867. <bitOffset>9</bitOffset>
  15868. <bitWidth>1</bitWidth>
  15869. </field>
  15870. <field> <name>CC3E</name>
  15871. <description>Capture/Compare 3 output enable</description>
  15872. <bitOffset>8</bitOffset>
  15873. <bitWidth>1</bitWidth>
  15874. </field>
  15875. <field> <name>CC2NP</name>
  15876. <description>Capture/Compare 2 output Polarity</description>
  15877. <bitOffset>7</bitOffset>
  15878. <bitWidth>1</bitWidth>
  15879. </field>
  15880. <field> <name>CC2P</name>
  15881. <description>Capture/Compare 2 output Polarity</description>
  15882. <bitOffset>5</bitOffset>
  15883. <bitWidth>1</bitWidth>
  15884. </field>
  15885. <field> <name>CC2E</name>
  15886. <description>Capture/Compare 2 output enable</description>
  15887. <bitOffset>4</bitOffset>
  15888. <bitWidth>1</bitWidth>
  15889. </field>
  15890. <field> <name>CC1NP</name>
  15891. <description>Capture/Compare 1 output Polarity</description>
  15892. <bitOffset>3</bitOffset>
  15893. <bitWidth>1</bitWidth>
  15894. </field>
  15895. <field> <name>CC1P</name>
  15896. <description>Capture/Compare 1 output Polarity</description>
  15897. <bitOffset>1</bitOffset>
  15898. <bitWidth>1</bitWidth>
  15899. </field>
  15900. <field> <name>CC1E</name>
  15901. <description>Capture/Compare 1 output enable</description>
  15902. <bitOffset>0</bitOffset>
  15903. <bitWidth>1</bitWidth>
  15904. </field>
  15905. </fields>
  15906. </register>
  15907. <register> <name>CNT</name>
  15908. <displayName>CNT</displayName>
  15909. <description>counter</description>
  15910. <addressOffset>0x24</addressOffset>
  15911. <size>0x20</size>
  15912. <access>read-write</access>
  15913. <resetValue>0x00000000</resetValue>
  15914. <fields>
  15915. <field> <name>CNT_H</name>
  15916. <description>High counter value</description>
  15917. <bitOffset>16</bitOffset>
  15918. <bitWidth>16</bitWidth>
  15919. </field>
  15920. <field> <name>CNT_L</name>
  15921. <description>Low counter value</description>
  15922. <bitOffset>0</bitOffset>
  15923. <bitWidth>16</bitWidth>
  15924. </field>
  15925. </fields>
  15926. </register>
  15927. <register> <name>PSC</name>
  15928. <displayName>PSC</displayName>
  15929. <description>prescaler</description>
  15930. <addressOffset>0x28</addressOffset>
  15931. <size>0x20</size>
  15932. <access>read-write</access>
  15933. <resetValue>0x0000</resetValue>
  15934. <fields>
  15935. <field> <name>PSC</name>
  15936. <description>Prescaler value</description>
  15937. <bitOffset>0</bitOffset>
  15938. <bitWidth>16</bitWidth>
  15939. </field>
  15940. </fields>
  15941. </register>
  15942. <register> <name>ARR</name>
  15943. <displayName>ARR</displayName>
  15944. <description>auto-reload register</description>
  15945. <addressOffset>0x2C</addressOffset>
  15946. <size>0x20</size>
  15947. <access>read-write</access>
  15948. <resetValue>0x00000000</resetValue>
  15949. <fields>
  15950. <field> <name>ARR_H</name>
  15951. <description>High Auto-reload value</description>
  15952. <bitOffset>16</bitOffset>
  15953. <bitWidth>16</bitWidth>
  15954. </field>
  15955. <field> <name>ARR_L</name>
  15956. <description>Low Auto-reload value</description>
  15957. <bitOffset>0</bitOffset>
  15958. <bitWidth>16</bitWidth>
  15959. </field>
  15960. </fields>
  15961. </register>
  15962. <register> <name>CCR1</name>
  15963. <displayName>CCR1</displayName>
  15964. <description>capture/compare register 1</description>
  15965. <addressOffset>0x34</addressOffset>
  15966. <size>0x20</size>
  15967. <access>read-write</access>
  15968. <resetValue>0x00000000</resetValue>
  15969. <fields>
  15970. <field> <name>CCR1_H</name>
  15971. <description>High Capture/Compare 1
  15972. value</description>
  15973. <bitOffset>16</bitOffset>
  15974. <bitWidth>16</bitWidth>
  15975. </field>
  15976. <field> <name>CCR1_L</name>
  15977. <description>Low Capture/Compare 1
  15978. value</description>
  15979. <bitOffset>0</bitOffset>
  15980. <bitWidth>16</bitWidth>
  15981. </field>
  15982. </fields>
  15983. </register>
  15984. <register> <name>CCR2</name>
  15985. <displayName>CCR2</displayName>
  15986. <description>capture/compare register 2</description>
  15987. <addressOffset>0x38</addressOffset>
  15988. <size>0x20</size>
  15989. <access>read-write</access>
  15990. <resetValue>0x00000000</resetValue>
  15991. <fields>
  15992. <field> <name>CCR2_H</name>
  15993. <description>High Capture/Compare 2
  15994. value</description>
  15995. <bitOffset>16</bitOffset>
  15996. <bitWidth>16</bitWidth>
  15997. </field>
  15998. <field> <name>CCR2_L</name>
  15999. <description>Low Capture/Compare 2
  16000. value</description>
  16001. <bitOffset>0</bitOffset>
  16002. <bitWidth>16</bitWidth>
  16003. </field>
  16004. </fields>
  16005. </register>
  16006. <register> <name>CCR3</name>
  16007. <displayName>CCR3</displayName>
  16008. <description>capture/compare register 3</description>
  16009. <addressOffset>0x3C</addressOffset>
  16010. <size>0x20</size>
  16011. <access>read-write</access>
  16012. <resetValue>0x00000000</resetValue>
  16013. <fields>
  16014. <field> <name>CCR3_H</name>
  16015. <description>High Capture/Compare value</description>
  16016. <bitOffset>16</bitOffset>
  16017. <bitWidth>16</bitWidth>
  16018. </field>
  16019. <field> <name>CCR3_L</name>
  16020. <description>Low Capture/Compare value</description>
  16021. <bitOffset>0</bitOffset>
  16022. <bitWidth>16</bitWidth>
  16023. </field>
  16024. </fields>
  16025. </register>
  16026. <register> <name>CCR4</name>
  16027. <displayName>CCR4</displayName>
  16028. <description>capture/compare register 4</description>
  16029. <addressOffset>0x40</addressOffset>
  16030. <size>0x20</size>
  16031. <access>read-write</access>
  16032. <resetValue>0x00000000</resetValue>
  16033. <fields>
  16034. <field> <name>CCR4_H</name>
  16035. <description>High Capture/Compare value</description>
  16036. <bitOffset>16</bitOffset>
  16037. <bitWidth>16</bitWidth>
  16038. </field>
  16039. <field> <name>CCR4_L</name>
  16040. <description>Low Capture/Compare value</description>
  16041. <bitOffset>0</bitOffset>
  16042. <bitWidth>16</bitWidth>
  16043. </field>
  16044. </fields>
  16045. </register>
  16046. <register> <name>DCR</name>
  16047. <displayName>DCR</displayName>
  16048. <description>DMA control register</description>
  16049. <addressOffset>0x48</addressOffset>
  16050. <size>0x20</size>
  16051. <access>read-write</access>
  16052. <resetValue>0x0000</resetValue>
  16053. <fields>
  16054. <field> <name>DBL</name>
  16055. <description>DMA burst length</description>
  16056. <bitOffset>8</bitOffset>
  16057. <bitWidth>5</bitWidth>
  16058. </field>
  16059. <field> <name>DBA</name>
  16060. <description>DMA base address</description>
  16061. <bitOffset>0</bitOffset>
  16062. <bitWidth>5</bitWidth>
  16063. </field>
  16064. </fields>
  16065. </register>
  16066. <register> <name>DMAR</name>
  16067. <displayName>DMAR</displayName>
  16068. <description>DMA address for full transfer</description>
  16069. <addressOffset>0x4C</addressOffset>
  16070. <size>0x20</size>
  16071. <access>read-write</access>
  16072. <resetValue>0x0000</resetValue>
  16073. <fields>
  16074. <field> <name>DMAB</name>
  16075. <description>DMA register for burst
  16076. accesses</description>
  16077. <bitOffset>0</bitOffset>
  16078. <bitWidth>16</bitWidth>
  16079. </field>
  16080. </fields>
  16081. </register>
  16082. <register> <name>OR</name>
  16083. <displayName>OR</displayName>
  16084. <description>TIM5 option register</description>
  16085. <addressOffset>0x50</addressOffset>
  16086. <size>0x20</size>
  16087. <access>read-write</access>
  16088. <resetValue>0x0000</resetValue>
  16089. <fields>
  16090. <field> <name>ITR1_RMP</name>
  16091. <description>Timer Input 4 remap</description>
  16092. <bitOffset>10</bitOffset>
  16093. <bitWidth>2</bitWidth>
  16094. </field>
  16095. </fields>
  16096. </register>
  16097. </registers>
  16098. </peripheral>
  16099. <peripheral> <name>TIM3</name>
  16100. <description>General purpose timers</description>
  16101. <groupName>TIM</groupName>
  16102. <baseAddress>0x40000400</baseAddress>
  16103. <addressBlock>
  16104. <offset>0x0</offset>
  16105. <size>0x400</size>
  16106. <usage>registers</usage>
  16107. </addressBlock>
  16108. <interrupt>
  16109. <name>TIM3</name>
  16110. <description>TIM3 global interrupt</description>
  16111. <value>29</value>
  16112. </interrupt>
  16113. <registers>
  16114. <register> <name>CR1</name>
  16115. <displayName>CR1</displayName>
  16116. <description>control register 1</description>
  16117. <addressOffset>0x0</addressOffset>
  16118. <size>0x20</size>
  16119. <access>read-write</access>
  16120. <resetValue>0x0000</resetValue>
  16121. <fields>
  16122. <field> <name>CKD</name>
  16123. <description>Clock division</description>
  16124. <bitOffset>8</bitOffset>
  16125. <bitWidth>2</bitWidth>
  16126. </field>
  16127. <field> <name>ARPE</name>
  16128. <description>Auto-reload preload enable</description>
  16129. <bitOffset>7</bitOffset>
  16130. <bitWidth>1</bitWidth>
  16131. </field>
  16132. <field> <name>CMS</name>
  16133. <description>Center-aligned mode selection</description>
  16134. <bitOffset>5</bitOffset>
  16135. <bitWidth>2</bitWidth>
  16136. </field>
  16137. <field> <name>DIR</name>
  16138. <description>Direction</description>
  16139. <bitOffset>4</bitOffset>
  16140. <bitWidth>1</bitWidth>
  16141. </field>
  16142. <field> <name>OPM</name>
  16143. <description>One-pulse mode</description>
  16144. <bitOffset>3</bitOffset>
  16145. <bitWidth>1</bitWidth>
  16146. </field>
  16147. <field> <name>URS</name>
  16148. <description>Update request source</description>
  16149. <bitOffset>2</bitOffset>
  16150. <bitWidth>1</bitWidth>
  16151. </field>
  16152. <field> <name>UDIS</name>
  16153. <description>Update disable</description>
  16154. <bitOffset>1</bitOffset>
  16155. <bitWidth>1</bitWidth>
  16156. </field>
  16157. <field> <name>CEN</name>
  16158. <description>Counter enable</description>
  16159. <bitOffset>0</bitOffset>
  16160. <bitWidth>1</bitWidth>
  16161. </field>
  16162. </fields>
  16163. </register>
  16164. <register> <name>CR2</name>
  16165. <displayName>CR2</displayName>
  16166. <description>control register 2</description>
  16167. <addressOffset>0x4</addressOffset>
  16168. <size>0x20</size>
  16169. <access>read-write</access>
  16170. <resetValue>0x0000</resetValue>
  16171. <fields>
  16172. <field> <name>TI1S</name>
  16173. <description>TI1 selection</description>
  16174. <bitOffset>7</bitOffset>
  16175. <bitWidth>1</bitWidth>
  16176. </field>
  16177. <field> <name>MMS</name>
  16178. <description>Master mode selection</description>
  16179. <bitOffset>4</bitOffset>
  16180. <bitWidth>3</bitWidth>
  16181. </field>
  16182. <field> <name>CCDS</name>
  16183. <description>Capture/compare DMA
  16184. selection</description>
  16185. <bitOffset>3</bitOffset>
  16186. <bitWidth>1</bitWidth>
  16187. </field>
  16188. </fields>
  16189. </register>
  16190. <register> <name>SMCR</name>
  16191. <displayName>SMCR</displayName>
  16192. <description>slave mode control register</description>
  16193. <addressOffset>0x8</addressOffset>
  16194. <size>0x20</size>
  16195. <access>read-write</access>
  16196. <resetValue>0x0000</resetValue>
  16197. <fields>
  16198. <field> <name>ETP</name>
  16199. <description>External trigger polarity</description>
  16200. <bitOffset>15</bitOffset>
  16201. <bitWidth>1</bitWidth>
  16202. </field>
  16203. <field> <name>ECE</name>
  16204. <description>External clock enable</description>
  16205. <bitOffset>14</bitOffset>
  16206. <bitWidth>1</bitWidth>
  16207. </field>
  16208. <field> <name>ETPS</name>
  16209. <description>External trigger prescaler</description>
  16210. <bitOffset>12</bitOffset>
  16211. <bitWidth>2</bitWidth>
  16212. </field>
  16213. <field> <name>ETF</name>
  16214. <description>External trigger filter</description>
  16215. <bitOffset>8</bitOffset>
  16216. <bitWidth>4</bitWidth>
  16217. </field>
  16218. <field> <name>MSM</name>
  16219. <description>Master/Slave mode</description>
  16220. <bitOffset>7</bitOffset>
  16221. <bitWidth>1</bitWidth>
  16222. </field>
  16223. <field> <name>TS</name>
  16224. <description>Trigger selection</description>
  16225. <bitOffset>4</bitOffset>
  16226. <bitWidth>3</bitWidth>
  16227. </field>
  16228. <field> <name>SMS</name>
  16229. <description>Slave mode selection</description>
  16230. <bitOffset>0</bitOffset>
  16231. <bitWidth>3</bitWidth>
  16232. </field>
  16233. </fields>
  16234. </register>
  16235. <register> <name>DIER</name>
  16236. <displayName>DIER</displayName>
  16237. <description>DMA/Interrupt enable register</description>
  16238. <addressOffset>0xC</addressOffset>
  16239. <size>0x20</size>
  16240. <access>read-write</access>
  16241. <resetValue>0x0000</resetValue>
  16242. <fields>
  16243. <field> <name>TDE</name>
  16244. <description>Trigger DMA request enable</description>
  16245. <bitOffset>14</bitOffset>
  16246. <bitWidth>1</bitWidth>
  16247. </field>
  16248. <field> <name>CC4DE</name>
  16249. <description>Capture/Compare 4 DMA request enable</description>
  16250. <bitOffset>12</bitOffset>
  16251. <bitWidth>1</bitWidth>
  16252. </field>
  16253. <field> <name>CC3DE</name>
  16254. <description>Capture/Compare 3 DMA request enable</description>
  16255. <bitOffset>11</bitOffset>
  16256. <bitWidth>1</bitWidth>
  16257. </field>
  16258. <field> <name>CC2DE</name>
  16259. <description>Capture/Compare 2 DMA request enable</description>
  16260. <bitOffset>10</bitOffset>
  16261. <bitWidth>1</bitWidth>
  16262. </field>
  16263. <field> <name>CC1DE</name>
  16264. <description>Capture/Compare 1 DMA request enable</description>
  16265. <bitOffset>9</bitOffset>
  16266. <bitWidth>1</bitWidth>
  16267. </field>
  16268. <field> <name>UDE</name>
  16269. <description>Update DMA request enable</description>
  16270. <bitOffset>8</bitOffset>
  16271. <bitWidth>1</bitWidth>
  16272. </field>
  16273. <field> <name>TIE</name>
  16274. <description>Trigger interrupt enable</description>
  16275. <bitOffset>6</bitOffset>
  16276. <bitWidth>1</bitWidth>
  16277. </field>
  16278. <field> <name>CC4IE</name>
  16279. <description>Capture/Compare 4 interrupt enable</description>
  16280. <bitOffset>4</bitOffset>
  16281. <bitWidth>1</bitWidth>
  16282. </field>
  16283. <field> <name>CC3IE</name>
  16284. <description>Capture/Compare 3 interrupt enable</description>
  16285. <bitOffset>3</bitOffset>
  16286. <bitWidth>1</bitWidth>
  16287. </field>
  16288. <field> <name>CC2IE</name>
  16289. <description>Capture/Compare 2 interrupt enable</description>
  16290. <bitOffset>2</bitOffset>
  16291. <bitWidth>1</bitWidth>
  16292. </field>
  16293. <field> <name>CC1IE</name>
  16294. <description>Capture/Compare 1 interrupt enable</description>
  16295. <bitOffset>1</bitOffset>
  16296. <bitWidth>1</bitWidth>
  16297. </field>
  16298. <field> <name>UIE</name>
  16299. <description>Update interrupt enable</description>
  16300. <bitOffset>0</bitOffset>
  16301. <bitWidth>1</bitWidth>
  16302. </field>
  16303. </fields>
  16304. </register>
  16305. <register> <name>SR</name>
  16306. <displayName>SR</displayName>
  16307. <description>status register</description>
  16308. <addressOffset>0x10</addressOffset>
  16309. <size>0x20</size>
  16310. <access>read-write</access>
  16311. <resetValue>0x0000</resetValue>
  16312. <fields>
  16313. <field> <name>CC4OF</name>
  16314. <description>Capture/Compare 4 overcapture flag</description>
  16315. <bitOffset>12</bitOffset>
  16316. <bitWidth>1</bitWidth>
  16317. </field>
  16318. <field> <name>CC3OF</name>
  16319. <description>Capture/Compare 3 overcapture flag</description>
  16320. <bitOffset>11</bitOffset>
  16321. <bitWidth>1</bitWidth>
  16322. </field>
  16323. <field> <name>CC2OF</name>
  16324. <description>Capture/compare 2 overcapture flag</description>
  16325. <bitOffset>10</bitOffset>
  16326. <bitWidth>1</bitWidth>
  16327. </field>
  16328. <field> <name>CC1OF</name>
  16329. <description>Capture/Compare 1 overcapture flag</description>
  16330. <bitOffset>9</bitOffset>
  16331. <bitWidth>1</bitWidth>
  16332. </field>
  16333. <field> <name>TIF</name>
  16334. <description>Trigger interrupt flag</description>
  16335. <bitOffset>6</bitOffset>
  16336. <bitWidth>1</bitWidth>
  16337. </field>
  16338. <field> <name>CC4IF</name>
  16339. <description>Capture/Compare 4 interrupt flag</description>
  16340. <bitOffset>4</bitOffset>
  16341. <bitWidth>1</bitWidth>
  16342. </field>
  16343. <field> <name>CC3IF</name>
  16344. <description>Capture/Compare 3 interrupt flag</description>
  16345. <bitOffset>3</bitOffset>
  16346. <bitWidth>1</bitWidth>
  16347. </field>
  16348. <field> <name>CC2IF</name>
  16349. <description>Capture/Compare 2 interrupt flag</description>
  16350. <bitOffset>2</bitOffset>
  16351. <bitWidth>1</bitWidth>
  16352. </field>
  16353. <field> <name>CC1IF</name>
  16354. <description>Capture/compare 1 interrupt flag</description>
  16355. <bitOffset>1</bitOffset>
  16356. <bitWidth>1</bitWidth>
  16357. </field>
  16358. <field> <name>UIF</name>
  16359. <description>Update interrupt flag</description>
  16360. <bitOffset>0</bitOffset>
  16361. <bitWidth>1</bitWidth>
  16362. </field>
  16363. </fields>
  16364. </register>
  16365. <register> <name>EGR</name>
  16366. <displayName>EGR</displayName>
  16367. <description>event generation register</description>
  16368. <addressOffset>0x14</addressOffset>
  16369. <size>0x20</size>
  16370. <access>write-only</access>
  16371. <resetValue>0x0000</resetValue>
  16372. <fields>
  16373. <field> <name>TG</name>
  16374. <description>Trigger generation</description>
  16375. <bitOffset>6</bitOffset>
  16376. <bitWidth>1</bitWidth>
  16377. </field>
  16378. <field> <name>CC4G</name>
  16379. <description>Capture/compare 4 generation</description>
  16380. <bitOffset>4</bitOffset>
  16381. <bitWidth>1</bitWidth>
  16382. </field>
  16383. <field> <name>CC3G</name>
  16384. <description>Capture/compare 3 generation</description>
  16385. <bitOffset>3</bitOffset>
  16386. <bitWidth>1</bitWidth>
  16387. </field>
  16388. <field> <name>CC2G</name>
  16389. <description>Capture/compare 2 generation</description>
  16390. <bitOffset>2</bitOffset>
  16391. <bitWidth>1</bitWidth>
  16392. </field>
  16393. <field> <name>CC1G</name>
  16394. <description>Capture/compare 1 generation</description>
  16395. <bitOffset>1</bitOffset>
  16396. <bitWidth>1</bitWidth>
  16397. </field>
  16398. <field> <name>UG</name>
  16399. <description>Update generation</description>
  16400. <bitOffset>0</bitOffset>
  16401. <bitWidth>1</bitWidth>
  16402. </field>
  16403. </fields>
  16404. </register>
  16405. <register> <name>CCMR1_Output</name>
  16406. <displayName>CCMR1_Output</displayName>
  16407. <description>capture/compare mode register 1 (output mode)</description>
  16408. <addressOffset>0x18</addressOffset>
  16409. <size>0x20</size>
  16410. <access>read-write</access>
  16411. <resetValue>0x00000000</resetValue>
  16412. <fields>
  16413. <field> <name>OC2CE</name>
  16414. <description>OC2CE</description>
  16415. <bitOffset>15</bitOffset>
  16416. <bitWidth>1</bitWidth>
  16417. </field>
  16418. <field> <name>OC2M</name>
  16419. <description>OC2M</description>
  16420. <bitOffset>12</bitOffset>
  16421. <bitWidth>3</bitWidth>
  16422. </field>
  16423. <field> <name>OC2PE</name>
  16424. <description>OC2PE</description>
  16425. <bitOffset>11</bitOffset>
  16426. <bitWidth>1</bitWidth>
  16427. </field>
  16428. <field> <name>OC2FE</name>
  16429. <description>OC2FE</description>
  16430. <bitOffset>10</bitOffset>
  16431. <bitWidth>1</bitWidth>
  16432. </field>
  16433. <field> <name>CC2S</name>
  16434. <description>CC2S</description>
  16435. <bitOffset>8</bitOffset>
  16436. <bitWidth>2</bitWidth>
  16437. </field>
  16438. <field> <name>OC1CE</name>
  16439. <description>OC1CE</description>
  16440. <bitOffset>7</bitOffset>
  16441. <bitWidth>1</bitWidth>
  16442. </field>
  16443. <field> <name>OC1M</name>
  16444. <description>OC1M</description>
  16445. <bitOffset>4</bitOffset>
  16446. <bitWidth>3</bitWidth>
  16447. </field>
  16448. <field> <name>OC1PE</name>
  16449. <description>OC1PE</description>
  16450. <bitOffset>3</bitOffset>
  16451. <bitWidth>1</bitWidth>
  16452. </field>
  16453. <field> <name>OC1FE</name>
  16454. <description>OC1FE</description>
  16455. <bitOffset>2</bitOffset>
  16456. <bitWidth>1</bitWidth>
  16457. </field>
  16458. <field> <name>CC1S</name>
  16459. <description>CC1S</description>
  16460. <bitOffset>0</bitOffset>
  16461. <bitWidth>2</bitWidth>
  16462. </field>
  16463. </fields>
  16464. </register>
  16465. <register> <name>CCMR1_Input</name>
  16466. <displayName>CCMR1_Input</displayName>
  16467. <description>capture/compare mode register 1 (input mode)</description>
  16468. <alternateRegister>CCMR1_Output</alternateRegister>
  16469. <addressOffset>0x18</addressOffset>
  16470. <size>0x20</size>
  16471. <access>read-write</access>
  16472. <resetValue>0x00000000</resetValue>
  16473. <fields>
  16474. <field> <name>IC2F</name>
  16475. <description>Input capture 2 filter</description>
  16476. <bitOffset>12</bitOffset>
  16477. <bitWidth>4</bitWidth>
  16478. </field>
  16479. <field> <name>IC2PSC</name>
  16480. <description>Input capture 2 prescaler</description>
  16481. <bitOffset>10</bitOffset>
  16482. <bitWidth>2</bitWidth>
  16483. </field>
  16484. <field> <name>CC2S</name>
  16485. <description>Capture/Compare 2
  16486. selection</description>
  16487. <bitOffset>8</bitOffset>
  16488. <bitWidth>2</bitWidth>
  16489. </field>
  16490. <field> <name>IC1F</name>
  16491. <description>Input capture 1 filter</description>
  16492. <bitOffset>4</bitOffset>
  16493. <bitWidth>4</bitWidth>
  16494. </field>
  16495. <field> <name>IC1PSC</name>
  16496. <description>Input capture 1 prescaler</description>
  16497. <bitOffset>2</bitOffset>
  16498. <bitWidth>2</bitWidth>
  16499. </field>
  16500. <field> <name>CC1S</name>
  16501. <description>Capture/Compare 1 selection</description>
  16502. <bitOffset>0</bitOffset>
  16503. <bitWidth>2</bitWidth>
  16504. </field>
  16505. </fields>
  16506. </register>
  16507. <register> <name>CCMR2_Output</name>
  16508. <displayName>CCMR2_Output</displayName>
  16509. <description>capture/compare mode register 2 (output mode)</description>
  16510. <addressOffset>0x1C</addressOffset>
  16511. <size>0x20</size>
  16512. <access>read-write</access>
  16513. <resetValue>0x00000000</resetValue>
  16514. <fields>
  16515. <field> <name>OC4CE</name>
  16516. <description>OC4CE</description>
  16517. <bitOffset>15</bitOffset>
  16518. <bitWidth>1</bitWidth>
  16519. </field>
  16520. <field> <name>OC4M</name>
  16521. <description>OC4M</description>
  16522. <bitOffset>12</bitOffset>
  16523. <bitWidth>3</bitWidth>
  16524. </field>
  16525. <field> <name>OC4PE</name>
  16526. <description>OC4PE</description>
  16527. <bitOffset>11</bitOffset>
  16528. <bitWidth>1</bitWidth>
  16529. </field>
  16530. <field> <name>OC4FE</name>
  16531. <description>OC4FE</description>
  16532. <bitOffset>10</bitOffset>
  16533. <bitWidth>1</bitWidth>
  16534. </field>
  16535. <field> <name>CC4S</name>
  16536. <description>CC4S</description>
  16537. <bitOffset>8</bitOffset>
  16538. <bitWidth>2</bitWidth>
  16539. </field>
  16540. <field> <name>OC3CE</name>
  16541. <description>OC3CE</description>
  16542. <bitOffset>7</bitOffset>
  16543. <bitWidth>1</bitWidth>
  16544. </field>
  16545. <field> <name>OC3M</name>
  16546. <description>OC3M</description>
  16547. <bitOffset>4</bitOffset>
  16548. <bitWidth>3</bitWidth>
  16549. </field>
  16550. <field> <name>OC3PE</name>
  16551. <description>OC3PE</description>
  16552. <bitOffset>3</bitOffset>
  16553. <bitWidth>1</bitWidth>
  16554. </field>
  16555. <field> <name>OC3FE</name>
  16556. <description>OC3FE</description>
  16557. <bitOffset>2</bitOffset>
  16558. <bitWidth>1</bitWidth>
  16559. </field>
  16560. <field> <name>CC3S</name>
  16561. <description>CC3S</description>
  16562. <bitOffset>0</bitOffset>
  16563. <bitWidth>2</bitWidth>
  16564. </field>
  16565. </fields>
  16566. </register>
  16567. <register> <name>CCMR2_Input</name>
  16568. <displayName>CCMR2_Input</displayName>
  16569. <description>capture/compare mode register 2 (input mode)</description>
  16570. <alternateRegister>CCMR2_Output</alternateRegister>
  16571. <addressOffset>0x1C</addressOffset>
  16572. <size>0x20</size>
  16573. <access>read-write</access>
  16574. <resetValue>0x00000000</resetValue>
  16575. <fields>
  16576. <field> <name>IC4F</name>
  16577. <description>Input capture 4 filter</description>
  16578. <bitOffset>12</bitOffset>
  16579. <bitWidth>4</bitWidth>
  16580. </field>
  16581. <field> <name>IC4PSC</name>
  16582. <description>Input capture 4 prescaler</description>
  16583. <bitOffset>10</bitOffset>
  16584. <bitWidth>2</bitWidth>
  16585. </field>
  16586. <field> <name>CC4S</name>
  16587. <description>Capture/Compare 4
  16588. selection</description>
  16589. <bitOffset>8</bitOffset>
  16590. <bitWidth>2</bitWidth>
  16591. </field>
  16592. <field> <name>IC3F</name>
  16593. <description>Input capture 3 filter</description>
  16594. <bitOffset>4</bitOffset>
  16595. <bitWidth>4</bitWidth>
  16596. </field>
  16597. <field> <name>IC3PSC</name>
  16598. <description>Input capture 3 prescaler</description>
  16599. <bitOffset>2</bitOffset>
  16600. <bitWidth>2</bitWidth>
  16601. </field>
  16602. <field> <name>CC3S</name>
  16603. <description>Capture/compare 3
  16604. selection</description>
  16605. <bitOffset>0</bitOffset>
  16606. <bitWidth>2</bitWidth>
  16607. </field>
  16608. </fields>
  16609. </register>
  16610. <register> <name>CCER</name>
  16611. <displayName>CCER</displayName>
  16612. <description>capture/compare enable register</description>
  16613. <addressOffset>0x20</addressOffset>
  16614. <size>0x20</size>
  16615. <access>read-write</access>
  16616. <resetValue>0x0000</resetValue>
  16617. <fields>
  16618. <field> <name>CC4NP</name>
  16619. <description>Capture/Compare 4 output Polarity</description>
  16620. <bitOffset>15</bitOffset>
  16621. <bitWidth>1</bitWidth>
  16622. </field>
  16623. <field> <name>CC4P</name>
  16624. <description>Capture/Compare 3 output Polarity</description>
  16625. <bitOffset>13</bitOffset>
  16626. <bitWidth>1</bitWidth>
  16627. </field>
  16628. <field> <name>CC4E</name>
  16629. <description>Capture/Compare 4 output enable</description>
  16630. <bitOffset>12</bitOffset>
  16631. <bitWidth>1</bitWidth>
  16632. </field>
  16633. <field> <name>CC3NP</name>
  16634. <description>Capture/Compare 3 output Polarity</description>
  16635. <bitOffset>11</bitOffset>
  16636. <bitWidth>1</bitWidth>
  16637. </field>
  16638. <field> <name>CC3P</name>
  16639. <description>Capture/Compare 3 output Polarity</description>
  16640. <bitOffset>9</bitOffset>
  16641. <bitWidth>1</bitWidth>
  16642. </field>
  16643. <field> <name>CC3E</name>
  16644. <description>Capture/Compare 3 output enable</description>
  16645. <bitOffset>8</bitOffset>
  16646. <bitWidth>1</bitWidth>
  16647. </field>
  16648. <field> <name>CC2NP</name>
  16649. <description>Capture/Compare 2 output Polarity</description>
  16650. <bitOffset>7</bitOffset>
  16651. <bitWidth>1</bitWidth>
  16652. </field>
  16653. <field> <name>CC2P</name>
  16654. <description>Capture/Compare 2 output Polarity</description>
  16655. <bitOffset>5</bitOffset>
  16656. <bitWidth>1</bitWidth>
  16657. </field>
  16658. <field> <name>CC2E</name>
  16659. <description>Capture/Compare 2 output enable</description>
  16660. <bitOffset>4</bitOffset>
  16661. <bitWidth>1</bitWidth>
  16662. </field>
  16663. <field> <name>CC1NP</name>
  16664. <description>Capture/Compare 1 output Polarity</description>
  16665. <bitOffset>3</bitOffset>
  16666. <bitWidth>1</bitWidth>
  16667. </field>
  16668. <field> <name>CC1P</name>
  16669. <description>Capture/Compare 1 output Polarity</description>
  16670. <bitOffset>1</bitOffset>
  16671. <bitWidth>1</bitWidth>
  16672. </field>
  16673. <field> <name>CC1E</name>
  16674. <description>Capture/Compare 1 output enable</description>
  16675. <bitOffset>0</bitOffset>
  16676. <bitWidth>1</bitWidth>
  16677. </field>
  16678. </fields>
  16679. </register>
  16680. <register> <name>CNT</name>
  16681. <displayName>CNT</displayName>
  16682. <description>counter</description>
  16683. <addressOffset>0x24</addressOffset>
  16684. <size>0x20</size>
  16685. <access>read-write</access>
  16686. <resetValue>0x00000000</resetValue>
  16687. <fields>
  16688. <field> <name>CNT_H</name>
  16689. <description>High counter value</description>
  16690. <bitOffset>16</bitOffset>
  16691. <bitWidth>16</bitWidth>
  16692. </field>
  16693. <field> <name>CNT_L</name>
  16694. <description>Low counter value</description>
  16695. <bitOffset>0</bitOffset>
  16696. <bitWidth>16</bitWidth>
  16697. </field>
  16698. </fields>
  16699. </register>
  16700. <register> <name>PSC</name>
  16701. <displayName>PSC</displayName>
  16702. <description>prescaler</description>
  16703. <addressOffset>0x28</addressOffset>
  16704. <size>0x20</size>
  16705. <access>read-write</access>
  16706. <resetValue>0x0000</resetValue>
  16707. <fields>
  16708. <field> <name>PSC</name>
  16709. <description>Prescaler value</description>
  16710. <bitOffset>0</bitOffset>
  16711. <bitWidth>16</bitWidth>
  16712. </field>
  16713. </fields>
  16714. </register>
  16715. <register> <name>ARR</name>
  16716. <displayName>ARR</displayName>
  16717. <description>auto-reload register</description>
  16718. <addressOffset>0x2C</addressOffset>
  16719. <size>0x20</size>
  16720. <access>read-write</access>
  16721. <resetValue>0x00000000</resetValue>
  16722. <fields>
  16723. <field> <name>ARR_H</name>
  16724. <description>High Auto-reload value</description>
  16725. <bitOffset>16</bitOffset>
  16726. <bitWidth>16</bitWidth>
  16727. </field>
  16728. <field> <name>ARR_L</name>
  16729. <description>Low Auto-reload value</description>
  16730. <bitOffset>0</bitOffset>
  16731. <bitWidth>16</bitWidth>
  16732. </field>
  16733. </fields>
  16734. </register>
  16735. <register> <name>CCR1</name>
  16736. <displayName>CCR1</displayName>
  16737. <description>capture/compare register 1</description>
  16738. <addressOffset>0x34</addressOffset>
  16739. <size>0x20</size>
  16740. <access>read-write</access>
  16741. <resetValue>0x00000000</resetValue>
  16742. <fields>
  16743. <field> <name>CCR1_H</name>
  16744. <description>High Capture/Compare 1 value</description>
  16745. <bitOffset>16</bitOffset>
  16746. <bitWidth>16</bitWidth>
  16747. </field>
  16748. <field> <name>CCR1_L</name>
  16749. <description>Low Capture/Compare 1 value</description>
  16750. <bitOffset>0</bitOffset>
  16751. <bitWidth>16</bitWidth>
  16752. </field>
  16753. </fields>
  16754. </register>
  16755. <register> <name>CCR2</name>
  16756. <displayName>CCR2</displayName>
  16757. <description>capture/compare register 2</description>
  16758. <addressOffset>0x38</addressOffset>
  16759. <size>0x20</size>
  16760. <access>read-write</access>
  16761. <resetValue>0x00000000</resetValue>
  16762. <fields>
  16763. <field> <name>CCR2_H</name>
  16764. <description>High Capture/Compare 2 value</description>
  16765. <bitOffset>16</bitOffset>
  16766. <bitWidth>16</bitWidth>
  16767. </field>
  16768. <field> <name>CCR2_L</name>
  16769. <description>Low Capture/Compare 2 value</description>
  16770. <bitOffset>0</bitOffset>
  16771. <bitWidth>16</bitWidth>
  16772. </field>
  16773. </fields>
  16774. </register>
  16775. <register> <name>CCR3</name>
  16776. <displayName>CCR3</displayName>
  16777. <description>capture/compare register 3</description>
  16778. <addressOffset>0x3C</addressOffset>
  16779. <size>0x20</size>
  16780. <access>read-write</access>
  16781. <resetValue>0x00000000</resetValue>
  16782. <fields>
  16783. <field> <name>CCR3_H</name>
  16784. <description>High Capture/Compare value</description>
  16785. <bitOffset>16</bitOffset>
  16786. <bitWidth>16</bitWidth>
  16787. </field>
  16788. <field> <name>CCR3_L</name>
  16789. <description>Low Capture/Compare value</description>
  16790. <bitOffset>0</bitOffset>
  16791. <bitWidth>16</bitWidth>
  16792. </field>
  16793. </fields>
  16794. </register>
  16795. <register> <name>CCR4</name>
  16796. <displayName>CCR4</displayName>
  16797. <description>capture/compare register 4</description>
  16798. <addressOffset>0x40</addressOffset>
  16799. <size>0x20</size>
  16800. <access>read-write</access>
  16801. <resetValue>0x00000000</resetValue>
  16802. <fields>
  16803. <field> <name>CCR4_H</name>
  16804. <description>High Capture/Compare value</description>
  16805. <bitOffset>16</bitOffset>
  16806. <bitWidth>16</bitWidth>
  16807. </field>
  16808. <field> <name>CCR4_L</name>
  16809. <description>Low Capture/Compare value</description>
  16810. <bitOffset>0</bitOffset>
  16811. <bitWidth>16</bitWidth>
  16812. </field>
  16813. </fields>
  16814. </register>
  16815. <register> <name>DCR</name>
  16816. <displayName>DCR</displayName>
  16817. <description>DMA control register</description>
  16818. <addressOffset>0x48</addressOffset>
  16819. <size>0x20</size>
  16820. <access>read-write</access>
  16821. <resetValue>0x0000</resetValue>
  16822. <fields>
  16823. <field> <name>DBL</name>
  16824. <description>DMA burst length</description>
  16825. <bitOffset>8</bitOffset>
  16826. <bitWidth>5</bitWidth>
  16827. </field>
  16828. <field> <name>DBA</name>
  16829. <description>DMA base address</description>
  16830. <bitOffset>0</bitOffset>
  16831. <bitWidth>5</bitWidth>
  16832. </field>
  16833. </fields>
  16834. </register>
  16835. <register> <name>DMAR</name>
  16836. <displayName>DMAR</displayName>
  16837. <description>DMA address for full transfer</description>
  16838. <addressOffset>0x4C</addressOffset>
  16839. <size>0x20</size>
  16840. <access>read-write</access>
  16841. <resetValue>0x0000</resetValue>
  16842. <fields>
  16843. <field> <name>DMAB</name>
  16844. <description>DMA register for burst accesses</description>
  16845. <bitOffset>0</bitOffset>
  16846. <bitWidth>16</bitWidth>
  16847. </field>
  16848. </fields>
  16849. </register>
  16850. </registers>
  16851. </peripheral>
  16852. <peripheral derivedFrom="TIM3"> <name>TIM4</name>
  16853. <baseAddress>0x40000800</baseAddress>
  16854. <interrupt>
  16855. <name>TIM4</name>
  16856. <description>TIM4 global interrupt</description>
  16857. <value>30</value>
  16858. </interrupt>
  16859. </peripheral>
  16860. <peripheral> <name>TIM5</name>
  16861. <description>General-purpose-timers</description>
  16862. <groupName>TIM</groupName>
  16863. <baseAddress>0x40000C00</baseAddress>
  16864. <addressBlock>
  16865. <offset>0x0</offset>
  16866. <size>0x400</size>
  16867. <usage>registers</usage>
  16868. </addressBlock>
  16869. <interrupt>
  16870. <name>TIM5</name>
  16871. <description>TIM5 global interrupt</description>
  16872. <value>50</value>
  16873. </interrupt>
  16874. <registers>
  16875. <register> <name>CR1</name>
  16876. <displayName>CR1</displayName>
  16877. <description>control register 1</description>
  16878. <addressOffset>0x0</addressOffset>
  16879. <size>0x20</size>
  16880. <access>read-write</access>
  16881. <resetValue>0x0000</resetValue>
  16882. <fields>
  16883. <field> <name>CKD</name>
  16884. <description>Clock division</description>
  16885. <bitOffset>8</bitOffset>
  16886. <bitWidth>2</bitWidth>
  16887. </field>
  16888. <field> <name>ARPE</name>
  16889. <description>Auto-reload preload enable</description>
  16890. <bitOffset>7</bitOffset>
  16891. <bitWidth>1</bitWidth>
  16892. </field>
  16893. <field> <name>CMS</name>
  16894. <description>Center-aligned mode selection</description>
  16895. <bitOffset>5</bitOffset>
  16896. <bitWidth>2</bitWidth>
  16897. </field>
  16898. <field> <name>DIR</name>
  16899. <description>Direction</description>
  16900. <bitOffset>4</bitOffset>
  16901. <bitWidth>1</bitWidth>
  16902. </field>
  16903. <field> <name>OPM</name>
  16904. <description>One-pulse mode</description>
  16905. <bitOffset>3</bitOffset>
  16906. <bitWidth>1</bitWidth>
  16907. </field>
  16908. <field> <name>URS</name>
  16909. <description>Update request source</description>
  16910. <bitOffset>2</bitOffset>
  16911. <bitWidth>1</bitWidth>
  16912. </field>
  16913. <field> <name>UDIS</name>
  16914. <description>Update disable</description>
  16915. <bitOffset>1</bitOffset>
  16916. <bitWidth>1</bitWidth>
  16917. </field>
  16918. <field> <name>CEN</name>
  16919. <description>Counter enable</description>
  16920. <bitOffset>0</bitOffset>
  16921. <bitWidth>1</bitWidth>
  16922. </field>
  16923. </fields>
  16924. </register>
  16925. <register> <name>CR2</name>
  16926. <displayName>CR2</displayName>
  16927. <description>control register 2</description>
  16928. <addressOffset>0x4</addressOffset>
  16929. <size>0x20</size>
  16930. <access>read-write</access>
  16931. <resetValue>0x0000</resetValue>
  16932. <fields>
  16933. <field> <name>TI1S</name>
  16934. <description>TI1 selection</description>
  16935. <bitOffset>7</bitOffset>
  16936. <bitWidth>1</bitWidth>
  16937. </field>
  16938. <field> <name>MMS</name>
  16939. <description>Master mode selection</description>
  16940. <bitOffset>4</bitOffset>
  16941. <bitWidth>3</bitWidth>
  16942. </field>
  16943. <field> <name>CCDS</name>
  16944. <description>Capture/compare DMA
  16945. selection</description>
  16946. <bitOffset>3</bitOffset>
  16947. <bitWidth>1</bitWidth>
  16948. </field>
  16949. </fields>
  16950. </register>
  16951. <register> <name>SMCR</name>
  16952. <displayName>SMCR</displayName>
  16953. <description>slave mode control register</description>
  16954. <addressOffset>0x8</addressOffset>
  16955. <size>0x20</size>
  16956. <access>read-write</access>
  16957. <resetValue>0x0000</resetValue>
  16958. <fields>
  16959. <field> <name>ETP</name>
  16960. <description>External trigger polarity</description>
  16961. <bitOffset>15</bitOffset>
  16962. <bitWidth>1</bitWidth>
  16963. </field>
  16964. <field> <name>ECE</name>
  16965. <description>External clock enable</description>
  16966. <bitOffset>14</bitOffset>
  16967. <bitWidth>1</bitWidth>
  16968. </field>
  16969. <field> <name>ETPS</name>
  16970. <description>External trigger prescaler</description>
  16971. <bitOffset>12</bitOffset>
  16972. <bitWidth>2</bitWidth>
  16973. </field>
  16974. <field> <name>ETF</name>
  16975. <description>External trigger filter</description>
  16976. <bitOffset>8</bitOffset>
  16977. <bitWidth>4</bitWidth>
  16978. </field>
  16979. <field> <name>MSM</name>
  16980. <description>Master/Slave mode</description>
  16981. <bitOffset>7</bitOffset>
  16982. <bitWidth>1</bitWidth>
  16983. </field>
  16984. <field> <name>TS</name>
  16985. <description>Trigger selection</description>
  16986. <bitOffset>4</bitOffset>
  16987. <bitWidth>3</bitWidth>
  16988. </field>
  16989. <field> <name>SMS</name>
  16990. <description>Slave mode selection</description>
  16991. <bitOffset>0</bitOffset>
  16992. <bitWidth>3</bitWidth>
  16993. </field>
  16994. </fields>
  16995. </register>
  16996. <register> <name>DIER</name>
  16997. <displayName>DIER</displayName>
  16998. <description>DMA/Interrupt enable register</description>
  16999. <addressOffset>0xC</addressOffset>
  17000. <size>0x20</size>
  17001. <access>read-write</access>
  17002. <resetValue>0x0000</resetValue>
  17003. <fields>
  17004. <field> <name>TDE</name>
  17005. <description>Trigger DMA request enable</description>
  17006. <bitOffset>14</bitOffset>
  17007. <bitWidth>1</bitWidth>
  17008. </field>
  17009. <field> <name>CC4DE</name>
  17010. <description>Capture/Compare 4 DMA request
  17011. enable</description>
  17012. <bitOffset>12</bitOffset>
  17013. <bitWidth>1</bitWidth>
  17014. </field>
  17015. <field> <name>CC3DE</name>
  17016. <description>Capture/Compare 3 DMA request
  17017. enable</description>
  17018. <bitOffset>11</bitOffset>
  17019. <bitWidth>1</bitWidth>
  17020. </field>
  17021. <field> <name>CC2DE</name>
  17022. <description>Capture/Compare 2 DMA request
  17023. enable</description>
  17024. <bitOffset>10</bitOffset>
  17025. <bitWidth>1</bitWidth>
  17026. </field>
  17027. <field> <name>CC1DE</name>
  17028. <description>Capture/Compare 1 DMA request
  17029. enable</description>
  17030. <bitOffset>9</bitOffset>
  17031. <bitWidth>1</bitWidth>
  17032. </field>
  17033. <field> <name>UDE</name>
  17034. <description>Update DMA request enable</description>
  17035. <bitOffset>8</bitOffset>
  17036. <bitWidth>1</bitWidth>
  17037. </field>
  17038. <field> <name>TIE</name>
  17039. <description>Trigger interrupt enable</description>
  17040. <bitOffset>6</bitOffset>
  17041. <bitWidth>1</bitWidth>
  17042. </field>
  17043. <field> <name>CC4IE</name>
  17044. <description>Capture/Compare 4 interrupt
  17045. enable</description>
  17046. <bitOffset>4</bitOffset>
  17047. <bitWidth>1</bitWidth>
  17048. </field>
  17049. <field> <name>CC3IE</name>
  17050. <description>Capture/Compare 3 interrupt
  17051. enable</description>
  17052. <bitOffset>3</bitOffset>
  17053. <bitWidth>1</bitWidth>
  17054. </field>
  17055. <field> <name>CC2IE</name>
  17056. <description>Capture/Compare 2 interrupt
  17057. enable</description>
  17058. <bitOffset>2</bitOffset>
  17059. <bitWidth>1</bitWidth>
  17060. </field>
  17061. <field> <name>CC1IE</name>
  17062. <description>Capture/Compare 1 interrupt
  17063. enable</description>
  17064. <bitOffset>1</bitOffset>
  17065. <bitWidth>1</bitWidth>
  17066. </field>
  17067. <field> <name>UIE</name>
  17068. <description>Update interrupt enable</description>
  17069. <bitOffset>0</bitOffset>
  17070. <bitWidth>1</bitWidth>
  17071. </field>
  17072. </fields>
  17073. </register>
  17074. <register> <name>SR</name>
  17075. <displayName>SR</displayName>
  17076. <description>status register</description>
  17077. <addressOffset>0x10</addressOffset>
  17078. <size>0x20</size>
  17079. <access>read-write</access>
  17080. <resetValue>0x0000</resetValue>
  17081. <fields>
  17082. <field> <name>CC4OF</name>
  17083. <description>Capture/Compare 4 overcapture
  17084. flag</description>
  17085. <bitOffset>12</bitOffset>
  17086. <bitWidth>1</bitWidth>
  17087. </field>
  17088. <field> <name>CC3OF</name>
  17089. <description>Capture/Compare 3 overcapture
  17090. flag</description>
  17091. <bitOffset>11</bitOffset>
  17092. <bitWidth>1</bitWidth>
  17093. </field>
  17094. <field> <name>CC2OF</name>
  17095. <description>Capture/compare 2 overcapture
  17096. flag</description>
  17097. <bitOffset>10</bitOffset>
  17098. <bitWidth>1</bitWidth>
  17099. </field>
  17100. <field> <name>CC1OF</name>
  17101. <description>Capture/Compare 1 overcapture
  17102. flag</description>
  17103. <bitOffset>9</bitOffset>
  17104. <bitWidth>1</bitWidth>
  17105. </field>
  17106. <field> <name>TIF</name>
  17107. <description>Trigger interrupt flag</description>
  17108. <bitOffset>6</bitOffset>
  17109. <bitWidth>1</bitWidth>
  17110. </field>
  17111. <field> <name>CC4IF</name>
  17112. <description>Capture/Compare 4 interrupt
  17113. flag</description>
  17114. <bitOffset>4</bitOffset>
  17115. <bitWidth>1</bitWidth>
  17116. </field>
  17117. <field> <name>CC3IF</name>
  17118. <description>Capture/Compare 3 interrupt
  17119. flag</description>
  17120. <bitOffset>3</bitOffset>
  17121. <bitWidth>1</bitWidth>
  17122. </field>
  17123. <field> <name>CC2IF</name>
  17124. <description>Capture/Compare 2 interrupt
  17125. flag</description>
  17126. <bitOffset>2</bitOffset>
  17127. <bitWidth>1</bitWidth>
  17128. </field>
  17129. <field> <name>CC1IF</name>
  17130. <description>Capture/compare 1 interrupt
  17131. flag</description>
  17132. <bitOffset>1</bitOffset>
  17133. <bitWidth>1</bitWidth>
  17134. </field>
  17135. <field> <name>UIF</name>
  17136. <description>Update interrupt flag</description>
  17137. <bitOffset>0</bitOffset>
  17138. <bitWidth>1</bitWidth>
  17139. </field>
  17140. </fields>
  17141. </register>
  17142. <register> <name>EGR</name>
  17143. <displayName>EGR</displayName>
  17144. <description>event generation register</description>
  17145. <addressOffset>0x14</addressOffset>
  17146. <size>0x20</size>
  17147. <access>write-only</access>
  17148. <resetValue>0x0000</resetValue>
  17149. <fields>
  17150. <field> <name>TG</name>
  17151. <description>Trigger generation</description>
  17152. <bitOffset>6</bitOffset>
  17153. <bitWidth>1</bitWidth>
  17154. </field>
  17155. <field> <name>CC4G</name>
  17156. <description>Capture/compare 4
  17157. generation</description>
  17158. <bitOffset>4</bitOffset>
  17159. <bitWidth>1</bitWidth>
  17160. </field>
  17161. <field> <name>CC3G</name>
  17162. <description>Capture/compare 3
  17163. generation</description>
  17164. <bitOffset>3</bitOffset>
  17165. <bitWidth>1</bitWidth>
  17166. </field>
  17167. <field> <name>CC2G</name>
  17168. <description>Capture/compare 2
  17169. generation</description>
  17170. <bitOffset>2</bitOffset>
  17171. <bitWidth>1</bitWidth>
  17172. </field>
  17173. <field> <name>CC1G</name>
  17174. <description>Capture/compare 1
  17175. generation</description>
  17176. <bitOffset>1</bitOffset>
  17177. <bitWidth>1</bitWidth>
  17178. </field>
  17179. <field> <name>UG</name>
  17180. <description>Update generation</description>
  17181. <bitOffset>0</bitOffset>
  17182. <bitWidth>1</bitWidth>
  17183. </field>
  17184. </fields>
  17185. </register>
  17186. <register> <name>CCMR1_Output</name>
  17187. <displayName>CCMR1_Output</displayName>
  17188. <description>capture/compare mode register 1 (output
  17189. mode)</description>
  17190. <addressOffset>0x18</addressOffset>
  17191. <size>0x20</size>
  17192. <access>read-write</access>
  17193. <resetValue>0x00000000</resetValue>
  17194. <fields>
  17195. <field> <name>OC2CE</name>
  17196. <description>OC2CE</description>
  17197. <bitOffset>15</bitOffset>
  17198. <bitWidth>1</bitWidth>
  17199. </field>
  17200. <field> <name>OC2M</name>
  17201. <description>OC2M</description>
  17202. <bitOffset>12</bitOffset>
  17203. <bitWidth>3</bitWidth>
  17204. </field>
  17205. <field> <name>OC2PE</name>
  17206. <description>OC2PE</description>
  17207. <bitOffset>11</bitOffset>
  17208. <bitWidth>1</bitWidth>
  17209. </field>
  17210. <field> <name>OC2FE</name>
  17211. <description>OC2FE</description>
  17212. <bitOffset>10</bitOffset>
  17213. <bitWidth>1</bitWidth>
  17214. </field>
  17215. <field> <name>CC2S</name>
  17216. <description>CC2S</description>
  17217. <bitOffset>8</bitOffset>
  17218. <bitWidth>2</bitWidth>
  17219. </field>
  17220. <field> <name>OC1CE</name>
  17221. <description>OC1CE</description>
  17222. <bitOffset>7</bitOffset>
  17223. <bitWidth>1</bitWidth>
  17224. </field>
  17225. <field> <name>OC1M</name>
  17226. <description>OC1M</description>
  17227. <bitOffset>4</bitOffset>
  17228. <bitWidth>3</bitWidth>
  17229. </field>
  17230. <field> <name>OC1PE</name>
  17231. <description>OC1PE</description>
  17232. <bitOffset>3</bitOffset>
  17233. <bitWidth>1</bitWidth>
  17234. </field>
  17235. <field> <name>OC1FE</name>
  17236. <description>OC1FE</description>
  17237. <bitOffset>2</bitOffset>
  17238. <bitWidth>1</bitWidth>
  17239. </field>
  17240. <field> <name>CC1S</name>
  17241. <description>CC1S</description>
  17242. <bitOffset>0</bitOffset>
  17243. <bitWidth>2</bitWidth>
  17244. </field>
  17245. </fields>
  17246. </register>
  17247. <register> <name>CCMR1_Input</name>
  17248. <displayName>CCMR1_Input</displayName>
  17249. <description>capture/compare mode register 1 (input
  17250. mode)</description>
  17251. <alternateRegister>CCMR1_Output</alternateRegister>
  17252. <addressOffset>0x18</addressOffset>
  17253. <size>0x20</size>
  17254. <access>read-write</access>
  17255. <resetValue>0x00000000</resetValue>
  17256. <fields>
  17257. <field> <name>IC2F</name>
  17258. <description>Input capture 2 filter</description>
  17259. <bitOffset>12</bitOffset>
  17260. <bitWidth>4</bitWidth>
  17261. </field>
  17262. <field> <name>IC2PSC</name>
  17263. <description>Input capture 2 prescaler</description>
  17264. <bitOffset>10</bitOffset>
  17265. <bitWidth>2</bitWidth>
  17266. </field>
  17267. <field> <name>CC2S</name>
  17268. <description>Capture/Compare 2
  17269. selection</description>
  17270. <bitOffset>8</bitOffset>
  17271. <bitWidth>2</bitWidth>
  17272. </field>
  17273. <field> <name>IC1F</name>
  17274. <description>Input capture 1 filter</description>
  17275. <bitOffset>4</bitOffset>
  17276. <bitWidth>4</bitWidth>
  17277. </field>
  17278. <field> <name>IC1PSC</name>
  17279. <description>Input capture 1 prescaler</description>
  17280. <bitOffset>2</bitOffset>
  17281. <bitWidth>2</bitWidth>
  17282. </field>
  17283. <field> <name>CC1S</name>
  17284. <description>Capture/Compare 1
  17285. selection</description>
  17286. <bitOffset>0</bitOffset>
  17287. <bitWidth>2</bitWidth>
  17288. </field>
  17289. </fields>
  17290. </register>
  17291. <register> <name>CCMR2_Output</name>
  17292. <displayName>CCMR2_Output</displayName>
  17293. <description>capture/compare mode register 2 (output
  17294. mode)</description>
  17295. <addressOffset>0x1C</addressOffset>
  17296. <size>0x20</size>
  17297. <access>read-write</access>
  17298. <resetValue>0x00000000</resetValue>
  17299. <fields>
  17300. <field> <name>OC4CE</name>
  17301. <description>OC4CE</description>
  17302. <bitOffset>15</bitOffset>
  17303. <bitWidth>1</bitWidth>
  17304. </field>
  17305. <field> <name>OC4M</name>
  17306. <description>OC4M</description>
  17307. <bitOffset>12</bitOffset>
  17308. <bitWidth>3</bitWidth>
  17309. </field>
  17310. <field> <name>OC4PE</name>
  17311. <description>OC4PE</description>
  17312. <bitOffset>11</bitOffset>
  17313. <bitWidth>1</bitWidth>
  17314. </field>
  17315. <field> <name>OC4FE</name>
  17316. <description>OC4FE</description>
  17317. <bitOffset>10</bitOffset>
  17318. <bitWidth>1</bitWidth>
  17319. </field>
  17320. <field> <name>CC4S</name>
  17321. <description>CC4S</description>
  17322. <bitOffset>8</bitOffset>
  17323. <bitWidth>2</bitWidth>
  17324. </field>
  17325. <field> <name>OC3CE</name>
  17326. <description>OC3CE</description>
  17327. <bitOffset>7</bitOffset>
  17328. <bitWidth>1</bitWidth>
  17329. </field>
  17330. <field> <name>OC3M</name>
  17331. <description>OC3M</description>
  17332. <bitOffset>4</bitOffset>
  17333. <bitWidth>3</bitWidth>
  17334. </field>
  17335. <field> <name>OC3PE</name>
  17336. <description>OC3PE</description>
  17337. <bitOffset>3</bitOffset>
  17338. <bitWidth>1</bitWidth>
  17339. </field>
  17340. <field> <name>OC3FE</name>
  17341. <description>OC3FE</description>
  17342. <bitOffset>2</bitOffset>
  17343. <bitWidth>1</bitWidth>
  17344. </field>
  17345. <field> <name>CC3S</name>
  17346. <description>CC3S</description>
  17347. <bitOffset>0</bitOffset>
  17348. <bitWidth>2</bitWidth>
  17349. </field>
  17350. </fields>
  17351. </register>
  17352. <register> <name>CCMR2_Input</name>
  17353. <displayName>CCMR2_Input</displayName>
  17354. <description>capture/compare mode register 2 (input
  17355. mode)</description>
  17356. <alternateRegister>CCMR2_Output</alternateRegister>
  17357. <addressOffset>0x1C</addressOffset>
  17358. <size>0x20</size>
  17359. <access>read-write</access>
  17360. <resetValue>0x00000000</resetValue>
  17361. <fields>
  17362. <field> <name>IC4F</name>
  17363. <description>Input capture 4 filter</description>
  17364. <bitOffset>12</bitOffset>
  17365. <bitWidth>4</bitWidth>
  17366. </field>
  17367. <field> <name>IC4PSC</name>
  17368. <description>Input capture 4 prescaler</description>
  17369. <bitOffset>10</bitOffset>
  17370. <bitWidth>2</bitWidth>
  17371. </field>
  17372. <field> <name>CC4S</name>
  17373. <description>Capture/Compare 4
  17374. selection</description>
  17375. <bitOffset>8</bitOffset>
  17376. <bitWidth>2</bitWidth>
  17377. </field>
  17378. <field> <name>IC3F</name>
  17379. <description>Input capture 3 filter</description>
  17380. <bitOffset>4</bitOffset>
  17381. <bitWidth>4</bitWidth>
  17382. </field>
  17383. <field> <name>IC3PSC</name>
  17384. <description>Input capture 3 prescaler</description>
  17385. <bitOffset>2</bitOffset>
  17386. <bitWidth>2</bitWidth>
  17387. </field>
  17388. <field> <name>CC3S</name>
  17389. <description>Capture/compare 3
  17390. selection</description>
  17391. <bitOffset>0</bitOffset>
  17392. <bitWidth>2</bitWidth>
  17393. </field>
  17394. </fields>
  17395. </register>
  17396. <register> <name>CCER</name>
  17397. <displayName>CCER</displayName>
  17398. <description>capture/compare enable
  17399. register</description>
  17400. <addressOffset>0x20</addressOffset>
  17401. <size>0x20</size>
  17402. <access>read-write</access>
  17403. <resetValue>0x0000</resetValue>
  17404. <fields>
  17405. <field> <name>CC4NP</name>
  17406. <description>Capture/Compare 4 output
  17407. Polarity</description>
  17408. <bitOffset>15</bitOffset>
  17409. <bitWidth>1</bitWidth>
  17410. </field>
  17411. <field> <name>CC4P</name>
  17412. <description>Capture/Compare 3 output
  17413. Polarity</description>
  17414. <bitOffset>13</bitOffset>
  17415. <bitWidth>1</bitWidth>
  17416. </field>
  17417. <field> <name>CC4E</name>
  17418. <description>Capture/Compare 4 output
  17419. enable</description>
  17420. <bitOffset>12</bitOffset>
  17421. <bitWidth>1</bitWidth>
  17422. </field>
  17423. <field> <name>CC3NP</name>
  17424. <description>Capture/Compare 3 output
  17425. Polarity</description>
  17426. <bitOffset>11</bitOffset>
  17427. <bitWidth>1</bitWidth>
  17428. </field>
  17429. <field> <name>CC3P</name>
  17430. <description>Capture/Compare 3 output
  17431. Polarity</description>
  17432. <bitOffset>9</bitOffset>
  17433. <bitWidth>1</bitWidth>
  17434. </field>
  17435. <field> <name>CC3E</name>
  17436. <description>Capture/Compare 3 output
  17437. enable</description>
  17438. <bitOffset>8</bitOffset>
  17439. <bitWidth>1</bitWidth>
  17440. </field>
  17441. <field> <name>CC2NP</name>
  17442. <description>Capture/Compare 2 output
  17443. Polarity</description>
  17444. <bitOffset>7</bitOffset>
  17445. <bitWidth>1</bitWidth>
  17446. </field>
  17447. <field> <name>CC2P</name>
  17448. <description>Capture/Compare 2 output
  17449. Polarity</description>
  17450. <bitOffset>5</bitOffset>
  17451. <bitWidth>1</bitWidth>
  17452. </field>
  17453. <field> <name>CC2E</name>
  17454. <description>Capture/Compare 2 output
  17455. enable</description>
  17456. <bitOffset>4</bitOffset>
  17457. <bitWidth>1</bitWidth>
  17458. </field>
  17459. <field> <name>CC1NP</name>
  17460. <description>Capture/Compare 1 output
  17461. Polarity</description>
  17462. <bitOffset>3</bitOffset>
  17463. <bitWidth>1</bitWidth>
  17464. </field>
  17465. <field> <name>CC1P</name>
  17466. <description>Capture/Compare 1 output
  17467. Polarity</description>
  17468. <bitOffset>1</bitOffset>
  17469. <bitWidth>1</bitWidth>
  17470. </field>
  17471. <field> <name>CC1E</name>
  17472. <description>Capture/Compare 1 output
  17473. enable</description>
  17474. <bitOffset>0</bitOffset>
  17475. <bitWidth>1</bitWidth>
  17476. </field>
  17477. </fields>
  17478. </register>
  17479. <register> <name>CNT</name>
  17480. <displayName>CNT</displayName>
  17481. <description>counter</description>
  17482. <addressOffset>0x24</addressOffset>
  17483. <size>0x20</size>
  17484. <access>read-write</access>
  17485. <resetValue>0x00000000</resetValue>
  17486. <fields>
  17487. <field> <name>CNT_H</name>
  17488. <description>High counter value</description>
  17489. <bitOffset>16</bitOffset>
  17490. <bitWidth>16</bitWidth>
  17491. </field>
  17492. <field> <name>CNT_L</name>
  17493. <description>Low counter value</description>
  17494. <bitOffset>0</bitOffset>
  17495. <bitWidth>16</bitWidth>
  17496. </field>
  17497. </fields>
  17498. </register>
  17499. <register> <name>PSC</name>
  17500. <displayName>PSC</displayName>
  17501. <description>prescaler</description>
  17502. <addressOffset>0x28</addressOffset>
  17503. <size>0x20</size>
  17504. <access>read-write</access>
  17505. <resetValue>0x0000</resetValue>
  17506. <fields>
  17507. <field> <name>PSC</name>
  17508. <description>Prescaler value</description>
  17509. <bitOffset>0</bitOffset>
  17510. <bitWidth>16</bitWidth>
  17511. </field>
  17512. </fields>
  17513. </register>
  17514. <register> <name>ARR</name>
  17515. <displayName>ARR</displayName>
  17516. <description>auto-reload register</description>
  17517. <addressOffset>0x2C</addressOffset>
  17518. <size>0x20</size>
  17519. <access>read-write</access>
  17520. <resetValue>0x00000000</resetValue>
  17521. <fields>
  17522. <field> <name>ARR_H</name>
  17523. <description>High Auto-reload value</description>
  17524. <bitOffset>16</bitOffset>
  17525. <bitWidth>16</bitWidth>
  17526. </field>
  17527. <field> <name>ARR_L</name>
  17528. <description>Low Auto-reload value</description>
  17529. <bitOffset>0</bitOffset>
  17530. <bitWidth>16</bitWidth>
  17531. </field>
  17532. </fields>
  17533. </register>
  17534. <register> <name>CCR1</name>
  17535. <displayName>CCR1</displayName>
  17536. <description>capture/compare register 1</description>
  17537. <addressOffset>0x34</addressOffset>
  17538. <size>0x20</size>
  17539. <access>read-write</access>
  17540. <resetValue>0x00000000</resetValue>
  17541. <fields>
  17542. <field> <name>CCR1_H</name>
  17543. <description>High Capture/Compare 1
  17544. value</description>
  17545. <bitOffset>16</bitOffset>
  17546. <bitWidth>16</bitWidth>
  17547. </field>
  17548. <field> <name>CCR1_L</name>
  17549. <description>Low Capture/Compare 1
  17550. value</description>
  17551. <bitOffset>0</bitOffset>
  17552. <bitWidth>16</bitWidth>
  17553. </field>
  17554. </fields>
  17555. </register>
  17556. <register> <name>CCR2</name>
  17557. <displayName>CCR2</displayName>
  17558. <description>capture/compare register 2</description>
  17559. <addressOffset>0x38</addressOffset>
  17560. <size>0x20</size>
  17561. <access>read-write</access>
  17562. <resetValue>0x00000000</resetValue>
  17563. <fields>
  17564. <field> <name>CCR2_H</name>
  17565. <description>High Capture/Compare 2
  17566. value</description>
  17567. <bitOffset>16</bitOffset>
  17568. <bitWidth>16</bitWidth>
  17569. </field>
  17570. <field> <name>CCR2_L</name>
  17571. <description>Low Capture/Compare 2
  17572. value</description>
  17573. <bitOffset>0</bitOffset>
  17574. <bitWidth>16</bitWidth>
  17575. </field>
  17576. </fields>
  17577. </register>
  17578. <register> <name>CCR3</name>
  17579. <displayName>CCR3</displayName>
  17580. <description>capture/compare register 3</description>
  17581. <addressOffset>0x3C</addressOffset>
  17582. <size>0x20</size>
  17583. <access>read-write</access>
  17584. <resetValue>0x00000000</resetValue>
  17585. <fields>
  17586. <field> <name>CCR3_H</name>
  17587. <description>High Capture/Compare value</description>
  17588. <bitOffset>16</bitOffset>
  17589. <bitWidth>16</bitWidth>
  17590. </field>
  17591. <field> <name>CCR3_L</name>
  17592. <description>Low Capture/Compare value</description>
  17593. <bitOffset>0</bitOffset>
  17594. <bitWidth>16</bitWidth>
  17595. </field>
  17596. </fields>
  17597. </register>
  17598. <register> <name>CCR4</name>
  17599. <displayName>CCR4</displayName>
  17600. <description>capture/compare register 4</description>
  17601. <addressOffset>0x40</addressOffset>
  17602. <size>0x20</size>
  17603. <access>read-write</access>
  17604. <resetValue>0x00000000</resetValue>
  17605. <fields>
  17606. <field> <name>CCR4_H</name>
  17607. <description>High Capture/Compare value</description>
  17608. <bitOffset>16</bitOffset>
  17609. <bitWidth>16</bitWidth>
  17610. </field>
  17611. <field> <name>CCR4_L</name>
  17612. <description>Low Capture/Compare value</description>
  17613. <bitOffset>0</bitOffset>
  17614. <bitWidth>16</bitWidth>
  17615. </field>
  17616. </fields>
  17617. </register>
  17618. <register> <name>DCR</name>
  17619. <displayName>DCR</displayName>
  17620. <description>DMA control register</description>
  17621. <addressOffset>0x48</addressOffset>
  17622. <size>0x20</size>
  17623. <access>read-write</access>
  17624. <resetValue>0x0000</resetValue>
  17625. <fields>
  17626. <field> <name>DBL</name>
  17627. <description>DMA burst length</description>
  17628. <bitOffset>8</bitOffset>
  17629. <bitWidth>5</bitWidth>
  17630. </field>
  17631. <field> <name>DBA</name>
  17632. <description>DMA base address</description>
  17633. <bitOffset>0</bitOffset>
  17634. <bitWidth>5</bitWidth>
  17635. </field>
  17636. </fields>
  17637. </register>
  17638. <register> <name>DMAR</name>
  17639. <displayName>DMAR</displayName>
  17640. <description>DMA address for full transfer</description>
  17641. <addressOffset>0x4C</addressOffset>
  17642. <size>0x20</size>
  17643. <access>read-write</access>
  17644. <resetValue>0x0000</resetValue>
  17645. <fields>
  17646. <field> <name>DMAB</name>
  17647. <description>DMA register for burst
  17648. accesses</description>
  17649. <bitOffset>0</bitOffset>
  17650. <bitWidth>16</bitWidth>
  17651. </field>
  17652. </fields>
  17653. </register>
  17654. <register> <name>OR</name>
  17655. <displayName>OR</displayName>
  17656. <description>TIM5 option register</description>
  17657. <addressOffset>0x50</addressOffset>
  17658. <size>0x20</size>
  17659. <access>read-write</access>
  17660. <resetValue>0x0000</resetValue>
  17661. <fields>
  17662. <field> <name>IT4_RMP</name>
  17663. <description>Timer Input 4 remap</description>
  17664. <bitOffset>6</bitOffset>
  17665. <bitWidth>2</bitWidth>
  17666. </field>
  17667. </fields>
  17668. </register>
  17669. </registers>
  17670. </peripheral>
  17671. <peripheral> <name>TIM9</name>
  17672. <description>General purpose timers</description>
  17673. <groupName>TIM</groupName>
  17674. <baseAddress>0x40014000</baseAddress>
  17675. <addressBlock>
  17676. <offset>0x0</offset>
  17677. <size>0x400</size>
  17678. <usage>registers</usage>
  17679. </addressBlock>
  17680. <interrupt>
  17681. <name>TIM1_BRK_TIM9</name>
  17682. <description>TIM1 Break interrupt and TIM9 global
  17683. interrupt</description>
  17684. <value>24</value>
  17685. </interrupt>
  17686. <registers>
  17687. <register> <name>CR1</name>
  17688. <displayName>CR1</displayName>
  17689. <description>control register 1</description>
  17690. <addressOffset>0x0</addressOffset>
  17691. <size>0x20</size>
  17692. <access>read-write</access>
  17693. <resetValue>0x0000</resetValue>
  17694. <fields>
  17695. <field> <name>CKD</name>
  17696. <description>Clock division</description>
  17697. <bitOffset>8</bitOffset>
  17698. <bitWidth>2</bitWidth>
  17699. </field>
  17700. <field> <name>ARPE</name>
  17701. <description>Auto-reload preload enable</description>
  17702. <bitOffset>7</bitOffset>
  17703. <bitWidth>1</bitWidth>
  17704. </field>
  17705. <field> <name>OPM</name>
  17706. <description>One-pulse mode</description>
  17707. <bitOffset>3</bitOffset>
  17708. <bitWidth>1</bitWidth>
  17709. </field>
  17710. <field> <name>URS</name>
  17711. <description>Update request source</description>
  17712. <bitOffset>2</bitOffset>
  17713. <bitWidth>1</bitWidth>
  17714. </field>
  17715. <field> <name>UDIS</name>
  17716. <description>Update disable</description>
  17717. <bitOffset>1</bitOffset>
  17718. <bitWidth>1</bitWidth>
  17719. </field>
  17720. <field> <name>CEN</name>
  17721. <description>Counter enable</description>
  17722. <bitOffset>0</bitOffset>
  17723. <bitWidth>1</bitWidth>
  17724. </field>
  17725. </fields>
  17726. </register>
  17727. <register> <name>CR2</name>
  17728. <displayName>CR2</displayName>
  17729. <description>control register 2</description>
  17730. <addressOffset>0x4</addressOffset>
  17731. <size>0x20</size>
  17732. <access>read-write</access>
  17733. <resetValue>0x0000</resetValue>
  17734. <fields>
  17735. <field> <name>MMS</name>
  17736. <description>Master mode selection</description>
  17737. <bitOffset>4</bitOffset>
  17738. <bitWidth>3</bitWidth>
  17739. </field>
  17740. </fields>
  17741. </register>
  17742. <register> <name>SMCR</name>
  17743. <displayName>SMCR</displayName>
  17744. <description>slave mode control register</description>
  17745. <addressOffset>0x8</addressOffset>
  17746. <size>0x20</size>
  17747. <access>read-write</access>
  17748. <resetValue>0x0000</resetValue>
  17749. <fields>
  17750. <field> <name>MSM</name>
  17751. <description>Master/Slave mode</description>
  17752. <bitOffset>7</bitOffset>
  17753. <bitWidth>1</bitWidth>
  17754. </field>
  17755. <field> <name>TS</name>
  17756. <description>Trigger selection</description>
  17757. <bitOffset>4</bitOffset>
  17758. <bitWidth>3</bitWidth>
  17759. </field>
  17760. <field> <name>SMS</name>
  17761. <description>Slave mode selection</description>
  17762. <bitOffset>0</bitOffset>
  17763. <bitWidth>3</bitWidth>
  17764. </field>
  17765. </fields>
  17766. </register>
  17767. <register> <name>DIER</name>
  17768. <displayName>DIER</displayName>
  17769. <description>DMA/Interrupt enable register</description>
  17770. <addressOffset>0xC</addressOffset>
  17771. <size>0x20</size>
  17772. <access>read-write</access>
  17773. <resetValue>0x0000</resetValue>
  17774. <fields>
  17775. <field> <name>TIE</name>
  17776. <description>Trigger interrupt enable</description>
  17777. <bitOffset>6</bitOffset>
  17778. <bitWidth>1</bitWidth>
  17779. </field>
  17780. <field> <name>CC2IE</name>
  17781. <description>Capture/Compare 2 interrupt
  17782. enable</description>
  17783. <bitOffset>2</bitOffset>
  17784. <bitWidth>1</bitWidth>
  17785. </field>
  17786. <field> <name>CC1IE</name>
  17787. <description>Capture/Compare 1 interrupt
  17788. enable</description>
  17789. <bitOffset>1</bitOffset>
  17790. <bitWidth>1</bitWidth>
  17791. </field>
  17792. <field> <name>UIE</name>
  17793. <description>Update interrupt enable</description>
  17794. <bitOffset>0</bitOffset>
  17795. <bitWidth>1</bitWidth>
  17796. </field>
  17797. </fields>
  17798. </register>
  17799. <register> <name>SR</name>
  17800. <displayName>SR</displayName>
  17801. <description>status register</description>
  17802. <addressOffset>0x10</addressOffset>
  17803. <size>0x20</size>
  17804. <access>read-write</access>
  17805. <resetValue>0x0000</resetValue>
  17806. <fields>
  17807. <field> <name>CC2OF</name>
  17808. <description>Capture/compare 2 overcapture
  17809. flag</description>
  17810. <bitOffset>10</bitOffset>
  17811. <bitWidth>1</bitWidth>
  17812. </field>
  17813. <field> <name>CC1OF</name>
  17814. <description>Capture/Compare 1 overcapture
  17815. flag</description>
  17816. <bitOffset>9</bitOffset>
  17817. <bitWidth>1</bitWidth>
  17818. </field>
  17819. <field> <name>TIF</name>
  17820. <description>Trigger interrupt flag</description>
  17821. <bitOffset>6</bitOffset>
  17822. <bitWidth>1</bitWidth>
  17823. </field>
  17824. <field> <name>CC2IF</name>
  17825. <description>Capture/Compare 2 interrupt
  17826. flag</description>
  17827. <bitOffset>2</bitOffset>
  17828. <bitWidth>1</bitWidth>
  17829. </field>
  17830. <field> <name>CC1IF</name>
  17831. <description>Capture/compare 1 interrupt
  17832. flag</description>
  17833. <bitOffset>1</bitOffset>
  17834. <bitWidth>1</bitWidth>
  17835. </field>
  17836. <field> <name>UIF</name>
  17837. <description>Update interrupt flag</description>
  17838. <bitOffset>0</bitOffset>
  17839. <bitWidth>1</bitWidth>
  17840. </field>
  17841. </fields>
  17842. </register>
  17843. <register> <name>EGR</name>
  17844. <displayName>EGR</displayName>
  17845. <description>event generation register</description>
  17846. <addressOffset>0x14</addressOffset>
  17847. <size>0x20</size>
  17848. <access>write-only</access>
  17849. <resetValue>0x0000</resetValue>
  17850. <fields>
  17851. <field> <name>TG</name>
  17852. <description>Trigger generation</description>
  17853. <bitOffset>6</bitOffset>
  17854. <bitWidth>1</bitWidth>
  17855. </field>
  17856. <field> <name>CC2G</name>
  17857. <description>Capture/compare 2
  17858. generation</description>
  17859. <bitOffset>2</bitOffset>
  17860. <bitWidth>1</bitWidth>
  17861. </field>
  17862. <field> <name>CC1G</name>
  17863. <description>Capture/compare 1
  17864. generation</description>
  17865. <bitOffset>1</bitOffset>
  17866. <bitWidth>1</bitWidth>
  17867. </field>
  17868. <field> <name>UG</name>
  17869. <description>Update generation</description>
  17870. <bitOffset>0</bitOffset>
  17871. <bitWidth>1</bitWidth>
  17872. </field>
  17873. </fields>
  17874. </register>
  17875. <register> <name>CCMR1_Output</name>
  17876. <displayName>CCMR1_Output</displayName>
  17877. <description>capture/compare mode register 1 (output
  17878. mode)</description>
  17879. <addressOffset>0x18</addressOffset>
  17880. <size>0x20</size>
  17881. <access>read-write</access>
  17882. <resetValue>0x00000000</resetValue>
  17883. <fields>
  17884. <field> <name>OC2M</name>
  17885. <description>Output Compare 2 mode</description>
  17886. <bitOffset>12</bitOffset>
  17887. <bitWidth>3</bitWidth>
  17888. </field>
  17889. <field> <name>OC2PE</name>
  17890. <description>Output Compare 2 preload
  17891. enable</description>
  17892. <bitOffset>11</bitOffset>
  17893. <bitWidth>1</bitWidth>
  17894. </field>
  17895. <field> <name>OC2FE</name>
  17896. <description>Output Compare 2 fast
  17897. enable</description>
  17898. <bitOffset>10</bitOffset>
  17899. <bitWidth>1</bitWidth>
  17900. </field>
  17901. <field> <name>CC2S</name>
  17902. <description>Capture/Compare 2
  17903. selection</description>
  17904. <bitOffset>8</bitOffset>
  17905. <bitWidth>2</bitWidth>
  17906. </field>
  17907. <field> <name>OC1M</name>
  17908. <description>Output Compare 1 mode</description>
  17909. <bitOffset>4</bitOffset>
  17910. <bitWidth>3</bitWidth>
  17911. </field>
  17912. <field> <name>OC1PE</name>
  17913. <description>Output Compare 1 preload
  17914. enable</description>
  17915. <bitOffset>3</bitOffset>
  17916. <bitWidth>1</bitWidth>
  17917. </field>
  17918. <field> <name>OC1FE</name>
  17919. <description>Output Compare 1 fast
  17920. enable</description>
  17921. <bitOffset>2</bitOffset>
  17922. <bitWidth>1</bitWidth>
  17923. </field>
  17924. <field> <name>CC1S</name>
  17925. <description>Capture/Compare 1
  17926. selection</description>
  17927. <bitOffset>0</bitOffset>
  17928. <bitWidth>2</bitWidth>
  17929. </field>
  17930. </fields>
  17931. </register>
  17932. <register> <name>CCMR1_Input</name>
  17933. <displayName>CCMR1_Input</displayName>
  17934. <description>capture/compare mode register 1 (input
  17935. mode)</description>
  17936. <alternateRegister>CCMR1_Output</alternateRegister>
  17937. <addressOffset>0x18</addressOffset>
  17938. <size>0x20</size>
  17939. <access>read-write</access>
  17940. <resetValue>0x00000000</resetValue>
  17941. <fields>
  17942. <field> <name>IC2F</name>
  17943. <description>Input capture 2 filter</description>
  17944. <bitOffset>12</bitOffset>
  17945. <bitWidth>3</bitWidth>
  17946. </field>
  17947. <field> <name>IC2PSC</name>
  17948. <description>Input capture 2 prescaler</description>
  17949. <bitOffset>10</bitOffset>
  17950. <bitWidth>2</bitWidth>
  17951. </field>
  17952. <field> <name>CC2S</name>
  17953. <description>Capture/Compare 2
  17954. selection</description>
  17955. <bitOffset>8</bitOffset>
  17956. <bitWidth>2</bitWidth>
  17957. </field>
  17958. <field> <name>IC1F</name>
  17959. <description>Input capture 1 filter</description>
  17960. <bitOffset>4</bitOffset>
  17961. <bitWidth>3</bitWidth>
  17962. </field>
  17963. <field> <name>IC1PSC</name>
  17964. <description>Input capture 1 prescaler</description>
  17965. <bitOffset>2</bitOffset>
  17966. <bitWidth>2</bitWidth>
  17967. </field>
  17968. <field> <name>CC1S</name>
  17969. <description>Capture/Compare 1
  17970. selection</description>
  17971. <bitOffset>0</bitOffset>
  17972. <bitWidth>2</bitWidth>
  17973. </field>
  17974. </fields>
  17975. </register>
  17976. <register> <name>CCER</name>
  17977. <displayName>CCER</displayName>
  17978. <description>capture/compare enable
  17979. register</description>
  17980. <addressOffset>0x20</addressOffset>
  17981. <size>0x20</size>
  17982. <access>read-write</access>
  17983. <resetValue>0x0000</resetValue>
  17984. <fields>
  17985. <field> <name>CC2NP</name>
  17986. <description>Capture/Compare 2 output
  17987. Polarity</description>
  17988. <bitOffset>7</bitOffset>
  17989. <bitWidth>1</bitWidth>
  17990. </field>
  17991. <field> <name>CC2P</name>
  17992. <description>Capture/Compare 2 output
  17993. Polarity</description>
  17994. <bitOffset>5</bitOffset>
  17995. <bitWidth>1</bitWidth>
  17996. </field>
  17997. <field> <name>CC2E</name>
  17998. <description>Capture/Compare 2 output
  17999. enable</description>
  18000. <bitOffset>4</bitOffset>
  18001. <bitWidth>1</bitWidth>
  18002. </field>
  18003. <field> <name>CC1NP</name>
  18004. <description>Capture/Compare 1 output
  18005. Polarity</description>
  18006. <bitOffset>3</bitOffset>
  18007. <bitWidth>1</bitWidth>
  18008. </field>
  18009. <field> <name>CC1P</name>
  18010. <description>Capture/Compare 1 output
  18011. Polarity</description>
  18012. <bitOffset>1</bitOffset>
  18013. <bitWidth>1</bitWidth>
  18014. </field>
  18015. <field> <name>CC1E</name>
  18016. <description>Capture/Compare 1 output
  18017. enable</description>
  18018. <bitOffset>0</bitOffset>
  18019. <bitWidth>1</bitWidth>
  18020. </field>
  18021. </fields>
  18022. </register>
  18023. <register> <name>CNT</name>
  18024. <displayName>CNT</displayName>
  18025. <description>counter</description>
  18026. <addressOffset>0x24</addressOffset>
  18027. <size>0x20</size>
  18028. <access>read-write</access>
  18029. <resetValue>0x00000000</resetValue>
  18030. <fields>
  18031. <field> <name>CNT</name>
  18032. <description>counter value</description>
  18033. <bitOffset>0</bitOffset>
  18034. <bitWidth>16</bitWidth>
  18035. </field>
  18036. </fields>
  18037. </register>
  18038. <register> <name>PSC</name>
  18039. <displayName>PSC</displayName>
  18040. <description>prescaler</description>
  18041. <addressOffset>0x28</addressOffset>
  18042. <size>0x20</size>
  18043. <access>read-write</access>
  18044. <resetValue>0x0000</resetValue>
  18045. <fields>
  18046. <field> <name>PSC</name>
  18047. <description>Prescaler value</description>
  18048. <bitOffset>0</bitOffset>
  18049. <bitWidth>16</bitWidth>
  18050. </field>
  18051. </fields>
  18052. </register>
  18053. <register> <name>ARR</name>
  18054. <displayName>ARR</displayName>
  18055. <description>auto-reload register</description>
  18056. <addressOffset>0x2C</addressOffset>
  18057. <size>0x20</size>
  18058. <access>read-write</access>
  18059. <resetValue>0x00000000</resetValue>
  18060. <fields>
  18061. <field> <name>ARR</name>
  18062. <description>Auto-reload value</description>
  18063. <bitOffset>0</bitOffset>
  18064. <bitWidth>16</bitWidth>
  18065. </field>
  18066. </fields>
  18067. </register>
  18068. <register> <name>CCR1</name>
  18069. <displayName>CCR1</displayName>
  18070. <description>capture/compare register 1</description>
  18071. <addressOffset>0x34</addressOffset>
  18072. <size>0x20</size>
  18073. <access>read-write</access>
  18074. <resetValue>0x00000000</resetValue>
  18075. <fields>
  18076. <field> <name>CCR1</name>
  18077. <description>Capture/Compare 1 value</description>
  18078. <bitOffset>0</bitOffset>
  18079. <bitWidth>16</bitWidth>
  18080. </field>
  18081. </fields>
  18082. </register>
  18083. <register> <name>CCR2</name>
  18084. <displayName>CCR2</displayName>
  18085. <description>capture/compare register 2</description>
  18086. <addressOffset>0x38</addressOffset>
  18087. <size>0x20</size>
  18088. <access>read-write</access>
  18089. <resetValue>0x00000000</resetValue>
  18090. <fields>
  18091. <field> <name>CCR2</name>
  18092. <description>Capture/Compare 2 value</description>
  18093. <bitOffset>0</bitOffset>
  18094. <bitWidth>16</bitWidth>
  18095. </field>
  18096. </fields>
  18097. </register>
  18098. </registers>
  18099. </peripheral>
  18100. <peripheral derivedFrom="TIM9"> <name>TIM12</name>
  18101. <baseAddress>0x40001800</baseAddress>
  18102. <interrupt>
  18103. <name>TIM8_BRK_TIM12</name>
  18104. <description>TIM8 Break interrupt and TIM12 global
  18105. interrupt</description>
  18106. <value>43</value>
  18107. </interrupt>
  18108. </peripheral>
  18109. <peripheral> <name>TIM10</name>
  18110. <description>General-purpose-timers</description>
  18111. <groupName>TIM</groupName>
  18112. <baseAddress>0x40014400</baseAddress>
  18113. <addressBlock>
  18114. <offset>0x0</offset>
  18115. <size>0x400</size>
  18116. <usage>registers</usage>
  18117. </addressBlock>
  18118. <interrupt>
  18119. <name>TIM1_UP_TIM10</name>
  18120. <description>TIM1 Update interrupt and TIM10 global
  18121. interrupt</description>
  18122. <value>25</value>
  18123. </interrupt>
  18124. <registers>
  18125. <register> <name>CR1</name>
  18126. <displayName>CR1</displayName>
  18127. <description>control register 1</description>
  18128. <addressOffset>0x0</addressOffset>
  18129. <size>0x20</size>
  18130. <access>read-write</access>
  18131. <resetValue>0x0000</resetValue>
  18132. <fields>
  18133. <field> <name>CKD</name>
  18134. <description>Clock division</description>
  18135. <bitOffset>8</bitOffset>
  18136. <bitWidth>2</bitWidth>
  18137. </field>
  18138. <field> <name>ARPE</name>
  18139. <description>Auto-reload preload enable</description>
  18140. <bitOffset>7</bitOffset>
  18141. <bitWidth>1</bitWidth>
  18142. </field>
  18143. <field> <name>URS</name>
  18144. <description>Update request source</description>
  18145. <bitOffset>2</bitOffset>
  18146. <bitWidth>1</bitWidth>
  18147. </field>
  18148. <field> <name>UDIS</name>
  18149. <description>Update disable</description>
  18150. <bitOffset>1</bitOffset>
  18151. <bitWidth>1</bitWidth>
  18152. </field>
  18153. <field> <name>CEN</name>
  18154. <description>Counter enable</description>
  18155. <bitOffset>0</bitOffset>
  18156. <bitWidth>1</bitWidth>
  18157. </field>
  18158. </fields>
  18159. </register>
  18160. <register> <name>DIER</name>
  18161. <displayName>DIER</displayName>
  18162. <description>DMA/Interrupt enable register</description>
  18163. <addressOffset>0xC</addressOffset>
  18164. <size>0x20</size>
  18165. <access>read-write</access>
  18166. <resetValue>0x0000</resetValue>
  18167. <fields>
  18168. <field> <name>CC1IE</name>
  18169. <description>Capture/Compare 1 interrupt
  18170. enable</description>
  18171. <bitOffset>1</bitOffset>
  18172. <bitWidth>1</bitWidth>
  18173. </field>
  18174. <field> <name>UIE</name>
  18175. <description>Update interrupt enable</description>
  18176. <bitOffset>0</bitOffset>
  18177. <bitWidth>1</bitWidth>
  18178. </field>
  18179. </fields>
  18180. </register>
  18181. <register> <name>SR</name>
  18182. <displayName>SR</displayName>
  18183. <description>status register</description>
  18184. <addressOffset>0x10</addressOffset>
  18185. <size>0x20</size>
  18186. <access>read-write</access>
  18187. <resetValue>0x0000</resetValue>
  18188. <fields>
  18189. <field> <name>CC1OF</name>
  18190. <description>Capture/Compare 1 overcapture
  18191. flag</description>
  18192. <bitOffset>9</bitOffset>
  18193. <bitWidth>1</bitWidth>
  18194. </field>
  18195. <field> <name>CC1IF</name>
  18196. <description>Capture/compare 1 interrupt
  18197. flag</description>
  18198. <bitOffset>1</bitOffset>
  18199. <bitWidth>1</bitWidth>
  18200. </field>
  18201. <field> <name>UIF</name>
  18202. <description>Update interrupt flag</description>
  18203. <bitOffset>0</bitOffset>
  18204. <bitWidth>1</bitWidth>
  18205. </field>
  18206. </fields>
  18207. </register>
  18208. <register> <name>EGR</name>
  18209. <displayName>EGR</displayName>
  18210. <description>event generation register</description>
  18211. <addressOffset>0x14</addressOffset>
  18212. <size>0x20</size>
  18213. <access>write-only</access>
  18214. <resetValue>0x0000</resetValue>
  18215. <fields>
  18216. <field> <name>CC1G</name>
  18217. <description>Capture/compare 1
  18218. generation</description>
  18219. <bitOffset>1</bitOffset>
  18220. <bitWidth>1</bitWidth>
  18221. </field>
  18222. <field> <name>UG</name>
  18223. <description>Update generation</description>
  18224. <bitOffset>0</bitOffset>
  18225. <bitWidth>1</bitWidth>
  18226. </field>
  18227. </fields>
  18228. </register>
  18229. <register> <name>CCMR1_Output</name>
  18230. <displayName>CCMR1_Output</displayName>
  18231. <description>capture/compare mode register 1 (output
  18232. mode)</description>
  18233. <addressOffset>0x18</addressOffset>
  18234. <size>0x20</size>
  18235. <access>read-write</access>
  18236. <resetValue>0x00000000</resetValue>
  18237. <fields>
  18238. <field> <name>OC1M</name>
  18239. <description>Output Compare 1 mode</description>
  18240. <bitOffset>4</bitOffset>
  18241. <bitWidth>3</bitWidth>
  18242. </field>
  18243. <field> <name>OC1PE</name>
  18244. <description>Output Compare 1 preload
  18245. enable</description>
  18246. <bitOffset>3</bitOffset>
  18247. <bitWidth>1</bitWidth>
  18248. </field>
  18249. <field> <name>OC1FE</name>
  18250. <description>Output Compare 1 fast
  18251. enable</description>
  18252. <bitOffset>2</bitOffset>
  18253. <bitWidth>1</bitWidth>
  18254. </field>
  18255. <field> <name>CC1S</name>
  18256. <description>Capture/Compare 1
  18257. selection</description>
  18258. <bitOffset>0</bitOffset>
  18259. <bitWidth>2</bitWidth>
  18260. </field>
  18261. </fields>
  18262. </register>
  18263. <register> <name>CCMR1_Input</name>
  18264. <displayName>CCMR1_Input</displayName>
  18265. <description>capture/compare mode register 1 (input
  18266. mode)</description>
  18267. <alternateRegister>CCMR1_Output</alternateRegister>
  18268. <addressOffset>0x18</addressOffset>
  18269. <size>0x20</size>
  18270. <access>read-write</access>
  18271. <resetValue>0x00000000</resetValue>
  18272. <fields>
  18273. <field> <name>IC1F</name>
  18274. <description>Input capture 1 filter</description>
  18275. <bitOffset>4</bitOffset>
  18276. <bitWidth>4</bitWidth>
  18277. </field>
  18278. <field> <name>IC1PSC</name>
  18279. <description>Input capture 1 prescaler</description>
  18280. <bitOffset>2</bitOffset>
  18281. <bitWidth>2</bitWidth>
  18282. </field>
  18283. <field> <name>CC1S</name>
  18284. <description>Capture/Compare 1
  18285. selection</description>
  18286. <bitOffset>0</bitOffset>
  18287. <bitWidth>2</bitWidth>
  18288. </field>
  18289. </fields>
  18290. </register>
  18291. <register> <name>CCER</name>
  18292. <displayName>CCER</displayName>
  18293. <description>capture/compare enable
  18294. register</description>
  18295. <addressOffset>0x20</addressOffset>
  18296. <size>0x20</size>
  18297. <access>read-write</access>
  18298. <resetValue>0x0000</resetValue>
  18299. <fields>
  18300. <field> <name>CC1NP</name>
  18301. <description>Capture/Compare 1 output
  18302. Polarity</description>
  18303. <bitOffset>3</bitOffset>
  18304. <bitWidth>1</bitWidth>
  18305. </field>
  18306. <field> <name>CC1P</name>
  18307. <description>Capture/Compare 1 output
  18308. Polarity</description>
  18309. <bitOffset>1</bitOffset>
  18310. <bitWidth>1</bitWidth>
  18311. </field>
  18312. <field> <name>CC1E</name>
  18313. <description>Capture/Compare 1 output
  18314. enable</description>
  18315. <bitOffset>0</bitOffset>
  18316. <bitWidth>1</bitWidth>
  18317. </field>
  18318. </fields>
  18319. </register>
  18320. <register> <name>CNT</name>
  18321. <displayName>CNT</displayName>
  18322. <description>counter</description>
  18323. <addressOffset>0x24</addressOffset>
  18324. <size>0x20</size>
  18325. <access>read-write</access>
  18326. <resetValue>0x00000000</resetValue>
  18327. <fields>
  18328. <field> <name>CNT</name>
  18329. <description>counter value</description>
  18330. <bitOffset>0</bitOffset>
  18331. <bitWidth>16</bitWidth>
  18332. </field>
  18333. </fields>
  18334. </register>
  18335. <register> <name>PSC</name>
  18336. <displayName>PSC</displayName>
  18337. <description>prescaler</description>
  18338. <addressOffset>0x28</addressOffset>
  18339. <size>0x20</size>
  18340. <access>read-write</access>
  18341. <resetValue>0x0000</resetValue>
  18342. <fields>
  18343. <field> <name>PSC</name>
  18344. <description>Prescaler value</description>
  18345. <bitOffset>0</bitOffset>
  18346. <bitWidth>16</bitWidth>
  18347. </field>
  18348. </fields>
  18349. </register>
  18350. <register> <name>ARR</name>
  18351. <displayName>ARR</displayName>
  18352. <description>auto-reload register</description>
  18353. <addressOffset>0x2C</addressOffset>
  18354. <size>0x20</size>
  18355. <access>read-write</access>
  18356. <resetValue>0x00000000</resetValue>
  18357. <fields>
  18358. <field> <name>ARR</name>
  18359. <description>Auto-reload value</description>
  18360. <bitOffset>0</bitOffset>
  18361. <bitWidth>16</bitWidth>
  18362. </field>
  18363. </fields>
  18364. </register>
  18365. <register> <name>CCR1</name>
  18366. <displayName>CCR1</displayName>
  18367. <description>capture/compare register 1</description>
  18368. <addressOffset>0x34</addressOffset>
  18369. <size>0x20</size>
  18370. <access>read-write</access>
  18371. <resetValue>0x00000000</resetValue>
  18372. <fields>
  18373. <field> <name>CCR1</name>
  18374. <description>Capture/Compare 1 value</description>
  18375. <bitOffset>0</bitOffset>
  18376. <bitWidth>16</bitWidth>
  18377. </field>
  18378. </fields>
  18379. </register>
  18380. </registers>
  18381. </peripheral>
  18382. <peripheral derivedFrom="TIM10"> <name>TIM13</name>
  18383. <baseAddress>0x40001C00</baseAddress>
  18384. <interrupt>
  18385. <name>TIM8_UP_TIM13</name>
  18386. <description>TIM8 Update interrupt and TIM13 global
  18387. interrupt</description>
  18388. <value>44</value>
  18389. </interrupt>
  18390. </peripheral>
  18391. <peripheral derivedFrom="TIM10"> <name>TIM14</name>
  18392. <baseAddress>0x40002000</baseAddress>
  18393. <interrupt>
  18394. <name>TIM8_TRG_COM_TIM14</name>
  18395. <description>TIM8 Trigger and Commutation interrupts and
  18396. TIM14 global interrupt</description>
  18397. <value>45</value>
  18398. </interrupt>
  18399. </peripheral>
  18400. <peripheral> <name>TIM11</name>
  18401. <description>General-purpose-timers</description>
  18402. <groupName>TIM</groupName>
  18403. <baseAddress>0x40014800</baseAddress>
  18404. <addressBlock>
  18405. <offset>0x0</offset>
  18406. <size>0x400</size>
  18407. <usage>registers</usage>
  18408. </addressBlock>
  18409. <interrupt>
  18410. <name>TIM1_TRG_COM_TIM11</name>
  18411. <description>TIM1 Trigger and Commutation interrupts and
  18412. TIM11 global interrupt</description>
  18413. <value>26</value>
  18414. </interrupt>
  18415. <registers>
  18416. <register> <name>CR1</name>
  18417. <displayName>CR1</displayName>
  18418. <description>control register 1</description>
  18419. <addressOffset>0x0</addressOffset>
  18420. <size>0x20</size>
  18421. <access>read-write</access>
  18422. <resetValue>0x0000</resetValue>
  18423. <fields>
  18424. <field> <name>CKD</name>
  18425. <description>Clock division</description>
  18426. <bitOffset>8</bitOffset>
  18427. <bitWidth>2</bitWidth>
  18428. </field>
  18429. <field> <name>ARPE</name>
  18430. <description>Auto-reload preload enable</description>
  18431. <bitOffset>7</bitOffset>
  18432. <bitWidth>1</bitWidth>
  18433. </field>
  18434. <field> <name>URS</name>
  18435. <description>Update request source</description>
  18436. <bitOffset>2</bitOffset>
  18437. <bitWidth>1</bitWidth>
  18438. </field>
  18439. <field> <name>UDIS</name>
  18440. <description>Update disable</description>
  18441. <bitOffset>1</bitOffset>
  18442. <bitWidth>1</bitWidth>
  18443. </field>
  18444. <field> <name>CEN</name>
  18445. <description>Counter enable</description>
  18446. <bitOffset>0</bitOffset>
  18447. <bitWidth>1</bitWidth>
  18448. </field>
  18449. </fields>
  18450. </register>
  18451. <register> <name>DIER</name>
  18452. <displayName>DIER</displayName>
  18453. <description>DMA/Interrupt enable register</description>
  18454. <addressOffset>0xC</addressOffset>
  18455. <size>0x20</size>
  18456. <access>read-write</access>
  18457. <resetValue>0x0000</resetValue>
  18458. <fields>
  18459. <field> <name>CC1IE</name>
  18460. <description>Capture/Compare 1 interrupt
  18461. enable</description>
  18462. <bitOffset>1</bitOffset>
  18463. <bitWidth>1</bitWidth>
  18464. </field>
  18465. <field> <name>UIE</name>
  18466. <description>Update interrupt enable</description>
  18467. <bitOffset>0</bitOffset>
  18468. <bitWidth>1</bitWidth>
  18469. </field>
  18470. </fields>
  18471. </register>
  18472. <register> <name>SR</name>
  18473. <displayName>SR</displayName>
  18474. <description>status register</description>
  18475. <addressOffset>0x10</addressOffset>
  18476. <size>0x20</size>
  18477. <access>read-write</access>
  18478. <resetValue>0x0000</resetValue>
  18479. <fields>
  18480. <field> <name>CC1OF</name>
  18481. <description>Capture/Compare 1 overcapture
  18482. flag</description>
  18483. <bitOffset>9</bitOffset>
  18484. <bitWidth>1</bitWidth>
  18485. </field>
  18486. <field> <name>CC1IF</name>
  18487. <description>Capture/compare 1 interrupt
  18488. flag</description>
  18489. <bitOffset>1</bitOffset>
  18490. <bitWidth>1</bitWidth>
  18491. </field>
  18492. <field> <name>UIF</name>
  18493. <description>Update interrupt flag</description>
  18494. <bitOffset>0</bitOffset>
  18495. <bitWidth>1</bitWidth>
  18496. </field>
  18497. </fields>
  18498. </register>
  18499. <register> <name>EGR</name>
  18500. <displayName>EGR</displayName>
  18501. <description>event generation register</description>
  18502. <addressOffset>0x14</addressOffset>
  18503. <size>0x20</size>
  18504. <access>write-only</access>
  18505. <resetValue>0x0000</resetValue>
  18506. <fields>
  18507. <field> <name>CC1G</name>
  18508. <description>Capture/compare 1
  18509. generation</description>
  18510. <bitOffset>1</bitOffset>
  18511. <bitWidth>1</bitWidth>
  18512. </field>
  18513. <field> <name>UG</name>
  18514. <description>Update generation</description>
  18515. <bitOffset>0</bitOffset>
  18516. <bitWidth>1</bitWidth>
  18517. </field>
  18518. </fields>
  18519. </register>
  18520. <register> <name>CCMR1_Output</name>
  18521. <displayName>CCMR1_Output</displayName>
  18522. <description>capture/compare mode register 1 (output
  18523. mode)</description>
  18524. <addressOffset>0x18</addressOffset>
  18525. <size>0x20</size>
  18526. <access>read-write</access>
  18527. <resetValue>0x00000000</resetValue>
  18528. <fields>
  18529. <field> <name>OC1M</name>
  18530. <description>Output Compare 1 mode</description>
  18531. <bitOffset>4</bitOffset>
  18532. <bitWidth>3</bitWidth>
  18533. </field>
  18534. <field> <name>OC1PE</name>
  18535. <description>Output Compare 1 preload
  18536. enable</description>
  18537. <bitOffset>3</bitOffset>
  18538. <bitWidth>1</bitWidth>
  18539. </field>
  18540. <field> <name>OC1FE</name>
  18541. <description>Output Compare 1 fast
  18542. enable</description>
  18543. <bitOffset>2</bitOffset>
  18544. <bitWidth>1</bitWidth>
  18545. </field>
  18546. <field> <name>CC1S</name>
  18547. <description>Capture/Compare 1
  18548. selection</description>
  18549. <bitOffset>0</bitOffset>
  18550. <bitWidth>2</bitWidth>
  18551. </field>
  18552. </fields>
  18553. </register>
  18554. <register> <name>CCMR1_Input</name>
  18555. <displayName>CCMR1_Input</displayName>
  18556. <description>capture/compare mode register 1 (input
  18557. mode)</description>
  18558. <alternateRegister>CCMR1_Output</alternateRegister>
  18559. <addressOffset>0x18</addressOffset>
  18560. <size>0x20</size>
  18561. <access>read-write</access>
  18562. <resetValue>0x00000000</resetValue>
  18563. <fields>
  18564. <field> <name>IC1F</name>
  18565. <description>Input capture 1 filter</description>
  18566. <bitOffset>4</bitOffset>
  18567. <bitWidth>4</bitWidth>
  18568. </field>
  18569. <field> <name>IC1PSC</name>
  18570. <description>Input capture 1 prescaler</description>
  18571. <bitOffset>2</bitOffset>
  18572. <bitWidth>2</bitWidth>
  18573. </field>
  18574. <field> <name>CC1S</name>
  18575. <description>Capture/Compare 1
  18576. selection</description>
  18577. <bitOffset>0</bitOffset>
  18578. <bitWidth>2</bitWidth>
  18579. </field>
  18580. </fields>
  18581. </register>
  18582. <register> <name>CCER</name>
  18583. <displayName>CCER</displayName>
  18584. <description>capture/compare enable
  18585. register</description>
  18586. <addressOffset>0x20</addressOffset>
  18587. <size>0x20</size>
  18588. <access>read-write</access>
  18589. <resetValue>0x0000</resetValue>
  18590. <fields>
  18591. <field> <name>CC1NP</name>
  18592. <description>Capture/Compare 1 output
  18593. Polarity</description>
  18594. <bitOffset>3</bitOffset>
  18595. <bitWidth>1</bitWidth>
  18596. </field>
  18597. <field> <name>CC1P</name>
  18598. <description>Capture/Compare 1 output
  18599. Polarity</description>
  18600. <bitOffset>1</bitOffset>
  18601. <bitWidth>1</bitWidth>
  18602. </field>
  18603. <field> <name>CC1E</name>
  18604. <description>Capture/Compare 1 output
  18605. enable</description>
  18606. <bitOffset>0</bitOffset>
  18607. <bitWidth>1</bitWidth>
  18608. </field>
  18609. </fields>
  18610. </register>
  18611. <register> <name>CNT</name>
  18612. <displayName>CNT</displayName>
  18613. <description>counter</description>
  18614. <addressOffset>0x24</addressOffset>
  18615. <size>0x20</size>
  18616. <access>read-write</access>
  18617. <resetValue>0x00000000</resetValue>
  18618. <fields>
  18619. <field> <name>CNT</name>
  18620. <description>counter value</description>
  18621. <bitOffset>0</bitOffset>
  18622. <bitWidth>16</bitWidth>
  18623. </field>
  18624. </fields>
  18625. </register>
  18626. <register> <name>PSC</name>
  18627. <displayName>PSC</displayName>
  18628. <description>prescaler</description>
  18629. <addressOffset>0x28</addressOffset>
  18630. <size>0x20</size>
  18631. <access>read-write</access>
  18632. <resetValue>0x0000</resetValue>
  18633. <fields>
  18634. <field> <name>PSC</name>
  18635. <description>Prescaler value</description>
  18636. <bitOffset>0</bitOffset>
  18637. <bitWidth>16</bitWidth>
  18638. </field>
  18639. </fields>
  18640. </register>
  18641. <register> <name>ARR</name>
  18642. <displayName>ARR</displayName>
  18643. <description>auto-reload register</description>
  18644. <addressOffset>0x2C</addressOffset>
  18645. <size>0x20</size>
  18646. <access>read-write</access>
  18647. <resetValue>0x00000000</resetValue>
  18648. <fields>
  18649. <field> <name>ARR</name>
  18650. <description>Auto-reload value</description>
  18651. <bitOffset>0</bitOffset>
  18652. <bitWidth>16</bitWidth>
  18653. </field>
  18654. </fields>
  18655. </register>
  18656. <register> <name>CCR1</name>
  18657. <displayName>CCR1</displayName>
  18658. <description>capture/compare register 1</description>
  18659. <addressOffset>0x34</addressOffset>
  18660. <size>0x20</size>
  18661. <access>read-write</access>
  18662. <resetValue>0x00000000</resetValue>
  18663. <fields>
  18664. <field> <name>CCR1</name>
  18665. <description>Capture/Compare 1 value</description>
  18666. <bitOffset>0</bitOffset>
  18667. <bitWidth>16</bitWidth>
  18668. </field>
  18669. </fields>
  18670. </register>
  18671. <register> <name>OR</name>
  18672. <displayName>OR</displayName>
  18673. <description>option register</description>
  18674. <addressOffset>0x50</addressOffset>
  18675. <size>0x20</size>
  18676. <access>read-write</access>
  18677. <resetValue>0x00000000</resetValue>
  18678. <fields>
  18679. <field> <name>RMP</name>
  18680. <description>Input 1 remapping
  18681. capability</description>
  18682. <bitOffset>0</bitOffset>
  18683. <bitWidth>2</bitWidth>
  18684. </field>
  18685. </fields>
  18686. </register>
  18687. </registers>
  18688. </peripheral>
  18689. <peripheral> <name>TIM6</name>
  18690. <description>Basic timers</description>
  18691. <groupName>TIM</groupName>
  18692. <baseAddress>0x40001000</baseAddress>
  18693. <addressBlock>
  18694. <offset>0x0</offset>
  18695. <size>0x400</size>
  18696. <usage>registers</usage>
  18697. </addressBlock>
  18698. <interrupt>
  18699. <name>TIM6_DAC</name>
  18700. <description>TIM6 global interrupt, DAC1 and DAC2 underrun
  18701. error interrupt</description>
  18702. <value>54</value>
  18703. </interrupt>
  18704. <registers>
  18705. <register> <name>CR1</name>
  18706. <displayName>CR1</displayName>
  18707. <description>control register 1</description>
  18708. <addressOffset>0x0</addressOffset>
  18709. <size>0x20</size>
  18710. <access>read-write</access>
  18711. <resetValue>0x0000</resetValue>
  18712. <fields>
  18713. <field> <name>ARPE</name>
  18714. <description>Auto-reload preload enable</description>
  18715. <bitOffset>7</bitOffset>
  18716. <bitWidth>1</bitWidth>
  18717. </field>
  18718. <field> <name>OPM</name>
  18719. <description>One-pulse mode</description>
  18720. <bitOffset>3</bitOffset>
  18721. <bitWidth>1</bitWidth>
  18722. </field>
  18723. <field> <name>URS</name>
  18724. <description>Update request source</description>
  18725. <bitOffset>2</bitOffset>
  18726. <bitWidth>1</bitWidth>
  18727. </field>
  18728. <field> <name>UDIS</name>
  18729. <description>Update disable</description>
  18730. <bitOffset>1</bitOffset>
  18731. <bitWidth>1</bitWidth>
  18732. </field>
  18733. <field> <name>CEN</name>
  18734. <description>Counter enable</description>
  18735. <bitOffset>0</bitOffset>
  18736. <bitWidth>1</bitWidth>
  18737. </field>
  18738. </fields>
  18739. </register>
  18740. <register> <name>CR2</name>
  18741. <displayName>CR2</displayName>
  18742. <description>control register 2</description>
  18743. <addressOffset>0x4</addressOffset>
  18744. <size>0x20</size>
  18745. <access>read-write</access>
  18746. <resetValue>0x0000</resetValue>
  18747. <fields>
  18748. <field> <name>MMS</name>
  18749. <description>Master mode selection</description>
  18750. <bitOffset>4</bitOffset>
  18751. <bitWidth>3</bitWidth>
  18752. </field>
  18753. </fields>
  18754. </register>
  18755. <register> <name>DIER</name>
  18756. <displayName>DIER</displayName>
  18757. <description>DMA/Interrupt enable register</description>
  18758. <addressOffset>0xC</addressOffset>
  18759. <size>0x20</size>
  18760. <access>read-write</access>
  18761. <resetValue>0x0000</resetValue>
  18762. <fields>
  18763. <field> <name>UDE</name>
  18764. <description>Update DMA request enable</description>
  18765. <bitOffset>8</bitOffset>
  18766. <bitWidth>1</bitWidth>
  18767. </field>
  18768. <field> <name>UIE</name>
  18769. <description>Update interrupt enable</description>
  18770. <bitOffset>0</bitOffset>
  18771. <bitWidth>1</bitWidth>
  18772. </field>
  18773. </fields>
  18774. </register>
  18775. <register> <name>SR</name>
  18776. <displayName>SR</displayName>
  18777. <description>status register</description>
  18778. <addressOffset>0x10</addressOffset>
  18779. <size>0x20</size>
  18780. <access>read-write</access>
  18781. <resetValue>0x0000</resetValue>
  18782. <fields>
  18783. <field> <name>UIF</name>
  18784. <description>Update interrupt flag</description>
  18785. <bitOffset>0</bitOffset>
  18786. <bitWidth>1</bitWidth>
  18787. </field>
  18788. </fields>
  18789. </register>
  18790. <register> <name>EGR</name>
  18791. <displayName>EGR</displayName>
  18792. <description>event generation register</description>
  18793. <addressOffset>0x14</addressOffset>
  18794. <size>0x20</size>
  18795. <access>write-only</access>
  18796. <resetValue>0x0000</resetValue>
  18797. <fields>
  18798. <field> <name>UG</name>
  18799. <description>Update generation</description>
  18800. <bitOffset>0</bitOffset>
  18801. <bitWidth>1</bitWidth>
  18802. </field>
  18803. </fields>
  18804. </register>
  18805. <register> <name>CNT</name>
  18806. <displayName>CNT</displayName>
  18807. <description>counter</description>
  18808. <addressOffset>0x24</addressOffset>
  18809. <size>0x20</size>
  18810. <access>read-write</access>
  18811. <resetValue>0x00000000</resetValue>
  18812. <fields>
  18813. <field> <name>CNT</name>
  18814. <description>Low counter value</description>
  18815. <bitOffset>0</bitOffset>
  18816. <bitWidth>16</bitWidth>
  18817. </field>
  18818. </fields>
  18819. </register>
  18820. <register> <name>PSC</name>
  18821. <displayName>PSC</displayName>
  18822. <description>prescaler</description>
  18823. <addressOffset>0x28</addressOffset>
  18824. <size>0x20</size>
  18825. <access>read-write</access>
  18826. <resetValue>0x0000</resetValue>
  18827. <fields>
  18828. <field> <name>PSC</name>
  18829. <description>Prescaler value</description>
  18830. <bitOffset>0</bitOffset>
  18831. <bitWidth>16</bitWidth>
  18832. </field>
  18833. </fields>
  18834. </register>
  18835. <register> <name>ARR</name>
  18836. <displayName>ARR</displayName>
  18837. <description>auto-reload register</description>
  18838. <addressOffset>0x2C</addressOffset>
  18839. <size>0x20</size>
  18840. <access>read-write</access>
  18841. <resetValue>0x00000000</resetValue>
  18842. <fields>
  18843. <field> <name>ARR</name>
  18844. <description>Low Auto-reload value</description>
  18845. <bitOffset>0</bitOffset>
  18846. <bitWidth>16</bitWidth>
  18847. </field>
  18848. </fields>
  18849. </register>
  18850. </registers>
  18851. </peripheral>
  18852. <peripheral derivedFrom="TIM6"> <name>TIM7</name>
  18853. <baseAddress>0x40001400</baseAddress>
  18854. <interrupt>
  18855. <name>TIM7</name>
  18856. <description>TIM7 global interrupt</description>
  18857. <value>55</value>
  18858. </interrupt>
  18859. </peripheral>
  18860. <peripheral> <name>Ethernet_MAC</name>
  18861. <description>Ethernet: media access control
  18862. (MAC)</description>
  18863. <groupName>Ethernet</groupName>
  18864. <baseAddress>0x40028000</baseAddress>
  18865. <addressBlock>
  18866. <offset>0x0</offset>
  18867. <size>0x400</size>
  18868. <usage>registers</usage>
  18869. </addressBlock>
  18870. <interrupt>
  18871. <name>ETH</name>
  18872. <description>Ethernet global interrupt</description>
  18873. <value>61</value>
  18874. </interrupt>
  18875. <interrupt>
  18876. <name>ETH_WKUP</name>
  18877. <description>Ethernet Wakeup through EXTI line
  18878. interrupt</description>
  18879. <value>62</value>
  18880. </interrupt>
  18881. <registers>
  18882. <register> <name>MACCR</name>
  18883. <displayName>MACCR</displayName>
  18884. <description>Ethernet MAC configuration
  18885. register</description>
  18886. <addressOffset>0x0</addressOffset>
  18887. <size>0x20</size>
  18888. <access>read-write</access>
  18889. <resetValue>0x0008000</resetValue>
  18890. <fields>
  18891. <field> <name>RE</name>
  18892. <description>RE</description>
  18893. <bitOffset>2</bitOffset>
  18894. <bitWidth>1</bitWidth>
  18895. </field>
  18896. <field> <name>TE</name>
  18897. <description>TE</description>
  18898. <bitOffset>3</bitOffset>
  18899. <bitWidth>1</bitWidth>
  18900. </field>
  18901. <field> <name>DC</name>
  18902. <description>DC</description>
  18903. <bitOffset>4</bitOffset>
  18904. <bitWidth>1</bitWidth>
  18905. </field>
  18906. <field> <name>BL</name>
  18907. <description>BL</description>
  18908. <bitOffset>5</bitOffset>
  18909. <bitWidth>2</bitWidth>
  18910. </field>
  18911. <field> <name>APCS</name>
  18912. <description>APCS</description>
  18913. <bitOffset>7</bitOffset>
  18914. <bitWidth>1</bitWidth>
  18915. </field>
  18916. <field> <name>RD</name>
  18917. <description>RD</description>
  18918. <bitOffset>9</bitOffset>
  18919. <bitWidth>1</bitWidth>
  18920. </field>
  18921. <field> <name>IPCO</name>
  18922. <description>IPCO</description>
  18923. <bitOffset>10</bitOffset>
  18924. <bitWidth>1</bitWidth>
  18925. </field>
  18926. <field> <name>DM</name>
  18927. <description>DM</description>
  18928. <bitOffset>11</bitOffset>
  18929. <bitWidth>1</bitWidth>
  18930. </field>
  18931. <field> <name>LM</name>
  18932. <description>LM</description>
  18933. <bitOffset>12</bitOffset>
  18934. <bitWidth>1</bitWidth>
  18935. </field>
  18936. <field> <name>ROD</name>
  18937. <description>ROD</description>
  18938. <bitOffset>13</bitOffset>
  18939. <bitWidth>1</bitWidth>
  18940. </field>
  18941. <field> <name>FES</name>
  18942. <description>FES</description>
  18943. <bitOffset>14</bitOffset>
  18944. <bitWidth>1</bitWidth>
  18945. </field>
  18946. <field> <name>CSD</name>
  18947. <description>CSD</description>
  18948. <bitOffset>16</bitOffset>
  18949. <bitWidth>1</bitWidth>
  18950. </field>
  18951. <field> <name>IFG</name>
  18952. <description>IFG</description>
  18953. <bitOffset>17</bitOffset>
  18954. <bitWidth>3</bitWidth>
  18955. </field>
  18956. <field> <name>JD</name>
  18957. <description>JD</description>
  18958. <bitOffset>22</bitOffset>
  18959. <bitWidth>1</bitWidth>
  18960. </field>
  18961. <field> <name>WD</name>
  18962. <description>WD</description>
  18963. <bitOffset>23</bitOffset>
  18964. <bitWidth>1</bitWidth>
  18965. </field>
  18966. <field> <name>CSTF</name>
  18967. <description>CSTF</description>
  18968. <bitOffset>25</bitOffset>
  18969. <bitWidth>1</bitWidth>
  18970. </field>
  18971. </fields>
  18972. </register>
  18973. <register> <name>MACFFR</name>
  18974. <displayName>MACFFR</displayName>
  18975. <description>Ethernet MAC frame filter
  18976. register</description>
  18977. <addressOffset>0x4</addressOffset>
  18978. <size>0x20</size>
  18979. <access>read-write</access>
  18980. <resetValue>0x00000000</resetValue>
  18981. <fields>
  18982. <field> <name>PM</name>
  18983. <description>no description available</description>
  18984. <bitOffset>0</bitOffset>
  18985. <bitWidth>1</bitWidth>
  18986. </field>
  18987. <field> <name>HU</name>
  18988. <description>no description available</description>
  18989. <bitOffset>1</bitOffset>
  18990. <bitWidth>1</bitWidth>
  18991. </field>
  18992. <field> <name>HM</name>
  18993. <description>no description available</description>
  18994. <bitOffset>2</bitOffset>
  18995. <bitWidth>1</bitWidth>
  18996. </field>
  18997. <field> <name>DAIF</name>
  18998. <description>no description available</description>
  18999. <bitOffset>3</bitOffset>
  19000. <bitWidth>1</bitWidth>
  19001. </field>
  19002. <field> <name>RAM</name>
  19003. <description>no description available</description>
  19004. <bitOffset>4</bitOffset>
  19005. <bitWidth>1</bitWidth>
  19006. </field>
  19007. <field> <name>BFD</name>
  19008. <description>no description available</description>
  19009. <bitOffset>5</bitOffset>
  19010. <bitWidth>1</bitWidth>
  19011. </field>
  19012. <field> <name>PCF</name>
  19013. <description>no description available</description>
  19014. <bitOffset>6</bitOffset>
  19015. <bitWidth>1</bitWidth>
  19016. </field>
  19017. <field> <name>SAIF</name>
  19018. <description>no description available</description>
  19019. <bitOffset>7</bitOffset>
  19020. <bitWidth>1</bitWidth>
  19021. </field>
  19022. <field> <name>SAF</name>
  19023. <description>no description available</description>
  19024. <bitOffset>8</bitOffset>
  19025. <bitWidth>1</bitWidth>
  19026. </field>
  19027. <field> <name>HPF</name>
  19028. <description>no description available</description>
  19029. <bitOffset>9</bitOffset>
  19030. <bitWidth>1</bitWidth>
  19031. </field>
  19032. <field> <name>RA</name>
  19033. <description>no description available</description>
  19034. <bitOffset>31</bitOffset>
  19035. <bitWidth>1</bitWidth>
  19036. </field>
  19037. </fields>
  19038. </register>
  19039. <register> <name>MACHTHR</name>
  19040. <displayName>MACHTHR</displayName>
  19041. <description>Ethernet MAC hash table high
  19042. register</description>
  19043. <addressOffset>0x8</addressOffset>
  19044. <size>0x20</size>
  19045. <access>read-write</access>
  19046. <resetValue>0x00000000</resetValue>
  19047. <fields>
  19048. <field> <name>HTH</name>
  19049. <description>no description available</description>
  19050. <bitOffset>0</bitOffset>
  19051. <bitWidth>32</bitWidth>
  19052. </field>
  19053. </fields>
  19054. </register>
  19055. <register> <name>MACHTLR</name>
  19056. <displayName>MACHTLR</displayName>
  19057. <description>Ethernet MAC hash table low
  19058. register</description>
  19059. <addressOffset>0xC</addressOffset>
  19060. <size>0x20</size>
  19061. <access>read-write</access>
  19062. <resetValue>0x00000000</resetValue>
  19063. <fields>
  19064. <field> <name>HTL</name>
  19065. <description>no description available</description>
  19066. <bitOffset>0</bitOffset>
  19067. <bitWidth>32</bitWidth>
  19068. </field>
  19069. </fields>
  19070. </register>
  19071. <register> <name>MACMIIAR</name>
  19072. <displayName>MACMIIAR</displayName>
  19073. <description>Ethernet MAC MII address
  19074. register</description>
  19075. <addressOffset>0x10</addressOffset>
  19076. <size>0x20</size>
  19077. <access>read-write</access>
  19078. <resetValue>0x00000000</resetValue>
  19079. <fields>
  19080. <field> <name>MB</name>
  19081. <description>no description available</description>
  19082. <bitOffset>0</bitOffset>
  19083. <bitWidth>1</bitWidth>
  19084. </field>
  19085. <field> <name>MW</name>
  19086. <description>no description available</description>
  19087. <bitOffset>1</bitOffset>
  19088. <bitWidth>1</bitWidth>
  19089. </field>
  19090. <field> <name>CR</name>
  19091. <description>no description available</description>
  19092. <bitOffset>2</bitOffset>
  19093. <bitWidth>3</bitWidth>
  19094. </field>
  19095. <field> <name>MR</name>
  19096. <description>no description available</description>
  19097. <bitOffset>6</bitOffset>
  19098. <bitWidth>5</bitWidth>
  19099. </field>
  19100. <field> <name>PA</name>
  19101. <description>no description available</description>
  19102. <bitOffset>11</bitOffset>
  19103. <bitWidth>5</bitWidth>
  19104. </field>
  19105. </fields>
  19106. </register>
  19107. <register> <name>MACMIIDR</name>
  19108. <displayName>MACMIIDR</displayName>
  19109. <description>Ethernet MAC MII data register</description>
  19110. <addressOffset>0x14</addressOffset>
  19111. <size>0x20</size>
  19112. <access>read-write</access>
  19113. <resetValue>0x00000000</resetValue>
  19114. <fields>
  19115. <field> <name>TD</name>
  19116. <description>no description available</description>
  19117. <bitOffset>0</bitOffset>
  19118. <bitWidth>16</bitWidth>
  19119. </field>
  19120. </fields>
  19121. </register>
  19122. <register> <name>MACFCR</name>
  19123. <displayName>MACFCR</displayName>
  19124. <description>Ethernet MAC flow control
  19125. register</description>
  19126. <addressOffset>0x18</addressOffset>
  19127. <size>0x20</size>
  19128. <access>read-write</access>
  19129. <resetValue>0x00000000</resetValue>
  19130. <fields>
  19131. <field> <name>FCB</name>
  19132. <description>no description available</description>
  19133. <bitOffset>0</bitOffset>
  19134. <bitWidth>1</bitWidth>
  19135. </field>
  19136. <field> <name>TFCE</name>
  19137. <description>no description available</description>
  19138. <bitOffset>1</bitOffset>
  19139. <bitWidth>1</bitWidth>
  19140. </field>
  19141. <field> <name>RFCE</name>
  19142. <description>no description available</description>
  19143. <bitOffset>2</bitOffset>
  19144. <bitWidth>1</bitWidth>
  19145. </field>
  19146. <field> <name>UPFD</name>
  19147. <description>no description available</description>
  19148. <bitOffset>3</bitOffset>
  19149. <bitWidth>1</bitWidth>
  19150. </field>
  19151. <field> <name>PLT</name>
  19152. <description>no description available</description>
  19153. <bitOffset>4</bitOffset>
  19154. <bitWidth>2</bitWidth>
  19155. </field>
  19156. <field> <name>ZQPD</name>
  19157. <description>no description available</description>
  19158. <bitOffset>7</bitOffset>
  19159. <bitWidth>1</bitWidth>
  19160. </field>
  19161. <field> <name>PT</name>
  19162. <description>no description available</description>
  19163. <bitOffset>16</bitOffset>
  19164. <bitWidth>16</bitWidth>
  19165. </field>
  19166. </fields>
  19167. </register>
  19168. <register> <name>MACVLANTR</name>
  19169. <displayName>MACVLANTR</displayName>
  19170. <description>Ethernet MAC VLAN tag register</description>
  19171. <addressOffset>0x1C</addressOffset>
  19172. <size>0x20</size>
  19173. <access>read-write</access>
  19174. <resetValue>0x00000000</resetValue>
  19175. <fields>
  19176. <field> <name>VLANTI</name>
  19177. <description>no description available</description>
  19178. <bitOffset>0</bitOffset>
  19179. <bitWidth>16</bitWidth>
  19180. </field>
  19181. <field> <name>VLANTC</name>
  19182. <description>no description available</description>
  19183. <bitOffset>16</bitOffset>
  19184. <bitWidth>1</bitWidth>
  19185. </field>
  19186. </fields>
  19187. </register>
  19188. <register> <name>MACPMTCSR</name>
  19189. <displayName>MACPMTCSR</displayName>
  19190. <description>Ethernet MAC PMT control and status
  19191. register</description>
  19192. <addressOffset>0x2C</addressOffset>
  19193. <size>0x20</size>
  19194. <access>read-write</access>
  19195. <resetValue>0x00000000</resetValue>
  19196. <fields>
  19197. <field> <name>PD</name>
  19198. <description>no description available</description>
  19199. <bitOffset>0</bitOffset>
  19200. <bitWidth>1</bitWidth>
  19201. </field>
  19202. <field> <name>MPE</name>
  19203. <description>no description available</description>
  19204. <bitOffset>1</bitOffset>
  19205. <bitWidth>1</bitWidth>
  19206. </field>
  19207. <field> <name>WFE</name>
  19208. <description>no description available</description>
  19209. <bitOffset>2</bitOffset>
  19210. <bitWidth>1</bitWidth>
  19211. </field>
  19212. <field> <name>MPR</name>
  19213. <description>no description available</description>
  19214. <bitOffset>5</bitOffset>
  19215. <bitWidth>1</bitWidth>
  19216. </field>
  19217. <field> <name>WFR</name>
  19218. <description>no description available</description>
  19219. <bitOffset>6</bitOffset>
  19220. <bitWidth>1</bitWidth>
  19221. </field>
  19222. <field> <name>GU</name>
  19223. <description>no description available</description>
  19224. <bitOffset>9</bitOffset>
  19225. <bitWidth>1</bitWidth>
  19226. </field>
  19227. <field> <name>WFFRPR</name>
  19228. <description>no description available</description>
  19229. <bitOffset>31</bitOffset>
  19230. <bitWidth>1</bitWidth>
  19231. </field>
  19232. </fields>
  19233. </register>
  19234. <register> <name>MACDBGR</name>
  19235. <displayName>MACDBGR</displayName>
  19236. <description>Ethernet MAC debug register</description>
  19237. <addressOffset>0x34</addressOffset>
  19238. <size>0x20</size>
  19239. <access>read-only</access>
  19240. <resetValue>0x00000000</resetValue>
  19241. <fields>
  19242. <field> <name>CR</name>
  19243. <description>CR</description>
  19244. <bitOffset>0</bitOffset>
  19245. <bitWidth>1</bitWidth>
  19246. </field>
  19247. <field> <name>CSR</name>
  19248. <description>CSR</description>
  19249. <bitOffset>1</bitOffset>
  19250. <bitWidth>1</bitWidth>
  19251. </field>
  19252. <field> <name>ROR</name>
  19253. <description>ROR</description>
  19254. <bitOffset>2</bitOffset>
  19255. <bitWidth>1</bitWidth>
  19256. </field>
  19257. <field> <name>MCF</name>
  19258. <description>MCF</description>
  19259. <bitOffset>3</bitOffset>
  19260. <bitWidth>1</bitWidth>
  19261. </field>
  19262. <field> <name>MCP</name>
  19263. <description>MCP</description>
  19264. <bitOffset>4</bitOffset>
  19265. <bitWidth>1</bitWidth>
  19266. </field>
  19267. <field> <name>MCFHP</name>
  19268. <description>MCFHP</description>
  19269. <bitOffset>5</bitOffset>
  19270. <bitWidth>1</bitWidth>
  19271. </field>
  19272. </fields>
  19273. </register>
  19274. <register> <name>MACSR</name>
  19275. <displayName>MACSR</displayName>
  19276. <description>Ethernet MAC interrupt status
  19277. register</description>
  19278. <addressOffset>0x38</addressOffset>
  19279. <size>0x20</size>
  19280. <resetValue>0x00000000</resetValue>
  19281. <fields>
  19282. <field> <name>PMTS</name>
  19283. <description>no description available</description>
  19284. <bitOffset>3</bitOffset>
  19285. <bitWidth>1</bitWidth>
  19286. <access>read-only</access>
  19287. </field>
  19288. <field> <name>MMCS</name>
  19289. <description>no description available</description>
  19290. <bitOffset>4</bitOffset>
  19291. <bitWidth>1</bitWidth>
  19292. <access>read-only</access>
  19293. </field>
  19294. <field> <name>MMCRS</name>
  19295. <description>no description available</description>
  19296. <bitOffset>5</bitOffset>
  19297. <bitWidth>1</bitWidth>
  19298. <access>read-only</access>
  19299. </field>
  19300. <field> <name>MMCTS</name>
  19301. <description>no description available</description>
  19302. <bitOffset>6</bitOffset>
  19303. <bitWidth>1</bitWidth>
  19304. <access>read-only</access>
  19305. </field>
  19306. <field> <name>TSTS</name>
  19307. <description>no description available</description>
  19308. <bitOffset>9</bitOffset>
  19309. <bitWidth>1</bitWidth>
  19310. <access>read-write</access>
  19311. </field>
  19312. </fields>
  19313. </register>
  19314. <register> <name>MACIMR</name>
  19315. <displayName>MACIMR</displayName>
  19316. <description>Ethernet MAC interrupt mask
  19317. register</description>
  19318. <addressOffset>0x3C</addressOffset>
  19319. <size>0x20</size>
  19320. <access>read-write</access>
  19321. <resetValue>0x00000000</resetValue>
  19322. <fields>
  19323. <field> <name>PMTIM</name>
  19324. <description>no description available</description>
  19325. <bitOffset>3</bitOffset>
  19326. <bitWidth>1</bitWidth>
  19327. </field>
  19328. <field> <name>TSTIM</name>
  19329. <description>no description available</description>
  19330. <bitOffset>9</bitOffset>
  19331. <bitWidth>1</bitWidth>
  19332. </field>
  19333. </fields>
  19334. </register>
  19335. <register> <name>MACA0HR</name>
  19336. <displayName>MACA0HR</displayName>
  19337. <description>Ethernet MAC address 0 high
  19338. register</description>
  19339. <addressOffset>0x40</addressOffset>
  19340. <size>0x20</size>
  19341. <resetValue>0x0010FFFF</resetValue>
  19342. <fields>
  19343. <field> <name>MACA0H</name>
  19344. <description>MAC address0 high</description>
  19345. <bitOffset>0</bitOffset>
  19346. <bitWidth>16</bitWidth>
  19347. <access>read-write</access>
  19348. </field>
  19349. <field> <name>MO</name>
  19350. <description>Always 1</description>
  19351. <bitOffset>31</bitOffset>
  19352. <bitWidth>1</bitWidth>
  19353. <access>read-only</access>
  19354. </field>
  19355. </fields>
  19356. </register>
  19357. <register> <name>MACA0LR</name>
  19358. <displayName>MACA0LR</displayName>
  19359. <description>Ethernet MAC address 0 low
  19360. register</description>
  19361. <addressOffset>0x44</addressOffset>
  19362. <size>0x20</size>
  19363. <access>read-write</access>
  19364. <resetValue>0xFFFFFFFF</resetValue>
  19365. <fields>
  19366. <field> <name>MACA0L</name>
  19367. <description>0</description>
  19368. <bitOffset>0</bitOffset>
  19369. <bitWidth>32</bitWidth>
  19370. </field>
  19371. </fields>
  19372. </register>
  19373. <register> <name>MACA1HR</name>
  19374. <displayName>MACA1HR</displayName>
  19375. <description>Ethernet MAC address 1 high
  19376. register</description>
  19377. <addressOffset>0x48</addressOffset>
  19378. <size>0x20</size>
  19379. <access>read-write</access>
  19380. <resetValue>0x0000FFFF</resetValue>
  19381. <fields>
  19382. <field> <name>MACA1H</name>
  19383. <description>no description available</description>
  19384. <bitOffset>0</bitOffset>
  19385. <bitWidth>16</bitWidth>
  19386. </field>
  19387. <field> <name>MBC</name>
  19388. <description>no description available</description>
  19389. <bitOffset>24</bitOffset>
  19390. <bitWidth>6</bitWidth>
  19391. </field>
  19392. <field> <name>SA</name>
  19393. <description>no description available</description>
  19394. <bitOffset>30</bitOffset>
  19395. <bitWidth>1</bitWidth>
  19396. </field>
  19397. <field> <name>AE</name>
  19398. <description>no description available</description>
  19399. <bitOffset>31</bitOffset>
  19400. <bitWidth>1</bitWidth>
  19401. </field>
  19402. </fields>
  19403. </register>
  19404. <register> <name>MACA1LR</name>
  19405. <displayName>MACA1LR</displayName>
  19406. <description>Ethernet MAC address1 low
  19407. register</description>
  19408. <addressOffset>0x4C</addressOffset>
  19409. <size>0x20</size>
  19410. <access>read-write</access>
  19411. <resetValue>0xFFFFFFFF</resetValue>
  19412. <fields>
  19413. <field> <name>MACA1LR</name>
  19414. <description>no description available</description>
  19415. <bitOffset>0</bitOffset>
  19416. <bitWidth>32</bitWidth>
  19417. </field>
  19418. </fields>
  19419. </register>
  19420. <register> <name>MACA2HR</name>
  19421. <displayName>MACA2HR</displayName>
  19422. <description>Ethernet MAC address 2 high
  19423. register</description>
  19424. <addressOffset>0x50</addressOffset>
  19425. <size>0x20</size>
  19426. <access>read-write</access>
  19427. <resetValue>0x0000FFFF</resetValue>
  19428. <fields>
  19429. <field> <name>MAC2AH</name>
  19430. <description>no description available</description>
  19431. <bitOffset>0</bitOffset>
  19432. <bitWidth>16</bitWidth>
  19433. </field>
  19434. <field> <name>MBC</name>
  19435. <description>no description available</description>
  19436. <bitOffset>24</bitOffset>
  19437. <bitWidth>6</bitWidth>
  19438. </field>
  19439. <field> <name>SA</name>
  19440. <description>no description available</description>
  19441. <bitOffset>30</bitOffset>
  19442. <bitWidth>1</bitWidth>
  19443. </field>
  19444. <field> <name>AE</name>
  19445. <description>no description available</description>
  19446. <bitOffset>31</bitOffset>
  19447. <bitWidth>1</bitWidth>
  19448. </field>
  19449. </fields>
  19450. </register>
  19451. <register> <name>MACA2LR</name>
  19452. <displayName>MACA2LR</displayName>
  19453. <description>Ethernet MAC address 2 low
  19454. register</description>
  19455. <addressOffset>0x54</addressOffset>
  19456. <size>0x20</size>
  19457. <access>read-write</access>
  19458. <resetValue>0xFFFFFFFF</resetValue>
  19459. <fields>
  19460. <field> <name>MACA2L</name>
  19461. <description>no description available</description>
  19462. <bitOffset>0</bitOffset>
  19463. <bitWidth>31</bitWidth>
  19464. </field>
  19465. </fields>
  19466. </register>
  19467. <register> <name>MACA3HR</name>
  19468. <displayName>MACA3HR</displayName>
  19469. <description>Ethernet MAC address 3 high
  19470. register</description>
  19471. <addressOffset>0x58</addressOffset>
  19472. <size>0x20</size>
  19473. <access>read-write</access>
  19474. <resetValue>0x0000FFFF</resetValue>
  19475. <fields>
  19476. <field> <name>MACA3H</name>
  19477. <description>no description available</description>
  19478. <bitOffset>0</bitOffset>
  19479. <bitWidth>16</bitWidth>
  19480. </field>
  19481. <field> <name>MBC</name>
  19482. <description>no description available</description>
  19483. <bitOffset>24</bitOffset>
  19484. <bitWidth>6</bitWidth>
  19485. </field>
  19486. <field> <name>SA</name>
  19487. <description>no description available</description>
  19488. <bitOffset>30</bitOffset>
  19489. <bitWidth>1</bitWidth>
  19490. </field>
  19491. <field> <name>AE</name>
  19492. <description>no description available</description>
  19493. <bitOffset>31</bitOffset>
  19494. <bitWidth>1</bitWidth>
  19495. </field>
  19496. </fields>
  19497. </register>
  19498. <register> <name>MACA3LR</name>
  19499. <displayName>MACA3LR</displayName>
  19500. <description>Ethernet MAC address 3 low
  19501. register</description>
  19502. <addressOffset>0x5C</addressOffset>
  19503. <size>0x20</size>
  19504. <access>read-write</access>
  19505. <resetValue>0xFFFFFFFF</resetValue>
  19506. <fields>
  19507. <field> <name>MBCA3L</name>
  19508. <description>no description available</description>
  19509. <bitOffset>0</bitOffset>
  19510. <bitWidth>32</bitWidth>
  19511. </field>
  19512. </fields>
  19513. </register>
  19514. </registers>
  19515. </peripheral>
  19516. <peripheral> <name>Ethernet_MMC</name>
  19517. <description>Ethernet: MAC management counters</description>
  19518. <groupName>Ethernet</groupName>
  19519. <baseAddress>0x40028100</baseAddress>
  19520. <addressBlock>
  19521. <offset>0x0</offset>
  19522. <size>0x400</size>
  19523. <usage>registers</usage>
  19524. </addressBlock>
  19525. <registers>
  19526. <register> <name>MMCCR</name>
  19527. <displayName>MMCCR</displayName>
  19528. <description>Ethernet MMC control register</description>
  19529. <addressOffset>0x0</addressOffset>
  19530. <size>0x20</size>
  19531. <access>read-write</access>
  19532. <resetValue>0x00000000</resetValue>
  19533. <fields>
  19534. <field> <name>CR</name>
  19535. <description>no description available</description>
  19536. <bitOffset>0</bitOffset>
  19537. <bitWidth>1</bitWidth>
  19538. </field>
  19539. <field> <name>CSR</name>
  19540. <description>no description available</description>
  19541. <bitOffset>1</bitOffset>
  19542. <bitWidth>1</bitWidth>
  19543. </field>
  19544. <field> <name>ROR</name>
  19545. <description>no description available</description>
  19546. <bitOffset>2</bitOffset>
  19547. <bitWidth>1</bitWidth>
  19548. </field>
  19549. <field> <name>MCF</name>
  19550. <description>no description available</description>
  19551. <bitOffset>3</bitOffset>
  19552. <bitWidth>1</bitWidth>
  19553. </field>
  19554. <field> <name>MCP</name>
  19555. <description>no description available</description>
  19556. <bitOffset>4</bitOffset>
  19557. <bitWidth>1</bitWidth>
  19558. </field>
  19559. <field> <name>MCFHP</name>
  19560. <description>no description available</description>
  19561. <bitOffset>5</bitOffset>
  19562. <bitWidth>1</bitWidth>
  19563. </field>
  19564. </fields>
  19565. </register>
  19566. <register> <name>MMCRIR</name>
  19567. <displayName>MMCRIR</displayName>
  19568. <description>Ethernet MMC receive interrupt
  19569. register</description>
  19570. <addressOffset>0x4</addressOffset>
  19571. <size>0x20</size>
  19572. <access>read-write</access>
  19573. <resetValue>0x00000000</resetValue>
  19574. <fields>
  19575. <field> <name>RFCES</name>
  19576. <description>no description available</description>
  19577. <bitOffset>5</bitOffset>
  19578. <bitWidth>1</bitWidth>
  19579. </field>
  19580. <field> <name>RFAES</name>
  19581. <description>no description available</description>
  19582. <bitOffset>6</bitOffset>
  19583. <bitWidth>1</bitWidth>
  19584. </field>
  19585. <field> <name>RGUFS</name>
  19586. <description>no description available</description>
  19587. <bitOffset>17</bitOffset>
  19588. <bitWidth>1</bitWidth>
  19589. </field>
  19590. </fields>
  19591. </register>
  19592. <register> <name>MMCTIR</name>
  19593. <displayName>MMCTIR</displayName>
  19594. <description>Ethernet MMC transmit interrupt
  19595. register</description>
  19596. <addressOffset>0x8</addressOffset>
  19597. <size>0x20</size>
  19598. <access>read-only</access>
  19599. <resetValue>0x00000000</resetValue>
  19600. <fields>
  19601. <field> <name>TGFSCS</name>
  19602. <description>no description available</description>
  19603. <bitOffset>14</bitOffset>
  19604. <bitWidth>1</bitWidth>
  19605. </field>
  19606. <field> <name>TGFMSCS</name>
  19607. <description>no description available</description>
  19608. <bitOffset>15</bitOffset>
  19609. <bitWidth>1</bitWidth>
  19610. </field>
  19611. <field> <name>TGFS</name>
  19612. <description>no description available</description>
  19613. <bitOffset>21</bitOffset>
  19614. <bitWidth>1</bitWidth>
  19615. </field>
  19616. </fields>
  19617. </register>
  19618. <register> <name>MMCRIMR</name>
  19619. <displayName>MMCRIMR</displayName>
  19620. <description>Ethernet MMC receive interrupt mask
  19621. register</description>
  19622. <addressOffset>0xC</addressOffset>
  19623. <size>0x20</size>
  19624. <access>read-write</access>
  19625. <resetValue>0x00000000</resetValue>
  19626. <fields>
  19627. <field> <name>RFCEM</name>
  19628. <description>no description available</description>
  19629. <bitOffset>5</bitOffset>
  19630. <bitWidth>1</bitWidth>
  19631. </field>
  19632. <field> <name>RFAEM</name>
  19633. <description>no description available</description>
  19634. <bitOffset>6</bitOffset>
  19635. <bitWidth>1</bitWidth>
  19636. </field>
  19637. <field> <name>RGUFM</name>
  19638. <description>no description available</description>
  19639. <bitOffset>17</bitOffset>
  19640. <bitWidth>1</bitWidth>
  19641. </field>
  19642. </fields>
  19643. </register>
  19644. <register> <name>MMCTIMR</name>
  19645. <displayName>MMCTIMR</displayName>
  19646. <description>Ethernet MMC transmit interrupt mask
  19647. register</description>
  19648. <addressOffset>0x10</addressOffset>
  19649. <size>0x20</size>
  19650. <access>read-write</access>
  19651. <resetValue>0x00000000</resetValue>
  19652. <fields>
  19653. <field> <name>TGFSCM</name>
  19654. <description>no description available</description>
  19655. <bitOffset>14</bitOffset>
  19656. <bitWidth>1</bitWidth>
  19657. </field>
  19658. <field> <name>TGFMSCM</name>
  19659. <description>no description available</description>
  19660. <bitOffset>15</bitOffset>
  19661. <bitWidth>1</bitWidth>
  19662. </field>
  19663. <field> <name>TGFM</name>
  19664. <description>no description available</description>
  19665. <bitOffset>16</bitOffset>
  19666. <bitWidth>1</bitWidth>
  19667. </field>
  19668. </fields>
  19669. </register>
  19670. <register> <name>MMCTGFSCCR</name>
  19671. <displayName>MMCTGFSCCR</displayName>
  19672. <description>Ethernet MMC transmitted good frames after a
  19673. single collision counter</description>
  19674. <addressOffset>0x4C</addressOffset>
  19675. <size>0x20</size>
  19676. <access>read-only</access>
  19677. <resetValue>0x00000000</resetValue>
  19678. <fields>
  19679. <field> <name>TGFSCC</name>
  19680. <description>no description available</description>
  19681. <bitOffset>0</bitOffset>
  19682. <bitWidth>32</bitWidth>
  19683. </field>
  19684. </fields>
  19685. </register>
  19686. <register> <name>MMCTGFMSCCR</name>
  19687. <displayName>MMCTGFMSCCR</displayName>
  19688. <description>Ethernet MMC transmitted good frames after
  19689. more than a single collision</description>
  19690. <addressOffset>0x50</addressOffset>
  19691. <size>0x20</size>
  19692. <access>read-only</access>
  19693. <resetValue>0x00000000</resetValue>
  19694. <fields>
  19695. <field> <name>TGFMSCC</name>
  19696. <description>no description available</description>
  19697. <bitOffset>0</bitOffset>
  19698. <bitWidth>32</bitWidth>
  19699. </field>
  19700. </fields>
  19701. </register>
  19702. <register> <name>MMCTGFCR</name>
  19703. <displayName>MMCTGFCR</displayName>
  19704. <description>Ethernet MMC transmitted good frames counter
  19705. register</description>
  19706. <addressOffset>0x68</addressOffset>
  19707. <size>0x20</size>
  19708. <access>read-only</access>
  19709. <resetValue>0x00000000</resetValue>
  19710. <fields>
  19711. <field> <name>TGFC</name>
  19712. <description>HTL</description>
  19713. <bitOffset>0</bitOffset>
  19714. <bitWidth>32</bitWidth>
  19715. </field>
  19716. </fields>
  19717. </register>
  19718. <register> <name>MMCRFCECR</name>
  19719. <displayName>MMCRFCECR</displayName>
  19720. <description>Ethernet MMC received frames with CRC error
  19721. counter register</description>
  19722. <addressOffset>0x94</addressOffset>
  19723. <size>0x20</size>
  19724. <access>read-only</access>
  19725. <resetValue>0x00000000</resetValue>
  19726. <fields>
  19727. <field> <name>RFCFC</name>
  19728. <description>no description available</description>
  19729. <bitOffset>0</bitOffset>
  19730. <bitWidth>32</bitWidth>
  19731. </field>
  19732. </fields>
  19733. </register>
  19734. <register> <name>MMCRFAECR</name>
  19735. <displayName>MMCRFAECR</displayName>
  19736. <description>Ethernet MMC received frames with alignment
  19737. error counter register</description>
  19738. <addressOffset>0x98</addressOffset>
  19739. <size>0x20</size>
  19740. <access>read-only</access>
  19741. <resetValue>0x00000000</resetValue>
  19742. <fields>
  19743. <field> <name>RFAEC</name>
  19744. <description>no description available</description>
  19745. <bitOffset>0</bitOffset>
  19746. <bitWidth>32</bitWidth>
  19747. </field>
  19748. </fields>
  19749. </register>
  19750. <register> <name>MMCRGUFCR</name>
  19751. <displayName>MMCRGUFCR</displayName>
  19752. <description>MMC received good unicast frames counter
  19753. register</description>
  19754. <addressOffset>0xC4</addressOffset>
  19755. <size>0x20</size>
  19756. <access>read-only</access>
  19757. <resetValue>0x00000000</resetValue>
  19758. <fields>
  19759. <field> <name>RGUFC</name>
  19760. <description>no description available</description>
  19761. <bitOffset>0</bitOffset>
  19762. <bitWidth>32</bitWidth>
  19763. </field>
  19764. </fields>
  19765. </register>
  19766. </registers>
  19767. </peripheral>
  19768. <peripheral> <name>Ethernet_PTP</name>
  19769. <description>Ethernet: Precision time protocol</description>
  19770. <groupName>Ethernet</groupName>
  19771. <baseAddress>0x40028700</baseAddress>
  19772. <addressBlock>
  19773. <offset>0x0</offset>
  19774. <size>0x400</size>
  19775. <usage>registers</usage>
  19776. </addressBlock>
  19777. <registers>
  19778. <register> <name>PTPTSCR</name>
  19779. <displayName>PTPTSCR</displayName>
  19780. <description>Ethernet PTP time stamp control
  19781. register</description>
  19782. <addressOffset>0x0</addressOffset>
  19783. <size>0x20</size>
  19784. <access>read-write</access>
  19785. <resetValue>0x00002000</resetValue>
  19786. <fields>
  19787. <field> <name>TSE</name>
  19788. <description>no description available</description>
  19789. <bitOffset>0</bitOffset>
  19790. <bitWidth>1</bitWidth>
  19791. </field>
  19792. <field> <name>TSFCU</name>
  19793. <description>no description available</description>
  19794. <bitOffset>1</bitOffset>
  19795. <bitWidth>1</bitWidth>
  19796. </field>
  19797. <field> <name>TSPTPPSV2E</name>
  19798. <description>no description available</description>
  19799. <bitOffset>10</bitOffset>
  19800. <bitWidth>1</bitWidth>
  19801. </field>
  19802. <field> <name>TSSPTPOEFE</name>
  19803. <description>no description available</description>
  19804. <bitOffset>11</bitOffset>
  19805. <bitWidth>1</bitWidth>
  19806. </field>
  19807. <field> <name>TSSIPV6FE</name>
  19808. <description>no description available</description>
  19809. <bitOffset>12</bitOffset>
  19810. <bitWidth>1</bitWidth>
  19811. </field>
  19812. <field> <name>TSSIPV4FE</name>
  19813. <description>no description available</description>
  19814. <bitOffset>13</bitOffset>
  19815. <bitWidth>1</bitWidth>
  19816. </field>
  19817. <field> <name>TSSEME</name>
  19818. <description>no description available</description>
  19819. <bitOffset>14</bitOffset>
  19820. <bitWidth>1</bitWidth>
  19821. </field>
  19822. <field> <name>TSSMRME</name>
  19823. <description>no description available</description>
  19824. <bitOffset>15</bitOffset>
  19825. <bitWidth>1</bitWidth>
  19826. </field>
  19827. <field> <name>TSCNT</name>
  19828. <description>no description available</description>
  19829. <bitOffset>16</bitOffset>
  19830. <bitWidth>2</bitWidth>
  19831. </field>
  19832. <field> <name>TSPFFMAE</name>
  19833. <description>no description available</description>
  19834. <bitOffset>18</bitOffset>
  19835. <bitWidth>1</bitWidth>
  19836. </field>
  19837. <field> <name>TSSTI</name>
  19838. <description>no description available</description>
  19839. <bitOffset>2</bitOffset>
  19840. <bitWidth>1</bitWidth>
  19841. </field>
  19842. <field> <name>TSSTU</name>
  19843. <description>no description available</description>
  19844. <bitOffset>3</bitOffset>
  19845. <bitWidth>1</bitWidth>
  19846. </field>
  19847. <field> <name>TSITE</name>
  19848. <description>no description available</description>
  19849. <bitOffset>4</bitOffset>
  19850. <bitWidth>1</bitWidth>
  19851. </field>
  19852. <field> <name>TTSARU</name>
  19853. <description>no description available</description>
  19854. <bitOffset>5</bitOffset>
  19855. <bitWidth>1</bitWidth>
  19856. </field>
  19857. <field> <name>TSSARFE</name>
  19858. <description>no description available</description>
  19859. <bitOffset>8</bitOffset>
  19860. <bitWidth>1</bitWidth>
  19861. </field>
  19862. <field> <name>TSSSR</name>
  19863. <description>no description available</description>
  19864. <bitOffset>9</bitOffset>
  19865. <bitWidth>1</bitWidth>
  19866. </field>
  19867. </fields>
  19868. </register>
  19869. <register> <name>PTPSSIR</name>
  19870. <displayName>PTPSSIR</displayName>
  19871. <description>Ethernet PTP subsecond increment
  19872. register</description>
  19873. <addressOffset>0x4</addressOffset>
  19874. <size>0x20</size>
  19875. <access>read-write</access>
  19876. <resetValue>0x00000000</resetValue>
  19877. <fields>
  19878. <field> <name>STSSI</name>
  19879. <description>no description available</description>
  19880. <bitOffset>0</bitOffset>
  19881. <bitWidth>8</bitWidth>
  19882. </field>
  19883. </fields>
  19884. </register>
  19885. <register> <name>PTPTSHR</name>
  19886. <displayName>PTPTSHR</displayName>
  19887. <description>Ethernet PTP time stamp high
  19888. register</description>
  19889. <addressOffset>0x8</addressOffset>
  19890. <size>0x20</size>
  19891. <access>read-only</access>
  19892. <resetValue>0x00000000</resetValue>
  19893. <fields>
  19894. <field> <name>STS</name>
  19895. <description>no description available</description>
  19896. <bitOffset>0</bitOffset>
  19897. <bitWidth>32</bitWidth>
  19898. </field>
  19899. </fields>
  19900. </register>
  19901. <register> <name>PTPTSLR</name>
  19902. <displayName>PTPTSLR</displayName>
  19903. <description>Ethernet PTP time stamp low
  19904. register</description>
  19905. <addressOffset>0xC</addressOffset>
  19906. <size>0x20</size>
  19907. <access>read-only</access>
  19908. <resetValue>0x00000000</resetValue>
  19909. <fields>
  19910. <field> <name>STSS</name>
  19911. <description>no description available</description>
  19912. <bitOffset>0</bitOffset>
  19913. <bitWidth>31</bitWidth>
  19914. </field>
  19915. <field> <name>STPNS</name>
  19916. <description>no description available</description>
  19917. <bitOffset>31</bitOffset>
  19918. <bitWidth>1</bitWidth>
  19919. </field>
  19920. </fields>
  19921. </register>
  19922. <register> <name>PTPTSHUR</name>
  19923. <displayName>PTPTSHUR</displayName>
  19924. <description>Ethernet PTP time stamp high update
  19925. register</description>
  19926. <addressOffset>0x10</addressOffset>
  19927. <size>0x20</size>
  19928. <access>read-write</access>
  19929. <resetValue>0x00000000</resetValue>
  19930. <fields>
  19931. <field> <name>TSUS</name>
  19932. <description>no description available</description>
  19933. <bitOffset>0</bitOffset>
  19934. <bitWidth>32</bitWidth>
  19935. </field>
  19936. </fields>
  19937. </register>
  19938. <register> <name>PTPTSLUR</name>
  19939. <displayName>PTPTSLUR</displayName>
  19940. <description>Ethernet PTP time stamp low update
  19941. register</description>
  19942. <addressOffset>0x14</addressOffset>
  19943. <size>0x20</size>
  19944. <access>read-write</access>
  19945. <resetValue>0x00000000</resetValue>
  19946. <fields>
  19947. <field> <name>TSUSS</name>
  19948. <description>no description available</description>
  19949. <bitOffset>0</bitOffset>
  19950. <bitWidth>31</bitWidth>
  19951. </field>
  19952. <field> <name>TSUPNS</name>
  19953. <description>no description available</description>
  19954. <bitOffset>31</bitOffset>
  19955. <bitWidth>1</bitWidth>
  19956. </field>
  19957. </fields>
  19958. </register>
  19959. <register> <name>PTPTSAR</name>
  19960. <displayName>PTPTSAR</displayName>
  19961. <description>Ethernet PTP time stamp addend
  19962. register</description>
  19963. <addressOffset>0x18</addressOffset>
  19964. <size>0x20</size>
  19965. <access>read-write</access>
  19966. <resetValue>0x00000000</resetValue>
  19967. <fields>
  19968. <field> <name>TSA</name>
  19969. <description>no description available</description>
  19970. <bitOffset>0</bitOffset>
  19971. <bitWidth>32</bitWidth>
  19972. </field>
  19973. </fields>
  19974. </register>
  19975. <register> <name>PTPTTHR</name>
  19976. <displayName>PTPTTHR</displayName>
  19977. <description>Ethernet PTP target time high
  19978. register</description>
  19979. <addressOffset>0x1C</addressOffset>
  19980. <size>0x20</size>
  19981. <access>read-write</access>
  19982. <resetValue>0x00000000</resetValue>
  19983. <fields>
  19984. <field> <name>TTSH</name>
  19985. <description>0</description>
  19986. <bitOffset>0</bitOffset>
  19987. <bitWidth>32</bitWidth>
  19988. </field>
  19989. </fields>
  19990. </register>
  19991. <register> <name>PTPTTLR</name>
  19992. <displayName>PTPTTLR</displayName>
  19993. <description>Ethernet PTP target time low
  19994. register</description>
  19995. <addressOffset>0x20</addressOffset>
  19996. <size>0x20</size>
  19997. <access>read-write</access>
  19998. <resetValue>0x00000000</resetValue>
  19999. <fields>
  20000. <field> <name>TTSL</name>
  20001. <description>no description available</description>
  20002. <bitOffset>0</bitOffset>
  20003. <bitWidth>32</bitWidth>
  20004. </field>
  20005. </fields>
  20006. </register>
  20007. <register> <name>PTPTSSR</name>
  20008. <displayName>PTPTSSR</displayName>
  20009. <description>Ethernet PTP time stamp status
  20010. register</description>
  20011. <addressOffset>0x28</addressOffset>
  20012. <size>0x20</size>
  20013. <access>read-only</access>
  20014. <resetValue>0x00000000</resetValue>
  20015. <fields>
  20016. <field> <name>TSSO</name>
  20017. <description>no description available</description>
  20018. <bitOffset>0</bitOffset>
  20019. <bitWidth>1</bitWidth>
  20020. </field>
  20021. <field> <name>TSTTR</name>
  20022. <description>no description available</description>
  20023. <bitOffset>1</bitOffset>
  20024. <bitWidth>1</bitWidth>
  20025. </field>
  20026. </fields>
  20027. </register>
  20028. <register> <name>PTPPPSCR</name>
  20029. <displayName>PTPPPSCR</displayName>
  20030. <description>Ethernet PTP PPS control
  20031. register</description>
  20032. <addressOffset>0x2C</addressOffset>
  20033. <size>0x20</size>
  20034. <access>read-only</access>
  20035. <resetValue>0x00000000</resetValue>
  20036. <fields>
  20037. <field> <name>TSSO</name>
  20038. <description>TSSO</description>
  20039. <bitOffset>0</bitOffset>
  20040. <bitWidth>1</bitWidth>
  20041. </field>
  20042. <field> <name>TSTTR</name>
  20043. <description>TSTTR</description>
  20044. <bitOffset>1</bitOffset>
  20045. <bitWidth>1</bitWidth>
  20046. </field>
  20047. </fields>
  20048. </register>
  20049. </registers>
  20050. </peripheral>
  20051. <peripheral> <name>Ethernet_DMA</name>
  20052. <description>Ethernet: DMA controller operation</description>
  20053. <groupName>Ethernet</groupName>
  20054. <baseAddress>0x40029000</baseAddress>
  20055. <addressBlock>
  20056. <offset>0x0</offset>
  20057. <size>0x400</size>
  20058. <usage>registers</usage>
  20059. </addressBlock>
  20060. <registers>
  20061. <register> <name>DMABMR</name>
  20062. <displayName>DMABMR</displayName>
  20063. <description>Ethernet DMA bus mode register</description>
  20064. <addressOffset>0x0</addressOffset>
  20065. <size>0x20</size>
  20066. <access>read-write</access>
  20067. <resetValue>0x00002101</resetValue>
  20068. <fields>
  20069. <field> <name>SR</name>
  20070. <description>no description available</description>
  20071. <bitOffset>0</bitOffset>
  20072. <bitWidth>1</bitWidth>
  20073. </field>
  20074. <field> <name>DA</name>
  20075. <description>no description available</description>
  20076. <bitOffset>1</bitOffset>
  20077. <bitWidth>1</bitWidth>
  20078. </field>
  20079. <field> <name>DSL</name>
  20080. <description>no description available</description>
  20081. <bitOffset>2</bitOffset>
  20082. <bitWidth>5</bitWidth>
  20083. </field>
  20084. <field> <name>EDFE</name>
  20085. <description>no description available</description>
  20086. <bitOffset>7</bitOffset>
  20087. <bitWidth>1</bitWidth>
  20088. </field>
  20089. <field> <name>PBL</name>
  20090. <description>no description available</description>
  20091. <bitOffset>8</bitOffset>
  20092. <bitWidth>6</bitWidth>
  20093. </field>
  20094. <field> <name>RTPR</name>
  20095. <description>no description available</description>
  20096. <bitOffset>14</bitOffset>
  20097. <bitWidth>2</bitWidth>
  20098. </field>
  20099. <field> <name>FB</name>
  20100. <description>no description available</description>
  20101. <bitOffset>16</bitOffset>
  20102. <bitWidth>1</bitWidth>
  20103. </field>
  20104. <field> <name>RDP</name>
  20105. <description>no description available</description>
  20106. <bitOffset>17</bitOffset>
  20107. <bitWidth>6</bitWidth>
  20108. </field>
  20109. <field> <name>USP</name>
  20110. <description>no description available</description>
  20111. <bitOffset>23</bitOffset>
  20112. <bitWidth>1</bitWidth>
  20113. </field>
  20114. <field> <name>FPM</name>
  20115. <description>no description available</description>
  20116. <bitOffset>24</bitOffset>
  20117. <bitWidth>1</bitWidth>
  20118. </field>
  20119. <field> <name>AAB</name>
  20120. <description>no description available</description>
  20121. <bitOffset>25</bitOffset>
  20122. <bitWidth>1</bitWidth>
  20123. </field>
  20124. <field> <name>MB</name>
  20125. <description>no description available</description>
  20126. <bitOffset>26</bitOffset>
  20127. <bitWidth>1</bitWidth>
  20128. </field>
  20129. </fields>
  20130. </register>
  20131. <register> <name>DMATPDR</name>
  20132. <displayName>DMATPDR</displayName>
  20133. <description>Ethernet DMA transmit poll demand
  20134. register</description>
  20135. <addressOffset>0x4</addressOffset>
  20136. <size>0x20</size>
  20137. <access>read-write</access>
  20138. <resetValue>0x00000000</resetValue>
  20139. <fields>
  20140. <field> <name>TPD</name>
  20141. <description>no description available</description>
  20142. <bitOffset>0</bitOffset>
  20143. <bitWidth>32</bitWidth>
  20144. </field>
  20145. </fields>
  20146. </register>
  20147. <register> <name>DMARPDR</name>
  20148. <displayName>DMARPDR</displayName>
  20149. <description>EHERNET DMA receive poll demand
  20150. register</description>
  20151. <addressOffset>0x8</addressOffset>
  20152. <size>0x20</size>
  20153. <access>read-write</access>
  20154. <resetValue>0x00000000</resetValue>
  20155. <fields>
  20156. <field> <name>RPD</name>
  20157. <description>RPD</description>
  20158. <bitOffset>0</bitOffset>
  20159. <bitWidth>32</bitWidth>
  20160. </field>
  20161. </fields>
  20162. </register>
  20163. <register> <name>DMARDLAR</name>
  20164. <displayName>DMARDLAR</displayName>
  20165. <description>Ethernet DMA receive descriptor list address
  20166. register</description>
  20167. <addressOffset>0xC</addressOffset>
  20168. <size>0x20</size>
  20169. <access>read-write</access>
  20170. <resetValue>0x00000000</resetValue>
  20171. <fields>
  20172. <field> <name>SRL</name>
  20173. <description>no description available</description>
  20174. <bitOffset>0</bitOffset>
  20175. <bitWidth>32</bitWidth>
  20176. </field>
  20177. </fields>
  20178. </register>
  20179. <register> <name>DMATDLAR</name>
  20180. <displayName>DMATDLAR</displayName>
  20181. <description>Ethernet DMA transmit descriptor list
  20182. address register</description>
  20183. <addressOffset>0x10</addressOffset>
  20184. <size>0x20</size>
  20185. <access>read-write</access>
  20186. <resetValue>0x00000000</resetValue>
  20187. <fields>
  20188. <field> <name>STL</name>
  20189. <description>no description available</description>
  20190. <bitOffset>0</bitOffset>
  20191. <bitWidth>32</bitWidth>
  20192. </field>
  20193. </fields>
  20194. </register>
  20195. <register> <name>DMASR</name>
  20196. <displayName>DMASR</displayName>
  20197. <description>Ethernet DMA status register</description>
  20198. <addressOffset>0x14</addressOffset>
  20199. <size>0x20</size>
  20200. <resetValue>0x00000000</resetValue>
  20201. <fields>
  20202. <field> <name>TS</name>
  20203. <description>no description available</description>
  20204. <bitOffset>0</bitOffset>
  20205. <bitWidth>1</bitWidth>
  20206. <access>read-write</access>
  20207. </field>
  20208. <field> <name>TPSS</name>
  20209. <description>no description available</description>
  20210. <bitOffset>1</bitOffset>
  20211. <bitWidth>1</bitWidth>
  20212. <access>read-write</access>
  20213. </field>
  20214. <field> <name>TBUS</name>
  20215. <description>no description available</description>
  20216. <bitOffset>2</bitOffset>
  20217. <bitWidth>1</bitWidth>
  20218. <access>read-write</access>
  20219. </field>
  20220. <field> <name>TJTS</name>
  20221. <description>no description available</description>
  20222. <bitOffset>3</bitOffset>
  20223. <bitWidth>1</bitWidth>
  20224. <access>read-write</access>
  20225. </field>
  20226. <field> <name>ROS</name>
  20227. <description>no description available</description>
  20228. <bitOffset>4</bitOffset>
  20229. <bitWidth>1</bitWidth>
  20230. <access>read-write</access>
  20231. </field>
  20232. <field> <name>TUS</name>
  20233. <description>no description available</description>
  20234. <bitOffset>5</bitOffset>
  20235. <bitWidth>1</bitWidth>
  20236. <access>read-write</access>
  20237. </field>
  20238. <field> <name>RS</name>
  20239. <description>no description available</description>
  20240. <bitOffset>6</bitOffset>
  20241. <bitWidth>1</bitWidth>
  20242. <access>read-write</access>
  20243. </field>
  20244. <field> <name>RBUS</name>
  20245. <description>no description available</description>
  20246. <bitOffset>7</bitOffset>
  20247. <bitWidth>1</bitWidth>
  20248. <access>read-write</access>
  20249. </field>
  20250. <field> <name>RPSS</name>
  20251. <description>no description available</description>
  20252. <bitOffset>8</bitOffset>
  20253. <bitWidth>1</bitWidth>
  20254. <access>read-write</access>
  20255. </field>
  20256. <field> <name>PWTS</name>
  20257. <description>no description available</description>
  20258. <bitOffset>9</bitOffset>
  20259. <bitWidth>1</bitWidth>
  20260. <access>read-write</access>
  20261. </field>
  20262. <field> <name>ETS</name>
  20263. <description>no description available</description>
  20264. <bitOffset>10</bitOffset>
  20265. <bitWidth>1</bitWidth>
  20266. <access>read-write</access>
  20267. </field>
  20268. <field> <name>FBES</name>
  20269. <description>no description available</description>
  20270. <bitOffset>13</bitOffset>
  20271. <bitWidth>1</bitWidth>
  20272. <access>read-write</access>
  20273. </field>
  20274. <field> <name>ERS</name>
  20275. <description>no description available</description>
  20276. <bitOffset>14</bitOffset>
  20277. <bitWidth>1</bitWidth>
  20278. <access>read-write</access>
  20279. </field>
  20280. <field> <name>AIS</name>
  20281. <description>no description available</description>
  20282. <bitOffset>15</bitOffset>
  20283. <bitWidth>1</bitWidth>
  20284. <access>read-write</access>
  20285. </field>
  20286. <field> <name>NIS</name>
  20287. <description>no description available</description>
  20288. <bitOffset>16</bitOffset>
  20289. <bitWidth>1</bitWidth>
  20290. <access>read-write</access>
  20291. </field>
  20292. <field> <name>RPS</name>
  20293. <description>no description available</description>
  20294. <bitOffset>17</bitOffset>
  20295. <bitWidth>3</bitWidth>
  20296. <access>read-only</access>
  20297. </field>
  20298. <field> <name>TPS</name>
  20299. <description>no description available</description>
  20300. <bitOffset>20</bitOffset>
  20301. <bitWidth>3</bitWidth>
  20302. <access>read-only</access>
  20303. </field>
  20304. <field> <name>EBS</name>
  20305. <description>no description available</description>
  20306. <bitOffset>23</bitOffset>
  20307. <bitWidth>3</bitWidth>
  20308. <access>read-only</access>
  20309. </field>
  20310. <field> <name>MMCS</name>
  20311. <description>no description available</description>
  20312. <bitOffset>27</bitOffset>
  20313. <bitWidth>1</bitWidth>
  20314. <access>read-only</access>
  20315. </field>
  20316. <field> <name>PMTS</name>
  20317. <description>no description available</description>
  20318. <bitOffset>28</bitOffset>
  20319. <bitWidth>1</bitWidth>
  20320. <access>read-only</access>
  20321. </field>
  20322. <field> <name>TSTS</name>
  20323. <description>no description available</description>
  20324. <bitOffset>29</bitOffset>
  20325. <bitWidth>1</bitWidth>
  20326. <access>read-only</access>
  20327. </field>
  20328. </fields>
  20329. </register>
  20330. <register> <name>DMAOMR</name>
  20331. <displayName>DMAOMR</displayName>
  20332. <description>Ethernet DMA operation mode
  20333. register</description>
  20334. <addressOffset>0x18</addressOffset>
  20335. <size>0x20</size>
  20336. <access>read-write</access>
  20337. <resetValue>0x00000000</resetValue>
  20338. <fields>
  20339. <field> <name>SR</name>
  20340. <description>SR</description>
  20341. <bitOffset>1</bitOffset>
  20342. <bitWidth>1</bitWidth>
  20343. </field>
  20344. <field> <name>OSF</name>
  20345. <description>OSF</description>
  20346. <bitOffset>2</bitOffset>
  20347. <bitWidth>1</bitWidth>
  20348. </field>
  20349. <field> <name>RTC</name>
  20350. <description>RTC</description>
  20351. <bitOffset>3</bitOffset>
  20352. <bitWidth>2</bitWidth>
  20353. </field>
  20354. <field> <name>FUGF</name>
  20355. <description>FUGF</description>
  20356. <bitOffset>6</bitOffset>
  20357. <bitWidth>1</bitWidth>
  20358. </field>
  20359. <field> <name>FEF</name>
  20360. <description>FEF</description>
  20361. <bitOffset>7</bitOffset>
  20362. <bitWidth>1</bitWidth>
  20363. </field>
  20364. <field> <name>ST</name>
  20365. <description>ST</description>
  20366. <bitOffset>13</bitOffset>
  20367. <bitWidth>1</bitWidth>
  20368. </field>
  20369. <field> <name>TTC</name>
  20370. <description>TTC</description>
  20371. <bitOffset>14</bitOffset>
  20372. <bitWidth>3</bitWidth>
  20373. </field>
  20374. <field> <name>FTF</name>
  20375. <description>FTF</description>
  20376. <bitOffset>20</bitOffset>
  20377. <bitWidth>1</bitWidth>
  20378. </field>
  20379. <field> <name>TSF</name>
  20380. <description>TSF</description>
  20381. <bitOffset>21</bitOffset>
  20382. <bitWidth>1</bitWidth>
  20383. </field>
  20384. <field> <name>DFRF</name>
  20385. <description>DFRF</description>
  20386. <bitOffset>24</bitOffset>
  20387. <bitWidth>1</bitWidth>
  20388. </field>
  20389. <field> <name>RSF</name>
  20390. <description>RSF</description>
  20391. <bitOffset>25</bitOffset>
  20392. <bitWidth>1</bitWidth>
  20393. </field>
  20394. <field> <name>DTCEFD</name>
  20395. <description>DTCEFD</description>
  20396. <bitOffset>26</bitOffset>
  20397. <bitWidth>1</bitWidth>
  20398. </field>
  20399. </fields>
  20400. </register>
  20401. <register> <name>DMAIER</name>
  20402. <displayName>DMAIER</displayName>
  20403. <description>Ethernet DMA interrupt enable
  20404. register</description>
  20405. <addressOffset>0x1C</addressOffset>
  20406. <size>0x20</size>
  20407. <access>read-write</access>
  20408. <resetValue>0x00000000</resetValue>
  20409. <fields>
  20410. <field> <name>TIE</name>
  20411. <description>no description available</description>
  20412. <bitOffset>0</bitOffset>
  20413. <bitWidth>1</bitWidth>
  20414. </field>
  20415. <field> <name>TPSIE</name>
  20416. <description>no description available</description>
  20417. <bitOffset>1</bitOffset>
  20418. <bitWidth>1</bitWidth>
  20419. </field>
  20420. <field> <name>TBUIE</name>
  20421. <description>no description available</description>
  20422. <bitOffset>2</bitOffset>
  20423. <bitWidth>1</bitWidth>
  20424. </field>
  20425. <field> <name>TJTIE</name>
  20426. <description>no description available</description>
  20427. <bitOffset>3</bitOffset>
  20428. <bitWidth>1</bitWidth>
  20429. </field>
  20430. <field> <name>ROIE</name>
  20431. <description>no description available</description>
  20432. <bitOffset>4</bitOffset>
  20433. <bitWidth>1</bitWidth>
  20434. </field>
  20435. <field> <name>TUIE</name>
  20436. <description>no description available</description>
  20437. <bitOffset>5</bitOffset>
  20438. <bitWidth>1</bitWidth>
  20439. </field>
  20440. <field> <name>RIE</name>
  20441. <description>no description available</description>
  20442. <bitOffset>6</bitOffset>
  20443. <bitWidth>1</bitWidth>
  20444. </field>
  20445. <field> <name>RBUIE</name>
  20446. <description>no description available</description>
  20447. <bitOffset>7</bitOffset>
  20448. <bitWidth>1</bitWidth>
  20449. </field>
  20450. <field> <name>RPSIE</name>
  20451. <description>no description available</description>
  20452. <bitOffset>8</bitOffset>
  20453. <bitWidth>1</bitWidth>
  20454. </field>
  20455. <field> <name>RWTIE</name>
  20456. <description>no description available</description>
  20457. <bitOffset>9</bitOffset>
  20458. <bitWidth>1</bitWidth>
  20459. </field>
  20460. <field> <name>ETIE</name>
  20461. <description>no description available</description>
  20462. <bitOffset>10</bitOffset>
  20463. <bitWidth>1</bitWidth>
  20464. </field>
  20465. <field> <name>FBEIE</name>
  20466. <description>no description available</description>
  20467. <bitOffset>13</bitOffset>
  20468. <bitWidth>1</bitWidth>
  20469. </field>
  20470. <field> <name>ERIE</name>
  20471. <description>no description available</description>
  20472. <bitOffset>14</bitOffset>
  20473. <bitWidth>1</bitWidth>
  20474. </field>
  20475. <field> <name>AISE</name>
  20476. <description>no description available</description>
  20477. <bitOffset>15</bitOffset>
  20478. <bitWidth>1</bitWidth>
  20479. </field>
  20480. <field> <name>NISE</name>
  20481. <description>no description available</description>
  20482. <bitOffset>16</bitOffset>
  20483. <bitWidth>1</bitWidth>
  20484. </field>
  20485. </fields>
  20486. </register>
  20487. <register> <name>DMAMFBOCR</name>
  20488. <displayName>DMAMFBOCR</displayName>
  20489. <description>Ethernet DMA missed frame and buffer
  20490. overflow counter register</description>
  20491. <addressOffset>0x20</addressOffset>
  20492. <size>0x20</size>
  20493. <access>read-write</access>
  20494. <resetValue>0x00000000</resetValue>
  20495. <fields>
  20496. <field> <name>MFC</name>
  20497. <description>no description available</description>
  20498. <bitOffset>0</bitOffset>
  20499. <bitWidth>16</bitWidth>
  20500. </field>
  20501. <field> <name>OMFC</name>
  20502. <description>no description available</description>
  20503. <bitOffset>16</bitOffset>
  20504. <bitWidth>1</bitWidth>
  20505. </field>
  20506. <field> <name>MFA</name>
  20507. <description>no description available</description>
  20508. <bitOffset>17</bitOffset>
  20509. <bitWidth>11</bitWidth>
  20510. </field>
  20511. <field> <name>OFOC</name>
  20512. <description>no description available</description>
  20513. <bitOffset>28</bitOffset>
  20514. <bitWidth>1</bitWidth>
  20515. </field>
  20516. </fields>
  20517. </register>
  20518. <register> <name>DMARSWTR</name>
  20519. <displayName>DMARSWTR</displayName>
  20520. <description>Ethernet DMA receive status watchdog timer
  20521. register</description>
  20522. <addressOffset>0x24</addressOffset>
  20523. <size>0x20</size>
  20524. <access>read-write</access>
  20525. <resetValue>0x00000000</resetValue>
  20526. <fields>
  20527. <field> <name>RSWTC</name>
  20528. <description>RSWTC</description>
  20529. <bitOffset>0</bitOffset>
  20530. <bitWidth>8</bitWidth>
  20531. </field>
  20532. </fields>
  20533. </register>
  20534. <register> <name>DMACHTDR</name>
  20535. <displayName>DMACHTDR</displayName>
  20536. <description>Ethernet DMA current host transmit
  20537. descriptor register</description>
  20538. <addressOffset>0x48</addressOffset>
  20539. <size>0x20</size>
  20540. <access>read-only</access>
  20541. <resetValue>0x00000000</resetValue>
  20542. <fields>
  20543. <field> <name>HTDAP</name>
  20544. <description>HTDAP</description>
  20545. <bitOffset>0</bitOffset>
  20546. <bitWidth>32</bitWidth>
  20547. </field>
  20548. </fields>
  20549. </register>
  20550. <register> <name>DMACHRDR</name>
  20551. <displayName>DMACHRDR</displayName>
  20552. <description>Ethernet DMA current host receive descriptor
  20553. register</description>
  20554. <addressOffset>0x4C</addressOffset>
  20555. <size>0x20</size>
  20556. <access>read-only</access>
  20557. <resetValue>0x00000000</resetValue>
  20558. <fields>
  20559. <field> <name>HRDAP</name>
  20560. <description>HRDAP</description>
  20561. <bitOffset>0</bitOffset>
  20562. <bitWidth>32</bitWidth>
  20563. </field>
  20564. </fields>
  20565. </register>
  20566. <register> <name>DMACHTBAR</name>
  20567. <displayName>DMACHTBAR</displayName>
  20568. <description>Ethernet DMA current host transmit buffer
  20569. address register</description>
  20570. <addressOffset>0x50</addressOffset>
  20571. <size>0x20</size>
  20572. <access>read-only</access>
  20573. <resetValue>0x00000000</resetValue>
  20574. <fields>
  20575. <field> <name>HTBAP</name>
  20576. <description>no description available</description>
  20577. <bitOffset>0</bitOffset>
  20578. <bitWidth>32</bitWidth>
  20579. </field>
  20580. </fields>
  20581. </register>
  20582. <register> <name>DMACHRBAR</name>
  20583. <displayName>DMACHRBAR</displayName>
  20584. <description>Ethernet DMA current host receive buffer
  20585. address register</description>
  20586. <addressOffset>0x54</addressOffset>
  20587. <size>0x20</size>
  20588. <access>read-only</access>
  20589. <resetValue>0x00000000</resetValue>
  20590. <fields>
  20591. <field> <name>HRBAP</name>
  20592. <description>no description available</description>
  20593. <bitOffset>0</bitOffset>
  20594. <bitWidth>32</bitWidth>
  20595. </field>
  20596. </fields>
  20597. </register>
  20598. </registers>
  20599. </peripheral>
  20600. <peripheral> <name>CRC</name>
  20601. <description>Cryptographic processor</description>
  20602. <groupName>CRC</groupName>
  20603. <baseAddress>0x40023000</baseAddress>
  20604. <addressBlock>
  20605. <offset>0x0</offset>
  20606. <size>0x400</size>
  20607. <usage>registers</usage>
  20608. </addressBlock>
  20609. <registers>
  20610. <register> <name>DR</name>
  20611. <displayName>DR</displayName>
  20612. <description>Data register</description>
  20613. <addressOffset>0x0</addressOffset>
  20614. <size>0x20</size>
  20615. <access>read-write</access>
  20616. <resetValue>0xFFFFFFFF</resetValue>
  20617. <fields>
  20618. <field> <name>DR</name>
  20619. <description>Data Register</description>
  20620. <bitOffset>0</bitOffset>
  20621. <bitWidth>32</bitWidth>
  20622. </field>
  20623. </fields>
  20624. </register>
  20625. <register> <name>IDR</name>
  20626. <displayName>IDR</displayName>
  20627. <description>Independent Data register</description>
  20628. <addressOffset>0x4</addressOffset>
  20629. <size>0x20</size>
  20630. <access>read-write</access>
  20631. <resetValue>0x00000000</resetValue>
  20632. <fields>
  20633. <field> <name>IDR</name>
  20634. <description>Independent Data register</description>
  20635. <bitOffset>0</bitOffset>
  20636. <bitWidth>8</bitWidth>
  20637. </field>
  20638. </fields>
  20639. </register>
  20640. <register> <name>CR</name>
  20641. <displayName>CR</displayName>
  20642. <description>Control register</description>
  20643. <addressOffset>0x8</addressOffset>
  20644. <size>0x20</size>
  20645. <access>write-only</access>
  20646. <resetValue>0x00000000</resetValue>
  20647. <fields>
  20648. <field> <name>CR</name>
  20649. <description>Control regidter</description>
  20650. <bitOffset>0</bitOffset>
  20651. <bitWidth>1</bitWidth>
  20652. </field>
  20653. </fields>
  20654. </register>
  20655. </registers>
  20656. </peripheral>
  20657. <peripheral> <name>OTG_FS_GLOBAL</name>
  20658. <description>USB on the go full speed</description>
  20659. <groupName>USB_OTG_FS</groupName>
  20660. <baseAddress>0x50000000</baseAddress>
  20661. <addressBlock>
  20662. <offset>0x0</offset>
  20663. <size>0x400</size>
  20664. <usage>registers</usage>
  20665. </addressBlock>
  20666. <interrupt>
  20667. <name>OTG_FS_WKUP</name>
  20668. <description>USB On-The-Go FS Wakeup through EXTI line
  20669. interrupt</description>
  20670. <value>42</value>
  20671. </interrupt>
  20672. <interrupt>
  20673. <name>OTG_FS</name>
  20674. <description>USB On The Go FS global
  20675. interrupt</description>
  20676. <value>67</value>
  20677. </interrupt>
  20678. <registers>
  20679. <register> <name>FS_GOTGCTL</name>
  20680. <displayName>FS_GOTGCTL</displayName>
  20681. <description>OTG_FS control and status register
  20682. (OTG_FS_GOTGCTL)</description>
  20683. <addressOffset>0x0</addressOffset>
  20684. <size>0x20</size>
  20685. <resetValue>0x00000800</resetValue>
  20686. <fields>
  20687. <field> <name>SRQSCS</name>
  20688. <description>Session request success</description>
  20689. <bitOffset>0</bitOffset>
  20690. <bitWidth>1</bitWidth>
  20691. <access>read-only</access>
  20692. </field>
  20693. <field> <name>SRQ</name>
  20694. <description>Session request</description>
  20695. <bitOffset>1</bitOffset>
  20696. <bitWidth>1</bitWidth>
  20697. <access>read-write</access>
  20698. </field>
  20699. <field> <name>HNGSCS</name>
  20700. <description>Host negotiation success</description>
  20701. <bitOffset>8</bitOffset>
  20702. <bitWidth>1</bitWidth>
  20703. <access>read-only</access>
  20704. </field>
  20705. <field> <name>HNPRQ</name>
  20706. <description>HNP request</description>
  20707. <bitOffset>9</bitOffset>
  20708. <bitWidth>1</bitWidth>
  20709. <access>read-write</access>
  20710. </field>
  20711. <field> <name>HSHNPEN</name>
  20712. <description>Host set HNP enable</description>
  20713. <bitOffset>10</bitOffset>
  20714. <bitWidth>1</bitWidth>
  20715. <access>read-write</access>
  20716. </field>
  20717. <field> <name>DHNPEN</name>
  20718. <description>Device HNP enabled</description>
  20719. <bitOffset>11</bitOffset>
  20720. <bitWidth>1</bitWidth>
  20721. <access>read-write</access>
  20722. </field>
  20723. <field> <name>CIDSTS</name>
  20724. <description>Connector ID status</description>
  20725. <bitOffset>16</bitOffset>
  20726. <bitWidth>1</bitWidth>
  20727. <access>read-only</access>
  20728. </field>
  20729. <field> <name>DBCT</name>
  20730. <description>Long/short debounce time</description>
  20731. <bitOffset>17</bitOffset>
  20732. <bitWidth>1</bitWidth>
  20733. <access>read-only</access>
  20734. </field>
  20735. <field> <name>ASVLD</name>
  20736. <description>A-session valid</description>
  20737. <bitOffset>18</bitOffset>
  20738. <bitWidth>1</bitWidth>
  20739. <access>read-only</access>
  20740. </field>
  20741. <field> <name>BSVLD</name>
  20742. <description>B-session valid</description>
  20743. <bitOffset>19</bitOffset>
  20744. <bitWidth>1</bitWidth>
  20745. <access>read-only</access>
  20746. </field>
  20747. </fields>
  20748. </register>
  20749. <register> <name>FS_GOTGINT</name>
  20750. <displayName>FS_GOTGINT</displayName>
  20751. <description>OTG_FS interrupt register
  20752. (OTG_FS_GOTGINT)</description>
  20753. <addressOffset>0x4</addressOffset>
  20754. <size>0x20</size>
  20755. <access>read-write</access>
  20756. <resetValue>0x00000000</resetValue>
  20757. <fields>
  20758. <field> <name>SEDET</name>
  20759. <description>Session end detected</description>
  20760. <bitOffset>2</bitOffset>
  20761. <bitWidth>1</bitWidth>
  20762. </field>
  20763. <field> <name>SRSSCHG</name>
  20764. <description>Session request success status
  20765. change</description>
  20766. <bitOffset>8</bitOffset>
  20767. <bitWidth>1</bitWidth>
  20768. </field>
  20769. <field> <name>HNSSCHG</name>
  20770. <description>Host negotiation success status
  20771. change</description>
  20772. <bitOffset>9</bitOffset>
  20773. <bitWidth>1</bitWidth>
  20774. </field>
  20775. <field> <name>HNGDET</name>
  20776. <description>Host negotiation detected</description>
  20777. <bitOffset>17</bitOffset>
  20778. <bitWidth>1</bitWidth>
  20779. </field>
  20780. <field> <name>ADTOCHG</name>
  20781. <description>A-device timeout change</description>
  20782. <bitOffset>18</bitOffset>
  20783. <bitWidth>1</bitWidth>
  20784. </field>
  20785. <field> <name>DBCDNE</name>
  20786. <description>Debounce done</description>
  20787. <bitOffset>19</bitOffset>
  20788. <bitWidth>1</bitWidth>
  20789. </field>
  20790. </fields>
  20791. </register>
  20792. <register> <name>FS_GAHBCFG</name>
  20793. <displayName>FS_GAHBCFG</displayName>
  20794. <description>OTG_FS AHB configuration register
  20795. (OTG_FS_GAHBCFG)</description>
  20796. <addressOffset>0x8</addressOffset>
  20797. <size>0x20</size>
  20798. <access>read-write</access>
  20799. <resetValue>0x00000000</resetValue>
  20800. <fields>
  20801. <field> <name>GINT</name>
  20802. <description>Global interrupt mask</description>
  20803. <bitOffset>0</bitOffset>
  20804. <bitWidth>1</bitWidth>
  20805. </field>
  20806. <field> <name>TXFELVL</name>
  20807. <description>TxFIFO empty level</description>
  20808. <bitOffset>7</bitOffset>
  20809. <bitWidth>1</bitWidth>
  20810. </field>
  20811. <field> <name>PTXFELVL</name>
  20812. <description>Periodic TxFIFO empty
  20813. level</description>
  20814. <bitOffset>8</bitOffset>
  20815. <bitWidth>1</bitWidth>
  20816. </field>
  20817. </fields>
  20818. </register>
  20819. <register> <name>FS_GUSBCFG</name>
  20820. <displayName>FS_GUSBCFG</displayName>
  20821. <description>OTG_FS USB configuration register
  20822. (OTG_FS_GUSBCFG)</description>
  20823. <addressOffset>0xC</addressOffset>
  20824. <size>0x20</size>
  20825. <resetValue>0x00000A00</resetValue>
  20826. <fields>
  20827. <field> <name>TOCAL</name>
  20828. <description>FS timeout calibration</description>
  20829. <bitOffset>0</bitOffset>
  20830. <bitWidth>3</bitWidth>
  20831. <access>read-write</access>
  20832. </field>
  20833. <field> <name>PHYSEL</name>
  20834. <description>Full Speed serial transceiver
  20835. select</description>
  20836. <bitOffset>6</bitOffset>
  20837. <bitWidth>1</bitWidth>
  20838. <access>write-only</access>
  20839. </field>
  20840. <field> <name>SRPCAP</name>
  20841. <description>SRP-capable</description>
  20842. <bitOffset>8</bitOffset>
  20843. <bitWidth>1</bitWidth>
  20844. <access>read-write</access>
  20845. </field>
  20846. <field> <name>HNPCAP</name>
  20847. <description>HNP-capable</description>
  20848. <bitOffset>9</bitOffset>
  20849. <bitWidth>1</bitWidth>
  20850. <access>read-write</access>
  20851. </field>
  20852. <field> <name>TRDT</name>
  20853. <description>USB turnaround time</description>
  20854. <bitOffset>10</bitOffset>
  20855. <bitWidth>4</bitWidth>
  20856. <access>read-write</access>
  20857. </field>
  20858. <field> <name>FHMOD</name>
  20859. <description>Force host mode</description>
  20860. <bitOffset>29</bitOffset>
  20861. <bitWidth>1</bitWidth>
  20862. <access>read-write</access>
  20863. </field>
  20864. <field> <name>FDMOD</name>
  20865. <description>Force device mode</description>
  20866. <bitOffset>30</bitOffset>
  20867. <bitWidth>1</bitWidth>
  20868. <access>read-write</access>
  20869. </field>
  20870. <field> <name>CTXPKT</name>
  20871. <description>Corrupt Tx packet</description>
  20872. <bitOffset>31</bitOffset>
  20873. <bitWidth>1</bitWidth>
  20874. <access>read-write</access>
  20875. </field>
  20876. </fields>
  20877. </register>
  20878. <register> <name>FS_GRSTCTL</name>
  20879. <displayName>FS_GRSTCTL</displayName>
  20880. <description>OTG_FS reset register
  20881. (OTG_FS_GRSTCTL)</description>
  20882. <addressOffset>0x10</addressOffset>
  20883. <size>0x20</size>
  20884. <resetValue>0x20000000</resetValue>
  20885. <fields>
  20886. <field> <name>CSRST</name>
  20887. <description>Core soft reset</description>
  20888. <bitOffset>0</bitOffset>
  20889. <bitWidth>1</bitWidth>
  20890. <access>read-write</access>
  20891. </field>
  20892. <field> <name>HSRST</name>
  20893. <description>HCLK soft reset</description>
  20894. <bitOffset>1</bitOffset>
  20895. <bitWidth>1</bitWidth>
  20896. <access>read-write</access>
  20897. </field>
  20898. <field> <name>FCRST</name>
  20899. <description>Host frame counter reset</description>
  20900. <bitOffset>2</bitOffset>
  20901. <bitWidth>1</bitWidth>
  20902. <access>read-write</access>
  20903. </field>
  20904. <field> <name>RXFFLSH</name>
  20905. <description>RxFIFO flush</description>
  20906. <bitOffset>4</bitOffset>
  20907. <bitWidth>1</bitWidth>
  20908. <access>read-write</access>
  20909. </field>
  20910. <field> <name>TXFFLSH</name>
  20911. <description>TxFIFO flush</description>
  20912. <bitOffset>5</bitOffset>
  20913. <bitWidth>1</bitWidth>
  20914. <access>read-write</access>
  20915. </field>
  20916. <field> <name>TXFNUM</name>
  20917. <description>TxFIFO number</description>
  20918. <bitOffset>6</bitOffset>
  20919. <bitWidth>5</bitWidth>
  20920. <access>read-write</access>
  20921. </field>
  20922. <field> <name>AHBIDL</name>
  20923. <description>AHB master idle</description>
  20924. <bitOffset>31</bitOffset>
  20925. <bitWidth>1</bitWidth>
  20926. <access>read-only</access>
  20927. </field>
  20928. </fields>
  20929. </register>
  20930. <register> <name>FS_GINTSTS</name>
  20931. <displayName>FS_GINTSTS</displayName>
  20932. <description>OTG_FS core interrupt register
  20933. (OTG_FS_GINTSTS)</description>
  20934. <addressOffset>0x14</addressOffset>
  20935. <size>0x20</size>
  20936. <resetValue>0x04000020</resetValue>
  20937. <fields>
  20938. <field> <name>CMOD</name>
  20939. <description>Current mode of operation</description>
  20940. <bitOffset>0</bitOffset>
  20941. <bitWidth>1</bitWidth>
  20942. <access>read-only</access>
  20943. </field>
  20944. <field> <name>MMIS</name>
  20945. <description>Mode mismatch interrupt</description>
  20946. <bitOffset>1</bitOffset>
  20947. <bitWidth>1</bitWidth>
  20948. <access>read-write</access>
  20949. </field>
  20950. <field> <name>OTGINT</name>
  20951. <description>OTG interrupt</description>
  20952. <bitOffset>2</bitOffset>
  20953. <bitWidth>1</bitWidth>
  20954. <access>read-only</access>
  20955. </field>
  20956. <field> <name>SOF</name>
  20957. <description>Start of frame</description>
  20958. <bitOffset>3</bitOffset>
  20959. <bitWidth>1</bitWidth>
  20960. <access>read-write</access>
  20961. </field>
  20962. <field> <name>RXFLVL</name>
  20963. <description>RxFIFO non-empty</description>
  20964. <bitOffset>4</bitOffset>
  20965. <bitWidth>1</bitWidth>
  20966. <access>read-only</access>
  20967. </field>
  20968. <field> <name>NPTXFE</name>
  20969. <description>Non-periodic TxFIFO empty</description>
  20970. <bitOffset>5</bitOffset>
  20971. <bitWidth>1</bitWidth>
  20972. <access>read-only</access>
  20973. </field>
  20974. <field> <name>GINAKEFF</name>
  20975. <description>Global IN non-periodic NAK
  20976. effective</description>
  20977. <bitOffset>6</bitOffset>
  20978. <bitWidth>1</bitWidth>
  20979. <access>read-only</access>
  20980. </field>
  20981. <field> <name>GOUTNAKEFF</name>
  20982. <description>Global OUT NAK effective</description>
  20983. <bitOffset>7</bitOffset>
  20984. <bitWidth>1</bitWidth>
  20985. <access>read-only</access>
  20986. </field>
  20987. <field> <name>ESUSP</name>
  20988. <description>Early suspend</description>
  20989. <bitOffset>10</bitOffset>
  20990. <bitWidth>1</bitWidth>
  20991. <access>read-write</access>
  20992. </field>
  20993. <field> <name>USBSUSP</name>
  20994. <description>USB suspend</description>
  20995. <bitOffset>11</bitOffset>
  20996. <bitWidth>1</bitWidth>
  20997. <access>read-write</access>
  20998. </field>
  20999. <field> <name>USBRST</name>
  21000. <description>USB reset</description>
  21001. <bitOffset>12</bitOffset>
  21002. <bitWidth>1</bitWidth>
  21003. <access>read-write</access>
  21004. </field>
  21005. <field> <name>ENUMDNE</name>
  21006. <description>Enumeration done</description>
  21007. <bitOffset>13</bitOffset>
  21008. <bitWidth>1</bitWidth>
  21009. <access>read-write</access>
  21010. </field>
  21011. <field> <name>ISOODRP</name>
  21012. <description>Isochronous OUT packet dropped
  21013. interrupt</description>
  21014. <bitOffset>14</bitOffset>
  21015. <bitWidth>1</bitWidth>
  21016. <access>read-write</access>
  21017. </field>
  21018. <field> <name>EOPF</name>
  21019. <description>End of periodic frame
  21020. interrupt</description>
  21021. <bitOffset>15</bitOffset>
  21022. <bitWidth>1</bitWidth>
  21023. <access>read-write</access>
  21024. </field>
  21025. <field> <name>IEPINT</name>
  21026. <description>IN endpoint interrupt</description>
  21027. <bitOffset>18</bitOffset>
  21028. <bitWidth>1</bitWidth>
  21029. <access>read-only</access>
  21030. </field>
  21031. <field> <name>OEPINT</name>
  21032. <description>OUT endpoint interrupt</description>
  21033. <bitOffset>19</bitOffset>
  21034. <bitWidth>1</bitWidth>
  21035. <access>read-only</access>
  21036. </field>
  21037. <field> <name>IISOIXFR</name>
  21038. <description>Incomplete isochronous IN
  21039. transfer</description>
  21040. <bitOffset>20</bitOffset>
  21041. <bitWidth>1</bitWidth>
  21042. <access>read-write</access>
  21043. </field>
  21044. <field> <name>IPXFR_INCOMPISOOUT</name>
  21045. <description>Incomplete periodic transfer(Host
  21046. mode)/Incomplete isochronous OUT transfer(Device
  21047. mode)</description>
  21048. <bitOffset>21</bitOffset>
  21049. <bitWidth>1</bitWidth>
  21050. <access>read-write</access>
  21051. </field>
  21052. <field> <name>HPRTINT</name>
  21053. <description>Host port interrupt</description>
  21054. <bitOffset>24</bitOffset>
  21055. <bitWidth>1</bitWidth>
  21056. <access>read-only</access>
  21057. </field>
  21058. <field> <name>HCINT</name>
  21059. <description>Host channels interrupt</description>
  21060. <bitOffset>25</bitOffset>
  21061. <bitWidth>1</bitWidth>
  21062. <access>read-only</access>
  21063. </field>
  21064. <field> <name>PTXFE</name>
  21065. <description>Periodic TxFIFO empty</description>
  21066. <bitOffset>26</bitOffset>
  21067. <bitWidth>1</bitWidth>
  21068. <access>read-only</access>
  21069. </field>
  21070. <field> <name>CIDSCHG</name>
  21071. <description>Connector ID status change</description>
  21072. <bitOffset>28</bitOffset>
  21073. <bitWidth>1</bitWidth>
  21074. <access>read-write</access>
  21075. </field>
  21076. <field> <name>DISCINT</name>
  21077. <description>Disconnect detected
  21078. interrupt</description>
  21079. <bitOffset>29</bitOffset>
  21080. <bitWidth>1</bitWidth>
  21081. <access>read-write</access>
  21082. </field>
  21083. <field> <name>SRQINT</name>
  21084. <description>Session request/new session detected
  21085. interrupt</description>
  21086. <bitOffset>30</bitOffset>
  21087. <bitWidth>1</bitWidth>
  21088. <access>read-write</access>
  21089. </field>
  21090. <field> <name>WKUPINT</name>
  21091. <description>Resume/remote wakeup detected
  21092. interrupt</description>
  21093. <bitOffset>31</bitOffset>
  21094. <bitWidth>1</bitWidth>
  21095. <access>read-write</access>
  21096. </field>
  21097. </fields>
  21098. </register>
  21099. <register> <name>FS_GINTMSK</name>
  21100. <displayName>FS_GINTMSK</displayName>
  21101. <description>OTG_FS interrupt mask register
  21102. (OTG_FS_GINTMSK)</description>
  21103. <addressOffset>0x18</addressOffset>
  21104. <size>0x20</size>
  21105. <resetValue>0x00000000</resetValue>
  21106. <fields>
  21107. <field> <name>MMISM</name>
  21108. <description>Mode mismatch interrupt
  21109. mask</description>
  21110. <bitOffset>1</bitOffset>
  21111. <bitWidth>1</bitWidth>
  21112. <access>read-write</access>
  21113. </field>
  21114. <field> <name>OTGINT</name>
  21115. <description>OTG interrupt mask</description>
  21116. <bitOffset>2</bitOffset>
  21117. <bitWidth>1</bitWidth>
  21118. <access>read-write</access>
  21119. </field>
  21120. <field> <name>SOFM</name>
  21121. <description>Start of frame mask</description>
  21122. <bitOffset>3</bitOffset>
  21123. <bitWidth>1</bitWidth>
  21124. <access>read-write</access>
  21125. </field>
  21126. <field> <name>RXFLVLM</name>
  21127. <description>Receive FIFO non-empty
  21128. mask</description>
  21129. <bitOffset>4</bitOffset>
  21130. <bitWidth>1</bitWidth>
  21131. <access>read-write</access>
  21132. </field>
  21133. <field> <name>NPTXFEM</name>
  21134. <description>Non-periodic TxFIFO empty
  21135. mask</description>
  21136. <bitOffset>5</bitOffset>
  21137. <bitWidth>1</bitWidth>
  21138. <access>read-write</access>
  21139. </field>
  21140. <field> <name>GINAKEFFM</name>
  21141. <description>Global non-periodic IN NAK effective
  21142. mask</description>
  21143. <bitOffset>6</bitOffset>
  21144. <bitWidth>1</bitWidth>
  21145. <access>read-write</access>
  21146. </field>
  21147. <field> <name>GONAKEFFM</name>
  21148. <description>Global OUT NAK effective
  21149. mask</description>
  21150. <bitOffset>7</bitOffset>
  21151. <bitWidth>1</bitWidth>
  21152. <access>read-write</access>
  21153. </field>
  21154. <field> <name>ESUSPM</name>
  21155. <description>Early suspend mask</description>
  21156. <bitOffset>10</bitOffset>
  21157. <bitWidth>1</bitWidth>
  21158. <access>read-write</access>
  21159. </field>
  21160. <field> <name>USBSUSPM</name>
  21161. <description>USB suspend mask</description>
  21162. <bitOffset>11</bitOffset>
  21163. <bitWidth>1</bitWidth>
  21164. <access>read-write</access>
  21165. </field>
  21166. <field> <name>USBRST</name>
  21167. <description>USB reset mask</description>
  21168. <bitOffset>12</bitOffset>
  21169. <bitWidth>1</bitWidth>
  21170. <access>read-write</access>
  21171. </field>
  21172. <field> <name>ENUMDNEM</name>
  21173. <description>Enumeration done mask</description>
  21174. <bitOffset>13</bitOffset>
  21175. <bitWidth>1</bitWidth>
  21176. <access>read-write</access>
  21177. </field>
  21178. <field> <name>ISOODRPM</name>
  21179. <description>Isochronous OUT packet dropped interrupt
  21180. mask</description>
  21181. <bitOffset>14</bitOffset>
  21182. <bitWidth>1</bitWidth>
  21183. <access>read-write</access>
  21184. </field>
  21185. <field> <name>EOPFM</name>
  21186. <description>End of periodic frame interrupt
  21187. mask</description>
  21188. <bitOffset>15</bitOffset>
  21189. <bitWidth>1</bitWidth>
  21190. <access>read-write</access>
  21191. </field>
  21192. <field> <name>EPMISM</name>
  21193. <description>Endpoint mismatch interrupt
  21194. mask</description>
  21195. <bitOffset>17</bitOffset>
  21196. <bitWidth>1</bitWidth>
  21197. <access>read-write</access>
  21198. </field>
  21199. <field> <name>IEPINT</name>
  21200. <description>IN endpoints interrupt
  21201. mask</description>
  21202. <bitOffset>18</bitOffset>
  21203. <bitWidth>1</bitWidth>
  21204. <access>read-write</access>
  21205. </field>
  21206. <field> <name>OEPINT</name>
  21207. <description>OUT endpoints interrupt
  21208. mask</description>
  21209. <bitOffset>19</bitOffset>
  21210. <bitWidth>1</bitWidth>
  21211. <access>read-write</access>
  21212. </field>
  21213. <field> <name>IISOIXFRM</name>
  21214. <description>Incomplete isochronous IN transfer
  21215. mask</description>
  21216. <bitOffset>20</bitOffset>
  21217. <bitWidth>1</bitWidth>
  21218. <access>read-write</access>
  21219. </field>
  21220. <field> <name>IPXFRM_IISOOXFRM</name>
  21221. <description>Incomplete periodic transfer mask(Host
  21222. mode)/Incomplete isochronous OUT transfer mask(Device
  21223. mode)</description>
  21224. <bitOffset>21</bitOffset>
  21225. <bitWidth>1</bitWidth>
  21226. <access>read-write</access>
  21227. </field>
  21228. <field> <name>PRTIM</name>
  21229. <description>Host port interrupt mask</description>
  21230. <bitOffset>24</bitOffset>
  21231. <bitWidth>1</bitWidth>
  21232. <access>read-only</access>
  21233. </field>
  21234. <field> <name>HCIM</name>
  21235. <description>Host channels interrupt
  21236. mask</description>
  21237. <bitOffset>25</bitOffset>
  21238. <bitWidth>1</bitWidth>
  21239. <access>read-write</access>
  21240. </field>
  21241. <field> <name>PTXFEM</name>
  21242. <description>Periodic TxFIFO empty mask</description>
  21243. <bitOffset>26</bitOffset>
  21244. <bitWidth>1</bitWidth>
  21245. <access>read-write</access>
  21246. </field>
  21247. <field> <name>CIDSCHGM</name>
  21248. <description>Connector ID status change
  21249. mask</description>
  21250. <bitOffset>28</bitOffset>
  21251. <bitWidth>1</bitWidth>
  21252. <access>read-write</access>
  21253. </field>
  21254. <field> <name>DISCINT</name>
  21255. <description>Disconnect detected interrupt
  21256. mask</description>
  21257. <bitOffset>29</bitOffset>
  21258. <bitWidth>1</bitWidth>
  21259. <access>read-write</access>
  21260. </field>
  21261. <field> <name>SRQIM</name>
  21262. <description>Session request/new session detected
  21263. interrupt mask</description>
  21264. <bitOffset>30</bitOffset>
  21265. <bitWidth>1</bitWidth>
  21266. <access>read-write</access>
  21267. </field>
  21268. <field> <name>WUIM</name>
  21269. <description>Resume/remote wakeup detected interrupt
  21270. mask</description>
  21271. <bitOffset>31</bitOffset>
  21272. <bitWidth>1</bitWidth>
  21273. <access>read-write</access>
  21274. </field>
  21275. </fields>
  21276. </register>
  21277. <register> <name>FS_GRXSTSR_Device</name>
  21278. <displayName>FS_GRXSTSR_Device</displayName>
  21279. <description>OTG_FS Receive status debug read(Device
  21280. mode)</description>
  21281. <addressOffset>0x1C</addressOffset>
  21282. <size>0x20</size>
  21283. <access>read-only</access>
  21284. <resetValue>0x00000000</resetValue>
  21285. <fields>
  21286. <field> <name>EPNUM</name>
  21287. <description>Endpoint number</description>
  21288. <bitOffset>0</bitOffset>
  21289. <bitWidth>4</bitWidth>
  21290. </field>
  21291. <field> <name>BCNT</name>
  21292. <description>Byte count</description>
  21293. <bitOffset>4</bitOffset>
  21294. <bitWidth>11</bitWidth>
  21295. </field>
  21296. <field> <name>DPID</name>
  21297. <description>Data PID</description>
  21298. <bitOffset>15</bitOffset>
  21299. <bitWidth>2</bitWidth>
  21300. </field>
  21301. <field> <name>PKTSTS</name>
  21302. <description>Packet status</description>
  21303. <bitOffset>17</bitOffset>
  21304. <bitWidth>4</bitWidth>
  21305. </field>
  21306. <field> <name>FRMNUM</name>
  21307. <description>Frame number</description>
  21308. <bitOffset>21</bitOffset>
  21309. <bitWidth>4</bitWidth>
  21310. </field>
  21311. </fields>
  21312. </register>
  21313. <register> <name>FS_GRXSTSR_Host</name>
  21314. <displayName>FS_GRXSTSR_Host</displayName>
  21315. <description>OTG_FS Receive status debug read(Host
  21316. mode)</description>
  21317. <alternateRegister>FS_GRXSTSR_Device</alternateRegister>
  21318. <addressOffset>0x1C</addressOffset>
  21319. <size>0x20</size>
  21320. <access>read-only</access>
  21321. <resetValue>0x00000000</resetValue>
  21322. <fields>
  21323. <field> <name>EPNUM</name>
  21324. <description>Endpoint number</description>
  21325. <bitOffset>0</bitOffset>
  21326. <bitWidth>4</bitWidth>
  21327. </field>
  21328. <field> <name>BCNT</name>
  21329. <description>Byte count</description>
  21330. <bitOffset>4</bitOffset>
  21331. <bitWidth>11</bitWidth>
  21332. </field>
  21333. <field> <name>DPID</name>
  21334. <description>Data PID</description>
  21335. <bitOffset>15</bitOffset>
  21336. <bitWidth>2</bitWidth>
  21337. </field>
  21338. <field> <name>PKTSTS</name>
  21339. <description>Packet status</description>
  21340. <bitOffset>17</bitOffset>
  21341. <bitWidth>4</bitWidth>
  21342. </field>
  21343. <field> <name>FRMNUM</name>
  21344. <description>Frame number</description>
  21345. <bitOffset>21</bitOffset>
  21346. <bitWidth>4</bitWidth>
  21347. </field>
  21348. </fields>
  21349. </register>
  21350. <register> <name>FS_GRXFSIZ</name>
  21351. <displayName>FS_GRXFSIZ</displayName>
  21352. <description>OTG_FS Receive FIFO size register
  21353. (OTG_FS_GRXFSIZ)</description>
  21354. <addressOffset>0x24</addressOffset>
  21355. <size>0x20</size>
  21356. <access>read-write</access>
  21357. <resetValue>0x00000200</resetValue>
  21358. <fields>
  21359. <field> <name>RXFD</name>
  21360. <description>RxFIFO depth</description>
  21361. <bitOffset>0</bitOffset>
  21362. <bitWidth>16</bitWidth>
  21363. </field>
  21364. </fields>
  21365. </register>
  21366. <register> <name>FS_GNPTXFSIZ_Device</name>
  21367. <displayName>FS_GNPTXFSIZ_Device</displayName>
  21368. <description>OTG_FS non-periodic transmit FIFO size
  21369. register (Device mode)</description>
  21370. <addressOffset>0x28</addressOffset>
  21371. <size>0x20</size>
  21372. <access>read-write</access>
  21373. <resetValue>0x00000200</resetValue>
  21374. <fields>
  21375. <field> <name>TX0FSA</name>
  21376. <description>Endpoint 0 transmit RAM start
  21377. address</description>
  21378. <bitOffset>0</bitOffset>
  21379. <bitWidth>16</bitWidth>
  21380. </field>
  21381. <field> <name>TX0FD</name>
  21382. <description>Endpoint 0 TxFIFO depth</description>
  21383. <bitOffset>16</bitOffset>
  21384. <bitWidth>16</bitWidth>
  21385. </field>
  21386. </fields>
  21387. </register>
  21388. <register> <name>FS_GNPTXFSIZ_Host</name>
  21389. <displayName>FS_GNPTXFSIZ_Host</displayName>
  21390. <description>OTG_FS non-periodic transmit FIFO size
  21391. register (Host mode)</description>
  21392. <alternateRegister>FS_GNPTXFSIZ_Device</alternateRegister>
  21393. <addressOffset>0x28</addressOffset>
  21394. <size>0x20</size>
  21395. <access>read-write</access>
  21396. <resetValue>0x00000200</resetValue>
  21397. <fields>
  21398. <field> <name>NPTXFSA</name>
  21399. <description>Non-periodic transmit RAM start
  21400. address</description>
  21401. <bitOffset>0</bitOffset>
  21402. <bitWidth>16</bitWidth>
  21403. </field>
  21404. <field> <name>NPTXFD</name>
  21405. <description>Non-periodic TxFIFO depth</description>
  21406. <bitOffset>16</bitOffset>
  21407. <bitWidth>16</bitWidth>
  21408. </field>
  21409. </fields>
  21410. </register>
  21411. <register> <name>FS_GNPTXSTS</name>
  21412. <displayName>FS_GNPTXSTS</displayName>
  21413. <description>OTG_FS non-periodic transmit FIFO/queue
  21414. status register (OTG_FS_GNPTXSTS)</description>
  21415. <addressOffset>0x2C</addressOffset>
  21416. <size>0x20</size>
  21417. <access>read-only</access>
  21418. <resetValue>0x00080200</resetValue>
  21419. <fields>
  21420. <field> <name>NPTXFSAV</name>
  21421. <description>Non-periodic TxFIFO space
  21422. available</description>
  21423. <bitOffset>0</bitOffset>
  21424. <bitWidth>16</bitWidth>
  21425. </field>
  21426. <field> <name>NPTQXSAV</name>
  21427. <description>Non-periodic transmit request queue
  21428. space available</description>
  21429. <bitOffset>16</bitOffset>
  21430. <bitWidth>8</bitWidth>
  21431. </field>
  21432. <field> <name>NPTXQTOP</name>
  21433. <description>Top of the non-periodic transmit request
  21434. queue</description>
  21435. <bitOffset>24</bitOffset>
  21436. <bitWidth>7</bitWidth>
  21437. </field>
  21438. </fields>
  21439. </register>
  21440. <register> <name>FS_GCCFG</name>
  21441. <displayName>FS_GCCFG</displayName>
  21442. <description>OTG_FS general core configuration register
  21443. (OTG_FS_GCCFG)</description>
  21444. <addressOffset>0x38</addressOffset>
  21445. <size>0x20</size>
  21446. <access>read-write</access>
  21447. <resetValue>0x00000000</resetValue>
  21448. <fields>
  21449. <field> <name>PWRDWN</name>
  21450. <description>Power down</description>
  21451. <bitOffset>16</bitOffset>
  21452. <bitWidth>1</bitWidth>
  21453. </field>
  21454. <field> <name>VBUSASEN</name>
  21455. <description>Enable the VBUS sensing
  21456. device</description>
  21457. <bitOffset>18</bitOffset>
  21458. <bitWidth>1</bitWidth>
  21459. </field>
  21460. <field> <name>VBUSBSEN</name>
  21461. <description>Enable the VBUS sensing
  21462. device</description>
  21463. <bitOffset>19</bitOffset>
  21464. <bitWidth>1</bitWidth>
  21465. </field>
  21466. <field> <name>SOFOUTEN</name>
  21467. <description>SOF output enable</description>
  21468. <bitOffset>20</bitOffset>
  21469. <bitWidth>1</bitWidth>
  21470. </field>
  21471. </fields>
  21472. </register>
  21473. <register> <name>FS_CID</name>
  21474. <displayName>FS_CID</displayName>
  21475. <description>core ID register</description>
  21476. <addressOffset>0x3C</addressOffset>
  21477. <size>0x20</size>
  21478. <access>read-write</access>
  21479. <resetValue>0x00001000</resetValue>
  21480. <fields>
  21481. <field> <name>PRODUCT_ID</name>
  21482. <description>Product ID field</description>
  21483. <bitOffset>0</bitOffset>
  21484. <bitWidth>32</bitWidth>
  21485. </field>
  21486. </fields>
  21487. </register>
  21488. <register> <name>FS_HPTXFSIZ</name>
  21489. <displayName>FS_HPTXFSIZ</displayName>
  21490. <description>OTG_FS Host periodic transmit FIFO size
  21491. register (OTG_FS_HPTXFSIZ)</description>
  21492. <addressOffset>0x100</addressOffset>
  21493. <size>0x20</size>
  21494. <access>read-write</access>
  21495. <resetValue>0x02000600</resetValue>
  21496. <fields>
  21497. <field> <name>PTXSA</name>
  21498. <description>Host periodic TxFIFO start
  21499. address</description>
  21500. <bitOffset>0</bitOffset>
  21501. <bitWidth>16</bitWidth>
  21502. </field>
  21503. <field> <name>PTXFSIZ</name>
  21504. <description>Host periodic TxFIFO depth</description>
  21505. <bitOffset>16</bitOffset>
  21506. <bitWidth>16</bitWidth>
  21507. </field>
  21508. </fields>
  21509. </register>
  21510. <register> <name>FS_DIEPTXF1</name>
  21511. <displayName>FS_DIEPTXF1</displayName>
  21512. <description>OTG_FS device IN endpoint transmit FIFO size
  21513. register (OTG_FS_DIEPTXF2)</description>
  21514. <addressOffset>0x104</addressOffset>
  21515. <size>0x20</size>
  21516. <access>read-write</access>
  21517. <resetValue>0x02000400</resetValue>
  21518. <fields>
  21519. <field> <name>INEPTXSA</name>
  21520. <description>IN endpoint FIFO2 transmit RAM start
  21521. address</description>
  21522. <bitOffset>0</bitOffset>
  21523. <bitWidth>16</bitWidth>
  21524. </field>
  21525. <field> <name>INEPTXFD</name>
  21526. <description>IN endpoint TxFIFO depth</description>
  21527. <bitOffset>16</bitOffset>
  21528. <bitWidth>16</bitWidth>
  21529. </field>
  21530. </fields>
  21531. </register>
  21532. <register> <name>FS_DIEPTXF2</name>
  21533. <displayName>FS_DIEPTXF2</displayName>
  21534. <description>OTG_FS device IN endpoint transmit FIFO size
  21535. register (OTG_FS_DIEPTXF3)</description>
  21536. <addressOffset>0x108</addressOffset>
  21537. <size>0x20</size>
  21538. <access>read-write</access>
  21539. <resetValue>0x02000400</resetValue>
  21540. <fields>
  21541. <field> <name>INEPTXSA</name>
  21542. <description>IN endpoint FIFO3 transmit RAM start
  21543. address</description>
  21544. <bitOffset>0</bitOffset>
  21545. <bitWidth>16</bitWidth>
  21546. </field>
  21547. <field> <name>INEPTXFD</name>
  21548. <description>IN endpoint TxFIFO depth</description>
  21549. <bitOffset>16</bitOffset>
  21550. <bitWidth>16</bitWidth>
  21551. </field>
  21552. </fields>
  21553. </register>
  21554. <register> <name>FS_DIEPTXF3</name>
  21555. <displayName>FS_DIEPTXF3</displayName>
  21556. <description>OTG_FS device IN endpoint transmit FIFO size
  21557. register (OTG_FS_DIEPTXF4)</description>
  21558. <addressOffset>0x10C</addressOffset>
  21559. <size>0x20</size>
  21560. <access>read-write</access>
  21561. <resetValue>0x02000400</resetValue>
  21562. <fields>
  21563. <field> <name>INEPTXSA</name>
  21564. <description>IN endpoint FIFO4 transmit RAM start
  21565. address</description>
  21566. <bitOffset>0</bitOffset>
  21567. <bitWidth>16</bitWidth>
  21568. </field>
  21569. <field> <name>INEPTXFD</name>
  21570. <description>IN endpoint TxFIFO depth</description>
  21571. <bitOffset>16</bitOffset>
  21572. <bitWidth>16</bitWidth>
  21573. </field>
  21574. </fields>
  21575. </register>
  21576. </registers>
  21577. </peripheral>
  21578. <peripheral> <name>OTG_FS_HOST</name>
  21579. <description>USB on the go full speed</description>
  21580. <groupName>USB_OTG_FS</groupName>
  21581. <baseAddress>0x50000400</baseAddress>
  21582. <addressBlock>
  21583. <offset>0x0</offset>
  21584. <size>0x400</size>
  21585. <usage>registers</usage>
  21586. </addressBlock>
  21587. <registers>
  21588. <register> <name>FS_HCFG</name>
  21589. <displayName>FS_HCFG</displayName>
  21590. <description>OTG_FS host configuration register
  21591. (OTG_FS_HCFG)</description>
  21592. <addressOffset>0x0</addressOffset>
  21593. <size>0x20</size>
  21594. <resetValue>0x00000000</resetValue>
  21595. <fields>
  21596. <field> <name>FSLSPCS</name>
  21597. <description>FS/LS PHY clock select</description>
  21598. <bitOffset>0</bitOffset>
  21599. <bitWidth>2</bitWidth>
  21600. <access>read-write</access>
  21601. </field>
  21602. <field> <name>FSLSS</name>
  21603. <description>FS- and LS-only support</description>
  21604. <bitOffset>2</bitOffset>
  21605. <bitWidth>1</bitWidth>
  21606. <access>read-only</access>
  21607. </field>
  21608. </fields>
  21609. </register>
  21610. <register> <name>HFIR</name>
  21611. <displayName>HFIR</displayName>
  21612. <description>OTG_FS Host frame interval
  21613. register</description>
  21614. <addressOffset>0x4</addressOffset>
  21615. <size>0x20</size>
  21616. <access>read-write</access>
  21617. <resetValue>0x0000EA60</resetValue>
  21618. <fields>
  21619. <field> <name>FRIVL</name>
  21620. <description>Frame interval</description>
  21621. <bitOffset>0</bitOffset>
  21622. <bitWidth>16</bitWidth>
  21623. </field>
  21624. </fields>
  21625. </register>
  21626. <register> <name>FS_HFNUM</name>
  21627. <displayName>FS_HFNUM</displayName>
  21628. <description>OTG_FS host frame number/frame time
  21629. remaining register (OTG_FS_HFNUM)</description>
  21630. <addressOffset>0x8</addressOffset>
  21631. <size>0x20</size>
  21632. <access>read-only</access>
  21633. <resetValue>0x00003FFF</resetValue>
  21634. <fields>
  21635. <field> <name>FRNUM</name>
  21636. <description>Frame number</description>
  21637. <bitOffset>0</bitOffset>
  21638. <bitWidth>16</bitWidth>
  21639. </field>
  21640. <field> <name>FTREM</name>
  21641. <description>Frame time remaining</description>
  21642. <bitOffset>16</bitOffset>
  21643. <bitWidth>16</bitWidth>
  21644. </field>
  21645. </fields>
  21646. </register>
  21647. <register> <name>FS_HPTXSTS</name>
  21648. <displayName>FS_HPTXSTS</displayName>
  21649. <description>OTG_FS_Host periodic transmit FIFO/queue
  21650. status register (OTG_FS_HPTXSTS)</description>
  21651. <addressOffset>0x10</addressOffset>
  21652. <size>0x20</size>
  21653. <resetValue>0x00080100</resetValue>
  21654. <fields>
  21655. <field> <name>PTXFSAVL</name>
  21656. <description>Periodic transmit data FIFO space
  21657. available</description>
  21658. <bitOffset>0</bitOffset>
  21659. <bitWidth>16</bitWidth>
  21660. <access>read-write</access>
  21661. </field>
  21662. <field> <name>PTXQSAV</name>
  21663. <description>Periodic transmit request queue space
  21664. available</description>
  21665. <bitOffset>16</bitOffset>
  21666. <bitWidth>8</bitWidth>
  21667. <access>read-only</access>
  21668. </field>
  21669. <field> <name>PTXQTOP</name>
  21670. <description>Top of the periodic transmit request
  21671. queue</description>
  21672. <bitOffset>24</bitOffset>
  21673. <bitWidth>8</bitWidth>
  21674. <access>read-only</access>
  21675. </field>
  21676. </fields>
  21677. </register>
  21678. <register> <name>HAINT</name>
  21679. <displayName>HAINT</displayName>
  21680. <description>OTG_FS Host all channels interrupt
  21681. register</description>
  21682. <addressOffset>0x14</addressOffset>
  21683. <size>0x20</size>
  21684. <access>read-only</access>
  21685. <resetValue>0x00000000</resetValue>
  21686. <fields>
  21687. <field> <name>HAINT</name>
  21688. <description>Channel interrupts</description>
  21689. <bitOffset>0</bitOffset>
  21690. <bitWidth>16</bitWidth>
  21691. </field>
  21692. </fields>
  21693. </register>
  21694. <register> <name>HAINTMSK</name>
  21695. <displayName>HAINTMSK</displayName>
  21696. <description>OTG_FS host all channels interrupt mask
  21697. register</description>
  21698. <addressOffset>0x18</addressOffset>
  21699. <size>0x20</size>
  21700. <access>read-write</access>
  21701. <resetValue>0x00000000</resetValue>
  21702. <fields>
  21703. <field> <name>HAINTM</name>
  21704. <description>Channel interrupt mask</description>
  21705. <bitOffset>0</bitOffset>
  21706. <bitWidth>16</bitWidth>
  21707. </field>
  21708. </fields>
  21709. </register>
  21710. <register> <name>FS_HPRT</name>
  21711. <displayName>FS_HPRT</displayName>
  21712. <description>OTG_FS host port control and status register
  21713. (OTG_FS_HPRT)</description>
  21714. <addressOffset>0x40</addressOffset>
  21715. <size>0x20</size>
  21716. <resetValue>0x00000000</resetValue>
  21717. <fields>
  21718. <field> <name>PCSTS</name>
  21719. <description>Port connect status</description>
  21720. <bitOffset>0</bitOffset>
  21721. <bitWidth>1</bitWidth>
  21722. <access>read-only</access>
  21723. </field>
  21724. <field> <name>PCDET</name>
  21725. <description>Port connect detected</description>
  21726. <bitOffset>1</bitOffset>
  21727. <bitWidth>1</bitWidth>
  21728. <access>read-write</access>
  21729. </field>
  21730. <field> <name>PENA</name>
  21731. <description>Port enable</description>
  21732. <bitOffset>2</bitOffset>
  21733. <bitWidth>1</bitWidth>
  21734. <access>read-write</access>
  21735. </field>
  21736. <field> <name>PENCHNG</name>
  21737. <description>Port enable/disable change</description>
  21738. <bitOffset>3</bitOffset>
  21739. <bitWidth>1</bitWidth>
  21740. <access>read-write</access>
  21741. </field>
  21742. <field> <name>POCA</name>
  21743. <description>Port overcurrent active</description>
  21744. <bitOffset>4</bitOffset>
  21745. <bitWidth>1</bitWidth>
  21746. <access>read-only</access>
  21747. </field>
  21748. <field> <name>POCCHNG</name>
  21749. <description>Port overcurrent change</description>
  21750. <bitOffset>5</bitOffset>
  21751. <bitWidth>1</bitWidth>
  21752. <access>read-write</access>
  21753. </field>
  21754. <field> <name>PRES</name>
  21755. <description>Port resume</description>
  21756. <bitOffset>6</bitOffset>
  21757. <bitWidth>1</bitWidth>
  21758. <access>read-write</access>
  21759. </field>
  21760. <field> <name>PSUSP</name>
  21761. <description>Port suspend</description>
  21762. <bitOffset>7</bitOffset>
  21763. <bitWidth>1</bitWidth>
  21764. <access>read-write</access>
  21765. </field>
  21766. <field> <name>PRST</name>
  21767. <description>Port reset</description>
  21768. <bitOffset>8</bitOffset>
  21769. <bitWidth>1</bitWidth>
  21770. <access>read-write</access>
  21771. </field>
  21772. <field> <name>PLSTS</name>
  21773. <description>Port line status</description>
  21774. <bitOffset>10</bitOffset>
  21775. <bitWidth>2</bitWidth>
  21776. <access>read-only</access>
  21777. </field>
  21778. <field> <name>PPWR</name>
  21779. <description>Port power</description>
  21780. <bitOffset>12</bitOffset>
  21781. <bitWidth>1</bitWidth>
  21782. <access>read-write</access>
  21783. </field>
  21784. <field> <name>PTCTL</name>
  21785. <description>Port test control</description>
  21786. <bitOffset>13</bitOffset>
  21787. <bitWidth>4</bitWidth>
  21788. <access>read-write</access>
  21789. </field>
  21790. <field> <name>PSPD</name>
  21791. <description>Port speed</description>
  21792. <bitOffset>17</bitOffset>
  21793. <bitWidth>2</bitWidth>
  21794. <access>read-only</access>
  21795. </field>
  21796. </fields>
  21797. </register>
  21798. <register> <name>FS_HCCHAR0</name>
  21799. <displayName>FS_HCCHAR0</displayName>
  21800. <description>OTG_FS host channel-0 characteristics
  21801. register (OTG_FS_HCCHAR0)</description>
  21802. <addressOffset>0x100</addressOffset>
  21803. <size>0x20</size>
  21804. <access>read-write</access>
  21805. <resetValue>0x00000000</resetValue>
  21806. <fields>
  21807. <field> <name>MPSIZ</name>
  21808. <description>Maximum packet size</description>
  21809. <bitOffset>0</bitOffset>
  21810. <bitWidth>11</bitWidth>
  21811. </field>
  21812. <field> <name>EPNUM</name>
  21813. <description>Endpoint number</description>
  21814. <bitOffset>11</bitOffset>
  21815. <bitWidth>4</bitWidth>
  21816. </field>
  21817. <field> <name>EPDIR</name>
  21818. <description>Endpoint direction</description>
  21819. <bitOffset>15</bitOffset>
  21820. <bitWidth>1</bitWidth>
  21821. </field>
  21822. <field> <name>LSDEV</name>
  21823. <description>Low-speed device</description>
  21824. <bitOffset>17</bitOffset>
  21825. <bitWidth>1</bitWidth>
  21826. </field>
  21827. <field> <name>EPTYP</name>
  21828. <description>Endpoint type</description>
  21829. <bitOffset>18</bitOffset>
  21830. <bitWidth>2</bitWidth>
  21831. </field>
  21832. <field> <name>MCNT</name>
  21833. <description>Multicount</description>
  21834. <bitOffset>20</bitOffset>
  21835. <bitWidth>2</bitWidth>
  21836. </field>
  21837. <field> <name>DAD</name>
  21838. <description>Device address</description>
  21839. <bitOffset>22</bitOffset>
  21840. <bitWidth>7</bitWidth>
  21841. </field>
  21842. <field> <name>ODDFRM</name>
  21843. <description>Odd frame</description>
  21844. <bitOffset>29</bitOffset>
  21845. <bitWidth>1</bitWidth>
  21846. </field>
  21847. <field> <name>CHDIS</name>
  21848. <description>Channel disable</description>
  21849. <bitOffset>30</bitOffset>
  21850. <bitWidth>1</bitWidth>
  21851. </field>
  21852. <field> <name>CHENA</name>
  21853. <description>Channel enable</description>
  21854. <bitOffset>31</bitOffset>
  21855. <bitWidth>1</bitWidth>
  21856. </field>
  21857. </fields>
  21858. </register>
  21859. <register> <name>FS_HCCHAR1</name>
  21860. <displayName>FS_HCCHAR1</displayName>
  21861. <description>OTG_FS host channel-1 characteristics
  21862. register (OTG_FS_HCCHAR1)</description>
  21863. <addressOffset>0x120</addressOffset>
  21864. <size>0x20</size>
  21865. <access>read-write</access>
  21866. <resetValue>0x00000000</resetValue>
  21867. <fields>
  21868. <field> <name>MPSIZ</name>
  21869. <description>Maximum packet size</description>
  21870. <bitOffset>0</bitOffset>
  21871. <bitWidth>11</bitWidth>
  21872. </field>
  21873. <field> <name>EPNUM</name>
  21874. <description>Endpoint number</description>
  21875. <bitOffset>11</bitOffset>
  21876. <bitWidth>4</bitWidth>
  21877. </field>
  21878. <field> <name>EPDIR</name>
  21879. <description>Endpoint direction</description>
  21880. <bitOffset>15</bitOffset>
  21881. <bitWidth>1</bitWidth>
  21882. </field>
  21883. <field> <name>LSDEV</name>
  21884. <description>Low-speed device</description>
  21885. <bitOffset>17</bitOffset>
  21886. <bitWidth>1</bitWidth>
  21887. </field>
  21888. <field> <name>EPTYP</name>
  21889. <description>Endpoint type</description>
  21890. <bitOffset>18</bitOffset>
  21891. <bitWidth>2</bitWidth>
  21892. </field>
  21893. <field> <name>MCNT</name>
  21894. <description>Multicount</description>
  21895. <bitOffset>20</bitOffset>
  21896. <bitWidth>2</bitWidth>
  21897. </field>
  21898. <field> <name>DAD</name>
  21899. <description>Device address</description>
  21900. <bitOffset>22</bitOffset>
  21901. <bitWidth>7</bitWidth>
  21902. </field>
  21903. <field> <name>ODDFRM</name>
  21904. <description>Odd frame</description>
  21905. <bitOffset>29</bitOffset>
  21906. <bitWidth>1</bitWidth>
  21907. </field>
  21908. <field> <name>CHDIS</name>
  21909. <description>Channel disable</description>
  21910. <bitOffset>30</bitOffset>
  21911. <bitWidth>1</bitWidth>
  21912. </field>
  21913. <field> <name>CHENA</name>
  21914. <description>Channel enable</description>
  21915. <bitOffset>31</bitOffset>
  21916. <bitWidth>1</bitWidth>
  21917. </field>
  21918. </fields>
  21919. </register>
  21920. <register> <name>FS_HCCHAR2</name>
  21921. <displayName>FS_HCCHAR2</displayName>
  21922. <description>OTG_FS host channel-2 characteristics
  21923. register (OTG_FS_HCCHAR2)</description>
  21924. <addressOffset>0x140</addressOffset>
  21925. <size>0x20</size>
  21926. <access>read-write</access>
  21927. <resetValue>0x00000000</resetValue>
  21928. <fields>
  21929. <field> <name>MPSIZ</name>
  21930. <description>Maximum packet size</description>
  21931. <bitOffset>0</bitOffset>
  21932. <bitWidth>11</bitWidth>
  21933. </field>
  21934. <field> <name>EPNUM</name>
  21935. <description>Endpoint number</description>
  21936. <bitOffset>11</bitOffset>
  21937. <bitWidth>4</bitWidth>
  21938. </field>
  21939. <field> <name>EPDIR</name>
  21940. <description>Endpoint direction</description>
  21941. <bitOffset>15</bitOffset>
  21942. <bitWidth>1</bitWidth>
  21943. </field>
  21944. <field> <name>LSDEV</name>
  21945. <description>Low-speed device</description>
  21946. <bitOffset>17</bitOffset>
  21947. <bitWidth>1</bitWidth>
  21948. </field>
  21949. <field> <name>EPTYP</name>
  21950. <description>Endpoint type</description>
  21951. <bitOffset>18</bitOffset>
  21952. <bitWidth>2</bitWidth>
  21953. </field>
  21954. <field> <name>MCNT</name>
  21955. <description>Multicount</description>
  21956. <bitOffset>20</bitOffset>
  21957. <bitWidth>2</bitWidth>
  21958. </field>
  21959. <field> <name>DAD</name>
  21960. <description>Device address</description>
  21961. <bitOffset>22</bitOffset>
  21962. <bitWidth>7</bitWidth>
  21963. </field>
  21964. <field> <name>ODDFRM</name>
  21965. <description>Odd frame</description>
  21966. <bitOffset>29</bitOffset>
  21967. <bitWidth>1</bitWidth>
  21968. </field>
  21969. <field> <name>CHDIS</name>
  21970. <description>Channel disable</description>
  21971. <bitOffset>30</bitOffset>
  21972. <bitWidth>1</bitWidth>
  21973. </field>
  21974. <field> <name>CHENA</name>
  21975. <description>Channel enable</description>
  21976. <bitOffset>31</bitOffset>
  21977. <bitWidth>1</bitWidth>
  21978. </field>
  21979. </fields>
  21980. </register>
  21981. <register> <name>FS_HCCHAR3</name>
  21982. <displayName>FS_HCCHAR3</displayName>
  21983. <description>OTG_FS host channel-3 characteristics
  21984. register (OTG_FS_HCCHAR3)</description>
  21985. <addressOffset>0x160</addressOffset>
  21986. <size>0x20</size>
  21987. <access>read-write</access>
  21988. <resetValue>0x00000000</resetValue>
  21989. <fields>
  21990. <field> <name>MPSIZ</name>
  21991. <description>Maximum packet size</description>
  21992. <bitOffset>0</bitOffset>
  21993. <bitWidth>11</bitWidth>
  21994. </field>
  21995. <field> <name>EPNUM</name>
  21996. <description>Endpoint number</description>
  21997. <bitOffset>11</bitOffset>
  21998. <bitWidth>4</bitWidth>
  21999. </field>
  22000. <field> <name>EPDIR</name>
  22001. <description>Endpoint direction</description>
  22002. <bitOffset>15</bitOffset>
  22003. <bitWidth>1</bitWidth>
  22004. </field>
  22005. <field> <name>LSDEV</name>
  22006. <description>Low-speed device</description>
  22007. <bitOffset>17</bitOffset>
  22008. <bitWidth>1</bitWidth>
  22009. </field>
  22010. <field> <name>EPTYP</name>
  22011. <description>Endpoint type</description>
  22012. <bitOffset>18</bitOffset>
  22013. <bitWidth>2</bitWidth>
  22014. </field>
  22015. <field> <name>MCNT</name>
  22016. <description>Multicount</description>
  22017. <bitOffset>20</bitOffset>
  22018. <bitWidth>2</bitWidth>
  22019. </field>
  22020. <field> <name>DAD</name>
  22021. <description>Device address</description>
  22022. <bitOffset>22</bitOffset>
  22023. <bitWidth>7</bitWidth>
  22024. </field>
  22025. <field> <name>ODDFRM</name>
  22026. <description>Odd frame</description>
  22027. <bitOffset>29</bitOffset>
  22028. <bitWidth>1</bitWidth>
  22029. </field>
  22030. <field> <name>CHDIS</name>
  22031. <description>Channel disable</description>
  22032. <bitOffset>30</bitOffset>
  22033. <bitWidth>1</bitWidth>
  22034. </field>
  22035. <field> <name>CHENA</name>
  22036. <description>Channel enable</description>
  22037. <bitOffset>31</bitOffset>
  22038. <bitWidth>1</bitWidth>
  22039. </field>
  22040. </fields>
  22041. </register>
  22042. <register> <name>FS_HCCHAR4</name>
  22043. <displayName>FS_HCCHAR4</displayName>
  22044. <description>OTG_FS host channel-4 characteristics
  22045. register (OTG_FS_HCCHAR4)</description>
  22046. <addressOffset>0x180</addressOffset>
  22047. <size>0x20</size>
  22048. <access>read-write</access>
  22049. <resetValue>0x00000000</resetValue>
  22050. <fields>
  22051. <field> <name>MPSIZ</name>
  22052. <description>Maximum packet size</description>
  22053. <bitOffset>0</bitOffset>
  22054. <bitWidth>11</bitWidth>
  22055. </field>
  22056. <field> <name>EPNUM</name>
  22057. <description>Endpoint number</description>
  22058. <bitOffset>11</bitOffset>
  22059. <bitWidth>4</bitWidth>
  22060. </field>
  22061. <field> <name>EPDIR</name>
  22062. <description>Endpoint direction</description>
  22063. <bitOffset>15</bitOffset>
  22064. <bitWidth>1</bitWidth>
  22065. </field>
  22066. <field> <name>LSDEV</name>
  22067. <description>Low-speed device</description>
  22068. <bitOffset>17</bitOffset>
  22069. <bitWidth>1</bitWidth>
  22070. </field>
  22071. <field> <name>EPTYP</name>
  22072. <description>Endpoint type</description>
  22073. <bitOffset>18</bitOffset>
  22074. <bitWidth>2</bitWidth>
  22075. </field>
  22076. <field> <name>MCNT</name>
  22077. <description>Multicount</description>
  22078. <bitOffset>20</bitOffset>
  22079. <bitWidth>2</bitWidth>
  22080. </field>
  22081. <field> <name>DAD</name>
  22082. <description>Device address</description>
  22083. <bitOffset>22</bitOffset>
  22084. <bitWidth>7</bitWidth>
  22085. </field>
  22086. <field> <name>ODDFRM</name>
  22087. <description>Odd frame</description>
  22088. <bitOffset>29</bitOffset>
  22089. <bitWidth>1</bitWidth>
  22090. </field>
  22091. <field> <name>CHDIS</name>
  22092. <description>Channel disable</description>
  22093. <bitOffset>30</bitOffset>
  22094. <bitWidth>1</bitWidth>
  22095. </field>
  22096. <field> <name>CHENA</name>
  22097. <description>Channel enable</description>
  22098. <bitOffset>31</bitOffset>
  22099. <bitWidth>1</bitWidth>
  22100. </field>
  22101. </fields>
  22102. </register>
  22103. <register> <name>FS_HCCHAR5</name>
  22104. <displayName>FS_HCCHAR5</displayName>
  22105. <description>OTG_FS host channel-5 characteristics
  22106. register (OTG_FS_HCCHAR5)</description>
  22107. <addressOffset>0x1A0</addressOffset>
  22108. <size>0x20</size>
  22109. <access>read-write</access>
  22110. <resetValue>0x00000000</resetValue>
  22111. <fields>
  22112. <field> <name>MPSIZ</name>
  22113. <description>Maximum packet size</description>
  22114. <bitOffset>0</bitOffset>
  22115. <bitWidth>11</bitWidth>
  22116. </field>
  22117. <field> <name>EPNUM</name>
  22118. <description>Endpoint number</description>
  22119. <bitOffset>11</bitOffset>
  22120. <bitWidth>4</bitWidth>
  22121. </field>
  22122. <field> <name>EPDIR</name>
  22123. <description>Endpoint direction</description>
  22124. <bitOffset>15</bitOffset>
  22125. <bitWidth>1</bitWidth>
  22126. </field>
  22127. <field> <name>LSDEV</name>
  22128. <description>Low-speed device</description>
  22129. <bitOffset>17</bitOffset>
  22130. <bitWidth>1</bitWidth>
  22131. </field>
  22132. <field> <name>EPTYP</name>
  22133. <description>Endpoint type</description>
  22134. <bitOffset>18</bitOffset>
  22135. <bitWidth>2</bitWidth>
  22136. </field>
  22137. <field> <name>MCNT</name>
  22138. <description>Multicount</description>
  22139. <bitOffset>20</bitOffset>
  22140. <bitWidth>2</bitWidth>
  22141. </field>
  22142. <field> <name>DAD</name>
  22143. <description>Device address</description>
  22144. <bitOffset>22</bitOffset>
  22145. <bitWidth>7</bitWidth>
  22146. </field>
  22147. <field> <name>ODDFRM</name>
  22148. <description>Odd frame</description>
  22149. <bitOffset>29</bitOffset>
  22150. <bitWidth>1</bitWidth>
  22151. </field>
  22152. <field> <name>CHDIS</name>
  22153. <description>Channel disable</description>
  22154. <bitOffset>30</bitOffset>
  22155. <bitWidth>1</bitWidth>
  22156. </field>
  22157. <field> <name>CHENA</name>
  22158. <description>Channel enable</description>
  22159. <bitOffset>31</bitOffset>
  22160. <bitWidth>1</bitWidth>
  22161. </field>
  22162. </fields>
  22163. </register>
  22164. <register> <name>FS_HCCHAR6</name>
  22165. <displayName>FS_HCCHAR6</displayName>
  22166. <description>OTG_FS host channel-6 characteristics
  22167. register (OTG_FS_HCCHAR6)</description>
  22168. <addressOffset>0x1C0</addressOffset>
  22169. <size>0x20</size>
  22170. <access>read-write</access>
  22171. <resetValue>0x00000000</resetValue>
  22172. <fields>
  22173. <field> <name>MPSIZ</name>
  22174. <description>Maximum packet size</description>
  22175. <bitOffset>0</bitOffset>
  22176. <bitWidth>11</bitWidth>
  22177. </field>
  22178. <field> <name>EPNUM</name>
  22179. <description>Endpoint number</description>
  22180. <bitOffset>11</bitOffset>
  22181. <bitWidth>4</bitWidth>
  22182. </field>
  22183. <field> <name>EPDIR</name>
  22184. <description>Endpoint direction</description>
  22185. <bitOffset>15</bitOffset>
  22186. <bitWidth>1</bitWidth>
  22187. </field>
  22188. <field> <name>LSDEV</name>
  22189. <description>Low-speed device</description>
  22190. <bitOffset>17</bitOffset>
  22191. <bitWidth>1</bitWidth>
  22192. </field>
  22193. <field> <name>EPTYP</name>
  22194. <description>Endpoint type</description>
  22195. <bitOffset>18</bitOffset>
  22196. <bitWidth>2</bitWidth>
  22197. </field>
  22198. <field> <name>MCNT</name>
  22199. <description>Multicount</description>
  22200. <bitOffset>20</bitOffset>
  22201. <bitWidth>2</bitWidth>
  22202. </field>
  22203. <field> <name>DAD</name>
  22204. <description>Device address</description>
  22205. <bitOffset>22</bitOffset>
  22206. <bitWidth>7</bitWidth>
  22207. </field>
  22208. <field> <name>ODDFRM</name>
  22209. <description>Odd frame</description>
  22210. <bitOffset>29</bitOffset>
  22211. <bitWidth>1</bitWidth>
  22212. </field>
  22213. <field> <name>CHDIS</name>
  22214. <description>Channel disable</description>
  22215. <bitOffset>30</bitOffset>
  22216. <bitWidth>1</bitWidth>
  22217. </field>
  22218. <field> <name>CHENA</name>
  22219. <description>Channel enable</description>
  22220. <bitOffset>31</bitOffset>
  22221. <bitWidth>1</bitWidth>
  22222. </field>
  22223. </fields>
  22224. </register>
  22225. <register> <name>FS_HCCHAR7</name>
  22226. <displayName>FS_HCCHAR7</displayName>
  22227. <description>OTG_FS host channel-7 characteristics
  22228. register (OTG_FS_HCCHAR7)</description>
  22229. <addressOffset>0x1E0</addressOffset>
  22230. <size>0x20</size>
  22231. <access>read-write</access>
  22232. <resetValue>0x00000000</resetValue>
  22233. <fields>
  22234. <field> <name>MPSIZ</name>
  22235. <description>Maximum packet size</description>
  22236. <bitOffset>0</bitOffset>
  22237. <bitWidth>11</bitWidth>
  22238. </field>
  22239. <field> <name>EPNUM</name>
  22240. <description>Endpoint number</description>
  22241. <bitOffset>11</bitOffset>
  22242. <bitWidth>4</bitWidth>
  22243. </field>
  22244. <field> <name>EPDIR</name>
  22245. <description>Endpoint direction</description>
  22246. <bitOffset>15</bitOffset>
  22247. <bitWidth>1</bitWidth>
  22248. </field>
  22249. <field> <name>LSDEV</name>
  22250. <description>Low-speed device</description>
  22251. <bitOffset>17</bitOffset>
  22252. <bitWidth>1</bitWidth>
  22253. </field>
  22254. <field> <name>EPTYP</name>
  22255. <description>Endpoint type</description>
  22256. <bitOffset>18</bitOffset>
  22257. <bitWidth>2</bitWidth>
  22258. </field>
  22259. <field> <name>MCNT</name>
  22260. <description>Multicount</description>
  22261. <bitOffset>20</bitOffset>
  22262. <bitWidth>2</bitWidth>
  22263. </field>
  22264. <field> <name>DAD</name>
  22265. <description>Device address</description>
  22266. <bitOffset>22</bitOffset>
  22267. <bitWidth>7</bitWidth>
  22268. </field>
  22269. <field> <name>ODDFRM</name>
  22270. <description>Odd frame</description>
  22271. <bitOffset>29</bitOffset>
  22272. <bitWidth>1</bitWidth>
  22273. </field>
  22274. <field> <name>CHDIS</name>
  22275. <description>Channel disable</description>
  22276. <bitOffset>30</bitOffset>
  22277. <bitWidth>1</bitWidth>
  22278. </field>
  22279. <field> <name>CHENA</name>
  22280. <description>Channel enable</description>
  22281. <bitOffset>31</bitOffset>
  22282. <bitWidth>1</bitWidth>
  22283. </field>
  22284. </fields>
  22285. </register>
  22286. <register> <name>FS_HCINT0</name>
  22287. <displayName>FS_HCINT0</displayName>
  22288. <description>OTG_FS host channel-0 interrupt register
  22289. (OTG_FS_HCINT0)</description>
  22290. <addressOffset>0x108</addressOffset>
  22291. <size>0x20</size>
  22292. <access>read-write</access>
  22293. <resetValue>0x00000000</resetValue>
  22294. <fields>
  22295. <field> <name>XFRC</name>
  22296. <description>Transfer completed</description>
  22297. <bitOffset>0</bitOffset>
  22298. <bitWidth>1</bitWidth>
  22299. </field>
  22300. <field> <name>CHH</name>
  22301. <description>Channel halted</description>
  22302. <bitOffset>1</bitOffset>
  22303. <bitWidth>1</bitWidth>
  22304. </field>
  22305. <field> <name>STALL</name>
  22306. <description>STALL response received
  22307. interrupt</description>
  22308. <bitOffset>3</bitOffset>
  22309. <bitWidth>1</bitWidth>
  22310. </field>
  22311. <field> <name>NAK</name>
  22312. <description>NAK response received
  22313. interrupt</description>
  22314. <bitOffset>4</bitOffset>
  22315. <bitWidth>1</bitWidth>
  22316. </field>
  22317. <field> <name>ACK</name>
  22318. <description>ACK response received/transmitted
  22319. interrupt</description>
  22320. <bitOffset>5</bitOffset>
  22321. <bitWidth>1</bitWidth>
  22322. </field>
  22323. <field> <name>TXERR</name>
  22324. <description>Transaction error</description>
  22325. <bitOffset>7</bitOffset>
  22326. <bitWidth>1</bitWidth>
  22327. </field>
  22328. <field> <name>BBERR</name>
  22329. <description>Babble error</description>
  22330. <bitOffset>8</bitOffset>
  22331. <bitWidth>1</bitWidth>
  22332. </field>
  22333. <field> <name>FRMOR</name>
  22334. <description>Frame overrun</description>
  22335. <bitOffset>9</bitOffset>
  22336. <bitWidth>1</bitWidth>
  22337. </field>
  22338. <field> <name>DTERR</name>
  22339. <description>Data toggle error</description>
  22340. <bitOffset>10</bitOffset>
  22341. <bitWidth>1</bitWidth>
  22342. </field>
  22343. </fields>
  22344. </register>
  22345. <register> <name>FS_HCINT1</name>
  22346. <displayName>FS_HCINT1</displayName>
  22347. <description>OTG_FS host channel-1 interrupt register
  22348. (OTG_FS_HCINT1)</description>
  22349. <addressOffset>0x128</addressOffset>
  22350. <size>0x20</size>
  22351. <access>read-write</access>
  22352. <resetValue>0x00000000</resetValue>
  22353. <fields>
  22354. <field> <name>XFRC</name>
  22355. <description>Transfer completed</description>
  22356. <bitOffset>0</bitOffset>
  22357. <bitWidth>1</bitWidth>
  22358. </field>
  22359. <field> <name>CHH</name>
  22360. <description>Channel halted</description>
  22361. <bitOffset>1</bitOffset>
  22362. <bitWidth>1</bitWidth>
  22363. </field>
  22364. <field> <name>STALL</name>
  22365. <description>STALL response received
  22366. interrupt</description>
  22367. <bitOffset>3</bitOffset>
  22368. <bitWidth>1</bitWidth>
  22369. </field>
  22370. <field> <name>NAK</name>
  22371. <description>NAK response received
  22372. interrupt</description>
  22373. <bitOffset>4</bitOffset>
  22374. <bitWidth>1</bitWidth>
  22375. </field>
  22376. <field> <name>ACK</name>
  22377. <description>ACK response received/transmitted
  22378. interrupt</description>
  22379. <bitOffset>5</bitOffset>
  22380. <bitWidth>1</bitWidth>
  22381. </field>
  22382. <field> <name>TXERR</name>
  22383. <description>Transaction error</description>
  22384. <bitOffset>7</bitOffset>
  22385. <bitWidth>1</bitWidth>
  22386. </field>
  22387. <field> <name>BBERR</name>
  22388. <description>Babble error</description>
  22389. <bitOffset>8</bitOffset>
  22390. <bitWidth>1</bitWidth>
  22391. </field>
  22392. <field> <name>FRMOR</name>
  22393. <description>Frame overrun</description>
  22394. <bitOffset>9</bitOffset>
  22395. <bitWidth>1</bitWidth>
  22396. </field>
  22397. <field> <name>DTERR</name>
  22398. <description>Data toggle error</description>
  22399. <bitOffset>10</bitOffset>
  22400. <bitWidth>1</bitWidth>
  22401. </field>
  22402. </fields>
  22403. </register>
  22404. <register> <name>FS_HCINT2</name>
  22405. <displayName>FS_HCINT2</displayName>
  22406. <description>OTG_FS host channel-2 interrupt register
  22407. (OTG_FS_HCINT2)</description>
  22408. <addressOffset>0x148</addressOffset>
  22409. <size>0x20</size>
  22410. <access>read-write</access>
  22411. <resetValue>0x00000000</resetValue>
  22412. <fields>
  22413. <field> <name>XFRC</name>
  22414. <description>Transfer completed</description>
  22415. <bitOffset>0</bitOffset>
  22416. <bitWidth>1</bitWidth>
  22417. </field>
  22418. <field> <name>CHH</name>
  22419. <description>Channel halted</description>
  22420. <bitOffset>1</bitOffset>
  22421. <bitWidth>1</bitWidth>
  22422. </field>
  22423. <field> <name>STALL</name>
  22424. <description>STALL response received
  22425. interrupt</description>
  22426. <bitOffset>3</bitOffset>
  22427. <bitWidth>1</bitWidth>
  22428. </field>
  22429. <field> <name>NAK</name>
  22430. <description>NAK response received
  22431. interrupt</description>
  22432. <bitOffset>4</bitOffset>
  22433. <bitWidth>1</bitWidth>
  22434. </field>
  22435. <field> <name>ACK</name>
  22436. <description>ACK response received/transmitted
  22437. interrupt</description>
  22438. <bitOffset>5</bitOffset>
  22439. <bitWidth>1</bitWidth>
  22440. </field>
  22441. <field> <name>TXERR</name>
  22442. <description>Transaction error</description>
  22443. <bitOffset>7</bitOffset>
  22444. <bitWidth>1</bitWidth>
  22445. </field>
  22446. <field> <name>BBERR</name>
  22447. <description>Babble error</description>
  22448. <bitOffset>8</bitOffset>
  22449. <bitWidth>1</bitWidth>
  22450. </field>
  22451. <field> <name>FRMOR</name>
  22452. <description>Frame overrun</description>
  22453. <bitOffset>9</bitOffset>
  22454. <bitWidth>1</bitWidth>
  22455. </field>
  22456. <field> <name>DTERR</name>
  22457. <description>Data toggle error</description>
  22458. <bitOffset>10</bitOffset>
  22459. <bitWidth>1</bitWidth>
  22460. </field>
  22461. </fields>
  22462. </register>
  22463. <register> <name>FS_HCINT3</name>
  22464. <displayName>FS_HCINT3</displayName>
  22465. <description>OTG_FS host channel-3 interrupt register
  22466. (OTG_FS_HCINT3)</description>
  22467. <addressOffset>0x168</addressOffset>
  22468. <size>0x20</size>
  22469. <access>read-write</access>
  22470. <resetValue>0x00000000</resetValue>
  22471. <fields>
  22472. <field> <name>XFRC</name>
  22473. <description>Transfer completed</description>
  22474. <bitOffset>0</bitOffset>
  22475. <bitWidth>1</bitWidth>
  22476. </field>
  22477. <field> <name>CHH</name>
  22478. <description>Channel halted</description>
  22479. <bitOffset>1</bitOffset>
  22480. <bitWidth>1</bitWidth>
  22481. </field>
  22482. <field> <name>STALL</name>
  22483. <description>STALL response received
  22484. interrupt</description>
  22485. <bitOffset>3</bitOffset>
  22486. <bitWidth>1</bitWidth>
  22487. </field>
  22488. <field> <name>NAK</name>
  22489. <description>NAK response received
  22490. interrupt</description>
  22491. <bitOffset>4</bitOffset>
  22492. <bitWidth>1</bitWidth>
  22493. </field>
  22494. <field> <name>ACK</name>
  22495. <description>ACK response received/transmitted
  22496. interrupt</description>
  22497. <bitOffset>5</bitOffset>
  22498. <bitWidth>1</bitWidth>
  22499. </field>
  22500. <field> <name>TXERR</name>
  22501. <description>Transaction error</description>
  22502. <bitOffset>7</bitOffset>
  22503. <bitWidth>1</bitWidth>
  22504. </field>
  22505. <field> <name>BBERR</name>
  22506. <description>Babble error</description>
  22507. <bitOffset>8</bitOffset>
  22508. <bitWidth>1</bitWidth>
  22509. </field>
  22510. <field> <name>FRMOR</name>
  22511. <description>Frame overrun</description>
  22512. <bitOffset>9</bitOffset>
  22513. <bitWidth>1</bitWidth>
  22514. </field>
  22515. <field> <name>DTERR</name>
  22516. <description>Data toggle error</description>
  22517. <bitOffset>10</bitOffset>
  22518. <bitWidth>1</bitWidth>
  22519. </field>
  22520. </fields>
  22521. </register>
  22522. <register> <name>FS_HCINT4</name>
  22523. <displayName>FS_HCINT4</displayName>
  22524. <description>OTG_FS host channel-4 interrupt register
  22525. (OTG_FS_HCINT4)</description>
  22526. <addressOffset>0x188</addressOffset>
  22527. <size>0x20</size>
  22528. <access>read-write</access>
  22529. <resetValue>0x00000000</resetValue>
  22530. <fields>
  22531. <field> <name>XFRC</name>
  22532. <description>Transfer completed</description>
  22533. <bitOffset>0</bitOffset>
  22534. <bitWidth>1</bitWidth>
  22535. </field>
  22536. <field> <name>CHH</name>
  22537. <description>Channel halted</description>
  22538. <bitOffset>1</bitOffset>
  22539. <bitWidth>1</bitWidth>
  22540. </field>
  22541. <field> <name>STALL</name>
  22542. <description>STALL response received
  22543. interrupt</description>
  22544. <bitOffset>3</bitOffset>
  22545. <bitWidth>1</bitWidth>
  22546. </field>
  22547. <field> <name>NAK</name>
  22548. <description>NAK response received
  22549. interrupt</description>
  22550. <bitOffset>4</bitOffset>
  22551. <bitWidth>1</bitWidth>
  22552. </field>
  22553. <field> <name>ACK</name>
  22554. <description>ACK response received/transmitted
  22555. interrupt</description>
  22556. <bitOffset>5</bitOffset>
  22557. <bitWidth>1</bitWidth>
  22558. </field>
  22559. <field> <name>TXERR</name>
  22560. <description>Transaction error</description>
  22561. <bitOffset>7</bitOffset>
  22562. <bitWidth>1</bitWidth>
  22563. </field>
  22564. <field> <name>BBERR</name>
  22565. <description>Babble error</description>
  22566. <bitOffset>8</bitOffset>
  22567. <bitWidth>1</bitWidth>
  22568. </field>
  22569. <field> <name>FRMOR</name>
  22570. <description>Frame overrun</description>
  22571. <bitOffset>9</bitOffset>
  22572. <bitWidth>1</bitWidth>
  22573. </field>
  22574. <field> <name>DTERR</name>
  22575. <description>Data toggle error</description>
  22576. <bitOffset>10</bitOffset>
  22577. <bitWidth>1</bitWidth>
  22578. </field>
  22579. </fields>
  22580. </register>
  22581. <register> <name>FS_HCINT5</name>
  22582. <displayName>FS_HCINT5</displayName>
  22583. <description>OTG_FS host channel-5 interrupt register
  22584. (OTG_FS_HCINT5)</description>
  22585. <addressOffset>0x1A8</addressOffset>
  22586. <size>0x20</size>
  22587. <access>read-write</access>
  22588. <resetValue>0x00000000</resetValue>
  22589. <fields>
  22590. <field> <name>XFRC</name>
  22591. <description>Transfer completed</description>
  22592. <bitOffset>0</bitOffset>
  22593. <bitWidth>1</bitWidth>
  22594. </field>
  22595. <field> <name>CHH</name>
  22596. <description>Channel halted</description>
  22597. <bitOffset>1</bitOffset>
  22598. <bitWidth>1</bitWidth>
  22599. </field>
  22600. <field> <name>STALL</name>
  22601. <description>STALL response received
  22602. interrupt</description>
  22603. <bitOffset>3</bitOffset>
  22604. <bitWidth>1</bitWidth>
  22605. </field>
  22606. <field> <name>NAK</name>
  22607. <description>NAK response received
  22608. interrupt</description>
  22609. <bitOffset>4</bitOffset>
  22610. <bitWidth>1</bitWidth>
  22611. </field>
  22612. <field> <name>ACK</name>
  22613. <description>ACK response received/transmitted
  22614. interrupt</description>
  22615. <bitOffset>5</bitOffset>
  22616. <bitWidth>1</bitWidth>
  22617. </field>
  22618. <field> <name>TXERR</name>
  22619. <description>Transaction error</description>
  22620. <bitOffset>7</bitOffset>
  22621. <bitWidth>1</bitWidth>
  22622. </field>
  22623. <field> <name>BBERR</name>
  22624. <description>Babble error</description>
  22625. <bitOffset>8</bitOffset>
  22626. <bitWidth>1</bitWidth>
  22627. </field>
  22628. <field> <name>FRMOR</name>
  22629. <description>Frame overrun</description>
  22630. <bitOffset>9</bitOffset>
  22631. <bitWidth>1</bitWidth>
  22632. </field>
  22633. <field> <name>DTERR</name>
  22634. <description>Data toggle error</description>
  22635. <bitOffset>10</bitOffset>
  22636. <bitWidth>1</bitWidth>
  22637. </field>
  22638. </fields>
  22639. </register>
  22640. <register> <name>FS_HCINT6</name>
  22641. <displayName>FS_HCINT6</displayName>
  22642. <description>OTG_FS host channel-6 interrupt register
  22643. (OTG_FS_HCINT6)</description>
  22644. <addressOffset>0x1C8</addressOffset>
  22645. <size>0x20</size>
  22646. <access>read-write</access>
  22647. <resetValue>0x00000000</resetValue>
  22648. <fields>
  22649. <field> <name>XFRC</name>
  22650. <description>Transfer completed</description>
  22651. <bitOffset>0</bitOffset>
  22652. <bitWidth>1</bitWidth>
  22653. </field>
  22654. <field> <name>CHH</name>
  22655. <description>Channel halted</description>
  22656. <bitOffset>1</bitOffset>
  22657. <bitWidth>1</bitWidth>
  22658. </field>
  22659. <field> <name>STALL</name>
  22660. <description>STALL response received
  22661. interrupt</description>
  22662. <bitOffset>3</bitOffset>
  22663. <bitWidth>1</bitWidth>
  22664. </field>
  22665. <field> <name>NAK</name>
  22666. <description>NAK response received
  22667. interrupt</description>
  22668. <bitOffset>4</bitOffset>
  22669. <bitWidth>1</bitWidth>
  22670. </field>
  22671. <field> <name>ACK</name>
  22672. <description>ACK response received/transmitted
  22673. interrupt</description>
  22674. <bitOffset>5</bitOffset>
  22675. <bitWidth>1</bitWidth>
  22676. </field>
  22677. <field> <name>TXERR</name>
  22678. <description>Transaction error</description>
  22679. <bitOffset>7</bitOffset>
  22680. <bitWidth>1</bitWidth>
  22681. </field>
  22682. <field> <name>BBERR</name>
  22683. <description>Babble error</description>
  22684. <bitOffset>8</bitOffset>
  22685. <bitWidth>1</bitWidth>
  22686. </field>
  22687. <field> <name>FRMOR</name>
  22688. <description>Frame overrun</description>
  22689. <bitOffset>9</bitOffset>
  22690. <bitWidth>1</bitWidth>
  22691. </field>
  22692. <field> <name>DTERR</name>
  22693. <description>Data toggle error</description>
  22694. <bitOffset>10</bitOffset>
  22695. <bitWidth>1</bitWidth>
  22696. </field>
  22697. </fields>
  22698. </register>
  22699. <register> <name>FS_HCINT7</name>
  22700. <displayName>FS_HCINT7</displayName>
  22701. <description>OTG_FS host channel-7 interrupt register
  22702. (OTG_FS_HCINT7)</description>
  22703. <addressOffset>0x1E8</addressOffset>
  22704. <size>0x20</size>
  22705. <access>read-write</access>
  22706. <resetValue>0x00000000</resetValue>
  22707. <fields>
  22708. <field> <name>XFRC</name>
  22709. <description>Transfer completed</description>
  22710. <bitOffset>0</bitOffset>
  22711. <bitWidth>1</bitWidth>
  22712. </field>
  22713. <field> <name>CHH</name>
  22714. <description>Channel halted</description>
  22715. <bitOffset>1</bitOffset>
  22716. <bitWidth>1</bitWidth>
  22717. </field>
  22718. <field> <name>STALL</name>
  22719. <description>STALL response received
  22720. interrupt</description>
  22721. <bitOffset>3</bitOffset>
  22722. <bitWidth>1</bitWidth>
  22723. </field>
  22724. <field> <name>NAK</name>
  22725. <description>NAK response received
  22726. interrupt</description>
  22727. <bitOffset>4</bitOffset>
  22728. <bitWidth>1</bitWidth>
  22729. </field>
  22730. <field> <name>ACK</name>
  22731. <description>ACK response received/transmitted
  22732. interrupt</description>
  22733. <bitOffset>5</bitOffset>
  22734. <bitWidth>1</bitWidth>
  22735. </field>
  22736. <field> <name>TXERR</name>
  22737. <description>Transaction error</description>
  22738. <bitOffset>7</bitOffset>
  22739. <bitWidth>1</bitWidth>
  22740. </field>
  22741. <field> <name>BBERR</name>
  22742. <description>Babble error</description>
  22743. <bitOffset>8</bitOffset>
  22744. <bitWidth>1</bitWidth>
  22745. </field>
  22746. <field> <name>FRMOR</name>
  22747. <description>Frame overrun</description>
  22748. <bitOffset>9</bitOffset>
  22749. <bitWidth>1</bitWidth>
  22750. </field>
  22751. <field> <name>DTERR</name>
  22752. <description>Data toggle error</description>
  22753. <bitOffset>10</bitOffset>
  22754. <bitWidth>1</bitWidth>
  22755. </field>
  22756. </fields>
  22757. </register>
  22758. <register> <name>FS_HCINTMSK0</name>
  22759. <displayName>FS_HCINTMSK0</displayName>
  22760. <description>OTG_FS host channel-0 mask register
  22761. (OTG_FS_HCINTMSK0)</description>
  22762. <addressOffset>0x10C</addressOffset>
  22763. <size>0x20</size>
  22764. <access>read-write</access>
  22765. <resetValue>0x00000000</resetValue>
  22766. <fields>
  22767. <field> <name>XFRCM</name>
  22768. <description>Transfer completed mask</description>
  22769. <bitOffset>0</bitOffset>
  22770. <bitWidth>1</bitWidth>
  22771. </field>
  22772. <field> <name>CHHM</name>
  22773. <description>Channel halted mask</description>
  22774. <bitOffset>1</bitOffset>
  22775. <bitWidth>1</bitWidth>
  22776. </field>
  22777. <field> <name>STALLM</name>
  22778. <description>STALL response received interrupt
  22779. mask</description>
  22780. <bitOffset>3</bitOffset>
  22781. <bitWidth>1</bitWidth>
  22782. </field>
  22783. <field> <name>NAKM</name>
  22784. <description>NAK response received interrupt
  22785. mask</description>
  22786. <bitOffset>4</bitOffset>
  22787. <bitWidth>1</bitWidth>
  22788. </field>
  22789. <field> <name>ACKM</name>
  22790. <description>ACK response received/transmitted
  22791. interrupt mask</description>
  22792. <bitOffset>5</bitOffset>
  22793. <bitWidth>1</bitWidth>
  22794. </field>
  22795. <field> <name>NYET</name>
  22796. <description>response received interrupt
  22797. mask</description>
  22798. <bitOffset>6</bitOffset>
  22799. <bitWidth>1</bitWidth>
  22800. </field>
  22801. <field> <name>TXERRM</name>
  22802. <description>Transaction error mask</description>
  22803. <bitOffset>7</bitOffset>
  22804. <bitWidth>1</bitWidth>
  22805. </field>
  22806. <field> <name>BBERRM</name>
  22807. <description>Babble error mask</description>
  22808. <bitOffset>8</bitOffset>
  22809. <bitWidth>1</bitWidth>
  22810. </field>
  22811. <field> <name>FRMORM</name>
  22812. <description>Frame overrun mask</description>
  22813. <bitOffset>9</bitOffset>
  22814. <bitWidth>1</bitWidth>
  22815. </field>
  22816. <field> <name>DTERRM</name>
  22817. <description>Data toggle error mask</description>
  22818. <bitOffset>10</bitOffset>
  22819. <bitWidth>1</bitWidth>
  22820. </field>
  22821. </fields>
  22822. </register>
  22823. <register> <name>FS_HCINTMSK1</name>
  22824. <displayName>FS_HCINTMSK1</displayName>
  22825. <description>OTG_FS host channel-1 mask register
  22826. (OTG_FS_HCINTMSK1)</description>
  22827. <addressOffset>0x12C</addressOffset>
  22828. <size>0x20</size>
  22829. <access>read-write</access>
  22830. <resetValue>0x00000000</resetValue>
  22831. <fields>
  22832. <field> <name>XFRCM</name>
  22833. <description>Transfer completed mask</description>
  22834. <bitOffset>0</bitOffset>
  22835. <bitWidth>1</bitWidth>
  22836. </field>
  22837. <field> <name>CHHM</name>
  22838. <description>Channel halted mask</description>
  22839. <bitOffset>1</bitOffset>
  22840. <bitWidth>1</bitWidth>
  22841. </field>
  22842. <field> <name>STALLM</name>
  22843. <description>STALL response received interrupt
  22844. mask</description>
  22845. <bitOffset>3</bitOffset>
  22846. <bitWidth>1</bitWidth>
  22847. </field>
  22848. <field> <name>NAKM</name>
  22849. <description>NAK response received interrupt
  22850. mask</description>
  22851. <bitOffset>4</bitOffset>
  22852. <bitWidth>1</bitWidth>
  22853. </field>
  22854. <field> <name>ACKM</name>
  22855. <description>ACK response received/transmitted
  22856. interrupt mask</description>
  22857. <bitOffset>5</bitOffset>
  22858. <bitWidth>1</bitWidth>
  22859. </field>
  22860. <field> <name>NYET</name>
  22861. <description>response received interrupt
  22862. mask</description>
  22863. <bitOffset>6</bitOffset>
  22864. <bitWidth>1</bitWidth>
  22865. </field>
  22866. <field> <name>TXERRM</name>
  22867. <description>Transaction error mask</description>
  22868. <bitOffset>7</bitOffset>
  22869. <bitWidth>1</bitWidth>
  22870. </field>
  22871. <field> <name>BBERRM</name>
  22872. <description>Babble error mask</description>
  22873. <bitOffset>8</bitOffset>
  22874. <bitWidth>1</bitWidth>
  22875. </field>
  22876. <field> <name>FRMORM</name>
  22877. <description>Frame overrun mask</description>
  22878. <bitOffset>9</bitOffset>
  22879. <bitWidth>1</bitWidth>
  22880. </field>
  22881. <field> <name>DTERRM</name>
  22882. <description>Data toggle error mask</description>
  22883. <bitOffset>10</bitOffset>
  22884. <bitWidth>1</bitWidth>
  22885. </field>
  22886. </fields>
  22887. </register>
  22888. <register> <name>FS_HCINTMSK2</name>
  22889. <displayName>FS_HCINTMSK2</displayName>
  22890. <description>OTG_FS host channel-2 mask register
  22891. (OTG_FS_HCINTMSK2)</description>
  22892. <addressOffset>0x14C</addressOffset>
  22893. <size>0x20</size>
  22894. <access>read-write</access>
  22895. <resetValue>0x00000000</resetValue>
  22896. <fields>
  22897. <field> <name>XFRCM</name>
  22898. <description>Transfer completed mask</description>
  22899. <bitOffset>0</bitOffset>
  22900. <bitWidth>1</bitWidth>
  22901. </field>
  22902. <field> <name>CHHM</name>
  22903. <description>Channel halted mask</description>
  22904. <bitOffset>1</bitOffset>
  22905. <bitWidth>1</bitWidth>
  22906. </field>
  22907. <field> <name>STALLM</name>
  22908. <description>STALL response received interrupt
  22909. mask</description>
  22910. <bitOffset>3</bitOffset>
  22911. <bitWidth>1</bitWidth>
  22912. </field>
  22913. <field> <name>NAKM</name>
  22914. <description>NAK response received interrupt
  22915. mask</description>
  22916. <bitOffset>4</bitOffset>
  22917. <bitWidth>1</bitWidth>
  22918. </field>
  22919. <field> <name>ACKM</name>
  22920. <description>ACK response received/transmitted
  22921. interrupt mask</description>
  22922. <bitOffset>5</bitOffset>
  22923. <bitWidth>1</bitWidth>
  22924. </field>
  22925. <field> <name>NYET</name>
  22926. <description>response received interrupt
  22927. mask</description>
  22928. <bitOffset>6</bitOffset>
  22929. <bitWidth>1</bitWidth>
  22930. </field>
  22931. <field> <name>TXERRM</name>
  22932. <description>Transaction error mask</description>
  22933. <bitOffset>7</bitOffset>
  22934. <bitWidth>1</bitWidth>
  22935. </field>
  22936. <field> <name>BBERRM</name>
  22937. <description>Babble error mask</description>
  22938. <bitOffset>8</bitOffset>
  22939. <bitWidth>1</bitWidth>
  22940. </field>
  22941. <field> <name>FRMORM</name>
  22942. <description>Frame overrun mask</description>
  22943. <bitOffset>9</bitOffset>
  22944. <bitWidth>1</bitWidth>
  22945. </field>
  22946. <field> <name>DTERRM</name>
  22947. <description>Data toggle error mask</description>
  22948. <bitOffset>10</bitOffset>
  22949. <bitWidth>1</bitWidth>
  22950. </field>
  22951. </fields>
  22952. </register>
  22953. <register> <name>FS_HCINTMSK3</name>
  22954. <displayName>FS_HCINTMSK3</displayName>
  22955. <description>OTG_FS host channel-3 mask register
  22956. (OTG_FS_HCINTMSK3)</description>
  22957. <addressOffset>0x16C</addressOffset>
  22958. <size>0x20</size>
  22959. <access>read-write</access>
  22960. <resetValue>0x00000000</resetValue>
  22961. <fields>
  22962. <field> <name>XFRCM</name>
  22963. <description>Transfer completed mask</description>
  22964. <bitOffset>0</bitOffset>
  22965. <bitWidth>1</bitWidth>
  22966. </field>
  22967. <field> <name>CHHM</name>
  22968. <description>Channel halted mask</description>
  22969. <bitOffset>1</bitOffset>
  22970. <bitWidth>1</bitWidth>
  22971. </field>
  22972. <field> <name>STALLM</name>
  22973. <description>STALL response received interrupt
  22974. mask</description>
  22975. <bitOffset>3</bitOffset>
  22976. <bitWidth>1</bitWidth>
  22977. </field>
  22978. <field> <name>NAKM</name>
  22979. <description>NAK response received interrupt
  22980. mask</description>
  22981. <bitOffset>4</bitOffset>
  22982. <bitWidth>1</bitWidth>
  22983. </field>
  22984. <field> <name>ACKM</name>
  22985. <description>ACK response received/transmitted
  22986. interrupt mask</description>
  22987. <bitOffset>5</bitOffset>
  22988. <bitWidth>1</bitWidth>
  22989. </field>
  22990. <field> <name>NYET</name>
  22991. <description>response received interrupt
  22992. mask</description>
  22993. <bitOffset>6</bitOffset>
  22994. <bitWidth>1</bitWidth>
  22995. </field>
  22996. <field> <name>TXERRM</name>
  22997. <description>Transaction error mask</description>
  22998. <bitOffset>7</bitOffset>
  22999. <bitWidth>1</bitWidth>
  23000. </field>
  23001. <field> <name>BBERRM</name>
  23002. <description>Babble error mask</description>
  23003. <bitOffset>8</bitOffset>
  23004. <bitWidth>1</bitWidth>
  23005. </field>
  23006. <field> <name>FRMORM</name>
  23007. <description>Frame overrun mask</description>
  23008. <bitOffset>9</bitOffset>
  23009. <bitWidth>1</bitWidth>
  23010. </field>
  23011. <field> <name>DTERRM</name>
  23012. <description>Data toggle error mask</description>
  23013. <bitOffset>10</bitOffset>
  23014. <bitWidth>1</bitWidth>
  23015. </field>
  23016. </fields>
  23017. </register>
  23018. <register> <name>FS_HCINTMSK4</name>
  23019. <displayName>FS_HCINTMSK4</displayName>
  23020. <description>OTG_FS host channel-4 mask register
  23021. (OTG_FS_HCINTMSK4)</description>
  23022. <addressOffset>0x18C</addressOffset>
  23023. <size>0x20</size>
  23024. <access>read-write</access>
  23025. <resetValue>0x00000000</resetValue>
  23026. <fields>
  23027. <field> <name>XFRCM</name>
  23028. <description>Transfer completed mask</description>
  23029. <bitOffset>0</bitOffset>
  23030. <bitWidth>1</bitWidth>
  23031. </field>
  23032. <field> <name>CHHM</name>
  23033. <description>Channel halted mask</description>
  23034. <bitOffset>1</bitOffset>
  23035. <bitWidth>1</bitWidth>
  23036. </field>
  23037. <field> <name>STALLM</name>
  23038. <description>STALL response received interrupt
  23039. mask</description>
  23040. <bitOffset>3</bitOffset>
  23041. <bitWidth>1</bitWidth>
  23042. </field>
  23043. <field> <name>NAKM</name>
  23044. <description>NAK response received interrupt
  23045. mask</description>
  23046. <bitOffset>4</bitOffset>
  23047. <bitWidth>1</bitWidth>
  23048. </field>
  23049. <field> <name>ACKM</name>
  23050. <description>ACK response received/transmitted
  23051. interrupt mask</description>
  23052. <bitOffset>5</bitOffset>
  23053. <bitWidth>1</bitWidth>
  23054. </field>
  23055. <field> <name>NYET</name>
  23056. <description>response received interrupt
  23057. mask</description>
  23058. <bitOffset>6</bitOffset>
  23059. <bitWidth>1</bitWidth>
  23060. </field>
  23061. <field> <name>TXERRM</name>
  23062. <description>Transaction error mask</description>
  23063. <bitOffset>7</bitOffset>
  23064. <bitWidth>1</bitWidth>
  23065. </field>
  23066. <field> <name>BBERRM</name>
  23067. <description>Babble error mask</description>
  23068. <bitOffset>8</bitOffset>
  23069. <bitWidth>1</bitWidth>
  23070. </field>
  23071. <field> <name>FRMORM</name>
  23072. <description>Frame overrun mask</description>
  23073. <bitOffset>9</bitOffset>
  23074. <bitWidth>1</bitWidth>
  23075. </field>
  23076. <field> <name>DTERRM</name>
  23077. <description>Data toggle error mask</description>
  23078. <bitOffset>10</bitOffset>
  23079. <bitWidth>1</bitWidth>
  23080. </field>
  23081. </fields>
  23082. </register>
  23083. <register> <name>FS_HCINTMSK5</name>
  23084. <displayName>FS_HCINTMSK5</displayName>
  23085. <description>OTG_FS host channel-5 mask register
  23086. (OTG_FS_HCINTMSK5)</description>
  23087. <addressOffset>0x1AC</addressOffset>
  23088. <size>0x20</size>
  23089. <access>read-write</access>
  23090. <resetValue>0x00000000</resetValue>
  23091. <fields>
  23092. <field> <name>XFRCM</name>
  23093. <description>Transfer completed mask</description>
  23094. <bitOffset>0</bitOffset>
  23095. <bitWidth>1</bitWidth>
  23096. </field>
  23097. <field> <name>CHHM</name>
  23098. <description>Channel halted mask</description>
  23099. <bitOffset>1</bitOffset>
  23100. <bitWidth>1</bitWidth>
  23101. </field>
  23102. <field> <name>STALLM</name>
  23103. <description>STALL response received interrupt
  23104. mask</description>
  23105. <bitOffset>3</bitOffset>
  23106. <bitWidth>1</bitWidth>
  23107. </field>
  23108. <field> <name>NAKM</name>
  23109. <description>NAK response received interrupt
  23110. mask</description>
  23111. <bitOffset>4</bitOffset>
  23112. <bitWidth>1</bitWidth>
  23113. </field>
  23114. <field> <name>ACKM</name>
  23115. <description>ACK response received/transmitted
  23116. interrupt mask</description>
  23117. <bitOffset>5</bitOffset>
  23118. <bitWidth>1</bitWidth>
  23119. </field>
  23120. <field> <name>NYET</name>
  23121. <description>response received interrupt
  23122. mask</description>
  23123. <bitOffset>6</bitOffset>
  23124. <bitWidth>1</bitWidth>
  23125. </field>
  23126. <field> <name>TXERRM</name>
  23127. <description>Transaction error mask</description>
  23128. <bitOffset>7</bitOffset>
  23129. <bitWidth>1</bitWidth>
  23130. </field>
  23131. <field> <name>BBERRM</name>
  23132. <description>Babble error mask</description>
  23133. <bitOffset>8</bitOffset>
  23134. <bitWidth>1</bitWidth>
  23135. </field>
  23136. <field> <name>FRMORM</name>
  23137. <description>Frame overrun mask</description>
  23138. <bitOffset>9</bitOffset>
  23139. <bitWidth>1</bitWidth>
  23140. </field>
  23141. <field> <name>DTERRM</name>
  23142. <description>Data toggle error mask</description>
  23143. <bitOffset>10</bitOffset>
  23144. <bitWidth>1</bitWidth>
  23145. </field>
  23146. </fields>
  23147. </register>
  23148. <register> <name>FS_HCINTMSK6</name>
  23149. <displayName>FS_HCINTMSK6</displayName>
  23150. <description>OTG_FS host channel-6 mask register
  23151. (OTG_FS_HCINTMSK6)</description>
  23152. <addressOffset>0x1CC</addressOffset>
  23153. <size>0x20</size>
  23154. <access>read-write</access>
  23155. <resetValue>0x00000000</resetValue>
  23156. <fields>
  23157. <field> <name>XFRCM</name>
  23158. <description>Transfer completed mask</description>
  23159. <bitOffset>0</bitOffset>
  23160. <bitWidth>1</bitWidth>
  23161. </field>
  23162. <field> <name>CHHM</name>
  23163. <description>Channel halted mask</description>
  23164. <bitOffset>1</bitOffset>
  23165. <bitWidth>1</bitWidth>
  23166. </field>
  23167. <field> <name>STALLM</name>
  23168. <description>STALL response received interrupt
  23169. mask</description>
  23170. <bitOffset>3</bitOffset>
  23171. <bitWidth>1</bitWidth>
  23172. </field>
  23173. <field> <name>NAKM</name>
  23174. <description>NAK response received interrupt
  23175. mask</description>
  23176. <bitOffset>4</bitOffset>
  23177. <bitWidth>1</bitWidth>
  23178. </field>
  23179. <field> <name>ACKM</name>
  23180. <description>ACK response received/transmitted
  23181. interrupt mask</description>
  23182. <bitOffset>5</bitOffset>
  23183. <bitWidth>1</bitWidth>
  23184. </field>
  23185. <field> <name>NYET</name>
  23186. <description>response received interrupt
  23187. mask</description>
  23188. <bitOffset>6</bitOffset>
  23189. <bitWidth>1</bitWidth>
  23190. </field>
  23191. <field> <name>TXERRM</name>
  23192. <description>Transaction error mask</description>
  23193. <bitOffset>7</bitOffset>
  23194. <bitWidth>1</bitWidth>
  23195. </field>
  23196. <field> <name>BBERRM</name>
  23197. <description>Babble error mask</description>
  23198. <bitOffset>8</bitOffset>
  23199. <bitWidth>1</bitWidth>
  23200. </field>
  23201. <field> <name>FRMORM</name>
  23202. <description>Frame overrun mask</description>
  23203. <bitOffset>9</bitOffset>
  23204. <bitWidth>1</bitWidth>
  23205. </field>
  23206. <field> <name>DTERRM</name>
  23207. <description>Data toggle error mask</description>
  23208. <bitOffset>10</bitOffset>
  23209. <bitWidth>1</bitWidth>
  23210. </field>
  23211. </fields>
  23212. </register>
  23213. <register> <name>FS_HCINTMSK7</name>
  23214. <displayName>FS_HCINTMSK7</displayName>
  23215. <description>OTG_FS host channel-7 mask register
  23216. (OTG_FS_HCINTMSK7)</description>
  23217. <addressOffset>0x1EC</addressOffset>
  23218. <size>0x20</size>
  23219. <access>read-write</access>
  23220. <resetValue>0x00000000</resetValue>
  23221. <fields>
  23222. <field> <name>XFRCM</name>
  23223. <description>Transfer completed mask</description>
  23224. <bitOffset>0</bitOffset>
  23225. <bitWidth>1</bitWidth>
  23226. </field>
  23227. <field> <name>CHHM</name>
  23228. <description>Channel halted mask</description>
  23229. <bitOffset>1</bitOffset>
  23230. <bitWidth>1</bitWidth>
  23231. </field>
  23232. <field> <name>STALLM</name>
  23233. <description>STALL response received interrupt
  23234. mask</description>
  23235. <bitOffset>3</bitOffset>
  23236. <bitWidth>1</bitWidth>
  23237. </field>
  23238. <field> <name>NAKM</name>
  23239. <description>NAK response received interrupt
  23240. mask</description>
  23241. <bitOffset>4</bitOffset>
  23242. <bitWidth>1</bitWidth>
  23243. </field>
  23244. <field> <name>ACKM</name>
  23245. <description>ACK response received/transmitted
  23246. interrupt mask</description>
  23247. <bitOffset>5</bitOffset>
  23248. <bitWidth>1</bitWidth>
  23249. </field>
  23250. <field> <name>NYET</name>
  23251. <description>response received interrupt
  23252. mask</description>
  23253. <bitOffset>6</bitOffset>
  23254. <bitWidth>1</bitWidth>
  23255. </field>
  23256. <field> <name>TXERRM</name>
  23257. <description>Transaction error mask</description>
  23258. <bitOffset>7</bitOffset>
  23259. <bitWidth>1</bitWidth>
  23260. </field>
  23261. <field> <name>BBERRM</name>
  23262. <description>Babble error mask</description>
  23263. <bitOffset>8</bitOffset>
  23264. <bitWidth>1</bitWidth>
  23265. </field>
  23266. <field> <name>FRMORM</name>
  23267. <description>Frame overrun mask</description>
  23268. <bitOffset>9</bitOffset>
  23269. <bitWidth>1</bitWidth>
  23270. </field>
  23271. <field> <name>DTERRM</name>
  23272. <description>Data toggle error mask</description>
  23273. <bitOffset>10</bitOffset>
  23274. <bitWidth>1</bitWidth>
  23275. </field>
  23276. </fields>
  23277. </register>
  23278. <register> <name>FS_HCTSIZ0</name>
  23279. <displayName>FS_HCTSIZ0</displayName>
  23280. <description>OTG_FS host channel-0 transfer size
  23281. register</description>
  23282. <addressOffset>0x110</addressOffset>
  23283. <size>0x20</size>
  23284. <access>read-write</access>
  23285. <resetValue>0x00000000</resetValue>
  23286. <fields>
  23287. <field> <name>XFRSIZ</name>
  23288. <description>Transfer size</description>
  23289. <bitOffset>0</bitOffset>
  23290. <bitWidth>19</bitWidth>
  23291. </field>
  23292. <field> <name>PKTCNT</name>
  23293. <description>Packet count</description>
  23294. <bitOffset>19</bitOffset>
  23295. <bitWidth>10</bitWidth>
  23296. </field>
  23297. <field> <name>DPID</name>
  23298. <description>Data PID</description>
  23299. <bitOffset>29</bitOffset>
  23300. <bitWidth>2</bitWidth>
  23301. </field>
  23302. </fields>
  23303. </register>
  23304. <register> <name>FS_HCTSIZ1</name>
  23305. <displayName>FS_HCTSIZ1</displayName>
  23306. <description>OTG_FS host channel-1 transfer size
  23307. register</description>
  23308. <addressOffset>0x130</addressOffset>
  23309. <size>0x20</size>
  23310. <access>read-write</access>
  23311. <resetValue>0x00000000</resetValue>
  23312. <fields>
  23313. <field> <name>XFRSIZ</name>
  23314. <description>Transfer size</description>
  23315. <bitOffset>0</bitOffset>
  23316. <bitWidth>19</bitWidth>
  23317. </field>
  23318. <field> <name>PKTCNT</name>
  23319. <description>Packet count</description>
  23320. <bitOffset>19</bitOffset>
  23321. <bitWidth>10</bitWidth>
  23322. </field>
  23323. <field> <name>DPID</name>
  23324. <description>Data PID</description>
  23325. <bitOffset>29</bitOffset>
  23326. <bitWidth>2</bitWidth>
  23327. </field>
  23328. </fields>
  23329. </register>
  23330. <register> <name>FS_HCTSIZ2</name>
  23331. <displayName>FS_HCTSIZ2</displayName>
  23332. <description>OTG_FS host channel-2 transfer size
  23333. register</description>
  23334. <addressOffset>0x150</addressOffset>
  23335. <size>0x20</size>
  23336. <access>read-write</access>
  23337. <resetValue>0x00000000</resetValue>
  23338. <fields>
  23339. <field> <name>XFRSIZ</name>
  23340. <description>Transfer size</description>
  23341. <bitOffset>0</bitOffset>
  23342. <bitWidth>19</bitWidth>
  23343. </field>
  23344. <field> <name>PKTCNT</name>
  23345. <description>Packet count</description>
  23346. <bitOffset>19</bitOffset>
  23347. <bitWidth>10</bitWidth>
  23348. </field>
  23349. <field> <name>DPID</name>
  23350. <description>Data PID</description>
  23351. <bitOffset>29</bitOffset>
  23352. <bitWidth>2</bitWidth>
  23353. </field>
  23354. </fields>
  23355. </register>
  23356. <register> <name>FS_HCTSIZ3</name>
  23357. <displayName>FS_HCTSIZ3</displayName>
  23358. <description>OTG_FS host channel-3 transfer size
  23359. register</description>
  23360. <addressOffset>0x170</addressOffset>
  23361. <size>0x20</size>
  23362. <access>read-write</access>
  23363. <resetValue>0x00000000</resetValue>
  23364. <fields>
  23365. <field> <name>XFRSIZ</name>
  23366. <description>Transfer size</description>
  23367. <bitOffset>0</bitOffset>
  23368. <bitWidth>19</bitWidth>
  23369. </field>
  23370. <field> <name>PKTCNT</name>
  23371. <description>Packet count</description>
  23372. <bitOffset>19</bitOffset>
  23373. <bitWidth>10</bitWidth>
  23374. </field>
  23375. <field> <name>DPID</name>
  23376. <description>Data PID</description>
  23377. <bitOffset>29</bitOffset>
  23378. <bitWidth>2</bitWidth>
  23379. </field>
  23380. </fields>
  23381. </register>
  23382. <register> <name>FS_HCTSIZ4</name>
  23383. <displayName>FS_HCTSIZ4</displayName>
  23384. <description>OTG_FS host channel-x transfer size
  23385. register</description>
  23386. <addressOffset>0x190</addressOffset>
  23387. <size>0x20</size>
  23388. <access>read-write</access>
  23389. <resetValue>0x00000000</resetValue>
  23390. <fields>
  23391. <field> <name>XFRSIZ</name>
  23392. <description>Transfer size</description>
  23393. <bitOffset>0</bitOffset>
  23394. <bitWidth>19</bitWidth>
  23395. </field>
  23396. <field> <name>PKTCNT</name>
  23397. <description>Packet count</description>
  23398. <bitOffset>19</bitOffset>
  23399. <bitWidth>10</bitWidth>
  23400. </field>
  23401. <field> <name>DPID</name>
  23402. <description>Data PID</description>
  23403. <bitOffset>29</bitOffset>
  23404. <bitWidth>2</bitWidth>
  23405. </field>
  23406. </fields>
  23407. </register>
  23408. <register> <name>FS_HCTSIZ5</name>
  23409. <displayName>FS_HCTSIZ5</displayName>
  23410. <description>OTG_FS host channel-5 transfer size
  23411. register</description>
  23412. <addressOffset>0x1B0</addressOffset>
  23413. <size>0x20</size>
  23414. <access>read-write</access>
  23415. <resetValue>0x00000000</resetValue>
  23416. <fields>
  23417. <field> <name>XFRSIZ</name>
  23418. <description>Transfer size</description>
  23419. <bitOffset>0</bitOffset>
  23420. <bitWidth>19</bitWidth>
  23421. </field>
  23422. <field> <name>PKTCNT</name>
  23423. <description>Packet count</description>
  23424. <bitOffset>19</bitOffset>
  23425. <bitWidth>10</bitWidth>
  23426. </field>
  23427. <field> <name>DPID</name>
  23428. <description>Data PID</description>
  23429. <bitOffset>29</bitOffset>
  23430. <bitWidth>2</bitWidth>
  23431. </field>
  23432. </fields>
  23433. </register>
  23434. <register> <name>FS_HCTSIZ6</name>
  23435. <displayName>FS_HCTSIZ6</displayName>
  23436. <description>OTG_FS host channel-6 transfer size
  23437. register</description>
  23438. <addressOffset>0x1D0</addressOffset>
  23439. <size>0x20</size>
  23440. <access>read-write</access>
  23441. <resetValue>0x00000000</resetValue>
  23442. <fields>
  23443. <field> <name>XFRSIZ</name>
  23444. <description>Transfer size</description>
  23445. <bitOffset>0</bitOffset>
  23446. <bitWidth>19</bitWidth>
  23447. </field>
  23448. <field> <name>PKTCNT</name>
  23449. <description>Packet count</description>
  23450. <bitOffset>19</bitOffset>
  23451. <bitWidth>10</bitWidth>
  23452. </field>
  23453. <field> <name>DPID</name>
  23454. <description>Data PID</description>
  23455. <bitOffset>29</bitOffset>
  23456. <bitWidth>2</bitWidth>
  23457. </field>
  23458. </fields>
  23459. </register>
  23460. <register> <name>FS_HCTSIZ7</name>
  23461. <displayName>FS_HCTSIZ7</displayName>
  23462. <description>OTG_FS host channel-7 transfer size
  23463. register</description>
  23464. <addressOffset>0x1F0</addressOffset>
  23465. <size>0x20</size>
  23466. <access>read-write</access>
  23467. <resetValue>0x00000000</resetValue>
  23468. <fields>
  23469. <field> <name>XFRSIZ</name>
  23470. <description>Transfer size</description>
  23471. <bitOffset>0</bitOffset>
  23472. <bitWidth>19</bitWidth>
  23473. </field>
  23474. <field> <name>PKTCNT</name>
  23475. <description>Packet count</description>
  23476. <bitOffset>19</bitOffset>
  23477. <bitWidth>10</bitWidth>
  23478. </field>
  23479. <field> <name>DPID</name>
  23480. <description>Data PID</description>
  23481. <bitOffset>29</bitOffset>
  23482. <bitWidth>2</bitWidth>
  23483. </field>
  23484. </fields>
  23485. </register>
  23486. </registers>
  23487. </peripheral>
  23488. <peripheral> <name>OTG_FS_DEVICE</name>
  23489. <description>USB on the go full speed</description>
  23490. <groupName>USB_OTG_FS</groupName>
  23491. <baseAddress>0x50000800</baseAddress>
  23492. <addressBlock>
  23493. <offset>0x0</offset>
  23494. <size>0x400</size>
  23495. <usage>registers</usage>
  23496. </addressBlock>
  23497. <registers>
  23498. <register> <name>FS_DCFG</name>
  23499. <displayName>FS_DCFG</displayName>
  23500. <description>OTG_FS device configuration register
  23501. (OTG_FS_DCFG)</description>
  23502. <addressOffset>0x0</addressOffset>
  23503. <size>0x20</size>
  23504. <access>read-write</access>
  23505. <resetValue>0x02200000</resetValue>
  23506. <fields>
  23507. <field> <name>DSPD</name>
  23508. <description>Device speed</description>
  23509. <bitOffset>0</bitOffset>
  23510. <bitWidth>2</bitWidth>
  23511. </field>
  23512. <field> <name>NZLSOHSK</name>
  23513. <description>Non-zero-length status OUT
  23514. handshake</description>
  23515. <bitOffset>2</bitOffset>
  23516. <bitWidth>1</bitWidth>
  23517. </field>
  23518. <field> <name>DAD</name>
  23519. <description>Device address</description>
  23520. <bitOffset>4</bitOffset>
  23521. <bitWidth>7</bitWidth>
  23522. </field>
  23523. <field> <name>PFIVL</name>
  23524. <description>Periodic frame interval</description>
  23525. <bitOffset>11</bitOffset>
  23526. <bitWidth>2</bitWidth>
  23527. </field>
  23528. </fields>
  23529. </register>
  23530. <register> <name>FS_DCTL</name>
  23531. <displayName>FS_DCTL</displayName>
  23532. <description>OTG_FS device control register
  23533. (OTG_FS_DCTL)</description>
  23534. <addressOffset>0x4</addressOffset>
  23535. <size>0x20</size>
  23536. <resetValue>0x00000000</resetValue>
  23537. <fields>
  23538. <field> <name>RWUSIG</name>
  23539. <description>Remote wakeup signaling</description>
  23540. <bitOffset>0</bitOffset>
  23541. <bitWidth>1</bitWidth>
  23542. <access>read-write</access>
  23543. </field>
  23544. <field> <name>SDIS</name>
  23545. <description>Soft disconnect</description>
  23546. <bitOffset>1</bitOffset>
  23547. <bitWidth>1</bitWidth>
  23548. <access>read-write</access>
  23549. </field>
  23550. <field> <name>GINSTS</name>
  23551. <description>Global IN NAK status</description>
  23552. <bitOffset>2</bitOffset>
  23553. <bitWidth>1</bitWidth>
  23554. <access>read-only</access>
  23555. </field>
  23556. <field> <name>GONSTS</name>
  23557. <description>Global OUT NAK status</description>
  23558. <bitOffset>3</bitOffset>
  23559. <bitWidth>1</bitWidth>
  23560. <access>read-only</access>
  23561. </field>
  23562. <field> <name>TCTL</name>
  23563. <description>Test control</description>
  23564. <bitOffset>4</bitOffset>
  23565. <bitWidth>3</bitWidth>
  23566. <access>read-write</access>
  23567. </field>
  23568. <field> <name>SGINAK</name>
  23569. <description>Set global IN NAK</description>
  23570. <bitOffset>7</bitOffset>
  23571. <bitWidth>1</bitWidth>
  23572. <access>read-write</access>
  23573. </field>
  23574. <field> <name>CGINAK</name>
  23575. <description>Clear global IN NAK</description>
  23576. <bitOffset>8</bitOffset>
  23577. <bitWidth>1</bitWidth>
  23578. <access>read-write</access>
  23579. </field>
  23580. <field> <name>SGONAK</name>
  23581. <description>Set global OUT NAK</description>
  23582. <bitOffset>9</bitOffset>
  23583. <bitWidth>1</bitWidth>
  23584. <access>read-write</access>
  23585. </field>
  23586. <field> <name>CGONAK</name>
  23587. <description>Clear global OUT NAK</description>
  23588. <bitOffset>10</bitOffset>
  23589. <bitWidth>1</bitWidth>
  23590. <access>read-write</access>
  23591. </field>
  23592. <field> <name>POPRGDNE</name>
  23593. <description>Power-on programming done</description>
  23594. <bitOffset>11</bitOffset>
  23595. <bitWidth>1</bitWidth>
  23596. <access>read-write</access>
  23597. </field>
  23598. </fields>
  23599. </register>
  23600. <register> <name>FS_DSTS</name>
  23601. <displayName>FS_DSTS</displayName>
  23602. <description>OTG_FS device status register
  23603. (OTG_FS_DSTS)</description>
  23604. <addressOffset>0x8</addressOffset>
  23605. <size>0x20</size>
  23606. <access>read-only</access>
  23607. <resetValue>0x00000010</resetValue>
  23608. <fields>
  23609. <field> <name>SUSPSTS</name>
  23610. <description>Suspend status</description>
  23611. <bitOffset>0</bitOffset>
  23612. <bitWidth>1</bitWidth>
  23613. </field>
  23614. <field> <name>ENUMSPD</name>
  23615. <description>Enumerated speed</description>
  23616. <bitOffset>1</bitOffset>
  23617. <bitWidth>2</bitWidth>
  23618. </field>
  23619. <field> <name>EERR</name>
  23620. <description>Erratic error</description>
  23621. <bitOffset>3</bitOffset>
  23622. <bitWidth>1</bitWidth>
  23623. </field>
  23624. <field> <name>FNSOF</name>
  23625. <description>Frame number of the received
  23626. SOF</description>
  23627. <bitOffset>8</bitOffset>
  23628. <bitWidth>14</bitWidth>
  23629. </field>
  23630. </fields>
  23631. </register>
  23632. <register> <name>FS_DIEPMSK</name>
  23633. <displayName>FS_DIEPMSK</displayName>
  23634. <description>OTG_FS device IN endpoint common interrupt
  23635. mask register (OTG_FS_DIEPMSK)</description>
  23636. <addressOffset>0x10</addressOffset>
  23637. <size>0x20</size>
  23638. <access>read-write</access>
  23639. <resetValue>0x00000000</resetValue>
  23640. <fields>
  23641. <field> <name>XFRCM</name>
  23642. <description>Transfer completed interrupt
  23643. mask</description>
  23644. <bitOffset>0</bitOffset>
  23645. <bitWidth>1</bitWidth>
  23646. </field>
  23647. <field> <name>EPDM</name>
  23648. <description>Endpoint disabled interrupt
  23649. mask</description>
  23650. <bitOffset>1</bitOffset>
  23651. <bitWidth>1</bitWidth>
  23652. </field>
  23653. <field> <name>TOM</name>
  23654. <description>Timeout condition mask (Non-isochronous
  23655. endpoints)</description>
  23656. <bitOffset>3</bitOffset>
  23657. <bitWidth>1</bitWidth>
  23658. </field>
  23659. <field> <name>ITTXFEMSK</name>
  23660. <description>IN token received when TxFIFO empty
  23661. mask</description>
  23662. <bitOffset>4</bitOffset>
  23663. <bitWidth>1</bitWidth>
  23664. </field>
  23665. <field> <name>INEPNMM</name>
  23666. <description>IN token received with EP mismatch
  23667. mask</description>
  23668. <bitOffset>5</bitOffset>
  23669. <bitWidth>1</bitWidth>
  23670. </field>
  23671. <field> <name>INEPNEM</name>
  23672. <description>IN endpoint NAK effective
  23673. mask</description>
  23674. <bitOffset>6</bitOffset>
  23675. <bitWidth>1</bitWidth>
  23676. </field>
  23677. </fields>
  23678. </register>
  23679. <register> <name>FS_DOEPMSK</name>
  23680. <displayName>FS_DOEPMSK</displayName>
  23681. <description>OTG_FS device OUT endpoint common interrupt
  23682. mask register (OTG_FS_DOEPMSK)</description>
  23683. <addressOffset>0x14</addressOffset>
  23684. <size>0x20</size>
  23685. <access>read-write</access>
  23686. <resetValue>0x00000000</resetValue>
  23687. <fields>
  23688. <field> <name>XFRCM</name>
  23689. <description>Transfer completed interrupt
  23690. mask</description>
  23691. <bitOffset>0</bitOffset>
  23692. <bitWidth>1</bitWidth>
  23693. </field>
  23694. <field> <name>EPDM</name>
  23695. <description>Endpoint disabled interrupt
  23696. mask</description>
  23697. <bitOffset>1</bitOffset>
  23698. <bitWidth>1</bitWidth>
  23699. </field>
  23700. <field> <name>STUPM</name>
  23701. <description>SETUP phase done mask</description>
  23702. <bitOffset>3</bitOffset>
  23703. <bitWidth>1</bitWidth>
  23704. </field>
  23705. <field> <name>OTEPDM</name>
  23706. <description>OUT token received when endpoint
  23707. disabled mask</description>
  23708. <bitOffset>4</bitOffset>
  23709. <bitWidth>1</bitWidth>
  23710. </field>
  23711. </fields>
  23712. </register>
  23713. <register> <name>FS_DAINT</name>
  23714. <displayName>FS_DAINT</displayName>
  23715. <description>OTG_FS device all endpoints interrupt
  23716. register (OTG_FS_DAINT)</description>
  23717. <addressOffset>0x18</addressOffset>
  23718. <size>0x20</size>
  23719. <access>read-only</access>
  23720. <resetValue>0x00000000</resetValue>
  23721. <fields>
  23722. <field> <name>IEPINT</name>
  23723. <description>IN endpoint interrupt bits</description>
  23724. <bitOffset>0</bitOffset>
  23725. <bitWidth>16</bitWidth>
  23726. </field>
  23727. <field> <name>OEPINT</name>
  23728. <description>OUT endpoint interrupt
  23729. bits</description>
  23730. <bitOffset>16</bitOffset>
  23731. <bitWidth>16</bitWidth>
  23732. </field>
  23733. </fields>
  23734. </register>
  23735. <register> <name>FS_DAINTMSK</name>
  23736. <displayName>FS_DAINTMSK</displayName>
  23737. <description>OTG_FS all endpoints interrupt mask register
  23738. (OTG_FS_DAINTMSK)</description>
  23739. <addressOffset>0x1C</addressOffset>
  23740. <size>0x20</size>
  23741. <access>read-write</access>
  23742. <resetValue>0x00000000</resetValue>
  23743. <fields>
  23744. <field> <name>IEPM</name>
  23745. <description>IN EP interrupt mask bits</description>
  23746. <bitOffset>0</bitOffset>
  23747. <bitWidth>16</bitWidth>
  23748. </field>
  23749. <field> <name>OEPINT</name>
  23750. <description>OUT endpoint interrupt
  23751. bits</description>
  23752. <bitOffset>16</bitOffset>
  23753. <bitWidth>16</bitWidth>
  23754. </field>
  23755. </fields>
  23756. </register>
  23757. <register> <name>DVBUSDIS</name>
  23758. <displayName>DVBUSDIS</displayName>
  23759. <description>OTG_FS device VBUS discharge time
  23760. register</description>
  23761. <addressOffset>0x28</addressOffset>
  23762. <size>0x20</size>
  23763. <access>read-write</access>
  23764. <resetValue>0x000017D7</resetValue>
  23765. <fields>
  23766. <field> <name>VBUSDT</name>
  23767. <description>Device VBUS discharge time</description>
  23768. <bitOffset>0</bitOffset>
  23769. <bitWidth>16</bitWidth>
  23770. </field>
  23771. </fields>
  23772. </register>
  23773. <register> <name>DVBUSPULSE</name>
  23774. <displayName>DVBUSPULSE</displayName>
  23775. <description>OTG_FS device VBUS pulsing time
  23776. register</description>
  23777. <addressOffset>0x2C</addressOffset>
  23778. <size>0x20</size>
  23779. <access>read-write</access>
  23780. <resetValue>0x000005B8</resetValue>
  23781. <fields>
  23782. <field> <name>DVBUSP</name>
  23783. <description>Device VBUS pulsing time</description>
  23784. <bitOffset>0</bitOffset>
  23785. <bitWidth>12</bitWidth>
  23786. </field>
  23787. </fields>
  23788. </register>
  23789. <register> <name>DIEPEMPMSK</name>
  23790. <displayName>DIEPEMPMSK</displayName>
  23791. <description>OTG_FS device IN endpoint FIFO empty
  23792. interrupt mask register</description>
  23793. <addressOffset>0x34</addressOffset>
  23794. <size>0x20</size>
  23795. <access>read-write</access>
  23796. <resetValue>0x00000000</resetValue>
  23797. <fields>
  23798. <field> <name>INEPTXFEM</name>
  23799. <description>IN EP Tx FIFO empty interrupt mask
  23800. bits</description>
  23801. <bitOffset>0</bitOffset>
  23802. <bitWidth>16</bitWidth>
  23803. </field>
  23804. </fields>
  23805. </register>
  23806. <register> <name>FS_DIEPCTL0</name>
  23807. <displayName>FS_DIEPCTL0</displayName>
  23808. <description>OTG_FS device control IN endpoint 0 control
  23809. register (OTG_FS_DIEPCTL0)</description>
  23810. <addressOffset>0x100</addressOffset>
  23811. <size>0x20</size>
  23812. <resetValue>0x00000000</resetValue>
  23813. <fields>
  23814. <field> <name>MPSIZ</name>
  23815. <description>Maximum packet size</description>
  23816. <bitOffset>0</bitOffset>
  23817. <bitWidth>2</bitWidth>
  23818. <access>read-write</access>
  23819. </field>
  23820. <field> <name>USBAEP</name>
  23821. <description>USB active endpoint</description>
  23822. <bitOffset>15</bitOffset>
  23823. <bitWidth>1</bitWidth>
  23824. <access>read-only</access>
  23825. </field>
  23826. <field> <name>NAKSTS</name>
  23827. <description>NAK status</description>
  23828. <bitOffset>17</bitOffset>
  23829. <bitWidth>1</bitWidth>
  23830. <access>read-only</access>
  23831. </field>
  23832. <field> <name>EPTYP</name>
  23833. <description>Endpoint type</description>
  23834. <bitOffset>18</bitOffset>
  23835. <bitWidth>2</bitWidth>
  23836. <access>read-only</access>
  23837. </field>
  23838. <field> <name>STALL</name>
  23839. <description>STALL handshake</description>
  23840. <bitOffset>21</bitOffset>
  23841. <bitWidth>1</bitWidth>
  23842. <access>read-write</access>
  23843. </field>
  23844. <field> <name>TXFNUM</name>
  23845. <description>TxFIFO number</description>
  23846. <bitOffset>22</bitOffset>
  23847. <bitWidth>4</bitWidth>
  23848. <access>read-write</access>
  23849. </field>
  23850. <field> <name>CNAK</name>
  23851. <description>Clear NAK</description>
  23852. <bitOffset>26</bitOffset>
  23853. <bitWidth>1</bitWidth>
  23854. <access>write-only</access>
  23855. </field>
  23856. <field> <name>SNAK</name>
  23857. <description>Set NAK</description>
  23858. <bitOffset>27</bitOffset>
  23859. <bitWidth>1</bitWidth>
  23860. <access>write-only</access>
  23861. </field>
  23862. <field> <name>EPDIS</name>
  23863. <description>Endpoint disable</description>
  23864. <bitOffset>30</bitOffset>
  23865. <bitWidth>1</bitWidth>
  23866. <access>read-only</access>
  23867. </field>
  23868. <field> <name>EPENA</name>
  23869. <description>Endpoint enable</description>
  23870. <bitOffset>31</bitOffset>
  23871. <bitWidth>1</bitWidth>
  23872. <access>read-only</access>
  23873. </field>
  23874. </fields>
  23875. </register>
  23876. <register> <name>DIEPCTL1</name>
  23877. <displayName>DIEPCTL1</displayName>
  23878. <description>OTG device endpoint-1 control
  23879. register</description>
  23880. <addressOffset>0x120</addressOffset>
  23881. <size>0x20</size>
  23882. <resetValue>0x00000000</resetValue>
  23883. <fields>
  23884. <field> <name>EPENA</name>
  23885. <description>EPENA</description>
  23886. <bitOffset>31</bitOffset>
  23887. <bitWidth>1</bitWidth>
  23888. <access>read-write</access>
  23889. </field>
  23890. <field> <name>EPDIS</name>
  23891. <description>EPDIS</description>
  23892. <bitOffset>30</bitOffset>
  23893. <bitWidth>1</bitWidth>
  23894. <access>read-write</access>
  23895. </field>
  23896. <field> <name>SODDFRM_SD1PID</name>
  23897. <description>SODDFRM/SD1PID</description>
  23898. <bitOffset>29</bitOffset>
  23899. <bitWidth>1</bitWidth>
  23900. <access>write-only</access>
  23901. </field>
  23902. <field> <name>SD0PID_SEVNFRM</name>
  23903. <description>SD0PID/SEVNFRM</description>
  23904. <bitOffset>28</bitOffset>
  23905. <bitWidth>1</bitWidth>
  23906. <access>write-only</access>
  23907. </field>
  23908. <field> <name>SNAK</name>
  23909. <description>SNAK</description>
  23910. <bitOffset>27</bitOffset>
  23911. <bitWidth>1</bitWidth>
  23912. <access>write-only</access>
  23913. </field>
  23914. <field> <name>CNAK</name>
  23915. <description>CNAK</description>
  23916. <bitOffset>26</bitOffset>
  23917. <bitWidth>1</bitWidth>
  23918. <access>write-only</access>
  23919. </field>
  23920. <field> <name>TXFNUM</name>
  23921. <description>TXFNUM</description>
  23922. <bitOffset>22</bitOffset>
  23923. <bitWidth>4</bitWidth>
  23924. <access>read-write</access>
  23925. </field>
  23926. <field> <name>Stall</name>
  23927. <description>Stall</description>
  23928. <bitOffset>21</bitOffset>
  23929. <bitWidth>1</bitWidth>
  23930. <access>read-write</access>
  23931. </field>
  23932. <field> <name>EPTYP</name>
  23933. <description>EPTYP</description>
  23934. <bitOffset>18</bitOffset>
  23935. <bitWidth>2</bitWidth>
  23936. <access>read-write</access>
  23937. </field>
  23938. <field> <name>NAKSTS</name>
  23939. <description>NAKSTS</description>
  23940. <bitOffset>17</bitOffset>
  23941. <bitWidth>1</bitWidth>
  23942. <access>read-only</access>
  23943. </field>
  23944. <field> <name>EONUM_DPID</name>
  23945. <description>EONUM/DPID</description>
  23946. <bitOffset>16</bitOffset>
  23947. <bitWidth>1</bitWidth>
  23948. <access>read-only</access>
  23949. </field>
  23950. <field> <name>USBAEP</name>
  23951. <description>USBAEP</description>
  23952. <bitOffset>15</bitOffset>
  23953. <bitWidth>1</bitWidth>
  23954. <access>read-write</access>
  23955. </field>
  23956. <field> <name>MPSIZ</name>
  23957. <description>MPSIZ</description>
  23958. <bitOffset>0</bitOffset>
  23959. <bitWidth>11</bitWidth>
  23960. <access>read-write</access>
  23961. </field>
  23962. </fields>
  23963. </register>
  23964. <register> <name>DIEPCTL2</name>
  23965. <displayName>DIEPCTL2</displayName>
  23966. <description>OTG device endpoint-2 control
  23967. register</description>
  23968. <addressOffset>0x140</addressOffset>
  23969. <size>0x20</size>
  23970. <resetValue>0x00000000</resetValue>
  23971. <fields>
  23972. <field> <name>EPENA</name>
  23973. <description>EPENA</description>
  23974. <bitOffset>31</bitOffset>
  23975. <bitWidth>1</bitWidth>
  23976. <access>read-write</access>
  23977. </field>
  23978. <field> <name>EPDIS</name>
  23979. <description>EPDIS</description>
  23980. <bitOffset>30</bitOffset>
  23981. <bitWidth>1</bitWidth>
  23982. <access>read-write</access>
  23983. </field>
  23984. <field> <name>SODDFRM</name>
  23985. <description>SODDFRM</description>
  23986. <bitOffset>29</bitOffset>
  23987. <bitWidth>1</bitWidth>
  23988. <access>write-only</access>
  23989. </field>
  23990. <field> <name>SD0PID_SEVNFRM</name>
  23991. <description>SD0PID/SEVNFRM</description>
  23992. <bitOffset>28</bitOffset>
  23993. <bitWidth>1</bitWidth>
  23994. <access>write-only</access>
  23995. </field>
  23996. <field> <name>SNAK</name>
  23997. <description>SNAK</description>
  23998. <bitOffset>27</bitOffset>
  23999. <bitWidth>1</bitWidth>
  24000. <access>write-only</access>
  24001. </field>
  24002. <field> <name>CNAK</name>
  24003. <description>CNAK</description>
  24004. <bitOffset>26</bitOffset>
  24005. <bitWidth>1</bitWidth>
  24006. <access>write-only</access>
  24007. </field>
  24008. <field> <name>TXFNUM</name>
  24009. <description>TXFNUM</description>
  24010. <bitOffset>22</bitOffset>
  24011. <bitWidth>4</bitWidth>
  24012. <access>read-write</access>
  24013. </field>
  24014. <field> <name>Stall</name>
  24015. <description>Stall</description>
  24016. <bitOffset>21</bitOffset>
  24017. <bitWidth>1</bitWidth>
  24018. <access>read-write</access>
  24019. </field>
  24020. <field> <name>EPTYP</name>
  24021. <description>EPTYP</description>
  24022. <bitOffset>18</bitOffset>
  24023. <bitWidth>2</bitWidth>
  24024. <access>read-write</access>
  24025. </field>
  24026. <field> <name>NAKSTS</name>
  24027. <description>NAKSTS</description>
  24028. <bitOffset>17</bitOffset>
  24029. <bitWidth>1</bitWidth>
  24030. <access>read-only</access>
  24031. </field>
  24032. <field> <name>EONUM_DPID</name>
  24033. <description>EONUM/DPID</description>
  24034. <bitOffset>16</bitOffset>
  24035. <bitWidth>1</bitWidth>
  24036. <access>read-only</access>
  24037. </field>
  24038. <field> <name>USBAEP</name>
  24039. <description>USBAEP</description>
  24040. <bitOffset>15</bitOffset>
  24041. <bitWidth>1</bitWidth>
  24042. <access>read-write</access>
  24043. </field>
  24044. <field> <name>MPSIZ</name>
  24045. <description>MPSIZ</description>
  24046. <bitOffset>0</bitOffset>
  24047. <bitWidth>11</bitWidth>
  24048. <access>read-write</access>
  24049. </field>
  24050. </fields>
  24051. </register>
  24052. <register> <name>DIEPCTL3</name>
  24053. <displayName>DIEPCTL3</displayName>
  24054. <description>OTG device endpoint-3 control
  24055. register</description>
  24056. <addressOffset>0x160</addressOffset>
  24057. <size>0x20</size>
  24058. <resetValue>0x00000000</resetValue>
  24059. <fields>
  24060. <field> <name>EPENA</name>
  24061. <description>EPENA</description>
  24062. <bitOffset>31</bitOffset>
  24063. <bitWidth>1</bitWidth>
  24064. <access>read-write</access>
  24065. </field>
  24066. <field> <name>EPDIS</name>
  24067. <description>EPDIS</description>
  24068. <bitOffset>30</bitOffset>
  24069. <bitWidth>1</bitWidth>
  24070. <access>read-write</access>
  24071. </field>
  24072. <field> <name>SODDFRM</name>
  24073. <description>SODDFRM</description>
  24074. <bitOffset>29</bitOffset>
  24075. <bitWidth>1</bitWidth>
  24076. <access>write-only</access>
  24077. </field>
  24078. <field> <name>SD0PID_SEVNFRM</name>
  24079. <description>SD0PID/SEVNFRM</description>
  24080. <bitOffset>28</bitOffset>
  24081. <bitWidth>1</bitWidth>
  24082. <access>write-only</access>
  24083. </field>
  24084. <field> <name>SNAK</name>
  24085. <description>SNAK</description>
  24086. <bitOffset>27</bitOffset>
  24087. <bitWidth>1</bitWidth>
  24088. <access>write-only</access>
  24089. </field>
  24090. <field> <name>CNAK</name>
  24091. <description>CNAK</description>
  24092. <bitOffset>26</bitOffset>
  24093. <bitWidth>1</bitWidth>
  24094. <access>write-only</access>
  24095. </field>
  24096. <field> <name>TXFNUM</name>
  24097. <description>TXFNUM</description>
  24098. <bitOffset>22</bitOffset>
  24099. <bitWidth>4</bitWidth>
  24100. <access>read-write</access>
  24101. </field>
  24102. <field> <name>Stall</name>
  24103. <description>Stall</description>
  24104. <bitOffset>21</bitOffset>
  24105. <bitWidth>1</bitWidth>
  24106. <access>read-write</access>
  24107. </field>
  24108. <field> <name>EPTYP</name>
  24109. <description>EPTYP</description>
  24110. <bitOffset>18</bitOffset>
  24111. <bitWidth>2</bitWidth>
  24112. <access>read-write</access>
  24113. </field>
  24114. <field> <name>NAKSTS</name>
  24115. <description>NAKSTS</description>
  24116. <bitOffset>17</bitOffset>
  24117. <bitWidth>1</bitWidth>
  24118. <access>read-only</access>
  24119. </field>
  24120. <field> <name>EONUM_DPID</name>
  24121. <description>EONUM/DPID</description>
  24122. <bitOffset>16</bitOffset>
  24123. <bitWidth>1</bitWidth>
  24124. <access>read-only</access>
  24125. </field>
  24126. <field> <name>USBAEP</name>
  24127. <description>USBAEP</description>
  24128. <bitOffset>15</bitOffset>
  24129. <bitWidth>1</bitWidth>
  24130. <access>read-write</access>
  24131. </field>
  24132. <field> <name>MPSIZ</name>
  24133. <description>MPSIZ</description>
  24134. <bitOffset>0</bitOffset>
  24135. <bitWidth>11</bitWidth>
  24136. <access>read-write</access>
  24137. </field>
  24138. </fields>
  24139. </register>
  24140. <register> <name>DOEPCTL0</name>
  24141. <displayName>DOEPCTL0</displayName>
  24142. <description>device endpoint-0 control
  24143. register</description>
  24144. <addressOffset>0x300</addressOffset>
  24145. <size>0x20</size>
  24146. <resetValue>0x00008000</resetValue>
  24147. <fields>
  24148. <field> <name>EPENA</name>
  24149. <description>EPENA</description>
  24150. <bitOffset>31</bitOffset>
  24151. <bitWidth>1</bitWidth>
  24152. <access>write-only</access>
  24153. </field>
  24154. <field> <name>EPDIS</name>
  24155. <description>EPDIS</description>
  24156. <bitOffset>30</bitOffset>
  24157. <bitWidth>1</bitWidth>
  24158. <access>read-only</access>
  24159. </field>
  24160. <field> <name>SNAK</name>
  24161. <description>SNAK</description>
  24162. <bitOffset>27</bitOffset>
  24163. <bitWidth>1</bitWidth>
  24164. <access>write-only</access>
  24165. </field>
  24166. <field> <name>CNAK</name>
  24167. <description>CNAK</description>
  24168. <bitOffset>26</bitOffset>
  24169. <bitWidth>1</bitWidth>
  24170. <access>write-only</access>
  24171. </field>
  24172. <field> <name>Stall</name>
  24173. <description>Stall</description>
  24174. <bitOffset>21</bitOffset>
  24175. <bitWidth>1</bitWidth>
  24176. <access>read-write</access>
  24177. </field>
  24178. <field> <name>SNPM</name>
  24179. <description>SNPM</description>
  24180. <bitOffset>20</bitOffset>
  24181. <bitWidth>1</bitWidth>
  24182. <access>read-write</access>
  24183. </field>
  24184. <field> <name>EPTYP</name>
  24185. <description>EPTYP</description>
  24186. <bitOffset>18</bitOffset>
  24187. <bitWidth>2</bitWidth>
  24188. <access>read-only</access>
  24189. </field>
  24190. <field> <name>NAKSTS</name>
  24191. <description>NAKSTS</description>
  24192. <bitOffset>17</bitOffset>
  24193. <bitWidth>1</bitWidth>
  24194. <access>read-only</access>
  24195. </field>
  24196. <field> <name>USBAEP</name>
  24197. <description>USBAEP</description>
  24198. <bitOffset>15</bitOffset>
  24199. <bitWidth>1</bitWidth>
  24200. <access>read-only</access>
  24201. </field>
  24202. <field> <name>MPSIZ</name>
  24203. <description>MPSIZ</description>
  24204. <bitOffset>0</bitOffset>
  24205. <bitWidth>2</bitWidth>
  24206. <access>read-only</access>
  24207. </field>
  24208. </fields>
  24209. </register>
  24210. <register> <name>DOEPCTL1</name>
  24211. <displayName>DOEPCTL1</displayName>
  24212. <description>device endpoint-1 control
  24213. register</description>
  24214. <addressOffset>0x320</addressOffset>
  24215. <size>0x20</size>
  24216. <resetValue>0x00000000</resetValue>
  24217. <fields>
  24218. <field> <name>EPENA</name>
  24219. <description>EPENA</description>
  24220. <bitOffset>31</bitOffset>
  24221. <bitWidth>1</bitWidth>
  24222. <access>read-write</access>
  24223. </field>
  24224. <field> <name>EPDIS</name>
  24225. <description>EPDIS</description>
  24226. <bitOffset>30</bitOffset>
  24227. <bitWidth>1</bitWidth>
  24228. <access>read-write</access>
  24229. </field>
  24230. <field> <name>SODDFRM</name>
  24231. <description>SODDFRM</description>
  24232. <bitOffset>29</bitOffset>
  24233. <bitWidth>1</bitWidth>
  24234. <access>write-only</access>
  24235. </field>
  24236. <field> <name>SD0PID_SEVNFRM</name>
  24237. <description>SD0PID/SEVNFRM</description>
  24238. <bitOffset>28</bitOffset>
  24239. <bitWidth>1</bitWidth>
  24240. <access>write-only</access>
  24241. </field>
  24242. <field> <name>SNAK</name>
  24243. <description>SNAK</description>
  24244. <bitOffset>27</bitOffset>
  24245. <bitWidth>1</bitWidth>
  24246. <access>write-only</access>
  24247. </field>
  24248. <field> <name>CNAK</name>
  24249. <description>CNAK</description>
  24250. <bitOffset>26</bitOffset>
  24251. <bitWidth>1</bitWidth>
  24252. <access>write-only</access>
  24253. </field>
  24254. <field> <name>Stall</name>
  24255. <description>Stall</description>
  24256. <bitOffset>21</bitOffset>
  24257. <bitWidth>1</bitWidth>
  24258. <access>read-write</access>
  24259. </field>
  24260. <field> <name>SNPM</name>
  24261. <description>SNPM</description>
  24262. <bitOffset>20</bitOffset>
  24263. <bitWidth>1</bitWidth>
  24264. <access>read-write</access>
  24265. </field>
  24266. <field> <name>EPTYP</name>
  24267. <description>EPTYP</description>
  24268. <bitOffset>18</bitOffset>
  24269. <bitWidth>2</bitWidth>
  24270. <access>read-write</access>
  24271. </field>
  24272. <field> <name>NAKSTS</name>
  24273. <description>NAKSTS</description>
  24274. <bitOffset>17</bitOffset>
  24275. <bitWidth>1</bitWidth>
  24276. <access>read-only</access>
  24277. </field>
  24278. <field> <name>EONUM_DPID</name>
  24279. <description>EONUM/DPID</description>
  24280. <bitOffset>16</bitOffset>
  24281. <bitWidth>1</bitWidth>
  24282. <access>read-only</access>
  24283. </field>
  24284. <field> <name>USBAEP</name>
  24285. <description>USBAEP</description>
  24286. <bitOffset>15</bitOffset>
  24287. <bitWidth>1</bitWidth>
  24288. <access>read-write</access>
  24289. </field>
  24290. <field> <name>MPSIZ</name>
  24291. <description>MPSIZ</description>
  24292. <bitOffset>0</bitOffset>
  24293. <bitWidth>11</bitWidth>
  24294. <access>read-write</access>
  24295. </field>
  24296. </fields>
  24297. </register>
  24298. <register> <name>DOEPCTL2</name>
  24299. <displayName>DOEPCTL2</displayName>
  24300. <description>device endpoint-2 control
  24301. register</description>
  24302. <addressOffset>0x340</addressOffset>
  24303. <size>0x20</size>
  24304. <resetValue>0x00000000</resetValue>
  24305. <fields>
  24306. <field> <name>EPENA</name>
  24307. <description>EPENA</description>
  24308. <bitOffset>31</bitOffset>
  24309. <bitWidth>1</bitWidth>
  24310. <access>read-write</access>
  24311. </field>
  24312. <field> <name>EPDIS</name>
  24313. <description>EPDIS</description>
  24314. <bitOffset>30</bitOffset>
  24315. <bitWidth>1</bitWidth>
  24316. <access>read-write</access>
  24317. </field>
  24318. <field> <name>SODDFRM</name>
  24319. <description>SODDFRM</description>
  24320. <bitOffset>29</bitOffset>
  24321. <bitWidth>1</bitWidth>
  24322. <access>write-only</access>
  24323. </field>
  24324. <field> <name>SD0PID_SEVNFRM</name>
  24325. <description>SD0PID/SEVNFRM</description>
  24326. <bitOffset>28</bitOffset>
  24327. <bitWidth>1</bitWidth>
  24328. <access>write-only</access>
  24329. </field>
  24330. <field> <name>SNAK</name>
  24331. <description>SNAK</description>
  24332. <bitOffset>27</bitOffset>
  24333. <bitWidth>1</bitWidth>
  24334. <access>write-only</access>
  24335. </field>
  24336. <field> <name>CNAK</name>
  24337. <description>CNAK</description>
  24338. <bitOffset>26</bitOffset>
  24339. <bitWidth>1</bitWidth>
  24340. <access>write-only</access>
  24341. </field>
  24342. <field> <name>Stall</name>
  24343. <description>Stall</description>
  24344. <bitOffset>21</bitOffset>
  24345. <bitWidth>1</bitWidth>
  24346. <access>read-write</access>
  24347. </field>
  24348. <field> <name>SNPM</name>
  24349. <description>SNPM</description>
  24350. <bitOffset>20</bitOffset>
  24351. <bitWidth>1</bitWidth>
  24352. <access>read-write</access>
  24353. </field>
  24354. <field> <name>EPTYP</name>
  24355. <description>EPTYP</description>
  24356. <bitOffset>18</bitOffset>
  24357. <bitWidth>2</bitWidth>
  24358. <access>read-write</access>
  24359. </field>
  24360. <field> <name>NAKSTS</name>
  24361. <description>NAKSTS</description>
  24362. <bitOffset>17</bitOffset>
  24363. <bitWidth>1</bitWidth>
  24364. <access>read-only</access>
  24365. </field>
  24366. <field> <name>EONUM_DPID</name>
  24367. <description>EONUM/DPID</description>
  24368. <bitOffset>16</bitOffset>
  24369. <bitWidth>1</bitWidth>
  24370. <access>read-only</access>
  24371. </field>
  24372. <field> <name>USBAEP</name>
  24373. <description>USBAEP</description>
  24374. <bitOffset>15</bitOffset>
  24375. <bitWidth>1</bitWidth>
  24376. <access>read-write</access>
  24377. </field>
  24378. <field> <name>MPSIZ</name>
  24379. <description>MPSIZ</description>
  24380. <bitOffset>0</bitOffset>
  24381. <bitWidth>11</bitWidth>
  24382. <access>read-write</access>
  24383. </field>
  24384. </fields>
  24385. </register>
  24386. <register> <name>DOEPCTL3</name>
  24387. <displayName>DOEPCTL3</displayName>
  24388. <description>device endpoint-3 control
  24389. register</description>
  24390. <addressOffset>0x360</addressOffset>
  24391. <size>0x20</size>
  24392. <resetValue>0x00000000</resetValue>
  24393. <fields>
  24394. <field> <name>EPENA</name>
  24395. <description>EPENA</description>
  24396. <bitOffset>31</bitOffset>
  24397. <bitWidth>1</bitWidth>
  24398. <access>read-write</access>
  24399. </field>
  24400. <field> <name>EPDIS</name>
  24401. <description>EPDIS</description>
  24402. <bitOffset>30</bitOffset>
  24403. <bitWidth>1</bitWidth>
  24404. <access>read-write</access>
  24405. </field>
  24406. <field> <name>SODDFRM</name>
  24407. <description>SODDFRM</description>
  24408. <bitOffset>29</bitOffset>
  24409. <bitWidth>1</bitWidth>
  24410. <access>write-only</access>
  24411. </field>
  24412. <field> <name>SD0PID_SEVNFRM</name>
  24413. <description>SD0PID/SEVNFRM</description>
  24414. <bitOffset>28</bitOffset>
  24415. <bitWidth>1</bitWidth>
  24416. <access>write-only</access>
  24417. </field>
  24418. <field> <name>SNAK</name>
  24419. <description>SNAK</description>
  24420. <bitOffset>27</bitOffset>
  24421. <bitWidth>1</bitWidth>
  24422. <access>write-only</access>
  24423. </field>
  24424. <field> <name>CNAK</name>
  24425. <description>CNAK</description>
  24426. <bitOffset>26</bitOffset>
  24427. <bitWidth>1</bitWidth>
  24428. <access>write-only</access>
  24429. </field>
  24430. <field> <name>Stall</name>
  24431. <description>Stall</description>
  24432. <bitOffset>21</bitOffset>
  24433. <bitWidth>1</bitWidth>
  24434. <access>read-write</access>
  24435. </field>
  24436. <field> <name>SNPM</name>
  24437. <description>SNPM</description>
  24438. <bitOffset>20</bitOffset>
  24439. <bitWidth>1</bitWidth>
  24440. <access>read-write</access>
  24441. </field>
  24442. <field> <name>EPTYP</name>
  24443. <description>EPTYP</description>
  24444. <bitOffset>18</bitOffset>
  24445. <bitWidth>2</bitWidth>
  24446. <access>read-write</access>
  24447. </field>
  24448. <field> <name>NAKSTS</name>
  24449. <description>NAKSTS</description>
  24450. <bitOffset>17</bitOffset>
  24451. <bitWidth>1</bitWidth>
  24452. <access>read-only</access>
  24453. </field>
  24454. <field> <name>EONUM_DPID</name>
  24455. <description>EONUM/DPID</description>
  24456. <bitOffset>16</bitOffset>
  24457. <bitWidth>1</bitWidth>
  24458. <access>read-only</access>
  24459. </field>
  24460. <field> <name>USBAEP</name>
  24461. <description>USBAEP</description>
  24462. <bitOffset>15</bitOffset>
  24463. <bitWidth>1</bitWidth>
  24464. <access>read-write</access>
  24465. </field>
  24466. <field> <name>MPSIZ</name>
  24467. <description>MPSIZ</description>
  24468. <bitOffset>0</bitOffset>
  24469. <bitWidth>11</bitWidth>
  24470. <access>read-write</access>
  24471. </field>
  24472. </fields>
  24473. </register>
  24474. <register> <name>DIEPINT0</name>
  24475. <displayName>DIEPINT0</displayName>
  24476. <description>device endpoint-x interrupt
  24477. register</description>
  24478. <addressOffset>0x108</addressOffset>
  24479. <size>0x20</size>
  24480. <resetValue>0x00000080</resetValue>
  24481. <fields>
  24482. <field> <name>TXFE</name>
  24483. <description>TXFE</description>
  24484. <bitOffset>7</bitOffset>
  24485. <bitWidth>1</bitWidth>
  24486. <access>read-only</access>
  24487. </field>
  24488. <field> <name>INEPNE</name>
  24489. <description>INEPNE</description>
  24490. <bitOffset>6</bitOffset>
  24491. <bitWidth>1</bitWidth>
  24492. <access>read-write</access>
  24493. </field>
  24494. <field> <name>ITTXFE</name>
  24495. <description>ITTXFE</description>
  24496. <bitOffset>4</bitOffset>
  24497. <bitWidth>1</bitWidth>
  24498. <access>read-write</access>
  24499. </field>
  24500. <field> <name>TOC</name>
  24501. <description>TOC</description>
  24502. <bitOffset>3</bitOffset>
  24503. <bitWidth>1</bitWidth>
  24504. <access>read-write</access>
  24505. </field>
  24506. <field> <name>EPDISD</name>
  24507. <description>EPDISD</description>
  24508. <bitOffset>1</bitOffset>
  24509. <bitWidth>1</bitWidth>
  24510. <access>read-write</access>
  24511. </field>
  24512. <field> <name>XFRC</name>
  24513. <description>XFRC</description>
  24514. <bitOffset>0</bitOffset>
  24515. <bitWidth>1</bitWidth>
  24516. <access>read-write</access>
  24517. </field>
  24518. </fields>
  24519. </register>
  24520. <register> <name>DIEPINT1</name>
  24521. <displayName>DIEPINT1</displayName>
  24522. <description>device endpoint-1 interrupt
  24523. register</description>
  24524. <addressOffset>0x128</addressOffset>
  24525. <size>0x20</size>
  24526. <resetValue>0x00000080</resetValue>
  24527. <fields>
  24528. <field> <name>TXFE</name>
  24529. <description>TXFE</description>
  24530. <bitOffset>7</bitOffset>
  24531. <bitWidth>1</bitWidth>
  24532. <access>read-only</access>
  24533. </field>
  24534. <field> <name>INEPNE</name>
  24535. <description>INEPNE</description>
  24536. <bitOffset>6</bitOffset>
  24537. <bitWidth>1</bitWidth>
  24538. <access>read-write</access>
  24539. </field>
  24540. <field> <name>ITTXFE</name>
  24541. <description>ITTXFE</description>
  24542. <bitOffset>4</bitOffset>
  24543. <bitWidth>1</bitWidth>
  24544. <access>read-write</access>
  24545. </field>
  24546. <field> <name>TOC</name>
  24547. <description>TOC</description>
  24548. <bitOffset>3</bitOffset>
  24549. <bitWidth>1</bitWidth>
  24550. <access>read-write</access>
  24551. </field>
  24552. <field> <name>EPDISD</name>
  24553. <description>EPDISD</description>
  24554. <bitOffset>1</bitOffset>
  24555. <bitWidth>1</bitWidth>
  24556. <access>read-write</access>
  24557. </field>
  24558. <field> <name>XFRC</name>
  24559. <description>XFRC</description>
  24560. <bitOffset>0</bitOffset>
  24561. <bitWidth>1</bitWidth>
  24562. <access>read-write</access>
  24563. </field>
  24564. </fields>
  24565. </register>
  24566. <register> <name>DIEPINT2</name>
  24567. <displayName>DIEPINT2</displayName>
  24568. <description>device endpoint-2 interrupt
  24569. register</description>
  24570. <addressOffset>0x148</addressOffset>
  24571. <size>0x20</size>
  24572. <resetValue>0x00000080</resetValue>
  24573. <fields>
  24574. <field> <name>TXFE</name>
  24575. <description>TXFE</description>
  24576. <bitOffset>7</bitOffset>
  24577. <bitWidth>1</bitWidth>
  24578. <access>read-only</access>
  24579. </field>
  24580. <field> <name>INEPNE</name>
  24581. <description>INEPNE</description>
  24582. <bitOffset>6</bitOffset>
  24583. <bitWidth>1</bitWidth>
  24584. <access>read-write</access>
  24585. </field>
  24586. <field> <name>ITTXFE</name>
  24587. <description>ITTXFE</description>
  24588. <bitOffset>4</bitOffset>
  24589. <bitWidth>1</bitWidth>
  24590. <access>read-write</access>
  24591. </field>
  24592. <field> <name>TOC</name>
  24593. <description>TOC</description>
  24594. <bitOffset>3</bitOffset>
  24595. <bitWidth>1</bitWidth>
  24596. <access>read-write</access>
  24597. </field>
  24598. <field> <name>EPDISD</name>
  24599. <description>EPDISD</description>
  24600. <bitOffset>1</bitOffset>
  24601. <bitWidth>1</bitWidth>
  24602. <access>read-write</access>
  24603. </field>
  24604. <field> <name>XFRC</name>
  24605. <description>XFRC</description>
  24606. <bitOffset>0</bitOffset>
  24607. <bitWidth>1</bitWidth>
  24608. <access>read-write</access>
  24609. </field>
  24610. </fields>
  24611. </register>
  24612. <register> <name>DIEPINT3</name>
  24613. <displayName>DIEPINT3</displayName>
  24614. <description>device endpoint-3 interrupt
  24615. register</description>
  24616. <addressOffset>0x168</addressOffset>
  24617. <size>0x20</size>
  24618. <resetValue>0x00000080</resetValue>
  24619. <fields>
  24620. <field> <name>TXFE</name>
  24621. <description>TXFE</description>
  24622. <bitOffset>7</bitOffset>
  24623. <bitWidth>1</bitWidth>
  24624. <access>read-only</access>
  24625. </field>
  24626. <field> <name>INEPNE</name>
  24627. <description>INEPNE</description>
  24628. <bitOffset>6</bitOffset>
  24629. <bitWidth>1</bitWidth>
  24630. <access>read-write</access>
  24631. </field>
  24632. <field> <name>ITTXFE</name>
  24633. <description>ITTXFE</description>
  24634. <bitOffset>4</bitOffset>
  24635. <bitWidth>1</bitWidth>
  24636. <access>read-write</access>
  24637. </field>
  24638. <field> <name>TOC</name>
  24639. <description>TOC</description>
  24640. <bitOffset>3</bitOffset>
  24641. <bitWidth>1</bitWidth>
  24642. <access>read-write</access>
  24643. </field>
  24644. <field> <name>EPDISD</name>
  24645. <description>EPDISD</description>
  24646. <bitOffset>1</bitOffset>
  24647. <bitWidth>1</bitWidth>
  24648. <access>read-write</access>
  24649. </field>
  24650. <field> <name>XFRC</name>
  24651. <description>XFRC</description>
  24652. <bitOffset>0</bitOffset>
  24653. <bitWidth>1</bitWidth>
  24654. <access>read-write</access>
  24655. </field>
  24656. </fields>
  24657. </register>
  24658. <register> <name>DOEPINT0</name>
  24659. <displayName>DOEPINT0</displayName>
  24660. <description>device endpoint-0 interrupt
  24661. register</description>
  24662. <addressOffset>0x308</addressOffset>
  24663. <size>0x20</size>
  24664. <access>read-write</access>
  24665. <resetValue>0x00000080</resetValue>
  24666. <fields>
  24667. <field> <name>B2BSTUP</name>
  24668. <description>B2BSTUP</description>
  24669. <bitOffset>6</bitOffset>
  24670. <bitWidth>1</bitWidth>
  24671. </field>
  24672. <field> <name>OTEPDIS</name>
  24673. <description>OTEPDIS</description>
  24674. <bitOffset>4</bitOffset>
  24675. <bitWidth>1</bitWidth>
  24676. </field>
  24677. <field> <name>STUP</name>
  24678. <description>STUP</description>
  24679. <bitOffset>3</bitOffset>
  24680. <bitWidth>1</bitWidth>
  24681. </field>
  24682. <field> <name>EPDISD</name>
  24683. <description>EPDISD</description>
  24684. <bitOffset>1</bitOffset>
  24685. <bitWidth>1</bitWidth>
  24686. </field>
  24687. <field> <name>XFRC</name>
  24688. <description>XFRC</description>
  24689. <bitOffset>0</bitOffset>
  24690. <bitWidth>1</bitWidth>
  24691. </field>
  24692. </fields>
  24693. </register>
  24694. <register> <name>DOEPINT1</name>
  24695. <displayName>DOEPINT1</displayName>
  24696. <description>device endpoint-1 interrupt
  24697. register</description>
  24698. <addressOffset>0x328</addressOffset>
  24699. <size>0x20</size>
  24700. <access>read-write</access>
  24701. <resetValue>0x00000080</resetValue>
  24702. <fields>
  24703. <field> <name>B2BSTUP</name>
  24704. <description>B2BSTUP</description>
  24705. <bitOffset>6</bitOffset>
  24706. <bitWidth>1</bitWidth>
  24707. </field>
  24708. <field> <name>OTEPDIS</name>
  24709. <description>OTEPDIS</description>
  24710. <bitOffset>4</bitOffset>
  24711. <bitWidth>1</bitWidth>
  24712. </field>
  24713. <field> <name>STUP</name>
  24714. <description>STUP</description>
  24715. <bitOffset>3</bitOffset>
  24716. <bitWidth>1</bitWidth>
  24717. </field>
  24718. <field> <name>EPDISD</name>
  24719. <description>EPDISD</description>
  24720. <bitOffset>1</bitOffset>
  24721. <bitWidth>1</bitWidth>
  24722. </field>
  24723. <field> <name>XFRC</name>
  24724. <description>XFRC</description>
  24725. <bitOffset>0</bitOffset>
  24726. <bitWidth>1</bitWidth>
  24727. </field>
  24728. </fields>
  24729. </register>
  24730. <register> <name>DOEPINT2</name>
  24731. <displayName>DOEPINT2</displayName>
  24732. <description>device endpoint-2 interrupt
  24733. register</description>
  24734. <addressOffset>0x348</addressOffset>
  24735. <size>0x20</size>
  24736. <access>read-write</access>
  24737. <resetValue>0x00000080</resetValue>
  24738. <fields>
  24739. <field> <name>B2BSTUP</name>
  24740. <description>B2BSTUP</description>
  24741. <bitOffset>6</bitOffset>
  24742. <bitWidth>1</bitWidth>
  24743. </field>
  24744. <field> <name>OTEPDIS</name>
  24745. <description>OTEPDIS</description>
  24746. <bitOffset>4</bitOffset>
  24747. <bitWidth>1</bitWidth>
  24748. </field>
  24749. <field> <name>STUP</name>
  24750. <description>STUP</description>
  24751. <bitOffset>3</bitOffset>
  24752. <bitWidth>1</bitWidth>
  24753. </field>
  24754. <field> <name>EPDISD</name>
  24755. <description>EPDISD</description>
  24756. <bitOffset>1</bitOffset>
  24757. <bitWidth>1</bitWidth>
  24758. </field>
  24759. <field> <name>XFRC</name>
  24760. <description>XFRC</description>
  24761. <bitOffset>0</bitOffset>
  24762. <bitWidth>1</bitWidth>
  24763. </field>
  24764. </fields>
  24765. </register>
  24766. <register> <name>DOEPINT3</name>
  24767. <displayName>DOEPINT3</displayName>
  24768. <description>device endpoint-3 interrupt
  24769. register</description>
  24770. <addressOffset>0x368</addressOffset>
  24771. <size>0x20</size>
  24772. <access>read-write</access>
  24773. <resetValue>0x00000080</resetValue>
  24774. <fields>
  24775. <field> <name>B2BSTUP</name>
  24776. <description>B2BSTUP</description>
  24777. <bitOffset>6</bitOffset>
  24778. <bitWidth>1</bitWidth>
  24779. </field>
  24780. <field> <name>OTEPDIS</name>
  24781. <description>OTEPDIS</description>
  24782. <bitOffset>4</bitOffset>
  24783. <bitWidth>1</bitWidth>
  24784. </field>
  24785. <field> <name>STUP</name>
  24786. <description>STUP</description>
  24787. <bitOffset>3</bitOffset>
  24788. <bitWidth>1</bitWidth>
  24789. </field>
  24790. <field> <name>EPDISD</name>
  24791. <description>EPDISD</description>
  24792. <bitOffset>1</bitOffset>
  24793. <bitWidth>1</bitWidth>
  24794. </field>
  24795. <field> <name>XFRC</name>
  24796. <description>XFRC</description>
  24797. <bitOffset>0</bitOffset>
  24798. <bitWidth>1</bitWidth>
  24799. </field>
  24800. </fields>
  24801. </register>
  24802. <register> <name>DIEPTSIZ0</name>
  24803. <displayName>DIEPTSIZ0</displayName>
  24804. <description>device endpoint-0 transfer size
  24805. register</description>
  24806. <addressOffset>0x110</addressOffset>
  24807. <size>0x20</size>
  24808. <access>read-write</access>
  24809. <resetValue>0x00000000</resetValue>
  24810. <fields>
  24811. <field> <name>PKTCNT</name>
  24812. <description>Packet count</description>
  24813. <bitOffset>19</bitOffset>
  24814. <bitWidth>2</bitWidth>
  24815. </field>
  24816. <field> <name>XFRSIZ</name>
  24817. <description>Transfer size</description>
  24818. <bitOffset>0</bitOffset>
  24819. <bitWidth>7</bitWidth>
  24820. </field>
  24821. </fields>
  24822. </register>
  24823. <register> <name>DOEPTSIZ0</name>
  24824. <displayName>DOEPTSIZ0</displayName>
  24825. <description>device OUT endpoint-0 transfer size
  24826. register</description>
  24827. <addressOffset>0x310</addressOffset>
  24828. <size>0x20</size>
  24829. <access>read-write</access>
  24830. <resetValue>0x00000000</resetValue>
  24831. <fields>
  24832. <field> <name>STUPCNT</name>
  24833. <description>SETUP packet count</description>
  24834. <bitOffset>29</bitOffset>
  24835. <bitWidth>2</bitWidth>
  24836. </field>
  24837. <field> <name>PKTCNT</name>
  24838. <description>Packet count</description>
  24839. <bitOffset>19</bitOffset>
  24840. <bitWidth>1</bitWidth>
  24841. </field>
  24842. <field> <name>XFRSIZ</name>
  24843. <description>Transfer size</description>
  24844. <bitOffset>0</bitOffset>
  24845. <bitWidth>7</bitWidth>
  24846. </field>
  24847. </fields>
  24848. </register>
  24849. <register> <name>DIEPTSIZ1</name>
  24850. <displayName>DIEPTSIZ1</displayName>
  24851. <description>device endpoint-1 transfer size
  24852. register</description>
  24853. <addressOffset>0x130</addressOffset>
  24854. <size>0x20</size>
  24855. <access>read-write</access>
  24856. <resetValue>0x00000000</resetValue>
  24857. <fields>
  24858. <field> <name>MCNT</name>
  24859. <description>Multi count</description>
  24860. <bitOffset>29</bitOffset>
  24861. <bitWidth>2</bitWidth>
  24862. </field>
  24863. <field> <name>PKTCNT</name>
  24864. <description>Packet count</description>
  24865. <bitOffset>19</bitOffset>
  24866. <bitWidth>10</bitWidth>
  24867. </field>
  24868. <field> <name>XFRSIZ</name>
  24869. <description>Transfer size</description>
  24870. <bitOffset>0</bitOffset>
  24871. <bitWidth>19</bitWidth>
  24872. </field>
  24873. </fields>
  24874. </register>
  24875. <register> <name>DIEPTSIZ2</name>
  24876. <displayName>DIEPTSIZ2</displayName>
  24877. <description>device endpoint-2 transfer size
  24878. register</description>
  24879. <addressOffset>0x150</addressOffset>
  24880. <size>0x20</size>
  24881. <access>read-write</access>
  24882. <resetValue>0x00000000</resetValue>
  24883. <fields>
  24884. <field> <name>MCNT</name>
  24885. <description>Multi count</description>
  24886. <bitOffset>29</bitOffset>
  24887. <bitWidth>2</bitWidth>
  24888. </field>
  24889. <field> <name>PKTCNT</name>
  24890. <description>Packet count</description>
  24891. <bitOffset>19</bitOffset>
  24892. <bitWidth>10</bitWidth>
  24893. </field>
  24894. <field> <name>XFRSIZ</name>
  24895. <description>Transfer size</description>
  24896. <bitOffset>0</bitOffset>
  24897. <bitWidth>19</bitWidth>
  24898. </field>
  24899. </fields>
  24900. </register>
  24901. <register> <name>DIEPTSIZ3</name>
  24902. <displayName>DIEPTSIZ3</displayName>
  24903. <description>device endpoint-3 transfer size
  24904. register</description>
  24905. <addressOffset>0x170</addressOffset>
  24906. <size>0x20</size>
  24907. <access>read-write</access>
  24908. <resetValue>0x00000000</resetValue>
  24909. <fields>
  24910. <field> <name>MCNT</name>
  24911. <description>Multi count</description>
  24912. <bitOffset>29</bitOffset>
  24913. <bitWidth>2</bitWidth>
  24914. </field>
  24915. <field> <name>PKTCNT</name>
  24916. <description>Packet count</description>
  24917. <bitOffset>19</bitOffset>
  24918. <bitWidth>10</bitWidth>
  24919. </field>
  24920. <field> <name>XFRSIZ</name>
  24921. <description>Transfer size</description>
  24922. <bitOffset>0</bitOffset>
  24923. <bitWidth>19</bitWidth>
  24924. </field>
  24925. </fields>
  24926. </register>
  24927. <register> <name>DTXFSTS0</name>
  24928. <displayName>DTXFSTS0</displayName>
  24929. <description>OTG_FS device IN endpoint transmit FIFO
  24930. status register</description>
  24931. <addressOffset>0x118</addressOffset>
  24932. <size>0x20</size>
  24933. <access>read-only</access>
  24934. <resetValue>0x00000000</resetValue>
  24935. <fields>
  24936. <field> <name>INEPTFSAV</name>
  24937. <description>IN endpoint TxFIFO space
  24938. available</description>
  24939. <bitOffset>0</bitOffset>
  24940. <bitWidth>16</bitWidth>
  24941. </field>
  24942. </fields>
  24943. </register>
  24944. <register> <name>DTXFSTS1</name>
  24945. <displayName>DTXFSTS1</displayName>
  24946. <description>OTG_FS device IN endpoint transmit FIFO
  24947. status register</description>
  24948. <addressOffset>0x138</addressOffset>
  24949. <size>0x20</size>
  24950. <access>read-only</access>
  24951. <resetValue>0x00000000</resetValue>
  24952. <fields>
  24953. <field> <name>INEPTFSAV</name>
  24954. <description>IN endpoint TxFIFO space
  24955. available</description>
  24956. <bitOffset>0</bitOffset>
  24957. <bitWidth>16</bitWidth>
  24958. </field>
  24959. </fields>
  24960. </register>
  24961. <register> <name>DTXFSTS2</name>
  24962. <displayName>DTXFSTS2</displayName>
  24963. <description>OTG_FS device IN endpoint transmit FIFO
  24964. status register</description>
  24965. <addressOffset>0x158</addressOffset>
  24966. <size>0x20</size>
  24967. <access>read-only</access>
  24968. <resetValue>0x00000000</resetValue>
  24969. <fields>
  24970. <field> <name>INEPTFSAV</name>
  24971. <description>IN endpoint TxFIFO space
  24972. available</description>
  24973. <bitOffset>0</bitOffset>
  24974. <bitWidth>16</bitWidth>
  24975. </field>
  24976. </fields>
  24977. </register>
  24978. <register> <name>DTXFSTS3</name>
  24979. <displayName>DTXFSTS3</displayName>
  24980. <description>OTG_FS device IN endpoint transmit FIFO
  24981. status register</description>
  24982. <addressOffset>0x178</addressOffset>
  24983. <size>0x20</size>
  24984. <access>read-only</access>
  24985. <resetValue>0x00000000</resetValue>
  24986. <fields>
  24987. <field> <name>INEPTFSAV</name>
  24988. <description>IN endpoint TxFIFO space
  24989. available</description>
  24990. <bitOffset>0</bitOffset>
  24991. <bitWidth>16</bitWidth>
  24992. </field>
  24993. </fields>
  24994. </register>
  24995. <register> <name>DOEPTSIZ1</name>
  24996. <displayName>DOEPTSIZ1</displayName>
  24997. <description>device OUT endpoint-1 transfer size
  24998. register</description>
  24999. <addressOffset>0x330</addressOffset>
  25000. <size>0x20</size>
  25001. <access>read-write</access>
  25002. <resetValue>0x00000000</resetValue>
  25003. <fields>
  25004. <field> <name>RXDPID_STUPCNT</name>
  25005. <description>Received data PID/SETUP packet
  25006. count</description>
  25007. <bitOffset>29</bitOffset>
  25008. <bitWidth>2</bitWidth>
  25009. </field>
  25010. <field> <name>PKTCNT</name>
  25011. <description>Packet count</description>
  25012. <bitOffset>19</bitOffset>
  25013. <bitWidth>10</bitWidth>
  25014. </field>
  25015. <field> <name>XFRSIZ</name>
  25016. <description>Transfer size</description>
  25017. <bitOffset>0</bitOffset>
  25018. <bitWidth>19</bitWidth>
  25019. </field>
  25020. </fields>
  25021. </register>
  25022. <register> <name>DOEPTSIZ2</name>
  25023. <displayName>DOEPTSIZ2</displayName>
  25024. <description>device OUT endpoint-2 transfer size
  25025. register</description>
  25026. <addressOffset>0x350</addressOffset>
  25027. <size>0x20</size>
  25028. <access>read-write</access>
  25029. <resetValue>0x00000000</resetValue>
  25030. <fields>
  25031. <field> <name>RXDPID_STUPCNT</name>
  25032. <description>Received data PID/SETUP packet
  25033. count</description>
  25034. <bitOffset>29</bitOffset>
  25035. <bitWidth>2</bitWidth>
  25036. </field>
  25037. <field> <name>PKTCNT</name>
  25038. <description>Packet count</description>
  25039. <bitOffset>19</bitOffset>
  25040. <bitWidth>10</bitWidth>
  25041. </field>
  25042. <field> <name>XFRSIZ</name>
  25043. <description>Transfer size</description>
  25044. <bitOffset>0</bitOffset>
  25045. <bitWidth>19</bitWidth>
  25046. </field>
  25047. </fields>
  25048. </register>
  25049. <register> <name>DOEPTSIZ3</name>
  25050. <displayName>DOEPTSIZ3</displayName>
  25051. <description>device OUT endpoint-3 transfer size
  25052. register</description>
  25053. <addressOffset>0x370</addressOffset>
  25054. <size>0x20</size>
  25055. <access>read-write</access>
  25056. <resetValue>0x00000000</resetValue>
  25057. <fields>
  25058. <field> <name>RXDPID_STUPCNT</name>
  25059. <description>Received data PID/SETUP packet
  25060. count</description>
  25061. <bitOffset>29</bitOffset>
  25062. <bitWidth>2</bitWidth>
  25063. </field>
  25064. <field> <name>PKTCNT</name>
  25065. <description>Packet count</description>
  25066. <bitOffset>19</bitOffset>
  25067. <bitWidth>10</bitWidth>
  25068. </field>
  25069. <field> <name>XFRSIZ</name>
  25070. <description>Transfer size</description>
  25071. <bitOffset>0</bitOffset>
  25072. <bitWidth>19</bitWidth>
  25073. </field>
  25074. </fields>
  25075. </register>
  25076. </registers>
  25077. </peripheral>
  25078. <peripheral> <name>OTG_FS_PWRCLK</name>
  25079. <description>USB on the go full speed</description>
  25080. <groupName>USB_OTG_FS</groupName>
  25081. <baseAddress>0x50000E00</baseAddress>
  25082. <addressBlock>
  25083. <offset>0x0</offset>
  25084. <size>0x400</size>
  25085. <usage>registers</usage>
  25086. </addressBlock>
  25087. <registers>
  25088. <register> <name>FS_PCGCCTL</name>
  25089. <displayName>FS_PCGCCTL</displayName>
  25090. <description>OTG_FS power and clock gating control
  25091. register</description>
  25092. <addressOffset>0x0</addressOffset>
  25093. <size>0x20</size>
  25094. <access>read-write</access>
  25095. <resetValue>0x00000000</resetValue>
  25096. <fields>
  25097. <field> <name>STPPCLK</name>
  25098. <description>Stop PHY clock</description>
  25099. <bitOffset>0</bitOffset>
  25100. <bitWidth>1</bitWidth>
  25101. </field>
  25102. <field> <name>GATEHCLK</name>
  25103. <description>Gate HCLK</description>
  25104. <bitOffset>1</bitOffset>
  25105. <bitWidth>1</bitWidth>
  25106. </field>
  25107. <field> <name>PHYSUSP</name>
  25108. <description>PHY Suspended</description>
  25109. <bitOffset>4</bitOffset>
  25110. <bitWidth>1</bitWidth>
  25111. </field>
  25112. </fields>
  25113. </register>
  25114. </registers>
  25115. </peripheral>
  25116. <peripheral> <name>CAN1</name>
  25117. <description>Controller area network</description>
  25118. <groupName>CAN</groupName>
  25119. <baseAddress>0x40006400</baseAddress>
  25120. <addressBlock>
  25121. <offset>0x0</offset>
  25122. <size>0x400</size>
  25123. <usage>registers</usage>
  25124. </addressBlock>
  25125. <interrupt>
  25126. <name>CAN1_TX</name>
  25127. <description>CAN1 TX interrupts</description>
  25128. <value>19</value>
  25129. </interrupt>
  25130. <interrupt>
  25131. <name>CAN1_RX0</name>
  25132. <description>CAN1 RX0 interrupts</description>
  25133. <value>20</value>
  25134. </interrupt>
  25135. <interrupt>
  25136. <name>CAN1_RX1</name>
  25137. <description>CAN1 RX1 interrupts</description>
  25138. <value>21</value>
  25139. </interrupt>
  25140. <interrupt>
  25141. <name>CAN1_SCE</name>
  25142. <description>CAN1 SCE interrupt</description>
  25143. <value>22</value>
  25144. </interrupt>
  25145. <registers>
  25146. <register> <name>MCR</name>
  25147. <displayName>MCR</displayName>
  25148. <description>master control register</description>
  25149. <addressOffset>0x0</addressOffset>
  25150. <size>0x20</size>
  25151. <access>read-write</access>
  25152. <resetValue>0x00010002</resetValue>
  25153. <fields>
  25154. <field> <name>DBF</name>
  25155. <description>DBF</description>
  25156. <bitOffset>16</bitOffset>
  25157. <bitWidth>1</bitWidth>
  25158. </field>
  25159. <field> <name>RESET</name>
  25160. <description>RESET</description>
  25161. <bitOffset>15</bitOffset>
  25162. <bitWidth>1</bitWidth>
  25163. </field>
  25164. <field> <name>TTCM</name>
  25165. <description>TTCM</description>
  25166. <bitOffset>7</bitOffset>
  25167. <bitWidth>1</bitWidth>
  25168. </field>
  25169. <field> <name>ABOM</name>
  25170. <description>ABOM</description>
  25171. <bitOffset>6</bitOffset>
  25172. <bitWidth>1</bitWidth>
  25173. </field>
  25174. <field> <name>AWUM</name>
  25175. <description>AWUM</description>
  25176. <bitOffset>5</bitOffset>
  25177. <bitWidth>1</bitWidth>
  25178. </field>
  25179. <field> <name>NART</name>
  25180. <description>NART</description>
  25181. <bitOffset>4</bitOffset>
  25182. <bitWidth>1</bitWidth>
  25183. </field>
  25184. <field> <name>RFLM</name>
  25185. <description>RFLM</description>
  25186. <bitOffset>3</bitOffset>
  25187. <bitWidth>1</bitWidth>
  25188. </field>
  25189. <field> <name>TXFP</name>
  25190. <description>TXFP</description>
  25191. <bitOffset>2</bitOffset>
  25192. <bitWidth>1</bitWidth>
  25193. </field>
  25194. <field> <name>SLEEP</name>
  25195. <description>SLEEP</description>
  25196. <bitOffset>1</bitOffset>
  25197. <bitWidth>1</bitWidth>
  25198. </field>
  25199. <field> <name>INRQ</name>
  25200. <description>INRQ</description>
  25201. <bitOffset>0</bitOffset>
  25202. <bitWidth>1</bitWidth>
  25203. </field>
  25204. </fields>
  25205. </register>
  25206. <register> <name>MSR</name>
  25207. <displayName>MSR</displayName>
  25208. <description>master status register</description>
  25209. <addressOffset>0x4</addressOffset>
  25210. <size>0x20</size>
  25211. <resetValue>0x00000C02</resetValue>
  25212. <fields>
  25213. <field> <name>RX</name>
  25214. <description>RX</description>
  25215. <bitOffset>11</bitOffset>
  25216. <bitWidth>1</bitWidth>
  25217. <access>read-only</access>
  25218. </field>
  25219. <field> <name>SAMP</name>
  25220. <description>SAMP</description>
  25221. <bitOffset>10</bitOffset>
  25222. <bitWidth>1</bitWidth>
  25223. <access>read-only</access>
  25224. </field>
  25225. <field> <name>RXM</name>
  25226. <description>RXM</description>
  25227. <bitOffset>9</bitOffset>
  25228. <bitWidth>1</bitWidth>
  25229. <access>read-only</access>
  25230. </field>
  25231. <field> <name>TXM</name>
  25232. <description>TXM</description>
  25233. <bitOffset>8</bitOffset>
  25234. <bitWidth>1</bitWidth>
  25235. <access>read-only</access>
  25236. </field>
  25237. <field> <name>SLAKI</name>
  25238. <description>SLAKI</description>
  25239. <bitOffset>4</bitOffset>
  25240. <bitWidth>1</bitWidth>
  25241. <access>read-write</access>
  25242. </field>
  25243. <field> <name>WKUI</name>
  25244. <description>WKUI</description>
  25245. <bitOffset>3</bitOffset>
  25246. <bitWidth>1</bitWidth>
  25247. <access>read-write</access>
  25248. </field>
  25249. <field> <name>ERRI</name>
  25250. <description>ERRI</description>
  25251. <bitOffset>2</bitOffset>
  25252. <bitWidth>1</bitWidth>
  25253. <access>read-write</access>
  25254. </field>
  25255. <field> <name>SLAK</name>
  25256. <description>SLAK</description>
  25257. <bitOffset>1</bitOffset>
  25258. <bitWidth>1</bitWidth>
  25259. <access>read-only</access>
  25260. </field>
  25261. <field> <name>INAK</name>
  25262. <description>INAK</description>
  25263. <bitOffset>0</bitOffset>
  25264. <bitWidth>1</bitWidth>
  25265. <access>read-only</access>
  25266. </field>
  25267. </fields>
  25268. </register>
  25269. <register> <name>TSR</name>
  25270. <displayName>TSR</displayName>
  25271. <description>transmit status register</description>
  25272. <addressOffset>0x8</addressOffset>
  25273. <size>0x20</size>
  25274. <resetValue>0x1C000000</resetValue>
  25275. <fields>
  25276. <field> <name>LOW2</name>
  25277. <description>Lowest priority flag for mailbox
  25278. 2</description>
  25279. <bitOffset>31</bitOffset>
  25280. <bitWidth>1</bitWidth>
  25281. <access>read-only</access>
  25282. </field>
  25283. <field> <name>LOW1</name>
  25284. <description>Lowest priority flag for mailbox
  25285. 1</description>
  25286. <bitOffset>30</bitOffset>
  25287. <bitWidth>1</bitWidth>
  25288. <access>read-only</access>
  25289. </field>
  25290. <field> <name>LOW0</name>
  25291. <description>Lowest priority flag for mailbox
  25292. 0</description>
  25293. <bitOffset>29</bitOffset>
  25294. <bitWidth>1</bitWidth>
  25295. <access>read-only</access>
  25296. </field>
  25297. <field> <name>TME2</name>
  25298. <description>Lowest priority flag for mailbox
  25299. 2</description>
  25300. <bitOffset>28</bitOffset>
  25301. <bitWidth>1</bitWidth>
  25302. <access>read-only</access>
  25303. </field>
  25304. <field> <name>TME1</name>
  25305. <description>Lowest priority flag for mailbox
  25306. 1</description>
  25307. <bitOffset>27</bitOffset>
  25308. <bitWidth>1</bitWidth>
  25309. <access>read-only</access>
  25310. </field>
  25311. <field> <name>TME0</name>
  25312. <description>Lowest priority flag for mailbox
  25313. 0</description>
  25314. <bitOffset>26</bitOffset>
  25315. <bitWidth>1</bitWidth>
  25316. <access>read-only</access>
  25317. </field>
  25318. <field> <name>CODE</name>
  25319. <description>CODE</description>
  25320. <bitOffset>24</bitOffset>
  25321. <bitWidth>2</bitWidth>
  25322. <access>read-only</access>
  25323. </field>
  25324. <field> <name>ABRQ2</name>
  25325. <description>ABRQ2</description>
  25326. <bitOffset>23</bitOffset>
  25327. <bitWidth>1</bitWidth>
  25328. <access>read-write</access>
  25329. </field>
  25330. <field> <name>TERR2</name>
  25331. <description>TERR2</description>
  25332. <bitOffset>19</bitOffset>
  25333. <bitWidth>1</bitWidth>
  25334. <access>read-write</access>
  25335. </field>
  25336. <field> <name>ALST2</name>
  25337. <description>ALST2</description>
  25338. <bitOffset>18</bitOffset>
  25339. <bitWidth>1</bitWidth>
  25340. <access>read-write</access>
  25341. </field>
  25342. <field> <name>TXOK2</name>
  25343. <description>TXOK2</description>
  25344. <bitOffset>17</bitOffset>
  25345. <bitWidth>1</bitWidth>
  25346. <access>read-write</access>
  25347. </field>
  25348. <field> <name>RQCP2</name>
  25349. <description>RQCP2</description>
  25350. <bitOffset>16</bitOffset>
  25351. <bitWidth>1</bitWidth>
  25352. <access>read-write</access>
  25353. </field>
  25354. <field> <name>ABRQ1</name>
  25355. <description>ABRQ1</description>
  25356. <bitOffset>15</bitOffset>
  25357. <bitWidth>1</bitWidth>
  25358. <access>read-write</access>
  25359. </field>
  25360. <field> <name>TERR1</name>
  25361. <description>TERR1</description>
  25362. <bitOffset>11</bitOffset>
  25363. <bitWidth>1</bitWidth>
  25364. <access>read-write</access>
  25365. </field>
  25366. <field> <name>ALST1</name>
  25367. <description>ALST1</description>
  25368. <bitOffset>10</bitOffset>
  25369. <bitWidth>1</bitWidth>
  25370. <access>read-write</access>
  25371. </field>
  25372. <field> <name>TXOK1</name>
  25373. <description>TXOK1</description>
  25374. <bitOffset>9</bitOffset>
  25375. <bitWidth>1</bitWidth>
  25376. <access>read-write</access>
  25377. </field>
  25378. <field> <name>RQCP1</name>
  25379. <description>RQCP1</description>
  25380. <bitOffset>8</bitOffset>
  25381. <bitWidth>1</bitWidth>
  25382. <access>read-write</access>
  25383. </field>
  25384. <field> <name>ABRQ0</name>
  25385. <description>ABRQ0</description>
  25386. <bitOffset>7</bitOffset>
  25387. <bitWidth>1</bitWidth>
  25388. <access>read-write</access>
  25389. </field>
  25390. <field> <name>TERR0</name>
  25391. <description>TERR0</description>
  25392. <bitOffset>3</bitOffset>
  25393. <bitWidth>1</bitWidth>
  25394. <access>read-write</access>
  25395. </field>
  25396. <field> <name>ALST0</name>
  25397. <description>ALST0</description>
  25398. <bitOffset>2</bitOffset>
  25399. <bitWidth>1</bitWidth>
  25400. <access>read-write</access>
  25401. </field>
  25402. <field> <name>TXOK0</name>
  25403. <description>TXOK0</description>
  25404. <bitOffset>1</bitOffset>
  25405. <bitWidth>1</bitWidth>
  25406. <access>read-write</access>
  25407. </field>
  25408. <field> <name>RQCP0</name>
  25409. <description>RQCP0</description>
  25410. <bitOffset>0</bitOffset>
  25411. <bitWidth>1</bitWidth>
  25412. <access>read-write</access>
  25413. </field>
  25414. </fields>
  25415. </register>
  25416. <register> <name>RF0R</name>
  25417. <displayName>RF0R</displayName>
  25418. <description>receive FIFO 0 register</description>
  25419. <addressOffset>0xC</addressOffset>
  25420. <size>0x20</size>
  25421. <resetValue>0x00000000</resetValue>
  25422. <fields>
  25423. <field> <name>RFOM0</name>
  25424. <description>RFOM0</description>
  25425. <bitOffset>5</bitOffset>
  25426. <bitWidth>1</bitWidth>
  25427. <access>read-write</access>
  25428. </field>
  25429. <field> <name>FOVR0</name>
  25430. <description>FOVR0</description>
  25431. <bitOffset>4</bitOffset>
  25432. <bitWidth>1</bitWidth>
  25433. <access>read-write</access>
  25434. </field>
  25435. <field> <name>FULL0</name>
  25436. <description>FULL0</description>
  25437. <bitOffset>3</bitOffset>
  25438. <bitWidth>1</bitWidth>
  25439. <access>read-write</access>
  25440. </field>
  25441. <field> <name>FMP0</name>
  25442. <description>FMP0</description>
  25443. <bitOffset>0</bitOffset>
  25444. <bitWidth>2</bitWidth>
  25445. <access>read-only</access>
  25446. </field>
  25447. </fields>
  25448. </register>
  25449. <register> <name>RF1R</name>
  25450. <displayName>RF1R</displayName>
  25451. <description>receive FIFO 1 register</description>
  25452. <addressOffset>0x10</addressOffset>
  25453. <size>0x20</size>
  25454. <resetValue>0x00000000</resetValue>
  25455. <fields>
  25456. <field> <name>RFOM1</name>
  25457. <description>RFOM1</description>
  25458. <bitOffset>5</bitOffset>
  25459. <bitWidth>1</bitWidth>
  25460. <access>read-write</access>
  25461. </field>
  25462. <field> <name>FOVR1</name>
  25463. <description>FOVR1</description>
  25464. <bitOffset>4</bitOffset>
  25465. <bitWidth>1</bitWidth>
  25466. <access>read-write</access>
  25467. </field>
  25468. <field> <name>FULL1</name>
  25469. <description>FULL1</description>
  25470. <bitOffset>3</bitOffset>
  25471. <bitWidth>1</bitWidth>
  25472. <access>read-write</access>
  25473. </field>
  25474. <field> <name>FMP1</name>
  25475. <description>FMP1</description>
  25476. <bitOffset>0</bitOffset>
  25477. <bitWidth>2</bitWidth>
  25478. <access>read-only</access>
  25479. </field>
  25480. </fields>
  25481. </register>
  25482. <register> <name>IER</name>
  25483. <displayName>IER</displayName>
  25484. <description>interrupt enable register</description>
  25485. <addressOffset>0x14</addressOffset>
  25486. <size>0x20</size>
  25487. <access>read-write</access>
  25488. <resetValue>0x00000000</resetValue>
  25489. <fields>
  25490. <field> <name>SLKIE</name>
  25491. <description>SLKIE</description>
  25492. <bitOffset>17</bitOffset>
  25493. <bitWidth>1</bitWidth>
  25494. </field>
  25495. <field> <name>WKUIE</name>
  25496. <description>WKUIE</description>
  25497. <bitOffset>16</bitOffset>
  25498. <bitWidth>1</bitWidth>
  25499. </field>
  25500. <field> <name>ERRIE</name>
  25501. <description>ERRIE</description>
  25502. <bitOffset>15</bitOffset>
  25503. <bitWidth>1</bitWidth>
  25504. </field>
  25505. <field> <name>LECIE</name>
  25506. <description>LECIE</description>
  25507. <bitOffset>11</bitOffset>
  25508. <bitWidth>1</bitWidth>
  25509. </field>
  25510. <field> <name>BOFIE</name>
  25511. <description>BOFIE</description>
  25512. <bitOffset>10</bitOffset>
  25513. <bitWidth>1</bitWidth>
  25514. </field>
  25515. <field> <name>EPVIE</name>
  25516. <description>EPVIE</description>
  25517. <bitOffset>9</bitOffset>
  25518. <bitWidth>1</bitWidth>
  25519. </field>
  25520. <field> <name>EWGIE</name>
  25521. <description>EWGIE</description>
  25522. <bitOffset>8</bitOffset>
  25523. <bitWidth>1</bitWidth>
  25524. </field>
  25525. <field> <name>FOVIE1</name>
  25526. <description>FOVIE1</description>
  25527. <bitOffset>6</bitOffset>
  25528. <bitWidth>1</bitWidth>
  25529. </field>
  25530. <field> <name>FFIE1</name>
  25531. <description>FFIE1</description>
  25532. <bitOffset>5</bitOffset>
  25533. <bitWidth>1</bitWidth>
  25534. </field>
  25535. <field> <name>FMPIE1</name>
  25536. <description>FMPIE1</description>
  25537. <bitOffset>4</bitOffset>
  25538. <bitWidth>1</bitWidth>
  25539. </field>
  25540. <field> <name>FOVIE0</name>
  25541. <description>FOVIE0</description>
  25542. <bitOffset>3</bitOffset>
  25543. <bitWidth>1</bitWidth>
  25544. </field>
  25545. <field> <name>FFIE0</name>
  25546. <description>FFIE0</description>
  25547. <bitOffset>2</bitOffset>
  25548. <bitWidth>1</bitWidth>
  25549. </field>
  25550. <field> <name>FMPIE0</name>
  25551. <description>FMPIE0</description>
  25552. <bitOffset>1</bitOffset>
  25553. <bitWidth>1</bitWidth>
  25554. </field>
  25555. <field> <name>TMEIE</name>
  25556. <description>TMEIE</description>
  25557. <bitOffset>0</bitOffset>
  25558. <bitWidth>1</bitWidth>
  25559. </field>
  25560. </fields>
  25561. </register>
  25562. <register> <name>ESR</name>
  25563. <displayName>ESR</displayName>
  25564. <description>interrupt enable register</description>
  25565. <addressOffset>0x18</addressOffset>
  25566. <size>0x20</size>
  25567. <resetValue>0x00000000</resetValue>
  25568. <fields>
  25569. <field> <name>REC</name>
  25570. <description>REC</description>
  25571. <bitOffset>24</bitOffset>
  25572. <bitWidth>8</bitWidth>
  25573. <access>read-only</access>
  25574. </field>
  25575. <field> <name>TEC</name>
  25576. <description>TEC</description>
  25577. <bitOffset>16</bitOffset>
  25578. <bitWidth>8</bitWidth>
  25579. <access>read-only</access>
  25580. </field>
  25581. <field> <name>LEC</name>
  25582. <description>LEC</description>
  25583. <bitOffset>4</bitOffset>
  25584. <bitWidth>3</bitWidth>
  25585. <access>read-write</access>
  25586. </field>
  25587. <field> <name>BOFF</name>
  25588. <description>BOFF</description>
  25589. <bitOffset>2</bitOffset>
  25590. <bitWidth>1</bitWidth>
  25591. <access>read-only</access>
  25592. </field>
  25593. <field> <name>EPVF</name>
  25594. <description>EPVF</description>
  25595. <bitOffset>1</bitOffset>
  25596. <bitWidth>1</bitWidth>
  25597. <access>read-only</access>
  25598. </field>
  25599. <field> <name>EWGF</name>
  25600. <description>EWGF</description>
  25601. <bitOffset>0</bitOffset>
  25602. <bitWidth>1</bitWidth>
  25603. <access>read-only</access>
  25604. </field>
  25605. </fields>
  25606. </register>
  25607. <register> <name>BTR</name>
  25608. <displayName>BTR</displayName>
  25609. <description>bit timing register</description>
  25610. <addressOffset>0x1C</addressOffset>
  25611. <size>0x20</size>
  25612. <access>read-write</access>
  25613. <resetValue>0x00000000</resetValue>
  25614. <fields>
  25615. <field> <name>SILM</name>
  25616. <description>SILM</description>
  25617. <bitOffset>31</bitOffset>
  25618. <bitWidth>1</bitWidth>
  25619. </field>
  25620. <field> <name>LBKM</name>
  25621. <description>LBKM</description>
  25622. <bitOffset>30</bitOffset>
  25623. <bitWidth>1</bitWidth>
  25624. </field>
  25625. <field> <name>SJW</name>
  25626. <description>SJW</description>
  25627. <bitOffset>24</bitOffset>
  25628. <bitWidth>2</bitWidth>
  25629. </field>
  25630. <field> <name>TS2</name>
  25631. <description>TS2</description>
  25632. <bitOffset>20</bitOffset>
  25633. <bitWidth>3</bitWidth>
  25634. </field>
  25635. <field> <name>TS1</name>
  25636. <description>TS1</description>
  25637. <bitOffset>16</bitOffset>
  25638. <bitWidth>4</bitWidth>
  25639. </field>
  25640. <field> <name>BRP</name>
  25641. <description>BRP</description>
  25642. <bitOffset>0</bitOffset>
  25643. <bitWidth>10</bitWidth>
  25644. </field>
  25645. </fields>
  25646. </register>
  25647. <register> <name>TI0R</name>
  25648. <displayName>TI0R</displayName>
  25649. <description>TX mailbox identifier register</description>
  25650. <addressOffset>0x180</addressOffset>
  25651. <size>0x20</size>
  25652. <access>read-write</access>
  25653. <resetValue>0x00000000</resetValue>
  25654. <fields>
  25655. <field> <name>STID</name>
  25656. <description>STID</description>
  25657. <bitOffset>21</bitOffset>
  25658. <bitWidth>11</bitWidth>
  25659. </field>
  25660. <field> <name>EXID</name>
  25661. <description>EXID</description>
  25662. <bitOffset>3</bitOffset>
  25663. <bitWidth>18</bitWidth>
  25664. </field>
  25665. <field> <name>IDE</name>
  25666. <description>IDE</description>
  25667. <bitOffset>2</bitOffset>
  25668. <bitWidth>1</bitWidth>
  25669. </field>
  25670. <field> <name>RTR</name>
  25671. <description>RTR</description>
  25672. <bitOffset>1</bitOffset>
  25673. <bitWidth>1</bitWidth>
  25674. </field>
  25675. <field> <name>TXRQ</name>
  25676. <description>TXRQ</description>
  25677. <bitOffset>0</bitOffset>
  25678. <bitWidth>1</bitWidth>
  25679. </field>
  25680. </fields>
  25681. </register>
  25682. <register> <name>TDT0R</name>
  25683. <displayName>TDT0R</displayName>
  25684. <description>mailbox data length control and time stamp
  25685. register</description>
  25686. <addressOffset>0x184</addressOffset>
  25687. <size>0x20</size>
  25688. <access>read-write</access>
  25689. <resetValue>0x00000000</resetValue>
  25690. <fields>
  25691. <field> <name>TIME</name>
  25692. <description>TIME</description>
  25693. <bitOffset>16</bitOffset>
  25694. <bitWidth>16</bitWidth>
  25695. </field>
  25696. <field> <name>TGT</name>
  25697. <description>TGT</description>
  25698. <bitOffset>8</bitOffset>
  25699. <bitWidth>1</bitWidth>
  25700. </field>
  25701. <field> <name>DLC</name>
  25702. <description>DLC</description>
  25703. <bitOffset>0</bitOffset>
  25704. <bitWidth>4</bitWidth>
  25705. </field>
  25706. </fields>
  25707. </register>
  25708. <register> <name>TDL0R</name>
  25709. <displayName>TDL0R</displayName>
  25710. <description>mailbox data low register</description>
  25711. <addressOffset>0x188</addressOffset>
  25712. <size>0x20</size>
  25713. <access>read-write</access>
  25714. <resetValue>0x00000000</resetValue>
  25715. <fields>
  25716. <field> <name>DATA3</name>
  25717. <description>DATA3</description>
  25718. <bitOffset>24</bitOffset>
  25719. <bitWidth>8</bitWidth>
  25720. </field>
  25721. <field> <name>DATA2</name>
  25722. <description>DATA2</description>
  25723. <bitOffset>16</bitOffset>
  25724. <bitWidth>8</bitWidth>
  25725. </field>
  25726. <field> <name>DATA1</name>
  25727. <description>DATA1</description>
  25728. <bitOffset>8</bitOffset>
  25729. <bitWidth>8</bitWidth>
  25730. </field>
  25731. <field> <name>DATA0</name>
  25732. <description>DATA0</description>
  25733. <bitOffset>0</bitOffset>
  25734. <bitWidth>8</bitWidth>
  25735. </field>
  25736. </fields>
  25737. </register>
  25738. <register> <name>TDH0R</name>
  25739. <displayName>TDH0R</displayName>
  25740. <description>mailbox data high register</description>
  25741. <addressOffset>0x18C</addressOffset>
  25742. <size>0x20</size>
  25743. <access>read-write</access>
  25744. <resetValue>0x00000000</resetValue>
  25745. <fields>
  25746. <field> <name>DATA7</name>
  25747. <description>DATA7</description>
  25748. <bitOffset>24</bitOffset>
  25749. <bitWidth>8</bitWidth>
  25750. </field>
  25751. <field> <name>DATA6</name>
  25752. <description>DATA6</description>
  25753. <bitOffset>16</bitOffset>
  25754. <bitWidth>8</bitWidth>
  25755. </field>
  25756. <field> <name>DATA5</name>
  25757. <description>DATA5</description>
  25758. <bitOffset>8</bitOffset>
  25759. <bitWidth>8</bitWidth>
  25760. </field>
  25761. <field> <name>DATA4</name>
  25762. <description>DATA4</description>
  25763. <bitOffset>0</bitOffset>
  25764. <bitWidth>8</bitWidth>
  25765. </field>
  25766. </fields>
  25767. </register>
  25768. <register> <name>TI1R</name>
  25769. <displayName>TI1R</displayName>
  25770. <description>mailbox identifier register</description>
  25771. <addressOffset>0x190</addressOffset>
  25772. <size>0x20</size>
  25773. <access>read-write</access>
  25774. <resetValue>0x00000000</resetValue>
  25775. <fields>
  25776. <field> <name>STID</name>
  25777. <description>STID</description>
  25778. <bitOffset>21</bitOffset>
  25779. <bitWidth>11</bitWidth>
  25780. </field>
  25781. <field> <name>EXID</name>
  25782. <description>EXID</description>
  25783. <bitOffset>3</bitOffset>
  25784. <bitWidth>18</bitWidth>
  25785. </field>
  25786. <field> <name>IDE</name>
  25787. <description>IDE</description>
  25788. <bitOffset>2</bitOffset>
  25789. <bitWidth>1</bitWidth>
  25790. </field>
  25791. <field> <name>RTR</name>
  25792. <description>RTR</description>
  25793. <bitOffset>1</bitOffset>
  25794. <bitWidth>1</bitWidth>
  25795. </field>
  25796. <field> <name>TXRQ</name>
  25797. <description>TXRQ</description>
  25798. <bitOffset>0</bitOffset>
  25799. <bitWidth>1</bitWidth>
  25800. </field>
  25801. </fields>
  25802. </register>
  25803. <register> <name>TDT1R</name>
  25804. <displayName>TDT1R</displayName>
  25805. <description>mailbox data length control and time stamp
  25806. register</description>
  25807. <addressOffset>0x194</addressOffset>
  25808. <size>0x20</size>
  25809. <access>read-write</access>
  25810. <resetValue>0x00000000</resetValue>
  25811. <fields>
  25812. <field> <name>TIME</name>
  25813. <description>TIME</description>
  25814. <bitOffset>16</bitOffset>
  25815. <bitWidth>16</bitWidth>
  25816. </field>
  25817. <field> <name>TGT</name>
  25818. <description>TGT</description>
  25819. <bitOffset>8</bitOffset>
  25820. <bitWidth>1</bitWidth>
  25821. </field>
  25822. <field> <name>DLC</name>
  25823. <description>DLC</description>
  25824. <bitOffset>0</bitOffset>
  25825. <bitWidth>4</bitWidth>
  25826. </field>
  25827. </fields>
  25828. </register>
  25829. <register> <name>TDL1R</name>
  25830. <displayName>TDL1R</displayName>
  25831. <description>mailbox data low register</description>
  25832. <addressOffset>0x198</addressOffset>
  25833. <size>0x20</size>
  25834. <access>read-write</access>
  25835. <resetValue>0x00000000</resetValue>
  25836. <fields>
  25837. <field> <name>DATA3</name>
  25838. <description>DATA3</description>
  25839. <bitOffset>24</bitOffset>
  25840. <bitWidth>8</bitWidth>
  25841. </field>
  25842. <field> <name>DATA2</name>
  25843. <description>DATA2</description>
  25844. <bitOffset>16</bitOffset>
  25845. <bitWidth>8</bitWidth>
  25846. </field>
  25847. <field> <name>DATA1</name>
  25848. <description>DATA1</description>
  25849. <bitOffset>8</bitOffset>
  25850. <bitWidth>8</bitWidth>
  25851. </field>
  25852. <field> <name>DATA0</name>
  25853. <description>DATA0</description>
  25854. <bitOffset>0</bitOffset>
  25855. <bitWidth>8</bitWidth>
  25856. </field>
  25857. </fields>
  25858. </register>
  25859. <register> <name>TDH1R</name>
  25860. <displayName>TDH1R</displayName>
  25861. <description>mailbox data high register</description>
  25862. <addressOffset>0x19C</addressOffset>
  25863. <size>0x20</size>
  25864. <access>read-write</access>
  25865. <resetValue>0x00000000</resetValue>
  25866. <fields>
  25867. <field> <name>DATA7</name>
  25868. <description>DATA7</description>
  25869. <bitOffset>24</bitOffset>
  25870. <bitWidth>8</bitWidth>
  25871. </field>
  25872. <field> <name>DATA6</name>
  25873. <description>DATA6</description>
  25874. <bitOffset>16</bitOffset>
  25875. <bitWidth>8</bitWidth>
  25876. </field>
  25877. <field> <name>DATA5</name>
  25878. <description>DATA5</description>
  25879. <bitOffset>8</bitOffset>
  25880. <bitWidth>8</bitWidth>
  25881. </field>
  25882. <field> <name>DATA4</name>
  25883. <description>DATA4</description>
  25884. <bitOffset>0</bitOffset>
  25885. <bitWidth>8</bitWidth>
  25886. </field>
  25887. </fields>
  25888. </register>
  25889. <register> <name>TI2R</name>
  25890. <displayName>TI2R</displayName>
  25891. <description>mailbox identifier register</description>
  25892. <addressOffset>0x1A0</addressOffset>
  25893. <size>0x20</size>
  25894. <access>read-write</access>
  25895. <resetValue>0x00000000</resetValue>
  25896. <fields>
  25897. <field> <name>STID</name>
  25898. <description>STID</description>
  25899. <bitOffset>21</bitOffset>
  25900. <bitWidth>11</bitWidth>
  25901. </field>
  25902. <field> <name>EXID</name>
  25903. <description>EXID</description>
  25904. <bitOffset>3</bitOffset>
  25905. <bitWidth>18</bitWidth>
  25906. </field>
  25907. <field> <name>IDE</name>
  25908. <description>IDE</description>
  25909. <bitOffset>2</bitOffset>
  25910. <bitWidth>1</bitWidth>
  25911. </field>
  25912. <field> <name>RTR</name>
  25913. <description>RTR</description>
  25914. <bitOffset>1</bitOffset>
  25915. <bitWidth>1</bitWidth>
  25916. </field>
  25917. <field> <name>TXRQ</name>
  25918. <description>TXRQ</description>
  25919. <bitOffset>0</bitOffset>
  25920. <bitWidth>1</bitWidth>
  25921. </field>
  25922. </fields>
  25923. </register>
  25924. <register> <name>TDT2R</name>
  25925. <displayName>TDT2R</displayName>
  25926. <description>mailbox data length control and time stamp
  25927. register</description>
  25928. <addressOffset>0x1A4</addressOffset>
  25929. <size>0x20</size>
  25930. <access>read-write</access>
  25931. <resetValue>0x00000000</resetValue>
  25932. <fields>
  25933. <field> <name>TIME</name>
  25934. <description>TIME</description>
  25935. <bitOffset>16</bitOffset>
  25936. <bitWidth>16</bitWidth>
  25937. </field>
  25938. <field> <name>TGT</name>
  25939. <description>TGT</description>
  25940. <bitOffset>8</bitOffset>
  25941. <bitWidth>1</bitWidth>
  25942. </field>
  25943. <field> <name>DLC</name>
  25944. <description>DLC</description>
  25945. <bitOffset>0</bitOffset>
  25946. <bitWidth>4</bitWidth>
  25947. </field>
  25948. </fields>
  25949. </register>
  25950. <register> <name>TDL2R</name>
  25951. <displayName>TDL2R</displayName>
  25952. <description>mailbox data low register</description>
  25953. <addressOffset>0x1A8</addressOffset>
  25954. <size>0x20</size>
  25955. <access>read-write</access>
  25956. <resetValue>0x00000000</resetValue>
  25957. <fields>
  25958. <field> <name>DATA3</name>
  25959. <description>DATA3</description>
  25960. <bitOffset>24</bitOffset>
  25961. <bitWidth>8</bitWidth>
  25962. </field>
  25963. <field> <name>DATA2</name>
  25964. <description>DATA2</description>
  25965. <bitOffset>16</bitOffset>
  25966. <bitWidth>8</bitWidth>
  25967. </field>
  25968. <field> <name>DATA1</name>
  25969. <description>DATA1</description>
  25970. <bitOffset>8</bitOffset>
  25971. <bitWidth>8</bitWidth>
  25972. </field>
  25973. <field> <name>DATA0</name>
  25974. <description>DATA0</description>
  25975. <bitOffset>0</bitOffset>
  25976. <bitWidth>8</bitWidth>
  25977. </field>
  25978. </fields>
  25979. </register>
  25980. <register> <name>TDH2R</name>
  25981. <displayName>TDH2R</displayName>
  25982. <description>mailbox data high register</description>
  25983. <addressOffset>0x1AC</addressOffset>
  25984. <size>0x20</size>
  25985. <access>read-write</access>
  25986. <resetValue>0x00000000</resetValue>
  25987. <fields>
  25988. <field> <name>DATA7</name>
  25989. <description>DATA7</description>
  25990. <bitOffset>24</bitOffset>
  25991. <bitWidth>8</bitWidth>
  25992. </field>
  25993. <field> <name>DATA6</name>
  25994. <description>DATA6</description>
  25995. <bitOffset>16</bitOffset>
  25996. <bitWidth>8</bitWidth>
  25997. </field>
  25998. <field> <name>DATA5</name>
  25999. <description>DATA5</description>
  26000. <bitOffset>8</bitOffset>
  26001. <bitWidth>8</bitWidth>
  26002. </field>
  26003. <field> <name>DATA4</name>
  26004. <description>DATA4</description>
  26005. <bitOffset>0</bitOffset>
  26006. <bitWidth>8</bitWidth>
  26007. </field>
  26008. </fields>
  26009. </register>
  26010. <register> <name>RI0R</name>
  26011. <displayName>RI0R</displayName>
  26012. <description>receive FIFO mailbox identifier
  26013. register</description>
  26014. <addressOffset>0x1B0</addressOffset>
  26015. <size>0x20</size>
  26016. <access>read-only</access>
  26017. <resetValue>0x00000000</resetValue>
  26018. <fields>
  26019. <field> <name>STID</name>
  26020. <description>STID</description>
  26021. <bitOffset>21</bitOffset>
  26022. <bitWidth>11</bitWidth>
  26023. </field>
  26024. <field> <name>EXID</name>
  26025. <description>EXID</description>
  26026. <bitOffset>3</bitOffset>
  26027. <bitWidth>18</bitWidth>
  26028. </field>
  26029. <field> <name>IDE</name>
  26030. <description>IDE</description>
  26031. <bitOffset>2</bitOffset>
  26032. <bitWidth>1</bitWidth>
  26033. </field>
  26034. <field> <name>RTR</name>
  26035. <description>RTR</description>
  26036. <bitOffset>1</bitOffset>
  26037. <bitWidth>1</bitWidth>
  26038. </field>
  26039. </fields>
  26040. </register>
  26041. <register> <name>RDT0R</name>
  26042. <displayName>RDT0R</displayName>
  26043. <description>mailbox data high register</description>
  26044. <addressOffset>0x1B4</addressOffset>
  26045. <size>0x20</size>
  26046. <access>read-only</access>
  26047. <resetValue>0x00000000</resetValue>
  26048. <fields>
  26049. <field> <name>TIME</name>
  26050. <description>TIME</description>
  26051. <bitOffset>16</bitOffset>
  26052. <bitWidth>16</bitWidth>
  26053. </field>
  26054. <field> <name>FMI</name>
  26055. <description>FMI</description>
  26056. <bitOffset>8</bitOffset>
  26057. <bitWidth>8</bitWidth>
  26058. </field>
  26059. <field> <name>DLC</name>
  26060. <description>DLC</description>
  26061. <bitOffset>0</bitOffset>
  26062. <bitWidth>4</bitWidth>
  26063. </field>
  26064. </fields>
  26065. </register>
  26066. <register> <name>RDL0R</name>
  26067. <displayName>RDL0R</displayName>
  26068. <description>mailbox data high register</description>
  26069. <addressOffset>0x1B8</addressOffset>
  26070. <size>0x20</size>
  26071. <access>read-only</access>
  26072. <resetValue>0x00000000</resetValue>
  26073. <fields>
  26074. <field> <name>DATA3</name>
  26075. <description>DATA3</description>
  26076. <bitOffset>24</bitOffset>
  26077. <bitWidth>8</bitWidth>
  26078. </field>
  26079. <field> <name>DATA2</name>
  26080. <description>DATA2</description>
  26081. <bitOffset>16</bitOffset>
  26082. <bitWidth>8</bitWidth>
  26083. </field>
  26084. <field> <name>DATA1</name>
  26085. <description>DATA1</description>
  26086. <bitOffset>8</bitOffset>
  26087. <bitWidth>8</bitWidth>
  26088. </field>
  26089. <field> <name>DATA0</name>
  26090. <description>DATA0</description>
  26091. <bitOffset>0</bitOffset>
  26092. <bitWidth>8</bitWidth>
  26093. </field>
  26094. </fields>
  26095. </register>
  26096. <register> <name>RDH0R</name>
  26097. <displayName>RDH0R</displayName>
  26098. <description>receive FIFO mailbox data high
  26099. register</description>
  26100. <addressOffset>0x1BC</addressOffset>
  26101. <size>0x20</size>
  26102. <access>read-only</access>
  26103. <resetValue>0x00000000</resetValue>
  26104. <fields>
  26105. <field> <name>DATA7</name>
  26106. <description>DATA7</description>
  26107. <bitOffset>24</bitOffset>
  26108. <bitWidth>8</bitWidth>
  26109. </field>
  26110. <field> <name>DATA6</name>
  26111. <description>DATA6</description>
  26112. <bitOffset>16</bitOffset>
  26113. <bitWidth>8</bitWidth>
  26114. </field>
  26115. <field> <name>DATA5</name>
  26116. <description>DATA5</description>
  26117. <bitOffset>8</bitOffset>
  26118. <bitWidth>8</bitWidth>
  26119. </field>
  26120. <field> <name>DATA4</name>
  26121. <description>DATA4</description>
  26122. <bitOffset>0</bitOffset>
  26123. <bitWidth>8</bitWidth>
  26124. </field>
  26125. </fields>
  26126. </register>
  26127. <register> <name>RI1R</name>
  26128. <displayName>RI1R</displayName>
  26129. <description>mailbox data high register</description>
  26130. <addressOffset>0x1C0</addressOffset>
  26131. <size>0x20</size>
  26132. <access>read-only</access>
  26133. <resetValue>0x00000000</resetValue>
  26134. <fields>
  26135. <field> <name>STID</name>
  26136. <description>STID</description>
  26137. <bitOffset>21</bitOffset>
  26138. <bitWidth>11</bitWidth>
  26139. </field>
  26140. <field> <name>EXID</name>
  26141. <description>EXID</description>
  26142. <bitOffset>3</bitOffset>
  26143. <bitWidth>18</bitWidth>
  26144. </field>
  26145. <field> <name>IDE</name>
  26146. <description>IDE</description>
  26147. <bitOffset>2</bitOffset>
  26148. <bitWidth>1</bitWidth>
  26149. </field>
  26150. <field> <name>RTR</name>
  26151. <description>RTR</description>
  26152. <bitOffset>1</bitOffset>
  26153. <bitWidth>1</bitWidth>
  26154. </field>
  26155. </fields>
  26156. </register>
  26157. <register> <name>RDT1R</name>
  26158. <displayName>RDT1R</displayName>
  26159. <description>mailbox data high register</description>
  26160. <addressOffset>0x1C4</addressOffset>
  26161. <size>0x20</size>
  26162. <access>read-only</access>
  26163. <resetValue>0x00000000</resetValue>
  26164. <fields>
  26165. <field> <name>TIME</name>
  26166. <description>TIME</description>
  26167. <bitOffset>16</bitOffset>
  26168. <bitWidth>16</bitWidth>
  26169. </field>
  26170. <field> <name>FMI</name>
  26171. <description>FMI</description>
  26172. <bitOffset>8</bitOffset>
  26173. <bitWidth>8</bitWidth>
  26174. </field>
  26175. <field> <name>DLC</name>
  26176. <description>DLC</description>
  26177. <bitOffset>0</bitOffset>
  26178. <bitWidth>4</bitWidth>
  26179. </field>
  26180. </fields>
  26181. </register>
  26182. <register> <name>RDL1R</name>
  26183. <displayName>RDL1R</displayName>
  26184. <description>mailbox data high register</description>
  26185. <addressOffset>0x1C8</addressOffset>
  26186. <size>0x20</size>
  26187. <access>read-only</access>
  26188. <resetValue>0x00000000</resetValue>
  26189. <fields>
  26190. <field> <name>DATA3</name>
  26191. <description>DATA3</description>
  26192. <bitOffset>24</bitOffset>
  26193. <bitWidth>8</bitWidth>
  26194. </field>
  26195. <field> <name>DATA2</name>
  26196. <description>DATA2</description>
  26197. <bitOffset>16</bitOffset>
  26198. <bitWidth>8</bitWidth>
  26199. </field>
  26200. <field> <name>DATA1</name>
  26201. <description>DATA1</description>
  26202. <bitOffset>8</bitOffset>
  26203. <bitWidth>8</bitWidth>
  26204. </field>
  26205. <field> <name>DATA0</name>
  26206. <description>DATA0</description>
  26207. <bitOffset>0</bitOffset>
  26208. <bitWidth>8</bitWidth>
  26209. </field>
  26210. </fields>
  26211. </register>
  26212. <register> <name>RDH1R</name>
  26213. <displayName>RDH1R</displayName>
  26214. <description>mailbox data high register</description>
  26215. <addressOffset>0x1CC</addressOffset>
  26216. <size>0x20</size>
  26217. <access>read-only</access>
  26218. <resetValue>0x00000000</resetValue>
  26219. <fields>
  26220. <field> <name>DATA7</name>
  26221. <description>DATA7</description>
  26222. <bitOffset>24</bitOffset>
  26223. <bitWidth>8</bitWidth>
  26224. </field>
  26225. <field> <name>DATA6</name>
  26226. <description>DATA6</description>
  26227. <bitOffset>16</bitOffset>
  26228. <bitWidth>8</bitWidth>
  26229. </field>
  26230. <field> <name>DATA5</name>
  26231. <description>DATA5</description>
  26232. <bitOffset>8</bitOffset>
  26233. <bitWidth>8</bitWidth>
  26234. </field>
  26235. <field> <name>DATA4</name>
  26236. <description>DATA4</description>
  26237. <bitOffset>0</bitOffset>
  26238. <bitWidth>8</bitWidth>
  26239. </field>
  26240. </fields>
  26241. </register>
  26242. <register> <name>FMR</name>
  26243. <displayName>FMR</displayName>
  26244. <description>filter master register</description>
  26245. <addressOffset>0x200</addressOffset>
  26246. <size>0x20</size>
  26247. <access>read-write</access>
  26248. <resetValue>0x2A1C0E01</resetValue>
  26249. <fields>
  26250. <field> <name>CAN2SB</name>
  26251. <description>CAN2SB</description>
  26252. <bitOffset>8</bitOffset>
  26253. <bitWidth>6</bitWidth>
  26254. </field>
  26255. <field> <name>FINIT</name>
  26256. <description>FINIT</description>
  26257. <bitOffset>0</bitOffset>
  26258. <bitWidth>1</bitWidth>
  26259. </field>
  26260. </fields>
  26261. </register>
  26262. <register> <name>FM1R</name>
  26263. <displayName>FM1R</displayName>
  26264. <description>filter mode register</description>
  26265. <addressOffset>0x204</addressOffset>
  26266. <size>0x20</size>
  26267. <access>read-write</access>
  26268. <resetValue>0x00000000</resetValue>
  26269. <fields>
  26270. <field> <name>FBM0</name>
  26271. <description>Filter mode</description>
  26272. <bitOffset>0</bitOffset>
  26273. <bitWidth>1</bitWidth>
  26274. </field>
  26275. <field> <name>FBM1</name>
  26276. <description>Filter mode</description>
  26277. <bitOffset>1</bitOffset>
  26278. <bitWidth>1</bitWidth>
  26279. </field>
  26280. <field> <name>FBM2</name>
  26281. <description>Filter mode</description>
  26282. <bitOffset>2</bitOffset>
  26283. <bitWidth>1</bitWidth>
  26284. </field>
  26285. <field> <name>FBM3</name>
  26286. <description>Filter mode</description>
  26287. <bitOffset>3</bitOffset>
  26288. <bitWidth>1</bitWidth>
  26289. </field>
  26290. <field> <name>FBM4</name>
  26291. <description>Filter mode</description>
  26292. <bitOffset>4</bitOffset>
  26293. <bitWidth>1</bitWidth>
  26294. </field>
  26295. <field> <name>FBM5</name>
  26296. <description>Filter mode</description>
  26297. <bitOffset>5</bitOffset>
  26298. <bitWidth>1</bitWidth>
  26299. </field>
  26300. <field> <name>FBM6</name>
  26301. <description>Filter mode</description>
  26302. <bitOffset>6</bitOffset>
  26303. <bitWidth>1</bitWidth>
  26304. </field>
  26305. <field> <name>FBM7</name>
  26306. <description>Filter mode</description>
  26307. <bitOffset>7</bitOffset>
  26308. <bitWidth>1</bitWidth>
  26309. </field>
  26310. <field> <name>FBM8</name>
  26311. <description>Filter mode</description>
  26312. <bitOffset>8</bitOffset>
  26313. <bitWidth>1</bitWidth>
  26314. </field>
  26315. <field> <name>FBM9</name>
  26316. <description>Filter mode</description>
  26317. <bitOffset>9</bitOffset>
  26318. <bitWidth>1</bitWidth>
  26319. </field>
  26320. <field> <name>FBM10</name>
  26321. <description>Filter mode</description>
  26322. <bitOffset>10</bitOffset>
  26323. <bitWidth>1</bitWidth>
  26324. </field>
  26325. <field> <name>FBM11</name>
  26326. <description>Filter mode</description>
  26327. <bitOffset>11</bitOffset>
  26328. <bitWidth>1</bitWidth>
  26329. </field>
  26330. <field> <name>FBM12</name>
  26331. <description>Filter mode</description>
  26332. <bitOffset>12</bitOffset>
  26333. <bitWidth>1</bitWidth>
  26334. </field>
  26335. <field> <name>FBM13</name>
  26336. <description>Filter mode</description>
  26337. <bitOffset>13</bitOffset>
  26338. <bitWidth>1</bitWidth>
  26339. </field>
  26340. <field> <name>FBM14</name>
  26341. <description>Filter mode</description>
  26342. <bitOffset>14</bitOffset>
  26343. <bitWidth>1</bitWidth>
  26344. </field>
  26345. <field> <name>FBM15</name>
  26346. <description>Filter mode</description>
  26347. <bitOffset>15</bitOffset>
  26348. <bitWidth>1</bitWidth>
  26349. </field>
  26350. <field> <name>FBM16</name>
  26351. <description>Filter mode</description>
  26352. <bitOffset>16</bitOffset>
  26353. <bitWidth>1</bitWidth>
  26354. </field>
  26355. <field> <name>FBM17</name>
  26356. <description>Filter mode</description>
  26357. <bitOffset>17</bitOffset>
  26358. <bitWidth>1</bitWidth>
  26359. </field>
  26360. <field> <name>FBM18</name>
  26361. <description>Filter mode</description>
  26362. <bitOffset>18</bitOffset>
  26363. <bitWidth>1</bitWidth>
  26364. </field>
  26365. <field> <name>FBM19</name>
  26366. <description>Filter mode</description>
  26367. <bitOffset>19</bitOffset>
  26368. <bitWidth>1</bitWidth>
  26369. </field>
  26370. <field> <name>FBM20</name>
  26371. <description>Filter mode</description>
  26372. <bitOffset>20</bitOffset>
  26373. <bitWidth>1</bitWidth>
  26374. </field>
  26375. <field> <name>FBM21</name>
  26376. <description>Filter mode</description>
  26377. <bitOffset>21</bitOffset>
  26378. <bitWidth>1</bitWidth>
  26379. </field>
  26380. <field> <name>FBM22</name>
  26381. <description>Filter mode</description>
  26382. <bitOffset>22</bitOffset>
  26383. <bitWidth>1</bitWidth>
  26384. </field>
  26385. <field> <name>FBM23</name>
  26386. <description>Filter mode</description>
  26387. <bitOffset>23</bitOffset>
  26388. <bitWidth>1</bitWidth>
  26389. </field>
  26390. <field> <name>FBM24</name>
  26391. <description>Filter mode</description>
  26392. <bitOffset>24</bitOffset>
  26393. <bitWidth>1</bitWidth>
  26394. </field>
  26395. <field> <name>FBM25</name>
  26396. <description>Filter mode</description>
  26397. <bitOffset>25</bitOffset>
  26398. <bitWidth>1</bitWidth>
  26399. </field>
  26400. <field> <name>FBM26</name>
  26401. <description>Filter mode</description>
  26402. <bitOffset>26</bitOffset>
  26403. <bitWidth>1</bitWidth>
  26404. </field>
  26405. <field> <name>FBM27</name>
  26406. <description>Filter mode</description>
  26407. <bitOffset>27</bitOffset>
  26408. <bitWidth>1</bitWidth>
  26409. </field>
  26410. </fields>
  26411. </register>
  26412. <register> <name>FS1R</name>
  26413. <displayName>FS1R</displayName>
  26414. <description>filter scale register</description>
  26415. <addressOffset>0x20C</addressOffset>
  26416. <size>0x20</size>
  26417. <access>read-write</access>
  26418. <resetValue>0x00000000</resetValue>
  26419. <fields>
  26420. <field> <name>FSC0</name>
  26421. <description>Filter scale configuration</description>
  26422. <bitOffset>0</bitOffset>
  26423. <bitWidth>1</bitWidth>
  26424. </field>
  26425. <field> <name>FSC1</name>
  26426. <description>Filter scale configuration</description>
  26427. <bitOffset>1</bitOffset>
  26428. <bitWidth>1</bitWidth>
  26429. </field>
  26430. <field> <name>FSC2</name>
  26431. <description>Filter scale configuration</description>
  26432. <bitOffset>2</bitOffset>
  26433. <bitWidth>1</bitWidth>
  26434. </field>
  26435. <field> <name>FSC3</name>
  26436. <description>Filter scale configuration</description>
  26437. <bitOffset>3</bitOffset>
  26438. <bitWidth>1</bitWidth>
  26439. </field>
  26440. <field> <name>FSC4</name>
  26441. <description>Filter scale configuration</description>
  26442. <bitOffset>4</bitOffset>
  26443. <bitWidth>1</bitWidth>
  26444. </field>
  26445. <field> <name>FSC5</name>
  26446. <description>Filter scale configuration</description>
  26447. <bitOffset>5</bitOffset>
  26448. <bitWidth>1</bitWidth>
  26449. </field>
  26450. <field> <name>FSC6</name>
  26451. <description>Filter scale configuration</description>
  26452. <bitOffset>6</bitOffset>
  26453. <bitWidth>1</bitWidth>
  26454. </field>
  26455. <field> <name>FSC7</name>
  26456. <description>Filter scale configuration</description>
  26457. <bitOffset>7</bitOffset>
  26458. <bitWidth>1</bitWidth>
  26459. </field>
  26460. <field> <name>FSC8</name>
  26461. <description>Filter scale configuration</description>
  26462. <bitOffset>8</bitOffset>
  26463. <bitWidth>1</bitWidth>
  26464. </field>
  26465. <field> <name>FSC9</name>
  26466. <description>Filter scale configuration</description>
  26467. <bitOffset>9</bitOffset>
  26468. <bitWidth>1</bitWidth>
  26469. </field>
  26470. <field> <name>FSC10</name>
  26471. <description>Filter scale configuration</description>
  26472. <bitOffset>10</bitOffset>
  26473. <bitWidth>1</bitWidth>
  26474. </field>
  26475. <field> <name>FSC11</name>
  26476. <description>Filter scale configuration</description>
  26477. <bitOffset>11</bitOffset>
  26478. <bitWidth>1</bitWidth>
  26479. </field>
  26480. <field> <name>FSC12</name>
  26481. <description>Filter scale configuration</description>
  26482. <bitOffset>12</bitOffset>
  26483. <bitWidth>1</bitWidth>
  26484. </field>
  26485. <field> <name>FSC13</name>
  26486. <description>Filter scale configuration</description>
  26487. <bitOffset>13</bitOffset>
  26488. <bitWidth>1</bitWidth>
  26489. </field>
  26490. <field> <name>FSC14</name>
  26491. <description>Filter scale configuration</description>
  26492. <bitOffset>14</bitOffset>
  26493. <bitWidth>1</bitWidth>
  26494. </field>
  26495. <field> <name>FSC15</name>
  26496. <description>Filter scale configuration</description>
  26497. <bitOffset>15</bitOffset>
  26498. <bitWidth>1</bitWidth>
  26499. </field>
  26500. <field> <name>FSC16</name>
  26501. <description>Filter scale configuration</description>
  26502. <bitOffset>16</bitOffset>
  26503. <bitWidth>1</bitWidth>
  26504. </field>
  26505. <field> <name>FSC17</name>
  26506. <description>Filter scale configuration</description>
  26507. <bitOffset>17</bitOffset>
  26508. <bitWidth>1</bitWidth>
  26509. </field>
  26510. <field> <name>FSC18</name>
  26511. <description>Filter scale configuration</description>
  26512. <bitOffset>18</bitOffset>
  26513. <bitWidth>1</bitWidth>
  26514. </field>
  26515. <field> <name>FSC19</name>
  26516. <description>Filter scale configuration</description>
  26517. <bitOffset>19</bitOffset>
  26518. <bitWidth>1</bitWidth>
  26519. </field>
  26520. <field> <name>FSC20</name>
  26521. <description>Filter scale configuration</description>
  26522. <bitOffset>20</bitOffset>
  26523. <bitWidth>1</bitWidth>
  26524. </field>
  26525. <field> <name>FSC21</name>
  26526. <description>Filter scale configuration</description>
  26527. <bitOffset>21</bitOffset>
  26528. <bitWidth>1</bitWidth>
  26529. </field>
  26530. <field> <name>FSC22</name>
  26531. <description>Filter scale configuration</description>
  26532. <bitOffset>22</bitOffset>
  26533. <bitWidth>1</bitWidth>
  26534. </field>
  26535. <field> <name>FSC23</name>
  26536. <description>Filter scale configuration</description>
  26537. <bitOffset>23</bitOffset>
  26538. <bitWidth>1</bitWidth>
  26539. </field>
  26540. <field> <name>FSC24</name>
  26541. <description>Filter scale configuration</description>
  26542. <bitOffset>24</bitOffset>
  26543. <bitWidth>1</bitWidth>
  26544. </field>
  26545. <field> <name>FSC25</name>
  26546. <description>Filter scale configuration</description>
  26547. <bitOffset>25</bitOffset>
  26548. <bitWidth>1</bitWidth>
  26549. </field>
  26550. <field> <name>FSC26</name>
  26551. <description>Filter scale configuration</description>
  26552. <bitOffset>26</bitOffset>
  26553. <bitWidth>1</bitWidth>
  26554. </field>
  26555. <field> <name>FSC27</name>
  26556. <description>Filter scale configuration</description>
  26557. <bitOffset>27</bitOffset>
  26558. <bitWidth>1</bitWidth>
  26559. </field>
  26560. </fields>
  26561. </register>
  26562. <register> <name>FFA1R</name>
  26563. <displayName>FFA1R</displayName>
  26564. <description>filter FIFO assignment
  26565. register</description>
  26566. <addressOffset>0x214</addressOffset>
  26567. <size>0x20</size>
  26568. <access>read-write</access>
  26569. <resetValue>0x00000000</resetValue>
  26570. <fields>
  26571. <field> <name>FFA0</name>
  26572. <description>Filter FIFO assignment for filter
  26573. 0</description>
  26574. <bitOffset>0</bitOffset>
  26575. <bitWidth>1</bitWidth>
  26576. </field>
  26577. <field> <name>FFA1</name>
  26578. <description>Filter FIFO assignment for filter
  26579. 1</description>
  26580. <bitOffset>1</bitOffset>
  26581. <bitWidth>1</bitWidth>
  26582. </field>
  26583. <field> <name>FFA2</name>
  26584. <description>Filter FIFO assignment for filter
  26585. 2</description>
  26586. <bitOffset>2</bitOffset>
  26587. <bitWidth>1</bitWidth>
  26588. </field>
  26589. <field> <name>FFA3</name>
  26590. <description>Filter FIFO assignment for filter
  26591. 3</description>
  26592. <bitOffset>3</bitOffset>
  26593. <bitWidth>1</bitWidth>
  26594. </field>
  26595. <field> <name>FFA4</name>
  26596. <description>Filter FIFO assignment for filter
  26597. 4</description>
  26598. <bitOffset>4</bitOffset>
  26599. <bitWidth>1</bitWidth>
  26600. </field>
  26601. <field> <name>FFA5</name>
  26602. <description>Filter FIFO assignment for filter
  26603. 5</description>
  26604. <bitOffset>5</bitOffset>
  26605. <bitWidth>1</bitWidth>
  26606. </field>
  26607. <field> <name>FFA6</name>
  26608. <description>Filter FIFO assignment for filter
  26609. 6</description>
  26610. <bitOffset>6</bitOffset>
  26611. <bitWidth>1</bitWidth>
  26612. </field>
  26613. <field> <name>FFA7</name>
  26614. <description>Filter FIFO assignment for filter
  26615. 7</description>
  26616. <bitOffset>7</bitOffset>
  26617. <bitWidth>1</bitWidth>
  26618. </field>
  26619. <field> <name>FFA8</name>
  26620. <description>Filter FIFO assignment for filter
  26621. 8</description>
  26622. <bitOffset>8</bitOffset>
  26623. <bitWidth>1</bitWidth>
  26624. </field>
  26625. <field> <name>FFA9</name>
  26626. <description>Filter FIFO assignment for filter
  26627. 9</description>
  26628. <bitOffset>9</bitOffset>
  26629. <bitWidth>1</bitWidth>
  26630. </field>
  26631. <field> <name>FFA10</name>
  26632. <description>Filter FIFO assignment for filter
  26633. 10</description>
  26634. <bitOffset>10</bitOffset>
  26635. <bitWidth>1</bitWidth>
  26636. </field>
  26637. <field> <name>FFA11</name>
  26638. <description>Filter FIFO assignment for filter
  26639. 11</description>
  26640. <bitOffset>11</bitOffset>
  26641. <bitWidth>1</bitWidth>
  26642. </field>
  26643. <field> <name>FFA12</name>
  26644. <description>Filter FIFO assignment for filter
  26645. 12</description>
  26646. <bitOffset>12</bitOffset>
  26647. <bitWidth>1</bitWidth>
  26648. </field>
  26649. <field> <name>FFA13</name>
  26650. <description>Filter FIFO assignment for filter
  26651. 13</description>
  26652. <bitOffset>13</bitOffset>
  26653. <bitWidth>1</bitWidth>
  26654. </field>
  26655. <field> <name>FFA14</name>
  26656. <description>Filter FIFO assignment for filter
  26657. 14</description>
  26658. <bitOffset>14</bitOffset>
  26659. <bitWidth>1</bitWidth>
  26660. </field>
  26661. <field> <name>FFA15</name>
  26662. <description>Filter FIFO assignment for filter
  26663. 15</description>
  26664. <bitOffset>15</bitOffset>
  26665. <bitWidth>1</bitWidth>
  26666. </field>
  26667. <field> <name>FFA16</name>
  26668. <description>Filter FIFO assignment for filter
  26669. 16</description>
  26670. <bitOffset>16</bitOffset>
  26671. <bitWidth>1</bitWidth>
  26672. </field>
  26673. <field> <name>FFA17</name>
  26674. <description>Filter FIFO assignment for filter
  26675. 17</description>
  26676. <bitOffset>17</bitOffset>
  26677. <bitWidth>1</bitWidth>
  26678. </field>
  26679. <field> <name>FFA18</name>
  26680. <description>Filter FIFO assignment for filter
  26681. 18</description>
  26682. <bitOffset>18</bitOffset>
  26683. <bitWidth>1</bitWidth>
  26684. </field>
  26685. <field> <name>FFA19</name>
  26686. <description>Filter FIFO assignment for filter
  26687. 19</description>
  26688. <bitOffset>19</bitOffset>
  26689. <bitWidth>1</bitWidth>
  26690. </field>
  26691. <field> <name>FFA20</name>
  26692. <description>Filter FIFO assignment for filter
  26693. 20</description>
  26694. <bitOffset>20</bitOffset>
  26695. <bitWidth>1</bitWidth>
  26696. </field>
  26697. <field> <name>FFA21</name>
  26698. <description>Filter FIFO assignment for filter
  26699. 21</description>
  26700. <bitOffset>21</bitOffset>
  26701. <bitWidth>1</bitWidth>
  26702. </field>
  26703. <field> <name>FFA22</name>
  26704. <description>Filter FIFO assignment for filter
  26705. 22</description>
  26706. <bitOffset>22</bitOffset>
  26707. <bitWidth>1</bitWidth>
  26708. </field>
  26709. <field> <name>FFA23</name>
  26710. <description>Filter FIFO assignment for filter
  26711. 23</description>
  26712. <bitOffset>23</bitOffset>
  26713. <bitWidth>1</bitWidth>
  26714. </field>
  26715. <field> <name>FFA24</name>
  26716. <description>Filter FIFO assignment for filter
  26717. 24</description>
  26718. <bitOffset>24</bitOffset>
  26719. <bitWidth>1</bitWidth>
  26720. </field>
  26721. <field> <name>FFA25</name>
  26722. <description>Filter FIFO assignment for filter
  26723. 25</description>
  26724. <bitOffset>25</bitOffset>
  26725. <bitWidth>1</bitWidth>
  26726. </field>
  26727. <field> <name>FFA26</name>
  26728. <description>Filter FIFO assignment for filter
  26729. 26</description>
  26730. <bitOffset>26</bitOffset>
  26731. <bitWidth>1</bitWidth>
  26732. </field>
  26733. <field> <name>FFA27</name>
  26734. <description>Filter FIFO assignment for filter
  26735. 27</description>
  26736. <bitOffset>27</bitOffset>
  26737. <bitWidth>1</bitWidth>
  26738. </field>
  26739. </fields>
  26740. </register>
  26741. <register> <name>FA1R</name>
  26742. <displayName>FA1R</displayName>
  26743. <description>filter activation register</description>
  26744. <addressOffset>0x21C</addressOffset>
  26745. <size>0x20</size>
  26746. <access>read-write</access>
  26747. <resetValue>0x00000000</resetValue>
  26748. <fields>
  26749. <field> <name>FACT0</name>
  26750. <description>Filter active</description>
  26751. <bitOffset>0</bitOffset>
  26752. <bitWidth>1</bitWidth>
  26753. </field>
  26754. <field> <name>FACT1</name>
  26755. <description>Filter active</description>
  26756. <bitOffset>1</bitOffset>
  26757. <bitWidth>1</bitWidth>
  26758. </field>
  26759. <field> <name>FACT2</name>
  26760. <description>Filter active</description>
  26761. <bitOffset>2</bitOffset>
  26762. <bitWidth>1</bitWidth>
  26763. </field>
  26764. <field> <name>FACT3</name>
  26765. <description>Filter active</description>
  26766. <bitOffset>3</bitOffset>
  26767. <bitWidth>1</bitWidth>
  26768. </field>
  26769. <field> <name>FACT4</name>
  26770. <description>Filter active</description>
  26771. <bitOffset>4</bitOffset>
  26772. <bitWidth>1</bitWidth>
  26773. </field>
  26774. <field> <name>FACT5</name>
  26775. <description>Filter active</description>
  26776. <bitOffset>5</bitOffset>
  26777. <bitWidth>1</bitWidth>
  26778. </field>
  26779. <field> <name>FACT6</name>
  26780. <description>Filter active</description>
  26781. <bitOffset>6</bitOffset>
  26782. <bitWidth>1</bitWidth>
  26783. </field>
  26784. <field> <name>FACT7</name>
  26785. <description>Filter active</description>
  26786. <bitOffset>7</bitOffset>
  26787. <bitWidth>1</bitWidth>
  26788. </field>
  26789. <field> <name>FACT8</name>
  26790. <description>Filter active</description>
  26791. <bitOffset>8</bitOffset>
  26792. <bitWidth>1</bitWidth>
  26793. </field>
  26794. <field> <name>FACT9</name>
  26795. <description>Filter active</description>
  26796. <bitOffset>9</bitOffset>
  26797. <bitWidth>1</bitWidth>
  26798. </field>
  26799. <field> <name>FACT10</name>
  26800. <description>Filter active</description>
  26801. <bitOffset>10</bitOffset>
  26802. <bitWidth>1</bitWidth>
  26803. </field>
  26804. <field> <name>FACT11</name>
  26805. <description>Filter active</description>
  26806. <bitOffset>11</bitOffset>
  26807. <bitWidth>1</bitWidth>
  26808. </field>
  26809. <field> <name>FACT12</name>
  26810. <description>Filter active</description>
  26811. <bitOffset>12</bitOffset>
  26812. <bitWidth>1</bitWidth>
  26813. </field>
  26814. <field> <name>FACT13</name>
  26815. <description>Filter active</description>
  26816. <bitOffset>13</bitOffset>
  26817. <bitWidth>1</bitWidth>
  26818. </field>
  26819. <field> <name>FACT14</name>
  26820. <description>Filter active</description>
  26821. <bitOffset>14</bitOffset>
  26822. <bitWidth>1</bitWidth>
  26823. </field>
  26824. <field> <name>FACT15</name>
  26825. <description>Filter active</description>
  26826. <bitOffset>15</bitOffset>
  26827. <bitWidth>1</bitWidth>
  26828. </field>
  26829. <field> <name>FACT16</name>
  26830. <description>Filter active</description>
  26831. <bitOffset>16</bitOffset>
  26832. <bitWidth>1</bitWidth>
  26833. </field>
  26834. <field> <name>FACT17</name>
  26835. <description>Filter active</description>
  26836. <bitOffset>17</bitOffset>
  26837. <bitWidth>1</bitWidth>
  26838. </field>
  26839. <field> <name>FACT18</name>
  26840. <description>Filter active</description>
  26841. <bitOffset>18</bitOffset>
  26842. <bitWidth>1</bitWidth>
  26843. </field>
  26844. <field> <name>FACT19</name>
  26845. <description>Filter active</description>
  26846. <bitOffset>19</bitOffset>
  26847. <bitWidth>1</bitWidth>
  26848. </field>
  26849. <field> <name>FACT20</name>
  26850. <description>Filter active</description>
  26851. <bitOffset>20</bitOffset>
  26852. <bitWidth>1</bitWidth>
  26853. </field>
  26854. <field> <name>FACT21</name>
  26855. <description>Filter active</description>
  26856. <bitOffset>21</bitOffset>
  26857. <bitWidth>1</bitWidth>
  26858. </field>
  26859. <field> <name>FACT22</name>
  26860. <description>Filter active</description>
  26861. <bitOffset>22</bitOffset>
  26862. <bitWidth>1</bitWidth>
  26863. </field>
  26864. <field> <name>FACT23</name>
  26865. <description>Filter active</description>
  26866. <bitOffset>23</bitOffset>
  26867. <bitWidth>1</bitWidth>
  26868. </field>
  26869. <field> <name>FACT24</name>
  26870. <description>Filter active</description>
  26871. <bitOffset>24</bitOffset>
  26872. <bitWidth>1</bitWidth>
  26873. </field>
  26874. <field> <name>FACT25</name>
  26875. <description>Filter active</description>
  26876. <bitOffset>25</bitOffset>
  26877. <bitWidth>1</bitWidth>
  26878. </field>
  26879. <field> <name>FACT26</name>
  26880. <description>Filter active</description>
  26881. <bitOffset>26</bitOffset>
  26882. <bitWidth>1</bitWidth>
  26883. </field>
  26884. <field> <name>FACT27</name>
  26885. <description>Filter active</description>
  26886. <bitOffset>27</bitOffset>
  26887. <bitWidth>1</bitWidth>
  26888. </field>
  26889. </fields>
  26890. </register>
  26891. <register> <name>F0R1</name>
  26892. <displayName>F0R1</displayName>
  26893. <description>Filter bank 0 register 1</description>
  26894. <addressOffset>0x240</addressOffset>
  26895. <size>0x20</size>
  26896. <access>read-write</access>
  26897. <resetValue>0x00000000</resetValue>
  26898. <fields>
  26899. <field> <name>FB0</name>
  26900. <description>Filter bits</description>
  26901. <bitOffset>0</bitOffset>
  26902. <bitWidth>1</bitWidth>
  26903. </field>
  26904. <field> <name>FB1</name>
  26905. <description>Filter bits</description>
  26906. <bitOffset>1</bitOffset>
  26907. <bitWidth>1</bitWidth>
  26908. </field>
  26909. <field> <name>FB2</name>
  26910. <description>Filter bits</description>
  26911. <bitOffset>2</bitOffset>
  26912. <bitWidth>1</bitWidth>
  26913. </field>
  26914. <field> <name>FB3</name>
  26915. <description>Filter bits</description>
  26916. <bitOffset>3</bitOffset>
  26917. <bitWidth>1</bitWidth>
  26918. </field>
  26919. <field> <name>FB4</name>
  26920. <description>Filter bits</description>
  26921. <bitOffset>4</bitOffset>
  26922. <bitWidth>1</bitWidth>
  26923. </field>
  26924. <field> <name>FB5</name>
  26925. <description>Filter bits</description>
  26926. <bitOffset>5</bitOffset>
  26927. <bitWidth>1</bitWidth>
  26928. </field>
  26929. <field> <name>FB6</name>
  26930. <description>Filter bits</description>
  26931. <bitOffset>6</bitOffset>
  26932. <bitWidth>1</bitWidth>
  26933. </field>
  26934. <field> <name>FB7</name>
  26935. <description>Filter bits</description>
  26936. <bitOffset>7</bitOffset>
  26937. <bitWidth>1</bitWidth>
  26938. </field>
  26939. <field> <name>FB8</name>
  26940. <description>Filter bits</description>
  26941. <bitOffset>8</bitOffset>
  26942. <bitWidth>1</bitWidth>
  26943. </field>
  26944. <field> <name>FB9</name>
  26945. <description>Filter bits</description>
  26946. <bitOffset>9</bitOffset>
  26947. <bitWidth>1</bitWidth>
  26948. </field>
  26949. <field> <name>FB10</name>
  26950. <description>Filter bits</description>
  26951. <bitOffset>10</bitOffset>
  26952. <bitWidth>1</bitWidth>
  26953. </field>
  26954. <field> <name>FB11</name>
  26955. <description>Filter bits</description>
  26956. <bitOffset>11</bitOffset>
  26957. <bitWidth>1</bitWidth>
  26958. </field>
  26959. <field> <name>FB12</name>
  26960. <description>Filter bits</description>
  26961. <bitOffset>12</bitOffset>
  26962. <bitWidth>1</bitWidth>
  26963. </field>
  26964. <field> <name>FB13</name>
  26965. <description>Filter bits</description>
  26966. <bitOffset>13</bitOffset>
  26967. <bitWidth>1</bitWidth>
  26968. </field>
  26969. <field> <name>FB14</name>
  26970. <description>Filter bits</description>
  26971. <bitOffset>14</bitOffset>
  26972. <bitWidth>1</bitWidth>
  26973. </field>
  26974. <field> <name>FB15</name>
  26975. <description>Filter bits</description>
  26976. <bitOffset>15</bitOffset>
  26977. <bitWidth>1</bitWidth>
  26978. </field>
  26979. <field> <name>FB16</name>
  26980. <description>Filter bits</description>
  26981. <bitOffset>16</bitOffset>
  26982. <bitWidth>1</bitWidth>
  26983. </field>
  26984. <field> <name>FB17</name>
  26985. <description>Filter bits</description>
  26986. <bitOffset>17</bitOffset>
  26987. <bitWidth>1</bitWidth>
  26988. </field>
  26989. <field> <name>FB18</name>
  26990. <description>Filter bits</description>
  26991. <bitOffset>18</bitOffset>
  26992. <bitWidth>1</bitWidth>
  26993. </field>
  26994. <field> <name>FB19</name>
  26995. <description>Filter bits</description>
  26996. <bitOffset>19</bitOffset>
  26997. <bitWidth>1</bitWidth>
  26998. </field>
  26999. <field> <name>FB20</name>
  27000. <description>Filter bits</description>
  27001. <bitOffset>20</bitOffset>
  27002. <bitWidth>1</bitWidth>
  27003. </field>
  27004. <field> <name>FB21</name>
  27005. <description>Filter bits</description>
  27006. <bitOffset>21</bitOffset>
  27007. <bitWidth>1</bitWidth>
  27008. </field>
  27009. <field> <name>FB22</name>
  27010. <description>Filter bits</description>
  27011. <bitOffset>22</bitOffset>
  27012. <bitWidth>1</bitWidth>
  27013. </field>
  27014. <field> <name>FB23</name>
  27015. <description>Filter bits</description>
  27016. <bitOffset>23</bitOffset>
  27017. <bitWidth>1</bitWidth>
  27018. </field>
  27019. <field> <name>FB24</name>
  27020. <description>Filter bits</description>
  27021. <bitOffset>24</bitOffset>
  27022. <bitWidth>1</bitWidth>
  27023. </field>
  27024. <field> <name>FB25</name>
  27025. <description>Filter bits</description>
  27026. <bitOffset>25</bitOffset>
  27027. <bitWidth>1</bitWidth>
  27028. </field>
  27029. <field> <name>FB26</name>
  27030. <description>Filter bits</description>
  27031. <bitOffset>26</bitOffset>
  27032. <bitWidth>1</bitWidth>
  27033. </field>
  27034. <field> <name>FB27</name>
  27035. <description>Filter bits</description>
  27036. <bitOffset>27</bitOffset>
  27037. <bitWidth>1</bitWidth>
  27038. </field>
  27039. <field> <name>FB28</name>
  27040. <description>Filter bits</description>
  27041. <bitOffset>28</bitOffset>
  27042. <bitWidth>1</bitWidth>
  27043. </field>
  27044. <field> <name>FB29</name>
  27045. <description>Filter bits</description>
  27046. <bitOffset>29</bitOffset>
  27047. <bitWidth>1</bitWidth>
  27048. </field>
  27049. <field> <name>FB30</name>
  27050. <description>Filter bits</description>
  27051. <bitOffset>30</bitOffset>
  27052. <bitWidth>1</bitWidth>
  27053. </field>
  27054. <field> <name>FB31</name>
  27055. <description>Filter bits</description>
  27056. <bitOffset>31</bitOffset>
  27057. <bitWidth>1</bitWidth>
  27058. </field>
  27059. </fields>
  27060. </register>
  27061. <register> <name>F0R2</name>
  27062. <displayName>F0R2</displayName>
  27063. <description>Filter bank 0 register 2</description>
  27064. <addressOffset>0x244</addressOffset>
  27065. <size>0x20</size>
  27066. <access>read-write</access>
  27067. <resetValue>0x00000000</resetValue>
  27068. <fields>
  27069. <field> <name>FB0</name>
  27070. <description>Filter bits</description>
  27071. <bitOffset>0</bitOffset>
  27072. <bitWidth>1</bitWidth>
  27073. </field>
  27074. <field> <name>FB1</name>
  27075. <description>Filter bits</description>
  27076. <bitOffset>1</bitOffset>
  27077. <bitWidth>1</bitWidth>
  27078. </field>
  27079. <field> <name>FB2</name>
  27080. <description>Filter bits</description>
  27081. <bitOffset>2</bitOffset>
  27082. <bitWidth>1</bitWidth>
  27083. </field>
  27084. <field> <name>FB3</name>
  27085. <description>Filter bits</description>
  27086. <bitOffset>3</bitOffset>
  27087. <bitWidth>1</bitWidth>
  27088. </field>
  27089. <field> <name>FB4</name>
  27090. <description>Filter bits</description>
  27091. <bitOffset>4</bitOffset>
  27092. <bitWidth>1</bitWidth>
  27093. </field>
  27094. <field> <name>FB5</name>
  27095. <description>Filter bits</description>
  27096. <bitOffset>5</bitOffset>
  27097. <bitWidth>1</bitWidth>
  27098. </field>
  27099. <field> <name>FB6</name>
  27100. <description>Filter bits</description>
  27101. <bitOffset>6</bitOffset>
  27102. <bitWidth>1</bitWidth>
  27103. </field>
  27104. <field> <name>FB7</name>
  27105. <description>Filter bits</description>
  27106. <bitOffset>7</bitOffset>
  27107. <bitWidth>1</bitWidth>
  27108. </field>
  27109. <field> <name>FB8</name>
  27110. <description>Filter bits</description>
  27111. <bitOffset>8</bitOffset>
  27112. <bitWidth>1</bitWidth>
  27113. </field>
  27114. <field> <name>FB9</name>
  27115. <description>Filter bits</description>
  27116. <bitOffset>9</bitOffset>
  27117. <bitWidth>1</bitWidth>
  27118. </field>
  27119. <field> <name>FB10</name>
  27120. <description>Filter bits</description>
  27121. <bitOffset>10</bitOffset>
  27122. <bitWidth>1</bitWidth>
  27123. </field>
  27124. <field> <name>FB11</name>
  27125. <description>Filter bits</description>
  27126. <bitOffset>11</bitOffset>
  27127. <bitWidth>1</bitWidth>
  27128. </field>
  27129. <field> <name>FB12</name>
  27130. <description>Filter bits</description>
  27131. <bitOffset>12</bitOffset>
  27132. <bitWidth>1</bitWidth>
  27133. </field>
  27134. <field> <name>FB13</name>
  27135. <description>Filter bits</description>
  27136. <bitOffset>13</bitOffset>
  27137. <bitWidth>1</bitWidth>
  27138. </field>
  27139. <field> <name>FB14</name>
  27140. <description>Filter bits</description>
  27141. <bitOffset>14</bitOffset>
  27142. <bitWidth>1</bitWidth>
  27143. </field>
  27144. <field> <name>FB15</name>
  27145. <description>Filter bits</description>
  27146. <bitOffset>15</bitOffset>
  27147. <bitWidth>1</bitWidth>
  27148. </field>
  27149. <field> <name>FB16</name>
  27150. <description>Filter bits</description>
  27151. <bitOffset>16</bitOffset>
  27152. <bitWidth>1</bitWidth>
  27153. </field>
  27154. <field> <name>FB17</name>
  27155. <description>Filter bits</description>
  27156. <bitOffset>17</bitOffset>
  27157. <bitWidth>1</bitWidth>
  27158. </field>
  27159. <field> <name>FB18</name>
  27160. <description>Filter bits</description>
  27161. <bitOffset>18</bitOffset>
  27162. <bitWidth>1</bitWidth>
  27163. </field>
  27164. <field> <name>FB19</name>
  27165. <description>Filter bits</description>
  27166. <bitOffset>19</bitOffset>
  27167. <bitWidth>1</bitWidth>
  27168. </field>
  27169. <field> <name>FB20</name>
  27170. <description>Filter bits</description>
  27171. <bitOffset>20</bitOffset>
  27172. <bitWidth>1</bitWidth>
  27173. </field>
  27174. <field> <name>FB21</name>
  27175. <description>Filter bits</description>
  27176. <bitOffset>21</bitOffset>
  27177. <bitWidth>1</bitWidth>
  27178. </field>
  27179. <field> <name>FB22</name>
  27180. <description>Filter bits</description>
  27181. <bitOffset>22</bitOffset>
  27182. <bitWidth>1</bitWidth>
  27183. </field>
  27184. <field> <name>FB23</name>
  27185. <description>Filter bits</description>
  27186. <bitOffset>23</bitOffset>
  27187. <bitWidth>1</bitWidth>
  27188. </field>
  27189. <field> <name>FB24</name>
  27190. <description>Filter bits</description>
  27191. <bitOffset>24</bitOffset>
  27192. <bitWidth>1</bitWidth>
  27193. </field>
  27194. <field> <name>FB25</name>
  27195. <description>Filter bits</description>
  27196. <bitOffset>25</bitOffset>
  27197. <bitWidth>1</bitWidth>
  27198. </field>
  27199. <field> <name>FB26</name>
  27200. <description>Filter bits</description>
  27201. <bitOffset>26</bitOffset>
  27202. <bitWidth>1</bitWidth>
  27203. </field>
  27204. <field> <name>FB27</name>
  27205. <description>Filter bits</description>
  27206. <bitOffset>27</bitOffset>
  27207. <bitWidth>1</bitWidth>
  27208. </field>
  27209. <field> <name>FB28</name>
  27210. <description>Filter bits</description>
  27211. <bitOffset>28</bitOffset>
  27212. <bitWidth>1</bitWidth>
  27213. </field>
  27214. <field> <name>FB29</name>
  27215. <description>Filter bits</description>
  27216. <bitOffset>29</bitOffset>
  27217. <bitWidth>1</bitWidth>
  27218. </field>
  27219. <field> <name>FB30</name>
  27220. <description>Filter bits</description>
  27221. <bitOffset>30</bitOffset>
  27222. <bitWidth>1</bitWidth>
  27223. </field>
  27224. <field> <name>FB31</name>
  27225. <description>Filter bits</description>
  27226. <bitOffset>31</bitOffset>
  27227. <bitWidth>1</bitWidth>
  27228. </field>
  27229. </fields>
  27230. </register>
  27231. <register> <name>F1R1</name>
  27232. <displayName>F1R1</displayName>
  27233. <description>Filter bank 1 register 1</description>
  27234. <addressOffset>0x248</addressOffset>
  27235. <size>0x20</size>
  27236. <access>read-write</access>
  27237. <resetValue>0x00000000</resetValue>
  27238. <fields>
  27239. <field> <name>FB0</name>
  27240. <description>Filter bits</description>
  27241. <bitOffset>0</bitOffset>
  27242. <bitWidth>1</bitWidth>
  27243. </field>
  27244. <field> <name>FB1</name>
  27245. <description>Filter bits</description>
  27246. <bitOffset>1</bitOffset>
  27247. <bitWidth>1</bitWidth>
  27248. </field>
  27249. <field> <name>FB2</name>
  27250. <description>Filter bits</description>
  27251. <bitOffset>2</bitOffset>
  27252. <bitWidth>1</bitWidth>
  27253. </field>
  27254. <field> <name>FB3</name>
  27255. <description>Filter bits</description>
  27256. <bitOffset>3</bitOffset>
  27257. <bitWidth>1</bitWidth>
  27258. </field>
  27259. <field> <name>FB4</name>
  27260. <description>Filter bits</description>
  27261. <bitOffset>4</bitOffset>
  27262. <bitWidth>1</bitWidth>
  27263. </field>
  27264. <field> <name>FB5</name>
  27265. <description>Filter bits</description>
  27266. <bitOffset>5</bitOffset>
  27267. <bitWidth>1</bitWidth>
  27268. </field>
  27269. <field> <name>FB6</name>
  27270. <description>Filter bits</description>
  27271. <bitOffset>6</bitOffset>
  27272. <bitWidth>1</bitWidth>
  27273. </field>
  27274. <field> <name>FB7</name>
  27275. <description>Filter bits</description>
  27276. <bitOffset>7</bitOffset>
  27277. <bitWidth>1</bitWidth>
  27278. </field>
  27279. <field> <name>FB8</name>
  27280. <description>Filter bits</description>
  27281. <bitOffset>8</bitOffset>
  27282. <bitWidth>1</bitWidth>
  27283. </field>
  27284. <field> <name>FB9</name>
  27285. <description>Filter bits</description>
  27286. <bitOffset>9</bitOffset>
  27287. <bitWidth>1</bitWidth>
  27288. </field>
  27289. <field> <name>FB10</name>
  27290. <description>Filter bits</description>
  27291. <bitOffset>10</bitOffset>
  27292. <bitWidth>1</bitWidth>
  27293. </field>
  27294. <field> <name>FB11</name>
  27295. <description>Filter bits</description>
  27296. <bitOffset>11</bitOffset>
  27297. <bitWidth>1</bitWidth>
  27298. </field>
  27299. <field> <name>FB12</name>
  27300. <description>Filter bits</description>
  27301. <bitOffset>12</bitOffset>
  27302. <bitWidth>1</bitWidth>
  27303. </field>
  27304. <field> <name>FB13</name>
  27305. <description>Filter bits</description>
  27306. <bitOffset>13</bitOffset>
  27307. <bitWidth>1</bitWidth>
  27308. </field>
  27309. <field> <name>FB14</name>
  27310. <description>Filter bits</description>
  27311. <bitOffset>14</bitOffset>
  27312. <bitWidth>1</bitWidth>
  27313. </field>
  27314. <field> <name>FB15</name>
  27315. <description>Filter bits</description>
  27316. <bitOffset>15</bitOffset>
  27317. <bitWidth>1</bitWidth>
  27318. </field>
  27319. <field> <name>FB16</name>
  27320. <description>Filter bits</description>
  27321. <bitOffset>16</bitOffset>
  27322. <bitWidth>1</bitWidth>
  27323. </field>
  27324. <field> <name>FB17</name>
  27325. <description>Filter bits</description>
  27326. <bitOffset>17</bitOffset>
  27327. <bitWidth>1</bitWidth>
  27328. </field>
  27329. <field> <name>FB18</name>
  27330. <description>Filter bits</description>
  27331. <bitOffset>18</bitOffset>
  27332. <bitWidth>1</bitWidth>
  27333. </field>
  27334. <field> <name>FB19</name>
  27335. <description>Filter bits</description>
  27336. <bitOffset>19</bitOffset>
  27337. <bitWidth>1</bitWidth>
  27338. </field>
  27339. <field> <name>FB20</name>
  27340. <description>Filter bits</description>
  27341. <bitOffset>20</bitOffset>
  27342. <bitWidth>1</bitWidth>
  27343. </field>
  27344. <field> <name>FB21</name>
  27345. <description>Filter bits</description>
  27346. <bitOffset>21</bitOffset>
  27347. <bitWidth>1</bitWidth>
  27348. </field>
  27349. <field> <name>FB22</name>
  27350. <description>Filter bits</description>
  27351. <bitOffset>22</bitOffset>
  27352. <bitWidth>1</bitWidth>
  27353. </field>
  27354. <field> <name>FB23</name>
  27355. <description>Filter bits</description>
  27356. <bitOffset>23</bitOffset>
  27357. <bitWidth>1</bitWidth>
  27358. </field>
  27359. <field> <name>FB24</name>
  27360. <description>Filter bits</description>
  27361. <bitOffset>24</bitOffset>
  27362. <bitWidth>1</bitWidth>
  27363. </field>
  27364. <field> <name>FB25</name>
  27365. <description>Filter bits</description>
  27366. <bitOffset>25</bitOffset>
  27367. <bitWidth>1</bitWidth>
  27368. </field>
  27369. <field> <name>FB26</name>
  27370. <description>Filter bits</description>
  27371. <bitOffset>26</bitOffset>
  27372. <bitWidth>1</bitWidth>
  27373. </field>
  27374. <field> <name>FB27</name>
  27375. <description>Filter bits</description>
  27376. <bitOffset>27</bitOffset>
  27377. <bitWidth>1</bitWidth>
  27378. </field>
  27379. <field> <name>FB28</name>
  27380. <description>Filter bits</description>
  27381. <bitOffset>28</bitOffset>
  27382. <bitWidth>1</bitWidth>
  27383. </field>
  27384. <field> <name>FB29</name>
  27385. <description>Filter bits</description>
  27386. <bitOffset>29</bitOffset>
  27387. <bitWidth>1</bitWidth>
  27388. </field>
  27389. <field> <name>FB30</name>
  27390. <description>Filter bits</description>
  27391. <bitOffset>30</bitOffset>
  27392. <bitWidth>1</bitWidth>
  27393. </field>
  27394. <field> <name>FB31</name>
  27395. <description>Filter bits</description>
  27396. <bitOffset>31</bitOffset>
  27397. <bitWidth>1</bitWidth>
  27398. </field>
  27399. </fields>
  27400. </register>
  27401. <register> <name>F1R2</name>
  27402. <displayName>F1R2</displayName>
  27403. <description>Filter bank 1 register 2</description>
  27404. <addressOffset>0x24C</addressOffset>
  27405. <size>0x20</size>
  27406. <access>read-write</access>
  27407. <resetValue>0x00000000</resetValue>
  27408. <fields>
  27409. <field> <name>FB0</name>
  27410. <description>Filter bits</description>
  27411. <bitOffset>0</bitOffset>
  27412. <bitWidth>1</bitWidth>
  27413. </field>
  27414. <field> <name>FB1</name>
  27415. <description>Filter bits</description>
  27416. <bitOffset>1</bitOffset>
  27417. <bitWidth>1</bitWidth>
  27418. </field>
  27419. <field> <name>FB2</name>
  27420. <description>Filter bits</description>
  27421. <bitOffset>2</bitOffset>
  27422. <bitWidth>1</bitWidth>
  27423. </field>
  27424. <field> <name>FB3</name>
  27425. <description>Filter bits</description>
  27426. <bitOffset>3</bitOffset>
  27427. <bitWidth>1</bitWidth>
  27428. </field>
  27429. <field> <name>FB4</name>
  27430. <description>Filter bits</description>
  27431. <bitOffset>4</bitOffset>
  27432. <bitWidth>1</bitWidth>
  27433. </field>
  27434. <field> <name>FB5</name>
  27435. <description>Filter bits</description>
  27436. <bitOffset>5</bitOffset>
  27437. <bitWidth>1</bitWidth>
  27438. </field>
  27439. <field> <name>FB6</name>
  27440. <description>Filter bits</description>
  27441. <bitOffset>6</bitOffset>
  27442. <bitWidth>1</bitWidth>
  27443. </field>
  27444. <field> <name>FB7</name>
  27445. <description>Filter bits</description>
  27446. <bitOffset>7</bitOffset>
  27447. <bitWidth>1</bitWidth>
  27448. </field>
  27449. <field> <name>FB8</name>
  27450. <description>Filter bits</description>
  27451. <bitOffset>8</bitOffset>
  27452. <bitWidth>1</bitWidth>
  27453. </field>
  27454. <field> <name>FB9</name>
  27455. <description>Filter bits</description>
  27456. <bitOffset>9</bitOffset>
  27457. <bitWidth>1</bitWidth>
  27458. </field>
  27459. <field> <name>FB10</name>
  27460. <description>Filter bits</description>
  27461. <bitOffset>10</bitOffset>
  27462. <bitWidth>1</bitWidth>
  27463. </field>
  27464. <field> <name>FB11</name>
  27465. <description>Filter bits</description>
  27466. <bitOffset>11</bitOffset>
  27467. <bitWidth>1</bitWidth>
  27468. </field>
  27469. <field> <name>FB12</name>
  27470. <description>Filter bits</description>
  27471. <bitOffset>12</bitOffset>
  27472. <bitWidth>1</bitWidth>
  27473. </field>
  27474. <field> <name>FB13</name>
  27475. <description>Filter bits</description>
  27476. <bitOffset>13</bitOffset>
  27477. <bitWidth>1</bitWidth>
  27478. </field>
  27479. <field> <name>FB14</name>
  27480. <description>Filter bits</description>
  27481. <bitOffset>14</bitOffset>
  27482. <bitWidth>1</bitWidth>
  27483. </field>
  27484. <field> <name>FB15</name>
  27485. <description>Filter bits</description>
  27486. <bitOffset>15</bitOffset>
  27487. <bitWidth>1</bitWidth>
  27488. </field>
  27489. <field> <name>FB16</name>
  27490. <description>Filter bits</description>
  27491. <bitOffset>16</bitOffset>
  27492. <bitWidth>1</bitWidth>
  27493. </field>
  27494. <field> <name>FB17</name>
  27495. <description>Filter bits</description>
  27496. <bitOffset>17</bitOffset>
  27497. <bitWidth>1</bitWidth>
  27498. </field>
  27499. <field> <name>FB18</name>
  27500. <description>Filter bits</description>
  27501. <bitOffset>18</bitOffset>
  27502. <bitWidth>1</bitWidth>
  27503. </field>
  27504. <field> <name>FB19</name>
  27505. <description>Filter bits</description>
  27506. <bitOffset>19</bitOffset>
  27507. <bitWidth>1</bitWidth>
  27508. </field>
  27509. <field> <name>FB20</name>
  27510. <description>Filter bits</description>
  27511. <bitOffset>20</bitOffset>
  27512. <bitWidth>1</bitWidth>
  27513. </field>
  27514. <field> <name>FB21</name>
  27515. <description>Filter bits</description>
  27516. <bitOffset>21</bitOffset>
  27517. <bitWidth>1</bitWidth>
  27518. </field>
  27519. <field> <name>FB22</name>
  27520. <description>Filter bits</description>
  27521. <bitOffset>22</bitOffset>
  27522. <bitWidth>1</bitWidth>
  27523. </field>
  27524. <field> <name>FB23</name>
  27525. <description>Filter bits</description>
  27526. <bitOffset>23</bitOffset>
  27527. <bitWidth>1</bitWidth>
  27528. </field>
  27529. <field> <name>FB24</name>
  27530. <description>Filter bits</description>
  27531. <bitOffset>24</bitOffset>
  27532. <bitWidth>1</bitWidth>
  27533. </field>
  27534. <field> <name>FB25</name>
  27535. <description>Filter bits</description>
  27536. <bitOffset>25</bitOffset>
  27537. <bitWidth>1</bitWidth>
  27538. </field>
  27539. <field> <name>FB26</name>
  27540. <description>Filter bits</description>
  27541. <bitOffset>26</bitOffset>
  27542. <bitWidth>1</bitWidth>
  27543. </field>
  27544. <field> <name>FB27</name>
  27545. <description>Filter bits</description>
  27546. <bitOffset>27</bitOffset>
  27547. <bitWidth>1</bitWidth>
  27548. </field>
  27549. <field> <name>FB28</name>
  27550. <description>Filter bits</description>
  27551. <bitOffset>28</bitOffset>
  27552. <bitWidth>1</bitWidth>
  27553. </field>
  27554. <field> <name>FB29</name>
  27555. <description>Filter bits</description>
  27556. <bitOffset>29</bitOffset>
  27557. <bitWidth>1</bitWidth>
  27558. </field>
  27559. <field> <name>FB30</name>
  27560. <description>Filter bits</description>
  27561. <bitOffset>30</bitOffset>
  27562. <bitWidth>1</bitWidth>
  27563. </field>
  27564. <field> <name>FB31</name>
  27565. <description>Filter bits</description>
  27566. <bitOffset>31</bitOffset>
  27567. <bitWidth>1</bitWidth>
  27568. </field>
  27569. </fields>
  27570. </register>
  27571. <register> <name>F2R1</name>
  27572. <displayName>F2R1</displayName>
  27573. <description>Filter bank 2 register 1</description>
  27574. <addressOffset>0x250</addressOffset>
  27575. <size>0x20</size>
  27576. <access>read-write</access>
  27577. <resetValue>0x00000000</resetValue>
  27578. <fields>
  27579. <field> <name>FB0</name>
  27580. <description>Filter bits</description>
  27581. <bitOffset>0</bitOffset>
  27582. <bitWidth>1</bitWidth>
  27583. </field>
  27584. <field> <name>FB1</name>
  27585. <description>Filter bits</description>
  27586. <bitOffset>1</bitOffset>
  27587. <bitWidth>1</bitWidth>
  27588. </field>
  27589. <field> <name>FB2</name>
  27590. <description>Filter bits</description>
  27591. <bitOffset>2</bitOffset>
  27592. <bitWidth>1</bitWidth>
  27593. </field>
  27594. <field> <name>FB3</name>
  27595. <description>Filter bits</description>
  27596. <bitOffset>3</bitOffset>
  27597. <bitWidth>1</bitWidth>
  27598. </field>
  27599. <field> <name>FB4</name>
  27600. <description>Filter bits</description>
  27601. <bitOffset>4</bitOffset>
  27602. <bitWidth>1</bitWidth>
  27603. </field>
  27604. <field> <name>FB5</name>
  27605. <description>Filter bits</description>
  27606. <bitOffset>5</bitOffset>
  27607. <bitWidth>1</bitWidth>
  27608. </field>
  27609. <field> <name>FB6</name>
  27610. <description>Filter bits</description>
  27611. <bitOffset>6</bitOffset>
  27612. <bitWidth>1</bitWidth>
  27613. </field>
  27614. <field> <name>FB7</name>
  27615. <description>Filter bits</description>
  27616. <bitOffset>7</bitOffset>
  27617. <bitWidth>1</bitWidth>
  27618. </field>
  27619. <field> <name>FB8</name>
  27620. <description>Filter bits</description>
  27621. <bitOffset>8</bitOffset>
  27622. <bitWidth>1</bitWidth>
  27623. </field>
  27624. <field> <name>FB9</name>
  27625. <description>Filter bits</description>
  27626. <bitOffset>9</bitOffset>
  27627. <bitWidth>1</bitWidth>
  27628. </field>
  27629. <field> <name>FB10</name>
  27630. <description>Filter bits</description>
  27631. <bitOffset>10</bitOffset>
  27632. <bitWidth>1</bitWidth>
  27633. </field>
  27634. <field> <name>FB11</name>
  27635. <description>Filter bits</description>
  27636. <bitOffset>11</bitOffset>
  27637. <bitWidth>1</bitWidth>
  27638. </field>
  27639. <field> <name>FB12</name>
  27640. <description>Filter bits</description>
  27641. <bitOffset>12</bitOffset>
  27642. <bitWidth>1</bitWidth>
  27643. </field>
  27644. <field> <name>FB13</name>
  27645. <description>Filter bits</description>
  27646. <bitOffset>13</bitOffset>
  27647. <bitWidth>1</bitWidth>
  27648. </field>
  27649. <field> <name>FB14</name>
  27650. <description>Filter bits</description>
  27651. <bitOffset>14</bitOffset>
  27652. <bitWidth>1</bitWidth>
  27653. </field>
  27654. <field> <name>FB15</name>
  27655. <description>Filter bits</description>
  27656. <bitOffset>15</bitOffset>
  27657. <bitWidth>1</bitWidth>
  27658. </field>
  27659. <field> <name>FB16</name>
  27660. <description>Filter bits</description>
  27661. <bitOffset>16</bitOffset>
  27662. <bitWidth>1</bitWidth>
  27663. </field>
  27664. <field> <name>FB17</name>
  27665. <description>Filter bits</description>
  27666. <bitOffset>17</bitOffset>
  27667. <bitWidth>1</bitWidth>
  27668. </field>
  27669. <field> <name>FB18</name>
  27670. <description>Filter bits</description>
  27671. <bitOffset>18</bitOffset>
  27672. <bitWidth>1</bitWidth>
  27673. </field>
  27674. <field> <name>FB19</name>
  27675. <description>Filter bits</description>
  27676. <bitOffset>19</bitOffset>
  27677. <bitWidth>1</bitWidth>
  27678. </field>
  27679. <field> <name>FB20</name>
  27680. <description>Filter bits</description>
  27681. <bitOffset>20</bitOffset>
  27682. <bitWidth>1</bitWidth>
  27683. </field>
  27684. <field> <name>FB21</name>
  27685. <description>Filter bits</description>
  27686. <bitOffset>21</bitOffset>
  27687. <bitWidth>1</bitWidth>
  27688. </field>
  27689. <field> <name>FB22</name>
  27690. <description>Filter bits</description>
  27691. <bitOffset>22</bitOffset>
  27692. <bitWidth>1</bitWidth>
  27693. </field>
  27694. <field> <name>FB23</name>
  27695. <description>Filter bits</description>
  27696. <bitOffset>23</bitOffset>
  27697. <bitWidth>1</bitWidth>
  27698. </field>
  27699. <field> <name>FB24</name>
  27700. <description>Filter bits</description>
  27701. <bitOffset>24</bitOffset>
  27702. <bitWidth>1</bitWidth>
  27703. </field>
  27704. <field> <name>FB25</name>
  27705. <description>Filter bits</description>
  27706. <bitOffset>25</bitOffset>
  27707. <bitWidth>1</bitWidth>
  27708. </field>
  27709. <field> <name>FB26</name>
  27710. <description>Filter bits</description>
  27711. <bitOffset>26</bitOffset>
  27712. <bitWidth>1</bitWidth>
  27713. </field>
  27714. <field> <name>FB27</name>
  27715. <description>Filter bits</description>
  27716. <bitOffset>27</bitOffset>
  27717. <bitWidth>1</bitWidth>
  27718. </field>
  27719. <field> <name>FB28</name>
  27720. <description>Filter bits</description>
  27721. <bitOffset>28</bitOffset>
  27722. <bitWidth>1</bitWidth>
  27723. </field>
  27724. <field> <name>FB29</name>
  27725. <description>Filter bits</description>
  27726. <bitOffset>29</bitOffset>
  27727. <bitWidth>1</bitWidth>
  27728. </field>
  27729. <field> <name>FB30</name>
  27730. <description>Filter bits</description>
  27731. <bitOffset>30</bitOffset>
  27732. <bitWidth>1</bitWidth>
  27733. </field>
  27734. <field> <name>FB31</name>
  27735. <description>Filter bits</description>
  27736. <bitOffset>31</bitOffset>
  27737. <bitWidth>1</bitWidth>
  27738. </field>
  27739. </fields>
  27740. </register>
  27741. <register> <name>F2R2</name>
  27742. <displayName>F2R2</displayName>
  27743. <description>Filter bank 2 register 2</description>
  27744. <addressOffset>0x254</addressOffset>
  27745. <size>0x20</size>
  27746. <access>read-write</access>
  27747. <resetValue>0x00000000</resetValue>
  27748. <fields>
  27749. <field> <name>FB0</name>
  27750. <description>Filter bits</description>
  27751. <bitOffset>0</bitOffset>
  27752. <bitWidth>1</bitWidth>
  27753. </field>
  27754. <field> <name>FB1</name>
  27755. <description>Filter bits</description>
  27756. <bitOffset>1</bitOffset>
  27757. <bitWidth>1</bitWidth>
  27758. </field>
  27759. <field> <name>FB2</name>
  27760. <description>Filter bits</description>
  27761. <bitOffset>2</bitOffset>
  27762. <bitWidth>1</bitWidth>
  27763. </field>
  27764. <field> <name>FB3</name>
  27765. <description>Filter bits</description>
  27766. <bitOffset>3</bitOffset>
  27767. <bitWidth>1</bitWidth>
  27768. </field>
  27769. <field> <name>FB4</name>
  27770. <description>Filter bits</description>
  27771. <bitOffset>4</bitOffset>
  27772. <bitWidth>1</bitWidth>
  27773. </field>
  27774. <field> <name>FB5</name>
  27775. <description>Filter bits</description>
  27776. <bitOffset>5</bitOffset>
  27777. <bitWidth>1</bitWidth>
  27778. </field>
  27779. <field> <name>FB6</name>
  27780. <description>Filter bits</description>
  27781. <bitOffset>6</bitOffset>
  27782. <bitWidth>1</bitWidth>
  27783. </field>
  27784. <field> <name>FB7</name>
  27785. <description>Filter bits</description>
  27786. <bitOffset>7</bitOffset>
  27787. <bitWidth>1</bitWidth>
  27788. </field>
  27789. <field> <name>FB8</name>
  27790. <description>Filter bits</description>
  27791. <bitOffset>8</bitOffset>
  27792. <bitWidth>1</bitWidth>
  27793. </field>
  27794. <field> <name>FB9</name>
  27795. <description>Filter bits</description>
  27796. <bitOffset>9</bitOffset>
  27797. <bitWidth>1</bitWidth>
  27798. </field>
  27799. <field> <name>FB10</name>
  27800. <description>Filter bits</description>
  27801. <bitOffset>10</bitOffset>
  27802. <bitWidth>1</bitWidth>
  27803. </field>
  27804. <field> <name>FB11</name>
  27805. <description>Filter bits</description>
  27806. <bitOffset>11</bitOffset>
  27807. <bitWidth>1</bitWidth>
  27808. </field>
  27809. <field> <name>FB12</name>
  27810. <description>Filter bits</description>
  27811. <bitOffset>12</bitOffset>
  27812. <bitWidth>1</bitWidth>
  27813. </field>
  27814. <field> <name>FB13</name>
  27815. <description>Filter bits</description>
  27816. <bitOffset>13</bitOffset>
  27817. <bitWidth>1</bitWidth>
  27818. </field>
  27819. <field> <name>FB14</name>
  27820. <description>Filter bits</description>
  27821. <bitOffset>14</bitOffset>
  27822. <bitWidth>1</bitWidth>
  27823. </field>
  27824. <field> <name>FB15</name>
  27825. <description>Filter bits</description>
  27826. <bitOffset>15</bitOffset>
  27827. <bitWidth>1</bitWidth>
  27828. </field>
  27829. <field> <name>FB16</name>
  27830. <description>Filter bits</description>
  27831. <bitOffset>16</bitOffset>
  27832. <bitWidth>1</bitWidth>
  27833. </field>
  27834. <field> <name>FB17</name>
  27835. <description>Filter bits</description>
  27836. <bitOffset>17</bitOffset>
  27837. <bitWidth>1</bitWidth>
  27838. </field>
  27839. <field> <name>FB18</name>
  27840. <description>Filter bits</description>
  27841. <bitOffset>18</bitOffset>
  27842. <bitWidth>1</bitWidth>
  27843. </field>
  27844. <field> <name>FB19</name>
  27845. <description>Filter bits</description>
  27846. <bitOffset>19</bitOffset>
  27847. <bitWidth>1</bitWidth>
  27848. </field>
  27849. <field> <name>FB20</name>
  27850. <description>Filter bits</description>
  27851. <bitOffset>20</bitOffset>
  27852. <bitWidth>1</bitWidth>
  27853. </field>
  27854. <field> <name>FB21</name>
  27855. <description>Filter bits</description>
  27856. <bitOffset>21</bitOffset>
  27857. <bitWidth>1</bitWidth>
  27858. </field>
  27859. <field> <name>FB22</name>
  27860. <description>Filter bits</description>
  27861. <bitOffset>22</bitOffset>
  27862. <bitWidth>1</bitWidth>
  27863. </field>
  27864. <field> <name>FB23</name>
  27865. <description>Filter bits</description>
  27866. <bitOffset>23</bitOffset>
  27867. <bitWidth>1</bitWidth>
  27868. </field>
  27869. <field> <name>FB24</name>
  27870. <description>Filter bits</description>
  27871. <bitOffset>24</bitOffset>
  27872. <bitWidth>1</bitWidth>
  27873. </field>
  27874. <field> <name>FB25</name>
  27875. <description>Filter bits</description>
  27876. <bitOffset>25</bitOffset>
  27877. <bitWidth>1</bitWidth>
  27878. </field>
  27879. <field> <name>FB26</name>
  27880. <description>Filter bits</description>
  27881. <bitOffset>26</bitOffset>
  27882. <bitWidth>1</bitWidth>
  27883. </field>
  27884. <field> <name>FB27</name>
  27885. <description>Filter bits</description>
  27886. <bitOffset>27</bitOffset>
  27887. <bitWidth>1</bitWidth>
  27888. </field>
  27889. <field> <name>FB28</name>
  27890. <description>Filter bits</description>
  27891. <bitOffset>28</bitOffset>
  27892. <bitWidth>1</bitWidth>
  27893. </field>
  27894. <field> <name>FB29</name>
  27895. <description>Filter bits</description>
  27896. <bitOffset>29</bitOffset>
  27897. <bitWidth>1</bitWidth>
  27898. </field>
  27899. <field> <name>FB30</name>
  27900. <description>Filter bits</description>
  27901. <bitOffset>30</bitOffset>
  27902. <bitWidth>1</bitWidth>
  27903. </field>
  27904. <field> <name>FB31</name>
  27905. <description>Filter bits</description>
  27906. <bitOffset>31</bitOffset>
  27907. <bitWidth>1</bitWidth>
  27908. </field>
  27909. </fields>
  27910. </register>
  27911. <register> <name>F3R1</name>
  27912. <displayName>F3R1</displayName>
  27913. <description>Filter bank 3 register 1</description>
  27914. <addressOffset>0x258</addressOffset>
  27915. <size>0x20</size>
  27916. <access>read-write</access>
  27917. <resetValue>0x00000000</resetValue>
  27918. <fields>
  27919. <field> <name>FB0</name>
  27920. <description>Filter bits</description>
  27921. <bitOffset>0</bitOffset>
  27922. <bitWidth>1</bitWidth>
  27923. </field>
  27924. <field> <name>FB1</name>
  27925. <description>Filter bits</description>
  27926. <bitOffset>1</bitOffset>
  27927. <bitWidth>1</bitWidth>
  27928. </field>
  27929. <field> <name>FB2</name>
  27930. <description>Filter bits</description>
  27931. <bitOffset>2</bitOffset>
  27932. <bitWidth>1</bitWidth>
  27933. </field>
  27934. <field> <name>FB3</name>
  27935. <description>Filter bits</description>
  27936. <bitOffset>3</bitOffset>
  27937. <bitWidth>1</bitWidth>
  27938. </field>
  27939. <field> <name>FB4</name>
  27940. <description>Filter bits</description>
  27941. <bitOffset>4</bitOffset>
  27942. <bitWidth>1</bitWidth>
  27943. </field>
  27944. <field> <name>FB5</name>
  27945. <description>Filter bits</description>
  27946. <bitOffset>5</bitOffset>
  27947. <bitWidth>1</bitWidth>
  27948. </field>
  27949. <field> <name>FB6</name>
  27950. <description>Filter bits</description>
  27951. <bitOffset>6</bitOffset>
  27952. <bitWidth>1</bitWidth>
  27953. </field>
  27954. <field> <name>FB7</name>
  27955. <description>Filter bits</description>
  27956. <bitOffset>7</bitOffset>
  27957. <bitWidth>1</bitWidth>
  27958. </field>
  27959. <field> <name>FB8</name>
  27960. <description>Filter bits</description>
  27961. <bitOffset>8</bitOffset>
  27962. <bitWidth>1</bitWidth>
  27963. </field>
  27964. <field> <name>FB9</name>
  27965. <description>Filter bits</description>
  27966. <bitOffset>9</bitOffset>
  27967. <bitWidth>1</bitWidth>
  27968. </field>
  27969. <field> <name>FB10</name>
  27970. <description>Filter bits</description>
  27971. <bitOffset>10</bitOffset>
  27972. <bitWidth>1</bitWidth>
  27973. </field>
  27974. <field> <name>FB11</name>
  27975. <description>Filter bits</description>
  27976. <bitOffset>11</bitOffset>
  27977. <bitWidth>1</bitWidth>
  27978. </field>
  27979. <field> <name>FB12</name>
  27980. <description>Filter bits</description>
  27981. <bitOffset>12</bitOffset>
  27982. <bitWidth>1</bitWidth>
  27983. </field>
  27984. <field> <name>FB13</name>
  27985. <description>Filter bits</description>
  27986. <bitOffset>13</bitOffset>
  27987. <bitWidth>1</bitWidth>
  27988. </field>
  27989. <field> <name>FB14</name>
  27990. <description>Filter bits</description>
  27991. <bitOffset>14</bitOffset>
  27992. <bitWidth>1</bitWidth>
  27993. </field>
  27994. <field> <name>FB15</name>
  27995. <description>Filter bits</description>
  27996. <bitOffset>15</bitOffset>
  27997. <bitWidth>1</bitWidth>
  27998. </field>
  27999. <field> <name>FB16</name>
  28000. <description>Filter bits</description>
  28001. <bitOffset>16</bitOffset>
  28002. <bitWidth>1</bitWidth>
  28003. </field>
  28004. <field> <name>FB17</name>
  28005. <description>Filter bits</description>
  28006. <bitOffset>17</bitOffset>
  28007. <bitWidth>1</bitWidth>
  28008. </field>
  28009. <field> <name>FB18</name>
  28010. <description>Filter bits</description>
  28011. <bitOffset>18</bitOffset>
  28012. <bitWidth>1</bitWidth>
  28013. </field>
  28014. <field> <name>FB19</name>
  28015. <description>Filter bits</description>
  28016. <bitOffset>19</bitOffset>
  28017. <bitWidth>1</bitWidth>
  28018. </field>
  28019. <field> <name>FB20</name>
  28020. <description>Filter bits</description>
  28021. <bitOffset>20</bitOffset>
  28022. <bitWidth>1</bitWidth>
  28023. </field>
  28024. <field> <name>FB21</name>
  28025. <description>Filter bits</description>
  28026. <bitOffset>21</bitOffset>
  28027. <bitWidth>1</bitWidth>
  28028. </field>
  28029. <field> <name>FB22</name>
  28030. <description>Filter bits</description>
  28031. <bitOffset>22</bitOffset>
  28032. <bitWidth>1</bitWidth>
  28033. </field>
  28034. <field> <name>FB23</name>
  28035. <description>Filter bits</description>
  28036. <bitOffset>23</bitOffset>
  28037. <bitWidth>1</bitWidth>
  28038. </field>
  28039. <field> <name>FB24</name>
  28040. <description>Filter bits</description>
  28041. <bitOffset>24</bitOffset>
  28042. <bitWidth>1</bitWidth>
  28043. </field>
  28044. <field> <name>FB25</name>
  28045. <description>Filter bits</description>
  28046. <bitOffset>25</bitOffset>
  28047. <bitWidth>1</bitWidth>
  28048. </field>
  28049. <field> <name>FB26</name>
  28050. <description>Filter bits</description>
  28051. <bitOffset>26</bitOffset>
  28052. <bitWidth>1</bitWidth>
  28053. </field>
  28054. <field> <name>FB27</name>
  28055. <description>Filter bits</description>
  28056. <bitOffset>27</bitOffset>
  28057. <bitWidth>1</bitWidth>
  28058. </field>
  28059. <field> <name>FB28</name>
  28060. <description>Filter bits</description>
  28061. <bitOffset>28</bitOffset>
  28062. <bitWidth>1</bitWidth>
  28063. </field>
  28064. <field> <name>FB29</name>
  28065. <description>Filter bits</description>
  28066. <bitOffset>29</bitOffset>
  28067. <bitWidth>1</bitWidth>
  28068. </field>
  28069. <field> <name>FB30</name>
  28070. <description>Filter bits</description>
  28071. <bitOffset>30</bitOffset>
  28072. <bitWidth>1</bitWidth>
  28073. </field>
  28074. <field> <name>FB31</name>
  28075. <description>Filter bits</description>
  28076. <bitOffset>31</bitOffset>
  28077. <bitWidth>1</bitWidth>
  28078. </field>
  28079. </fields>
  28080. </register>
  28081. <register> <name>F3R2</name>
  28082. <displayName>F3R2</displayName>
  28083. <description>Filter bank 3 register 2</description>
  28084. <addressOffset>0x25C</addressOffset>
  28085. <size>0x20</size>
  28086. <access>read-write</access>
  28087. <resetValue>0x00000000</resetValue>
  28088. <fields>
  28089. <field> <name>FB0</name>
  28090. <description>Filter bits</description>
  28091. <bitOffset>0</bitOffset>
  28092. <bitWidth>1</bitWidth>
  28093. </field>
  28094. <field> <name>FB1</name>
  28095. <description>Filter bits</description>
  28096. <bitOffset>1</bitOffset>
  28097. <bitWidth>1</bitWidth>
  28098. </field>
  28099. <field> <name>FB2</name>
  28100. <description>Filter bits</description>
  28101. <bitOffset>2</bitOffset>
  28102. <bitWidth>1</bitWidth>
  28103. </field>
  28104. <field> <name>FB3</name>
  28105. <description>Filter bits</description>
  28106. <bitOffset>3</bitOffset>
  28107. <bitWidth>1</bitWidth>
  28108. </field>
  28109. <field> <name>FB4</name>
  28110. <description>Filter bits</description>
  28111. <bitOffset>4</bitOffset>
  28112. <bitWidth>1</bitWidth>
  28113. </field>
  28114. <field> <name>FB5</name>
  28115. <description>Filter bits</description>
  28116. <bitOffset>5</bitOffset>
  28117. <bitWidth>1</bitWidth>
  28118. </field>
  28119. <field> <name>FB6</name>
  28120. <description>Filter bits</description>
  28121. <bitOffset>6</bitOffset>
  28122. <bitWidth>1</bitWidth>
  28123. </field>
  28124. <field> <name>FB7</name>
  28125. <description>Filter bits</description>
  28126. <bitOffset>7</bitOffset>
  28127. <bitWidth>1</bitWidth>
  28128. </field>
  28129. <field> <name>FB8</name>
  28130. <description>Filter bits</description>
  28131. <bitOffset>8</bitOffset>
  28132. <bitWidth>1</bitWidth>
  28133. </field>
  28134. <field> <name>FB9</name>
  28135. <description>Filter bits</description>
  28136. <bitOffset>9</bitOffset>
  28137. <bitWidth>1</bitWidth>
  28138. </field>
  28139. <field> <name>FB10</name>
  28140. <description>Filter bits</description>
  28141. <bitOffset>10</bitOffset>
  28142. <bitWidth>1</bitWidth>
  28143. </field>
  28144. <field> <name>FB11</name>
  28145. <description>Filter bits</description>
  28146. <bitOffset>11</bitOffset>
  28147. <bitWidth>1</bitWidth>
  28148. </field>
  28149. <field> <name>FB12</name>
  28150. <description>Filter bits</description>
  28151. <bitOffset>12</bitOffset>
  28152. <bitWidth>1</bitWidth>
  28153. </field>
  28154. <field> <name>FB13</name>
  28155. <description>Filter bits</description>
  28156. <bitOffset>13</bitOffset>
  28157. <bitWidth>1</bitWidth>
  28158. </field>
  28159. <field> <name>FB14</name>
  28160. <description>Filter bits</description>
  28161. <bitOffset>14</bitOffset>
  28162. <bitWidth>1</bitWidth>
  28163. </field>
  28164. <field> <name>FB15</name>
  28165. <description>Filter bits</description>
  28166. <bitOffset>15</bitOffset>
  28167. <bitWidth>1</bitWidth>
  28168. </field>
  28169. <field> <name>FB16</name>
  28170. <description>Filter bits</description>
  28171. <bitOffset>16</bitOffset>
  28172. <bitWidth>1</bitWidth>
  28173. </field>
  28174. <field> <name>FB17</name>
  28175. <description>Filter bits</description>
  28176. <bitOffset>17</bitOffset>
  28177. <bitWidth>1</bitWidth>
  28178. </field>
  28179. <field> <name>FB18</name>
  28180. <description>Filter bits</description>
  28181. <bitOffset>18</bitOffset>
  28182. <bitWidth>1</bitWidth>
  28183. </field>
  28184. <field> <name>FB19</name>
  28185. <description>Filter bits</description>
  28186. <bitOffset>19</bitOffset>
  28187. <bitWidth>1</bitWidth>
  28188. </field>
  28189. <field> <name>FB20</name>
  28190. <description>Filter bits</description>
  28191. <bitOffset>20</bitOffset>
  28192. <bitWidth>1</bitWidth>
  28193. </field>
  28194. <field> <name>FB21</name>
  28195. <description>Filter bits</description>
  28196. <bitOffset>21</bitOffset>
  28197. <bitWidth>1</bitWidth>
  28198. </field>
  28199. <field> <name>FB22</name>
  28200. <description>Filter bits</description>
  28201. <bitOffset>22</bitOffset>
  28202. <bitWidth>1</bitWidth>
  28203. </field>
  28204. <field> <name>FB23</name>
  28205. <description>Filter bits</description>
  28206. <bitOffset>23</bitOffset>
  28207. <bitWidth>1</bitWidth>
  28208. </field>
  28209. <field> <name>FB24</name>
  28210. <description>Filter bits</description>
  28211. <bitOffset>24</bitOffset>
  28212. <bitWidth>1</bitWidth>
  28213. </field>
  28214. <field> <name>FB25</name>
  28215. <description>Filter bits</description>
  28216. <bitOffset>25</bitOffset>
  28217. <bitWidth>1</bitWidth>
  28218. </field>
  28219. <field> <name>FB26</name>
  28220. <description>Filter bits</description>
  28221. <bitOffset>26</bitOffset>
  28222. <bitWidth>1</bitWidth>
  28223. </field>
  28224. <field> <name>FB27</name>
  28225. <description>Filter bits</description>
  28226. <bitOffset>27</bitOffset>
  28227. <bitWidth>1</bitWidth>
  28228. </field>
  28229. <field> <name>FB28</name>
  28230. <description>Filter bits</description>
  28231. <bitOffset>28</bitOffset>
  28232. <bitWidth>1</bitWidth>
  28233. </field>
  28234. <field> <name>FB29</name>
  28235. <description>Filter bits</description>
  28236. <bitOffset>29</bitOffset>
  28237. <bitWidth>1</bitWidth>
  28238. </field>
  28239. <field> <name>FB30</name>
  28240. <description>Filter bits</description>
  28241. <bitOffset>30</bitOffset>
  28242. <bitWidth>1</bitWidth>
  28243. </field>
  28244. <field> <name>FB31</name>
  28245. <description>Filter bits</description>
  28246. <bitOffset>31</bitOffset>
  28247. <bitWidth>1</bitWidth>
  28248. </field>
  28249. </fields>
  28250. </register>
  28251. <register> <name>F4R1</name>
  28252. <displayName>F4R1</displayName>
  28253. <description>Filter bank 4 register 1</description>
  28254. <addressOffset>0x260</addressOffset>
  28255. <size>0x20</size>
  28256. <access>read-write</access>
  28257. <resetValue>0x00000000</resetValue>
  28258. <fields>
  28259. <field> <name>FB0</name>
  28260. <description>Filter bits</description>
  28261. <bitOffset>0</bitOffset>
  28262. <bitWidth>1</bitWidth>
  28263. </field>
  28264. <field> <name>FB1</name>
  28265. <description>Filter bits</description>
  28266. <bitOffset>1</bitOffset>
  28267. <bitWidth>1</bitWidth>
  28268. </field>
  28269. <field> <name>FB2</name>
  28270. <description>Filter bits</description>
  28271. <bitOffset>2</bitOffset>
  28272. <bitWidth>1</bitWidth>
  28273. </field>
  28274. <field> <name>FB3</name>
  28275. <description>Filter bits</description>
  28276. <bitOffset>3</bitOffset>
  28277. <bitWidth>1</bitWidth>
  28278. </field>
  28279. <field> <name>FB4</name>
  28280. <description>Filter bits</description>
  28281. <bitOffset>4</bitOffset>
  28282. <bitWidth>1</bitWidth>
  28283. </field>
  28284. <field> <name>FB5</name>
  28285. <description>Filter bits</description>
  28286. <bitOffset>5</bitOffset>
  28287. <bitWidth>1</bitWidth>
  28288. </field>
  28289. <field> <name>FB6</name>
  28290. <description>Filter bits</description>
  28291. <bitOffset>6</bitOffset>
  28292. <bitWidth>1</bitWidth>
  28293. </field>
  28294. <field> <name>FB7</name>
  28295. <description>Filter bits</description>
  28296. <bitOffset>7</bitOffset>
  28297. <bitWidth>1</bitWidth>
  28298. </field>
  28299. <field> <name>FB8</name>
  28300. <description>Filter bits</description>
  28301. <bitOffset>8</bitOffset>
  28302. <bitWidth>1</bitWidth>
  28303. </field>
  28304. <field> <name>FB9</name>
  28305. <description>Filter bits</description>
  28306. <bitOffset>9</bitOffset>
  28307. <bitWidth>1</bitWidth>
  28308. </field>
  28309. <field> <name>FB10</name>
  28310. <description>Filter bits</description>
  28311. <bitOffset>10</bitOffset>
  28312. <bitWidth>1</bitWidth>
  28313. </field>
  28314. <field> <name>FB11</name>
  28315. <description>Filter bits</description>
  28316. <bitOffset>11</bitOffset>
  28317. <bitWidth>1</bitWidth>
  28318. </field>
  28319. <field> <name>FB12</name>
  28320. <description>Filter bits</description>
  28321. <bitOffset>12</bitOffset>
  28322. <bitWidth>1</bitWidth>
  28323. </field>
  28324. <field> <name>FB13</name>
  28325. <description>Filter bits</description>
  28326. <bitOffset>13</bitOffset>
  28327. <bitWidth>1</bitWidth>
  28328. </field>
  28329. <field> <name>FB14</name>
  28330. <description>Filter bits</description>
  28331. <bitOffset>14</bitOffset>
  28332. <bitWidth>1</bitWidth>
  28333. </field>
  28334. <field> <name>FB15</name>
  28335. <description>Filter bits</description>
  28336. <bitOffset>15</bitOffset>
  28337. <bitWidth>1</bitWidth>
  28338. </field>
  28339. <field> <name>FB16</name>
  28340. <description>Filter bits</description>
  28341. <bitOffset>16</bitOffset>
  28342. <bitWidth>1</bitWidth>
  28343. </field>
  28344. <field> <name>FB17</name>
  28345. <description>Filter bits</description>
  28346. <bitOffset>17</bitOffset>
  28347. <bitWidth>1</bitWidth>
  28348. </field>
  28349. <field> <name>FB18</name>
  28350. <description>Filter bits</description>
  28351. <bitOffset>18</bitOffset>
  28352. <bitWidth>1</bitWidth>
  28353. </field>
  28354. <field> <name>FB19</name>
  28355. <description>Filter bits</description>
  28356. <bitOffset>19</bitOffset>
  28357. <bitWidth>1</bitWidth>
  28358. </field>
  28359. <field> <name>FB20</name>
  28360. <description>Filter bits</description>
  28361. <bitOffset>20</bitOffset>
  28362. <bitWidth>1</bitWidth>
  28363. </field>
  28364. <field> <name>FB21</name>
  28365. <description>Filter bits</description>
  28366. <bitOffset>21</bitOffset>
  28367. <bitWidth>1</bitWidth>
  28368. </field>
  28369. <field> <name>FB22</name>
  28370. <description>Filter bits</description>
  28371. <bitOffset>22</bitOffset>
  28372. <bitWidth>1</bitWidth>
  28373. </field>
  28374. <field> <name>FB23</name>
  28375. <description>Filter bits</description>
  28376. <bitOffset>23</bitOffset>
  28377. <bitWidth>1</bitWidth>
  28378. </field>
  28379. <field> <name>FB24</name>
  28380. <description>Filter bits</description>
  28381. <bitOffset>24</bitOffset>
  28382. <bitWidth>1</bitWidth>
  28383. </field>
  28384. <field> <name>FB25</name>
  28385. <description>Filter bits</description>
  28386. <bitOffset>25</bitOffset>
  28387. <bitWidth>1</bitWidth>
  28388. </field>
  28389. <field> <name>FB26</name>
  28390. <description>Filter bits</description>
  28391. <bitOffset>26</bitOffset>
  28392. <bitWidth>1</bitWidth>
  28393. </field>
  28394. <field> <name>FB27</name>
  28395. <description>Filter bits</description>
  28396. <bitOffset>27</bitOffset>
  28397. <bitWidth>1</bitWidth>
  28398. </field>
  28399. <field> <name>FB28</name>
  28400. <description>Filter bits</description>
  28401. <bitOffset>28</bitOffset>
  28402. <bitWidth>1</bitWidth>
  28403. </field>
  28404. <field> <name>FB29</name>
  28405. <description>Filter bits</description>
  28406. <bitOffset>29</bitOffset>
  28407. <bitWidth>1</bitWidth>
  28408. </field>
  28409. <field> <name>FB30</name>
  28410. <description>Filter bits</description>
  28411. <bitOffset>30</bitOffset>
  28412. <bitWidth>1</bitWidth>
  28413. </field>
  28414. <field> <name>FB31</name>
  28415. <description>Filter bits</description>
  28416. <bitOffset>31</bitOffset>
  28417. <bitWidth>1</bitWidth>
  28418. </field>
  28419. </fields>
  28420. </register>
  28421. <register> <name>F4R2</name>
  28422. <displayName>F4R2</displayName>
  28423. <description>Filter bank 4 register 2</description>
  28424. <addressOffset>0x264</addressOffset>
  28425. <size>0x20</size>
  28426. <access>read-write</access>
  28427. <resetValue>0x00000000</resetValue>
  28428. <fields>
  28429. <field> <name>FB0</name>
  28430. <description>Filter bits</description>
  28431. <bitOffset>0</bitOffset>
  28432. <bitWidth>1</bitWidth>
  28433. </field>
  28434. <field> <name>FB1</name>
  28435. <description>Filter bits</description>
  28436. <bitOffset>1</bitOffset>
  28437. <bitWidth>1</bitWidth>
  28438. </field>
  28439. <field> <name>FB2</name>
  28440. <description>Filter bits</description>
  28441. <bitOffset>2</bitOffset>
  28442. <bitWidth>1</bitWidth>
  28443. </field>
  28444. <field> <name>FB3</name>
  28445. <description>Filter bits</description>
  28446. <bitOffset>3</bitOffset>
  28447. <bitWidth>1</bitWidth>
  28448. </field>
  28449. <field> <name>FB4</name>
  28450. <description>Filter bits</description>
  28451. <bitOffset>4</bitOffset>
  28452. <bitWidth>1</bitWidth>
  28453. </field>
  28454. <field> <name>FB5</name>
  28455. <description>Filter bits</description>
  28456. <bitOffset>5</bitOffset>
  28457. <bitWidth>1</bitWidth>
  28458. </field>
  28459. <field> <name>FB6</name>
  28460. <description>Filter bits</description>
  28461. <bitOffset>6</bitOffset>
  28462. <bitWidth>1</bitWidth>
  28463. </field>
  28464. <field> <name>FB7</name>
  28465. <description>Filter bits</description>
  28466. <bitOffset>7</bitOffset>
  28467. <bitWidth>1</bitWidth>
  28468. </field>
  28469. <field> <name>FB8</name>
  28470. <description>Filter bits</description>
  28471. <bitOffset>8</bitOffset>
  28472. <bitWidth>1</bitWidth>
  28473. </field>
  28474. <field> <name>FB9</name>
  28475. <description>Filter bits</description>
  28476. <bitOffset>9</bitOffset>
  28477. <bitWidth>1</bitWidth>
  28478. </field>
  28479. <field> <name>FB10</name>
  28480. <description>Filter bits</description>
  28481. <bitOffset>10</bitOffset>
  28482. <bitWidth>1</bitWidth>
  28483. </field>
  28484. <field> <name>FB11</name>
  28485. <description>Filter bits</description>
  28486. <bitOffset>11</bitOffset>
  28487. <bitWidth>1</bitWidth>
  28488. </field>
  28489. <field> <name>FB12</name>
  28490. <description>Filter bits</description>
  28491. <bitOffset>12</bitOffset>
  28492. <bitWidth>1</bitWidth>
  28493. </field>
  28494. <field> <name>FB13</name>
  28495. <description>Filter bits</description>
  28496. <bitOffset>13</bitOffset>
  28497. <bitWidth>1</bitWidth>
  28498. </field>
  28499. <field> <name>FB14</name>
  28500. <description>Filter bits</description>
  28501. <bitOffset>14</bitOffset>
  28502. <bitWidth>1</bitWidth>
  28503. </field>
  28504. <field> <name>FB15</name>
  28505. <description>Filter bits</description>
  28506. <bitOffset>15</bitOffset>
  28507. <bitWidth>1</bitWidth>
  28508. </field>
  28509. <field> <name>FB16</name>
  28510. <description>Filter bits</description>
  28511. <bitOffset>16</bitOffset>
  28512. <bitWidth>1</bitWidth>
  28513. </field>
  28514. <field> <name>FB17</name>
  28515. <description>Filter bits</description>
  28516. <bitOffset>17</bitOffset>
  28517. <bitWidth>1</bitWidth>
  28518. </field>
  28519. <field> <name>FB18</name>
  28520. <description>Filter bits</description>
  28521. <bitOffset>18</bitOffset>
  28522. <bitWidth>1</bitWidth>
  28523. </field>
  28524. <field> <name>FB19</name>
  28525. <description>Filter bits</description>
  28526. <bitOffset>19</bitOffset>
  28527. <bitWidth>1</bitWidth>
  28528. </field>
  28529. <field> <name>FB20</name>
  28530. <description>Filter bits</description>
  28531. <bitOffset>20</bitOffset>
  28532. <bitWidth>1</bitWidth>
  28533. </field>
  28534. <field> <name>FB21</name>
  28535. <description>Filter bits</description>
  28536. <bitOffset>21</bitOffset>
  28537. <bitWidth>1</bitWidth>
  28538. </field>
  28539. <field> <name>FB22</name>
  28540. <description>Filter bits</description>
  28541. <bitOffset>22</bitOffset>
  28542. <bitWidth>1</bitWidth>
  28543. </field>
  28544. <field> <name>FB23</name>
  28545. <description>Filter bits</description>
  28546. <bitOffset>23</bitOffset>
  28547. <bitWidth>1</bitWidth>
  28548. </field>
  28549. <field> <name>FB24</name>
  28550. <description>Filter bits</description>
  28551. <bitOffset>24</bitOffset>
  28552. <bitWidth>1</bitWidth>
  28553. </field>
  28554. <field> <name>FB25</name>
  28555. <description>Filter bits</description>
  28556. <bitOffset>25</bitOffset>
  28557. <bitWidth>1</bitWidth>
  28558. </field>
  28559. <field> <name>FB26</name>
  28560. <description>Filter bits</description>
  28561. <bitOffset>26</bitOffset>
  28562. <bitWidth>1</bitWidth>
  28563. </field>
  28564. <field> <name>FB27</name>
  28565. <description>Filter bits</description>
  28566. <bitOffset>27</bitOffset>
  28567. <bitWidth>1</bitWidth>
  28568. </field>
  28569. <field> <name>FB28</name>
  28570. <description>Filter bits</description>
  28571. <bitOffset>28</bitOffset>
  28572. <bitWidth>1</bitWidth>
  28573. </field>
  28574. <field> <name>FB29</name>
  28575. <description>Filter bits</description>
  28576. <bitOffset>29</bitOffset>
  28577. <bitWidth>1</bitWidth>
  28578. </field>
  28579. <field> <name>FB30</name>
  28580. <description>Filter bits</description>
  28581. <bitOffset>30</bitOffset>
  28582. <bitWidth>1</bitWidth>
  28583. </field>
  28584. <field> <name>FB31</name>
  28585. <description>Filter bits</description>
  28586. <bitOffset>31</bitOffset>
  28587. <bitWidth>1</bitWidth>
  28588. </field>
  28589. </fields>
  28590. </register>
  28591. <register> <name>F5R1</name>
  28592. <displayName>F5R1</displayName>
  28593. <description>Filter bank 5 register 1</description>
  28594. <addressOffset>0x268</addressOffset>
  28595. <size>0x20</size>
  28596. <access>read-write</access>
  28597. <resetValue>0x00000000</resetValue>
  28598. <fields>
  28599. <field> <name>FB0</name>
  28600. <description>Filter bits</description>
  28601. <bitOffset>0</bitOffset>
  28602. <bitWidth>1</bitWidth>
  28603. </field>
  28604. <field> <name>FB1</name>
  28605. <description>Filter bits</description>
  28606. <bitOffset>1</bitOffset>
  28607. <bitWidth>1</bitWidth>
  28608. </field>
  28609. <field> <name>FB2</name>
  28610. <description>Filter bits</description>
  28611. <bitOffset>2</bitOffset>
  28612. <bitWidth>1</bitWidth>
  28613. </field>
  28614. <field> <name>FB3</name>
  28615. <description>Filter bits</description>
  28616. <bitOffset>3</bitOffset>
  28617. <bitWidth>1</bitWidth>
  28618. </field>
  28619. <field> <name>FB4</name>
  28620. <description>Filter bits</description>
  28621. <bitOffset>4</bitOffset>
  28622. <bitWidth>1</bitWidth>
  28623. </field>
  28624. <field> <name>FB5</name>
  28625. <description>Filter bits</description>
  28626. <bitOffset>5</bitOffset>
  28627. <bitWidth>1</bitWidth>
  28628. </field>
  28629. <field> <name>FB6</name>
  28630. <description>Filter bits</description>
  28631. <bitOffset>6</bitOffset>
  28632. <bitWidth>1</bitWidth>
  28633. </field>
  28634. <field> <name>FB7</name>
  28635. <description>Filter bits</description>
  28636. <bitOffset>7</bitOffset>
  28637. <bitWidth>1</bitWidth>
  28638. </field>
  28639. <field> <name>FB8</name>
  28640. <description>Filter bits</description>
  28641. <bitOffset>8</bitOffset>
  28642. <bitWidth>1</bitWidth>
  28643. </field>
  28644. <field> <name>FB9</name>
  28645. <description>Filter bits</description>
  28646. <bitOffset>9</bitOffset>
  28647. <bitWidth>1</bitWidth>
  28648. </field>
  28649. <field> <name>FB10</name>
  28650. <description>Filter bits</description>
  28651. <bitOffset>10</bitOffset>
  28652. <bitWidth>1</bitWidth>
  28653. </field>
  28654. <field> <name>FB11</name>
  28655. <description>Filter bits</description>
  28656. <bitOffset>11</bitOffset>
  28657. <bitWidth>1</bitWidth>
  28658. </field>
  28659. <field> <name>FB12</name>
  28660. <description>Filter bits</description>
  28661. <bitOffset>12</bitOffset>
  28662. <bitWidth>1</bitWidth>
  28663. </field>
  28664. <field> <name>FB13</name>
  28665. <description>Filter bits</description>
  28666. <bitOffset>13</bitOffset>
  28667. <bitWidth>1</bitWidth>
  28668. </field>
  28669. <field> <name>FB14</name>
  28670. <description>Filter bits</description>
  28671. <bitOffset>14</bitOffset>
  28672. <bitWidth>1</bitWidth>
  28673. </field>
  28674. <field> <name>FB15</name>
  28675. <description>Filter bits</description>
  28676. <bitOffset>15</bitOffset>
  28677. <bitWidth>1</bitWidth>
  28678. </field>
  28679. <field> <name>FB16</name>
  28680. <description>Filter bits</description>
  28681. <bitOffset>16</bitOffset>
  28682. <bitWidth>1</bitWidth>
  28683. </field>
  28684. <field> <name>FB17</name>
  28685. <description>Filter bits</description>
  28686. <bitOffset>17</bitOffset>
  28687. <bitWidth>1</bitWidth>
  28688. </field>
  28689. <field> <name>FB18</name>
  28690. <description>Filter bits</description>
  28691. <bitOffset>18</bitOffset>
  28692. <bitWidth>1</bitWidth>
  28693. </field>
  28694. <field> <name>FB19</name>
  28695. <description>Filter bits</description>
  28696. <bitOffset>19</bitOffset>
  28697. <bitWidth>1</bitWidth>
  28698. </field>
  28699. <field> <name>FB20</name>
  28700. <description>Filter bits</description>
  28701. <bitOffset>20</bitOffset>
  28702. <bitWidth>1</bitWidth>
  28703. </field>
  28704. <field> <name>FB21</name>
  28705. <description>Filter bits</description>
  28706. <bitOffset>21</bitOffset>
  28707. <bitWidth>1</bitWidth>
  28708. </field>
  28709. <field> <name>FB22</name>
  28710. <description>Filter bits</description>
  28711. <bitOffset>22</bitOffset>
  28712. <bitWidth>1</bitWidth>
  28713. </field>
  28714. <field> <name>FB23</name>
  28715. <description>Filter bits</description>
  28716. <bitOffset>23</bitOffset>
  28717. <bitWidth>1</bitWidth>
  28718. </field>
  28719. <field> <name>FB24</name>
  28720. <description>Filter bits</description>
  28721. <bitOffset>24</bitOffset>
  28722. <bitWidth>1</bitWidth>
  28723. </field>
  28724. <field> <name>FB25</name>
  28725. <description>Filter bits</description>
  28726. <bitOffset>25</bitOffset>
  28727. <bitWidth>1</bitWidth>
  28728. </field>
  28729. <field> <name>FB26</name>
  28730. <description>Filter bits</description>
  28731. <bitOffset>26</bitOffset>
  28732. <bitWidth>1</bitWidth>
  28733. </field>
  28734. <field> <name>FB27</name>
  28735. <description>Filter bits</description>
  28736. <bitOffset>27</bitOffset>
  28737. <bitWidth>1</bitWidth>
  28738. </field>
  28739. <field> <name>FB28</name>
  28740. <description>Filter bits</description>
  28741. <bitOffset>28</bitOffset>
  28742. <bitWidth>1</bitWidth>
  28743. </field>
  28744. <field> <name>FB29</name>
  28745. <description>Filter bits</description>
  28746. <bitOffset>29</bitOffset>
  28747. <bitWidth>1</bitWidth>
  28748. </field>
  28749. <field> <name>FB30</name>
  28750. <description>Filter bits</description>
  28751. <bitOffset>30</bitOffset>
  28752. <bitWidth>1</bitWidth>
  28753. </field>
  28754. <field> <name>FB31</name>
  28755. <description>Filter bits</description>
  28756. <bitOffset>31</bitOffset>
  28757. <bitWidth>1</bitWidth>
  28758. </field>
  28759. </fields>
  28760. </register>
  28761. <register> <name>F5R2</name>
  28762. <displayName>F5R2</displayName>
  28763. <description>Filter bank 5 register 2</description>
  28764. <addressOffset>0x26C</addressOffset>
  28765. <size>0x20</size>
  28766. <access>read-write</access>
  28767. <resetValue>0x00000000</resetValue>
  28768. <fields>
  28769. <field> <name>FB0</name>
  28770. <description>Filter bits</description>
  28771. <bitOffset>0</bitOffset>
  28772. <bitWidth>1</bitWidth>
  28773. </field>
  28774. <field> <name>FB1</name>
  28775. <description>Filter bits</description>
  28776. <bitOffset>1</bitOffset>
  28777. <bitWidth>1</bitWidth>
  28778. </field>
  28779. <field> <name>FB2</name>
  28780. <description>Filter bits</description>
  28781. <bitOffset>2</bitOffset>
  28782. <bitWidth>1</bitWidth>
  28783. </field>
  28784. <field> <name>FB3</name>
  28785. <description>Filter bits</description>
  28786. <bitOffset>3</bitOffset>
  28787. <bitWidth>1</bitWidth>
  28788. </field>
  28789. <field> <name>FB4</name>
  28790. <description>Filter bits</description>
  28791. <bitOffset>4</bitOffset>
  28792. <bitWidth>1</bitWidth>
  28793. </field>
  28794. <field> <name>FB5</name>
  28795. <description>Filter bits</description>
  28796. <bitOffset>5</bitOffset>
  28797. <bitWidth>1</bitWidth>
  28798. </field>
  28799. <field> <name>FB6</name>
  28800. <description>Filter bits</description>
  28801. <bitOffset>6</bitOffset>
  28802. <bitWidth>1</bitWidth>
  28803. </field>
  28804. <field> <name>FB7</name>
  28805. <description>Filter bits</description>
  28806. <bitOffset>7</bitOffset>
  28807. <bitWidth>1</bitWidth>
  28808. </field>
  28809. <field> <name>FB8</name>
  28810. <description>Filter bits</description>
  28811. <bitOffset>8</bitOffset>
  28812. <bitWidth>1</bitWidth>
  28813. </field>
  28814. <field> <name>FB9</name>
  28815. <description>Filter bits</description>
  28816. <bitOffset>9</bitOffset>
  28817. <bitWidth>1</bitWidth>
  28818. </field>
  28819. <field> <name>FB10</name>
  28820. <description>Filter bits</description>
  28821. <bitOffset>10</bitOffset>
  28822. <bitWidth>1</bitWidth>
  28823. </field>
  28824. <field> <name>FB11</name>
  28825. <description>Filter bits</description>
  28826. <bitOffset>11</bitOffset>
  28827. <bitWidth>1</bitWidth>
  28828. </field>
  28829. <field> <name>FB12</name>
  28830. <description>Filter bits</description>
  28831. <bitOffset>12</bitOffset>
  28832. <bitWidth>1</bitWidth>
  28833. </field>
  28834. <field> <name>FB13</name>
  28835. <description>Filter bits</description>
  28836. <bitOffset>13</bitOffset>
  28837. <bitWidth>1</bitWidth>
  28838. </field>
  28839. <field> <name>FB14</name>
  28840. <description>Filter bits</description>
  28841. <bitOffset>14</bitOffset>
  28842. <bitWidth>1</bitWidth>
  28843. </field>
  28844. <field> <name>FB15</name>
  28845. <description>Filter bits</description>
  28846. <bitOffset>15</bitOffset>
  28847. <bitWidth>1</bitWidth>
  28848. </field>
  28849. <field> <name>FB16</name>
  28850. <description>Filter bits</description>
  28851. <bitOffset>16</bitOffset>
  28852. <bitWidth>1</bitWidth>
  28853. </field>
  28854. <field> <name>FB17</name>
  28855. <description>Filter bits</description>
  28856. <bitOffset>17</bitOffset>
  28857. <bitWidth>1</bitWidth>
  28858. </field>
  28859. <field> <name>FB18</name>
  28860. <description>Filter bits</description>
  28861. <bitOffset>18</bitOffset>
  28862. <bitWidth>1</bitWidth>
  28863. </field>
  28864. <field> <name>FB19</name>
  28865. <description>Filter bits</description>
  28866. <bitOffset>19</bitOffset>
  28867. <bitWidth>1</bitWidth>
  28868. </field>
  28869. <field> <name>FB20</name>
  28870. <description>Filter bits</description>
  28871. <bitOffset>20</bitOffset>
  28872. <bitWidth>1</bitWidth>
  28873. </field>
  28874. <field> <name>FB21</name>
  28875. <description>Filter bits</description>
  28876. <bitOffset>21</bitOffset>
  28877. <bitWidth>1</bitWidth>
  28878. </field>
  28879. <field> <name>FB22</name>
  28880. <description>Filter bits</description>
  28881. <bitOffset>22</bitOffset>
  28882. <bitWidth>1</bitWidth>
  28883. </field>
  28884. <field> <name>FB23</name>
  28885. <description>Filter bits</description>
  28886. <bitOffset>23</bitOffset>
  28887. <bitWidth>1</bitWidth>
  28888. </field>
  28889. <field> <name>FB24</name>
  28890. <description>Filter bits</description>
  28891. <bitOffset>24</bitOffset>
  28892. <bitWidth>1</bitWidth>
  28893. </field>
  28894. <field> <name>FB25</name>
  28895. <description>Filter bits</description>
  28896. <bitOffset>25</bitOffset>
  28897. <bitWidth>1</bitWidth>
  28898. </field>
  28899. <field> <name>FB26</name>
  28900. <description>Filter bits</description>
  28901. <bitOffset>26</bitOffset>
  28902. <bitWidth>1</bitWidth>
  28903. </field>
  28904. <field> <name>FB27</name>
  28905. <description>Filter bits</description>
  28906. <bitOffset>27</bitOffset>
  28907. <bitWidth>1</bitWidth>
  28908. </field>
  28909. <field> <name>FB28</name>
  28910. <description>Filter bits</description>
  28911. <bitOffset>28</bitOffset>
  28912. <bitWidth>1</bitWidth>
  28913. </field>
  28914. <field> <name>FB29</name>
  28915. <description>Filter bits</description>
  28916. <bitOffset>29</bitOffset>
  28917. <bitWidth>1</bitWidth>
  28918. </field>
  28919. <field> <name>FB30</name>
  28920. <description>Filter bits</description>
  28921. <bitOffset>30</bitOffset>
  28922. <bitWidth>1</bitWidth>
  28923. </field>
  28924. <field> <name>FB31</name>
  28925. <description>Filter bits</description>
  28926. <bitOffset>31</bitOffset>
  28927. <bitWidth>1</bitWidth>
  28928. </field>
  28929. </fields>
  28930. </register>
  28931. <register> <name>F6R1</name>
  28932. <displayName>F6R1</displayName>
  28933. <description>Filter bank 6 register 1</description>
  28934. <addressOffset>0x270</addressOffset>
  28935. <size>0x20</size>
  28936. <access>read-write</access>
  28937. <resetValue>0x00000000</resetValue>
  28938. <fields>
  28939. <field> <name>FB0</name>
  28940. <description>Filter bits</description>
  28941. <bitOffset>0</bitOffset>
  28942. <bitWidth>1</bitWidth>
  28943. </field>
  28944. <field> <name>FB1</name>
  28945. <description>Filter bits</description>
  28946. <bitOffset>1</bitOffset>
  28947. <bitWidth>1</bitWidth>
  28948. </field>
  28949. <field> <name>FB2</name>
  28950. <description>Filter bits</description>
  28951. <bitOffset>2</bitOffset>
  28952. <bitWidth>1</bitWidth>
  28953. </field>
  28954. <field> <name>FB3</name>
  28955. <description>Filter bits</description>
  28956. <bitOffset>3</bitOffset>
  28957. <bitWidth>1</bitWidth>
  28958. </field>
  28959. <field> <name>FB4</name>
  28960. <description>Filter bits</description>
  28961. <bitOffset>4</bitOffset>
  28962. <bitWidth>1</bitWidth>
  28963. </field>
  28964. <field> <name>FB5</name>
  28965. <description>Filter bits</description>
  28966. <bitOffset>5</bitOffset>
  28967. <bitWidth>1</bitWidth>
  28968. </field>
  28969. <field> <name>FB6</name>
  28970. <description>Filter bits</description>
  28971. <bitOffset>6</bitOffset>
  28972. <bitWidth>1</bitWidth>
  28973. </field>
  28974. <field> <name>FB7</name>
  28975. <description>Filter bits</description>
  28976. <bitOffset>7</bitOffset>
  28977. <bitWidth>1</bitWidth>
  28978. </field>
  28979. <field> <name>FB8</name>
  28980. <description>Filter bits</description>
  28981. <bitOffset>8</bitOffset>
  28982. <bitWidth>1</bitWidth>
  28983. </field>
  28984. <field> <name>FB9</name>
  28985. <description>Filter bits</description>
  28986. <bitOffset>9</bitOffset>
  28987. <bitWidth>1</bitWidth>
  28988. </field>
  28989. <field> <name>FB10</name>
  28990. <description>Filter bits</description>
  28991. <bitOffset>10</bitOffset>
  28992. <bitWidth>1</bitWidth>
  28993. </field>
  28994. <field> <name>FB11</name>
  28995. <description>Filter bits</description>
  28996. <bitOffset>11</bitOffset>
  28997. <bitWidth>1</bitWidth>
  28998. </field>
  28999. <field> <name>FB12</name>
  29000. <description>Filter bits</description>
  29001. <bitOffset>12</bitOffset>
  29002. <bitWidth>1</bitWidth>
  29003. </field>
  29004. <field> <name>FB13</name>
  29005. <description>Filter bits</description>
  29006. <bitOffset>13</bitOffset>
  29007. <bitWidth>1</bitWidth>
  29008. </field>
  29009. <field> <name>FB14</name>
  29010. <description>Filter bits</description>
  29011. <bitOffset>14</bitOffset>
  29012. <bitWidth>1</bitWidth>
  29013. </field>
  29014. <field> <name>FB15</name>
  29015. <description>Filter bits</description>
  29016. <bitOffset>15</bitOffset>
  29017. <bitWidth>1</bitWidth>
  29018. </field>
  29019. <field> <name>FB16</name>
  29020. <description>Filter bits</description>
  29021. <bitOffset>16</bitOffset>
  29022. <bitWidth>1</bitWidth>
  29023. </field>
  29024. <field> <name>FB17</name>
  29025. <description>Filter bits</description>
  29026. <bitOffset>17</bitOffset>
  29027. <bitWidth>1</bitWidth>
  29028. </field>
  29029. <field> <name>FB18</name>
  29030. <description>Filter bits</description>
  29031. <bitOffset>18</bitOffset>
  29032. <bitWidth>1</bitWidth>
  29033. </field>
  29034. <field> <name>FB19</name>
  29035. <description>Filter bits</description>
  29036. <bitOffset>19</bitOffset>
  29037. <bitWidth>1</bitWidth>
  29038. </field>
  29039. <field> <name>FB20</name>
  29040. <description>Filter bits</description>
  29041. <bitOffset>20</bitOffset>
  29042. <bitWidth>1</bitWidth>
  29043. </field>
  29044. <field> <name>FB21</name>
  29045. <description>Filter bits</description>
  29046. <bitOffset>21</bitOffset>
  29047. <bitWidth>1</bitWidth>
  29048. </field>
  29049. <field> <name>FB22</name>
  29050. <description>Filter bits</description>
  29051. <bitOffset>22</bitOffset>
  29052. <bitWidth>1</bitWidth>
  29053. </field>
  29054. <field> <name>FB23</name>
  29055. <description>Filter bits</description>
  29056. <bitOffset>23</bitOffset>
  29057. <bitWidth>1</bitWidth>
  29058. </field>
  29059. <field> <name>FB24</name>
  29060. <description>Filter bits</description>
  29061. <bitOffset>24</bitOffset>
  29062. <bitWidth>1</bitWidth>
  29063. </field>
  29064. <field> <name>FB25</name>
  29065. <description>Filter bits</description>
  29066. <bitOffset>25</bitOffset>
  29067. <bitWidth>1</bitWidth>
  29068. </field>
  29069. <field> <name>FB26</name>
  29070. <description>Filter bits</description>
  29071. <bitOffset>26</bitOffset>
  29072. <bitWidth>1</bitWidth>
  29073. </field>
  29074. <field> <name>FB27</name>
  29075. <description>Filter bits</description>
  29076. <bitOffset>27</bitOffset>
  29077. <bitWidth>1</bitWidth>
  29078. </field>
  29079. <field> <name>FB28</name>
  29080. <description>Filter bits</description>
  29081. <bitOffset>28</bitOffset>
  29082. <bitWidth>1</bitWidth>
  29083. </field>
  29084. <field> <name>FB29</name>
  29085. <description>Filter bits</description>
  29086. <bitOffset>29</bitOffset>
  29087. <bitWidth>1</bitWidth>
  29088. </field>
  29089. <field> <name>FB30</name>
  29090. <description>Filter bits</description>
  29091. <bitOffset>30</bitOffset>
  29092. <bitWidth>1</bitWidth>
  29093. </field>
  29094. <field> <name>FB31</name>
  29095. <description>Filter bits</description>
  29096. <bitOffset>31</bitOffset>
  29097. <bitWidth>1</bitWidth>
  29098. </field>
  29099. </fields>
  29100. </register>
  29101. <register> <name>F6R2</name>
  29102. <displayName>F6R2</displayName>
  29103. <description>Filter bank 6 register 2</description>
  29104. <addressOffset>0x274</addressOffset>
  29105. <size>0x20</size>
  29106. <access>read-write</access>
  29107. <resetValue>0x00000000</resetValue>
  29108. <fields>
  29109. <field> <name>FB0</name>
  29110. <description>Filter bits</description>
  29111. <bitOffset>0</bitOffset>
  29112. <bitWidth>1</bitWidth>
  29113. </field>
  29114. <field> <name>FB1</name>
  29115. <description>Filter bits</description>
  29116. <bitOffset>1</bitOffset>
  29117. <bitWidth>1</bitWidth>
  29118. </field>
  29119. <field> <name>FB2</name>
  29120. <description>Filter bits</description>
  29121. <bitOffset>2</bitOffset>
  29122. <bitWidth>1</bitWidth>
  29123. </field>
  29124. <field> <name>FB3</name>
  29125. <description>Filter bits</description>
  29126. <bitOffset>3</bitOffset>
  29127. <bitWidth>1</bitWidth>
  29128. </field>
  29129. <field> <name>FB4</name>
  29130. <description>Filter bits</description>
  29131. <bitOffset>4</bitOffset>
  29132. <bitWidth>1</bitWidth>
  29133. </field>
  29134. <field> <name>FB5</name>
  29135. <description>Filter bits</description>
  29136. <bitOffset>5</bitOffset>
  29137. <bitWidth>1</bitWidth>
  29138. </field>
  29139. <field> <name>FB6</name>
  29140. <description>Filter bits</description>
  29141. <bitOffset>6</bitOffset>
  29142. <bitWidth>1</bitWidth>
  29143. </field>
  29144. <field> <name>FB7</name>
  29145. <description>Filter bits</description>
  29146. <bitOffset>7</bitOffset>
  29147. <bitWidth>1</bitWidth>
  29148. </field>
  29149. <field> <name>FB8</name>
  29150. <description>Filter bits</description>
  29151. <bitOffset>8</bitOffset>
  29152. <bitWidth>1</bitWidth>
  29153. </field>
  29154. <field> <name>FB9</name>
  29155. <description>Filter bits</description>
  29156. <bitOffset>9</bitOffset>
  29157. <bitWidth>1</bitWidth>
  29158. </field>
  29159. <field> <name>FB10</name>
  29160. <description>Filter bits</description>
  29161. <bitOffset>10</bitOffset>
  29162. <bitWidth>1</bitWidth>
  29163. </field>
  29164. <field> <name>FB11</name>
  29165. <description>Filter bits</description>
  29166. <bitOffset>11</bitOffset>
  29167. <bitWidth>1</bitWidth>
  29168. </field>
  29169. <field> <name>FB12</name>
  29170. <description>Filter bits</description>
  29171. <bitOffset>12</bitOffset>
  29172. <bitWidth>1</bitWidth>
  29173. </field>
  29174. <field> <name>FB13</name>
  29175. <description>Filter bits</description>
  29176. <bitOffset>13</bitOffset>
  29177. <bitWidth>1</bitWidth>
  29178. </field>
  29179. <field> <name>FB14</name>
  29180. <description>Filter bits</description>
  29181. <bitOffset>14</bitOffset>
  29182. <bitWidth>1</bitWidth>
  29183. </field>
  29184. <field> <name>FB15</name>
  29185. <description>Filter bits</description>
  29186. <bitOffset>15</bitOffset>
  29187. <bitWidth>1</bitWidth>
  29188. </field>
  29189. <field> <name>FB16</name>
  29190. <description>Filter bits</description>
  29191. <bitOffset>16</bitOffset>
  29192. <bitWidth>1</bitWidth>
  29193. </field>
  29194. <field> <name>FB17</name>
  29195. <description>Filter bits</description>
  29196. <bitOffset>17</bitOffset>
  29197. <bitWidth>1</bitWidth>
  29198. </field>
  29199. <field> <name>FB18</name>
  29200. <description>Filter bits</description>
  29201. <bitOffset>18</bitOffset>
  29202. <bitWidth>1</bitWidth>
  29203. </field>
  29204. <field> <name>FB19</name>
  29205. <description>Filter bits</description>
  29206. <bitOffset>19</bitOffset>
  29207. <bitWidth>1</bitWidth>
  29208. </field>
  29209. <field> <name>FB20</name>
  29210. <description>Filter bits</description>
  29211. <bitOffset>20</bitOffset>
  29212. <bitWidth>1</bitWidth>
  29213. </field>
  29214. <field> <name>FB21</name>
  29215. <description>Filter bits</description>
  29216. <bitOffset>21</bitOffset>
  29217. <bitWidth>1</bitWidth>
  29218. </field>
  29219. <field> <name>FB22</name>
  29220. <description>Filter bits</description>
  29221. <bitOffset>22</bitOffset>
  29222. <bitWidth>1</bitWidth>
  29223. </field>
  29224. <field> <name>FB23</name>
  29225. <description>Filter bits</description>
  29226. <bitOffset>23</bitOffset>
  29227. <bitWidth>1</bitWidth>
  29228. </field>
  29229. <field> <name>FB24</name>
  29230. <description>Filter bits</description>
  29231. <bitOffset>24</bitOffset>
  29232. <bitWidth>1</bitWidth>
  29233. </field>
  29234. <field> <name>FB25</name>
  29235. <description>Filter bits</description>
  29236. <bitOffset>25</bitOffset>
  29237. <bitWidth>1</bitWidth>
  29238. </field>
  29239. <field> <name>FB26</name>
  29240. <description>Filter bits</description>
  29241. <bitOffset>26</bitOffset>
  29242. <bitWidth>1</bitWidth>
  29243. </field>
  29244. <field> <name>FB27</name>
  29245. <description>Filter bits</description>
  29246. <bitOffset>27</bitOffset>
  29247. <bitWidth>1</bitWidth>
  29248. </field>
  29249. <field> <name>FB28</name>
  29250. <description>Filter bits</description>
  29251. <bitOffset>28</bitOffset>
  29252. <bitWidth>1</bitWidth>
  29253. </field>
  29254. <field> <name>FB29</name>
  29255. <description>Filter bits</description>
  29256. <bitOffset>29</bitOffset>
  29257. <bitWidth>1</bitWidth>
  29258. </field>
  29259. <field> <name>FB30</name>
  29260. <description>Filter bits</description>
  29261. <bitOffset>30</bitOffset>
  29262. <bitWidth>1</bitWidth>
  29263. </field>
  29264. <field> <name>FB31</name>
  29265. <description>Filter bits</description>
  29266. <bitOffset>31</bitOffset>
  29267. <bitWidth>1</bitWidth>
  29268. </field>
  29269. </fields>
  29270. </register>
  29271. <register> <name>F7R1</name>
  29272. <displayName>F7R1</displayName>
  29273. <description>Filter bank 7 register 1</description>
  29274. <addressOffset>0x278</addressOffset>
  29275. <size>0x20</size>
  29276. <access>read-write</access>
  29277. <resetValue>0x00000000</resetValue>
  29278. <fields>
  29279. <field> <name>FB0</name>
  29280. <description>Filter bits</description>
  29281. <bitOffset>0</bitOffset>
  29282. <bitWidth>1</bitWidth>
  29283. </field>
  29284. <field> <name>FB1</name>
  29285. <description>Filter bits</description>
  29286. <bitOffset>1</bitOffset>
  29287. <bitWidth>1</bitWidth>
  29288. </field>
  29289. <field> <name>FB2</name>
  29290. <description>Filter bits</description>
  29291. <bitOffset>2</bitOffset>
  29292. <bitWidth>1</bitWidth>
  29293. </field>
  29294. <field> <name>FB3</name>
  29295. <description>Filter bits</description>
  29296. <bitOffset>3</bitOffset>
  29297. <bitWidth>1</bitWidth>
  29298. </field>
  29299. <field> <name>FB4</name>
  29300. <description>Filter bits</description>
  29301. <bitOffset>4</bitOffset>
  29302. <bitWidth>1</bitWidth>
  29303. </field>
  29304. <field> <name>FB5</name>
  29305. <description>Filter bits</description>
  29306. <bitOffset>5</bitOffset>
  29307. <bitWidth>1</bitWidth>
  29308. </field>
  29309. <field> <name>FB6</name>
  29310. <description>Filter bits</description>
  29311. <bitOffset>6</bitOffset>
  29312. <bitWidth>1</bitWidth>
  29313. </field>
  29314. <field> <name>FB7</name>
  29315. <description>Filter bits</description>
  29316. <bitOffset>7</bitOffset>
  29317. <bitWidth>1</bitWidth>
  29318. </field>
  29319. <field> <name>FB8</name>
  29320. <description>Filter bits</description>
  29321. <bitOffset>8</bitOffset>
  29322. <bitWidth>1</bitWidth>
  29323. </field>
  29324. <field> <name>FB9</name>
  29325. <description>Filter bits</description>
  29326. <bitOffset>9</bitOffset>
  29327. <bitWidth>1</bitWidth>
  29328. </field>
  29329. <field> <name>FB10</name>
  29330. <description>Filter bits</description>
  29331. <bitOffset>10</bitOffset>
  29332. <bitWidth>1</bitWidth>
  29333. </field>
  29334. <field> <name>FB11</name>
  29335. <description>Filter bits</description>
  29336. <bitOffset>11</bitOffset>
  29337. <bitWidth>1</bitWidth>
  29338. </field>
  29339. <field> <name>FB12</name>
  29340. <description>Filter bits</description>
  29341. <bitOffset>12</bitOffset>
  29342. <bitWidth>1</bitWidth>
  29343. </field>
  29344. <field> <name>FB13</name>
  29345. <description>Filter bits</description>
  29346. <bitOffset>13</bitOffset>
  29347. <bitWidth>1</bitWidth>
  29348. </field>
  29349. <field> <name>FB14</name>
  29350. <description>Filter bits</description>
  29351. <bitOffset>14</bitOffset>
  29352. <bitWidth>1</bitWidth>
  29353. </field>
  29354. <field> <name>FB15</name>
  29355. <description>Filter bits</description>
  29356. <bitOffset>15</bitOffset>
  29357. <bitWidth>1</bitWidth>
  29358. </field>
  29359. <field> <name>FB16</name>
  29360. <description>Filter bits</description>
  29361. <bitOffset>16</bitOffset>
  29362. <bitWidth>1</bitWidth>
  29363. </field>
  29364. <field> <name>FB17</name>
  29365. <description>Filter bits</description>
  29366. <bitOffset>17</bitOffset>
  29367. <bitWidth>1</bitWidth>
  29368. </field>
  29369. <field> <name>FB18</name>
  29370. <description>Filter bits</description>
  29371. <bitOffset>18</bitOffset>
  29372. <bitWidth>1</bitWidth>
  29373. </field>
  29374. <field> <name>FB19</name>
  29375. <description>Filter bits</description>
  29376. <bitOffset>19</bitOffset>
  29377. <bitWidth>1</bitWidth>
  29378. </field>
  29379. <field> <name>FB20</name>
  29380. <description>Filter bits</description>
  29381. <bitOffset>20</bitOffset>
  29382. <bitWidth>1</bitWidth>
  29383. </field>
  29384. <field> <name>FB21</name>
  29385. <description>Filter bits</description>
  29386. <bitOffset>21</bitOffset>
  29387. <bitWidth>1</bitWidth>
  29388. </field>
  29389. <field> <name>FB22</name>
  29390. <description>Filter bits</description>
  29391. <bitOffset>22</bitOffset>
  29392. <bitWidth>1</bitWidth>
  29393. </field>
  29394. <field> <name>FB23</name>
  29395. <description>Filter bits</description>
  29396. <bitOffset>23</bitOffset>
  29397. <bitWidth>1</bitWidth>
  29398. </field>
  29399. <field> <name>FB24</name>
  29400. <description>Filter bits</description>
  29401. <bitOffset>24</bitOffset>
  29402. <bitWidth>1</bitWidth>
  29403. </field>
  29404. <field> <name>FB25</name>
  29405. <description>Filter bits</description>
  29406. <bitOffset>25</bitOffset>
  29407. <bitWidth>1</bitWidth>
  29408. </field>
  29409. <field> <name>FB26</name>
  29410. <description>Filter bits</description>
  29411. <bitOffset>26</bitOffset>
  29412. <bitWidth>1</bitWidth>
  29413. </field>
  29414. <field> <name>FB27</name>
  29415. <description>Filter bits</description>
  29416. <bitOffset>27</bitOffset>
  29417. <bitWidth>1</bitWidth>
  29418. </field>
  29419. <field> <name>FB28</name>
  29420. <description>Filter bits</description>
  29421. <bitOffset>28</bitOffset>
  29422. <bitWidth>1</bitWidth>
  29423. </field>
  29424. <field> <name>FB29</name>
  29425. <description>Filter bits</description>
  29426. <bitOffset>29</bitOffset>
  29427. <bitWidth>1</bitWidth>
  29428. </field>
  29429. <field> <name>FB30</name>
  29430. <description>Filter bits</description>
  29431. <bitOffset>30</bitOffset>
  29432. <bitWidth>1</bitWidth>
  29433. </field>
  29434. <field> <name>FB31</name>
  29435. <description>Filter bits</description>
  29436. <bitOffset>31</bitOffset>
  29437. <bitWidth>1</bitWidth>
  29438. </field>
  29439. </fields>
  29440. </register>
  29441. <register> <name>F7R2</name>
  29442. <displayName>F7R2</displayName>
  29443. <description>Filter bank 7 register 2</description>
  29444. <addressOffset>0x27C</addressOffset>
  29445. <size>0x20</size>
  29446. <access>read-write</access>
  29447. <resetValue>0x00000000</resetValue>
  29448. <fields>
  29449. <field> <name>FB0</name>
  29450. <description>Filter bits</description>
  29451. <bitOffset>0</bitOffset>
  29452. <bitWidth>1</bitWidth>
  29453. </field>
  29454. <field> <name>FB1</name>
  29455. <description>Filter bits</description>
  29456. <bitOffset>1</bitOffset>
  29457. <bitWidth>1</bitWidth>
  29458. </field>
  29459. <field> <name>FB2</name>
  29460. <description>Filter bits</description>
  29461. <bitOffset>2</bitOffset>
  29462. <bitWidth>1</bitWidth>
  29463. </field>
  29464. <field> <name>FB3</name>
  29465. <description>Filter bits</description>
  29466. <bitOffset>3</bitOffset>
  29467. <bitWidth>1</bitWidth>
  29468. </field>
  29469. <field> <name>FB4</name>
  29470. <description>Filter bits</description>
  29471. <bitOffset>4</bitOffset>
  29472. <bitWidth>1</bitWidth>
  29473. </field>
  29474. <field> <name>FB5</name>
  29475. <description>Filter bits</description>
  29476. <bitOffset>5</bitOffset>
  29477. <bitWidth>1</bitWidth>
  29478. </field>
  29479. <field> <name>FB6</name>
  29480. <description>Filter bits</description>
  29481. <bitOffset>6</bitOffset>
  29482. <bitWidth>1</bitWidth>
  29483. </field>
  29484. <field> <name>FB7</name>
  29485. <description>Filter bits</description>
  29486. <bitOffset>7</bitOffset>
  29487. <bitWidth>1</bitWidth>
  29488. </field>
  29489. <field> <name>FB8</name>
  29490. <description>Filter bits</description>
  29491. <bitOffset>8</bitOffset>
  29492. <bitWidth>1</bitWidth>
  29493. </field>
  29494. <field> <name>FB9</name>
  29495. <description>Filter bits</description>
  29496. <bitOffset>9</bitOffset>
  29497. <bitWidth>1</bitWidth>
  29498. </field>
  29499. <field> <name>FB10</name>
  29500. <description>Filter bits</description>
  29501. <bitOffset>10</bitOffset>
  29502. <bitWidth>1</bitWidth>
  29503. </field>
  29504. <field> <name>FB11</name>
  29505. <description>Filter bits</description>
  29506. <bitOffset>11</bitOffset>
  29507. <bitWidth>1</bitWidth>
  29508. </field>
  29509. <field> <name>FB12</name>
  29510. <description>Filter bits</description>
  29511. <bitOffset>12</bitOffset>
  29512. <bitWidth>1</bitWidth>
  29513. </field>
  29514. <field> <name>FB13</name>
  29515. <description>Filter bits</description>
  29516. <bitOffset>13</bitOffset>
  29517. <bitWidth>1</bitWidth>
  29518. </field>
  29519. <field> <name>FB14</name>
  29520. <description>Filter bits</description>
  29521. <bitOffset>14</bitOffset>
  29522. <bitWidth>1</bitWidth>
  29523. </field>
  29524. <field> <name>FB15</name>
  29525. <description>Filter bits</description>
  29526. <bitOffset>15</bitOffset>
  29527. <bitWidth>1</bitWidth>
  29528. </field>
  29529. <field> <name>FB16</name>
  29530. <description>Filter bits</description>
  29531. <bitOffset>16</bitOffset>
  29532. <bitWidth>1</bitWidth>
  29533. </field>
  29534. <field> <name>FB17</name>
  29535. <description>Filter bits</description>
  29536. <bitOffset>17</bitOffset>
  29537. <bitWidth>1</bitWidth>
  29538. </field>
  29539. <field> <name>FB18</name>
  29540. <description>Filter bits</description>
  29541. <bitOffset>18</bitOffset>
  29542. <bitWidth>1</bitWidth>
  29543. </field>
  29544. <field> <name>FB19</name>
  29545. <description>Filter bits</description>
  29546. <bitOffset>19</bitOffset>
  29547. <bitWidth>1</bitWidth>
  29548. </field>
  29549. <field> <name>FB20</name>
  29550. <description>Filter bits</description>
  29551. <bitOffset>20</bitOffset>
  29552. <bitWidth>1</bitWidth>
  29553. </field>
  29554. <field> <name>FB21</name>
  29555. <description>Filter bits</description>
  29556. <bitOffset>21</bitOffset>
  29557. <bitWidth>1</bitWidth>
  29558. </field>
  29559. <field> <name>FB22</name>
  29560. <description>Filter bits</description>
  29561. <bitOffset>22</bitOffset>
  29562. <bitWidth>1</bitWidth>
  29563. </field>
  29564. <field> <name>FB23</name>
  29565. <description>Filter bits</description>
  29566. <bitOffset>23</bitOffset>
  29567. <bitWidth>1</bitWidth>
  29568. </field>
  29569. <field> <name>FB24</name>
  29570. <description>Filter bits</description>
  29571. <bitOffset>24</bitOffset>
  29572. <bitWidth>1</bitWidth>
  29573. </field>
  29574. <field> <name>FB25</name>
  29575. <description>Filter bits</description>
  29576. <bitOffset>25</bitOffset>
  29577. <bitWidth>1</bitWidth>
  29578. </field>
  29579. <field> <name>FB26</name>
  29580. <description>Filter bits</description>
  29581. <bitOffset>26</bitOffset>
  29582. <bitWidth>1</bitWidth>
  29583. </field>
  29584. <field> <name>FB27</name>
  29585. <description>Filter bits</description>
  29586. <bitOffset>27</bitOffset>
  29587. <bitWidth>1</bitWidth>
  29588. </field>
  29589. <field> <name>FB28</name>
  29590. <description>Filter bits</description>
  29591. <bitOffset>28</bitOffset>
  29592. <bitWidth>1</bitWidth>
  29593. </field>
  29594. <field> <name>FB29</name>
  29595. <description>Filter bits</description>
  29596. <bitOffset>29</bitOffset>
  29597. <bitWidth>1</bitWidth>
  29598. </field>
  29599. <field> <name>FB30</name>
  29600. <description>Filter bits</description>
  29601. <bitOffset>30</bitOffset>
  29602. <bitWidth>1</bitWidth>
  29603. </field>
  29604. <field> <name>FB31</name>
  29605. <description>Filter bits</description>
  29606. <bitOffset>31</bitOffset>
  29607. <bitWidth>1</bitWidth>
  29608. </field>
  29609. </fields>
  29610. </register>
  29611. <register> <name>F8R1</name>
  29612. <displayName>F8R1</displayName>
  29613. <description>Filter bank 8 register 1</description>
  29614. <addressOffset>0x280</addressOffset>
  29615. <size>0x20</size>
  29616. <access>read-write</access>
  29617. <resetValue>0x00000000</resetValue>
  29618. <fields>
  29619. <field> <name>FB0</name>
  29620. <description>Filter bits</description>
  29621. <bitOffset>0</bitOffset>
  29622. <bitWidth>1</bitWidth>
  29623. </field>
  29624. <field> <name>FB1</name>
  29625. <description>Filter bits</description>
  29626. <bitOffset>1</bitOffset>
  29627. <bitWidth>1</bitWidth>
  29628. </field>
  29629. <field> <name>FB2</name>
  29630. <description>Filter bits</description>
  29631. <bitOffset>2</bitOffset>
  29632. <bitWidth>1</bitWidth>
  29633. </field>
  29634. <field> <name>FB3</name>
  29635. <description>Filter bits</description>
  29636. <bitOffset>3</bitOffset>
  29637. <bitWidth>1</bitWidth>
  29638. </field>
  29639. <field> <name>FB4</name>
  29640. <description>Filter bits</description>
  29641. <bitOffset>4</bitOffset>
  29642. <bitWidth>1</bitWidth>
  29643. </field>
  29644. <field> <name>FB5</name>
  29645. <description>Filter bits</description>
  29646. <bitOffset>5</bitOffset>
  29647. <bitWidth>1</bitWidth>
  29648. </field>
  29649. <field> <name>FB6</name>
  29650. <description>Filter bits</description>
  29651. <bitOffset>6</bitOffset>
  29652. <bitWidth>1</bitWidth>
  29653. </field>
  29654. <field> <name>FB7</name>
  29655. <description>Filter bits</description>
  29656. <bitOffset>7</bitOffset>
  29657. <bitWidth>1</bitWidth>
  29658. </field>
  29659. <field> <name>FB8</name>
  29660. <description>Filter bits</description>
  29661. <bitOffset>8</bitOffset>
  29662. <bitWidth>1</bitWidth>
  29663. </field>
  29664. <field> <name>FB9</name>
  29665. <description>Filter bits</description>
  29666. <bitOffset>9</bitOffset>
  29667. <bitWidth>1</bitWidth>
  29668. </field>
  29669. <field> <name>FB10</name>
  29670. <description>Filter bits</description>
  29671. <bitOffset>10</bitOffset>
  29672. <bitWidth>1</bitWidth>
  29673. </field>
  29674. <field> <name>FB11</name>
  29675. <description>Filter bits</description>
  29676. <bitOffset>11</bitOffset>
  29677. <bitWidth>1</bitWidth>
  29678. </field>
  29679. <field> <name>FB12</name>
  29680. <description>Filter bits</description>
  29681. <bitOffset>12</bitOffset>
  29682. <bitWidth>1</bitWidth>
  29683. </field>
  29684. <field> <name>FB13</name>
  29685. <description>Filter bits</description>
  29686. <bitOffset>13</bitOffset>
  29687. <bitWidth>1</bitWidth>
  29688. </field>
  29689. <field> <name>FB14</name>
  29690. <description>Filter bits</description>
  29691. <bitOffset>14</bitOffset>
  29692. <bitWidth>1</bitWidth>
  29693. </field>
  29694. <field> <name>FB15</name>
  29695. <description>Filter bits</description>
  29696. <bitOffset>15</bitOffset>
  29697. <bitWidth>1</bitWidth>
  29698. </field>
  29699. <field> <name>FB16</name>
  29700. <description>Filter bits</description>
  29701. <bitOffset>16</bitOffset>
  29702. <bitWidth>1</bitWidth>
  29703. </field>
  29704. <field> <name>FB17</name>
  29705. <description>Filter bits</description>
  29706. <bitOffset>17</bitOffset>
  29707. <bitWidth>1</bitWidth>
  29708. </field>
  29709. <field> <name>FB18</name>
  29710. <description>Filter bits</description>
  29711. <bitOffset>18</bitOffset>
  29712. <bitWidth>1</bitWidth>
  29713. </field>
  29714. <field> <name>FB19</name>
  29715. <description>Filter bits</description>
  29716. <bitOffset>19</bitOffset>
  29717. <bitWidth>1</bitWidth>
  29718. </field>
  29719. <field> <name>FB20</name>
  29720. <description>Filter bits</description>
  29721. <bitOffset>20</bitOffset>
  29722. <bitWidth>1</bitWidth>
  29723. </field>
  29724. <field> <name>FB21</name>
  29725. <description>Filter bits</description>
  29726. <bitOffset>21</bitOffset>
  29727. <bitWidth>1</bitWidth>
  29728. </field>
  29729. <field> <name>FB22</name>
  29730. <description>Filter bits</description>
  29731. <bitOffset>22</bitOffset>
  29732. <bitWidth>1</bitWidth>
  29733. </field>
  29734. <field> <name>FB23</name>
  29735. <description>Filter bits</description>
  29736. <bitOffset>23</bitOffset>
  29737. <bitWidth>1</bitWidth>
  29738. </field>
  29739. <field> <name>FB24</name>
  29740. <description>Filter bits</description>
  29741. <bitOffset>24</bitOffset>
  29742. <bitWidth>1</bitWidth>
  29743. </field>
  29744. <field> <name>FB25</name>
  29745. <description>Filter bits</description>
  29746. <bitOffset>25</bitOffset>
  29747. <bitWidth>1</bitWidth>
  29748. </field>
  29749. <field> <name>FB26</name>
  29750. <description>Filter bits</description>
  29751. <bitOffset>26</bitOffset>
  29752. <bitWidth>1</bitWidth>
  29753. </field>
  29754. <field> <name>FB27</name>
  29755. <description>Filter bits</description>
  29756. <bitOffset>27</bitOffset>
  29757. <bitWidth>1</bitWidth>
  29758. </field>
  29759. <field> <name>FB28</name>
  29760. <description>Filter bits</description>
  29761. <bitOffset>28</bitOffset>
  29762. <bitWidth>1</bitWidth>
  29763. </field>
  29764. <field> <name>FB29</name>
  29765. <description>Filter bits</description>
  29766. <bitOffset>29</bitOffset>
  29767. <bitWidth>1</bitWidth>
  29768. </field>
  29769. <field> <name>FB30</name>
  29770. <description>Filter bits</description>
  29771. <bitOffset>30</bitOffset>
  29772. <bitWidth>1</bitWidth>
  29773. </field>
  29774. <field> <name>FB31</name>
  29775. <description>Filter bits</description>
  29776. <bitOffset>31</bitOffset>
  29777. <bitWidth>1</bitWidth>
  29778. </field>
  29779. </fields>
  29780. </register>
  29781. <register> <name>F8R2</name>
  29782. <displayName>F8R2</displayName>
  29783. <description>Filter bank 8 register 2</description>
  29784. <addressOffset>0x284</addressOffset>
  29785. <size>0x20</size>
  29786. <access>read-write</access>
  29787. <resetValue>0x00000000</resetValue>
  29788. <fields>
  29789. <field> <name>FB0</name>
  29790. <description>Filter bits</description>
  29791. <bitOffset>0</bitOffset>
  29792. <bitWidth>1</bitWidth>
  29793. </field>
  29794. <field> <name>FB1</name>
  29795. <description>Filter bits</description>
  29796. <bitOffset>1</bitOffset>
  29797. <bitWidth>1</bitWidth>
  29798. </field>
  29799. <field> <name>FB2</name>
  29800. <description>Filter bits</description>
  29801. <bitOffset>2</bitOffset>
  29802. <bitWidth>1</bitWidth>
  29803. </field>
  29804. <field> <name>FB3</name>
  29805. <description>Filter bits</description>
  29806. <bitOffset>3</bitOffset>
  29807. <bitWidth>1</bitWidth>
  29808. </field>
  29809. <field> <name>FB4</name>
  29810. <description>Filter bits</description>
  29811. <bitOffset>4</bitOffset>
  29812. <bitWidth>1</bitWidth>
  29813. </field>
  29814. <field> <name>FB5</name>
  29815. <description>Filter bits</description>
  29816. <bitOffset>5</bitOffset>
  29817. <bitWidth>1</bitWidth>
  29818. </field>
  29819. <field> <name>FB6</name>
  29820. <description>Filter bits</description>
  29821. <bitOffset>6</bitOffset>
  29822. <bitWidth>1</bitWidth>
  29823. </field>
  29824. <field> <name>FB7</name>
  29825. <description>Filter bits</description>
  29826. <bitOffset>7</bitOffset>
  29827. <bitWidth>1</bitWidth>
  29828. </field>
  29829. <field> <name>FB8</name>
  29830. <description>Filter bits</description>
  29831. <bitOffset>8</bitOffset>
  29832. <bitWidth>1</bitWidth>
  29833. </field>
  29834. <field> <name>FB9</name>
  29835. <description>Filter bits</description>
  29836. <bitOffset>9</bitOffset>
  29837. <bitWidth>1</bitWidth>
  29838. </field>
  29839. <field> <name>FB10</name>
  29840. <description>Filter bits</description>
  29841. <bitOffset>10</bitOffset>
  29842. <bitWidth>1</bitWidth>
  29843. </field>
  29844. <field> <name>FB11</name>
  29845. <description>Filter bits</description>
  29846. <bitOffset>11</bitOffset>
  29847. <bitWidth>1</bitWidth>
  29848. </field>
  29849. <field> <name>FB12</name>
  29850. <description>Filter bits</description>
  29851. <bitOffset>12</bitOffset>
  29852. <bitWidth>1</bitWidth>
  29853. </field>
  29854. <field> <name>FB13</name>
  29855. <description>Filter bits</description>
  29856. <bitOffset>13</bitOffset>
  29857. <bitWidth>1</bitWidth>
  29858. </field>
  29859. <field> <name>FB14</name>
  29860. <description>Filter bits</description>
  29861. <bitOffset>14</bitOffset>
  29862. <bitWidth>1</bitWidth>
  29863. </field>
  29864. <field> <name>FB15</name>
  29865. <description>Filter bits</description>
  29866. <bitOffset>15</bitOffset>
  29867. <bitWidth>1</bitWidth>
  29868. </field>
  29869. <field> <name>FB16</name>
  29870. <description>Filter bits</description>
  29871. <bitOffset>16</bitOffset>
  29872. <bitWidth>1</bitWidth>
  29873. </field>
  29874. <field> <name>FB17</name>
  29875. <description>Filter bits</description>
  29876. <bitOffset>17</bitOffset>
  29877. <bitWidth>1</bitWidth>
  29878. </field>
  29879. <field> <name>FB18</name>
  29880. <description>Filter bits</description>
  29881. <bitOffset>18</bitOffset>
  29882. <bitWidth>1</bitWidth>
  29883. </field>
  29884. <field> <name>FB19</name>
  29885. <description>Filter bits</description>
  29886. <bitOffset>19</bitOffset>
  29887. <bitWidth>1</bitWidth>
  29888. </field>
  29889. <field> <name>FB20</name>
  29890. <description>Filter bits</description>
  29891. <bitOffset>20</bitOffset>
  29892. <bitWidth>1</bitWidth>
  29893. </field>
  29894. <field> <name>FB21</name>
  29895. <description>Filter bits</description>
  29896. <bitOffset>21</bitOffset>
  29897. <bitWidth>1</bitWidth>
  29898. </field>
  29899. <field> <name>FB22</name>
  29900. <description>Filter bits</description>
  29901. <bitOffset>22</bitOffset>
  29902. <bitWidth>1</bitWidth>
  29903. </field>
  29904. <field> <name>FB23</name>
  29905. <description>Filter bits</description>
  29906. <bitOffset>23</bitOffset>
  29907. <bitWidth>1</bitWidth>
  29908. </field>
  29909. <field> <name>FB24</name>
  29910. <description>Filter bits</description>
  29911. <bitOffset>24</bitOffset>
  29912. <bitWidth>1</bitWidth>
  29913. </field>
  29914. <field> <name>FB25</name>
  29915. <description>Filter bits</description>
  29916. <bitOffset>25</bitOffset>
  29917. <bitWidth>1</bitWidth>
  29918. </field>
  29919. <field> <name>FB26</name>
  29920. <description>Filter bits</description>
  29921. <bitOffset>26</bitOffset>
  29922. <bitWidth>1</bitWidth>
  29923. </field>
  29924. <field> <name>FB27</name>
  29925. <description>Filter bits</description>
  29926. <bitOffset>27</bitOffset>
  29927. <bitWidth>1</bitWidth>
  29928. </field>
  29929. <field> <name>FB28</name>
  29930. <description>Filter bits</description>
  29931. <bitOffset>28</bitOffset>
  29932. <bitWidth>1</bitWidth>
  29933. </field>
  29934. <field> <name>FB29</name>
  29935. <description>Filter bits</description>
  29936. <bitOffset>29</bitOffset>
  29937. <bitWidth>1</bitWidth>
  29938. </field>
  29939. <field> <name>FB30</name>
  29940. <description>Filter bits</description>
  29941. <bitOffset>30</bitOffset>
  29942. <bitWidth>1</bitWidth>
  29943. </field>
  29944. <field> <name>FB31</name>
  29945. <description>Filter bits</description>
  29946. <bitOffset>31</bitOffset>
  29947. <bitWidth>1</bitWidth>
  29948. </field>
  29949. </fields>
  29950. </register>
  29951. <register> <name>F9R1</name>
  29952. <displayName>F9R1</displayName>
  29953. <description>Filter bank 9 register 1</description>
  29954. <addressOffset>0x288</addressOffset>
  29955. <size>0x20</size>
  29956. <access>read-write</access>
  29957. <resetValue>0x00000000</resetValue>
  29958. <fields>
  29959. <field> <name>FB0</name>
  29960. <description>Filter bits</description>
  29961. <bitOffset>0</bitOffset>
  29962. <bitWidth>1</bitWidth>
  29963. </field>
  29964. <field> <name>FB1</name>
  29965. <description>Filter bits</description>
  29966. <bitOffset>1</bitOffset>
  29967. <bitWidth>1</bitWidth>
  29968. </field>
  29969. <field> <name>FB2</name>
  29970. <description>Filter bits</description>
  29971. <bitOffset>2</bitOffset>
  29972. <bitWidth>1</bitWidth>
  29973. </field>
  29974. <field> <name>FB3</name>
  29975. <description>Filter bits</description>
  29976. <bitOffset>3</bitOffset>
  29977. <bitWidth>1</bitWidth>
  29978. </field>
  29979. <field> <name>FB4</name>
  29980. <description>Filter bits</description>
  29981. <bitOffset>4</bitOffset>
  29982. <bitWidth>1</bitWidth>
  29983. </field>
  29984. <field> <name>FB5</name>
  29985. <description>Filter bits</description>
  29986. <bitOffset>5</bitOffset>
  29987. <bitWidth>1</bitWidth>
  29988. </field>
  29989. <field> <name>FB6</name>
  29990. <description>Filter bits</description>
  29991. <bitOffset>6</bitOffset>
  29992. <bitWidth>1</bitWidth>
  29993. </field>
  29994. <field> <name>FB7</name>
  29995. <description>Filter bits</description>
  29996. <bitOffset>7</bitOffset>
  29997. <bitWidth>1</bitWidth>
  29998. </field>
  29999. <field> <name>FB8</name>
  30000. <description>Filter bits</description>
  30001. <bitOffset>8</bitOffset>
  30002. <bitWidth>1</bitWidth>
  30003. </field>
  30004. <field> <name>FB9</name>
  30005. <description>Filter bits</description>
  30006. <bitOffset>9</bitOffset>
  30007. <bitWidth>1</bitWidth>
  30008. </field>
  30009. <field> <name>FB10</name>
  30010. <description>Filter bits</description>
  30011. <bitOffset>10</bitOffset>
  30012. <bitWidth>1</bitWidth>
  30013. </field>
  30014. <field> <name>FB11</name>
  30015. <description>Filter bits</description>
  30016. <bitOffset>11</bitOffset>
  30017. <bitWidth>1</bitWidth>
  30018. </field>
  30019. <field> <name>FB12</name>
  30020. <description>Filter bits</description>
  30021. <bitOffset>12</bitOffset>
  30022. <bitWidth>1</bitWidth>
  30023. </field>
  30024. <field> <name>FB13</name>
  30025. <description>Filter bits</description>
  30026. <bitOffset>13</bitOffset>
  30027. <bitWidth>1</bitWidth>
  30028. </field>
  30029. <field> <name>FB14</name>
  30030. <description>Filter bits</description>
  30031. <bitOffset>14</bitOffset>
  30032. <bitWidth>1</bitWidth>
  30033. </field>
  30034. <field> <name>FB15</name>
  30035. <description>Filter bits</description>
  30036. <bitOffset>15</bitOffset>
  30037. <bitWidth>1</bitWidth>
  30038. </field>
  30039. <field> <name>FB16</name>
  30040. <description>Filter bits</description>
  30041. <bitOffset>16</bitOffset>
  30042. <bitWidth>1</bitWidth>
  30043. </field>
  30044. <field> <name>FB17</name>
  30045. <description>Filter bits</description>
  30046. <bitOffset>17</bitOffset>
  30047. <bitWidth>1</bitWidth>
  30048. </field>
  30049. <field> <name>FB18</name>
  30050. <description>Filter bits</description>
  30051. <bitOffset>18</bitOffset>
  30052. <bitWidth>1</bitWidth>
  30053. </field>
  30054. <field> <name>FB19</name>
  30055. <description>Filter bits</description>
  30056. <bitOffset>19</bitOffset>
  30057. <bitWidth>1</bitWidth>
  30058. </field>
  30059. <field> <name>FB20</name>
  30060. <description>Filter bits</description>
  30061. <bitOffset>20</bitOffset>
  30062. <bitWidth>1</bitWidth>
  30063. </field>
  30064. <field> <name>FB21</name>
  30065. <description>Filter bits</description>
  30066. <bitOffset>21</bitOffset>
  30067. <bitWidth>1</bitWidth>
  30068. </field>
  30069. <field> <name>FB22</name>
  30070. <description>Filter bits</description>
  30071. <bitOffset>22</bitOffset>
  30072. <bitWidth>1</bitWidth>
  30073. </field>
  30074. <field> <name>FB23</name>
  30075. <description>Filter bits</description>
  30076. <bitOffset>23</bitOffset>
  30077. <bitWidth>1</bitWidth>
  30078. </field>
  30079. <field> <name>FB24</name>
  30080. <description>Filter bits</description>
  30081. <bitOffset>24</bitOffset>
  30082. <bitWidth>1</bitWidth>
  30083. </field>
  30084. <field> <name>FB25</name>
  30085. <description>Filter bits</description>
  30086. <bitOffset>25</bitOffset>
  30087. <bitWidth>1</bitWidth>
  30088. </field>
  30089. <field> <name>FB26</name>
  30090. <description>Filter bits</description>
  30091. <bitOffset>26</bitOffset>
  30092. <bitWidth>1</bitWidth>
  30093. </field>
  30094. <field> <name>FB27</name>
  30095. <description>Filter bits</description>
  30096. <bitOffset>27</bitOffset>
  30097. <bitWidth>1</bitWidth>
  30098. </field>
  30099. <field> <name>FB28</name>
  30100. <description>Filter bits</description>
  30101. <bitOffset>28</bitOffset>
  30102. <bitWidth>1</bitWidth>
  30103. </field>
  30104. <field> <name>FB29</name>
  30105. <description>Filter bits</description>
  30106. <bitOffset>29</bitOffset>
  30107. <bitWidth>1</bitWidth>
  30108. </field>
  30109. <field> <name>FB30</name>
  30110. <description>Filter bits</description>
  30111. <bitOffset>30</bitOffset>
  30112. <bitWidth>1</bitWidth>
  30113. </field>
  30114. <field> <name>FB31</name>
  30115. <description>Filter bits</description>
  30116. <bitOffset>31</bitOffset>
  30117. <bitWidth>1</bitWidth>
  30118. </field>
  30119. </fields>
  30120. </register>
  30121. <register> <name>F9R2</name>
  30122. <displayName>F9R2</displayName>
  30123. <description>Filter bank 9 register 2</description>
  30124. <addressOffset>0x28C</addressOffset>
  30125. <size>0x20</size>
  30126. <access>read-write</access>
  30127. <resetValue>0x00000000</resetValue>
  30128. <fields>
  30129. <field> <name>FB0</name>
  30130. <description>Filter bits</description>
  30131. <bitOffset>0</bitOffset>
  30132. <bitWidth>1</bitWidth>
  30133. </field>
  30134. <field> <name>FB1</name>
  30135. <description>Filter bits</description>
  30136. <bitOffset>1</bitOffset>
  30137. <bitWidth>1</bitWidth>
  30138. </field>
  30139. <field> <name>FB2</name>
  30140. <description>Filter bits</description>
  30141. <bitOffset>2</bitOffset>
  30142. <bitWidth>1</bitWidth>
  30143. </field>
  30144. <field> <name>FB3</name>
  30145. <description>Filter bits</description>
  30146. <bitOffset>3</bitOffset>
  30147. <bitWidth>1</bitWidth>
  30148. </field>
  30149. <field> <name>FB4</name>
  30150. <description>Filter bits</description>
  30151. <bitOffset>4</bitOffset>
  30152. <bitWidth>1</bitWidth>
  30153. </field>
  30154. <field> <name>FB5</name>
  30155. <description>Filter bits</description>
  30156. <bitOffset>5</bitOffset>
  30157. <bitWidth>1</bitWidth>
  30158. </field>
  30159. <field> <name>FB6</name>
  30160. <description>Filter bits</description>
  30161. <bitOffset>6</bitOffset>
  30162. <bitWidth>1</bitWidth>
  30163. </field>
  30164. <field> <name>FB7</name>
  30165. <description>Filter bits</description>
  30166. <bitOffset>7</bitOffset>
  30167. <bitWidth>1</bitWidth>
  30168. </field>
  30169. <field> <name>FB8</name>
  30170. <description>Filter bits</description>
  30171. <bitOffset>8</bitOffset>
  30172. <bitWidth>1</bitWidth>
  30173. </field>
  30174. <field> <name>FB9</name>
  30175. <description>Filter bits</description>
  30176. <bitOffset>9</bitOffset>
  30177. <bitWidth>1</bitWidth>
  30178. </field>
  30179. <field> <name>FB10</name>
  30180. <description>Filter bits</description>
  30181. <bitOffset>10</bitOffset>
  30182. <bitWidth>1</bitWidth>
  30183. </field>
  30184. <field> <name>FB11</name>
  30185. <description>Filter bits</description>
  30186. <bitOffset>11</bitOffset>
  30187. <bitWidth>1</bitWidth>
  30188. </field>
  30189. <field> <name>FB12</name>
  30190. <description>Filter bits</description>
  30191. <bitOffset>12</bitOffset>
  30192. <bitWidth>1</bitWidth>
  30193. </field>
  30194. <field> <name>FB13</name>
  30195. <description>Filter bits</description>
  30196. <bitOffset>13</bitOffset>
  30197. <bitWidth>1</bitWidth>
  30198. </field>
  30199. <field> <name>FB14</name>
  30200. <description>Filter bits</description>
  30201. <bitOffset>14</bitOffset>
  30202. <bitWidth>1</bitWidth>
  30203. </field>
  30204. <field> <name>FB15</name>
  30205. <description>Filter bits</description>
  30206. <bitOffset>15</bitOffset>
  30207. <bitWidth>1</bitWidth>
  30208. </field>
  30209. <field> <name>FB16</name>
  30210. <description>Filter bits</description>
  30211. <bitOffset>16</bitOffset>
  30212. <bitWidth>1</bitWidth>
  30213. </field>
  30214. <field> <name>FB17</name>
  30215. <description>Filter bits</description>
  30216. <bitOffset>17</bitOffset>
  30217. <bitWidth>1</bitWidth>
  30218. </field>
  30219. <field> <name>FB18</name>
  30220. <description>Filter bits</description>
  30221. <bitOffset>18</bitOffset>
  30222. <bitWidth>1</bitWidth>
  30223. </field>
  30224. <field> <name>FB19</name>
  30225. <description>Filter bits</description>
  30226. <bitOffset>19</bitOffset>
  30227. <bitWidth>1</bitWidth>
  30228. </field>
  30229. <field> <name>FB20</name>
  30230. <description>Filter bits</description>
  30231. <bitOffset>20</bitOffset>
  30232. <bitWidth>1</bitWidth>
  30233. </field>
  30234. <field> <name>FB21</name>
  30235. <description>Filter bits</description>
  30236. <bitOffset>21</bitOffset>
  30237. <bitWidth>1</bitWidth>
  30238. </field>
  30239. <field> <name>FB22</name>
  30240. <description>Filter bits</description>
  30241. <bitOffset>22</bitOffset>
  30242. <bitWidth>1</bitWidth>
  30243. </field>
  30244. <field> <name>FB23</name>
  30245. <description>Filter bits</description>
  30246. <bitOffset>23</bitOffset>
  30247. <bitWidth>1</bitWidth>
  30248. </field>
  30249. <field> <name>FB24</name>
  30250. <description>Filter bits</description>
  30251. <bitOffset>24</bitOffset>
  30252. <bitWidth>1</bitWidth>
  30253. </field>
  30254. <field> <name>FB25</name>
  30255. <description>Filter bits</description>
  30256. <bitOffset>25</bitOffset>
  30257. <bitWidth>1</bitWidth>
  30258. </field>
  30259. <field> <name>FB26</name>
  30260. <description>Filter bits</description>
  30261. <bitOffset>26</bitOffset>
  30262. <bitWidth>1</bitWidth>
  30263. </field>
  30264. <field> <name>FB27</name>
  30265. <description>Filter bits</description>
  30266. <bitOffset>27</bitOffset>
  30267. <bitWidth>1</bitWidth>
  30268. </field>
  30269. <field> <name>FB28</name>
  30270. <description>Filter bits</description>
  30271. <bitOffset>28</bitOffset>
  30272. <bitWidth>1</bitWidth>
  30273. </field>
  30274. <field> <name>FB29</name>
  30275. <description>Filter bits</description>
  30276. <bitOffset>29</bitOffset>
  30277. <bitWidth>1</bitWidth>
  30278. </field>
  30279. <field> <name>FB30</name>
  30280. <description>Filter bits</description>
  30281. <bitOffset>30</bitOffset>
  30282. <bitWidth>1</bitWidth>
  30283. </field>
  30284. <field> <name>FB31</name>
  30285. <description>Filter bits</description>
  30286. <bitOffset>31</bitOffset>
  30287. <bitWidth>1</bitWidth>
  30288. </field>
  30289. </fields>
  30290. </register>
  30291. <register> <name>F10R1</name>
  30292. <displayName>F10R1</displayName>
  30293. <description>Filter bank 10 register 1</description>
  30294. <addressOffset>0x290</addressOffset>
  30295. <size>0x20</size>
  30296. <access>read-write</access>
  30297. <resetValue>0x00000000</resetValue>
  30298. <fields>
  30299. <field> <name>FB0</name>
  30300. <description>Filter bits</description>
  30301. <bitOffset>0</bitOffset>
  30302. <bitWidth>1</bitWidth>
  30303. </field>
  30304. <field> <name>FB1</name>
  30305. <description>Filter bits</description>
  30306. <bitOffset>1</bitOffset>
  30307. <bitWidth>1</bitWidth>
  30308. </field>
  30309. <field> <name>FB2</name>
  30310. <description>Filter bits</description>
  30311. <bitOffset>2</bitOffset>
  30312. <bitWidth>1</bitWidth>
  30313. </field>
  30314. <field> <name>FB3</name>
  30315. <description>Filter bits</description>
  30316. <bitOffset>3</bitOffset>
  30317. <bitWidth>1</bitWidth>
  30318. </field>
  30319. <field> <name>FB4</name>
  30320. <description>Filter bits</description>
  30321. <bitOffset>4</bitOffset>
  30322. <bitWidth>1</bitWidth>
  30323. </field>
  30324. <field> <name>FB5</name>
  30325. <description>Filter bits</description>
  30326. <bitOffset>5</bitOffset>
  30327. <bitWidth>1</bitWidth>
  30328. </field>
  30329. <field> <name>FB6</name>
  30330. <description>Filter bits</description>
  30331. <bitOffset>6</bitOffset>
  30332. <bitWidth>1</bitWidth>
  30333. </field>
  30334. <field> <name>FB7</name>
  30335. <description>Filter bits</description>
  30336. <bitOffset>7</bitOffset>
  30337. <bitWidth>1</bitWidth>
  30338. </field>
  30339. <field> <name>FB8</name>
  30340. <description>Filter bits</description>
  30341. <bitOffset>8</bitOffset>
  30342. <bitWidth>1</bitWidth>
  30343. </field>
  30344. <field> <name>FB9</name>
  30345. <description>Filter bits</description>
  30346. <bitOffset>9</bitOffset>
  30347. <bitWidth>1</bitWidth>
  30348. </field>
  30349. <field> <name>FB10</name>
  30350. <description>Filter bits</description>
  30351. <bitOffset>10</bitOffset>
  30352. <bitWidth>1</bitWidth>
  30353. </field>
  30354. <field> <name>FB11</name>
  30355. <description>Filter bits</description>
  30356. <bitOffset>11</bitOffset>
  30357. <bitWidth>1</bitWidth>
  30358. </field>
  30359. <field> <name>FB12</name>
  30360. <description>Filter bits</description>
  30361. <bitOffset>12</bitOffset>
  30362. <bitWidth>1</bitWidth>
  30363. </field>
  30364. <field> <name>FB13</name>
  30365. <description>Filter bits</description>
  30366. <bitOffset>13</bitOffset>
  30367. <bitWidth>1</bitWidth>
  30368. </field>
  30369. <field> <name>FB14</name>
  30370. <description>Filter bits</description>
  30371. <bitOffset>14</bitOffset>
  30372. <bitWidth>1</bitWidth>
  30373. </field>
  30374. <field> <name>FB15</name>
  30375. <description>Filter bits</description>
  30376. <bitOffset>15</bitOffset>
  30377. <bitWidth>1</bitWidth>
  30378. </field>
  30379. <field> <name>FB16</name>
  30380. <description>Filter bits</description>
  30381. <bitOffset>16</bitOffset>
  30382. <bitWidth>1</bitWidth>
  30383. </field>
  30384. <field> <name>FB17</name>
  30385. <description>Filter bits</description>
  30386. <bitOffset>17</bitOffset>
  30387. <bitWidth>1</bitWidth>
  30388. </field>
  30389. <field> <name>FB18</name>
  30390. <description>Filter bits</description>
  30391. <bitOffset>18</bitOffset>
  30392. <bitWidth>1</bitWidth>
  30393. </field>
  30394. <field> <name>FB19</name>
  30395. <description>Filter bits</description>
  30396. <bitOffset>19</bitOffset>
  30397. <bitWidth>1</bitWidth>
  30398. </field>
  30399. <field> <name>FB20</name>
  30400. <description>Filter bits</description>
  30401. <bitOffset>20</bitOffset>
  30402. <bitWidth>1</bitWidth>
  30403. </field>
  30404. <field> <name>FB21</name>
  30405. <description>Filter bits</description>
  30406. <bitOffset>21</bitOffset>
  30407. <bitWidth>1</bitWidth>
  30408. </field>
  30409. <field> <name>FB22</name>
  30410. <description>Filter bits</description>
  30411. <bitOffset>22</bitOffset>
  30412. <bitWidth>1</bitWidth>
  30413. </field>
  30414. <field> <name>FB23</name>
  30415. <description>Filter bits</description>
  30416. <bitOffset>23</bitOffset>
  30417. <bitWidth>1</bitWidth>
  30418. </field>
  30419. <field> <name>FB24</name>
  30420. <description>Filter bits</description>
  30421. <bitOffset>24</bitOffset>
  30422. <bitWidth>1</bitWidth>
  30423. </field>
  30424. <field> <name>FB25</name>
  30425. <description>Filter bits</description>
  30426. <bitOffset>25</bitOffset>
  30427. <bitWidth>1</bitWidth>
  30428. </field>
  30429. <field> <name>FB26</name>
  30430. <description>Filter bits</description>
  30431. <bitOffset>26</bitOffset>
  30432. <bitWidth>1</bitWidth>
  30433. </field>
  30434. <field> <name>FB27</name>
  30435. <description>Filter bits</description>
  30436. <bitOffset>27</bitOffset>
  30437. <bitWidth>1</bitWidth>
  30438. </field>
  30439. <field> <name>FB28</name>
  30440. <description>Filter bits</description>
  30441. <bitOffset>28</bitOffset>
  30442. <bitWidth>1</bitWidth>
  30443. </field>
  30444. <field> <name>FB29</name>
  30445. <description>Filter bits</description>
  30446. <bitOffset>29</bitOffset>
  30447. <bitWidth>1</bitWidth>
  30448. </field>
  30449. <field> <name>FB30</name>
  30450. <description>Filter bits</description>
  30451. <bitOffset>30</bitOffset>
  30452. <bitWidth>1</bitWidth>
  30453. </field>
  30454. <field> <name>FB31</name>
  30455. <description>Filter bits</description>
  30456. <bitOffset>31</bitOffset>
  30457. <bitWidth>1</bitWidth>
  30458. </field>
  30459. </fields>
  30460. </register>
  30461. <register> <name>F10R2</name>
  30462. <displayName>F10R2</displayName>
  30463. <description>Filter bank 10 register 2</description>
  30464. <addressOffset>0x294</addressOffset>
  30465. <size>0x20</size>
  30466. <access>read-write</access>
  30467. <resetValue>0x00000000</resetValue>
  30468. <fields>
  30469. <field> <name>FB0</name>
  30470. <description>Filter bits</description>
  30471. <bitOffset>0</bitOffset>
  30472. <bitWidth>1</bitWidth>
  30473. </field>
  30474. <field> <name>FB1</name>
  30475. <description>Filter bits</description>
  30476. <bitOffset>1</bitOffset>
  30477. <bitWidth>1</bitWidth>
  30478. </field>
  30479. <field> <name>FB2</name>
  30480. <description>Filter bits</description>
  30481. <bitOffset>2</bitOffset>
  30482. <bitWidth>1</bitWidth>
  30483. </field>
  30484. <field> <name>FB3</name>
  30485. <description>Filter bits</description>
  30486. <bitOffset>3</bitOffset>
  30487. <bitWidth>1</bitWidth>
  30488. </field>
  30489. <field> <name>FB4</name>
  30490. <description>Filter bits</description>
  30491. <bitOffset>4</bitOffset>
  30492. <bitWidth>1</bitWidth>
  30493. </field>
  30494. <field> <name>FB5</name>
  30495. <description>Filter bits</description>
  30496. <bitOffset>5</bitOffset>
  30497. <bitWidth>1</bitWidth>
  30498. </field>
  30499. <field> <name>FB6</name>
  30500. <description>Filter bits</description>
  30501. <bitOffset>6</bitOffset>
  30502. <bitWidth>1</bitWidth>
  30503. </field>
  30504. <field> <name>FB7</name>
  30505. <description>Filter bits</description>
  30506. <bitOffset>7</bitOffset>
  30507. <bitWidth>1</bitWidth>
  30508. </field>
  30509. <field> <name>FB8</name>
  30510. <description>Filter bits</description>
  30511. <bitOffset>8</bitOffset>
  30512. <bitWidth>1</bitWidth>
  30513. </field>
  30514. <field> <name>FB9</name>
  30515. <description>Filter bits</description>
  30516. <bitOffset>9</bitOffset>
  30517. <bitWidth>1</bitWidth>
  30518. </field>
  30519. <field> <name>FB10</name>
  30520. <description>Filter bits</description>
  30521. <bitOffset>10</bitOffset>
  30522. <bitWidth>1</bitWidth>
  30523. </field>
  30524. <field> <name>FB11</name>
  30525. <description>Filter bits</description>
  30526. <bitOffset>11</bitOffset>
  30527. <bitWidth>1</bitWidth>
  30528. </field>
  30529. <field> <name>FB12</name>
  30530. <description>Filter bits</description>
  30531. <bitOffset>12</bitOffset>
  30532. <bitWidth>1</bitWidth>
  30533. </field>
  30534. <field> <name>FB13</name>
  30535. <description>Filter bits</description>
  30536. <bitOffset>13</bitOffset>
  30537. <bitWidth>1</bitWidth>
  30538. </field>
  30539. <field> <name>FB14</name>
  30540. <description>Filter bits</description>
  30541. <bitOffset>14</bitOffset>
  30542. <bitWidth>1</bitWidth>
  30543. </field>
  30544. <field> <name>FB15</name>
  30545. <description>Filter bits</description>
  30546. <bitOffset>15</bitOffset>
  30547. <bitWidth>1</bitWidth>
  30548. </field>
  30549. <field> <name>FB16</name>
  30550. <description>Filter bits</description>
  30551. <bitOffset>16</bitOffset>
  30552. <bitWidth>1</bitWidth>
  30553. </field>
  30554. <field> <name>FB17</name>
  30555. <description>Filter bits</description>
  30556. <bitOffset>17</bitOffset>
  30557. <bitWidth>1</bitWidth>
  30558. </field>
  30559. <field> <name>FB18</name>
  30560. <description>Filter bits</description>
  30561. <bitOffset>18</bitOffset>
  30562. <bitWidth>1</bitWidth>
  30563. </field>
  30564. <field> <name>FB19</name>
  30565. <description>Filter bits</description>
  30566. <bitOffset>19</bitOffset>
  30567. <bitWidth>1</bitWidth>
  30568. </field>
  30569. <field> <name>FB20</name>
  30570. <description>Filter bits</description>
  30571. <bitOffset>20</bitOffset>
  30572. <bitWidth>1</bitWidth>
  30573. </field>
  30574. <field> <name>FB21</name>
  30575. <description>Filter bits</description>
  30576. <bitOffset>21</bitOffset>
  30577. <bitWidth>1</bitWidth>
  30578. </field>
  30579. <field> <name>FB22</name>
  30580. <description>Filter bits</description>
  30581. <bitOffset>22</bitOffset>
  30582. <bitWidth>1</bitWidth>
  30583. </field>
  30584. <field> <name>FB23</name>
  30585. <description>Filter bits</description>
  30586. <bitOffset>23</bitOffset>
  30587. <bitWidth>1</bitWidth>
  30588. </field>
  30589. <field> <name>FB24</name>
  30590. <description>Filter bits</description>
  30591. <bitOffset>24</bitOffset>
  30592. <bitWidth>1</bitWidth>
  30593. </field>
  30594. <field> <name>FB25</name>
  30595. <description>Filter bits</description>
  30596. <bitOffset>25</bitOffset>
  30597. <bitWidth>1</bitWidth>
  30598. </field>
  30599. <field> <name>FB26</name>
  30600. <description>Filter bits</description>
  30601. <bitOffset>26</bitOffset>
  30602. <bitWidth>1</bitWidth>
  30603. </field>
  30604. <field> <name>FB27</name>
  30605. <description>Filter bits</description>
  30606. <bitOffset>27</bitOffset>
  30607. <bitWidth>1</bitWidth>
  30608. </field>
  30609. <field> <name>FB28</name>
  30610. <description>Filter bits</description>
  30611. <bitOffset>28</bitOffset>
  30612. <bitWidth>1</bitWidth>
  30613. </field>
  30614. <field> <name>FB29</name>
  30615. <description>Filter bits</description>
  30616. <bitOffset>29</bitOffset>
  30617. <bitWidth>1</bitWidth>
  30618. </field>
  30619. <field> <name>FB30</name>
  30620. <description>Filter bits</description>
  30621. <bitOffset>30</bitOffset>
  30622. <bitWidth>1</bitWidth>
  30623. </field>
  30624. <field> <name>FB31</name>
  30625. <description>Filter bits</description>
  30626. <bitOffset>31</bitOffset>
  30627. <bitWidth>1</bitWidth>
  30628. </field>
  30629. </fields>
  30630. </register>
  30631. <register> <name>F11R1</name>
  30632. <displayName>F11R1</displayName>
  30633. <description>Filter bank 11 register 1</description>
  30634. <addressOffset>0x298</addressOffset>
  30635. <size>0x20</size>
  30636. <access>read-write</access>
  30637. <resetValue>0x00000000</resetValue>
  30638. <fields>
  30639. <field> <name>FB0</name>
  30640. <description>Filter bits</description>
  30641. <bitOffset>0</bitOffset>
  30642. <bitWidth>1</bitWidth>
  30643. </field>
  30644. <field> <name>FB1</name>
  30645. <description>Filter bits</description>
  30646. <bitOffset>1</bitOffset>
  30647. <bitWidth>1</bitWidth>
  30648. </field>
  30649. <field> <name>FB2</name>
  30650. <description>Filter bits</description>
  30651. <bitOffset>2</bitOffset>
  30652. <bitWidth>1</bitWidth>
  30653. </field>
  30654. <field> <name>FB3</name>
  30655. <description>Filter bits</description>
  30656. <bitOffset>3</bitOffset>
  30657. <bitWidth>1</bitWidth>
  30658. </field>
  30659. <field> <name>FB4</name>
  30660. <description>Filter bits</description>
  30661. <bitOffset>4</bitOffset>
  30662. <bitWidth>1</bitWidth>
  30663. </field>
  30664. <field> <name>FB5</name>
  30665. <description>Filter bits</description>
  30666. <bitOffset>5</bitOffset>
  30667. <bitWidth>1</bitWidth>
  30668. </field>
  30669. <field> <name>FB6</name>
  30670. <description>Filter bits</description>
  30671. <bitOffset>6</bitOffset>
  30672. <bitWidth>1</bitWidth>
  30673. </field>
  30674. <field> <name>FB7</name>
  30675. <description>Filter bits</description>
  30676. <bitOffset>7</bitOffset>
  30677. <bitWidth>1</bitWidth>
  30678. </field>
  30679. <field> <name>FB8</name>
  30680. <description>Filter bits</description>
  30681. <bitOffset>8</bitOffset>
  30682. <bitWidth>1</bitWidth>
  30683. </field>
  30684. <field> <name>FB9</name>
  30685. <description>Filter bits</description>
  30686. <bitOffset>9</bitOffset>
  30687. <bitWidth>1</bitWidth>
  30688. </field>
  30689. <field> <name>FB10</name>
  30690. <description>Filter bits</description>
  30691. <bitOffset>10</bitOffset>
  30692. <bitWidth>1</bitWidth>
  30693. </field>
  30694. <field> <name>FB11</name>
  30695. <description>Filter bits</description>
  30696. <bitOffset>11</bitOffset>
  30697. <bitWidth>1</bitWidth>
  30698. </field>
  30699. <field> <name>FB12</name>
  30700. <description>Filter bits</description>
  30701. <bitOffset>12</bitOffset>
  30702. <bitWidth>1</bitWidth>
  30703. </field>
  30704. <field> <name>FB13</name>
  30705. <description>Filter bits</description>
  30706. <bitOffset>13</bitOffset>
  30707. <bitWidth>1</bitWidth>
  30708. </field>
  30709. <field> <name>FB14</name>
  30710. <description>Filter bits</description>
  30711. <bitOffset>14</bitOffset>
  30712. <bitWidth>1</bitWidth>
  30713. </field>
  30714. <field> <name>FB15</name>
  30715. <description>Filter bits</description>
  30716. <bitOffset>15</bitOffset>
  30717. <bitWidth>1</bitWidth>
  30718. </field>
  30719. <field> <name>FB16</name>
  30720. <description>Filter bits</description>
  30721. <bitOffset>16</bitOffset>
  30722. <bitWidth>1</bitWidth>
  30723. </field>
  30724. <field> <name>FB17</name>
  30725. <description>Filter bits</description>
  30726. <bitOffset>17</bitOffset>
  30727. <bitWidth>1</bitWidth>
  30728. </field>
  30729. <field> <name>FB18</name>
  30730. <description>Filter bits</description>
  30731. <bitOffset>18</bitOffset>
  30732. <bitWidth>1</bitWidth>
  30733. </field>
  30734. <field> <name>FB19</name>
  30735. <description>Filter bits</description>
  30736. <bitOffset>19</bitOffset>
  30737. <bitWidth>1</bitWidth>
  30738. </field>
  30739. <field> <name>FB20</name>
  30740. <description>Filter bits</description>
  30741. <bitOffset>20</bitOffset>
  30742. <bitWidth>1</bitWidth>
  30743. </field>
  30744. <field> <name>FB21</name>
  30745. <description>Filter bits</description>
  30746. <bitOffset>21</bitOffset>
  30747. <bitWidth>1</bitWidth>
  30748. </field>
  30749. <field> <name>FB22</name>
  30750. <description>Filter bits</description>
  30751. <bitOffset>22</bitOffset>
  30752. <bitWidth>1</bitWidth>
  30753. </field>
  30754. <field> <name>FB23</name>
  30755. <description>Filter bits</description>
  30756. <bitOffset>23</bitOffset>
  30757. <bitWidth>1</bitWidth>
  30758. </field>
  30759. <field> <name>FB24</name>
  30760. <description>Filter bits</description>
  30761. <bitOffset>24</bitOffset>
  30762. <bitWidth>1</bitWidth>
  30763. </field>
  30764. <field> <name>FB25</name>
  30765. <description>Filter bits</description>
  30766. <bitOffset>25</bitOffset>
  30767. <bitWidth>1</bitWidth>
  30768. </field>
  30769. <field> <name>FB26</name>
  30770. <description>Filter bits</description>
  30771. <bitOffset>26</bitOffset>
  30772. <bitWidth>1</bitWidth>
  30773. </field>
  30774. <field> <name>FB27</name>
  30775. <description>Filter bits</description>
  30776. <bitOffset>27</bitOffset>
  30777. <bitWidth>1</bitWidth>
  30778. </field>
  30779. <field> <name>FB28</name>
  30780. <description>Filter bits</description>
  30781. <bitOffset>28</bitOffset>
  30782. <bitWidth>1</bitWidth>
  30783. </field>
  30784. <field> <name>FB29</name>
  30785. <description>Filter bits</description>
  30786. <bitOffset>29</bitOffset>
  30787. <bitWidth>1</bitWidth>
  30788. </field>
  30789. <field> <name>FB30</name>
  30790. <description>Filter bits</description>
  30791. <bitOffset>30</bitOffset>
  30792. <bitWidth>1</bitWidth>
  30793. </field>
  30794. <field> <name>FB31</name>
  30795. <description>Filter bits</description>
  30796. <bitOffset>31</bitOffset>
  30797. <bitWidth>1</bitWidth>
  30798. </field>
  30799. </fields>
  30800. </register>
  30801. <register> <name>F11R2</name>
  30802. <displayName>F11R2</displayName>
  30803. <description>Filter bank 11 register 2</description>
  30804. <addressOffset>0x29C</addressOffset>
  30805. <size>0x20</size>
  30806. <access>read-write</access>
  30807. <resetValue>0x00000000</resetValue>
  30808. <fields>
  30809. <field> <name>FB0</name>
  30810. <description>Filter bits</description>
  30811. <bitOffset>0</bitOffset>
  30812. <bitWidth>1</bitWidth>
  30813. </field>
  30814. <field> <name>FB1</name>
  30815. <description>Filter bits</description>
  30816. <bitOffset>1</bitOffset>
  30817. <bitWidth>1</bitWidth>
  30818. </field>
  30819. <field> <name>FB2</name>
  30820. <description>Filter bits</description>
  30821. <bitOffset>2</bitOffset>
  30822. <bitWidth>1</bitWidth>
  30823. </field>
  30824. <field> <name>FB3</name>
  30825. <description>Filter bits</description>
  30826. <bitOffset>3</bitOffset>
  30827. <bitWidth>1</bitWidth>
  30828. </field>
  30829. <field> <name>FB4</name>
  30830. <description>Filter bits</description>
  30831. <bitOffset>4</bitOffset>
  30832. <bitWidth>1</bitWidth>
  30833. </field>
  30834. <field> <name>FB5</name>
  30835. <description>Filter bits</description>
  30836. <bitOffset>5</bitOffset>
  30837. <bitWidth>1</bitWidth>
  30838. </field>
  30839. <field> <name>FB6</name>
  30840. <description>Filter bits</description>
  30841. <bitOffset>6</bitOffset>
  30842. <bitWidth>1</bitWidth>
  30843. </field>
  30844. <field> <name>FB7</name>
  30845. <description>Filter bits</description>
  30846. <bitOffset>7</bitOffset>
  30847. <bitWidth>1</bitWidth>
  30848. </field>
  30849. <field> <name>FB8</name>
  30850. <description>Filter bits</description>
  30851. <bitOffset>8</bitOffset>
  30852. <bitWidth>1</bitWidth>
  30853. </field>
  30854. <field> <name>FB9</name>
  30855. <description>Filter bits</description>
  30856. <bitOffset>9</bitOffset>
  30857. <bitWidth>1</bitWidth>
  30858. </field>
  30859. <field> <name>FB10</name>
  30860. <description>Filter bits</description>
  30861. <bitOffset>10</bitOffset>
  30862. <bitWidth>1</bitWidth>
  30863. </field>
  30864. <field> <name>FB11</name>
  30865. <description>Filter bits</description>
  30866. <bitOffset>11</bitOffset>
  30867. <bitWidth>1</bitWidth>
  30868. </field>
  30869. <field> <name>FB12</name>
  30870. <description>Filter bits</description>
  30871. <bitOffset>12</bitOffset>
  30872. <bitWidth>1</bitWidth>
  30873. </field>
  30874. <field> <name>FB13</name>
  30875. <description>Filter bits</description>
  30876. <bitOffset>13</bitOffset>
  30877. <bitWidth>1</bitWidth>
  30878. </field>
  30879. <field> <name>FB14</name>
  30880. <description>Filter bits</description>
  30881. <bitOffset>14</bitOffset>
  30882. <bitWidth>1</bitWidth>
  30883. </field>
  30884. <field> <name>FB15</name>
  30885. <description>Filter bits</description>
  30886. <bitOffset>15</bitOffset>
  30887. <bitWidth>1</bitWidth>
  30888. </field>
  30889. <field> <name>FB16</name>
  30890. <description>Filter bits</description>
  30891. <bitOffset>16</bitOffset>
  30892. <bitWidth>1</bitWidth>
  30893. </field>
  30894. <field> <name>FB17</name>
  30895. <description>Filter bits</description>
  30896. <bitOffset>17</bitOffset>
  30897. <bitWidth>1</bitWidth>
  30898. </field>
  30899. <field> <name>FB18</name>
  30900. <description>Filter bits</description>
  30901. <bitOffset>18</bitOffset>
  30902. <bitWidth>1</bitWidth>
  30903. </field>
  30904. <field> <name>FB19</name>
  30905. <description>Filter bits</description>
  30906. <bitOffset>19</bitOffset>
  30907. <bitWidth>1</bitWidth>
  30908. </field>
  30909. <field> <name>FB20</name>
  30910. <description>Filter bits</description>
  30911. <bitOffset>20</bitOffset>
  30912. <bitWidth>1</bitWidth>
  30913. </field>
  30914. <field> <name>FB21</name>
  30915. <description>Filter bits</description>
  30916. <bitOffset>21</bitOffset>
  30917. <bitWidth>1</bitWidth>
  30918. </field>
  30919. <field> <name>FB22</name>
  30920. <description>Filter bits</description>
  30921. <bitOffset>22</bitOffset>
  30922. <bitWidth>1</bitWidth>
  30923. </field>
  30924. <field> <name>FB23</name>
  30925. <description>Filter bits</description>
  30926. <bitOffset>23</bitOffset>
  30927. <bitWidth>1</bitWidth>
  30928. </field>
  30929. <field> <name>FB24</name>
  30930. <description>Filter bits</description>
  30931. <bitOffset>24</bitOffset>
  30932. <bitWidth>1</bitWidth>
  30933. </field>
  30934. <field> <name>FB25</name>
  30935. <description>Filter bits</description>
  30936. <bitOffset>25</bitOffset>
  30937. <bitWidth>1</bitWidth>
  30938. </field>
  30939. <field> <name>FB26</name>
  30940. <description>Filter bits</description>
  30941. <bitOffset>26</bitOffset>
  30942. <bitWidth>1</bitWidth>
  30943. </field>
  30944. <field> <name>FB27</name>
  30945. <description>Filter bits</description>
  30946. <bitOffset>27</bitOffset>
  30947. <bitWidth>1</bitWidth>
  30948. </field>
  30949. <field> <name>FB28</name>
  30950. <description>Filter bits</description>
  30951. <bitOffset>28</bitOffset>
  30952. <bitWidth>1</bitWidth>
  30953. </field>
  30954. <field> <name>FB29</name>
  30955. <description>Filter bits</description>
  30956. <bitOffset>29</bitOffset>
  30957. <bitWidth>1</bitWidth>
  30958. </field>
  30959. <field> <name>FB30</name>
  30960. <description>Filter bits</description>
  30961. <bitOffset>30</bitOffset>
  30962. <bitWidth>1</bitWidth>
  30963. </field>
  30964. <field> <name>FB31</name>
  30965. <description>Filter bits</description>
  30966. <bitOffset>31</bitOffset>
  30967. <bitWidth>1</bitWidth>
  30968. </field>
  30969. </fields>
  30970. </register>
  30971. <register> <name>F12R1</name>
  30972. <displayName>F12R1</displayName>
  30973. <description>Filter bank 4 register 1</description>
  30974. <addressOffset>0x2A0</addressOffset>
  30975. <size>0x20</size>
  30976. <access>read-write</access>
  30977. <resetValue>0x00000000</resetValue>
  30978. <fields>
  30979. <field> <name>FB0</name>
  30980. <description>Filter bits</description>
  30981. <bitOffset>0</bitOffset>
  30982. <bitWidth>1</bitWidth>
  30983. </field>
  30984. <field> <name>FB1</name>
  30985. <description>Filter bits</description>
  30986. <bitOffset>1</bitOffset>
  30987. <bitWidth>1</bitWidth>
  30988. </field>
  30989. <field> <name>FB2</name>
  30990. <description>Filter bits</description>
  30991. <bitOffset>2</bitOffset>
  30992. <bitWidth>1</bitWidth>
  30993. </field>
  30994. <field> <name>FB3</name>
  30995. <description>Filter bits</description>
  30996. <bitOffset>3</bitOffset>
  30997. <bitWidth>1</bitWidth>
  30998. </field>
  30999. <field> <name>FB4</name>
  31000. <description>Filter bits</description>
  31001. <bitOffset>4</bitOffset>
  31002. <bitWidth>1</bitWidth>
  31003. </field>
  31004. <field> <name>FB5</name>
  31005. <description>Filter bits</description>
  31006. <bitOffset>5</bitOffset>
  31007. <bitWidth>1</bitWidth>
  31008. </field>
  31009. <field> <name>FB6</name>
  31010. <description>Filter bits</description>
  31011. <bitOffset>6</bitOffset>
  31012. <bitWidth>1</bitWidth>
  31013. </field>
  31014. <field> <name>FB7</name>
  31015. <description>Filter bits</description>
  31016. <bitOffset>7</bitOffset>
  31017. <bitWidth>1</bitWidth>
  31018. </field>
  31019. <field> <name>FB8</name>
  31020. <description>Filter bits</description>
  31021. <bitOffset>8</bitOffset>
  31022. <bitWidth>1</bitWidth>
  31023. </field>
  31024. <field> <name>FB9</name>
  31025. <description>Filter bits</description>
  31026. <bitOffset>9</bitOffset>
  31027. <bitWidth>1</bitWidth>
  31028. </field>
  31029. <field> <name>FB10</name>
  31030. <description>Filter bits</description>
  31031. <bitOffset>10</bitOffset>
  31032. <bitWidth>1</bitWidth>
  31033. </field>
  31034. <field> <name>FB11</name>
  31035. <description>Filter bits</description>
  31036. <bitOffset>11</bitOffset>
  31037. <bitWidth>1</bitWidth>
  31038. </field>
  31039. <field> <name>FB12</name>
  31040. <description>Filter bits</description>
  31041. <bitOffset>12</bitOffset>
  31042. <bitWidth>1</bitWidth>
  31043. </field>
  31044. <field> <name>FB13</name>
  31045. <description>Filter bits</description>
  31046. <bitOffset>13</bitOffset>
  31047. <bitWidth>1</bitWidth>
  31048. </field>
  31049. <field> <name>FB14</name>
  31050. <description>Filter bits</description>
  31051. <bitOffset>14</bitOffset>
  31052. <bitWidth>1</bitWidth>
  31053. </field>
  31054. <field> <name>FB15</name>
  31055. <description>Filter bits</description>
  31056. <bitOffset>15</bitOffset>
  31057. <bitWidth>1</bitWidth>
  31058. </field>
  31059. <field> <name>FB16</name>
  31060. <description>Filter bits</description>
  31061. <bitOffset>16</bitOffset>
  31062. <bitWidth>1</bitWidth>
  31063. </field>
  31064. <field> <name>FB17</name>
  31065. <description>Filter bits</description>
  31066. <bitOffset>17</bitOffset>
  31067. <bitWidth>1</bitWidth>
  31068. </field>
  31069. <field> <name>FB18</name>
  31070. <description>Filter bits</description>
  31071. <bitOffset>18</bitOffset>
  31072. <bitWidth>1</bitWidth>
  31073. </field>
  31074. <field> <name>FB19</name>
  31075. <description>Filter bits</description>
  31076. <bitOffset>19</bitOffset>
  31077. <bitWidth>1</bitWidth>
  31078. </field>
  31079. <field> <name>FB20</name>
  31080. <description>Filter bits</description>
  31081. <bitOffset>20</bitOffset>
  31082. <bitWidth>1</bitWidth>
  31083. </field>
  31084. <field> <name>FB21</name>
  31085. <description>Filter bits</description>
  31086. <bitOffset>21</bitOffset>
  31087. <bitWidth>1</bitWidth>
  31088. </field>
  31089. <field> <name>FB22</name>
  31090. <description>Filter bits</description>
  31091. <bitOffset>22</bitOffset>
  31092. <bitWidth>1</bitWidth>
  31093. </field>
  31094. <field> <name>FB23</name>
  31095. <description>Filter bits</description>
  31096. <bitOffset>23</bitOffset>
  31097. <bitWidth>1</bitWidth>
  31098. </field>
  31099. <field> <name>FB24</name>
  31100. <description>Filter bits</description>
  31101. <bitOffset>24</bitOffset>
  31102. <bitWidth>1</bitWidth>
  31103. </field>
  31104. <field> <name>FB25</name>
  31105. <description>Filter bits</description>
  31106. <bitOffset>25</bitOffset>
  31107. <bitWidth>1</bitWidth>
  31108. </field>
  31109. <field> <name>FB26</name>
  31110. <description>Filter bits</description>
  31111. <bitOffset>26</bitOffset>
  31112. <bitWidth>1</bitWidth>
  31113. </field>
  31114. <field> <name>FB27</name>
  31115. <description>Filter bits</description>
  31116. <bitOffset>27</bitOffset>
  31117. <bitWidth>1</bitWidth>
  31118. </field>
  31119. <field> <name>FB28</name>
  31120. <description>Filter bits</description>
  31121. <bitOffset>28</bitOffset>
  31122. <bitWidth>1</bitWidth>
  31123. </field>
  31124. <field> <name>FB29</name>
  31125. <description>Filter bits</description>
  31126. <bitOffset>29</bitOffset>
  31127. <bitWidth>1</bitWidth>
  31128. </field>
  31129. <field> <name>FB30</name>
  31130. <description>Filter bits</description>
  31131. <bitOffset>30</bitOffset>
  31132. <bitWidth>1</bitWidth>
  31133. </field>
  31134. <field> <name>FB31</name>
  31135. <description>Filter bits</description>
  31136. <bitOffset>31</bitOffset>
  31137. <bitWidth>1</bitWidth>
  31138. </field>
  31139. </fields>
  31140. </register>
  31141. <register> <name>F12R2</name>
  31142. <displayName>F12R2</displayName>
  31143. <description>Filter bank 12 register 2</description>
  31144. <addressOffset>0x2A4</addressOffset>
  31145. <size>0x20</size>
  31146. <access>read-write</access>
  31147. <resetValue>0x00000000</resetValue>
  31148. <fields>
  31149. <field> <name>FB0</name>
  31150. <description>Filter bits</description>
  31151. <bitOffset>0</bitOffset>
  31152. <bitWidth>1</bitWidth>
  31153. </field>
  31154. <field> <name>FB1</name>
  31155. <description>Filter bits</description>
  31156. <bitOffset>1</bitOffset>
  31157. <bitWidth>1</bitWidth>
  31158. </field>
  31159. <field> <name>FB2</name>
  31160. <description>Filter bits</description>
  31161. <bitOffset>2</bitOffset>
  31162. <bitWidth>1</bitWidth>
  31163. </field>
  31164. <field> <name>FB3</name>
  31165. <description>Filter bits</description>
  31166. <bitOffset>3</bitOffset>
  31167. <bitWidth>1</bitWidth>
  31168. </field>
  31169. <field> <name>FB4</name>
  31170. <description>Filter bits</description>
  31171. <bitOffset>4</bitOffset>
  31172. <bitWidth>1</bitWidth>
  31173. </field>
  31174. <field> <name>FB5</name>
  31175. <description>Filter bits</description>
  31176. <bitOffset>5</bitOffset>
  31177. <bitWidth>1</bitWidth>
  31178. </field>
  31179. <field> <name>FB6</name>
  31180. <description>Filter bits</description>
  31181. <bitOffset>6</bitOffset>
  31182. <bitWidth>1</bitWidth>
  31183. </field>
  31184. <field> <name>FB7</name>
  31185. <description>Filter bits</description>
  31186. <bitOffset>7</bitOffset>
  31187. <bitWidth>1</bitWidth>
  31188. </field>
  31189. <field> <name>FB8</name>
  31190. <description>Filter bits</description>
  31191. <bitOffset>8</bitOffset>
  31192. <bitWidth>1</bitWidth>
  31193. </field>
  31194. <field> <name>FB9</name>
  31195. <description>Filter bits</description>
  31196. <bitOffset>9</bitOffset>
  31197. <bitWidth>1</bitWidth>
  31198. </field>
  31199. <field> <name>FB10</name>
  31200. <description>Filter bits</description>
  31201. <bitOffset>10</bitOffset>
  31202. <bitWidth>1</bitWidth>
  31203. </field>
  31204. <field> <name>FB11</name>
  31205. <description>Filter bits</description>
  31206. <bitOffset>11</bitOffset>
  31207. <bitWidth>1</bitWidth>
  31208. </field>
  31209. <field> <name>FB12</name>
  31210. <description>Filter bits</description>
  31211. <bitOffset>12</bitOffset>
  31212. <bitWidth>1</bitWidth>
  31213. </field>
  31214. <field> <name>FB13</name>
  31215. <description>Filter bits</description>
  31216. <bitOffset>13</bitOffset>
  31217. <bitWidth>1</bitWidth>
  31218. </field>
  31219. <field> <name>FB14</name>
  31220. <description>Filter bits</description>
  31221. <bitOffset>14</bitOffset>
  31222. <bitWidth>1</bitWidth>
  31223. </field>
  31224. <field> <name>FB15</name>
  31225. <description>Filter bits</description>
  31226. <bitOffset>15</bitOffset>
  31227. <bitWidth>1</bitWidth>
  31228. </field>
  31229. <field> <name>FB16</name>
  31230. <description>Filter bits</description>
  31231. <bitOffset>16</bitOffset>
  31232. <bitWidth>1</bitWidth>
  31233. </field>
  31234. <field> <name>FB17</name>
  31235. <description>Filter bits</description>
  31236. <bitOffset>17</bitOffset>
  31237. <bitWidth>1</bitWidth>
  31238. </field>
  31239. <field> <name>FB18</name>
  31240. <description>Filter bits</description>
  31241. <bitOffset>18</bitOffset>
  31242. <bitWidth>1</bitWidth>
  31243. </field>
  31244. <field> <name>FB19</name>
  31245. <description>Filter bits</description>
  31246. <bitOffset>19</bitOffset>
  31247. <bitWidth>1</bitWidth>
  31248. </field>
  31249. <field> <name>FB20</name>
  31250. <description>Filter bits</description>
  31251. <bitOffset>20</bitOffset>
  31252. <bitWidth>1</bitWidth>
  31253. </field>
  31254. <field> <name>FB21</name>
  31255. <description>Filter bits</description>
  31256. <bitOffset>21</bitOffset>
  31257. <bitWidth>1</bitWidth>
  31258. </field>
  31259. <field> <name>FB22</name>
  31260. <description>Filter bits</description>
  31261. <bitOffset>22</bitOffset>
  31262. <bitWidth>1</bitWidth>
  31263. </field>
  31264. <field> <name>FB23</name>
  31265. <description>Filter bits</description>
  31266. <bitOffset>23</bitOffset>
  31267. <bitWidth>1</bitWidth>
  31268. </field>
  31269. <field> <name>FB24</name>
  31270. <description>Filter bits</description>
  31271. <bitOffset>24</bitOffset>
  31272. <bitWidth>1</bitWidth>
  31273. </field>
  31274. <field> <name>FB25</name>
  31275. <description>Filter bits</description>
  31276. <bitOffset>25</bitOffset>
  31277. <bitWidth>1</bitWidth>
  31278. </field>
  31279. <field> <name>FB26</name>
  31280. <description>Filter bits</description>
  31281. <bitOffset>26</bitOffset>
  31282. <bitWidth>1</bitWidth>
  31283. </field>
  31284. <field> <name>FB27</name>
  31285. <description>Filter bits</description>
  31286. <bitOffset>27</bitOffset>
  31287. <bitWidth>1</bitWidth>
  31288. </field>
  31289. <field> <name>FB28</name>
  31290. <description>Filter bits</description>
  31291. <bitOffset>28</bitOffset>
  31292. <bitWidth>1</bitWidth>
  31293. </field>
  31294. <field> <name>FB29</name>
  31295. <description>Filter bits</description>
  31296. <bitOffset>29</bitOffset>
  31297. <bitWidth>1</bitWidth>
  31298. </field>
  31299. <field> <name>FB30</name>
  31300. <description>Filter bits</description>
  31301. <bitOffset>30</bitOffset>
  31302. <bitWidth>1</bitWidth>
  31303. </field>
  31304. <field> <name>FB31</name>
  31305. <description>Filter bits</description>
  31306. <bitOffset>31</bitOffset>
  31307. <bitWidth>1</bitWidth>
  31308. </field>
  31309. </fields>
  31310. </register>
  31311. <register> <name>F13R1</name>
  31312. <displayName>F13R1</displayName>
  31313. <description>Filter bank 13 register 1</description>
  31314. <addressOffset>0x2A8</addressOffset>
  31315. <size>0x20</size>
  31316. <access>read-write</access>
  31317. <resetValue>0x00000000</resetValue>
  31318. <fields>
  31319. <field> <name>FB0</name>
  31320. <description>Filter bits</description>
  31321. <bitOffset>0</bitOffset>
  31322. <bitWidth>1</bitWidth>
  31323. </field>
  31324. <field> <name>FB1</name>
  31325. <description>Filter bits</description>
  31326. <bitOffset>1</bitOffset>
  31327. <bitWidth>1</bitWidth>
  31328. </field>
  31329. <field> <name>FB2</name>
  31330. <description>Filter bits</description>
  31331. <bitOffset>2</bitOffset>
  31332. <bitWidth>1</bitWidth>
  31333. </field>
  31334. <field> <name>FB3</name>
  31335. <description>Filter bits</description>
  31336. <bitOffset>3</bitOffset>
  31337. <bitWidth>1</bitWidth>
  31338. </field>
  31339. <field> <name>FB4</name>
  31340. <description>Filter bits</description>
  31341. <bitOffset>4</bitOffset>
  31342. <bitWidth>1</bitWidth>
  31343. </field>
  31344. <field> <name>FB5</name>
  31345. <description>Filter bits</description>
  31346. <bitOffset>5</bitOffset>
  31347. <bitWidth>1</bitWidth>
  31348. </field>
  31349. <field> <name>FB6</name>
  31350. <description>Filter bits</description>
  31351. <bitOffset>6</bitOffset>
  31352. <bitWidth>1</bitWidth>
  31353. </field>
  31354. <field> <name>FB7</name>
  31355. <description>Filter bits</description>
  31356. <bitOffset>7</bitOffset>
  31357. <bitWidth>1</bitWidth>
  31358. </field>
  31359. <field> <name>FB8</name>
  31360. <description>Filter bits</description>
  31361. <bitOffset>8</bitOffset>
  31362. <bitWidth>1</bitWidth>
  31363. </field>
  31364. <field> <name>FB9</name>
  31365. <description>Filter bits</description>
  31366. <bitOffset>9</bitOffset>
  31367. <bitWidth>1</bitWidth>
  31368. </field>
  31369. <field> <name>FB10</name>
  31370. <description>Filter bits</description>
  31371. <bitOffset>10</bitOffset>
  31372. <bitWidth>1</bitWidth>
  31373. </field>
  31374. <field> <name>FB11</name>
  31375. <description>Filter bits</description>
  31376. <bitOffset>11</bitOffset>
  31377. <bitWidth>1</bitWidth>
  31378. </field>
  31379. <field> <name>FB12</name>
  31380. <description>Filter bits</description>
  31381. <bitOffset>12</bitOffset>
  31382. <bitWidth>1</bitWidth>
  31383. </field>
  31384. <field> <name>FB13</name>
  31385. <description>Filter bits</description>
  31386. <bitOffset>13</bitOffset>
  31387. <bitWidth>1</bitWidth>
  31388. </field>
  31389. <field> <name>FB14</name>
  31390. <description>Filter bits</description>
  31391. <bitOffset>14</bitOffset>
  31392. <bitWidth>1</bitWidth>
  31393. </field>
  31394. <field> <name>FB15</name>
  31395. <description>Filter bits</description>
  31396. <bitOffset>15</bitOffset>
  31397. <bitWidth>1</bitWidth>
  31398. </field>
  31399. <field> <name>FB16</name>
  31400. <description>Filter bits</description>
  31401. <bitOffset>16</bitOffset>
  31402. <bitWidth>1</bitWidth>
  31403. </field>
  31404. <field> <name>FB17</name>
  31405. <description>Filter bits</description>
  31406. <bitOffset>17</bitOffset>
  31407. <bitWidth>1</bitWidth>
  31408. </field>
  31409. <field> <name>FB18</name>
  31410. <description>Filter bits</description>
  31411. <bitOffset>18</bitOffset>
  31412. <bitWidth>1</bitWidth>
  31413. </field>
  31414. <field> <name>FB19</name>
  31415. <description>Filter bits</description>
  31416. <bitOffset>19</bitOffset>
  31417. <bitWidth>1</bitWidth>
  31418. </field>
  31419. <field> <name>FB20</name>
  31420. <description>Filter bits</description>
  31421. <bitOffset>20</bitOffset>
  31422. <bitWidth>1</bitWidth>
  31423. </field>
  31424. <field> <name>FB21</name>
  31425. <description>Filter bits</description>
  31426. <bitOffset>21</bitOffset>
  31427. <bitWidth>1</bitWidth>
  31428. </field>
  31429. <field> <name>FB22</name>
  31430. <description>Filter bits</description>
  31431. <bitOffset>22</bitOffset>
  31432. <bitWidth>1</bitWidth>
  31433. </field>
  31434. <field> <name>FB23</name>
  31435. <description>Filter bits</description>
  31436. <bitOffset>23</bitOffset>
  31437. <bitWidth>1</bitWidth>
  31438. </field>
  31439. <field> <name>FB24</name>
  31440. <description>Filter bits</description>
  31441. <bitOffset>24</bitOffset>
  31442. <bitWidth>1</bitWidth>
  31443. </field>
  31444. <field> <name>FB25</name>
  31445. <description>Filter bits</description>
  31446. <bitOffset>25</bitOffset>
  31447. <bitWidth>1</bitWidth>
  31448. </field>
  31449. <field> <name>FB26</name>
  31450. <description>Filter bits</description>
  31451. <bitOffset>26</bitOffset>
  31452. <bitWidth>1</bitWidth>
  31453. </field>
  31454. <field> <name>FB27</name>
  31455. <description>Filter bits</description>
  31456. <bitOffset>27</bitOffset>
  31457. <bitWidth>1</bitWidth>
  31458. </field>
  31459. <field> <name>FB28</name>
  31460. <description>Filter bits</description>
  31461. <bitOffset>28</bitOffset>
  31462. <bitWidth>1</bitWidth>
  31463. </field>
  31464. <field> <name>FB29</name>
  31465. <description>Filter bits</description>
  31466. <bitOffset>29</bitOffset>
  31467. <bitWidth>1</bitWidth>
  31468. </field>
  31469. <field> <name>FB30</name>
  31470. <description>Filter bits</description>
  31471. <bitOffset>30</bitOffset>
  31472. <bitWidth>1</bitWidth>
  31473. </field>
  31474. <field> <name>FB31</name>
  31475. <description>Filter bits</description>
  31476. <bitOffset>31</bitOffset>
  31477. <bitWidth>1</bitWidth>
  31478. </field>
  31479. </fields>
  31480. </register>
  31481. <register> <name>F13R2</name>
  31482. <displayName>F13R2</displayName>
  31483. <description>Filter bank 13 register 2</description>
  31484. <addressOffset>0x2AC</addressOffset>
  31485. <size>0x20</size>
  31486. <access>read-write</access>
  31487. <resetValue>0x00000000</resetValue>
  31488. <fields>
  31489. <field> <name>FB0</name>
  31490. <description>Filter bits</description>
  31491. <bitOffset>0</bitOffset>
  31492. <bitWidth>1</bitWidth>
  31493. </field>
  31494. <field> <name>FB1</name>
  31495. <description>Filter bits</description>
  31496. <bitOffset>1</bitOffset>
  31497. <bitWidth>1</bitWidth>
  31498. </field>
  31499. <field> <name>FB2</name>
  31500. <description>Filter bits</description>
  31501. <bitOffset>2</bitOffset>
  31502. <bitWidth>1</bitWidth>
  31503. </field>
  31504. <field> <name>FB3</name>
  31505. <description>Filter bits</description>
  31506. <bitOffset>3</bitOffset>
  31507. <bitWidth>1</bitWidth>
  31508. </field>
  31509. <field> <name>FB4</name>
  31510. <description>Filter bits</description>
  31511. <bitOffset>4</bitOffset>
  31512. <bitWidth>1</bitWidth>
  31513. </field>
  31514. <field> <name>FB5</name>
  31515. <description>Filter bits</description>
  31516. <bitOffset>5</bitOffset>
  31517. <bitWidth>1</bitWidth>
  31518. </field>
  31519. <field> <name>FB6</name>
  31520. <description>Filter bits</description>
  31521. <bitOffset>6</bitOffset>
  31522. <bitWidth>1</bitWidth>
  31523. </field>
  31524. <field> <name>FB7</name>
  31525. <description>Filter bits</description>
  31526. <bitOffset>7</bitOffset>
  31527. <bitWidth>1</bitWidth>
  31528. </field>
  31529. <field> <name>FB8</name>
  31530. <description>Filter bits</description>
  31531. <bitOffset>8</bitOffset>
  31532. <bitWidth>1</bitWidth>
  31533. </field>
  31534. <field> <name>FB9</name>
  31535. <description>Filter bits</description>
  31536. <bitOffset>9</bitOffset>
  31537. <bitWidth>1</bitWidth>
  31538. </field>
  31539. <field> <name>FB10</name>
  31540. <description>Filter bits</description>
  31541. <bitOffset>10</bitOffset>
  31542. <bitWidth>1</bitWidth>
  31543. </field>
  31544. <field> <name>FB11</name>
  31545. <description>Filter bits</description>
  31546. <bitOffset>11</bitOffset>
  31547. <bitWidth>1</bitWidth>
  31548. </field>
  31549. <field> <name>FB12</name>
  31550. <description>Filter bits</description>
  31551. <bitOffset>12</bitOffset>
  31552. <bitWidth>1</bitWidth>
  31553. </field>
  31554. <field> <name>FB13</name>
  31555. <description>Filter bits</description>
  31556. <bitOffset>13</bitOffset>
  31557. <bitWidth>1</bitWidth>
  31558. </field>
  31559. <field> <name>FB14</name>
  31560. <description>Filter bits</description>
  31561. <bitOffset>14</bitOffset>
  31562. <bitWidth>1</bitWidth>
  31563. </field>
  31564. <field> <name>FB15</name>
  31565. <description>Filter bits</description>
  31566. <bitOffset>15</bitOffset>
  31567. <bitWidth>1</bitWidth>
  31568. </field>
  31569. <field> <name>FB16</name>
  31570. <description>Filter bits</description>
  31571. <bitOffset>16</bitOffset>
  31572. <bitWidth>1</bitWidth>
  31573. </field>
  31574. <field> <name>FB17</name>
  31575. <description>Filter bits</description>
  31576. <bitOffset>17</bitOffset>
  31577. <bitWidth>1</bitWidth>
  31578. </field>
  31579. <field> <name>FB18</name>
  31580. <description>Filter bits</description>
  31581. <bitOffset>18</bitOffset>
  31582. <bitWidth>1</bitWidth>
  31583. </field>
  31584. <field> <name>FB19</name>
  31585. <description>Filter bits</description>
  31586. <bitOffset>19</bitOffset>
  31587. <bitWidth>1</bitWidth>
  31588. </field>
  31589. <field> <name>FB20</name>
  31590. <description>Filter bits</description>
  31591. <bitOffset>20</bitOffset>
  31592. <bitWidth>1</bitWidth>
  31593. </field>
  31594. <field> <name>FB21</name>
  31595. <description>Filter bits</description>
  31596. <bitOffset>21</bitOffset>
  31597. <bitWidth>1</bitWidth>
  31598. </field>
  31599. <field> <name>FB22</name>
  31600. <description>Filter bits</description>
  31601. <bitOffset>22</bitOffset>
  31602. <bitWidth>1</bitWidth>
  31603. </field>
  31604. <field> <name>FB23</name>
  31605. <description>Filter bits</description>
  31606. <bitOffset>23</bitOffset>
  31607. <bitWidth>1</bitWidth>
  31608. </field>
  31609. <field> <name>FB24</name>
  31610. <description>Filter bits</description>
  31611. <bitOffset>24</bitOffset>
  31612. <bitWidth>1</bitWidth>
  31613. </field>
  31614. <field> <name>FB25</name>
  31615. <description>Filter bits</description>
  31616. <bitOffset>25</bitOffset>
  31617. <bitWidth>1</bitWidth>
  31618. </field>
  31619. <field> <name>FB26</name>
  31620. <description>Filter bits</description>
  31621. <bitOffset>26</bitOffset>
  31622. <bitWidth>1</bitWidth>
  31623. </field>
  31624. <field> <name>FB27</name>
  31625. <description>Filter bits</description>
  31626. <bitOffset>27</bitOffset>
  31627. <bitWidth>1</bitWidth>
  31628. </field>
  31629. <field> <name>FB28</name>
  31630. <description>Filter bits</description>
  31631. <bitOffset>28</bitOffset>
  31632. <bitWidth>1</bitWidth>
  31633. </field>
  31634. <field> <name>FB29</name>
  31635. <description>Filter bits</description>
  31636. <bitOffset>29</bitOffset>
  31637. <bitWidth>1</bitWidth>
  31638. </field>
  31639. <field> <name>FB30</name>
  31640. <description>Filter bits</description>
  31641. <bitOffset>30</bitOffset>
  31642. <bitWidth>1</bitWidth>
  31643. </field>
  31644. <field> <name>FB31</name>
  31645. <description>Filter bits</description>
  31646. <bitOffset>31</bitOffset>
  31647. <bitWidth>1</bitWidth>
  31648. </field>
  31649. </fields>
  31650. </register>
  31651. <register> <name>F14R1</name>
  31652. <displayName>F14R1</displayName>
  31653. <description>Filter bank 14 register 1</description>
  31654. <addressOffset>0x2B0</addressOffset>
  31655. <size>0x20</size>
  31656. <access>read-write</access>
  31657. <resetValue>0x00000000</resetValue>
  31658. <fields>
  31659. <field> <name>FB0</name>
  31660. <description>Filter bits</description>
  31661. <bitOffset>0</bitOffset>
  31662. <bitWidth>1</bitWidth>
  31663. </field>
  31664. <field> <name>FB1</name>
  31665. <description>Filter bits</description>
  31666. <bitOffset>1</bitOffset>
  31667. <bitWidth>1</bitWidth>
  31668. </field>
  31669. <field> <name>FB2</name>
  31670. <description>Filter bits</description>
  31671. <bitOffset>2</bitOffset>
  31672. <bitWidth>1</bitWidth>
  31673. </field>
  31674. <field> <name>FB3</name>
  31675. <description>Filter bits</description>
  31676. <bitOffset>3</bitOffset>
  31677. <bitWidth>1</bitWidth>
  31678. </field>
  31679. <field> <name>FB4</name>
  31680. <description>Filter bits</description>
  31681. <bitOffset>4</bitOffset>
  31682. <bitWidth>1</bitWidth>
  31683. </field>
  31684. <field> <name>FB5</name>
  31685. <description>Filter bits</description>
  31686. <bitOffset>5</bitOffset>
  31687. <bitWidth>1</bitWidth>
  31688. </field>
  31689. <field> <name>FB6</name>
  31690. <description>Filter bits</description>
  31691. <bitOffset>6</bitOffset>
  31692. <bitWidth>1</bitWidth>
  31693. </field>
  31694. <field> <name>FB7</name>
  31695. <description>Filter bits</description>
  31696. <bitOffset>7</bitOffset>
  31697. <bitWidth>1</bitWidth>
  31698. </field>
  31699. <field> <name>FB8</name>
  31700. <description>Filter bits</description>
  31701. <bitOffset>8</bitOffset>
  31702. <bitWidth>1</bitWidth>
  31703. </field>
  31704. <field> <name>FB9</name>
  31705. <description>Filter bits</description>
  31706. <bitOffset>9</bitOffset>
  31707. <bitWidth>1</bitWidth>
  31708. </field>
  31709. <field> <name>FB10</name>
  31710. <description>Filter bits</description>
  31711. <bitOffset>10</bitOffset>
  31712. <bitWidth>1</bitWidth>
  31713. </field>
  31714. <field> <name>FB11</name>
  31715. <description>Filter bits</description>
  31716. <bitOffset>11</bitOffset>
  31717. <bitWidth>1</bitWidth>
  31718. </field>
  31719. <field> <name>FB12</name>
  31720. <description>Filter bits</description>
  31721. <bitOffset>12</bitOffset>
  31722. <bitWidth>1</bitWidth>
  31723. </field>
  31724. <field> <name>FB13</name>
  31725. <description>Filter bits</description>
  31726. <bitOffset>13</bitOffset>
  31727. <bitWidth>1</bitWidth>
  31728. </field>
  31729. <field> <name>FB14</name>
  31730. <description>Filter bits</description>
  31731. <bitOffset>14</bitOffset>
  31732. <bitWidth>1</bitWidth>
  31733. </field>
  31734. <field> <name>FB15</name>
  31735. <description>Filter bits</description>
  31736. <bitOffset>15</bitOffset>
  31737. <bitWidth>1</bitWidth>
  31738. </field>
  31739. <field> <name>FB16</name>
  31740. <description>Filter bits</description>
  31741. <bitOffset>16</bitOffset>
  31742. <bitWidth>1</bitWidth>
  31743. </field>
  31744. <field> <name>FB17</name>
  31745. <description>Filter bits</description>
  31746. <bitOffset>17</bitOffset>
  31747. <bitWidth>1</bitWidth>
  31748. </field>
  31749. <field> <name>FB18</name>
  31750. <description>Filter bits</description>
  31751. <bitOffset>18</bitOffset>
  31752. <bitWidth>1</bitWidth>
  31753. </field>
  31754. <field> <name>FB19</name>
  31755. <description>Filter bits</description>
  31756. <bitOffset>19</bitOffset>
  31757. <bitWidth>1</bitWidth>
  31758. </field>
  31759. <field> <name>FB20</name>
  31760. <description>Filter bits</description>
  31761. <bitOffset>20</bitOffset>
  31762. <bitWidth>1</bitWidth>
  31763. </field>
  31764. <field> <name>FB21</name>
  31765. <description>Filter bits</description>
  31766. <bitOffset>21</bitOffset>
  31767. <bitWidth>1</bitWidth>
  31768. </field>
  31769. <field> <name>FB22</name>
  31770. <description>Filter bits</description>
  31771. <bitOffset>22</bitOffset>
  31772. <bitWidth>1</bitWidth>
  31773. </field>
  31774. <field> <name>FB23</name>
  31775. <description>Filter bits</description>
  31776. <bitOffset>23</bitOffset>
  31777. <bitWidth>1</bitWidth>
  31778. </field>
  31779. <field> <name>FB24</name>
  31780. <description>Filter bits</description>
  31781. <bitOffset>24</bitOffset>
  31782. <bitWidth>1</bitWidth>
  31783. </field>
  31784. <field> <name>FB25</name>
  31785. <description>Filter bits</description>
  31786. <bitOffset>25</bitOffset>
  31787. <bitWidth>1</bitWidth>
  31788. </field>
  31789. <field> <name>FB26</name>
  31790. <description>Filter bits</description>
  31791. <bitOffset>26</bitOffset>
  31792. <bitWidth>1</bitWidth>
  31793. </field>
  31794. <field> <name>FB27</name>
  31795. <description>Filter bits</description>
  31796. <bitOffset>27</bitOffset>
  31797. <bitWidth>1</bitWidth>
  31798. </field>
  31799. <field> <name>FB28</name>
  31800. <description>Filter bits</description>
  31801. <bitOffset>28</bitOffset>
  31802. <bitWidth>1</bitWidth>
  31803. </field>
  31804. <field> <name>FB29</name>
  31805. <description>Filter bits</description>
  31806. <bitOffset>29</bitOffset>
  31807. <bitWidth>1</bitWidth>
  31808. </field>
  31809. <field> <name>FB30</name>
  31810. <description>Filter bits</description>
  31811. <bitOffset>30</bitOffset>
  31812. <bitWidth>1</bitWidth>
  31813. </field>
  31814. <field> <name>FB31</name>
  31815. <description>Filter bits</description>
  31816. <bitOffset>31</bitOffset>
  31817. <bitWidth>1</bitWidth>
  31818. </field>
  31819. </fields>
  31820. </register>
  31821. <register> <name>F14R2</name>
  31822. <displayName>F14R2</displayName>
  31823. <description>Filter bank 14 register 2</description>
  31824. <addressOffset>0x2B4</addressOffset>
  31825. <size>0x20</size>
  31826. <access>read-write</access>
  31827. <resetValue>0x00000000</resetValue>
  31828. <fields>
  31829. <field> <name>FB0</name>
  31830. <description>Filter bits</description>
  31831. <bitOffset>0</bitOffset>
  31832. <bitWidth>1</bitWidth>
  31833. </field>
  31834. <field> <name>FB1</name>
  31835. <description>Filter bits</description>
  31836. <bitOffset>1</bitOffset>
  31837. <bitWidth>1</bitWidth>
  31838. </field>
  31839. <field> <name>FB2</name>
  31840. <description>Filter bits</description>
  31841. <bitOffset>2</bitOffset>
  31842. <bitWidth>1</bitWidth>
  31843. </field>
  31844. <field> <name>FB3</name>
  31845. <description>Filter bits</description>
  31846. <bitOffset>3</bitOffset>
  31847. <bitWidth>1</bitWidth>
  31848. </field>
  31849. <field> <name>FB4</name>
  31850. <description>Filter bits</description>
  31851. <bitOffset>4</bitOffset>
  31852. <bitWidth>1</bitWidth>
  31853. </field>
  31854. <field> <name>FB5</name>
  31855. <description>Filter bits</description>
  31856. <bitOffset>5</bitOffset>
  31857. <bitWidth>1</bitWidth>
  31858. </field>
  31859. <field> <name>FB6</name>
  31860. <description>Filter bits</description>
  31861. <bitOffset>6</bitOffset>
  31862. <bitWidth>1</bitWidth>
  31863. </field>
  31864. <field> <name>FB7</name>
  31865. <description>Filter bits</description>
  31866. <bitOffset>7</bitOffset>
  31867. <bitWidth>1</bitWidth>
  31868. </field>
  31869. <field> <name>FB8</name>
  31870. <description>Filter bits</description>
  31871. <bitOffset>8</bitOffset>
  31872. <bitWidth>1</bitWidth>
  31873. </field>
  31874. <field> <name>FB9</name>
  31875. <description>Filter bits</description>
  31876. <bitOffset>9</bitOffset>
  31877. <bitWidth>1</bitWidth>
  31878. </field>
  31879. <field> <name>FB10</name>
  31880. <description>Filter bits</description>
  31881. <bitOffset>10</bitOffset>
  31882. <bitWidth>1</bitWidth>
  31883. </field>
  31884. <field> <name>FB11</name>
  31885. <description>Filter bits</description>
  31886. <bitOffset>11</bitOffset>
  31887. <bitWidth>1</bitWidth>
  31888. </field>
  31889. <field> <name>FB12</name>
  31890. <description>Filter bits</description>
  31891. <bitOffset>12</bitOffset>
  31892. <bitWidth>1</bitWidth>
  31893. </field>
  31894. <field> <name>FB13</name>
  31895. <description>Filter bits</description>
  31896. <bitOffset>13</bitOffset>
  31897. <bitWidth>1</bitWidth>
  31898. </field>
  31899. <field> <name>FB14</name>
  31900. <description>Filter bits</description>
  31901. <bitOffset>14</bitOffset>
  31902. <bitWidth>1</bitWidth>
  31903. </field>
  31904. <field> <name>FB15</name>
  31905. <description>Filter bits</description>
  31906. <bitOffset>15</bitOffset>
  31907. <bitWidth>1</bitWidth>
  31908. </field>
  31909. <field> <name>FB16</name>
  31910. <description>Filter bits</description>
  31911. <bitOffset>16</bitOffset>
  31912. <bitWidth>1</bitWidth>
  31913. </field>
  31914. <field> <name>FB17</name>
  31915. <description>Filter bits</description>
  31916. <bitOffset>17</bitOffset>
  31917. <bitWidth>1</bitWidth>
  31918. </field>
  31919. <field> <name>FB18</name>
  31920. <description>Filter bits</description>
  31921. <bitOffset>18</bitOffset>
  31922. <bitWidth>1</bitWidth>
  31923. </field>
  31924. <field> <name>FB19</name>
  31925. <description>Filter bits</description>
  31926. <bitOffset>19</bitOffset>
  31927. <bitWidth>1</bitWidth>
  31928. </field>
  31929. <field> <name>FB20</name>
  31930. <description>Filter bits</description>
  31931. <bitOffset>20</bitOffset>
  31932. <bitWidth>1</bitWidth>
  31933. </field>
  31934. <field> <name>FB21</name>
  31935. <description>Filter bits</description>
  31936. <bitOffset>21</bitOffset>
  31937. <bitWidth>1</bitWidth>
  31938. </field>
  31939. <field> <name>FB22</name>
  31940. <description>Filter bits</description>
  31941. <bitOffset>22</bitOffset>
  31942. <bitWidth>1</bitWidth>
  31943. </field>
  31944. <field> <name>FB23</name>
  31945. <description>Filter bits</description>
  31946. <bitOffset>23</bitOffset>
  31947. <bitWidth>1</bitWidth>
  31948. </field>
  31949. <field> <name>FB24</name>
  31950. <description>Filter bits</description>
  31951. <bitOffset>24</bitOffset>
  31952. <bitWidth>1</bitWidth>
  31953. </field>
  31954. <field> <name>FB25</name>
  31955. <description>Filter bits</description>
  31956. <bitOffset>25</bitOffset>
  31957. <bitWidth>1</bitWidth>
  31958. </field>
  31959. <field> <name>FB26</name>
  31960. <description>Filter bits</description>
  31961. <bitOffset>26</bitOffset>
  31962. <bitWidth>1</bitWidth>
  31963. </field>
  31964. <field> <name>FB27</name>
  31965. <description>Filter bits</description>
  31966. <bitOffset>27</bitOffset>
  31967. <bitWidth>1</bitWidth>
  31968. </field>
  31969. <field> <name>FB28</name>
  31970. <description>Filter bits</description>
  31971. <bitOffset>28</bitOffset>
  31972. <bitWidth>1</bitWidth>
  31973. </field>
  31974. <field> <name>FB29</name>
  31975. <description>Filter bits</description>
  31976. <bitOffset>29</bitOffset>
  31977. <bitWidth>1</bitWidth>
  31978. </field>
  31979. <field> <name>FB30</name>
  31980. <description>Filter bits</description>
  31981. <bitOffset>30</bitOffset>
  31982. <bitWidth>1</bitWidth>
  31983. </field>
  31984. <field> <name>FB31</name>
  31985. <description>Filter bits</description>
  31986. <bitOffset>31</bitOffset>
  31987. <bitWidth>1</bitWidth>
  31988. </field>
  31989. </fields>
  31990. </register>
  31991. <register> <name>F15R1</name>
  31992. <displayName>F15R1</displayName>
  31993. <description>Filter bank 15 register 1</description>
  31994. <addressOffset>0x2B8</addressOffset>
  31995. <size>0x20</size>
  31996. <access>read-write</access>
  31997. <resetValue>0x00000000</resetValue>
  31998. <fields>
  31999. <field> <name>FB0</name>
  32000. <description>Filter bits</description>
  32001. <bitOffset>0</bitOffset>
  32002. <bitWidth>1</bitWidth>
  32003. </field>
  32004. <field> <name>FB1</name>
  32005. <description>Filter bits</description>
  32006. <bitOffset>1</bitOffset>
  32007. <bitWidth>1</bitWidth>
  32008. </field>
  32009. <field> <name>FB2</name>
  32010. <description>Filter bits</description>
  32011. <bitOffset>2</bitOffset>
  32012. <bitWidth>1</bitWidth>
  32013. </field>
  32014. <field> <name>FB3</name>
  32015. <description>Filter bits</description>
  32016. <bitOffset>3</bitOffset>
  32017. <bitWidth>1</bitWidth>
  32018. </field>
  32019. <field> <name>FB4</name>
  32020. <description>Filter bits</description>
  32021. <bitOffset>4</bitOffset>
  32022. <bitWidth>1</bitWidth>
  32023. </field>
  32024. <field> <name>FB5</name>
  32025. <description>Filter bits</description>
  32026. <bitOffset>5</bitOffset>
  32027. <bitWidth>1</bitWidth>
  32028. </field>
  32029. <field> <name>FB6</name>
  32030. <description>Filter bits</description>
  32031. <bitOffset>6</bitOffset>
  32032. <bitWidth>1</bitWidth>
  32033. </field>
  32034. <field> <name>FB7</name>
  32035. <description>Filter bits</description>
  32036. <bitOffset>7</bitOffset>
  32037. <bitWidth>1</bitWidth>
  32038. </field>
  32039. <field> <name>FB8</name>
  32040. <description>Filter bits</description>
  32041. <bitOffset>8</bitOffset>
  32042. <bitWidth>1</bitWidth>
  32043. </field>
  32044. <field> <name>FB9</name>
  32045. <description>Filter bits</description>
  32046. <bitOffset>9</bitOffset>
  32047. <bitWidth>1</bitWidth>
  32048. </field>
  32049. <field> <name>FB10</name>
  32050. <description>Filter bits</description>
  32051. <bitOffset>10</bitOffset>
  32052. <bitWidth>1</bitWidth>
  32053. </field>
  32054. <field> <name>FB11</name>
  32055. <description>Filter bits</description>
  32056. <bitOffset>11</bitOffset>
  32057. <bitWidth>1</bitWidth>
  32058. </field>
  32059. <field> <name>FB12</name>
  32060. <description>Filter bits</description>
  32061. <bitOffset>12</bitOffset>
  32062. <bitWidth>1</bitWidth>
  32063. </field>
  32064. <field> <name>FB13</name>
  32065. <description>Filter bits</description>
  32066. <bitOffset>13</bitOffset>
  32067. <bitWidth>1</bitWidth>
  32068. </field>
  32069. <field> <name>FB14</name>
  32070. <description>Filter bits</description>
  32071. <bitOffset>14</bitOffset>
  32072. <bitWidth>1</bitWidth>
  32073. </field>
  32074. <field> <name>FB15</name>
  32075. <description>Filter bits</description>
  32076. <bitOffset>15</bitOffset>
  32077. <bitWidth>1</bitWidth>
  32078. </field>
  32079. <field> <name>FB16</name>
  32080. <description>Filter bits</description>
  32081. <bitOffset>16</bitOffset>
  32082. <bitWidth>1</bitWidth>
  32083. </field>
  32084. <field> <name>FB17</name>
  32085. <description>Filter bits</description>
  32086. <bitOffset>17</bitOffset>
  32087. <bitWidth>1</bitWidth>
  32088. </field>
  32089. <field> <name>FB18</name>
  32090. <description>Filter bits</description>
  32091. <bitOffset>18</bitOffset>
  32092. <bitWidth>1</bitWidth>
  32093. </field>
  32094. <field> <name>FB19</name>
  32095. <description>Filter bits</description>
  32096. <bitOffset>19</bitOffset>
  32097. <bitWidth>1</bitWidth>
  32098. </field>
  32099. <field> <name>FB20</name>
  32100. <description>Filter bits</description>
  32101. <bitOffset>20</bitOffset>
  32102. <bitWidth>1</bitWidth>
  32103. </field>
  32104. <field> <name>FB21</name>
  32105. <description>Filter bits</description>
  32106. <bitOffset>21</bitOffset>
  32107. <bitWidth>1</bitWidth>
  32108. </field>
  32109. <field> <name>FB22</name>
  32110. <description>Filter bits</description>
  32111. <bitOffset>22</bitOffset>
  32112. <bitWidth>1</bitWidth>
  32113. </field>
  32114. <field> <name>FB23</name>
  32115. <description>Filter bits</description>
  32116. <bitOffset>23</bitOffset>
  32117. <bitWidth>1</bitWidth>
  32118. </field>
  32119. <field> <name>FB24</name>
  32120. <description>Filter bits</description>
  32121. <bitOffset>24</bitOffset>
  32122. <bitWidth>1</bitWidth>
  32123. </field>
  32124. <field> <name>FB25</name>
  32125. <description>Filter bits</description>
  32126. <bitOffset>25</bitOffset>
  32127. <bitWidth>1</bitWidth>
  32128. </field>
  32129. <field> <name>FB26</name>
  32130. <description>Filter bits</description>
  32131. <bitOffset>26</bitOffset>
  32132. <bitWidth>1</bitWidth>
  32133. </field>
  32134. <field> <name>FB27</name>
  32135. <description>Filter bits</description>
  32136. <bitOffset>27</bitOffset>
  32137. <bitWidth>1</bitWidth>
  32138. </field>
  32139. <field> <name>FB28</name>
  32140. <description>Filter bits</description>
  32141. <bitOffset>28</bitOffset>
  32142. <bitWidth>1</bitWidth>
  32143. </field>
  32144. <field> <name>FB29</name>
  32145. <description>Filter bits</description>
  32146. <bitOffset>29</bitOffset>
  32147. <bitWidth>1</bitWidth>
  32148. </field>
  32149. <field> <name>FB30</name>
  32150. <description>Filter bits</description>
  32151. <bitOffset>30</bitOffset>
  32152. <bitWidth>1</bitWidth>
  32153. </field>
  32154. <field> <name>FB31</name>
  32155. <description>Filter bits</description>
  32156. <bitOffset>31</bitOffset>
  32157. <bitWidth>1</bitWidth>
  32158. </field>
  32159. </fields>
  32160. </register>
  32161. <register> <name>F15R2</name>
  32162. <displayName>F15R2</displayName>
  32163. <description>Filter bank 15 register 2</description>
  32164. <addressOffset>0x2BC</addressOffset>
  32165. <size>0x20</size>
  32166. <access>read-write</access>
  32167. <resetValue>0x00000000</resetValue>
  32168. <fields>
  32169. <field> <name>FB0</name>
  32170. <description>Filter bits</description>
  32171. <bitOffset>0</bitOffset>
  32172. <bitWidth>1</bitWidth>
  32173. </field>
  32174. <field> <name>FB1</name>
  32175. <description>Filter bits</description>
  32176. <bitOffset>1</bitOffset>
  32177. <bitWidth>1</bitWidth>
  32178. </field>
  32179. <field> <name>FB2</name>
  32180. <description>Filter bits</description>
  32181. <bitOffset>2</bitOffset>
  32182. <bitWidth>1</bitWidth>
  32183. </field>
  32184. <field> <name>FB3</name>
  32185. <description>Filter bits</description>
  32186. <bitOffset>3</bitOffset>
  32187. <bitWidth>1</bitWidth>
  32188. </field>
  32189. <field> <name>FB4</name>
  32190. <description>Filter bits</description>
  32191. <bitOffset>4</bitOffset>
  32192. <bitWidth>1</bitWidth>
  32193. </field>
  32194. <field> <name>FB5</name>
  32195. <description>Filter bits</description>
  32196. <bitOffset>5</bitOffset>
  32197. <bitWidth>1</bitWidth>
  32198. </field>
  32199. <field> <name>FB6</name>
  32200. <description>Filter bits</description>
  32201. <bitOffset>6</bitOffset>
  32202. <bitWidth>1</bitWidth>
  32203. </field>
  32204. <field> <name>FB7</name>
  32205. <description>Filter bits</description>
  32206. <bitOffset>7</bitOffset>
  32207. <bitWidth>1</bitWidth>
  32208. </field>
  32209. <field> <name>FB8</name>
  32210. <description>Filter bits</description>
  32211. <bitOffset>8</bitOffset>
  32212. <bitWidth>1</bitWidth>
  32213. </field>
  32214. <field> <name>FB9</name>
  32215. <description>Filter bits</description>
  32216. <bitOffset>9</bitOffset>
  32217. <bitWidth>1</bitWidth>
  32218. </field>
  32219. <field> <name>FB10</name>
  32220. <description>Filter bits</description>
  32221. <bitOffset>10</bitOffset>
  32222. <bitWidth>1</bitWidth>
  32223. </field>
  32224. <field> <name>FB11</name>
  32225. <description>Filter bits</description>
  32226. <bitOffset>11</bitOffset>
  32227. <bitWidth>1</bitWidth>
  32228. </field>
  32229. <field> <name>FB12</name>
  32230. <description>Filter bits</description>
  32231. <bitOffset>12</bitOffset>
  32232. <bitWidth>1</bitWidth>
  32233. </field>
  32234. <field> <name>FB13</name>
  32235. <description>Filter bits</description>
  32236. <bitOffset>13</bitOffset>
  32237. <bitWidth>1</bitWidth>
  32238. </field>
  32239. <field> <name>FB14</name>
  32240. <description>Filter bits</description>
  32241. <bitOffset>14</bitOffset>
  32242. <bitWidth>1</bitWidth>
  32243. </field>
  32244. <field> <name>FB15</name>
  32245. <description>Filter bits</description>
  32246. <bitOffset>15</bitOffset>
  32247. <bitWidth>1</bitWidth>
  32248. </field>
  32249. <field> <name>FB16</name>
  32250. <description>Filter bits</description>
  32251. <bitOffset>16</bitOffset>
  32252. <bitWidth>1</bitWidth>
  32253. </field>
  32254. <field> <name>FB17</name>
  32255. <description>Filter bits</description>
  32256. <bitOffset>17</bitOffset>
  32257. <bitWidth>1</bitWidth>
  32258. </field>
  32259. <field> <name>FB18</name>
  32260. <description>Filter bits</description>
  32261. <bitOffset>18</bitOffset>
  32262. <bitWidth>1</bitWidth>
  32263. </field>
  32264. <field> <name>FB19</name>
  32265. <description>Filter bits</description>
  32266. <bitOffset>19</bitOffset>
  32267. <bitWidth>1</bitWidth>
  32268. </field>
  32269. <field> <name>FB20</name>
  32270. <description>Filter bits</description>
  32271. <bitOffset>20</bitOffset>
  32272. <bitWidth>1</bitWidth>
  32273. </field>
  32274. <field> <name>FB21</name>
  32275. <description>Filter bits</description>
  32276. <bitOffset>21</bitOffset>
  32277. <bitWidth>1</bitWidth>
  32278. </field>
  32279. <field> <name>FB22</name>
  32280. <description>Filter bits</description>
  32281. <bitOffset>22</bitOffset>
  32282. <bitWidth>1</bitWidth>
  32283. </field>
  32284. <field> <name>FB23</name>
  32285. <description>Filter bits</description>
  32286. <bitOffset>23</bitOffset>
  32287. <bitWidth>1</bitWidth>
  32288. </field>
  32289. <field> <name>FB24</name>
  32290. <description>Filter bits</description>
  32291. <bitOffset>24</bitOffset>
  32292. <bitWidth>1</bitWidth>
  32293. </field>
  32294. <field> <name>FB25</name>
  32295. <description>Filter bits</description>
  32296. <bitOffset>25</bitOffset>
  32297. <bitWidth>1</bitWidth>
  32298. </field>
  32299. <field> <name>FB26</name>
  32300. <description>Filter bits</description>
  32301. <bitOffset>26</bitOffset>
  32302. <bitWidth>1</bitWidth>
  32303. </field>
  32304. <field> <name>FB27</name>
  32305. <description>Filter bits</description>
  32306. <bitOffset>27</bitOffset>
  32307. <bitWidth>1</bitWidth>
  32308. </field>
  32309. <field> <name>FB28</name>
  32310. <description>Filter bits</description>
  32311. <bitOffset>28</bitOffset>
  32312. <bitWidth>1</bitWidth>
  32313. </field>
  32314. <field> <name>FB29</name>
  32315. <description>Filter bits</description>
  32316. <bitOffset>29</bitOffset>
  32317. <bitWidth>1</bitWidth>
  32318. </field>
  32319. <field> <name>FB30</name>
  32320. <description>Filter bits</description>
  32321. <bitOffset>30</bitOffset>
  32322. <bitWidth>1</bitWidth>
  32323. </field>
  32324. <field> <name>FB31</name>
  32325. <description>Filter bits</description>
  32326. <bitOffset>31</bitOffset>
  32327. <bitWidth>1</bitWidth>
  32328. </field>
  32329. </fields>
  32330. </register>
  32331. <register> <name>F16R1</name>
  32332. <displayName>F16R1</displayName>
  32333. <description>Filter bank 16 register 1</description>
  32334. <addressOffset>0x2C0</addressOffset>
  32335. <size>0x20</size>
  32336. <access>read-write</access>
  32337. <resetValue>0x00000000</resetValue>
  32338. <fields>
  32339. <field> <name>FB0</name>
  32340. <description>Filter bits</description>
  32341. <bitOffset>0</bitOffset>
  32342. <bitWidth>1</bitWidth>
  32343. </field>
  32344. <field> <name>FB1</name>
  32345. <description>Filter bits</description>
  32346. <bitOffset>1</bitOffset>
  32347. <bitWidth>1</bitWidth>
  32348. </field>
  32349. <field> <name>FB2</name>
  32350. <description>Filter bits</description>
  32351. <bitOffset>2</bitOffset>
  32352. <bitWidth>1</bitWidth>
  32353. </field>
  32354. <field> <name>FB3</name>
  32355. <description>Filter bits</description>
  32356. <bitOffset>3</bitOffset>
  32357. <bitWidth>1</bitWidth>
  32358. </field>
  32359. <field> <name>FB4</name>
  32360. <description>Filter bits</description>
  32361. <bitOffset>4</bitOffset>
  32362. <bitWidth>1</bitWidth>
  32363. </field>
  32364. <field> <name>FB5</name>
  32365. <description>Filter bits</description>
  32366. <bitOffset>5</bitOffset>
  32367. <bitWidth>1</bitWidth>
  32368. </field>
  32369. <field> <name>FB6</name>
  32370. <description>Filter bits</description>
  32371. <bitOffset>6</bitOffset>
  32372. <bitWidth>1</bitWidth>
  32373. </field>
  32374. <field> <name>FB7</name>
  32375. <description>Filter bits</description>
  32376. <bitOffset>7</bitOffset>
  32377. <bitWidth>1</bitWidth>
  32378. </field>
  32379. <field> <name>FB8</name>
  32380. <description>Filter bits</description>
  32381. <bitOffset>8</bitOffset>
  32382. <bitWidth>1</bitWidth>
  32383. </field>
  32384. <field> <name>FB9</name>
  32385. <description>Filter bits</description>
  32386. <bitOffset>9</bitOffset>
  32387. <bitWidth>1</bitWidth>
  32388. </field>
  32389. <field> <name>FB10</name>
  32390. <description>Filter bits</description>
  32391. <bitOffset>10</bitOffset>
  32392. <bitWidth>1</bitWidth>
  32393. </field>
  32394. <field> <name>FB11</name>
  32395. <description>Filter bits</description>
  32396. <bitOffset>11</bitOffset>
  32397. <bitWidth>1</bitWidth>
  32398. </field>
  32399. <field> <name>FB12</name>
  32400. <description>Filter bits</description>
  32401. <bitOffset>12</bitOffset>
  32402. <bitWidth>1</bitWidth>
  32403. </field>
  32404. <field> <name>FB13</name>
  32405. <description>Filter bits</description>
  32406. <bitOffset>13</bitOffset>
  32407. <bitWidth>1</bitWidth>
  32408. </field>
  32409. <field> <name>FB14</name>
  32410. <description>Filter bits</description>
  32411. <bitOffset>14</bitOffset>
  32412. <bitWidth>1</bitWidth>
  32413. </field>
  32414. <field> <name>FB15</name>
  32415. <description>Filter bits</description>
  32416. <bitOffset>15</bitOffset>
  32417. <bitWidth>1</bitWidth>
  32418. </field>
  32419. <field> <name>FB16</name>
  32420. <description>Filter bits</description>
  32421. <bitOffset>16</bitOffset>
  32422. <bitWidth>1</bitWidth>
  32423. </field>
  32424. <field> <name>FB17</name>
  32425. <description>Filter bits</description>
  32426. <bitOffset>17</bitOffset>
  32427. <bitWidth>1</bitWidth>
  32428. </field>
  32429. <field> <name>FB18</name>
  32430. <description>Filter bits</description>
  32431. <bitOffset>18</bitOffset>
  32432. <bitWidth>1</bitWidth>
  32433. </field>
  32434. <field> <name>FB19</name>
  32435. <description>Filter bits</description>
  32436. <bitOffset>19</bitOffset>
  32437. <bitWidth>1</bitWidth>
  32438. </field>
  32439. <field> <name>FB20</name>
  32440. <description>Filter bits</description>
  32441. <bitOffset>20</bitOffset>
  32442. <bitWidth>1</bitWidth>
  32443. </field>
  32444. <field> <name>FB21</name>
  32445. <description>Filter bits</description>
  32446. <bitOffset>21</bitOffset>
  32447. <bitWidth>1</bitWidth>
  32448. </field>
  32449. <field> <name>FB22</name>
  32450. <description>Filter bits</description>
  32451. <bitOffset>22</bitOffset>
  32452. <bitWidth>1</bitWidth>
  32453. </field>
  32454. <field> <name>FB23</name>
  32455. <description>Filter bits</description>
  32456. <bitOffset>23</bitOffset>
  32457. <bitWidth>1</bitWidth>
  32458. </field>
  32459. <field> <name>FB24</name>
  32460. <description>Filter bits</description>
  32461. <bitOffset>24</bitOffset>
  32462. <bitWidth>1</bitWidth>
  32463. </field>
  32464. <field> <name>FB25</name>
  32465. <description>Filter bits</description>
  32466. <bitOffset>25</bitOffset>
  32467. <bitWidth>1</bitWidth>
  32468. </field>
  32469. <field> <name>FB26</name>
  32470. <description>Filter bits</description>
  32471. <bitOffset>26</bitOffset>
  32472. <bitWidth>1</bitWidth>
  32473. </field>
  32474. <field> <name>FB27</name>
  32475. <description>Filter bits</description>
  32476. <bitOffset>27</bitOffset>
  32477. <bitWidth>1</bitWidth>
  32478. </field>
  32479. <field> <name>FB28</name>
  32480. <description>Filter bits</description>
  32481. <bitOffset>28</bitOffset>
  32482. <bitWidth>1</bitWidth>
  32483. </field>
  32484. <field> <name>FB29</name>
  32485. <description>Filter bits</description>
  32486. <bitOffset>29</bitOffset>
  32487. <bitWidth>1</bitWidth>
  32488. </field>
  32489. <field> <name>FB30</name>
  32490. <description>Filter bits</description>
  32491. <bitOffset>30</bitOffset>
  32492. <bitWidth>1</bitWidth>
  32493. </field>
  32494. <field> <name>FB31</name>
  32495. <description>Filter bits</description>
  32496. <bitOffset>31</bitOffset>
  32497. <bitWidth>1</bitWidth>
  32498. </field>
  32499. </fields>
  32500. </register>
  32501. <register> <name>F16R2</name>
  32502. <displayName>F16R2</displayName>
  32503. <description>Filter bank 16 register 2</description>
  32504. <addressOffset>0x2C4</addressOffset>
  32505. <size>0x20</size>
  32506. <access>read-write</access>
  32507. <resetValue>0x00000000</resetValue>
  32508. <fields>
  32509. <field> <name>FB0</name>
  32510. <description>Filter bits</description>
  32511. <bitOffset>0</bitOffset>
  32512. <bitWidth>1</bitWidth>
  32513. </field>
  32514. <field> <name>FB1</name>
  32515. <description>Filter bits</description>
  32516. <bitOffset>1</bitOffset>
  32517. <bitWidth>1</bitWidth>
  32518. </field>
  32519. <field> <name>FB2</name>
  32520. <description>Filter bits</description>
  32521. <bitOffset>2</bitOffset>
  32522. <bitWidth>1</bitWidth>
  32523. </field>
  32524. <field> <name>FB3</name>
  32525. <description>Filter bits</description>
  32526. <bitOffset>3</bitOffset>
  32527. <bitWidth>1</bitWidth>
  32528. </field>
  32529. <field> <name>FB4</name>
  32530. <description>Filter bits</description>
  32531. <bitOffset>4</bitOffset>
  32532. <bitWidth>1</bitWidth>
  32533. </field>
  32534. <field> <name>FB5</name>
  32535. <description>Filter bits</description>
  32536. <bitOffset>5</bitOffset>
  32537. <bitWidth>1</bitWidth>
  32538. </field>
  32539. <field> <name>FB6</name>
  32540. <description>Filter bits</description>
  32541. <bitOffset>6</bitOffset>
  32542. <bitWidth>1</bitWidth>
  32543. </field>
  32544. <field> <name>FB7</name>
  32545. <description>Filter bits</description>
  32546. <bitOffset>7</bitOffset>
  32547. <bitWidth>1</bitWidth>
  32548. </field>
  32549. <field> <name>FB8</name>
  32550. <description>Filter bits</description>
  32551. <bitOffset>8</bitOffset>
  32552. <bitWidth>1</bitWidth>
  32553. </field>
  32554. <field> <name>FB9</name>
  32555. <description>Filter bits</description>
  32556. <bitOffset>9</bitOffset>
  32557. <bitWidth>1</bitWidth>
  32558. </field>
  32559. <field> <name>FB10</name>
  32560. <description>Filter bits</description>
  32561. <bitOffset>10</bitOffset>
  32562. <bitWidth>1</bitWidth>
  32563. </field>
  32564. <field> <name>FB11</name>
  32565. <description>Filter bits</description>
  32566. <bitOffset>11</bitOffset>
  32567. <bitWidth>1</bitWidth>
  32568. </field>
  32569. <field> <name>FB12</name>
  32570. <description>Filter bits</description>
  32571. <bitOffset>12</bitOffset>
  32572. <bitWidth>1</bitWidth>
  32573. </field>
  32574. <field> <name>FB13</name>
  32575. <description>Filter bits</description>
  32576. <bitOffset>13</bitOffset>
  32577. <bitWidth>1</bitWidth>
  32578. </field>
  32579. <field> <name>FB14</name>
  32580. <description>Filter bits</description>
  32581. <bitOffset>14</bitOffset>
  32582. <bitWidth>1</bitWidth>
  32583. </field>
  32584. <field> <name>FB15</name>
  32585. <description>Filter bits</description>
  32586. <bitOffset>15</bitOffset>
  32587. <bitWidth>1</bitWidth>
  32588. </field>
  32589. <field> <name>FB16</name>
  32590. <description>Filter bits</description>
  32591. <bitOffset>16</bitOffset>
  32592. <bitWidth>1</bitWidth>
  32593. </field>
  32594. <field> <name>FB17</name>
  32595. <description>Filter bits</description>
  32596. <bitOffset>17</bitOffset>
  32597. <bitWidth>1</bitWidth>
  32598. </field>
  32599. <field> <name>FB18</name>
  32600. <description>Filter bits</description>
  32601. <bitOffset>18</bitOffset>
  32602. <bitWidth>1</bitWidth>
  32603. </field>
  32604. <field> <name>FB19</name>
  32605. <description>Filter bits</description>
  32606. <bitOffset>19</bitOffset>
  32607. <bitWidth>1</bitWidth>
  32608. </field>
  32609. <field> <name>FB20</name>
  32610. <description>Filter bits</description>
  32611. <bitOffset>20</bitOffset>
  32612. <bitWidth>1</bitWidth>
  32613. </field>
  32614. <field> <name>FB21</name>
  32615. <description>Filter bits</description>
  32616. <bitOffset>21</bitOffset>
  32617. <bitWidth>1</bitWidth>
  32618. </field>
  32619. <field> <name>FB22</name>
  32620. <description>Filter bits</description>
  32621. <bitOffset>22</bitOffset>
  32622. <bitWidth>1</bitWidth>
  32623. </field>
  32624. <field> <name>FB23</name>
  32625. <description>Filter bits</description>
  32626. <bitOffset>23</bitOffset>
  32627. <bitWidth>1</bitWidth>
  32628. </field>
  32629. <field> <name>FB24</name>
  32630. <description>Filter bits</description>
  32631. <bitOffset>24</bitOffset>
  32632. <bitWidth>1</bitWidth>
  32633. </field>
  32634. <field> <name>FB25</name>
  32635. <description>Filter bits</description>
  32636. <bitOffset>25</bitOffset>
  32637. <bitWidth>1</bitWidth>
  32638. </field>
  32639. <field> <name>FB26</name>
  32640. <description>Filter bits</description>
  32641. <bitOffset>26</bitOffset>
  32642. <bitWidth>1</bitWidth>
  32643. </field>
  32644. <field> <name>FB27</name>
  32645. <description>Filter bits</description>
  32646. <bitOffset>27</bitOffset>
  32647. <bitWidth>1</bitWidth>
  32648. </field>
  32649. <field> <name>FB28</name>
  32650. <description>Filter bits</description>
  32651. <bitOffset>28</bitOffset>
  32652. <bitWidth>1</bitWidth>
  32653. </field>
  32654. <field> <name>FB29</name>
  32655. <description>Filter bits</description>
  32656. <bitOffset>29</bitOffset>
  32657. <bitWidth>1</bitWidth>
  32658. </field>
  32659. <field> <name>FB30</name>
  32660. <description>Filter bits</description>
  32661. <bitOffset>30</bitOffset>
  32662. <bitWidth>1</bitWidth>
  32663. </field>
  32664. <field> <name>FB31</name>
  32665. <description>Filter bits</description>
  32666. <bitOffset>31</bitOffset>
  32667. <bitWidth>1</bitWidth>
  32668. </field>
  32669. </fields>
  32670. </register>
  32671. <register> <name>F17R1</name>
  32672. <displayName>F17R1</displayName>
  32673. <description>Filter bank 17 register 1</description>
  32674. <addressOffset>0x2C8</addressOffset>
  32675. <size>0x20</size>
  32676. <access>read-write</access>
  32677. <resetValue>0x00000000</resetValue>
  32678. <fields>
  32679. <field> <name>FB0</name>
  32680. <description>Filter bits</description>
  32681. <bitOffset>0</bitOffset>
  32682. <bitWidth>1</bitWidth>
  32683. </field>
  32684. <field> <name>FB1</name>
  32685. <description>Filter bits</description>
  32686. <bitOffset>1</bitOffset>
  32687. <bitWidth>1</bitWidth>
  32688. </field>
  32689. <field> <name>FB2</name>
  32690. <description>Filter bits</description>
  32691. <bitOffset>2</bitOffset>
  32692. <bitWidth>1</bitWidth>
  32693. </field>
  32694. <field> <name>FB3</name>
  32695. <description>Filter bits</description>
  32696. <bitOffset>3</bitOffset>
  32697. <bitWidth>1</bitWidth>
  32698. </field>
  32699. <field> <name>FB4</name>
  32700. <description>Filter bits</description>
  32701. <bitOffset>4</bitOffset>
  32702. <bitWidth>1</bitWidth>
  32703. </field>
  32704. <field> <name>FB5</name>
  32705. <description>Filter bits</description>
  32706. <bitOffset>5</bitOffset>
  32707. <bitWidth>1</bitWidth>
  32708. </field>
  32709. <field> <name>FB6</name>
  32710. <description>Filter bits</description>
  32711. <bitOffset>6</bitOffset>
  32712. <bitWidth>1</bitWidth>
  32713. </field>
  32714. <field> <name>FB7</name>
  32715. <description>Filter bits</description>
  32716. <bitOffset>7</bitOffset>
  32717. <bitWidth>1</bitWidth>
  32718. </field>
  32719. <field> <name>FB8</name>
  32720. <description>Filter bits</description>
  32721. <bitOffset>8</bitOffset>
  32722. <bitWidth>1</bitWidth>
  32723. </field>
  32724. <field> <name>FB9</name>
  32725. <description>Filter bits</description>
  32726. <bitOffset>9</bitOffset>
  32727. <bitWidth>1</bitWidth>
  32728. </field>
  32729. <field> <name>FB10</name>
  32730. <description>Filter bits</description>
  32731. <bitOffset>10</bitOffset>
  32732. <bitWidth>1</bitWidth>
  32733. </field>
  32734. <field> <name>FB11</name>
  32735. <description>Filter bits</description>
  32736. <bitOffset>11</bitOffset>
  32737. <bitWidth>1</bitWidth>
  32738. </field>
  32739. <field> <name>FB12</name>
  32740. <description>Filter bits</description>
  32741. <bitOffset>12</bitOffset>
  32742. <bitWidth>1</bitWidth>
  32743. </field>
  32744. <field> <name>FB13</name>
  32745. <description>Filter bits</description>
  32746. <bitOffset>13</bitOffset>
  32747. <bitWidth>1</bitWidth>
  32748. </field>
  32749. <field> <name>FB14</name>
  32750. <description>Filter bits</description>
  32751. <bitOffset>14</bitOffset>
  32752. <bitWidth>1</bitWidth>
  32753. </field>
  32754. <field> <name>FB15</name>
  32755. <description>Filter bits</description>
  32756. <bitOffset>15</bitOffset>
  32757. <bitWidth>1</bitWidth>
  32758. </field>
  32759. <field> <name>FB16</name>
  32760. <description>Filter bits</description>
  32761. <bitOffset>16</bitOffset>
  32762. <bitWidth>1</bitWidth>
  32763. </field>
  32764. <field> <name>FB17</name>
  32765. <description>Filter bits</description>
  32766. <bitOffset>17</bitOffset>
  32767. <bitWidth>1</bitWidth>
  32768. </field>
  32769. <field> <name>FB18</name>
  32770. <description>Filter bits</description>
  32771. <bitOffset>18</bitOffset>
  32772. <bitWidth>1</bitWidth>
  32773. </field>
  32774. <field> <name>FB19</name>
  32775. <description>Filter bits</description>
  32776. <bitOffset>19</bitOffset>
  32777. <bitWidth>1</bitWidth>
  32778. </field>
  32779. <field> <name>FB20</name>
  32780. <description>Filter bits</description>
  32781. <bitOffset>20</bitOffset>
  32782. <bitWidth>1</bitWidth>
  32783. </field>
  32784. <field> <name>FB21</name>
  32785. <description>Filter bits</description>
  32786. <bitOffset>21</bitOffset>
  32787. <bitWidth>1</bitWidth>
  32788. </field>
  32789. <field> <name>FB22</name>
  32790. <description>Filter bits</description>
  32791. <bitOffset>22</bitOffset>
  32792. <bitWidth>1</bitWidth>
  32793. </field>
  32794. <field> <name>FB23</name>
  32795. <description>Filter bits</description>
  32796. <bitOffset>23</bitOffset>
  32797. <bitWidth>1</bitWidth>
  32798. </field>
  32799. <field> <name>FB24</name>
  32800. <description>Filter bits</description>
  32801. <bitOffset>24</bitOffset>
  32802. <bitWidth>1</bitWidth>
  32803. </field>
  32804. <field> <name>FB25</name>
  32805. <description>Filter bits</description>
  32806. <bitOffset>25</bitOffset>
  32807. <bitWidth>1</bitWidth>
  32808. </field>
  32809. <field> <name>FB26</name>
  32810. <description>Filter bits</description>
  32811. <bitOffset>26</bitOffset>
  32812. <bitWidth>1</bitWidth>
  32813. </field>
  32814. <field> <name>FB27</name>
  32815. <description>Filter bits</description>
  32816. <bitOffset>27</bitOffset>
  32817. <bitWidth>1</bitWidth>
  32818. </field>
  32819. <field> <name>FB28</name>
  32820. <description>Filter bits</description>
  32821. <bitOffset>28</bitOffset>
  32822. <bitWidth>1</bitWidth>
  32823. </field>
  32824. <field> <name>FB29</name>
  32825. <description>Filter bits</description>
  32826. <bitOffset>29</bitOffset>
  32827. <bitWidth>1</bitWidth>
  32828. </field>
  32829. <field> <name>FB30</name>
  32830. <description>Filter bits</description>
  32831. <bitOffset>30</bitOffset>
  32832. <bitWidth>1</bitWidth>
  32833. </field>
  32834. <field> <name>FB31</name>
  32835. <description>Filter bits</description>
  32836. <bitOffset>31</bitOffset>
  32837. <bitWidth>1</bitWidth>
  32838. </field>
  32839. </fields>
  32840. </register>
  32841. <register> <name>F17R2</name>
  32842. <displayName>F17R2</displayName>
  32843. <description>Filter bank 17 register 2</description>
  32844. <addressOffset>0x2CC</addressOffset>
  32845. <size>0x20</size>
  32846. <access>read-write</access>
  32847. <resetValue>0x00000000</resetValue>
  32848. <fields>
  32849. <field> <name>FB0</name>
  32850. <description>Filter bits</description>
  32851. <bitOffset>0</bitOffset>
  32852. <bitWidth>1</bitWidth>
  32853. </field>
  32854. <field> <name>FB1</name>
  32855. <description>Filter bits</description>
  32856. <bitOffset>1</bitOffset>
  32857. <bitWidth>1</bitWidth>
  32858. </field>
  32859. <field> <name>FB2</name>
  32860. <description>Filter bits</description>
  32861. <bitOffset>2</bitOffset>
  32862. <bitWidth>1</bitWidth>
  32863. </field>
  32864. <field> <name>FB3</name>
  32865. <description>Filter bits</description>
  32866. <bitOffset>3</bitOffset>
  32867. <bitWidth>1</bitWidth>
  32868. </field>
  32869. <field> <name>FB4</name>
  32870. <description>Filter bits</description>
  32871. <bitOffset>4</bitOffset>
  32872. <bitWidth>1</bitWidth>
  32873. </field>
  32874. <field> <name>FB5</name>
  32875. <description>Filter bits</description>
  32876. <bitOffset>5</bitOffset>
  32877. <bitWidth>1</bitWidth>
  32878. </field>
  32879. <field> <name>FB6</name>
  32880. <description>Filter bits</description>
  32881. <bitOffset>6</bitOffset>
  32882. <bitWidth>1</bitWidth>
  32883. </field>
  32884. <field> <name>FB7</name>
  32885. <description>Filter bits</description>
  32886. <bitOffset>7</bitOffset>
  32887. <bitWidth>1</bitWidth>
  32888. </field>
  32889. <field> <name>FB8</name>
  32890. <description>Filter bits</description>
  32891. <bitOffset>8</bitOffset>
  32892. <bitWidth>1</bitWidth>
  32893. </field>
  32894. <field> <name>FB9</name>
  32895. <description>Filter bits</description>
  32896. <bitOffset>9</bitOffset>
  32897. <bitWidth>1</bitWidth>
  32898. </field>
  32899. <field> <name>FB10</name>
  32900. <description>Filter bits</description>
  32901. <bitOffset>10</bitOffset>
  32902. <bitWidth>1</bitWidth>
  32903. </field>
  32904. <field> <name>FB11</name>
  32905. <description>Filter bits</description>
  32906. <bitOffset>11</bitOffset>
  32907. <bitWidth>1</bitWidth>
  32908. </field>
  32909. <field> <name>FB12</name>
  32910. <description>Filter bits</description>
  32911. <bitOffset>12</bitOffset>
  32912. <bitWidth>1</bitWidth>
  32913. </field>
  32914. <field> <name>FB13</name>
  32915. <description>Filter bits</description>
  32916. <bitOffset>13</bitOffset>
  32917. <bitWidth>1</bitWidth>
  32918. </field>
  32919. <field> <name>FB14</name>
  32920. <description>Filter bits</description>
  32921. <bitOffset>14</bitOffset>
  32922. <bitWidth>1</bitWidth>
  32923. </field>
  32924. <field> <name>FB15</name>
  32925. <description>Filter bits</description>
  32926. <bitOffset>15</bitOffset>
  32927. <bitWidth>1</bitWidth>
  32928. </field>
  32929. <field> <name>FB16</name>
  32930. <description>Filter bits</description>
  32931. <bitOffset>16</bitOffset>
  32932. <bitWidth>1</bitWidth>
  32933. </field>
  32934. <field> <name>FB17</name>
  32935. <description>Filter bits</description>
  32936. <bitOffset>17</bitOffset>
  32937. <bitWidth>1</bitWidth>
  32938. </field>
  32939. <field> <name>FB18</name>
  32940. <description>Filter bits</description>
  32941. <bitOffset>18</bitOffset>
  32942. <bitWidth>1</bitWidth>
  32943. </field>
  32944. <field> <name>FB19</name>
  32945. <description>Filter bits</description>
  32946. <bitOffset>19</bitOffset>
  32947. <bitWidth>1</bitWidth>
  32948. </field>
  32949. <field> <name>FB20</name>
  32950. <description>Filter bits</description>
  32951. <bitOffset>20</bitOffset>
  32952. <bitWidth>1</bitWidth>
  32953. </field>
  32954. <field> <name>FB21</name>
  32955. <description>Filter bits</description>
  32956. <bitOffset>21</bitOffset>
  32957. <bitWidth>1</bitWidth>
  32958. </field>
  32959. <field> <name>FB22</name>
  32960. <description>Filter bits</description>
  32961. <bitOffset>22</bitOffset>
  32962. <bitWidth>1</bitWidth>
  32963. </field>
  32964. <field> <name>FB23</name>
  32965. <description>Filter bits</description>
  32966. <bitOffset>23</bitOffset>
  32967. <bitWidth>1</bitWidth>
  32968. </field>
  32969. <field> <name>FB24</name>
  32970. <description>Filter bits</description>
  32971. <bitOffset>24</bitOffset>
  32972. <bitWidth>1</bitWidth>
  32973. </field>
  32974. <field> <name>FB25</name>
  32975. <description>Filter bits</description>
  32976. <bitOffset>25</bitOffset>
  32977. <bitWidth>1</bitWidth>
  32978. </field>
  32979. <field> <name>FB26</name>
  32980. <description>Filter bits</description>
  32981. <bitOffset>26</bitOffset>
  32982. <bitWidth>1</bitWidth>
  32983. </field>
  32984. <field> <name>FB27</name>
  32985. <description>Filter bits</description>
  32986. <bitOffset>27</bitOffset>
  32987. <bitWidth>1</bitWidth>
  32988. </field>
  32989. <field> <name>FB28</name>
  32990. <description>Filter bits</description>
  32991. <bitOffset>28</bitOffset>
  32992. <bitWidth>1</bitWidth>
  32993. </field>
  32994. <field> <name>FB29</name>
  32995. <description>Filter bits</description>
  32996. <bitOffset>29</bitOffset>
  32997. <bitWidth>1</bitWidth>
  32998. </field>
  32999. <field> <name>FB30</name>
  33000. <description>Filter bits</description>
  33001. <bitOffset>30</bitOffset>
  33002. <bitWidth>1</bitWidth>
  33003. </field>
  33004. <field> <name>FB31</name>
  33005. <description>Filter bits</description>
  33006. <bitOffset>31</bitOffset>
  33007. <bitWidth>1</bitWidth>
  33008. </field>
  33009. </fields>
  33010. </register>
  33011. <register> <name>F18R1</name>
  33012. <displayName>F18R1</displayName>
  33013. <description>Filter bank 18 register 1</description>
  33014. <addressOffset>0x2D0</addressOffset>
  33015. <size>0x20</size>
  33016. <access>read-write</access>
  33017. <resetValue>0x00000000</resetValue>
  33018. <fields>
  33019. <field> <name>FB0</name>
  33020. <description>Filter bits</description>
  33021. <bitOffset>0</bitOffset>
  33022. <bitWidth>1</bitWidth>
  33023. </field>
  33024. <field> <name>FB1</name>
  33025. <description>Filter bits</description>
  33026. <bitOffset>1</bitOffset>
  33027. <bitWidth>1</bitWidth>
  33028. </field>
  33029. <field> <name>FB2</name>
  33030. <description>Filter bits</description>
  33031. <bitOffset>2</bitOffset>
  33032. <bitWidth>1</bitWidth>
  33033. </field>
  33034. <field> <name>FB3</name>
  33035. <description>Filter bits</description>
  33036. <bitOffset>3</bitOffset>
  33037. <bitWidth>1</bitWidth>
  33038. </field>
  33039. <field> <name>FB4</name>
  33040. <description>Filter bits</description>
  33041. <bitOffset>4</bitOffset>
  33042. <bitWidth>1</bitWidth>
  33043. </field>
  33044. <field> <name>FB5</name>
  33045. <description>Filter bits</description>
  33046. <bitOffset>5</bitOffset>
  33047. <bitWidth>1</bitWidth>
  33048. </field>
  33049. <field> <name>FB6</name>
  33050. <description>Filter bits</description>
  33051. <bitOffset>6</bitOffset>
  33052. <bitWidth>1</bitWidth>
  33053. </field>
  33054. <field> <name>FB7</name>
  33055. <description>Filter bits</description>
  33056. <bitOffset>7</bitOffset>
  33057. <bitWidth>1</bitWidth>
  33058. </field>
  33059. <field> <name>FB8</name>
  33060. <description>Filter bits</description>
  33061. <bitOffset>8</bitOffset>
  33062. <bitWidth>1</bitWidth>
  33063. </field>
  33064. <field> <name>FB9</name>
  33065. <description>Filter bits</description>
  33066. <bitOffset>9</bitOffset>
  33067. <bitWidth>1</bitWidth>
  33068. </field>
  33069. <field> <name>FB10</name>
  33070. <description>Filter bits</description>
  33071. <bitOffset>10</bitOffset>
  33072. <bitWidth>1</bitWidth>
  33073. </field>
  33074. <field> <name>FB11</name>
  33075. <description>Filter bits</description>
  33076. <bitOffset>11</bitOffset>
  33077. <bitWidth>1</bitWidth>
  33078. </field>
  33079. <field> <name>FB12</name>
  33080. <description>Filter bits</description>
  33081. <bitOffset>12</bitOffset>
  33082. <bitWidth>1</bitWidth>
  33083. </field>
  33084. <field> <name>FB13</name>
  33085. <description>Filter bits</description>
  33086. <bitOffset>13</bitOffset>
  33087. <bitWidth>1</bitWidth>
  33088. </field>
  33089. <field> <name>FB14</name>
  33090. <description>Filter bits</description>
  33091. <bitOffset>14</bitOffset>
  33092. <bitWidth>1</bitWidth>
  33093. </field>
  33094. <field> <name>FB15</name>
  33095. <description>Filter bits</description>
  33096. <bitOffset>15</bitOffset>
  33097. <bitWidth>1</bitWidth>
  33098. </field>
  33099. <field> <name>FB16</name>
  33100. <description>Filter bits</description>
  33101. <bitOffset>16</bitOffset>
  33102. <bitWidth>1</bitWidth>
  33103. </field>
  33104. <field> <name>FB17</name>
  33105. <description>Filter bits</description>
  33106. <bitOffset>17</bitOffset>
  33107. <bitWidth>1</bitWidth>
  33108. </field>
  33109. <field> <name>FB18</name>
  33110. <description>Filter bits</description>
  33111. <bitOffset>18</bitOffset>
  33112. <bitWidth>1</bitWidth>
  33113. </field>
  33114. <field> <name>FB19</name>
  33115. <description>Filter bits</description>
  33116. <bitOffset>19</bitOffset>
  33117. <bitWidth>1</bitWidth>
  33118. </field>
  33119. <field> <name>FB20</name>
  33120. <description>Filter bits</description>
  33121. <bitOffset>20</bitOffset>
  33122. <bitWidth>1</bitWidth>
  33123. </field>
  33124. <field> <name>FB21</name>
  33125. <description>Filter bits</description>
  33126. <bitOffset>21</bitOffset>
  33127. <bitWidth>1</bitWidth>
  33128. </field>
  33129. <field> <name>FB22</name>
  33130. <description>Filter bits</description>
  33131. <bitOffset>22</bitOffset>
  33132. <bitWidth>1</bitWidth>
  33133. </field>
  33134. <field> <name>FB23</name>
  33135. <description>Filter bits</description>
  33136. <bitOffset>23</bitOffset>
  33137. <bitWidth>1</bitWidth>
  33138. </field>
  33139. <field> <name>FB24</name>
  33140. <description>Filter bits</description>
  33141. <bitOffset>24</bitOffset>
  33142. <bitWidth>1</bitWidth>
  33143. </field>
  33144. <field> <name>FB25</name>
  33145. <description>Filter bits</description>
  33146. <bitOffset>25</bitOffset>
  33147. <bitWidth>1</bitWidth>
  33148. </field>
  33149. <field> <name>FB26</name>
  33150. <description>Filter bits</description>
  33151. <bitOffset>26</bitOffset>
  33152. <bitWidth>1</bitWidth>
  33153. </field>
  33154. <field> <name>FB27</name>
  33155. <description>Filter bits</description>
  33156. <bitOffset>27</bitOffset>
  33157. <bitWidth>1</bitWidth>
  33158. </field>
  33159. <field> <name>FB28</name>
  33160. <description>Filter bits</description>
  33161. <bitOffset>28</bitOffset>
  33162. <bitWidth>1</bitWidth>
  33163. </field>
  33164. <field> <name>FB29</name>
  33165. <description>Filter bits</description>
  33166. <bitOffset>29</bitOffset>
  33167. <bitWidth>1</bitWidth>
  33168. </field>
  33169. <field> <name>FB30</name>
  33170. <description>Filter bits</description>
  33171. <bitOffset>30</bitOffset>
  33172. <bitWidth>1</bitWidth>
  33173. </field>
  33174. <field> <name>FB31</name>
  33175. <description>Filter bits</description>
  33176. <bitOffset>31</bitOffset>
  33177. <bitWidth>1</bitWidth>
  33178. </field>
  33179. </fields>
  33180. </register>
  33181. <register> <name>F18R2</name>
  33182. <displayName>F18R2</displayName>
  33183. <description>Filter bank 18 register 2</description>
  33184. <addressOffset>0x2D4</addressOffset>
  33185. <size>0x20</size>
  33186. <access>read-write</access>
  33187. <resetValue>0x00000000</resetValue>
  33188. <fields>
  33189. <field> <name>FB0</name>
  33190. <description>Filter bits</description>
  33191. <bitOffset>0</bitOffset>
  33192. <bitWidth>1</bitWidth>
  33193. </field>
  33194. <field> <name>FB1</name>
  33195. <description>Filter bits</description>
  33196. <bitOffset>1</bitOffset>
  33197. <bitWidth>1</bitWidth>
  33198. </field>
  33199. <field> <name>FB2</name>
  33200. <description>Filter bits</description>
  33201. <bitOffset>2</bitOffset>
  33202. <bitWidth>1</bitWidth>
  33203. </field>
  33204. <field> <name>FB3</name>
  33205. <description>Filter bits</description>
  33206. <bitOffset>3</bitOffset>
  33207. <bitWidth>1</bitWidth>
  33208. </field>
  33209. <field> <name>FB4</name>
  33210. <description>Filter bits</description>
  33211. <bitOffset>4</bitOffset>
  33212. <bitWidth>1</bitWidth>
  33213. </field>
  33214. <field> <name>FB5</name>
  33215. <description>Filter bits</description>
  33216. <bitOffset>5</bitOffset>
  33217. <bitWidth>1</bitWidth>
  33218. </field>
  33219. <field> <name>FB6</name>
  33220. <description>Filter bits</description>
  33221. <bitOffset>6</bitOffset>
  33222. <bitWidth>1</bitWidth>
  33223. </field>
  33224. <field> <name>FB7</name>
  33225. <description>Filter bits</description>
  33226. <bitOffset>7</bitOffset>
  33227. <bitWidth>1</bitWidth>
  33228. </field>
  33229. <field> <name>FB8</name>
  33230. <description>Filter bits</description>
  33231. <bitOffset>8</bitOffset>
  33232. <bitWidth>1</bitWidth>
  33233. </field>
  33234. <field> <name>FB9</name>
  33235. <description>Filter bits</description>
  33236. <bitOffset>9</bitOffset>
  33237. <bitWidth>1</bitWidth>
  33238. </field>
  33239. <field> <name>FB10</name>
  33240. <description>Filter bits</description>
  33241. <bitOffset>10</bitOffset>
  33242. <bitWidth>1</bitWidth>
  33243. </field>
  33244. <field> <name>FB11</name>
  33245. <description>Filter bits</description>
  33246. <bitOffset>11</bitOffset>
  33247. <bitWidth>1</bitWidth>
  33248. </field>
  33249. <field> <name>FB12</name>
  33250. <description>Filter bits</description>
  33251. <bitOffset>12</bitOffset>
  33252. <bitWidth>1</bitWidth>
  33253. </field>
  33254. <field> <name>FB13</name>
  33255. <description>Filter bits</description>
  33256. <bitOffset>13</bitOffset>
  33257. <bitWidth>1</bitWidth>
  33258. </field>
  33259. <field> <name>FB14</name>
  33260. <description>Filter bits</description>
  33261. <bitOffset>14</bitOffset>
  33262. <bitWidth>1</bitWidth>
  33263. </field>
  33264. <field> <name>FB15</name>
  33265. <description>Filter bits</description>
  33266. <bitOffset>15</bitOffset>
  33267. <bitWidth>1</bitWidth>
  33268. </field>
  33269. <field> <name>FB16</name>
  33270. <description>Filter bits</description>
  33271. <bitOffset>16</bitOffset>
  33272. <bitWidth>1</bitWidth>
  33273. </field>
  33274. <field> <name>FB17</name>
  33275. <description>Filter bits</description>
  33276. <bitOffset>17</bitOffset>
  33277. <bitWidth>1</bitWidth>
  33278. </field>
  33279. <field> <name>FB18</name>
  33280. <description>Filter bits</description>
  33281. <bitOffset>18</bitOffset>
  33282. <bitWidth>1</bitWidth>
  33283. </field>
  33284. <field> <name>FB19</name>
  33285. <description>Filter bits</description>
  33286. <bitOffset>19</bitOffset>
  33287. <bitWidth>1</bitWidth>
  33288. </field>
  33289. <field> <name>FB20</name>
  33290. <description>Filter bits</description>
  33291. <bitOffset>20</bitOffset>
  33292. <bitWidth>1</bitWidth>
  33293. </field>
  33294. <field> <name>FB21</name>
  33295. <description>Filter bits</description>
  33296. <bitOffset>21</bitOffset>
  33297. <bitWidth>1</bitWidth>
  33298. </field>
  33299. <field> <name>FB22</name>
  33300. <description>Filter bits</description>
  33301. <bitOffset>22</bitOffset>
  33302. <bitWidth>1</bitWidth>
  33303. </field>
  33304. <field> <name>FB23</name>
  33305. <description>Filter bits</description>
  33306. <bitOffset>23</bitOffset>
  33307. <bitWidth>1</bitWidth>
  33308. </field>
  33309. <field> <name>FB24</name>
  33310. <description>Filter bits</description>
  33311. <bitOffset>24</bitOffset>
  33312. <bitWidth>1</bitWidth>
  33313. </field>
  33314. <field> <name>FB25</name>
  33315. <description>Filter bits</description>
  33316. <bitOffset>25</bitOffset>
  33317. <bitWidth>1</bitWidth>
  33318. </field>
  33319. <field> <name>FB26</name>
  33320. <description>Filter bits</description>
  33321. <bitOffset>26</bitOffset>
  33322. <bitWidth>1</bitWidth>
  33323. </field>
  33324. <field> <name>FB27</name>
  33325. <description>Filter bits</description>
  33326. <bitOffset>27</bitOffset>
  33327. <bitWidth>1</bitWidth>
  33328. </field>
  33329. <field> <name>FB28</name>
  33330. <description>Filter bits</description>
  33331. <bitOffset>28</bitOffset>
  33332. <bitWidth>1</bitWidth>
  33333. </field>
  33334. <field> <name>FB29</name>
  33335. <description>Filter bits</description>
  33336. <bitOffset>29</bitOffset>
  33337. <bitWidth>1</bitWidth>
  33338. </field>
  33339. <field> <name>FB30</name>
  33340. <description>Filter bits</description>
  33341. <bitOffset>30</bitOffset>
  33342. <bitWidth>1</bitWidth>
  33343. </field>
  33344. <field> <name>FB31</name>
  33345. <description>Filter bits</description>
  33346. <bitOffset>31</bitOffset>
  33347. <bitWidth>1</bitWidth>
  33348. </field>
  33349. </fields>
  33350. </register>
  33351. <register> <name>F19R1</name>
  33352. <displayName>F19R1</displayName>
  33353. <description>Filter bank 19 register 1</description>
  33354. <addressOffset>0x2D8</addressOffset>
  33355. <size>0x20</size>
  33356. <access>read-write</access>
  33357. <resetValue>0x00000000</resetValue>
  33358. <fields>
  33359. <field> <name>FB0</name>
  33360. <description>Filter bits</description>
  33361. <bitOffset>0</bitOffset>
  33362. <bitWidth>1</bitWidth>
  33363. </field>
  33364. <field> <name>FB1</name>
  33365. <description>Filter bits</description>
  33366. <bitOffset>1</bitOffset>
  33367. <bitWidth>1</bitWidth>
  33368. </field>
  33369. <field> <name>FB2</name>
  33370. <description>Filter bits</description>
  33371. <bitOffset>2</bitOffset>
  33372. <bitWidth>1</bitWidth>
  33373. </field>
  33374. <field> <name>FB3</name>
  33375. <description>Filter bits</description>
  33376. <bitOffset>3</bitOffset>
  33377. <bitWidth>1</bitWidth>
  33378. </field>
  33379. <field> <name>FB4</name>
  33380. <description>Filter bits</description>
  33381. <bitOffset>4</bitOffset>
  33382. <bitWidth>1</bitWidth>
  33383. </field>
  33384. <field> <name>FB5</name>
  33385. <description>Filter bits</description>
  33386. <bitOffset>5</bitOffset>
  33387. <bitWidth>1</bitWidth>
  33388. </field>
  33389. <field> <name>FB6</name>
  33390. <description>Filter bits</description>
  33391. <bitOffset>6</bitOffset>
  33392. <bitWidth>1</bitWidth>
  33393. </field>
  33394. <field> <name>FB7</name>
  33395. <description>Filter bits</description>
  33396. <bitOffset>7</bitOffset>
  33397. <bitWidth>1</bitWidth>
  33398. </field>
  33399. <field> <name>FB8</name>
  33400. <description>Filter bits</description>
  33401. <bitOffset>8</bitOffset>
  33402. <bitWidth>1</bitWidth>
  33403. </field>
  33404. <field> <name>FB9</name>
  33405. <description>Filter bits</description>
  33406. <bitOffset>9</bitOffset>
  33407. <bitWidth>1</bitWidth>
  33408. </field>
  33409. <field> <name>FB10</name>
  33410. <description>Filter bits</description>
  33411. <bitOffset>10</bitOffset>
  33412. <bitWidth>1</bitWidth>
  33413. </field>
  33414. <field> <name>FB11</name>
  33415. <description>Filter bits</description>
  33416. <bitOffset>11</bitOffset>
  33417. <bitWidth>1</bitWidth>
  33418. </field>
  33419. <field> <name>FB12</name>
  33420. <description>Filter bits</description>
  33421. <bitOffset>12</bitOffset>
  33422. <bitWidth>1</bitWidth>
  33423. </field>
  33424. <field> <name>FB13</name>
  33425. <description>Filter bits</description>
  33426. <bitOffset>13</bitOffset>
  33427. <bitWidth>1</bitWidth>
  33428. </field>
  33429. <field> <name>FB14</name>
  33430. <description>Filter bits</description>
  33431. <bitOffset>14</bitOffset>
  33432. <bitWidth>1</bitWidth>
  33433. </field>
  33434. <field> <name>FB15</name>
  33435. <description>Filter bits</description>
  33436. <bitOffset>15</bitOffset>
  33437. <bitWidth>1</bitWidth>
  33438. </field>
  33439. <field> <name>FB16</name>
  33440. <description>Filter bits</description>
  33441. <bitOffset>16</bitOffset>
  33442. <bitWidth>1</bitWidth>
  33443. </field>
  33444. <field> <name>FB17</name>
  33445. <description>Filter bits</description>
  33446. <bitOffset>17</bitOffset>
  33447. <bitWidth>1</bitWidth>
  33448. </field>
  33449. <field> <name>FB18</name>
  33450. <description>Filter bits</description>
  33451. <bitOffset>18</bitOffset>
  33452. <bitWidth>1</bitWidth>
  33453. </field>
  33454. <field> <name>FB19</name>
  33455. <description>Filter bits</description>
  33456. <bitOffset>19</bitOffset>
  33457. <bitWidth>1</bitWidth>
  33458. </field>
  33459. <field> <name>FB20</name>
  33460. <description>Filter bits</description>
  33461. <bitOffset>20</bitOffset>
  33462. <bitWidth>1</bitWidth>
  33463. </field>
  33464. <field> <name>FB21</name>
  33465. <description>Filter bits</description>
  33466. <bitOffset>21</bitOffset>
  33467. <bitWidth>1</bitWidth>
  33468. </field>
  33469. <field> <name>FB22</name>
  33470. <description>Filter bits</description>
  33471. <bitOffset>22</bitOffset>
  33472. <bitWidth>1</bitWidth>
  33473. </field>
  33474. <field> <name>FB23</name>
  33475. <description>Filter bits</description>
  33476. <bitOffset>23</bitOffset>
  33477. <bitWidth>1</bitWidth>
  33478. </field>
  33479. <field> <name>FB24</name>
  33480. <description>Filter bits</description>
  33481. <bitOffset>24</bitOffset>
  33482. <bitWidth>1</bitWidth>
  33483. </field>
  33484. <field> <name>FB25</name>
  33485. <description>Filter bits</description>
  33486. <bitOffset>25</bitOffset>
  33487. <bitWidth>1</bitWidth>
  33488. </field>
  33489. <field> <name>FB26</name>
  33490. <description>Filter bits</description>
  33491. <bitOffset>26</bitOffset>
  33492. <bitWidth>1</bitWidth>
  33493. </field>
  33494. <field> <name>FB27</name>
  33495. <description>Filter bits</description>
  33496. <bitOffset>27</bitOffset>
  33497. <bitWidth>1</bitWidth>
  33498. </field>
  33499. <field> <name>FB28</name>
  33500. <description>Filter bits</description>
  33501. <bitOffset>28</bitOffset>
  33502. <bitWidth>1</bitWidth>
  33503. </field>
  33504. <field> <name>FB29</name>
  33505. <description>Filter bits</description>
  33506. <bitOffset>29</bitOffset>
  33507. <bitWidth>1</bitWidth>
  33508. </field>
  33509. <field> <name>FB30</name>
  33510. <description>Filter bits</description>
  33511. <bitOffset>30</bitOffset>
  33512. <bitWidth>1</bitWidth>
  33513. </field>
  33514. <field> <name>FB31</name>
  33515. <description>Filter bits</description>
  33516. <bitOffset>31</bitOffset>
  33517. <bitWidth>1</bitWidth>
  33518. </field>
  33519. </fields>
  33520. </register>
  33521. <register> <name>F19R2</name>
  33522. <displayName>F19R2</displayName>
  33523. <description>Filter bank 19 register 2</description>
  33524. <addressOffset>0x2DC</addressOffset>
  33525. <size>0x20</size>
  33526. <access>read-write</access>
  33527. <resetValue>0x00000000</resetValue>
  33528. <fields>
  33529. <field> <name>FB0</name>
  33530. <description>Filter bits</description>
  33531. <bitOffset>0</bitOffset>
  33532. <bitWidth>1</bitWidth>
  33533. </field>
  33534. <field> <name>FB1</name>
  33535. <description>Filter bits</description>
  33536. <bitOffset>1</bitOffset>
  33537. <bitWidth>1</bitWidth>
  33538. </field>
  33539. <field> <name>FB2</name>
  33540. <description>Filter bits</description>
  33541. <bitOffset>2</bitOffset>
  33542. <bitWidth>1</bitWidth>
  33543. </field>
  33544. <field> <name>FB3</name>
  33545. <description>Filter bits</description>
  33546. <bitOffset>3</bitOffset>
  33547. <bitWidth>1</bitWidth>
  33548. </field>
  33549. <field> <name>FB4</name>
  33550. <description>Filter bits</description>
  33551. <bitOffset>4</bitOffset>
  33552. <bitWidth>1</bitWidth>
  33553. </field>
  33554. <field> <name>FB5</name>
  33555. <description>Filter bits</description>
  33556. <bitOffset>5</bitOffset>
  33557. <bitWidth>1</bitWidth>
  33558. </field>
  33559. <field> <name>FB6</name>
  33560. <description>Filter bits</description>
  33561. <bitOffset>6</bitOffset>
  33562. <bitWidth>1</bitWidth>
  33563. </field>
  33564. <field> <name>FB7</name>
  33565. <description>Filter bits</description>
  33566. <bitOffset>7</bitOffset>
  33567. <bitWidth>1</bitWidth>
  33568. </field>
  33569. <field> <name>FB8</name>
  33570. <description>Filter bits</description>
  33571. <bitOffset>8</bitOffset>
  33572. <bitWidth>1</bitWidth>
  33573. </field>
  33574. <field> <name>FB9</name>
  33575. <description>Filter bits</description>
  33576. <bitOffset>9</bitOffset>
  33577. <bitWidth>1</bitWidth>
  33578. </field>
  33579. <field> <name>FB10</name>
  33580. <description>Filter bits</description>
  33581. <bitOffset>10</bitOffset>
  33582. <bitWidth>1</bitWidth>
  33583. </field>
  33584. <field> <name>FB11</name>
  33585. <description>Filter bits</description>
  33586. <bitOffset>11</bitOffset>
  33587. <bitWidth>1</bitWidth>
  33588. </field>
  33589. <field> <name>FB12</name>
  33590. <description>Filter bits</description>
  33591. <bitOffset>12</bitOffset>
  33592. <bitWidth>1</bitWidth>
  33593. </field>
  33594. <field> <name>FB13</name>
  33595. <description>Filter bits</description>
  33596. <bitOffset>13</bitOffset>
  33597. <bitWidth>1</bitWidth>
  33598. </field>
  33599. <field> <name>FB14</name>
  33600. <description>Filter bits</description>
  33601. <bitOffset>14</bitOffset>
  33602. <bitWidth>1</bitWidth>
  33603. </field>
  33604. <field> <name>FB15</name>
  33605. <description>Filter bits</description>
  33606. <bitOffset>15</bitOffset>
  33607. <bitWidth>1</bitWidth>
  33608. </field>
  33609. <field> <name>FB16</name>
  33610. <description>Filter bits</description>
  33611. <bitOffset>16</bitOffset>
  33612. <bitWidth>1</bitWidth>
  33613. </field>
  33614. <field> <name>FB17</name>
  33615. <description>Filter bits</description>
  33616. <bitOffset>17</bitOffset>
  33617. <bitWidth>1</bitWidth>
  33618. </field>
  33619. <field> <name>FB18</name>
  33620. <description>Filter bits</description>
  33621. <bitOffset>18</bitOffset>
  33622. <bitWidth>1</bitWidth>
  33623. </field>
  33624. <field> <name>FB19</name>
  33625. <description>Filter bits</description>
  33626. <bitOffset>19</bitOffset>
  33627. <bitWidth>1</bitWidth>
  33628. </field>
  33629. <field> <name>FB20</name>
  33630. <description>Filter bits</description>
  33631. <bitOffset>20</bitOffset>
  33632. <bitWidth>1</bitWidth>
  33633. </field>
  33634. <field> <name>FB21</name>
  33635. <description>Filter bits</description>
  33636. <bitOffset>21</bitOffset>
  33637. <bitWidth>1</bitWidth>
  33638. </field>
  33639. <field> <name>FB22</name>
  33640. <description>Filter bits</description>
  33641. <bitOffset>22</bitOffset>
  33642. <bitWidth>1</bitWidth>
  33643. </field>
  33644. <field> <name>FB23</name>
  33645. <description>Filter bits</description>
  33646. <bitOffset>23</bitOffset>
  33647. <bitWidth>1</bitWidth>
  33648. </field>
  33649. <field> <name>FB24</name>
  33650. <description>Filter bits</description>
  33651. <bitOffset>24</bitOffset>
  33652. <bitWidth>1</bitWidth>
  33653. </field>
  33654. <field> <name>FB25</name>
  33655. <description>Filter bits</description>
  33656. <bitOffset>25</bitOffset>
  33657. <bitWidth>1</bitWidth>
  33658. </field>
  33659. <field> <name>FB26</name>
  33660. <description>Filter bits</description>
  33661. <bitOffset>26</bitOffset>
  33662. <bitWidth>1</bitWidth>
  33663. </field>
  33664. <field> <name>FB27</name>
  33665. <description>Filter bits</description>
  33666. <bitOffset>27</bitOffset>
  33667. <bitWidth>1</bitWidth>
  33668. </field>
  33669. <field> <name>FB28</name>
  33670. <description>Filter bits</description>
  33671. <bitOffset>28</bitOffset>
  33672. <bitWidth>1</bitWidth>
  33673. </field>
  33674. <field> <name>FB29</name>
  33675. <description>Filter bits</description>
  33676. <bitOffset>29</bitOffset>
  33677. <bitWidth>1</bitWidth>
  33678. </field>
  33679. <field> <name>FB30</name>
  33680. <description>Filter bits</description>
  33681. <bitOffset>30</bitOffset>
  33682. <bitWidth>1</bitWidth>
  33683. </field>
  33684. <field> <name>FB31</name>
  33685. <description>Filter bits</description>
  33686. <bitOffset>31</bitOffset>
  33687. <bitWidth>1</bitWidth>
  33688. </field>
  33689. </fields>
  33690. </register>
  33691. <register> <name>F20R1</name>
  33692. <displayName>F20R1</displayName>
  33693. <description>Filter bank 20 register 1</description>
  33694. <addressOffset>0x2E0</addressOffset>
  33695. <size>0x20</size>
  33696. <access>read-write</access>
  33697. <resetValue>0x00000000</resetValue>
  33698. <fields>
  33699. <field> <name>FB0</name>
  33700. <description>Filter bits</description>
  33701. <bitOffset>0</bitOffset>
  33702. <bitWidth>1</bitWidth>
  33703. </field>
  33704. <field> <name>FB1</name>
  33705. <description>Filter bits</description>
  33706. <bitOffset>1</bitOffset>
  33707. <bitWidth>1</bitWidth>
  33708. </field>
  33709. <field> <name>FB2</name>
  33710. <description>Filter bits</description>
  33711. <bitOffset>2</bitOffset>
  33712. <bitWidth>1</bitWidth>
  33713. </field>
  33714. <field> <name>FB3</name>
  33715. <description>Filter bits</description>
  33716. <bitOffset>3</bitOffset>
  33717. <bitWidth>1</bitWidth>
  33718. </field>
  33719. <field> <name>FB4</name>
  33720. <description>Filter bits</description>
  33721. <bitOffset>4</bitOffset>
  33722. <bitWidth>1</bitWidth>
  33723. </field>
  33724. <field> <name>FB5</name>
  33725. <description>Filter bits</description>
  33726. <bitOffset>5</bitOffset>
  33727. <bitWidth>1</bitWidth>
  33728. </field>
  33729. <field> <name>FB6</name>
  33730. <description>Filter bits</description>
  33731. <bitOffset>6</bitOffset>
  33732. <bitWidth>1</bitWidth>
  33733. </field>
  33734. <field> <name>FB7</name>
  33735. <description>Filter bits</description>
  33736. <bitOffset>7</bitOffset>
  33737. <bitWidth>1</bitWidth>
  33738. </field>
  33739. <field> <name>FB8</name>
  33740. <description>Filter bits</description>
  33741. <bitOffset>8</bitOffset>
  33742. <bitWidth>1</bitWidth>
  33743. </field>
  33744. <field> <name>FB9</name>
  33745. <description>Filter bits</description>
  33746. <bitOffset>9</bitOffset>
  33747. <bitWidth>1</bitWidth>
  33748. </field>
  33749. <field> <name>FB10</name>
  33750. <description>Filter bits</description>
  33751. <bitOffset>10</bitOffset>
  33752. <bitWidth>1</bitWidth>
  33753. </field>
  33754. <field> <name>FB11</name>
  33755. <description>Filter bits</description>
  33756. <bitOffset>11</bitOffset>
  33757. <bitWidth>1</bitWidth>
  33758. </field>
  33759. <field> <name>FB12</name>
  33760. <description>Filter bits</description>
  33761. <bitOffset>12</bitOffset>
  33762. <bitWidth>1</bitWidth>
  33763. </field>
  33764. <field> <name>FB13</name>
  33765. <description>Filter bits</description>
  33766. <bitOffset>13</bitOffset>
  33767. <bitWidth>1</bitWidth>
  33768. </field>
  33769. <field> <name>FB14</name>
  33770. <description>Filter bits</description>
  33771. <bitOffset>14</bitOffset>
  33772. <bitWidth>1</bitWidth>
  33773. </field>
  33774. <field> <name>FB15</name>
  33775. <description>Filter bits</description>
  33776. <bitOffset>15</bitOffset>
  33777. <bitWidth>1</bitWidth>
  33778. </field>
  33779. <field> <name>FB16</name>
  33780. <description>Filter bits</description>
  33781. <bitOffset>16</bitOffset>
  33782. <bitWidth>1</bitWidth>
  33783. </field>
  33784. <field> <name>FB17</name>
  33785. <description>Filter bits</description>
  33786. <bitOffset>17</bitOffset>
  33787. <bitWidth>1</bitWidth>
  33788. </field>
  33789. <field> <name>FB18</name>
  33790. <description>Filter bits</description>
  33791. <bitOffset>18</bitOffset>
  33792. <bitWidth>1</bitWidth>
  33793. </field>
  33794. <field> <name>FB19</name>
  33795. <description>Filter bits</description>
  33796. <bitOffset>19</bitOffset>
  33797. <bitWidth>1</bitWidth>
  33798. </field>
  33799. <field> <name>FB20</name>
  33800. <description>Filter bits</description>
  33801. <bitOffset>20</bitOffset>
  33802. <bitWidth>1</bitWidth>
  33803. </field>
  33804. <field> <name>FB21</name>
  33805. <description>Filter bits</description>
  33806. <bitOffset>21</bitOffset>
  33807. <bitWidth>1</bitWidth>
  33808. </field>
  33809. <field> <name>FB22</name>
  33810. <description>Filter bits</description>
  33811. <bitOffset>22</bitOffset>
  33812. <bitWidth>1</bitWidth>
  33813. </field>
  33814. <field> <name>FB23</name>
  33815. <description>Filter bits</description>
  33816. <bitOffset>23</bitOffset>
  33817. <bitWidth>1</bitWidth>
  33818. </field>
  33819. <field> <name>FB24</name>
  33820. <description>Filter bits</description>
  33821. <bitOffset>24</bitOffset>
  33822. <bitWidth>1</bitWidth>
  33823. </field>
  33824. <field> <name>FB25</name>
  33825. <description>Filter bits</description>
  33826. <bitOffset>25</bitOffset>
  33827. <bitWidth>1</bitWidth>
  33828. </field>
  33829. <field> <name>FB26</name>
  33830. <description>Filter bits</description>
  33831. <bitOffset>26</bitOffset>
  33832. <bitWidth>1</bitWidth>
  33833. </field>
  33834. <field> <name>FB27</name>
  33835. <description>Filter bits</description>
  33836. <bitOffset>27</bitOffset>
  33837. <bitWidth>1</bitWidth>
  33838. </field>
  33839. <field> <name>FB28</name>
  33840. <description>Filter bits</description>
  33841. <bitOffset>28</bitOffset>
  33842. <bitWidth>1</bitWidth>
  33843. </field>
  33844. <field> <name>FB29</name>
  33845. <description>Filter bits</description>
  33846. <bitOffset>29</bitOffset>
  33847. <bitWidth>1</bitWidth>
  33848. </field>
  33849. <field> <name>FB30</name>
  33850. <description>Filter bits</description>
  33851. <bitOffset>30</bitOffset>
  33852. <bitWidth>1</bitWidth>
  33853. </field>
  33854. <field> <name>FB31</name>
  33855. <description>Filter bits</description>
  33856. <bitOffset>31</bitOffset>
  33857. <bitWidth>1</bitWidth>
  33858. </field>
  33859. </fields>
  33860. </register>
  33861. <register> <name>F20R2</name>
  33862. <displayName>F20R2</displayName>
  33863. <description>Filter bank 20 register 2</description>
  33864. <addressOffset>0x2E4</addressOffset>
  33865. <size>0x20</size>
  33866. <access>read-write</access>
  33867. <resetValue>0x00000000</resetValue>
  33868. <fields>
  33869. <field> <name>FB0</name>
  33870. <description>Filter bits</description>
  33871. <bitOffset>0</bitOffset>
  33872. <bitWidth>1</bitWidth>
  33873. </field>
  33874. <field> <name>FB1</name>
  33875. <description>Filter bits</description>
  33876. <bitOffset>1</bitOffset>
  33877. <bitWidth>1</bitWidth>
  33878. </field>
  33879. <field> <name>FB2</name>
  33880. <description>Filter bits</description>
  33881. <bitOffset>2</bitOffset>
  33882. <bitWidth>1</bitWidth>
  33883. </field>
  33884. <field> <name>FB3</name>
  33885. <description>Filter bits</description>
  33886. <bitOffset>3</bitOffset>
  33887. <bitWidth>1</bitWidth>
  33888. </field>
  33889. <field> <name>FB4</name>
  33890. <description>Filter bits</description>
  33891. <bitOffset>4</bitOffset>
  33892. <bitWidth>1</bitWidth>
  33893. </field>
  33894. <field> <name>FB5</name>
  33895. <description>Filter bits</description>
  33896. <bitOffset>5</bitOffset>
  33897. <bitWidth>1</bitWidth>
  33898. </field>
  33899. <field> <name>FB6</name>
  33900. <description>Filter bits</description>
  33901. <bitOffset>6</bitOffset>
  33902. <bitWidth>1</bitWidth>
  33903. </field>
  33904. <field> <name>FB7</name>
  33905. <description>Filter bits</description>
  33906. <bitOffset>7</bitOffset>
  33907. <bitWidth>1</bitWidth>
  33908. </field>
  33909. <field> <name>FB8</name>
  33910. <description>Filter bits</description>
  33911. <bitOffset>8</bitOffset>
  33912. <bitWidth>1</bitWidth>
  33913. </field>
  33914. <field> <name>FB9</name>
  33915. <description>Filter bits</description>
  33916. <bitOffset>9</bitOffset>
  33917. <bitWidth>1</bitWidth>
  33918. </field>
  33919. <field> <name>FB10</name>
  33920. <description>Filter bits</description>
  33921. <bitOffset>10</bitOffset>
  33922. <bitWidth>1</bitWidth>
  33923. </field>
  33924. <field> <name>FB11</name>
  33925. <description>Filter bits</description>
  33926. <bitOffset>11</bitOffset>
  33927. <bitWidth>1</bitWidth>
  33928. </field>
  33929. <field> <name>FB12</name>
  33930. <description>Filter bits</description>
  33931. <bitOffset>12</bitOffset>
  33932. <bitWidth>1</bitWidth>
  33933. </field>
  33934. <field> <name>FB13</name>
  33935. <description>Filter bits</description>
  33936. <bitOffset>13</bitOffset>
  33937. <bitWidth>1</bitWidth>
  33938. </field>
  33939. <field> <name>FB14</name>
  33940. <description>Filter bits</description>
  33941. <bitOffset>14</bitOffset>
  33942. <bitWidth>1</bitWidth>
  33943. </field>
  33944. <field> <name>FB15</name>
  33945. <description>Filter bits</description>
  33946. <bitOffset>15</bitOffset>
  33947. <bitWidth>1</bitWidth>
  33948. </field>
  33949. <field> <name>FB16</name>
  33950. <description>Filter bits</description>
  33951. <bitOffset>16</bitOffset>
  33952. <bitWidth>1</bitWidth>
  33953. </field>
  33954. <field> <name>FB17</name>
  33955. <description>Filter bits</description>
  33956. <bitOffset>17</bitOffset>
  33957. <bitWidth>1</bitWidth>
  33958. </field>
  33959. <field> <name>FB18</name>
  33960. <description>Filter bits</description>
  33961. <bitOffset>18</bitOffset>
  33962. <bitWidth>1</bitWidth>
  33963. </field>
  33964. <field> <name>FB19</name>
  33965. <description>Filter bits</description>
  33966. <bitOffset>19</bitOffset>
  33967. <bitWidth>1</bitWidth>
  33968. </field>
  33969. <field> <name>FB20</name>
  33970. <description>Filter bits</description>
  33971. <bitOffset>20</bitOffset>
  33972. <bitWidth>1</bitWidth>
  33973. </field>
  33974. <field> <name>FB21</name>
  33975. <description>Filter bits</description>
  33976. <bitOffset>21</bitOffset>
  33977. <bitWidth>1</bitWidth>
  33978. </field>
  33979. <field> <name>FB22</name>
  33980. <description>Filter bits</description>
  33981. <bitOffset>22</bitOffset>
  33982. <bitWidth>1</bitWidth>
  33983. </field>
  33984. <field> <name>FB23</name>
  33985. <description>Filter bits</description>
  33986. <bitOffset>23</bitOffset>
  33987. <bitWidth>1</bitWidth>
  33988. </field>
  33989. <field> <name>FB24</name>
  33990. <description>Filter bits</description>
  33991. <bitOffset>24</bitOffset>
  33992. <bitWidth>1</bitWidth>
  33993. </field>
  33994. <field> <name>FB25</name>
  33995. <description>Filter bits</description>
  33996. <bitOffset>25</bitOffset>
  33997. <bitWidth>1</bitWidth>
  33998. </field>
  33999. <field> <name>FB26</name>
  34000. <description>Filter bits</description>
  34001. <bitOffset>26</bitOffset>
  34002. <bitWidth>1</bitWidth>
  34003. </field>
  34004. <field> <name>FB27</name>
  34005. <description>Filter bits</description>
  34006. <bitOffset>27</bitOffset>
  34007. <bitWidth>1</bitWidth>
  34008. </field>
  34009. <field> <name>FB28</name>
  34010. <description>Filter bits</description>
  34011. <bitOffset>28</bitOffset>
  34012. <bitWidth>1</bitWidth>
  34013. </field>
  34014. <field> <name>FB29</name>
  34015. <description>Filter bits</description>
  34016. <bitOffset>29</bitOffset>
  34017. <bitWidth>1</bitWidth>
  34018. </field>
  34019. <field> <name>FB30</name>
  34020. <description>Filter bits</description>
  34021. <bitOffset>30</bitOffset>
  34022. <bitWidth>1</bitWidth>
  34023. </field>
  34024. <field> <name>FB31</name>
  34025. <description>Filter bits</description>
  34026. <bitOffset>31</bitOffset>
  34027. <bitWidth>1</bitWidth>
  34028. </field>
  34029. </fields>
  34030. </register>
  34031. <register> <name>F21R1</name>
  34032. <displayName>F21R1</displayName>
  34033. <description>Filter bank 21 register 1</description>
  34034. <addressOffset>0x2E8</addressOffset>
  34035. <size>0x20</size>
  34036. <access>read-write</access>
  34037. <resetValue>0x00000000</resetValue>
  34038. <fields>
  34039. <field> <name>FB0</name>
  34040. <description>Filter bits</description>
  34041. <bitOffset>0</bitOffset>
  34042. <bitWidth>1</bitWidth>
  34043. </field>
  34044. <field> <name>FB1</name>
  34045. <description>Filter bits</description>
  34046. <bitOffset>1</bitOffset>
  34047. <bitWidth>1</bitWidth>
  34048. </field>
  34049. <field> <name>FB2</name>
  34050. <description>Filter bits</description>
  34051. <bitOffset>2</bitOffset>
  34052. <bitWidth>1</bitWidth>
  34053. </field>
  34054. <field> <name>FB3</name>
  34055. <description>Filter bits</description>
  34056. <bitOffset>3</bitOffset>
  34057. <bitWidth>1</bitWidth>
  34058. </field>
  34059. <field> <name>FB4</name>
  34060. <description>Filter bits</description>
  34061. <bitOffset>4</bitOffset>
  34062. <bitWidth>1</bitWidth>
  34063. </field>
  34064. <field> <name>FB5</name>
  34065. <description>Filter bits</description>
  34066. <bitOffset>5</bitOffset>
  34067. <bitWidth>1</bitWidth>
  34068. </field>
  34069. <field> <name>FB6</name>
  34070. <description>Filter bits</description>
  34071. <bitOffset>6</bitOffset>
  34072. <bitWidth>1</bitWidth>
  34073. </field>
  34074. <field> <name>FB7</name>
  34075. <description>Filter bits</description>
  34076. <bitOffset>7</bitOffset>
  34077. <bitWidth>1</bitWidth>
  34078. </field>
  34079. <field> <name>FB8</name>
  34080. <description>Filter bits</description>
  34081. <bitOffset>8</bitOffset>
  34082. <bitWidth>1</bitWidth>
  34083. </field>
  34084. <field> <name>FB9</name>
  34085. <description>Filter bits</description>
  34086. <bitOffset>9</bitOffset>
  34087. <bitWidth>1</bitWidth>
  34088. </field>
  34089. <field> <name>FB10</name>
  34090. <description>Filter bits</description>
  34091. <bitOffset>10</bitOffset>
  34092. <bitWidth>1</bitWidth>
  34093. </field>
  34094. <field> <name>FB11</name>
  34095. <description>Filter bits</description>
  34096. <bitOffset>11</bitOffset>
  34097. <bitWidth>1</bitWidth>
  34098. </field>
  34099. <field> <name>FB12</name>
  34100. <description>Filter bits</description>
  34101. <bitOffset>12</bitOffset>
  34102. <bitWidth>1</bitWidth>
  34103. </field>
  34104. <field> <name>FB13</name>
  34105. <description>Filter bits</description>
  34106. <bitOffset>13</bitOffset>
  34107. <bitWidth>1</bitWidth>
  34108. </field>
  34109. <field> <name>FB14</name>
  34110. <description>Filter bits</description>
  34111. <bitOffset>14</bitOffset>
  34112. <bitWidth>1</bitWidth>
  34113. </field>
  34114. <field> <name>FB15</name>
  34115. <description>Filter bits</description>
  34116. <bitOffset>15</bitOffset>
  34117. <bitWidth>1</bitWidth>
  34118. </field>
  34119. <field> <name>FB16</name>
  34120. <description>Filter bits</description>
  34121. <bitOffset>16</bitOffset>
  34122. <bitWidth>1</bitWidth>
  34123. </field>
  34124. <field> <name>FB17</name>
  34125. <description>Filter bits</description>
  34126. <bitOffset>17</bitOffset>
  34127. <bitWidth>1</bitWidth>
  34128. </field>
  34129. <field> <name>FB18</name>
  34130. <description>Filter bits</description>
  34131. <bitOffset>18</bitOffset>
  34132. <bitWidth>1</bitWidth>
  34133. </field>
  34134. <field> <name>FB19</name>
  34135. <description>Filter bits</description>
  34136. <bitOffset>19</bitOffset>
  34137. <bitWidth>1</bitWidth>
  34138. </field>
  34139. <field> <name>FB20</name>
  34140. <description>Filter bits</description>
  34141. <bitOffset>20</bitOffset>
  34142. <bitWidth>1</bitWidth>
  34143. </field>
  34144. <field> <name>FB21</name>
  34145. <description>Filter bits</description>
  34146. <bitOffset>21</bitOffset>
  34147. <bitWidth>1</bitWidth>
  34148. </field>
  34149. <field> <name>FB22</name>
  34150. <description>Filter bits</description>
  34151. <bitOffset>22</bitOffset>
  34152. <bitWidth>1</bitWidth>
  34153. </field>
  34154. <field> <name>FB23</name>
  34155. <description>Filter bits</description>
  34156. <bitOffset>23</bitOffset>
  34157. <bitWidth>1</bitWidth>
  34158. </field>
  34159. <field> <name>FB24</name>
  34160. <description>Filter bits</description>
  34161. <bitOffset>24</bitOffset>
  34162. <bitWidth>1</bitWidth>
  34163. </field>
  34164. <field> <name>FB25</name>
  34165. <description>Filter bits</description>
  34166. <bitOffset>25</bitOffset>
  34167. <bitWidth>1</bitWidth>
  34168. </field>
  34169. <field> <name>FB26</name>
  34170. <description>Filter bits</description>
  34171. <bitOffset>26</bitOffset>
  34172. <bitWidth>1</bitWidth>
  34173. </field>
  34174. <field> <name>FB27</name>
  34175. <description>Filter bits</description>
  34176. <bitOffset>27</bitOffset>
  34177. <bitWidth>1</bitWidth>
  34178. </field>
  34179. <field> <name>FB28</name>
  34180. <description>Filter bits</description>
  34181. <bitOffset>28</bitOffset>
  34182. <bitWidth>1</bitWidth>
  34183. </field>
  34184. <field> <name>FB29</name>
  34185. <description>Filter bits</description>
  34186. <bitOffset>29</bitOffset>
  34187. <bitWidth>1</bitWidth>
  34188. </field>
  34189. <field> <name>FB30</name>
  34190. <description>Filter bits</description>
  34191. <bitOffset>30</bitOffset>
  34192. <bitWidth>1</bitWidth>
  34193. </field>
  34194. <field> <name>FB31</name>
  34195. <description>Filter bits</description>
  34196. <bitOffset>31</bitOffset>
  34197. <bitWidth>1</bitWidth>
  34198. </field>
  34199. </fields>
  34200. </register>
  34201. <register> <name>F21R2</name>
  34202. <displayName>F21R2</displayName>
  34203. <description>Filter bank 21 register 2</description>
  34204. <addressOffset>0x2EC</addressOffset>
  34205. <size>0x20</size>
  34206. <access>read-write</access>
  34207. <resetValue>0x00000000</resetValue>
  34208. <fields>
  34209. <field> <name>FB0</name>
  34210. <description>Filter bits</description>
  34211. <bitOffset>0</bitOffset>
  34212. <bitWidth>1</bitWidth>
  34213. </field>
  34214. <field> <name>FB1</name>
  34215. <description>Filter bits</description>
  34216. <bitOffset>1</bitOffset>
  34217. <bitWidth>1</bitWidth>
  34218. </field>
  34219. <field> <name>FB2</name>
  34220. <description>Filter bits</description>
  34221. <bitOffset>2</bitOffset>
  34222. <bitWidth>1</bitWidth>
  34223. </field>
  34224. <field> <name>FB3</name>
  34225. <description>Filter bits</description>
  34226. <bitOffset>3</bitOffset>
  34227. <bitWidth>1</bitWidth>
  34228. </field>
  34229. <field> <name>FB4</name>
  34230. <description>Filter bits</description>
  34231. <bitOffset>4</bitOffset>
  34232. <bitWidth>1</bitWidth>
  34233. </field>
  34234. <field> <name>FB5</name>
  34235. <description>Filter bits</description>
  34236. <bitOffset>5</bitOffset>
  34237. <bitWidth>1</bitWidth>
  34238. </field>
  34239. <field> <name>FB6</name>
  34240. <description>Filter bits</description>
  34241. <bitOffset>6</bitOffset>
  34242. <bitWidth>1</bitWidth>
  34243. </field>
  34244. <field> <name>FB7</name>
  34245. <description>Filter bits</description>
  34246. <bitOffset>7</bitOffset>
  34247. <bitWidth>1</bitWidth>
  34248. </field>
  34249. <field> <name>FB8</name>
  34250. <description>Filter bits</description>
  34251. <bitOffset>8</bitOffset>
  34252. <bitWidth>1</bitWidth>
  34253. </field>
  34254. <field> <name>FB9</name>
  34255. <description>Filter bits</description>
  34256. <bitOffset>9</bitOffset>
  34257. <bitWidth>1</bitWidth>
  34258. </field>
  34259. <field> <name>FB10</name>
  34260. <description>Filter bits</description>
  34261. <bitOffset>10</bitOffset>
  34262. <bitWidth>1</bitWidth>
  34263. </field>
  34264. <field> <name>FB11</name>
  34265. <description>Filter bits</description>
  34266. <bitOffset>11</bitOffset>
  34267. <bitWidth>1</bitWidth>
  34268. </field>
  34269. <field> <name>FB12</name>
  34270. <description>Filter bits</description>
  34271. <bitOffset>12</bitOffset>
  34272. <bitWidth>1</bitWidth>
  34273. </field>
  34274. <field> <name>FB13</name>
  34275. <description>Filter bits</description>
  34276. <bitOffset>13</bitOffset>
  34277. <bitWidth>1</bitWidth>
  34278. </field>
  34279. <field> <name>FB14</name>
  34280. <description>Filter bits</description>
  34281. <bitOffset>14</bitOffset>
  34282. <bitWidth>1</bitWidth>
  34283. </field>
  34284. <field> <name>FB15</name>
  34285. <description>Filter bits</description>
  34286. <bitOffset>15</bitOffset>
  34287. <bitWidth>1</bitWidth>
  34288. </field>
  34289. <field> <name>FB16</name>
  34290. <description>Filter bits</description>
  34291. <bitOffset>16</bitOffset>
  34292. <bitWidth>1</bitWidth>
  34293. </field>
  34294. <field> <name>FB17</name>
  34295. <description>Filter bits</description>
  34296. <bitOffset>17</bitOffset>
  34297. <bitWidth>1</bitWidth>
  34298. </field>
  34299. <field> <name>FB18</name>
  34300. <description>Filter bits</description>
  34301. <bitOffset>18</bitOffset>
  34302. <bitWidth>1</bitWidth>
  34303. </field>
  34304. <field> <name>FB19</name>
  34305. <description>Filter bits</description>
  34306. <bitOffset>19</bitOffset>
  34307. <bitWidth>1</bitWidth>
  34308. </field>
  34309. <field> <name>FB20</name>
  34310. <description>Filter bits</description>
  34311. <bitOffset>20</bitOffset>
  34312. <bitWidth>1</bitWidth>
  34313. </field>
  34314. <field> <name>FB21</name>
  34315. <description>Filter bits</description>
  34316. <bitOffset>21</bitOffset>
  34317. <bitWidth>1</bitWidth>
  34318. </field>
  34319. <field> <name>FB22</name>
  34320. <description>Filter bits</description>
  34321. <bitOffset>22</bitOffset>
  34322. <bitWidth>1</bitWidth>
  34323. </field>
  34324. <field> <name>FB23</name>
  34325. <description>Filter bits</description>
  34326. <bitOffset>23</bitOffset>
  34327. <bitWidth>1</bitWidth>
  34328. </field>
  34329. <field> <name>FB24</name>
  34330. <description>Filter bits</description>
  34331. <bitOffset>24</bitOffset>
  34332. <bitWidth>1</bitWidth>
  34333. </field>
  34334. <field> <name>FB25</name>
  34335. <description>Filter bits</description>
  34336. <bitOffset>25</bitOffset>
  34337. <bitWidth>1</bitWidth>
  34338. </field>
  34339. <field> <name>FB26</name>
  34340. <description>Filter bits</description>
  34341. <bitOffset>26</bitOffset>
  34342. <bitWidth>1</bitWidth>
  34343. </field>
  34344. <field> <name>FB27</name>
  34345. <description>Filter bits</description>
  34346. <bitOffset>27</bitOffset>
  34347. <bitWidth>1</bitWidth>
  34348. </field>
  34349. <field> <name>FB28</name>
  34350. <description>Filter bits</description>
  34351. <bitOffset>28</bitOffset>
  34352. <bitWidth>1</bitWidth>
  34353. </field>
  34354. <field> <name>FB29</name>
  34355. <description>Filter bits</description>
  34356. <bitOffset>29</bitOffset>
  34357. <bitWidth>1</bitWidth>
  34358. </field>
  34359. <field> <name>FB30</name>
  34360. <description>Filter bits</description>
  34361. <bitOffset>30</bitOffset>
  34362. <bitWidth>1</bitWidth>
  34363. </field>
  34364. <field> <name>FB31</name>
  34365. <description>Filter bits</description>
  34366. <bitOffset>31</bitOffset>
  34367. <bitWidth>1</bitWidth>
  34368. </field>
  34369. </fields>
  34370. </register>
  34371. <register> <name>F22R1</name>
  34372. <displayName>F22R1</displayName>
  34373. <description>Filter bank 22 register 1</description>
  34374. <addressOffset>0x2F0</addressOffset>
  34375. <size>0x20</size>
  34376. <access>read-write</access>
  34377. <resetValue>0x00000000</resetValue>
  34378. <fields>
  34379. <field> <name>FB0</name>
  34380. <description>Filter bits</description>
  34381. <bitOffset>0</bitOffset>
  34382. <bitWidth>1</bitWidth>
  34383. </field>
  34384. <field> <name>FB1</name>
  34385. <description>Filter bits</description>
  34386. <bitOffset>1</bitOffset>
  34387. <bitWidth>1</bitWidth>
  34388. </field>
  34389. <field> <name>FB2</name>
  34390. <description>Filter bits</description>
  34391. <bitOffset>2</bitOffset>
  34392. <bitWidth>1</bitWidth>
  34393. </field>
  34394. <field> <name>FB3</name>
  34395. <description>Filter bits</description>
  34396. <bitOffset>3</bitOffset>
  34397. <bitWidth>1</bitWidth>
  34398. </field>
  34399. <field> <name>FB4</name>
  34400. <description>Filter bits</description>
  34401. <bitOffset>4</bitOffset>
  34402. <bitWidth>1</bitWidth>
  34403. </field>
  34404. <field> <name>FB5</name>
  34405. <description>Filter bits</description>
  34406. <bitOffset>5</bitOffset>
  34407. <bitWidth>1</bitWidth>
  34408. </field>
  34409. <field> <name>FB6</name>
  34410. <description>Filter bits</description>
  34411. <bitOffset>6</bitOffset>
  34412. <bitWidth>1</bitWidth>
  34413. </field>
  34414. <field> <name>FB7</name>
  34415. <description>Filter bits</description>
  34416. <bitOffset>7</bitOffset>
  34417. <bitWidth>1</bitWidth>
  34418. </field>
  34419. <field> <name>FB8</name>
  34420. <description>Filter bits</description>
  34421. <bitOffset>8</bitOffset>
  34422. <bitWidth>1</bitWidth>
  34423. </field>
  34424. <field> <name>FB9</name>
  34425. <description>Filter bits</description>
  34426. <bitOffset>9</bitOffset>
  34427. <bitWidth>1</bitWidth>
  34428. </field>
  34429. <field> <name>FB10</name>
  34430. <description>Filter bits</description>
  34431. <bitOffset>10</bitOffset>
  34432. <bitWidth>1</bitWidth>
  34433. </field>
  34434. <field> <name>FB11</name>
  34435. <description>Filter bits</description>
  34436. <bitOffset>11</bitOffset>
  34437. <bitWidth>1</bitWidth>
  34438. </field>
  34439. <field> <name>FB12</name>
  34440. <description>Filter bits</description>
  34441. <bitOffset>12</bitOffset>
  34442. <bitWidth>1</bitWidth>
  34443. </field>
  34444. <field> <name>FB13</name>
  34445. <description>Filter bits</description>
  34446. <bitOffset>13</bitOffset>
  34447. <bitWidth>1</bitWidth>
  34448. </field>
  34449. <field> <name>FB14</name>
  34450. <description>Filter bits</description>
  34451. <bitOffset>14</bitOffset>
  34452. <bitWidth>1</bitWidth>
  34453. </field>
  34454. <field> <name>FB15</name>
  34455. <description>Filter bits</description>
  34456. <bitOffset>15</bitOffset>
  34457. <bitWidth>1</bitWidth>
  34458. </field>
  34459. <field> <name>FB16</name>
  34460. <description>Filter bits</description>
  34461. <bitOffset>16</bitOffset>
  34462. <bitWidth>1</bitWidth>
  34463. </field>
  34464. <field> <name>FB17</name>
  34465. <description>Filter bits</description>
  34466. <bitOffset>17</bitOffset>
  34467. <bitWidth>1</bitWidth>
  34468. </field>
  34469. <field> <name>FB18</name>
  34470. <description>Filter bits</description>
  34471. <bitOffset>18</bitOffset>
  34472. <bitWidth>1</bitWidth>
  34473. </field>
  34474. <field> <name>FB19</name>
  34475. <description>Filter bits</description>
  34476. <bitOffset>19</bitOffset>
  34477. <bitWidth>1</bitWidth>
  34478. </field>
  34479. <field> <name>FB20</name>
  34480. <description>Filter bits</description>
  34481. <bitOffset>20</bitOffset>
  34482. <bitWidth>1</bitWidth>
  34483. </field>
  34484. <field> <name>FB21</name>
  34485. <description>Filter bits</description>
  34486. <bitOffset>21</bitOffset>
  34487. <bitWidth>1</bitWidth>
  34488. </field>
  34489. <field> <name>FB22</name>
  34490. <description>Filter bits</description>
  34491. <bitOffset>22</bitOffset>
  34492. <bitWidth>1</bitWidth>
  34493. </field>
  34494. <field> <name>FB23</name>
  34495. <description>Filter bits</description>
  34496. <bitOffset>23</bitOffset>
  34497. <bitWidth>1</bitWidth>
  34498. </field>
  34499. <field> <name>FB24</name>
  34500. <description>Filter bits</description>
  34501. <bitOffset>24</bitOffset>
  34502. <bitWidth>1</bitWidth>
  34503. </field>
  34504. <field> <name>FB25</name>
  34505. <description>Filter bits</description>
  34506. <bitOffset>25</bitOffset>
  34507. <bitWidth>1</bitWidth>
  34508. </field>
  34509. <field> <name>FB26</name>
  34510. <description>Filter bits</description>
  34511. <bitOffset>26</bitOffset>
  34512. <bitWidth>1</bitWidth>
  34513. </field>
  34514. <field> <name>FB27</name>
  34515. <description>Filter bits</description>
  34516. <bitOffset>27</bitOffset>
  34517. <bitWidth>1</bitWidth>
  34518. </field>
  34519. <field> <name>FB28</name>
  34520. <description>Filter bits</description>
  34521. <bitOffset>28</bitOffset>
  34522. <bitWidth>1</bitWidth>
  34523. </field>
  34524. <field> <name>FB29</name>
  34525. <description>Filter bits</description>
  34526. <bitOffset>29</bitOffset>
  34527. <bitWidth>1</bitWidth>
  34528. </field>
  34529. <field> <name>FB30</name>
  34530. <description>Filter bits</description>
  34531. <bitOffset>30</bitOffset>
  34532. <bitWidth>1</bitWidth>
  34533. </field>
  34534. <field> <name>FB31</name>
  34535. <description>Filter bits</description>
  34536. <bitOffset>31</bitOffset>
  34537. <bitWidth>1</bitWidth>
  34538. </field>
  34539. </fields>
  34540. </register>
  34541. <register> <name>F22R2</name>
  34542. <displayName>F22R2</displayName>
  34543. <description>Filter bank 22 register 2</description>
  34544. <addressOffset>0x2F4</addressOffset>
  34545. <size>0x20</size>
  34546. <access>read-write</access>
  34547. <resetValue>0x00000000</resetValue>
  34548. <fields>
  34549. <field> <name>FB0</name>
  34550. <description>Filter bits</description>
  34551. <bitOffset>0</bitOffset>
  34552. <bitWidth>1</bitWidth>
  34553. </field>
  34554. <field> <name>FB1</name>
  34555. <description>Filter bits</description>
  34556. <bitOffset>1</bitOffset>
  34557. <bitWidth>1</bitWidth>
  34558. </field>
  34559. <field> <name>FB2</name>
  34560. <description>Filter bits</description>
  34561. <bitOffset>2</bitOffset>
  34562. <bitWidth>1</bitWidth>
  34563. </field>
  34564. <field> <name>FB3</name>
  34565. <description>Filter bits</description>
  34566. <bitOffset>3</bitOffset>
  34567. <bitWidth>1</bitWidth>
  34568. </field>
  34569. <field> <name>FB4</name>
  34570. <description>Filter bits</description>
  34571. <bitOffset>4</bitOffset>
  34572. <bitWidth>1</bitWidth>
  34573. </field>
  34574. <field> <name>FB5</name>
  34575. <description>Filter bits</description>
  34576. <bitOffset>5</bitOffset>
  34577. <bitWidth>1</bitWidth>
  34578. </field>
  34579. <field> <name>FB6</name>
  34580. <description>Filter bits</description>
  34581. <bitOffset>6</bitOffset>
  34582. <bitWidth>1</bitWidth>
  34583. </field>
  34584. <field> <name>FB7</name>
  34585. <description>Filter bits</description>
  34586. <bitOffset>7</bitOffset>
  34587. <bitWidth>1</bitWidth>
  34588. </field>
  34589. <field> <name>FB8</name>
  34590. <description>Filter bits</description>
  34591. <bitOffset>8</bitOffset>
  34592. <bitWidth>1</bitWidth>
  34593. </field>
  34594. <field> <name>FB9</name>
  34595. <description>Filter bits</description>
  34596. <bitOffset>9</bitOffset>
  34597. <bitWidth>1</bitWidth>
  34598. </field>
  34599. <field> <name>FB10</name>
  34600. <description>Filter bits</description>
  34601. <bitOffset>10</bitOffset>
  34602. <bitWidth>1</bitWidth>
  34603. </field>
  34604. <field> <name>FB11</name>
  34605. <description>Filter bits</description>
  34606. <bitOffset>11</bitOffset>
  34607. <bitWidth>1</bitWidth>
  34608. </field>
  34609. <field> <name>FB12</name>
  34610. <description>Filter bits</description>
  34611. <bitOffset>12</bitOffset>
  34612. <bitWidth>1</bitWidth>
  34613. </field>
  34614. <field> <name>FB13</name>
  34615. <description>Filter bits</description>
  34616. <bitOffset>13</bitOffset>
  34617. <bitWidth>1</bitWidth>
  34618. </field>
  34619. <field> <name>FB14</name>
  34620. <description>Filter bits</description>
  34621. <bitOffset>14</bitOffset>
  34622. <bitWidth>1</bitWidth>
  34623. </field>
  34624. <field> <name>FB15</name>
  34625. <description>Filter bits</description>
  34626. <bitOffset>15</bitOffset>
  34627. <bitWidth>1</bitWidth>
  34628. </field>
  34629. <field> <name>FB16</name>
  34630. <description>Filter bits</description>
  34631. <bitOffset>16</bitOffset>
  34632. <bitWidth>1</bitWidth>
  34633. </field>
  34634. <field> <name>FB17</name>
  34635. <description>Filter bits</description>
  34636. <bitOffset>17</bitOffset>
  34637. <bitWidth>1</bitWidth>
  34638. </field>
  34639. <field> <name>FB18</name>
  34640. <description>Filter bits</description>
  34641. <bitOffset>18</bitOffset>
  34642. <bitWidth>1</bitWidth>
  34643. </field>
  34644. <field> <name>FB19</name>
  34645. <description>Filter bits</description>
  34646. <bitOffset>19</bitOffset>
  34647. <bitWidth>1</bitWidth>
  34648. </field>
  34649. <field> <name>FB20</name>
  34650. <description>Filter bits</description>
  34651. <bitOffset>20</bitOffset>
  34652. <bitWidth>1</bitWidth>
  34653. </field>
  34654. <field> <name>FB21</name>
  34655. <description>Filter bits</description>
  34656. <bitOffset>21</bitOffset>
  34657. <bitWidth>1</bitWidth>
  34658. </field>
  34659. <field> <name>FB22</name>
  34660. <description>Filter bits</description>
  34661. <bitOffset>22</bitOffset>
  34662. <bitWidth>1</bitWidth>
  34663. </field>
  34664. <field> <name>FB23</name>
  34665. <description>Filter bits</description>
  34666. <bitOffset>23</bitOffset>
  34667. <bitWidth>1</bitWidth>
  34668. </field>
  34669. <field> <name>FB24</name>
  34670. <description>Filter bits</description>
  34671. <bitOffset>24</bitOffset>
  34672. <bitWidth>1</bitWidth>
  34673. </field>
  34674. <field> <name>FB25</name>
  34675. <description>Filter bits</description>
  34676. <bitOffset>25</bitOffset>
  34677. <bitWidth>1</bitWidth>
  34678. </field>
  34679. <field> <name>FB26</name>
  34680. <description>Filter bits</description>
  34681. <bitOffset>26</bitOffset>
  34682. <bitWidth>1</bitWidth>
  34683. </field>
  34684. <field> <name>FB27</name>
  34685. <description>Filter bits</description>
  34686. <bitOffset>27</bitOffset>
  34687. <bitWidth>1</bitWidth>
  34688. </field>
  34689. <field> <name>FB28</name>
  34690. <description>Filter bits</description>
  34691. <bitOffset>28</bitOffset>
  34692. <bitWidth>1</bitWidth>
  34693. </field>
  34694. <field> <name>FB29</name>
  34695. <description>Filter bits</description>
  34696. <bitOffset>29</bitOffset>
  34697. <bitWidth>1</bitWidth>
  34698. </field>
  34699. <field> <name>FB30</name>
  34700. <description>Filter bits</description>
  34701. <bitOffset>30</bitOffset>
  34702. <bitWidth>1</bitWidth>
  34703. </field>
  34704. <field> <name>FB31</name>
  34705. <description>Filter bits</description>
  34706. <bitOffset>31</bitOffset>
  34707. <bitWidth>1</bitWidth>
  34708. </field>
  34709. </fields>
  34710. </register>
  34711. <register> <name>F23R1</name>
  34712. <displayName>F23R1</displayName>
  34713. <description>Filter bank 23 register 1</description>
  34714. <addressOffset>0x2F8</addressOffset>
  34715. <size>0x20</size>
  34716. <access>read-write</access>
  34717. <resetValue>0x00000000</resetValue>
  34718. <fields>
  34719. <field> <name>FB0</name>
  34720. <description>Filter bits</description>
  34721. <bitOffset>0</bitOffset>
  34722. <bitWidth>1</bitWidth>
  34723. </field>
  34724. <field> <name>FB1</name>
  34725. <description>Filter bits</description>
  34726. <bitOffset>1</bitOffset>
  34727. <bitWidth>1</bitWidth>
  34728. </field>
  34729. <field> <name>FB2</name>
  34730. <description>Filter bits</description>
  34731. <bitOffset>2</bitOffset>
  34732. <bitWidth>1</bitWidth>
  34733. </field>
  34734. <field> <name>FB3</name>
  34735. <description>Filter bits</description>
  34736. <bitOffset>3</bitOffset>
  34737. <bitWidth>1</bitWidth>
  34738. </field>
  34739. <field> <name>FB4</name>
  34740. <description>Filter bits</description>
  34741. <bitOffset>4</bitOffset>
  34742. <bitWidth>1</bitWidth>
  34743. </field>
  34744. <field> <name>FB5</name>
  34745. <description>Filter bits</description>
  34746. <bitOffset>5</bitOffset>
  34747. <bitWidth>1</bitWidth>
  34748. </field>
  34749. <field> <name>FB6</name>
  34750. <description>Filter bits</description>
  34751. <bitOffset>6</bitOffset>
  34752. <bitWidth>1</bitWidth>
  34753. </field>
  34754. <field> <name>FB7</name>
  34755. <description>Filter bits</description>
  34756. <bitOffset>7</bitOffset>
  34757. <bitWidth>1</bitWidth>
  34758. </field>
  34759. <field> <name>FB8</name>
  34760. <description>Filter bits</description>
  34761. <bitOffset>8</bitOffset>
  34762. <bitWidth>1</bitWidth>
  34763. </field>
  34764. <field> <name>FB9</name>
  34765. <description>Filter bits</description>
  34766. <bitOffset>9</bitOffset>
  34767. <bitWidth>1</bitWidth>
  34768. </field>
  34769. <field> <name>FB10</name>
  34770. <description>Filter bits</description>
  34771. <bitOffset>10</bitOffset>
  34772. <bitWidth>1</bitWidth>
  34773. </field>
  34774. <field> <name>FB11</name>
  34775. <description>Filter bits</description>
  34776. <bitOffset>11</bitOffset>
  34777. <bitWidth>1</bitWidth>
  34778. </field>
  34779. <field> <name>FB12</name>
  34780. <description>Filter bits</description>
  34781. <bitOffset>12</bitOffset>
  34782. <bitWidth>1</bitWidth>
  34783. </field>
  34784. <field> <name>FB13</name>
  34785. <description>Filter bits</description>
  34786. <bitOffset>13</bitOffset>
  34787. <bitWidth>1</bitWidth>
  34788. </field>
  34789. <field> <name>FB14</name>
  34790. <description>Filter bits</description>
  34791. <bitOffset>14</bitOffset>
  34792. <bitWidth>1</bitWidth>
  34793. </field>
  34794. <field> <name>FB15</name>
  34795. <description>Filter bits</description>
  34796. <bitOffset>15</bitOffset>
  34797. <bitWidth>1</bitWidth>
  34798. </field>
  34799. <field> <name>FB16</name>
  34800. <description>Filter bits</description>
  34801. <bitOffset>16</bitOffset>
  34802. <bitWidth>1</bitWidth>
  34803. </field>
  34804. <field> <name>FB17</name>
  34805. <description>Filter bits</description>
  34806. <bitOffset>17</bitOffset>
  34807. <bitWidth>1</bitWidth>
  34808. </field>
  34809. <field> <name>FB18</name>
  34810. <description>Filter bits</description>
  34811. <bitOffset>18</bitOffset>
  34812. <bitWidth>1</bitWidth>
  34813. </field>
  34814. <field> <name>FB19</name>
  34815. <description>Filter bits</description>
  34816. <bitOffset>19</bitOffset>
  34817. <bitWidth>1</bitWidth>
  34818. </field>
  34819. <field> <name>FB20</name>
  34820. <description>Filter bits</description>
  34821. <bitOffset>20</bitOffset>
  34822. <bitWidth>1</bitWidth>
  34823. </field>
  34824. <field> <name>FB21</name>
  34825. <description>Filter bits</description>
  34826. <bitOffset>21</bitOffset>
  34827. <bitWidth>1</bitWidth>
  34828. </field>
  34829. <field> <name>FB22</name>
  34830. <description>Filter bits</description>
  34831. <bitOffset>22</bitOffset>
  34832. <bitWidth>1</bitWidth>
  34833. </field>
  34834. <field> <name>FB23</name>
  34835. <description>Filter bits</description>
  34836. <bitOffset>23</bitOffset>
  34837. <bitWidth>1</bitWidth>
  34838. </field>
  34839. <field> <name>FB24</name>
  34840. <description>Filter bits</description>
  34841. <bitOffset>24</bitOffset>
  34842. <bitWidth>1</bitWidth>
  34843. </field>
  34844. <field> <name>FB25</name>
  34845. <description>Filter bits</description>
  34846. <bitOffset>25</bitOffset>
  34847. <bitWidth>1</bitWidth>
  34848. </field>
  34849. <field> <name>FB26</name>
  34850. <description>Filter bits</description>
  34851. <bitOffset>26</bitOffset>
  34852. <bitWidth>1</bitWidth>
  34853. </field>
  34854. <field> <name>FB27</name>
  34855. <description>Filter bits</description>
  34856. <bitOffset>27</bitOffset>
  34857. <bitWidth>1</bitWidth>
  34858. </field>
  34859. <field> <name>FB28</name>
  34860. <description>Filter bits</description>
  34861. <bitOffset>28</bitOffset>
  34862. <bitWidth>1</bitWidth>
  34863. </field>
  34864. <field> <name>FB29</name>
  34865. <description>Filter bits</description>
  34866. <bitOffset>29</bitOffset>
  34867. <bitWidth>1</bitWidth>
  34868. </field>
  34869. <field> <name>FB30</name>
  34870. <description>Filter bits</description>
  34871. <bitOffset>30</bitOffset>
  34872. <bitWidth>1</bitWidth>
  34873. </field>
  34874. <field> <name>FB31</name>
  34875. <description>Filter bits</description>
  34876. <bitOffset>31</bitOffset>
  34877. <bitWidth>1</bitWidth>
  34878. </field>
  34879. </fields>
  34880. </register>
  34881. <register> <name>F23R2</name>
  34882. <displayName>F23R2</displayName>
  34883. <description>Filter bank 23 register 2</description>
  34884. <addressOffset>0x2FC</addressOffset>
  34885. <size>0x20</size>
  34886. <access>read-write</access>
  34887. <resetValue>0x00000000</resetValue>
  34888. <fields>
  34889. <field> <name>FB0</name>
  34890. <description>Filter bits</description>
  34891. <bitOffset>0</bitOffset>
  34892. <bitWidth>1</bitWidth>
  34893. </field>
  34894. <field> <name>FB1</name>
  34895. <description>Filter bits</description>
  34896. <bitOffset>1</bitOffset>
  34897. <bitWidth>1</bitWidth>
  34898. </field>
  34899. <field> <name>FB2</name>
  34900. <description>Filter bits</description>
  34901. <bitOffset>2</bitOffset>
  34902. <bitWidth>1</bitWidth>
  34903. </field>
  34904. <field> <name>FB3</name>
  34905. <description>Filter bits</description>
  34906. <bitOffset>3</bitOffset>
  34907. <bitWidth>1</bitWidth>
  34908. </field>
  34909. <field> <name>FB4</name>
  34910. <description>Filter bits</description>
  34911. <bitOffset>4</bitOffset>
  34912. <bitWidth>1</bitWidth>
  34913. </field>
  34914. <field> <name>FB5</name>
  34915. <description>Filter bits</description>
  34916. <bitOffset>5</bitOffset>
  34917. <bitWidth>1</bitWidth>
  34918. </field>
  34919. <field> <name>FB6</name>
  34920. <description>Filter bits</description>
  34921. <bitOffset>6</bitOffset>
  34922. <bitWidth>1</bitWidth>
  34923. </field>
  34924. <field> <name>FB7</name>
  34925. <description>Filter bits</description>
  34926. <bitOffset>7</bitOffset>
  34927. <bitWidth>1</bitWidth>
  34928. </field>
  34929. <field> <name>FB8</name>
  34930. <description>Filter bits</description>
  34931. <bitOffset>8</bitOffset>
  34932. <bitWidth>1</bitWidth>
  34933. </field>
  34934. <field> <name>FB9</name>
  34935. <description>Filter bits</description>
  34936. <bitOffset>9</bitOffset>
  34937. <bitWidth>1</bitWidth>
  34938. </field>
  34939. <field> <name>FB10</name>
  34940. <description>Filter bits</description>
  34941. <bitOffset>10</bitOffset>
  34942. <bitWidth>1</bitWidth>
  34943. </field>
  34944. <field> <name>FB11</name>
  34945. <description>Filter bits</description>
  34946. <bitOffset>11</bitOffset>
  34947. <bitWidth>1</bitWidth>
  34948. </field>
  34949. <field> <name>FB12</name>
  34950. <description>Filter bits</description>
  34951. <bitOffset>12</bitOffset>
  34952. <bitWidth>1</bitWidth>
  34953. </field>
  34954. <field> <name>FB13</name>
  34955. <description>Filter bits</description>
  34956. <bitOffset>13</bitOffset>
  34957. <bitWidth>1</bitWidth>
  34958. </field>
  34959. <field> <name>FB14</name>
  34960. <description>Filter bits</description>
  34961. <bitOffset>14</bitOffset>
  34962. <bitWidth>1</bitWidth>
  34963. </field>
  34964. <field> <name>FB15</name>
  34965. <description>Filter bits</description>
  34966. <bitOffset>15</bitOffset>
  34967. <bitWidth>1</bitWidth>
  34968. </field>
  34969. <field> <name>FB16</name>
  34970. <description>Filter bits</description>
  34971. <bitOffset>16</bitOffset>
  34972. <bitWidth>1</bitWidth>
  34973. </field>
  34974. <field> <name>FB17</name>
  34975. <description>Filter bits</description>
  34976. <bitOffset>17</bitOffset>
  34977. <bitWidth>1</bitWidth>
  34978. </field>
  34979. <field> <name>FB18</name>
  34980. <description>Filter bits</description>
  34981. <bitOffset>18</bitOffset>
  34982. <bitWidth>1</bitWidth>
  34983. </field>
  34984. <field> <name>FB19</name>
  34985. <description>Filter bits</description>
  34986. <bitOffset>19</bitOffset>
  34987. <bitWidth>1</bitWidth>
  34988. </field>
  34989. <field> <name>FB20</name>
  34990. <description>Filter bits</description>
  34991. <bitOffset>20</bitOffset>
  34992. <bitWidth>1</bitWidth>
  34993. </field>
  34994. <field> <name>FB21</name>
  34995. <description>Filter bits</description>
  34996. <bitOffset>21</bitOffset>
  34997. <bitWidth>1</bitWidth>
  34998. </field>
  34999. <field> <name>FB22</name>
  35000. <description>Filter bits</description>
  35001. <bitOffset>22</bitOffset>
  35002. <bitWidth>1</bitWidth>
  35003. </field>
  35004. <field> <name>FB23</name>
  35005. <description>Filter bits</description>
  35006. <bitOffset>23</bitOffset>
  35007. <bitWidth>1</bitWidth>
  35008. </field>
  35009. <field> <name>FB24</name>
  35010. <description>Filter bits</description>
  35011. <bitOffset>24</bitOffset>
  35012. <bitWidth>1</bitWidth>
  35013. </field>
  35014. <field> <name>FB25</name>
  35015. <description>Filter bits</description>
  35016. <bitOffset>25</bitOffset>
  35017. <bitWidth>1</bitWidth>
  35018. </field>
  35019. <field> <name>FB26</name>
  35020. <description>Filter bits</description>
  35021. <bitOffset>26</bitOffset>
  35022. <bitWidth>1</bitWidth>
  35023. </field>
  35024. <field> <name>FB27</name>
  35025. <description>Filter bits</description>
  35026. <bitOffset>27</bitOffset>
  35027. <bitWidth>1</bitWidth>
  35028. </field>
  35029. <field> <name>FB28</name>
  35030. <description>Filter bits</description>
  35031. <bitOffset>28</bitOffset>
  35032. <bitWidth>1</bitWidth>
  35033. </field>
  35034. <field> <name>FB29</name>
  35035. <description>Filter bits</description>
  35036. <bitOffset>29</bitOffset>
  35037. <bitWidth>1</bitWidth>
  35038. </field>
  35039. <field> <name>FB30</name>
  35040. <description>Filter bits</description>
  35041. <bitOffset>30</bitOffset>
  35042. <bitWidth>1</bitWidth>
  35043. </field>
  35044. <field> <name>FB31</name>
  35045. <description>Filter bits</description>
  35046. <bitOffset>31</bitOffset>
  35047. <bitWidth>1</bitWidth>
  35048. </field>
  35049. </fields>
  35050. </register>
  35051. <register> <name>F24R1</name>
  35052. <displayName>F24R1</displayName>
  35053. <description>Filter bank 24 register 1</description>
  35054. <addressOffset>0x300</addressOffset>
  35055. <size>0x20</size>
  35056. <access>read-write</access>
  35057. <resetValue>0x00000000</resetValue>
  35058. <fields>
  35059. <field> <name>FB0</name>
  35060. <description>Filter bits</description>
  35061. <bitOffset>0</bitOffset>
  35062. <bitWidth>1</bitWidth>
  35063. </field>
  35064. <field> <name>FB1</name>
  35065. <description>Filter bits</description>
  35066. <bitOffset>1</bitOffset>
  35067. <bitWidth>1</bitWidth>
  35068. </field>
  35069. <field> <name>FB2</name>
  35070. <description>Filter bits</description>
  35071. <bitOffset>2</bitOffset>
  35072. <bitWidth>1</bitWidth>
  35073. </field>
  35074. <field> <name>FB3</name>
  35075. <description>Filter bits</description>
  35076. <bitOffset>3</bitOffset>
  35077. <bitWidth>1</bitWidth>
  35078. </field>
  35079. <field> <name>FB4</name>
  35080. <description>Filter bits</description>
  35081. <bitOffset>4</bitOffset>
  35082. <bitWidth>1</bitWidth>
  35083. </field>
  35084. <field> <name>FB5</name>
  35085. <description>Filter bits</description>
  35086. <bitOffset>5</bitOffset>
  35087. <bitWidth>1</bitWidth>
  35088. </field>
  35089. <field> <name>FB6</name>
  35090. <description>Filter bits</description>
  35091. <bitOffset>6</bitOffset>
  35092. <bitWidth>1</bitWidth>
  35093. </field>
  35094. <field> <name>FB7</name>
  35095. <description>Filter bits</description>
  35096. <bitOffset>7</bitOffset>
  35097. <bitWidth>1</bitWidth>
  35098. </field>
  35099. <field> <name>FB8</name>
  35100. <description>Filter bits</description>
  35101. <bitOffset>8</bitOffset>
  35102. <bitWidth>1</bitWidth>
  35103. </field>
  35104. <field> <name>FB9</name>
  35105. <description>Filter bits</description>
  35106. <bitOffset>9</bitOffset>
  35107. <bitWidth>1</bitWidth>
  35108. </field>
  35109. <field> <name>FB10</name>
  35110. <description>Filter bits</description>
  35111. <bitOffset>10</bitOffset>
  35112. <bitWidth>1</bitWidth>
  35113. </field>
  35114. <field> <name>FB11</name>
  35115. <description>Filter bits</description>
  35116. <bitOffset>11</bitOffset>
  35117. <bitWidth>1</bitWidth>
  35118. </field>
  35119. <field> <name>FB12</name>
  35120. <description>Filter bits</description>
  35121. <bitOffset>12</bitOffset>
  35122. <bitWidth>1</bitWidth>
  35123. </field>
  35124. <field> <name>FB13</name>
  35125. <description>Filter bits</description>
  35126. <bitOffset>13</bitOffset>
  35127. <bitWidth>1</bitWidth>
  35128. </field>
  35129. <field> <name>FB14</name>
  35130. <description>Filter bits</description>
  35131. <bitOffset>14</bitOffset>
  35132. <bitWidth>1</bitWidth>
  35133. </field>
  35134. <field> <name>FB15</name>
  35135. <description>Filter bits</description>
  35136. <bitOffset>15</bitOffset>
  35137. <bitWidth>1</bitWidth>
  35138. </field>
  35139. <field> <name>FB16</name>
  35140. <description>Filter bits</description>
  35141. <bitOffset>16</bitOffset>
  35142. <bitWidth>1</bitWidth>
  35143. </field>
  35144. <field> <name>FB17</name>
  35145. <description>Filter bits</description>
  35146. <bitOffset>17</bitOffset>
  35147. <bitWidth>1</bitWidth>
  35148. </field>
  35149. <field> <name>FB18</name>
  35150. <description>Filter bits</description>
  35151. <bitOffset>18</bitOffset>
  35152. <bitWidth>1</bitWidth>
  35153. </field>
  35154. <field> <name>FB19</name>
  35155. <description>Filter bits</description>
  35156. <bitOffset>19</bitOffset>
  35157. <bitWidth>1</bitWidth>
  35158. </field>
  35159. <field> <name>FB20</name>
  35160. <description>Filter bits</description>
  35161. <bitOffset>20</bitOffset>
  35162. <bitWidth>1</bitWidth>
  35163. </field>
  35164. <field> <name>FB21</name>
  35165. <description>Filter bits</description>
  35166. <bitOffset>21</bitOffset>
  35167. <bitWidth>1</bitWidth>
  35168. </field>
  35169. <field> <name>FB22</name>
  35170. <description>Filter bits</description>
  35171. <bitOffset>22</bitOffset>
  35172. <bitWidth>1</bitWidth>
  35173. </field>
  35174. <field> <name>FB23</name>
  35175. <description>Filter bits</description>
  35176. <bitOffset>23</bitOffset>
  35177. <bitWidth>1</bitWidth>
  35178. </field>
  35179. <field> <name>FB24</name>
  35180. <description>Filter bits</description>
  35181. <bitOffset>24</bitOffset>
  35182. <bitWidth>1</bitWidth>
  35183. </field>
  35184. <field> <name>FB25</name>
  35185. <description>Filter bits</description>
  35186. <bitOffset>25</bitOffset>
  35187. <bitWidth>1</bitWidth>
  35188. </field>
  35189. <field> <name>FB26</name>
  35190. <description>Filter bits</description>
  35191. <bitOffset>26</bitOffset>
  35192. <bitWidth>1</bitWidth>
  35193. </field>
  35194. <field> <name>FB27</name>
  35195. <description>Filter bits</description>
  35196. <bitOffset>27</bitOffset>
  35197. <bitWidth>1</bitWidth>
  35198. </field>
  35199. <field> <name>FB28</name>
  35200. <description>Filter bits</description>
  35201. <bitOffset>28</bitOffset>
  35202. <bitWidth>1</bitWidth>
  35203. </field>
  35204. <field> <name>FB29</name>
  35205. <description>Filter bits</description>
  35206. <bitOffset>29</bitOffset>
  35207. <bitWidth>1</bitWidth>
  35208. </field>
  35209. <field> <name>FB30</name>
  35210. <description>Filter bits</description>
  35211. <bitOffset>30</bitOffset>
  35212. <bitWidth>1</bitWidth>
  35213. </field>
  35214. <field> <name>FB31</name>
  35215. <description>Filter bits</description>
  35216. <bitOffset>31</bitOffset>
  35217. <bitWidth>1</bitWidth>
  35218. </field>
  35219. </fields>
  35220. </register>
  35221. <register> <name>F24R2</name>
  35222. <displayName>F24R2</displayName>
  35223. <description>Filter bank 24 register 2</description>
  35224. <addressOffset>0x304</addressOffset>
  35225. <size>0x20</size>
  35226. <access>read-write</access>
  35227. <resetValue>0x00000000</resetValue>
  35228. <fields>
  35229. <field> <name>FB0</name>
  35230. <description>Filter bits</description>
  35231. <bitOffset>0</bitOffset>
  35232. <bitWidth>1</bitWidth>
  35233. </field>
  35234. <field> <name>FB1</name>
  35235. <description>Filter bits</description>
  35236. <bitOffset>1</bitOffset>
  35237. <bitWidth>1</bitWidth>
  35238. </field>
  35239. <field> <name>FB2</name>
  35240. <description>Filter bits</description>
  35241. <bitOffset>2</bitOffset>
  35242. <bitWidth>1</bitWidth>
  35243. </field>
  35244. <field> <name>FB3</name>
  35245. <description>Filter bits</description>
  35246. <bitOffset>3</bitOffset>
  35247. <bitWidth>1</bitWidth>
  35248. </field>
  35249. <field> <name>FB4</name>
  35250. <description>Filter bits</description>
  35251. <bitOffset>4</bitOffset>
  35252. <bitWidth>1</bitWidth>
  35253. </field>
  35254. <field> <name>FB5</name>
  35255. <description>Filter bits</description>
  35256. <bitOffset>5</bitOffset>
  35257. <bitWidth>1</bitWidth>
  35258. </field>
  35259. <field> <name>FB6</name>
  35260. <description>Filter bits</description>
  35261. <bitOffset>6</bitOffset>
  35262. <bitWidth>1</bitWidth>
  35263. </field>
  35264. <field> <name>FB7</name>
  35265. <description>Filter bits</description>
  35266. <bitOffset>7</bitOffset>
  35267. <bitWidth>1</bitWidth>
  35268. </field>
  35269. <field> <name>FB8</name>
  35270. <description>Filter bits</description>
  35271. <bitOffset>8</bitOffset>
  35272. <bitWidth>1</bitWidth>
  35273. </field>
  35274. <field> <name>FB9</name>
  35275. <description>Filter bits</description>
  35276. <bitOffset>9</bitOffset>
  35277. <bitWidth>1</bitWidth>
  35278. </field>
  35279. <field> <name>FB10</name>
  35280. <description>Filter bits</description>
  35281. <bitOffset>10</bitOffset>
  35282. <bitWidth>1</bitWidth>
  35283. </field>
  35284. <field> <name>FB11</name>
  35285. <description>Filter bits</description>
  35286. <bitOffset>11</bitOffset>
  35287. <bitWidth>1</bitWidth>
  35288. </field>
  35289. <field> <name>FB12</name>
  35290. <description>Filter bits</description>
  35291. <bitOffset>12</bitOffset>
  35292. <bitWidth>1</bitWidth>
  35293. </field>
  35294. <field> <name>FB13</name>
  35295. <description>Filter bits</description>
  35296. <bitOffset>13</bitOffset>
  35297. <bitWidth>1</bitWidth>
  35298. </field>
  35299. <field> <name>FB14</name>
  35300. <description>Filter bits</description>
  35301. <bitOffset>14</bitOffset>
  35302. <bitWidth>1</bitWidth>
  35303. </field>
  35304. <field> <name>FB15</name>
  35305. <description>Filter bits</description>
  35306. <bitOffset>15</bitOffset>
  35307. <bitWidth>1</bitWidth>
  35308. </field>
  35309. <field> <name>FB16</name>
  35310. <description>Filter bits</description>
  35311. <bitOffset>16</bitOffset>
  35312. <bitWidth>1</bitWidth>
  35313. </field>
  35314. <field> <name>FB17</name>
  35315. <description>Filter bits</description>
  35316. <bitOffset>17</bitOffset>
  35317. <bitWidth>1</bitWidth>
  35318. </field>
  35319. <field> <name>FB18</name>
  35320. <description>Filter bits</description>
  35321. <bitOffset>18</bitOffset>
  35322. <bitWidth>1</bitWidth>
  35323. </field>
  35324. <field> <name>FB19</name>
  35325. <description>Filter bits</description>
  35326. <bitOffset>19</bitOffset>
  35327. <bitWidth>1</bitWidth>
  35328. </field>
  35329. <field> <name>FB20</name>
  35330. <description>Filter bits</description>
  35331. <bitOffset>20</bitOffset>
  35332. <bitWidth>1</bitWidth>
  35333. </field>
  35334. <field> <name>FB21</name>
  35335. <description>Filter bits</description>
  35336. <bitOffset>21</bitOffset>
  35337. <bitWidth>1</bitWidth>
  35338. </field>
  35339. <field> <name>FB22</name>
  35340. <description>Filter bits</description>
  35341. <bitOffset>22</bitOffset>
  35342. <bitWidth>1</bitWidth>
  35343. </field>
  35344. <field> <name>FB23</name>
  35345. <description>Filter bits</description>
  35346. <bitOffset>23</bitOffset>
  35347. <bitWidth>1</bitWidth>
  35348. </field>
  35349. <field> <name>FB24</name>
  35350. <description>Filter bits</description>
  35351. <bitOffset>24</bitOffset>
  35352. <bitWidth>1</bitWidth>
  35353. </field>
  35354. <field> <name>FB25</name>
  35355. <description>Filter bits</description>
  35356. <bitOffset>25</bitOffset>
  35357. <bitWidth>1</bitWidth>
  35358. </field>
  35359. <field> <name>FB26</name>
  35360. <description>Filter bits</description>
  35361. <bitOffset>26</bitOffset>
  35362. <bitWidth>1</bitWidth>
  35363. </field>
  35364. <field> <name>FB27</name>
  35365. <description>Filter bits</description>
  35366. <bitOffset>27</bitOffset>
  35367. <bitWidth>1</bitWidth>
  35368. </field>
  35369. <field> <name>FB28</name>
  35370. <description>Filter bits</description>
  35371. <bitOffset>28</bitOffset>
  35372. <bitWidth>1</bitWidth>
  35373. </field>
  35374. <field> <name>FB29</name>
  35375. <description>Filter bits</description>
  35376. <bitOffset>29</bitOffset>
  35377. <bitWidth>1</bitWidth>
  35378. </field>
  35379. <field> <name>FB30</name>
  35380. <description>Filter bits</description>
  35381. <bitOffset>30</bitOffset>
  35382. <bitWidth>1</bitWidth>
  35383. </field>
  35384. <field> <name>FB31</name>
  35385. <description>Filter bits</description>
  35386. <bitOffset>31</bitOffset>
  35387. <bitWidth>1</bitWidth>
  35388. </field>
  35389. </fields>
  35390. </register>
  35391. <register> <name>F25R1</name>
  35392. <displayName>F25R1</displayName>
  35393. <description>Filter bank 25 register 1</description>
  35394. <addressOffset>0x308</addressOffset>
  35395. <size>0x20</size>
  35396. <access>read-write</access>
  35397. <resetValue>0x00000000</resetValue>
  35398. <fields>
  35399. <field> <name>FB0</name>
  35400. <description>Filter bits</description>
  35401. <bitOffset>0</bitOffset>
  35402. <bitWidth>1</bitWidth>
  35403. </field>
  35404. <field> <name>FB1</name>
  35405. <description>Filter bits</description>
  35406. <bitOffset>1</bitOffset>
  35407. <bitWidth>1</bitWidth>
  35408. </field>
  35409. <field> <name>FB2</name>
  35410. <description>Filter bits</description>
  35411. <bitOffset>2</bitOffset>
  35412. <bitWidth>1</bitWidth>
  35413. </field>
  35414. <field> <name>FB3</name>
  35415. <description>Filter bits</description>
  35416. <bitOffset>3</bitOffset>
  35417. <bitWidth>1</bitWidth>
  35418. </field>
  35419. <field> <name>FB4</name>
  35420. <description>Filter bits</description>
  35421. <bitOffset>4</bitOffset>
  35422. <bitWidth>1</bitWidth>
  35423. </field>
  35424. <field> <name>FB5</name>
  35425. <description>Filter bits</description>
  35426. <bitOffset>5</bitOffset>
  35427. <bitWidth>1</bitWidth>
  35428. </field>
  35429. <field> <name>FB6</name>
  35430. <description>Filter bits</description>
  35431. <bitOffset>6</bitOffset>
  35432. <bitWidth>1</bitWidth>
  35433. </field>
  35434. <field> <name>FB7</name>
  35435. <description>Filter bits</description>
  35436. <bitOffset>7</bitOffset>
  35437. <bitWidth>1</bitWidth>
  35438. </field>
  35439. <field> <name>FB8</name>
  35440. <description>Filter bits</description>
  35441. <bitOffset>8</bitOffset>
  35442. <bitWidth>1</bitWidth>
  35443. </field>
  35444. <field> <name>FB9</name>
  35445. <description>Filter bits</description>
  35446. <bitOffset>9</bitOffset>
  35447. <bitWidth>1</bitWidth>
  35448. </field>
  35449. <field> <name>FB10</name>
  35450. <description>Filter bits</description>
  35451. <bitOffset>10</bitOffset>
  35452. <bitWidth>1</bitWidth>
  35453. </field>
  35454. <field> <name>FB11</name>
  35455. <description>Filter bits</description>
  35456. <bitOffset>11</bitOffset>
  35457. <bitWidth>1</bitWidth>
  35458. </field>
  35459. <field> <name>FB12</name>
  35460. <description>Filter bits</description>
  35461. <bitOffset>12</bitOffset>
  35462. <bitWidth>1</bitWidth>
  35463. </field>
  35464. <field> <name>FB13</name>
  35465. <description>Filter bits</description>
  35466. <bitOffset>13</bitOffset>
  35467. <bitWidth>1</bitWidth>
  35468. </field>
  35469. <field> <name>FB14</name>
  35470. <description>Filter bits</description>
  35471. <bitOffset>14</bitOffset>
  35472. <bitWidth>1</bitWidth>
  35473. </field>
  35474. <field> <name>FB15</name>
  35475. <description>Filter bits</description>
  35476. <bitOffset>15</bitOffset>
  35477. <bitWidth>1</bitWidth>
  35478. </field>
  35479. <field> <name>FB16</name>
  35480. <description>Filter bits</description>
  35481. <bitOffset>16</bitOffset>
  35482. <bitWidth>1</bitWidth>
  35483. </field>
  35484. <field> <name>FB17</name>
  35485. <description>Filter bits</description>
  35486. <bitOffset>17</bitOffset>
  35487. <bitWidth>1</bitWidth>
  35488. </field>
  35489. <field> <name>FB18</name>
  35490. <description>Filter bits</description>
  35491. <bitOffset>18</bitOffset>
  35492. <bitWidth>1</bitWidth>
  35493. </field>
  35494. <field> <name>FB19</name>
  35495. <description>Filter bits</description>
  35496. <bitOffset>19</bitOffset>
  35497. <bitWidth>1</bitWidth>
  35498. </field>
  35499. <field> <name>FB20</name>
  35500. <description>Filter bits</description>
  35501. <bitOffset>20</bitOffset>
  35502. <bitWidth>1</bitWidth>
  35503. </field>
  35504. <field> <name>FB21</name>
  35505. <description>Filter bits</description>
  35506. <bitOffset>21</bitOffset>
  35507. <bitWidth>1</bitWidth>
  35508. </field>
  35509. <field> <name>FB22</name>
  35510. <description>Filter bits</description>
  35511. <bitOffset>22</bitOffset>
  35512. <bitWidth>1</bitWidth>
  35513. </field>
  35514. <field> <name>FB23</name>
  35515. <description>Filter bits</description>
  35516. <bitOffset>23</bitOffset>
  35517. <bitWidth>1</bitWidth>
  35518. </field>
  35519. <field> <name>FB24</name>
  35520. <description>Filter bits</description>
  35521. <bitOffset>24</bitOffset>
  35522. <bitWidth>1</bitWidth>
  35523. </field>
  35524. <field> <name>FB25</name>
  35525. <description>Filter bits</description>
  35526. <bitOffset>25</bitOffset>
  35527. <bitWidth>1</bitWidth>
  35528. </field>
  35529. <field> <name>FB26</name>
  35530. <description>Filter bits</description>
  35531. <bitOffset>26</bitOffset>
  35532. <bitWidth>1</bitWidth>
  35533. </field>
  35534. <field> <name>FB27</name>
  35535. <description>Filter bits</description>
  35536. <bitOffset>27</bitOffset>
  35537. <bitWidth>1</bitWidth>
  35538. </field>
  35539. <field> <name>FB28</name>
  35540. <description>Filter bits</description>
  35541. <bitOffset>28</bitOffset>
  35542. <bitWidth>1</bitWidth>
  35543. </field>
  35544. <field> <name>FB29</name>
  35545. <description>Filter bits</description>
  35546. <bitOffset>29</bitOffset>
  35547. <bitWidth>1</bitWidth>
  35548. </field>
  35549. <field> <name>FB30</name>
  35550. <description>Filter bits</description>
  35551. <bitOffset>30</bitOffset>
  35552. <bitWidth>1</bitWidth>
  35553. </field>
  35554. <field> <name>FB31</name>
  35555. <description>Filter bits</description>
  35556. <bitOffset>31</bitOffset>
  35557. <bitWidth>1</bitWidth>
  35558. </field>
  35559. </fields>
  35560. </register>
  35561. <register> <name>F25R2</name>
  35562. <displayName>F25R2</displayName>
  35563. <description>Filter bank 25 register 2</description>
  35564. <addressOffset>0x30C</addressOffset>
  35565. <size>0x20</size>
  35566. <access>read-write</access>
  35567. <resetValue>0x00000000</resetValue>
  35568. <fields>
  35569. <field> <name>FB0</name>
  35570. <description>Filter bits</description>
  35571. <bitOffset>0</bitOffset>
  35572. <bitWidth>1</bitWidth>
  35573. </field>
  35574. <field> <name>FB1</name>
  35575. <description>Filter bits</description>
  35576. <bitOffset>1</bitOffset>
  35577. <bitWidth>1</bitWidth>
  35578. </field>
  35579. <field> <name>FB2</name>
  35580. <description>Filter bits</description>
  35581. <bitOffset>2</bitOffset>
  35582. <bitWidth>1</bitWidth>
  35583. </field>
  35584. <field> <name>FB3</name>
  35585. <description>Filter bits</description>
  35586. <bitOffset>3</bitOffset>
  35587. <bitWidth>1</bitWidth>
  35588. </field>
  35589. <field> <name>FB4</name>
  35590. <description>Filter bits</description>
  35591. <bitOffset>4</bitOffset>
  35592. <bitWidth>1</bitWidth>
  35593. </field>
  35594. <field> <name>FB5</name>
  35595. <description>Filter bits</description>
  35596. <bitOffset>5</bitOffset>
  35597. <bitWidth>1</bitWidth>
  35598. </field>
  35599. <field> <name>FB6</name>
  35600. <description>Filter bits</description>
  35601. <bitOffset>6</bitOffset>
  35602. <bitWidth>1</bitWidth>
  35603. </field>
  35604. <field> <name>FB7</name>
  35605. <description>Filter bits</description>
  35606. <bitOffset>7</bitOffset>
  35607. <bitWidth>1</bitWidth>
  35608. </field>
  35609. <field> <name>FB8</name>
  35610. <description>Filter bits</description>
  35611. <bitOffset>8</bitOffset>
  35612. <bitWidth>1</bitWidth>
  35613. </field>
  35614. <field> <name>FB9</name>
  35615. <description>Filter bits</description>
  35616. <bitOffset>9</bitOffset>
  35617. <bitWidth>1</bitWidth>
  35618. </field>
  35619. <field> <name>FB10</name>
  35620. <description>Filter bits</description>
  35621. <bitOffset>10</bitOffset>
  35622. <bitWidth>1</bitWidth>
  35623. </field>
  35624. <field> <name>FB11</name>
  35625. <description>Filter bits</description>
  35626. <bitOffset>11</bitOffset>
  35627. <bitWidth>1</bitWidth>
  35628. </field>
  35629. <field> <name>FB12</name>
  35630. <description>Filter bits</description>
  35631. <bitOffset>12</bitOffset>
  35632. <bitWidth>1</bitWidth>
  35633. </field>
  35634. <field> <name>FB13</name>
  35635. <description>Filter bits</description>
  35636. <bitOffset>13</bitOffset>
  35637. <bitWidth>1</bitWidth>
  35638. </field>
  35639. <field> <name>FB14</name>
  35640. <description>Filter bits</description>
  35641. <bitOffset>14</bitOffset>
  35642. <bitWidth>1</bitWidth>
  35643. </field>
  35644. <field> <name>FB15</name>
  35645. <description>Filter bits</description>
  35646. <bitOffset>15</bitOffset>
  35647. <bitWidth>1</bitWidth>
  35648. </field>
  35649. <field> <name>FB16</name>
  35650. <description>Filter bits</description>
  35651. <bitOffset>16</bitOffset>
  35652. <bitWidth>1</bitWidth>
  35653. </field>
  35654. <field> <name>FB17</name>
  35655. <description>Filter bits</description>
  35656. <bitOffset>17</bitOffset>
  35657. <bitWidth>1</bitWidth>
  35658. </field>
  35659. <field> <name>FB18</name>
  35660. <description>Filter bits</description>
  35661. <bitOffset>18</bitOffset>
  35662. <bitWidth>1</bitWidth>
  35663. </field>
  35664. <field> <name>FB19</name>
  35665. <description>Filter bits</description>
  35666. <bitOffset>19</bitOffset>
  35667. <bitWidth>1</bitWidth>
  35668. </field>
  35669. <field> <name>FB20</name>
  35670. <description>Filter bits</description>
  35671. <bitOffset>20</bitOffset>
  35672. <bitWidth>1</bitWidth>
  35673. </field>
  35674. <field> <name>FB21</name>
  35675. <description>Filter bits</description>
  35676. <bitOffset>21</bitOffset>
  35677. <bitWidth>1</bitWidth>
  35678. </field>
  35679. <field> <name>FB22</name>
  35680. <description>Filter bits</description>
  35681. <bitOffset>22</bitOffset>
  35682. <bitWidth>1</bitWidth>
  35683. </field>
  35684. <field> <name>FB23</name>
  35685. <description>Filter bits</description>
  35686. <bitOffset>23</bitOffset>
  35687. <bitWidth>1</bitWidth>
  35688. </field>
  35689. <field> <name>FB24</name>
  35690. <description>Filter bits</description>
  35691. <bitOffset>24</bitOffset>
  35692. <bitWidth>1</bitWidth>
  35693. </field>
  35694. <field> <name>FB25</name>
  35695. <description>Filter bits</description>
  35696. <bitOffset>25</bitOffset>
  35697. <bitWidth>1</bitWidth>
  35698. </field>
  35699. <field> <name>FB26</name>
  35700. <description>Filter bits</description>
  35701. <bitOffset>26</bitOffset>
  35702. <bitWidth>1</bitWidth>
  35703. </field>
  35704. <field> <name>FB27</name>
  35705. <description>Filter bits</description>
  35706. <bitOffset>27</bitOffset>
  35707. <bitWidth>1</bitWidth>
  35708. </field>
  35709. <field> <name>FB28</name>
  35710. <description>Filter bits</description>
  35711. <bitOffset>28</bitOffset>
  35712. <bitWidth>1</bitWidth>
  35713. </field>
  35714. <field> <name>FB29</name>
  35715. <description>Filter bits</description>
  35716. <bitOffset>29</bitOffset>
  35717. <bitWidth>1</bitWidth>
  35718. </field>
  35719. <field> <name>FB30</name>
  35720. <description>Filter bits</description>
  35721. <bitOffset>30</bitOffset>
  35722. <bitWidth>1</bitWidth>
  35723. </field>
  35724. <field> <name>FB31</name>
  35725. <description>Filter bits</description>
  35726. <bitOffset>31</bitOffset>
  35727. <bitWidth>1</bitWidth>
  35728. </field>
  35729. </fields>
  35730. </register>
  35731. <register> <name>F26R1</name>
  35732. <displayName>F26R1</displayName>
  35733. <description>Filter bank 26 register 1</description>
  35734. <addressOffset>0x310</addressOffset>
  35735. <size>0x20</size>
  35736. <access>read-write</access>
  35737. <resetValue>0x00000000</resetValue>
  35738. <fields>
  35739. <field> <name>FB0</name>
  35740. <description>Filter bits</description>
  35741. <bitOffset>0</bitOffset>
  35742. <bitWidth>1</bitWidth>
  35743. </field>
  35744. <field> <name>FB1</name>
  35745. <description>Filter bits</description>
  35746. <bitOffset>1</bitOffset>
  35747. <bitWidth>1</bitWidth>
  35748. </field>
  35749. <field> <name>FB2</name>
  35750. <description>Filter bits</description>
  35751. <bitOffset>2</bitOffset>
  35752. <bitWidth>1</bitWidth>
  35753. </field>
  35754. <field> <name>FB3</name>
  35755. <description>Filter bits</description>
  35756. <bitOffset>3</bitOffset>
  35757. <bitWidth>1</bitWidth>
  35758. </field>
  35759. <field> <name>FB4</name>
  35760. <description>Filter bits</description>
  35761. <bitOffset>4</bitOffset>
  35762. <bitWidth>1</bitWidth>
  35763. </field>
  35764. <field> <name>FB5</name>
  35765. <description>Filter bits</description>
  35766. <bitOffset>5</bitOffset>
  35767. <bitWidth>1</bitWidth>
  35768. </field>
  35769. <field> <name>FB6</name>
  35770. <description>Filter bits</description>
  35771. <bitOffset>6</bitOffset>
  35772. <bitWidth>1</bitWidth>
  35773. </field>
  35774. <field> <name>FB7</name>
  35775. <description>Filter bits</description>
  35776. <bitOffset>7</bitOffset>
  35777. <bitWidth>1</bitWidth>
  35778. </field>
  35779. <field> <name>FB8</name>
  35780. <description>Filter bits</description>
  35781. <bitOffset>8</bitOffset>
  35782. <bitWidth>1</bitWidth>
  35783. </field>
  35784. <field> <name>FB9</name>
  35785. <description>Filter bits</description>
  35786. <bitOffset>9</bitOffset>
  35787. <bitWidth>1</bitWidth>
  35788. </field>
  35789. <field> <name>FB10</name>
  35790. <description>Filter bits</description>
  35791. <bitOffset>10</bitOffset>
  35792. <bitWidth>1</bitWidth>
  35793. </field>
  35794. <field> <name>FB11</name>
  35795. <description>Filter bits</description>
  35796. <bitOffset>11</bitOffset>
  35797. <bitWidth>1</bitWidth>
  35798. </field>
  35799. <field> <name>FB12</name>
  35800. <description>Filter bits</description>
  35801. <bitOffset>12</bitOffset>
  35802. <bitWidth>1</bitWidth>
  35803. </field>
  35804. <field> <name>FB13</name>
  35805. <description>Filter bits</description>
  35806. <bitOffset>13</bitOffset>
  35807. <bitWidth>1</bitWidth>
  35808. </field>
  35809. <field> <name>FB14</name>
  35810. <description>Filter bits</description>
  35811. <bitOffset>14</bitOffset>
  35812. <bitWidth>1</bitWidth>
  35813. </field>
  35814. <field> <name>FB15</name>
  35815. <description>Filter bits</description>
  35816. <bitOffset>15</bitOffset>
  35817. <bitWidth>1</bitWidth>
  35818. </field>
  35819. <field> <name>FB16</name>
  35820. <description>Filter bits</description>
  35821. <bitOffset>16</bitOffset>
  35822. <bitWidth>1</bitWidth>
  35823. </field>
  35824. <field> <name>FB17</name>
  35825. <description>Filter bits</description>
  35826. <bitOffset>17</bitOffset>
  35827. <bitWidth>1</bitWidth>
  35828. </field>
  35829. <field> <name>FB18</name>
  35830. <description>Filter bits</description>
  35831. <bitOffset>18</bitOffset>
  35832. <bitWidth>1</bitWidth>
  35833. </field>
  35834. <field> <name>FB19</name>
  35835. <description>Filter bits</description>
  35836. <bitOffset>19</bitOffset>
  35837. <bitWidth>1</bitWidth>
  35838. </field>
  35839. <field> <name>FB20</name>
  35840. <description>Filter bits</description>
  35841. <bitOffset>20</bitOffset>
  35842. <bitWidth>1</bitWidth>
  35843. </field>
  35844. <field> <name>FB21</name>
  35845. <description>Filter bits</description>
  35846. <bitOffset>21</bitOffset>
  35847. <bitWidth>1</bitWidth>
  35848. </field>
  35849. <field> <name>FB22</name>
  35850. <description>Filter bits</description>
  35851. <bitOffset>22</bitOffset>
  35852. <bitWidth>1</bitWidth>
  35853. </field>
  35854. <field> <name>FB23</name>
  35855. <description>Filter bits</description>
  35856. <bitOffset>23</bitOffset>
  35857. <bitWidth>1</bitWidth>
  35858. </field>
  35859. <field> <name>FB24</name>
  35860. <description>Filter bits</description>
  35861. <bitOffset>24</bitOffset>
  35862. <bitWidth>1</bitWidth>
  35863. </field>
  35864. <field> <name>FB25</name>
  35865. <description>Filter bits</description>
  35866. <bitOffset>25</bitOffset>
  35867. <bitWidth>1</bitWidth>
  35868. </field>
  35869. <field> <name>FB26</name>
  35870. <description>Filter bits</description>
  35871. <bitOffset>26</bitOffset>
  35872. <bitWidth>1</bitWidth>
  35873. </field>
  35874. <field> <name>FB27</name>
  35875. <description>Filter bits</description>
  35876. <bitOffset>27</bitOffset>
  35877. <bitWidth>1</bitWidth>
  35878. </field>
  35879. <field> <name>FB28</name>
  35880. <description>Filter bits</description>
  35881. <bitOffset>28</bitOffset>
  35882. <bitWidth>1</bitWidth>
  35883. </field>
  35884. <field> <name>FB29</name>
  35885. <description>Filter bits</description>
  35886. <bitOffset>29</bitOffset>
  35887. <bitWidth>1</bitWidth>
  35888. </field>
  35889. <field> <name>FB30</name>
  35890. <description>Filter bits</description>
  35891. <bitOffset>30</bitOffset>
  35892. <bitWidth>1</bitWidth>
  35893. </field>
  35894. <field> <name>FB31</name>
  35895. <description>Filter bits</description>
  35896. <bitOffset>31</bitOffset>
  35897. <bitWidth>1</bitWidth>
  35898. </field>
  35899. </fields>
  35900. </register>
  35901. <register> <name>F26R2</name>
  35902. <displayName>F26R2</displayName>
  35903. <description>Filter bank 26 register 2</description>
  35904. <addressOffset>0x314</addressOffset>
  35905. <size>0x20</size>
  35906. <access>read-write</access>
  35907. <resetValue>0x00000000</resetValue>
  35908. <fields>
  35909. <field> <name>FB0</name>
  35910. <description>Filter bits</description>
  35911. <bitOffset>0</bitOffset>
  35912. <bitWidth>1</bitWidth>
  35913. </field>
  35914. <field> <name>FB1</name>
  35915. <description>Filter bits</description>
  35916. <bitOffset>1</bitOffset>
  35917. <bitWidth>1</bitWidth>
  35918. </field>
  35919. <field> <name>FB2</name>
  35920. <description>Filter bits</description>
  35921. <bitOffset>2</bitOffset>
  35922. <bitWidth>1</bitWidth>
  35923. </field>
  35924. <field> <name>FB3</name>
  35925. <description>Filter bits</description>
  35926. <bitOffset>3</bitOffset>
  35927. <bitWidth>1</bitWidth>
  35928. </field>
  35929. <field> <name>FB4</name>
  35930. <description>Filter bits</description>
  35931. <bitOffset>4</bitOffset>
  35932. <bitWidth>1</bitWidth>
  35933. </field>
  35934. <field> <name>FB5</name>
  35935. <description>Filter bits</description>
  35936. <bitOffset>5</bitOffset>
  35937. <bitWidth>1</bitWidth>
  35938. </field>
  35939. <field> <name>FB6</name>
  35940. <description>Filter bits</description>
  35941. <bitOffset>6</bitOffset>
  35942. <bitWidth>1</bitWidth>
  35943. </field>
  35944. <field> <name>FB7</name>
  35945. <description>Filter bits</description>
  35946. <bitOffset>7</bitOffset>
  35947. <bitWidth>1</bitWidth>
  35948. </field>
  35949. <field> <name>FB8</name>
  35950. <description>Filter bits</description>
  35951. <bitOffset>8</bitOffset>
  35952. <bitWidth>1</bitWidth>
  35953. </field>
  35954. <field> <name>FB9</name>
  35955. <description>Filter bits</description>
  35956. <bitOffset>9</bitOffset>
  35957. <bitWidth>1</bitWidth>
  35958. </field>
  35959. <field> <name>FB10</name>
  35960. <description>Filter bits</description>
  35961. <bitOffset>10</bitOffset>
  35962. <bitWidth>1</bitWidth>
  35963. </field>
  35964. <field> <name>FB11</name>
  35965. <description>Filter bits</description>
  35966. <bitOffset>11</bitOffset>
  35967. <bitWidth>1</bitWidth>
  35968. </field>
  35969. <field> <name>FB12</name>
  35970. <description>Filter bits</description>
  35971. <bitOffset>12</bitOffset>
  35972. <bitWidth>1</bitWidth>
  35973. </field>
  35974. <field> <name>FB13</name>
  35975. <description>Filter bits</description>
  35976. <bitOffset>13</bitOffset>
  35977. <bitWidth>1</bitWidth>
  35978. </field>
  35979. <field> <name>FB14</name>
  35980. <description>Filter bits</description>
  35981. <bitOffset>14</bitOffset>
  35982. <bitWidth>1</bitWidth>
  35983. </field>
  35984. <field> <name>FB15</name>
  35985. <description>Filter bits</description>
  35986. <bitOffset>15</bitOffset>
  35987. <bitWidth>1</bitWidth>
  35988. </field>
  35989. <field> <name>FB16</name>
  35990. <description>Filter bits</description>
  35991. <bitOffset>16</bitOffset>
  35992. <bitWidth>1</bitWidth>
  35993. </field>
  35994. <field> <name>FB17</name>
  35995. <description>Filter bits</description>
  35996. <bitOffset>17</bitOffset>
  35997. <bitWidth>1</bitWidth>
  35998. </field>
  35999. <field> <name>FB18</name>
  36000. <description>Filter bits</description>
  36001. <bitOffset>18</bitOffset>
  36002. <bitWidth>1</bitWidth>
  36003. </field>
  36004. <field> <name>FB19</name>
  36005. <description>Filter bits</description>
  36006. <bitOffset>19</bitOffset>
  36007. <bitWidth>1</bitWidth>
  36008. </field>
  36009. <field> <name>FB20</name>
  36010. <description>Filter bits</description>
  36011. <bitOffset>20</bitOffset>
  36012. <bitWidth>1</bitWidth>
  36013. </field>
  36014. <field> <name>FB21</name>
  36015. <description>Filter bits</description>
  36016. <bitOffset>21</bitOffset>
  36017. <bitWidth>1</bitWidth>
  36018. </field>
  36019. <field> <name>FB22</name>
  36020. <description>Filter bits</description>
  36021. <bitOffset>22</bitOffset>
  36022. <bitWidth>1</bitWidth>
  36023. </field>
  36024. <field> <name>FB23</name>
  36025. <description>Filter bits</description>
  36026. <bitOffset>23</bitOffset>
  36027. <bitWidth>1</bitWidth>
  36028. </field>
  36029. <field> <name>FB24</name>
  36030. <description>Filter bits</description>
  36031. <bitOffset>24</bitOffset>
  36032. <bitWidth>1</bitWidth>
  36033. </field>
  36034. <field> <name>FB25</name>
  36035. <description>Filter bits</description>
  36036. <bitOffset>25</bitOffset>
  36037. <bitWidth>1</bitWidth>
  36038. </field>
  36039. <field> <name>FB26</name>
  36040. <description>Filter bits</description>
  36041. <bitOffset>26</bitOffset>
  36042. <bitWidth>1</bitWidth>
  36043. </field>
  36044. <field> <name>FB27</name>
  36045. <description>Filter bits</description>
  36046. <bitOffset>27</bitOffset>
  36047. <bitWidth>1</bitWidth>
  36048. </field>
  36049. <field> <name>FB28</name>
  36050. <description>Filter bits</description>
  36051. <bitOffset>28</bitOffset>
  36052. <bitWidth>1</bitWidth>
  36053. </field>
  36054. <field> <name>FB29</name>
  36055. <description>Filter bits</description>
  36056. <bitOffset>29</bitOffset>
  36057. <bitWidth>1</bitWidth>
  36058. </field>
  36059. <field> <name>FB30</name>
  36060. <description>Filter bits</description>
  36061. <bitOffset>30</bitOffset>
  36062. <bitWidth>1</bitWidth>
  36063. </field>
  36064. <field> <name>FB31</name>
  36065. <description>Filter bits</description>
  36066. <bitOffset>31</bitOffset>
  36067. <bitWidth>1</bitWidth>
  36068. </field>
  36069. </fields>
  36070. </register>
  36071. <register>
  36072. <name>F27R1</name>
  36073. <displayName>F27R1</displayName>
  36074. <description>Filter bank 27 register 1</description>
  36075. <addressOffset>0x318</addressOffset>
  36076. <size>0x20</size>
  36077. <access>read-write</access>
  36078. <resetValue>0x00000000</resetValue>
  36079. <fields>
  36080. <field> <name>FB0</name>
  36081. <description>Filter bits</description>
  36082. <bitOffset>0</bitOffset>
  36083. <bitWidth>1</bitWidth>
  36084. </field>
  36085. <field> <name>FB1</name>
  36086. <description>Filter bits</description>
  36087. <bitOffset>1</bitOffset>
  36088. <bitWidth>1</bitWidth>
  36089. </field>
  36090. <field> <name>FB2</name>
  36091. <description>Filter bits</description>
  36092. <bitOffset>2</bitOffset>
  36093. <bitWidth>1</bitWidth>
  36094. </field>
  36095. <field> <name>FB3</name>
  36096. <description>Filter bits</description>
  36097. <bitOffset>3</bitOffset>
  36098. <bitWidth>1</bitWidth>
  36099. </field>
  36100. <field> <name>FB4</name>
  36101. <description>Filter bits</description>
  36102. <bitOffset>4</bitOffset>
  36103. <bitWidth>1</bitWidth>
  36104. </field>
  36105. <field> <name>FB5</name>
  36106. <description>Filter bits</description>
  36107. <bitOffset>5</bitOffset>
  36108. <bitWidth>1</bitWidth>
  36109. </field>
  36110. <field> <name>FB6</name>
  36111. <description>Filter bits</description>
  36112. <bitOffset>6</bitOffset>
  36113. <bitWidth>1</bitWidth>
  36114. </field>
  36115. <field> <name>FB7</name>
  36116. <description>Filter bits</description>
  36117. <bitOffset>7</bitOffset>
  36118. <bitWidth>1</bitWidth>
  36119. </field>
  36120. <field> <name>FB8</name>
  36121. <description>Filter bits</description>
  36122. <bitOffset>8</bitOffset>
  36123. <bitWidth>1</bitWidth>
  36124. </field>
  36125. <field> <name>FB9</name>
  36126. <description>Filter bits</description>
  36127. <bitOffset>9</bitOffset>
  36128. <bitWidth>1</bitWidth>
  36129. </field>
  36130. <field> <name>FB10</name>
  36131. <description>Filter bits</description>
  36132. <bitOffset>10</bitOffset>
  36133. <bitWidth>1</bitWidth>
  36134. </field>
  36135. <field> <name>FB11</name>
  36136. <description>Filter bits</description>
  36137. <bitOffset>11</bitOffset>
  36138. <bitWidth>1</bitWidth>
  36139. </field>
  36140. <field> <name>FB12</name>
  36141. <description>Filter bits</description>
  36142. <bitOffset>12</bitOffset>
  36143. <bitWidth>1</bitWidth>
  36144. </field>
  36145. <field> <name>FB13</name>
  36146. <description>Filter bits</description>
  36147. <bitOffset>13</bitOffset>
  36148. <bitWidth>1</bitWidth>
  36149. </field>
  36150. <field> <name>FB14</name>
  36151. <description>Filter bits</description>
  36152. <bitOffset>14</bitOffset>
  36153. <bitWidth>1</bitWidth>
  36154. </field>
  36155. <field> <name>FB15</name>
  36156. <description>Filter bits</description>
  36157. <bitOffset>15</bitOffset>
  36158. <bitWidth>1</bitWidth>
  36159. </field>
  36160. <field> <name>FB16</name>
  36161. <description>Filter bits</description>
  36162. <bitOffset>16</bitOffset>
  36163. <bitWidth>1</bitWidth>
  36164. </field>
  36165. <field> <name>FB17</name>
  36166. <description>Filter bits</description>
  36167. <bitOffset>17</bitOffset>
  36168. <bitWidth>1</bitWidth>
  36169. </field>
  36170. <field> <name>FB18</name>
  36171. <description>Filter bits</description>
  36172. <bitOffset>18</bitOffset>
  36173. <bitWidth>1</bitWidth>
  36174. </field>
  36175. <field> <name>FB19</name>
  36176. <description>Filter bits</description>
  36177. <bitOffset>19</bitOffset>
  36178. <bitWidth>1</bitWidth>
  36179. </field>
  36180. <field> <name>FB20</name>
  36181. <description>Filter bits</description>
  36182. <bitOffset>20</bitOffset>
  36183. <bitWidth>1</bitWidth>
  36184. </field>
  36185. <field> <name>FB21</name>
  36186. <description>Filter bits</description>
  36187. <bitOffset>21</bitOffset>
  36188. <bitWidth>1</bitWidth>
  36189. </field>
  36190. <field> <name>FB22</name>
  36191. <description>Filter bits</description>
  36192. <bitOffset>22</bitOffset>
  36193. <bitWidth>1</bitWidth>
  36194. </field>
  36195. <field> <name>FB23</name>
  36196. <description>Filter bits</description>
  36197. <bitOffset>23</bitOffset>
  36198. <bitWidth>1</bitWidth>
  36199. </field>
  36200. <field> <name>FB24</name>
  36201. <description>Filter bits</description>
  36202. <bitOffset>24</bitOffset>
  36203. <bitWidth>1</bitWidth>
  36204. </field>
  36205. <field> <name>FB25</name>
  36206. <description>Filter bits</description>
  36207. <bitOffset>25</bitOffset>
  36208. <bitWidth>1</bitWidth>
  36209. </field>
  36210. <field> <name>FB26</name>
  36211. <description>Filter bits</description>
  36212. <bitOffset>26</bitOffset>
  36213. <bitWidth>1</bitWidth>
  36214. </field>
  36215. <field> <name>FB27</name>
  36216. <description>Filter bits</description>
  36217. <bitOffset>27</bitOffset>
  36218. <bitWidth>1</bitWidth>
  36219. </field>
  36220. <field> <name>FB28</name>
  36221. <description>Filter bits</description>
  36222. <bitOffset>28</bitOffset>
  36223. <bitWidth>1</bitWidth>
  36224. </field>
  36225. <field> <name>FB29</name>
  36226. <description>Filter bits</description>
  36227. <bitOffset>29</bitOffset>
  36228. <bitWidth>1</bitWidth>
  36229. </field>
  36230. <field> <name>FB30</name>
  36231. <description>Filter bits</description>
  36232. <bitOffset>30</bitOffset>
  36233. <bitWidth>1</bitWidth>
  36234. </field>
  36235. <field> <name>FB31</name>
  36236. <description>Filter bits</description>
  36237. <bitOffset>31</bitOffset>
  36238. <bitWidth>1</bitWidth>
  36239. </field>
  36240. </fields>
  36241. </register>
  36242. <register> <name>F27R2</name>
  36243. <displayName>F27R2</displayName>
  36244. <description>Filter bank 27 register 2</description>
  36245. <addressOffset>0x31C</addressOffset>
  36246. <size>0x20</size>
  36247. <access>read-write</access>
  36248. <resetValue>0x00000000</resetValue>
  36249. <fields>
  36250. <field> <name>FB0</name>
  36251. <description>Filter bits</description>
  36252. <bitOffset>0</bitOffset>
  36253. <bitWidth>1</bitWidth>
  36254. </field>
  36255. <field> <name>FB1</name>
  36256. <description>Filter bits</description>
  36257. <bitOffset>1</bitOffset>
  36258. <bitWidth>1</bitWidth>
  36259. </field>
  36260. <field> <name>FB2</name>
  36261. <description>Filter bits</description>
  36262. <bitOffset>2</bitOffset>
  36263. <bitWidth>1</bitWidth>
  36264. </field>
  36265. <field> <name>FB3</name>
  36266. <description>Filter bits</description>
  36267. <bitOffset>3</bitOffset>
  36268. <bitWidth>1</bitWidth>
  36269. </field>
  36270. <field> <name>FB4</name>
  36271. <description>Filter bits</description>
  36272. <bitOffset>4</bitOffset>
  36273. <bitWidth>1</bitWidth>
  36274. </field>
  36275. <field> <name>FB5</name>
  36276. <description>Filter bits</description>
  36277. <bitOffset>5</bitOffset>
  36278. <bitWidth>1</bitWidth>
  36279. </field>
  36280. <field> <name>FB6</name>
  36281. <description>Filter bits</description>
  36282. <bitOffset>6</bitOffset>
  36283. <bitWidth>1</bitWidth>
  36284. </field>
  36285. <field> <name>FB7</name>
  36286. <description>Filter bits</description>
  36287. <bitOffset>7</bitOffset>
  36288. <bitWidth>1</bitWidth>
  36289. </field>
  36290. <field> <name>FB8</name>
  36291. <description>Filter bits</description>
  36292. <bitOffset>8</bitOffset>
  36293. <bitWidth>1</bitWidth>
  36294. </field>
  36295. <field> <name>FB9</name>
  36296. <description>Filter bits</description>
  36297. <bitOffset>9</bitOffset>
  36298. <bitWidth>1</bitWidth>
  36299. </field>
  36300. <field> <name>FB10</name>
  36301. <description>Filter bits</description>
  36302. <bitOffset>10</bitOffset>
  36303. <bitWidth>1</bitWidth>
  36304. </field>
  36305. <field> <name>FB11</name>
  36306. <description>Filter bits</description>
  36307. <bitOffset>11</bitOffset>
  36308. <bitWidth>1</bitWidth>
  36309. </field>
  36310. <field> <name>FB12</name>
  36311. <description>Filter bits</description>
  36312. <bitOffset>12</bitOffset>
  36313. <bitWidth>1</bitWidth>
  36314. </field>
  36315. <field> <name>FB13</name>
  36316. <description>Filter bits</description>
  36317. <bitOffset>13</bitOffset>
  36318. <bitWidth>1</bitWidth>
  36319. </field>
  36320. <field> <name>FB14</name>
  36321. <description>Filter bits</description>
  36322. <bitOffset>14</bitOffset>
  36323. <bitWidth>1</bitWidth>
  36324. </field>
  36325. <field> <name>FB15</name>
  36326. <description>Filter bits</description>
  36327. <bitOffset>15</bitOffset>
  36328. <bitWidth>1</bitWidth>
  36329. </field>
  36330. <field> <name>FB16</name>
  36331. <description>Filter bits</description>
  36332. <bitOffset>16</bitOffset>
  36333. <bitWidth>1</bitWidth>
  36334. </field>
  36335. <field> <name>FB17</name>
  36336. <description>Filter bits</description>
  36337. <bitOffset>17</bitOffset>
  36338. <bitWidth>1</bitWidth>
  36339. </field>
  36340. <field> <name>FB18</name>
  36341. <description>Filter bits</description>
  36342. <bitOffset>18</bitOffset>
  36343. <bitWidth>1</bitWidth>
  36344. </field>
  36345. <field> <name>FB19</name>
  36346. <description>Filter bits</description>
  36347. <bitOffset>19</bitOffset>
  36348. <bitWidth>1</bitWidth>
  36349. </field>
  36350. <field> <name>FB20</name>
  36351. <description>Filter bits</description>
  36352. <bitOffset>20</bitOffset>
  36353. <bitWidth>1</bitWidth>
  36354. </field>
  36355. <field> <name>FB21</name>
  36356. <description>Filter bits</description>
  36357. <bitOffset>21</bitOffset>
  36358. <bitWidth>1</bitWidth>
  36359. </field>
  36360. <field> <name>FB22</name>
  36361. <description>Filter bits</description>
  36362. <bitOffset>22</bitOffset>
  36363. <bitWidth>1</bitWidth>
  36364. </field>
  36365. <field> <name>FB23</name>
  36366. <description>Filter bits</description>
  36367. <bitOffset>23</bitOffset>
  36368. <bitWidth>1</bitWidth>
  36369. </field>
  36370. <field> <name>FB24</name>
  36371. <description>Filter bits</description>
  36372. <bitOffset>24</bitOffset>
  36373. <bitWidth>1</bitWidth>
  36374. </field>
  36375. <field> <name>FB25</name>
  36376. <description>Filter bits</description>
  36377. <bitOffset>25</bitOffset>
  36378. <bitWidth>1</bitWidth>
  36379. </field>
  36380. <field> <name>FB26</name>
  36381. <description>Filter bits</description>
  36382. <bitOffset>26</bitOffset>
  36383. <bitWidth>1</bitWidth>
  36384. </field>
  36385. <field> <name>FB27</name>
  36386. <description>Filter bits</description>
  36387. <bitOffset>27</bitOffset>
  36388. <bitWidth>1</bitWidth>
  36389. </field>
  36390. <field> <name>FB28</name>
  36391. <description>Filter bits</description>
  36392. <bitOffset>28</bitOffset>
  36393. <bitWidth>1</bitWidth>
  36394. </field>
  36395. <field> <name>FB29</name>
  36396. <description>Filter bits</description>
  36397. <bitOffset>29</bitOffset>
  36398. <bitWidth>1</bitWidth>
  36399. </field>
  36400. <field> <name>FB30</name>
  36401. <description>Filter bits</description>
  36402. <bitOffset>30</bitOffset>
  36403. <bitWidth>1</bitWidth>
  36404. </field>
  36405. <field> <name>FB31</name>
  36406. <description>Filter bits</description>
  36407. <bitOffset>31</bitOffset>
  36408. <bitWidth>1</bitWidth>
  36409. </field>
  36410. </fields>
  36411. </register>
  36412. </registers>
  36413. </peripheral>
  36414. <peripheral derivedFrom="CAN1"> <name>CAN2</name>
  36415. <baseAddress>0x40006800</baseAddress>
  36416. <interrupt>
  36417. <name>CAN2_TX</name>
  36418. <description>CAN2 TX interrupts</description>
  36419. <value>63</value>
  36420. </interrupt>
  36421. <interrupt>
  36422. <name>CAN2_RX0</name>
  36423. <description>CAN2 RX0 interrupts</description>
  36424. <value>64</value>
  36425. </interrupt>
  36426. <interrupt>
  36427. <name>CAN2_RX1</name>
  36428. <description>CAN2 RX1 interrupts</description>
  36429. <value>65</value>
  36430. </interrupt>
  36431. <interrupt>
  36432. <name>CAN2_SCE</name>
  36433. <description>CAN2 SCE interrupt</description>
  36434. <value>66</value>
  36435. </interrupt>
  36436. </peripheral>
  36437. <peripheral> <name>FLASH</name>
  36438. <description>FLASH</description>
  36439. <groupName>FLASH</groupName>
  36440. <baseAddress>0x40023C00</baseAddress>
  36441. <addressBlock>
  36442. <offset>0x0</offset>
  36443. <size>0x400</size>
  36444. <usage>registers</usage>
  36445. </addressBlock>
  36446. <registers>
  36447. <register> <name>ACR</name>
  36448. <displayName>ACR</displayName>
  36449. <description>Flash access control register</description>
  36450. <addressOffset>0x0</addressOffset>
  36451. <size>0x20</size>
  36452. <resetValue>0x00000000</resetValue>
  36453. <fields>
  36454. <field> <name>LATENCY</name>
  36455. <description>Latency</description>
  36456. <bitOffset>0</bitOffset>
  36457. <bitWidth>3</bitWidth>
  36458. <access>read-write</access>
  36459. </field>
  36460. <field> <name>PRFTEN</name>
  36461. <description>Prefetch enable</description>
  36462. <bitOffset>8</bitOffset>
  36463. <bitWidth>1</bitWidth>
  36464. <access>read-write</access>
  36465. </field>
  36466. <field> <name>ICEN</name>
  36467. <description>Instruction cache enable</description>
  36468. <bitOffset>9</bitOffset>
  36469. <bitWidth>1</bitWidth>
  36470. <access>read-write</access>
  36471. </field>
  36472. <field> <name>DCEN</name>
  36473. <description>Data cache enable</description>
  36474. <bitOffset>10</bitOffset>
  36475. <bitWidth>1</bitWidth>
  36476. <access>read-write</access>
  36477. </field>
  36478. <field> <name>ICRST</name>
  36479. <description>Instruction cache reset</description>
  36480. <bitOffset>11</bitOffset>
  36481. <bitWidth>1</bitWidth>
  36482. <access>write-only</access>
  36483. </field>
  36484. <field> <name>DCRST</name>
  36485. <description>Data cache reset</description>
  36486. <bitOffset>12</bitOffset>
  36487. <bitWidth>1</bitWidth>
  36488. <access>read-write</access>
  36489. </field>
  36490. </fields>
  36491. </register>
  36492. <register> <name>KEYR</name>
  36493. <displayName>KEYR</displayName>
  36494. <description>Flash key register</description>
  36495. <addressOffset>0x4</addressOffset>
  36496. <size>0x20</size>
  36497. <access>write-only</access>
  36498. <resetValue>0x00000000</resetValue>
  36499. <fields>
  36500. <field> <name>KEY</name>
  36501. <description>FPEC key</description>
  36502. <bitOffset>0</bitOffset>
  36503. <bitWidth>32</bitWidth>
  36504. </field>
  36505. </fields>
  36506. </register>
  36507. <register> <name>OPTKEYR</name>
  36508. <displayName>OPTKEYR</displayName>
  36509. <description>Flash option key register</description>
  36510. <addressOffset>0x8</addressOffset>
  36511. <size>0x20</size>
  36512. <access>write-only</access>
  36513. <resetValue>0x00000000</resetValue>
  36514. <fields>
  36515. <field> <name>OPTKEY</name>
  36516. <description>Option byte key</description>
  36517. <bitOffset>0</bitOffset>
  36518. <bitWidth>32</bitWidth>
  36519. </field>
  36520. </fields>
  36521. </register>
  36522. <register> <name>SR</name>
  36523. <displayName>SR</displayName>
  36524. <description>Status register</description>
  36525. <addressOffset>0xC</addressOffset>
  36526. <size>0x20</size>
  36527. <resetValue>0x00000000</resetValue>
  36528. <fields>
  36529. <field> <name>EOP</name>
  36530. <description>End of operation</description>
  36531. <bitOffset>0</bitOffset>
  36532. <bitWidth>1</bitWidth>
  36533. <access>read-write</access>
  36534. </field>
  36535. <field> <name>OPERR</name>
  36536. <description>Operation error</description>
  36537. <bitOffset>1</bitOffset>
  36538. <bitWidth>1</bitWidth>
  36539. <access>read-write</access>
  36540. </field>
  36541. <field> <name>WRPERR</name>
  36542. <description>Write protection error</description>
  36543. <bitOffset>4</bitOffset>
  36544. <bitWidth>1</bitWidth>
  36545. <access>read-write</access>
  36546. </field>
  36547. <field> <name>PGAERR</name>
  36548. <description>Programming alignment
  36549. error</description>
  36550. <bitOffset>5</bitOffset>
  36551. <bitWidth>1</bitWidth>
  36552. <access>read-write</access>
  36553. </field>
  36554. <field> <name>PGPERR</name>
  36555. <description>Programming parallelism
  36556. error</description>
  36557. <bitOffset>6</bitOffset>
  36558. <bitWidth>1</bitWidth>
  36559. <access>read-write</access>
  36560. </field>
  36561. <field> <name>PGSERR</name>
  36562. <description>Programming sequence error</description>
  36563. <bitOffset>7</bitOffset>
  36564. <bitWidth>1</bitWidth>
  36565. <access>read-write</access>
  36566. </field>
  36567. <field> <name>BSY</name>
  36568. <description>Busy</description>
  36569. <bitOffset>16</bitOffset>
  36570. <bitWidth>1</bitWidth>
  36571. <access>read-only</access>
  36572. </field>
  36573. </fields>
  36574. </register>
  36575. <register> <name>CR</name>
  36576. <displayName>CR</displayName>
  36577. <description>Control register</description>
  36578. <addressOffset>0x10</addressOffset>
  36579. <size>0x20</size>
  36580. <access>read-write</access>
  36581. <resetValue>0x80000000</resetValue>
  36582. <fields>
  36583. <field> <name>PG</name>
  36584. <description>Programming</description>
  36585. <bitOffset>0</bitOffset>
  36586. <bitWidth>1</bitWidth>
  36587. </field>
  36588. <field> <name>SER</name>
  36589. <description>Sector Erase</description>
  36590. <bitOffset>1</bitOffset>
  36591. <bitWidth>1</bitWidth>
  36592. </field>
  36593. <field> <name>MER</name>
  36594. <description>Mass Erase</description>
  36595. <bitOffset>2</bitOffset>
  36596. <bitWidth>1</bitWidth>
  36597. </field>
  36598. <field> <name>SNB</name>
  36599. <description>Sector number</description>
  36600. <bitOffset>3</bitOffset>
  36601. <bitWidth>4</bitWidth>
  36602. </field>
  36603. <field> <name>PSIZE</name>
  36604. <description>Program size</description>
  36605. <bitOffset>8</bitOffset>
  36606. <bitWidth>2</bitWidth>
  36607. </field>
  36608. <field> <name>STRT</name>
  36609. <description>Start</description>
  36610. <bitOffset>16</bitOffset>
  36611. <bitWidth>1</bitWidth>
  36612. </field>
  36613. <field> <name>EOPIE</name>
  36614. <description>End of operation interrupt
  36615. enable</description>
  36616. <bitOffset>24</bitOffset>
  36617. <bitWidth>1</bitWidth>
  36618. </field>
  36619. <field> <name>ERRIE</name>
  36620. <description>Error interrupt enable</description>
  36621. <bitOffset>25</bitOffset>
  36622. <bitWidth>1</bitWidth>
  36623. </field>
  36624. <field> <name>LOCK</name>
  36625. <description>Lock</description>
  36626. <bitOffset>31</bitOffset>
  36627. <bitWidth>1</bitWidth>
  36628. </field>
  36629. </fields>
  36630. </register>
  36631. <register> <name>OPTCR</name>
  36632. <displayName>OPTCR</displayName>
  36633. <description>Flash option control register</description>
  36634. <addressOffset>0x14</addressOffset>
  36635. <size>0x20</size>
  36636. <access>read-write</access>
  36637. <resetValue>0x00000014</resetValue>
  36638. <fields>
  36639. <field> <name>OPTLOCK</name>
  36640. <description>Option lock</description>
  36641. <bitOffset>0</bitOffset>
  36642. <bitWidth>1</bitWidth>
  36643. </field>
  36644. <field> <name>OPTSTRT</name>
  36645. <description>Option start</description>
  36646. <bitOffset>1</bitOffset>
  36647. <bitWidth>1</bitWidth>
  36648. </field>
  36649. <field> <name>BOR_LEV</name>
  36650. <description>BOR reset Level</description>
  36651. <bitOffset>2</bitOffset>
  36652. <bitWidth>2</bitWidth>
  36653. </field>
  36654. <field> <name>WDG_SW</name>
  36655. <description>WDG_SW User option bytes</description>
  36656. <bitOffset>5</bitOffset>
  36657. <bitWidth>1</bitWidth>
  36658. </field>
  36659. <field> <name>nRST_STOP</name>
  36660. <description>nRST_STOP User option
  36661. bytes</description>
  36662. <bitOffset>6</bitOffset>
  36663. <bitWidth>1</bitWidth>
  36664. </field>
  36665. <field> <name>nRST_STDBY</name>
  36666. <description>nRST_STDBY User option
  36667. bytes</description>
  36668. <bitOffset>7</bitOffset>
  36669. <bitWidth>1</bitWidth>
  36670. </field>
  36671. <field> <name>RDP</name>
  36672. <description>Read protect</description>
  36673. <bitOffset>8</bitOffset>
  36674. <bitWidth>8</bitWidth>
  36675. </field>
  36676. <field> <name>nWRP</name>
  36677. <description>Not write protect</description>
  36678. <bitOffset>16</bitOffset>
  36679. <bitWidth>12</bitWidth>
  36680. </field>
  36681. </fields>
  36682. </register>
  36683. </registers>
  36684. </peripheral>
  36685. <peripheral> <name>EXTI</name>
  36686. <description>External interrupt/event
  36687. controller</description>
  36688. <groupName>EXTI</groupName>
  36689. <baseAddress>0x40013C00</baseAddress>
  36690. <addressBlock>
  36691. <offset>0x0</offset>
  36692. <size>0x400</size>
  36693. <usage>registers</usage>
  36694. </addressBlock>
  36695. <interrupt>
  36696. <name>TAMP_STAMP</name>
  36697. <description>Tamper and TimeStamp interrupts through the
  36698. EXTI line</description>
  36699. <value>2</value>
  36700. </interrupt>
  36701. <interrupt>
  36702. <name>EXTI0</name>
  36703. <description>EXTI Line0 interrupt</description>
  36704. <value>6</value>
  36705. </interrupt>
  36706. <interrupt>
  36707. <name>EXTI1</name>
  36708. <description>EXTI Line1 interrupt</description>
  36709. <value>7</value>
  36710. </interrupt>
  36711. <interrupt>
  36712. <name>EXTI2</name>
  36713. <description>EXTI Line2 interrupt</description>
  36714. <value>8</value>
  36715. </interrupt>
  36716. <interrupt>
  36717. <name>EXTI3</name>
  36718. <description>EXTI Line3 interrupt</description>
  36719. <value>9</value>
  36720. </interrupt>
  36721. <interrupt>
  36722. <name>EXTI4</name>
  36723. <description>EXTI Line4 interrupt</description>
  36724. <value>10</value>
  36725. </interrupt>
  36726. <interrupt>
  36727. <name>EXTI9_5</name>
  36728. <description>EXTI Line[9:5] interrupts</description>
  36729. <value>23</value>
  36730. </interrupt>
  36731. <interrupt>
  36732. <name>EXTI9_5</name>
  36733. <description>EXTI Line[9:5] interrupts</description>
  36734. <value>23</value>
  36735. </interrupt>
  36736. <interrupt>
  36737. <name>EXTI15_10</name>
  36738. <description>EXTI Line[15:10] interrupts</description>
  36739. <value>40</value>
  36740. </interrupt>
  36741. <registers>
  36742. <register> <name>IMR</name>
  36743. <displayName>IMR</displayName>
  36744. <description>Interrupt mask register
  36745. (EXTI_IMR)</description>
  36746. <addressOffset>0x0</addressOffset>
  36747. <size>0x20</size>
  36748. <access>read-write</access>
  36749. <resetValue>0x00000000</resetValue>
  36750. <fields>
  36751. <field> <name>MR0</name>
  36752. <description>Interrupt Mask on line 0</description>
  36753. <bitOffset>0</bitOffset>
  36754. <bitWidth>1</bitWidth>
  36755. </field>
  36756. <field> <name>MR1</name>
  36757. <description>Interrupt Mask on line 1</description>
  36758. <bitOffset>1</bitOffset>
  36759. <bitWidth>1</bitWidth>
  36760. </field>
  36761. <field> <name>MR2</name>
  36762. <description>Interrupt Mask on line 2</description>
  36763. <bitOffset>2</bitOffset>
  36764. <bitWidth>1</bitWidth>
  36765. </field>
  36766. <field> <name>MR3</name>
  36767. <description>Interrupt Mask on line 3</description>
  36768. <bitOffset>3</bitOffset>
  36769. <bitWidth>1</bitWidth>
  36770. </field>
  36771. <field> <name>MR4</name>
  36772. <description>Interrupt Mask on line 4</description>
  36773. <bitOffset>4</bitOffset>
  36774. <bitWidth>1</bitWidth>
  36775. </field>
  36776. <field> <name>MR5</name>
  36777. <description>Interrupt Mask on line 5</description>
  36778. <bitOffset>5</bitOffset>
  36779. <bitWidth>1</bitWidth>
  36780. </field>
  36781. <field> <name>MR6</name>
  36782. <description>Interrupt Mask on line 6</description>
  36783. <bitOffset>6</bitOffset>
  36784. <bitWidth>1</bitWidth>
  36785. </field>
  36786. <field> <name>MR7</name>
  36787. <description>Interrupt Mask on line 7</description>
  36788. <bitOffset>7</bitOffset>
  36789. <bitWidth>1</bitWidth>
  36790. </field>
  36791. <field> <name>MR8</name>
  36792. <description>Interrupt Mask on line 8</description>
  36793. <bitOffset>8</bitOffset>
  36794. <bitWidth>1</bitWidth>
  36795. </field>
  36796. <field> <name>MR9</name>
  36797. <description>Interrupt Mask on line 9</description>
  36798. <bitOffset>9</bitOffset>
  36799. <bitWidth>1</bitWidth>
  36800. </field>
  36801. <field> <name>MR10</name>
  36802. <description>Interrupt Mask on line 10</description>
  36803. <bitOffset>10</bitOffset>
  36804. <bitWidth>1</bitWidth>
  36805. </field>
  36806. <field> <name>MR11</name>
  36807. <description>Interrupt Mask on line 11</description>
  36808. <bitOffset>11</bitOffset>
  36809. <bitWidth>1</bitWidth>
  36810. </field>
  36811. <field> <name>MR12</name>
  36812. <description>Interrupt Mask on line 12</description>
  36813. <bitOffset>12</bitOffset>
  36814. <bitWidth>1</bitWidth>
  36815. </field>
  36816. <field> <name>MR13</name>
  36817. <description>Interrupt Mask on line 13</description>
  36818. <bitOffset>13</bitOffset>
  36819. <bitWidth>1</bitWidth>
  36820. </field>
  36821. <field> <name>MR14</name>
  36822. <description>Interrupt Mask on line 14</description>
  36823. <bitOffset>14</bitOffset>
  36824. <bitWidth>1</bitWidth>
  36825. </field>
  36826. <field> <name>MR15</name>
  36827. <description>Interrupt Mask on line 15</description>
  36828. <bitOffset>15</bitOffset>
  36829. <bitWidth>1</bitWidth>
  36830. </field>
  36831. <field> <name>MR16</name>
  36832. <description>Interrupt Mask on line 16</description>
  36833. <bitOffset>16</bitOffset>
  36834. <bitWidth>1</bitWidth>
  36835. </field>
  36836. <field> <name>MR17</name>
  36837. <description>Interrupt Mask on line 17</description>
  36838. <bitOffset>17</bitOffset>
  36839. <bitWidth>1</bitWidth>
  36840. </field>
  36841. <field> <name>MR18</name>
  36842. <description>Interrupt Mask on line 18</description>
  36843. <bitOffset>18</bitOffset>
  36844. <bitWidth>1</bitWidth>
  36845. </field>
  36846. <field> <name>MR19</name>
  36847. <description>Interrupt Mask on line 19</description>
  36848. <bitOffset>19</bitOffset>
  36849. <bitWidth>1</bitWidth>
  36850. </field>
  36851. <field> <name>MR20</name>
  36852. <description>Interrupt Mask on line 20</description>
  36853. <bitOffset>20</bitOffset>
  36854. <bitWidth>1</bitWidth>
  36855. </field>
  36856. <field> <name>MR21</name>
  36857. <description>Interrupt Mask on line 21</description>
  36858. <bitOffset>21</bitOffset>
  36859. <bitWidth>1</bitWidth>
  36860. </field>
  36861. <field> <name>MR22</name>
  36862. <description>Interrupt Mask on line 22</description>
  36863. <bitOffset>22</bitOffset>
  36864. <bitWidth>1</bitWidth>
  36865. </field>
  36866. </fields>
  36867. </register>
  36868. <register> <name>EMR</name>
  36869. <displayName>EMR</displayName>
  36870. <description>Event mask register (EXTI_EMR)</description>
  36871. <addressOffset>0x4</addressOffset>
  36872. <size>0x20</size>
  36873. <access>read-write</access>
  36874. <resetValue>0x00000000</resetValue>
  36875. <fields>
  36876. <field> <name>MR0</name>
  36877. <description>Event Mask on line 0</description>
  36878. <bitOffset>0</bitOffset>
  36879. <bitWidth>1</bitWidth>
  36880. </field>
  36881. <field> <name>MR1</name>
  36882. <description>Event Mask on line 1</description>
  36883. <bitOffset>1</bitOffset>
  36884. <bitWidth>1</bitWidth>
  36885. </field>
  36886. <field> <name>MR2</name>
  36887. <description>Event Mask on line 2</description>
  36888. <bitOffset>2</bitOffset>
  36889. <bitWidth>1</bitWidth>
  36890. </field>
  36891. <field> <name>MR3</name>
  36892. <description>Event Mask on line 3</description>
  36893. <bitOffset>3</bitOffset>
  36894. <bitWidth>1</bitWidth>
  36895. </field>
  36896. <field> <name>MR4</name>
  36897. <description>Event Mask on line 4</description>
  36898. <bitOffset>4</bitOffset>
  36899. <bitWidth>1</bitWidth>
  36900. </field>
  36901. <field> <name>MR5</name>
  36902. <description>Event Mask on line 5</description>
  36903. <bitOffset>5</bitOffset>
  36904. <bitWidth>1</bitWidth>
  36905. </field>
  36906. <field> <name>MR6</name>
  36907. <description>Event Mask on line 6</description>
  36908. <bitOffset>6</bitOffset>
  36909. <bitWidth>1</bitWidth>
  36910. </field>
  36911. <field> <name>MR7</name>
  36912. <description>Event Mask on line 7</description>
  36913. <bitOffset>7</bitOffset>
  36914. <bitWidth>1</bitWidth>
  36915. </field>
  36916. <field> <name>MR8</name>
  36917. <description>Event Mask on line 8</description>
  36918. <bitOffset>8</bitOffset>
  36919. <bitWidth>1</bitWidth>
  36920. </field>
  36921. <field> <name>MR9</name>
  36922. <description>Event Mask on line 9</description>
  36923. <bitOffset>9</bitOffset>
  36924. <bitWidth>1</bitWidth>
  36925. </field>
  36926. <field> <name>MR10</name>
  36927. <description>Event Mask on line 10</description>
  36928. <bitOffset>10</bitOffset>
  36929. <bitWidth>1</bitWidth>
  36930. </field>
  36931. <field> <name>MR11</name>
  36932. <description>Event Mask on line 11</description>
  36933. <bitOffset>11</bitOffset>
  36934. <bitWidth>1</bitWidth>
  36935. </field>
  36936. <field> <name>MR12</name>
  36937. <description>Event Mask on line 12</description>
  36938. <bitOffset>12</bitOffset>
  36939. <bitWidth>1</bitWidth>
  36940. </field>
  36941. <field> <name>MR13</name>
  36942. <description>Event Mask on line 13</description>
  36943. <bitOffset>13</bitOffset>
  36944. <bitWidth>1</bitWidth>
  36945. </field>
  36946. <field> <name>MR14</name>
  36947. <description>Event Mask on line 14</description>
  36948. <bitOffset>14</bitOffset>
  36949. <bitWidth>1</bitWidth>
  36950. </field>
  36951. <field> <name>MR15</name>
  36952. <description>Event Mask on line 15</description>
  36953. <bitOffset>15</bitOffset>
  36954. <bitWidth>1</bitWidth>
  36955. </field>
  36956. <field> <name>MR16</name>
  36957. <description>Event Mask on line 16</description>
  36958. <bitOffset>16</bitOffset>
  36959. <bitWidth>1</bitWidth>
  36960. </field>
  36961. <field> <name>MR17</name>
  36962. <description>Event Mask on line 17</description>
  36963. <bitOffset>17</bitOffset>
  36964. <bitWidth>1</bitWidth>
  36965. </field>
  36966. <field> <name>MR18</name>
  36967. <description>Event Mask on line 18</description>
  36968. <bitOffset>18</bitOffset>
  36969. <bitWidth>1</bitWidth>
  36970. </field>
  36971. <field> <name>MR19</name>
  36972. <description>Event Mask on line 19</description>
  36973. <bitOffset>19</bitOffset>
  36974. <bitWidth>1</bitWidth>
  36975. </field>
  36976. <field> <name>MR20</name>
  36977. <description>Event Mask on line 20</description>
  36978. <bitOffset>20</bitOffset>
  36979. <bitWidth>1</bitWidth>
  36980. </field>
  36981. <field> <name>MR21</name>
  36982. <description>Event Mask on line 21</description>
  36983. <bitOffset>21</bitOffset>
  36984. <bitWidth>1</bitWidth>
  36985. </field>
  36986. <field> <name>MR22</name>
  36987. <description>Event Mask on line 22</description>
  36988. <bitOffset>22</bitOffset>
  36989. <bitWidth>1</bitWidth>
  36990. </field>
  36991. </fields>
  36992. </register>
  36993. <register> <name>RTSR</name>
  36994. <displayName>RTSR</displayName>
  36995. <description>Rising Trigger selection register
  36996. (EXTI_RTSR)</description>
  36997. <addressOffset>0x8</addressOffset>
  36998. <size>0x20</size>
  36999. <access>read-write</access>
  37000. <resetValue>0x00000000</resetValue>
  37001. <fields>
  37002. <field> <name>TR0</name>
  37003. <description>Rising trigger event configuration of
  37004. line 0</description>
  37005. <bitOffset>0</bitOffset>
  37006. <bitWidth>1</bitWidth>
  37007. </field>
  37008. <field> <name>TR1</name>
  37009. <description>Rising trigger event configuration of
  37010. line 1</description>
  37011. <bitOffset>1</bitOffset>
  37012. <bitWidth>1</bitWidth>
  37013. </field>
  37014. <field> <name>TR2</name>
  37015. <description>Rising trigger event configuration of
  37016. line 2</description>
  37017. <bitOffset>2</bitOffset>
  37018. <bitWidth>1</bitWidth>
  37019. </field>
  37020. <field> <name>TR3</name>
  37021. <description>Rising trigger event configuration of
  37022. line 3</description>
  37023. <bitOffset>3</bitOffset>
  37024. <bitWidth>1</bitWidth>
  37025. </field>
  37026. <field> <name>TR4</name>
  37027. <description>Rising trigger event configuration of
  37028. line 4</description>
  37029. <bitOffset>4</bitOffset>
  37030. <bitWidth>1</bitWidth>
  37031. </field>
  37032. <field> <name>TR5</name>
  37033. <description>Rising trigger event configuration of
  37034. line 5</description>
  37035. <bitOffset>5</bitOffset>
  37036. <bitWidth>1</bitWidth>
  37037. </field>
  37038. <field> <name>TR6</name>
  37039. <description>Rising trigger event configuration of
  37040. line 6</description>
  37041. <bitOffset>6</bitOffset>
  37042. <bitWidth>1</bitWidth>
  37043. </field>
  37044. <field> <name>TR7</name>
  37045. <description>Rising trigger event configuration of
  37046. line 7</description>
  37047. <bitOffset>7</bitOffset>
  37048. <bitWidth>1</bitWidth>
  37049. </field>
  37050. <field> <name>TR8</name>
  37051. <description>Rising trigger event configuration of
  37052. line 8</description>
  37053. <bitOffset>8</bitOffset>
  37054. <bitWidth>1</bitWidth>
  37055. </field>
  37056. <field> <name>TR9</name>
  37057. <description>Rising trigger event configuration of
  37058. line 9</description>
  37059. <bitOffset>9</bitOffset>
  37060. <bitWidth>1</bitWidth>
  37061. </field>
  37062. <field> <name>TR10</name>
  37063. <description>Rising trigger event configuration of
  37064. line 10</description>
  37065. <bitOffset>10</bitOffset>
  37066. <bitWidth>1</bitWidth>
  37067. </field>
  37068. <field> <name>TR11</name>
  37069. <description>Rising trigger event configuration of
  37070. line 11</description>
  37071. <bitOffset>11</bitOffset>
  37072. <bitWidth>1</bitWidth>
  37073. </field>
  37074. <field> <name>TR12</name>
  37075. <description>Rising trigger event configuration of
  37076. line 12</description>
  37077. <bitOffset>12</bitOffset>
  37078. <bitWidth>1</bitWidth>
  37079. </field>
  37080. <field> <name>TR13</name>
  37081. <description>Rising trigger event configuration of
  37082. line 13</description>
  37083. <bitOffset>13</bitOffset>
  37084. <bitWidth>1</bitWidth>
  37085. </field>
  37086. <field> <name>TR14</name>
  37087. <description>Rising trigger event configuration of
  37088. line 14</description>
  37089. <bitOffset>14</bitOffset>
  37090. <bitWidth>1</bitWidth>
  37091. </field>
  37092. <field> <name>TR15</name>
  37093. <description>Rising trigger event configuration of
  37094. line 15</description>
  37095. <bitOffset>15</bitOffset>
  37096. <bitWidth>1</bitWidth>
  37097. </field>
  37098. <field> <name>TR16</name>
  37099. <description>Rising trigger event configuration of
  37100. line 16</description>
  37101. <bitOffset>16</bitOffset>
  37102. <bitWidth>1</bitWidth>
  37103. </field>
  37104. <field> <name>TR17</name>
  37105. <description>Rising trigger event configuration of
  37106. line 17</description>
  37107. <bitOffset>17</bitOffset>
  37108. <bitWidth>1</bitWidth>
  37109. </field>
  37110. <field> <name>TR18</name>
  37111. <description>Rising trigger event configuration of
  37112. line 18</description>
  37113. <bitOffset>18</bitOffset>
  37114. <bitWidth>1</bitWidth>
  37115. </field>
  37116. <field> <name>TR19</name>
  37117. <description>Rising trigger event configuration of
  37118. line 19</description>
  37119. <bitOffset>19</bitOffset>
  37120. <bitWidth>1</bitWidth>
  37121. </field>
  37122. <field> <name>TR20</name>
  37123. <description>Rising trigger event configuration of
  37124. line 20</description>
  37125. <bitOffset>20</bitOffset>
  37126. <bitWidth>1</bitWidth>
  37127. </field>
  37128. <field> <name>TR21</name>
  37129. <description>Rising trigger event configuration of
  37130. line 21</description>
  37131. <bitOffset>21</bitOffset>
  37132. <bitWidth>1</bitWidth>
  37133. </field>
  37134. <field> <name>TR22</name>
  37135. <description>Rising trigger event configuration of
  37136. line 22</description>
  37137. <bitOffset>22</bitOffset>
  37138. <bitWidth>1</bitWidth>
  37139. </field>
  37140. </fields>
  37141. </register>
  37142. <register> <name>FTSR</name>
  37143. <displayName>FTSR</displayName>
  37144. <description>Falling Trigger selection register
  37145. (EXTI_FTSR)</description>
  37146. <addressOffset>0xC</addressOffset>
  37147. <size>0x20</size>
  37148. <access>read-write</access>
  37149. <resetValue>0x00000000</resetValue>
  37150. <fields>
  37151. <field> <name>TR0</name>
  37152. <description>Falling trigger event configuration of
  37153. line 0</description>
  37154. <bitOffset>0</bitOffset>
  37155. <bitWidth>1</bitWidth>
  37156. </field>
  37157. <field> <name>TR1</name>
  37158. <description>Falling trigger event configuration of
  37159. line 1</description>
  37160. <bitOffset>1</bitOffset>
  37161. <bitWidth>1</bitWidth>
  37162. </field>
  37163. <field> <name>TR2</name>
  37164. <description>Falling trigger event configuration of
  37165. line 2</description>
  37166. <bitOffset>2</bitOffset>
  37167. <bitWidth>1</bitWidth>
  37168. </field>
  37169. <field> <name>TR3</name>
  37170. <description>Falling trigger event configuration of
  37171. line 3</description>
  37172. <bitOffset>3</bitOffset>
  37173. <bitWidth>1</bitWidth>
  37174. </field>
  37175. <field> <name>TR4</name>
  37176. <description>Falling trigger event configuration of
  37177. line 4</description>
  37178. <bitOffset>4</bitOffset>
  37179. <bitWidth>1</bitWidth>
  37180. </field>
  37181. <field> <name>TR5</name>
  37182. <description>Falling trigger event configuration of
  37183. line 5</description>
  37184. <bitOffset>5</bitOffset>
  37185. <bitWidth>1</bitWidth>
  37186. </field>
  37187. <field> <name>TR6</name>
  37188. <description>Falling trigger event configuration of
  37189. line 6</description>
  37190. <bitOffset>6</bitOffset>
  37191. <bitWidth>1</bitWidth>
  37192. </field>
  37193. <field> <name>TR7</name>
  37194. <description>Falling trigger event configuration of
  37195. line 7</description>
  37196. <bitOffset>7</bitOffset>
  37197. <bitWidth>1</bitWidth>
  37198. </field>
  37199. <field> <name>TR8</name>
  37200. <description>Falling trigger event configuration of
  37201. line 8</description>
  37202. <bitOffset>8</bitOffset>
  37203. <bitWidth>1</bitWidth>
  37204. </field>
  37205. <field> <name>TR9</name>
  37206. <description>Falling trigger event configuration of
  37207. line 9</description>
  37208. <bitOffset>9</bitOffset>
  37209. <bitWidth>1</bitWidth>
  37210. </field>
  37211. <field> <name>TR10</name>
  37212. <description>Falling trigger event configuration of
  37213. line 10</description>
  37214. <bitOffset>10</bitOffset>
  37215. <bitWidth>1</bitWidth>
  37216. </field>
  37217. <field> <name>TR11</name>
  37218. <description>Falling trigger event configuration of
  37219. line 11</description>
  37220. <bitOffset>11</bitOffset>
  37221. <bitWidth>1</bitWidth>
  37222. </field>
  37223. <field> <name>TR12</name>
  37224. <description>Falling trigger event configuration of
  37225. line 12</description>
  37226. <bitOffset>12</bitOffset>
  37227. <bitWidth>1</bitWidth>
  37228. </field>
  37229. <field> <name>TR13</name>
  37230. <description>Falling trigger event configuration of
  37231. line 13</description>
  37232. <bitOffset>13</bitOffset>
  37233. <bitWidth>1</bitWidth>
  37234. </field>
  37235. <field> <name>TR14</name>
  37236. <description>Falling trigger event configuration of
  37237. line 14</description>
  37238. <bitOffset>14</bitOffset>
  37239. <bitWidth>1</bitWidth>
  37240. </field>
  37241. <field> <name>TR15</name>
  37242. <description>Falling trigger event configuration of
  37243. line 15</description>
  37244. <bitOffset>15</bitOffset>
  37245. <bitWidth>1</bitWidth>
  37246. </field>
  37247. <field> <name>TR16</name>
  37248. <description>Falling trigger event configuration of
  37249. line 16</description>
  37250. <bitOffset>16</bitOffset>
  37251. <bitWidth>1</bitWidth>
  37252. </field>
  37253. <field> <name>TR17</name>
  37254. <description>Falling trigger event configuration of
  37255. line 17</description>
  37256. <bitOffset>17</bitOffset>
  37257. <bitWidth>1</bitWidth>
  37258. </field>
  37259. <field> <name>TR18</name>
  37260. <description>Falling trigger event configuration of
  37261. line 18</description>
  37262. <bitOffset>18</bitOffset>
  37263. <bitWidth>1</bitWidth>
  37264. </field>
  37265. <field> <name>TR19</name>
  37266. <description>Falling trigger event configuration of
  37267. line 19</description>
  37268. <bitOffset>19</bitOffset>
  37269. <bitWidth>1</bitWidth>
  37270. </field>
  37271. <field> <name>TR20</name>
  37272. <description>Falling trigger event configuration of
  37273. line 20</description>
  37274. <bitOffset>20</bitOffset>
  37275. <bitWidth>1</bitWidth>
  37276. </field>
  37277. <field> <name>TR21</name>
  37278. <description>Falling trigger event configuration of
  37279. line 21</description>
  37280. <bitOffset>21</bitOffset>
  37281. <bitWidth>1</bitWidth>
  37282. </field>
  37283. <field> <name>TR22</name>
  37284. <description>Falling trigger event configuration of
  37285. line 22</description>
  37286. <bitOffset>22</bitOffset>
  37287. <bitWidth>1</bitWidth>
  37288. </field>
  37289. </fields>
  37290. </register>
  37291. <register> <name>SWIER</name>
  37292. <displayName>SWIER</displayName>
  37293. <description>Software interrupt event register
  37294. (EXTI_SWIER)</description>
  37295. <addressOffset>0x10</addressOffset>
  37296. <size>0x20</size>
  37297. <access>read-write</access>
  37298. <resetValue>0x00000000</resetValue>
  37299. <fields>
  37300. <field> <name>SWIER0</name>
  37301. <description>Software Interrupt on line
  37302. 0</description>
  37303. <bitOffset>0</bitOffset>
  37304. <bitWidth>1</bitWidth>
  37305. </field>
  37306. <field> <name>SWIER1</name>
  37307. <description>Software Interrupt on line
  37308. 1</description>
  37309. <bitOffset>1</bitOffset>
  37310. <bitWidth>1</bitWidth>
  37311. </field>
  37312. <field> <name>SWIER2</name>
  37313. <description>Software Interrupt on line
  37314. 2</description>
  37315. <bitOffset>2</bitOffset>
  37316. <bitWidth>1</bitWidth>
  37317. </field>
  37318. <field> <name>SWIER3</name>
  37319. <description>Software Interrupt on line
  37320. 3</description>
  37321. <bitOffset>3</bitOffset>
  37322. <bitWidth>1</bitWidth>
  37323. </field>
  37324. <field> <name>SWIER4</name>
  37325. <description>Software Interrupt on line
  37326. 4</description>
  37327. <bitOffset>4</bitOffset>
  37328. <bitWidth>1</bitWidth>
  37329. </field>
  37330. <field> <name>SWIER5</name>
  37331. <description>Software Interrupt on line
  37332. 5</description>
  37333. <bitOffset>5</bitOffset>
  37334. <bitWidth>1</bitWidth>
  37335. </field>
  37336. <field> <name>SWIER6</name>
  37337. <description>Software Interrupt on line
  37338. 6</description>
  37339. <bitOffset>6</bitOffset>
  37340. <bitWidth>1</bitWidth>
  37341. </field>
  37342. <field> <name>SWIER7</name>
  37343. <description>Software Interrupt on line
  37344. 7</description>
  37345. <bitOffset>7</bitOffset>
  37346. <bitWidth>1</bitWidth>
  37347. </field>
  37348. <field> <name>SWIER8</name>
  37349. <description>Software Interrupt on line
  37350. 8</description>
  37351. <bitOffset>8</bitOffset>
  37352. <bitWidth>1</bitWidth>
  37353. </field>
  37354. <field> <name>SWIER9</name>
  37355. <description>Software Interrupt on line
  37356. 9</description>
  37357. <bitOffset>9</bitOffset>
  37358. <bitWidth>1</bitWidth>
  37359. </field>
  37360. <field> <name>SWIER10</name>
  37361. <description>Software Interrupt on line
  37362. 10</description>
  37363. <bitOffset>10</bitOffset>
  37364. <bitWidth>1</bitWidth>
  37365. </field>
  37366. <field> <name>SWIER11</name>
  37367. <description>Software Interrupt on line
  37368. 11</description>
  37369. <bitOffset>11</bitOffset>
  37370. <bitWidth>1</bitWidth>
  37371. </field>
  37372. <field> <name>SWIER12</name>
  37373. <description>Software Interrupt on line
  37374. 12</description>
  37375. <bitOffset>12</bitOffset>
  37376. <bitWidth>1</bitWidth>
  37377. </field>
  37378. <field> <name>SWIER13</name>
  37379. <description>Software Interrupt on line
  37380. 13</description>
  37381. <bitOffset>13</bitOffset>
  37382. <bitWidth>1</bitWidth>
  37383. </field>
  37384. <field> <name>SWIER14</name>
  37385. <description>Software Interrupt on line
  37386. 14</description>
  37387. <bitOffset>14</bitOffset>
  37388. <bitWidth>1</bitWidth>
  37389. </field>
  37390. <field> <name>SWIER15</name>
  37391. <description>Software Interrupt on line
  37392. 15</description>
  37393. <bitOffset>15</bitOffset>
  37394. <bitWidth>1</bitWidth>
  37395. </field>
  37396. <field> <name>SWIER16</name>
  37397. <description>Software Interrupt on line
  37398. 16</description>
  37399. <bitOffset>16</bitOffset>
  37400. <bitWidth>1</bitWidth>
  37401. </field>
  37402. <field> <name>SWIER17</name>
  37403. <description>Software Interrupt on line
  37404. 17</description>
  37405. <bitOffset>17</bitOffset>
  37406. <bitWidth>1</bitWidth>
  37407. </field>
  37408. <field> <name>SWIER18</name>
  37409. <description>Software Interrupt on line
  37410. 18</description>
  37411. <bitOffset>18</bitOffset>
  37412. <bitWidth>1</bitWidth>
  37413. </field>
  37414. <field> <name>SWIER19</name>
  37415. <description>Software Interrupt on line
  37416. 19</description>
  37417. <bitOffset>19</bitOffset>
  37418. <bitWidth>1</bitWidth>
  37419. </field>
  37420. <field> <name>SWIER20</name>
  37421. <description>Software Interrupt on line
  37422. 20</description>
  37423. <bitOffset>20</bitOffset>
  37424. <bitWidth>1</bitWidth>
  37425. </field>
  37426. <field> <name>SWIER21</name>
  37427. <description>Software Interrupt on line
  37428. 21</description>
  37429. <bitOffset>21</bitOffset>
  37430. <bitWidth>1</bitWidth>
  37431. </field>
  37432. <field> <name>SWIER22</name>
  37433. <description>Software Interrupt on line
  37434. 22</description>
  37435. <bitOffset>22</bitOffset>
  37436. <bitWidth>1</bitWidth>
  37437. </field>
  37438. </fields>
  37439. </register>
  37440. <register> <name>PR</name>
  37441. <displayName>PR</displayName>
  37442. <description>Pending register (EXTI_PR)</description>
  37443. <addressOffset>0x14</addressOffset>
  37444. <size>0x20</size>
  37445. <access>read-write</access>
  37446. <resetValue>0x00000000</resetValue>
  37447. <fields>
  37448. <field> <name>PR0</name>
  37449. <description>Pending bit 0</description>
  37450. <bitOffset>0</bitOffset>
  37451. <bitWidth>1</bitWidth>
  37452. </field>
  37453. <field> <name>PR1</name>
  37454. <description>Pending bit 1</description>
  37455. <bitOffset>1</bitOffset>
  37456. <bitWidth>1</bitWidth>
  37457. </field>
  37458. <field> <name>PR2</name>
  37459. <description>Pending bit 2</description>
  37460. <bitOffset>2</bitOffset>
  37461. <bitWidth>1</bitWidth>
  37462. </field>
  37463. <field> <name>PR3</name>
  37464. <description>Pending bit 3</description>
  37465. <bitOffset>3</bitOffset>
  37466. <bitWidth>1</bitWidth>
  37467. </field>
  37468. <field> <name>PR4</name>
  37469. <description>Pending bit 4</description>
  37470. <bitOffset>4</bitOffset>
  37471. <bitWidth>1</bitWidth>
  37472. </field>
  37473. <field> <name>PR5</name>
  37474. <description>Pending bit 5</description>
  37475. <bitOffset>5</bitOffset>
  37476. <bitWidth>1</bitWidth>
  37477. </field>
  37478. <field> <name>PR6</name>
  37479. <description>Pending bit 6</description>
  37480. <bitOffset>6</bitOffset>
  37481. <bitWidth>1</bitWidth>
  37482. </field>
  37483. <field> <name>PR7</name>
  37484. <description>Pending bit 7</description>
  37485. <bitOffset>7</bitOffset>
  37486. <bitWidth>1</bitWidth>
  37487. </field>
  37488. <field> <name>PR8</name>
  37489. <description>Pending bit 8</description>
  37490. <bitOffset>8</bitOffset>
  37491. <bitWidth>1</bitWidth>
  37492. </field>
  37493. <field> <name>PR9</name>
  37494. <description>Pending bit 9</description>
  37495. <bitOffset>9</bitOffset>
  37496. <bitWidth>1</bitWidth>
  37497. </field>
  37498. <field> <name>PR10</name>
  37499. <description>Pending bit 10</description>
  37500. <bitOffset>10</bitOffset>
  37501. <bitWidth>1</bitWidth>
  37502. </field>
  37503. <field> <name>PR11</name>
  37504. <description>Pending bit 11</description>
  37505. <bitOffset>11</bitOffset>
  37506. <bitWidth>1</bitWidth>
  37507. </field>
  37508. <field> <name>PR12</name>
  37509. <description>Pending bit 12</description>
  37510. <bitOffset>12</bitOffset>
  37511. <bitWidth>1</bitWidth>
  37512. </field>
  37513. <field> <name>PR13</name>
  37514. <description>Pending bit 13</description>
  37515. <bitOffset>13</bitOffset>
  37516. <bitWidth>1</bitWidth>
  37517. </field>
  37518. <field> <name>PR14</name>
  37519. <description>Pending bit 14</description>
  37520. <bitOffset>14</bitOffset>
  37521. <bitWidth>1</bitWidth>
  37522. </field>
  37523. <field> <name>PR15</name>
  37524. <description>Pending bit 15</description>
  37525. <bitOffset>15</bitOffset>
  37526. <bitWidth>1</bitWidth>
  37527. </field>
  37528. <field> <name>PR16</name>
  37529. <description>Pending bit 16</description>
  37530. <bitOffset>16</bitOffset>
  37531. <bitWidth>1</bitWidth>
  37532. </field>
  37533. <field> <name>PR17</name>
  37534. <description>Pending bit 17</description>
  37535. <bitOffset>17</bitOffset>
  37536. <bitWidth>1</bitWidth>
  37537. </field>
  37538. <field> <name>PR18</name>
  37539. <description>Pending bit 18</description>
  37540. <bitOffset>18</bitOffset>
  37541. <bitWidth>1</bitWidth>
  37542. </field>
  37543. <field> <name>PR19</name>
  37544. <description>Pending bit 19</description>
  37545. <bitOffset>19</bitOffset>
  37546. <bitWidth>1</bitWidth>
  37547. </field>
  37548. <field> <name>PR20</name>
  37549. <description>Pending bit 20</description>
  37550. <bitOffset>20</bitOffset>
  37551. <bitWidth>1</bitWidth>
  37552. </field>
  37553. <field> <name>PR21</name>
  37554. <description>Pending bit 21</description>
  37555. <bitOffset>21</bitOffset>
  37556. <bitWidth>1</bitWidth>
  37557. </field>
  37558. <field> <name>PR22</name>
  37559. <description>Pending bit 22</description>
  37560. <bitOffset>22</bitOffset>
  37561. <bitWidth>1</bitWidth>
  37562. </field>
  37563. </fields>
  37564. </register>
  37565. </registers>
  37566. </peripheral>
  37567. <peripheral> <name>OTG_HS_GLOBAL</name>
  37568. <description>USB on the go high speed</description>
  37569. <groupName>USB_OTG_HS</groupName>
  37570. <baseAddress>0x40040000</baseAddress>
  37571. <addressBlock>
  37572. <offset>0x0</offset>
  37573. <size>0xFFFC0400</size>
  37574. <usage>registers</usage>
  37575. </addressBlock>
  37576. <addressBlock>
  37577. <offset>0xFFFC0400</offset>
  37578. <size>0x40000</size>
  37579. <usage>reserved</usage>
  37580. </addressBlock>
  37581. <interrupt>
  37582. <name>OTG_HS_EP1_OUT</name>
  37583. <description>USB On The Go HS End Point 1 Out global
  37584. interrupt</description>
  37585. <value>74</value>
  37586. </interrupt>
  37587. <interrupt>
  37588. <name>OTG_HS_EP1_IN</name>
  37589. <description>USB On The Go HS End Point 1 In global
  37590. interrupt</description>
  37591. <value>75</value>
  37592. </interrupt>
  37593. <interrupt>
  37594. <name>OTG_HS_WKUP</name>
  37595. <description>USB On The Go HS Wakeup through EXTI
  37596. interrupt</description>
  37597. <value>76</value>
  37598. </interrupt>
  37599. <interrupt>
  37600. <name>OTG_HS</name>
  37601. <description>USB On The Go HS global
  37602. interrupt</description>
  37603. <value>77</value>
  37604. </interrupt>
  37605. <registers>
  37606. <register> <name>OTG_HS_GOTGCTL</name>
  37607. <displayName>OTG_HS_GOTGCTL</displayName>
  37608. <description>OTG_HS control and status
  37609. register</description>
  37610. <addressOffset>0x0</addressOffset>
  37611. <size>32</size>
  37612. <resetValue>0x00000800</resetValue>
  37613. <fields>
  37614. <field> <name>SRQSCS</name>
  37615. <description>Session request success</description>
  37616. <bitOffset>0</bitOffset>
  37617. <bitWidth>1</bitWidth>
  37618. <access>read-only</access>
  37619. </field>
  37620. <field> <name>SRQ</name>
  37621. <description>Session request</description>
  37622. <bitOffset>1</bitOffset>
  37623. <bitWidth>1</bitWidth>
  37624. <access>read-write</access>
  37625. </field>
  37626. <field> <name>HNGSCS</name>
  37627. <description>Host negotiation success</description>
  37628. <bitOffset>8</bitOffset>
  37629. <bitWidth>1</bitWidth>
  37630. <access>read-only</access>
  37631. </field>
  37632. <field> <name>HNPRQ</name>
  37633. <description>HNP request</description>
  37634. <bitOffset>9</bitOffset>
  37635. <bitWidth>1</bitWidth>
  37636. <access>read-write</access>
  37637. </field>
  37638. <field> <name>HSHNPEN</name>
  37639. <description>Host set HNP enable</description>
  37640. <bitOffset>10</bitOffset>
  37641. <bitWidth>1</bitWidth>
  37642. <access>read-write</access>
  37643. </field>
  37644. <field> <name>DHNPEN</name>
  37645. <description>Device HNP enabled</description>
  37646. <bitOffset>11</bitOffset>
  37647. <bitWidth>1</bitWidth>
  37648. <access>read-write</access>
  37649. </field>
  37650. <field> <name>CIDSTS</name>
  37651. <description>Connector ID status</description>
  37652. <bitOffset>16</bitOffset>
  37653. <bitWidth>1</bitWidth>
  37654. <access>read-only</access>
  37655. </field>
  37656. <field> <name>DBCT</name>
  37657. <description>Long/short debounce time</description>
  37658. <bitOffset>17</bitOffset>
  37659. <bitWidth>1</bitWidth>
  37660. <access>read-only</access>
  37661. </field>
  37662. <field> <name>ASVLD</name>
  37663. <description>A-session valid</description>
  37664. <bitOffset>18</bitOffset>
  37665. <bitWidth>1</bitWidth>
  37666. <access>read-only</access>
  37667. </field>
  37668. <field> <name>BSVLD</name>
  37669. <description>B-session valid</description>
  37670. <bitOffset>19</bitOffset>
  37671. <bitWidth>1</bitWidth>
  37672. <access>read-only</access>
  37673. </field>
  37674. </fields>
  37675. </register>
  37676. <register> <name>OTG_HS_GOTGINT</name>
  37677. <displayName>OTG_HS_GOTGINT</displayName>
  37678. <description>OTG_HS interrupt register</description>
  37679. <addressOffset>0x4</addressOffset>
  37680. <size>32</size>
  37681. <access>read-write</access>
  37682. <resetValue>0x0</resetValue>
  37683. <fields>
  37684. <field> <name>SEDET</name>
  37685. <description>Session end detected</description>
  37686. <bitOffset>2</bitOffset>
  37687. <bitWidth>1</bitWidth>
  37688. </field>
  37689. <field> <name>SRSSCHG</name>
  37690. <description>Session request success status
  37691. change</description>
  37692. <bitOffset>8</bitOffset>
  37693. <bitWidth>1</bitWidth>
  37694. </field>
  37695. <field> <name>HNSSCHG</name>
  37696. <description>Host negotiation success status
  37697. change</description>
  37698. <bitOffset>9</bitOffset>
  37699. <bitWidth>1</bitWidth>
  37700. </field>
  37701. <field> <name>HNGDET</name>
  37702. <description>Host negotiation detected</description>
  37703. <bitOffset>17</bitOffset>
  37704. <bitWidth>1</bitWidth>
  37705. </field>
  37706. <field> <name>ADTOCHG</name>
  37707. <description>A-device timeout change</description>
  37708. <bitOffset>18</bitOffset>
  37709. <bitWidth>1</bitWidth>
  37710. </field>
  37711. <field> <name>DBCDNE</name>
  37712. <description>Debounce done</description>
  37713. <bitOffset>19</bitOffset>
  37714. <bitWidth>1</bitWidth>
  37715. </field>
  37716. </fields>
  37717. </register>
  37718. <register> <name>OTG_HS_GAHBCFG</name>
  37719. <displayName>OTG_HS_GAHBCFG</displayName>
  37720. <description>OTG_HS AHB configuration
  37721. register</description>
  37722. <addressOffset>0x8</addressOffset>
  37723. <size>32</size>
  37724. <access>read-write</access>
  37725. <resetValue>0x0</resetValue>
  37726. <fields>
  37727. <field> <name>GINT</name>
  37728. <description>Global interrupt mask</description>
  37729. <bitOffset>0</bitOffset>
  37730. <bitWidth>1</bitWidth>
  37731. </field>
  37732. <field> <name>HBSTLEN</name>
  37733. <description>Burst length/type</description>
  37734. <bitOffset>1</bitOffset>
  37735. <bitWidth>4</bitWidth>
  37736. </field>
  37737. <field> <name>DMAEN</name>
  37738. <description>DMA enable</description>
  37739. <bitOffset>5</bitOffset>
  37740. <bitWidth>1</bitWidth>
  37741. </field>
  37742. <field> <name>TXFELVL</name>
  37743. <description>TxFIFO empty level</description>
  37744. <bitOffset>7</bitOffset>
  37745. <bitWidth>1</bitWidth>
  37746. </field>
  37747. <field> <name>PTXFELVL</name>
  37748. <description>Periodic TxFIFO empty
  37749. level</description>
  37750. <bitOffset>8</bitOffset>
  37751. <bitWidth>1</bitWidth>
  37752. </field>
  37753. </fields>
  37754. </register>
  37755. <register> <name>OTG_HS_GUSBCFG</name>
  37756. <displayName>OTG_HS_GUSBCFG</displayName>
  37757. <description>OTG_HS USB configuration
  37758. register</description>
  37759. <addressOffset>0xC</addressOffset>
  37760. <size>32</size>
  37761. <resetValue>0x00000A00</resetValue>
  37762. <fields>
  37763. <field> <name>TOCAL</name>
  37764. <description>FS timeout calibration</description>
  37765. <bitOffset>0</bitOffset>
  37766. <bitWidth>3</bitWidth>
  37767. <access>read-write</access>
  37768. </field>
  37769. <field> <name>PHYSEL</name>
  37770. <description>USB 2.0 high-speed ULPI PHY or USB 1.1
  37771. full-speed serial transceiver select</description>
  37772. <bitOffset>6</bitOffset>
  37773. <bitWidth>1</bitWidth>
  37774. <access>write-only</access>
  37775. </field>
  37776. <field> <name>SRPCAP</name>
  37777. <description>SRP-capable</description>
  37778. <bitOffset>8</bitOffset>
  37779. <bitWidth>1</bitWidth>
  37780. <access>read-write</access>
  37781. </field>
  37782. <field> <name>HNPCAP</name>
  37783. <description>HNP-capable</description>
  37784. <bitOffset>9</bitOffset>
  37785. <bitWidth>1</bitWidth>
  37786. <access>read-write</access>
  37787. </field>
  37788. <field> <name>TRDT</name>
  37789. <description>USB turnaround time</description>
  37790. <bitOffset>10</bitOffset>
  37791. <bitWidth>4</bitWidth>
  37792. <access>read-write</access>
  37793. </field>
  37794. <field> <name>PHYLPCS</name>
  37795. <description>PHY Low-power clock select</description>
  37796. <bitOffset>15</bitOffset>
  37797. <bitWidth>1</bitWidth>
  37798. <access>read-write</access>
  37799. </field>
  37800. <field> <name>ULPIFSLS</name>
  37801. <description>ULPI FS/LS select</description>
  37802. <bitOffset>17</bitOffset>
  37803. <bitWidth>1</bitWidth>
  37804. <access>read-write</access>
  37805. </field>
  37806. <field> <name>ULPIAR</name>
  37807. <description>ULPI Auto-resume</description>
  37808. <bitOffset>18</bitOffset>
  37809. <bitWidth>1</bitWidth>
  37810. <access>read-write</access>
  37811. </field>
  37812. <field> <name>ULPICSM</name>
  37813. <description>ULPI Clock SuspendM</description>
  37814. <bitOffset>19</bitOffset>
  37815. <bitWidth>1</bitWidth>
  37816. <access>read-write</access>
  37817. </field>
  37818. <field> <name>ULPIEVBUSD</name>
  37819. <description>ULPI External VBUS Drive</description>
  37820. <bitOffset>20</bitOffset>
  37821. <bitWidth>1</bitWidth>
  37822. <access>read-write</access>
  37823. </field>
  37824. <field> <name>ULPIEVBUSI</name>
  37825. <description>ULPI external VBUS
  37826. indicator</description>
  37827. <bitOffset>21</bitOffset>
  37828. <bitWidth>1</bitWidth>
  37829. <access>read-write</access>
  37830. </field>
  37831. <field> <name>TSDPS</name>
  37832. <description>TermSel DLine pulsing
  37833. selection</description>
  37834. <bitOffset>22</bitOffset>
  37835. <bitWidth>1</bitWidth>
  37836. <access>read-write</access>
  37837. </field>
  37838. <field> <name>PCCI</name>
  37839. <description>Indicator complement</description>
  37840. <bitOffset>23</bitOffset>
  37841. <bitWidth>1</bitWidth>
  37842. <access>read-write</access>
  37843. </field>
  37844. <field> <name>PTCI</name>
  37845. <description>Indicator pass through</description>
  37846. <bitOffset>24</bitOffset>
  37847. <bitWidth>1</bitWidth>
  37848. <access>read-write</access>
  37849. </field>
  37850. <field> <name>ULPIIPD</name>
  37851. <description>ULPI interface protect
  37852. disable</description>
  37853. <bitOffset>25</bitOffset>
  37854. <bitWidth>1</bitWidth>
  37855. <access>read-write</access>
  37856. </field>
  37857. <field> <name>FHMOD</name>
  37858. <description>Forced host mode</description>
  37859. <bitOffset>29</bitOffset>
  37860. <bitWidth>1</bitWidth>
  37861. <access>read-write</access>
  37862. </field>
  37863. <field> <name>FDMOD</name>
  37864. <description>Forced peripheral mode</description>
  37865. <bitOffset>30</bitOffset>
  37866. <bitWidth>1</bitWidth>
  37867. <access>read-write</access>
  37868. </field>
  37869. <field> <name>CTXPKT</name>
  37870. <description>Corrupt Tx packet</description>
  37871. <bitOffset>31</bitOffset>
  37872. <bitWidth>1</bitWidth>
  37873. <access>read-write</access>
  37874. </field>
  37875. </fields>
  37876. </register>
  37877. <register> <name>OTG_HS_GRSTCTL</name>
  37878. <displayName>OTG_HS_GRSTCTL</displayName>
  37879. <description>OTG_HS reset register</description>
  37880. <addressOffset>0x10</addressOffset>
  37881. <size>32</size>
  37882. <resetValue>0x20000000</resetValue>
  37883. <fields>
  37884. <field> <name>CSRST</name>
  37885. <description>Core soft reset</description>
  37886. <bitOffset>0</bitOffset>
  37887. <bitWidth>1</bitWidth>
  37888. <access>read-write</access>
  37889. </field>
  37890. <field> <name>HSRST</name>
  37891. <description>HCLK soft reset</description>
  37892. <bitOffset>1</bitOffset>
  37893. <bitWidth>1</bitWidth>
  37894. <access>read-write</access>
  37895. </field>
  37896. <field> <name>FCRST</name>
  37897. <description>Host frame counter reset</description>
  37898. <bitOffset>2</bitOffset>
  37899. <bitWidth>1</bitWidth>
  37900. <access>read-write</access>
  37901. </field>
  37902. <field> <name>RXFFLSH</name>
  37903. <description>RxFIFO flush</description>
  37904. <bitOffset>4</bitOffset>
  37905. <bitWidth>1</bitWidth>
  37906. <access>read-write</access>
  37907. </field>
  37908. <field> <name>TXFFLSH</name>
  37909. <description>TxFIFO flush</description>
  37910. <bitOffset>5</bitOffset>
  37911. <bitWidth>1</bitWidth>
  37912. <access>read-write</access>
  37913. </field>
  37914. <field> <name>TXFNUM</name>
  37915. <description>TxFIFO number</description>
  37916. <bitOffset>6</bitOffset>
  37917. <bitWidth>5</bitWidth>
  37918. <access>read-write</access>
  37919. </field>
  37920. <field> <name>DMAREQ</name>
  37921. <description>DMA request signal</description>
  37922. <bitOffset>30</bitOffset>
  37923. <bitWidth>1</bitWidth>
  37924. <access>read-only</access>
  37925. </field>
  37926. <field> <name>AHBIDL</name>
  37927. <description>AHB master idle</description>
  37928. <bitOffset>31</bitOffset>
  37929. <bitWidth>1</bitWidth>
  37930. <access>read-only</access>
  37931. </field>
  37932. </fields>
  37933. </register>
  37934. <register> <name>OTG_HS_GINTSTS</name>
  37935. <displayName>OTG_HS_GINTSTS</displayName>
  37936. <description>OTG_HS core interrupt register</description>
  37937. <addressOffset>0x14</addressOffset>
  37938. <size>32</size>
  37939. <resetValue>0x04000020</resetValue>
  37940. <fields>
  37941. <field> <name>CMOD</name>
  37942. <description>Current mode of operation</description>
  37943. <bitOffset>0</bitOffset>
  37944. <bitWidth>1</bitWidth>
  37945. <access>read-only</access>
  37946. </field>
  37947. <field> <name>MMIS</name>
  37948. <description>Mode mismatch interrupt</description>
  37949. <bitOffset>1</bitOffset>
  37950. <bitWidth>1</bitWidth>
  37951. <access>read-write</access>
  37952. </field>
  37953. <field> <name>OTGINT</name>
  37954. <description>OTG interrupt</description>
  37955. <bitOffset>2</bitOffset>
  37956. <bitWidth>1</bitWidth>
  37957. <access>read-only</access>
  37958. </field>
  37959. <field> <name>SOF</name>
  37960. <description>Start of frame</description>
  37961. <bitOffset>3</bitOffset>
  37962. <bitWidth>1</bitWidth>
  37963. <access>read-write</access>
  37964. </field>
  37965. <field> <name>RXFLVL</name>
  37966. <description>RxFIFO nonempty</description>
  37967. <bitOffset>4</bitOffset>
  37968. <bitWidth>1</bitWidth>
  37969. <access>read-only</access>
  37970. </field>
  37971. <field> <name>NPTXFE</name>
  37972. <description>Nonperiodic TxFIFO empty</description>
  37973. <bitOffset>5</bitOffset>
  37974. <bitWidth>1</bitWidth>
  37975. <access>read-only</access>
  37976. </field>
  37977. <field> <name>GINAKEFF</name>
  37978. <description>Global IN nonperiodic NAK
  37979. effective</description>
  37980. <bitOffset>6</bitOffset>
  37981. <bitWidth>1</bitWidth>
  37982. <access>read-only</access>
  37983. </field>
  37984. <field> <name>BOUTNAKEFF</name>
  37985. <description>Global OUT NAK effective</description>
  37986. <bitOffset>7</bitOffset>
  37987. <bitWidth>1</bitWidth>
  37988. <access>read-only</access>
  37989. </field>
  37990. <field> <name>ESUSP</name>
  37991. <description>Early suspend</description>
  37992. <bitOffset>10</bitOffset>
  37993. <bitWidth>1</bitWidth>
  37994. <access>read-write</access>
  37995. </field>
  37996. <field> <name>USBSUSP</name>
  37997. <description>USB suspend</description>
  37998. <bitOffset>11</bitOffset>
  37999. <bitWidth>1</bitWidth>
  38000. <access>read-write</access>
  38001. </field>
  38002. <field> <name>USBRST</name>
  38003. <description>USB reset</description>
  38004. <bitOffset>12</bitOffset>
  38005. <bitWidth>1</bitWidth>
  38006. <access>read-write</access>
  38007. </field>
  38008. <field> <name>ENUMDNE</name>
  38009. <description>Enumeration done</description>
  38010. <bitOffset>13</bitOffset>
  38011. <bitWidth>1</bitWidth>
  38012. <access>read-write</access>
  38013. </field>
  38014. <field> <name>ISOODRP</name>
  38015. <description>Isochronous OUT packet dropped
  38016. interrupt</description>
  38017. <bitOffset>14</bitOffset>
  38018. <bitWidth>1</bitWidth>
  38019. <access>read-write</access>
  38020. </field>
  38021. <field> <name>EOPF</name>
  38022. <description>End of periodic frame
  38023. interrupt</description>
  38024. <bitOffset>15</bitOffset>
  38025. <bitWidth>1</bitWidth>
  38026. <access>read-write</access>
  38027. </field>
  38028. <field> <name>IEPINT</name>
  38029. <description>IN endpoint interrupt</description>
  38030. <bitOffset>18</bitOffset>
  38031. <bitWidth>1</bitWidth>
  38032. <access>read-only</access>
  38033. </field>
  38034. <field> <name>OEPINT</name>
  38035. <description>OUT endpoint interrupt</description>
  38036. <bitOffset>19</bitOffset>
  38037. <bitWidth>1</bitWidth>
  38038. <access>read-only</access>
  38039. </field>
  38040. <field> <name>IISOIXFR</name>
  38041. <description>Incomplete isochronous IN
  38042. transfer</description>
  38043. <bitOffset>20</bitOffset>
  38044. <bitWidth>1</bitWidth>
  38045. <access>read-write</access>
  38046. </field>
  38047. <field> <name>PXFR_INCOMPISOOUT</name>
  38048. <description>Incomplete periodic
  38049. transfer</description>
  38050. <bitOffset>21</bitOffset>
  38051. <bitWidth>1</bitWidth>
  38052. <access>read-write</access>
  38053. </field>
  38054. <field> <name>DATAFSUSP</name>
  38055. <description>Data fetch suspended</description>
  38056. <bitOffset>22</bitOffset>
  38057. <bitWidth>1</bitWidth>
  38058. <access>read-write</access>
  38059. </field>
  38060. <field> <name>HPRTINT</name>
  38061. <description>Host port interrupt</description>
  38062. <bitOffset>24</bitOffset>
  38063. <bitWidth>1</bitWidth>
  38064. <access>read-only</access>
  38065. </field>
  38066. <field> <name>HCINT</name>
  38067. <description>Host channels interrupt</description>
  38068. <bitOffset>25</bitOffset>
  38069. <bitWidth>1</bitWidth>
  38070. <access>read-only</access>
  38071. </field>
  38072. <field> <name>PTXFE</name>
  38073. <description>Periodic TxFIFO empty</description>
  38074. <bitOffset>26</bitOffset>
  38075. <bitWidth>1</bitWidth>
  38076. <access>read-only</access>
  38077. </field>
  38078. <field> <name>CIDSCHG</name>
  38079. <description>Connector ID status change</description>
  38080. <bitOffset>28</bitOffset>
  38081. <bitWidth>1</bitWidth>
  38082. <access>read-write</access>
  38083. </field>
  38084. <field> <name>DISCINT</name>
  38085. <description>Disconnect detected
  38086. interrupt</description>
  38087. <bitOffset>29</bitOffset>
  38088. <bitWidth>1</bitWidth>
  38089. <access>read-write</access>
  38090. </field>
  38091. <field> <name>SRQINT</name>
  38092. <description>Session request/new session detected
  38093. interrupt</description>
  38094. <bitOffset>30</bitOffset>
  38095. <bitWidth>1</bitWidth>
  38096. <access>read-write</access>
  38097. </field>
  38098. <field> <name>WKUINT</name>
  38099. <description>Resume/remote wakeup detected
  38100. interrupt</description>
  38101. <bitOffset>31</bitOffset>
  38102. <bitWidth>1</bitWidth>
  38103. <access>read-write</access>
  38104. </field>
  38105. </fields>
  38106. </register>
  38107. <register> <name>OTG_HS_GINTMSK</name>
  38108. <displayName>OTG_HS_GINTMSK</displayName>
  38109. <description>OTG_HS interrupt mask register</description>
  38110. <addressOffset>0x18</addressOffset>
  38111. <size>32</size>
  38112. <resetValue>0x0</resetValue>
  38113. <fields>
  38114. <field> <name>MMISM</name>
  38115. <description>Mode mismatch interrupt
  38116. mask</description>
  38117. <bitOffset>1</bitOffset>
  38118. <bitWidth>1</bitWidth>
  38119. <access>read-write</access>
  38120. </field>
  38121. <field> <name>OTGINT</name>
  38122. <description>OTG interrupt mask</description>
  38123. <bitOffset>2</bitOffset>
  38124. <bitWidth>1</bitWidth>
  38125. <access>read-write</access>
  38126. </field>
  38127. <field> <name>SOFM</name>
  38128. <description>Start of frame mask</description>
  38129. <bitOffset>3</bitOffset>
  38130. <bitWidth>1</bitWidth>
  38131. <access>read-write</access>
  38132. </field>
  38133. <field> <name>RXFLVLM</name>
  38134. <description>Receive FIFO nonempty mask</description>
  38135. <bitOffset>4</bitOffset>
  38136. <bitWidth>1</bitWidth>
  38137. <access>read-write</access>
  38138. </field>
  38139. <field> <name>NPTXFEM</name>
  38140. <description>Nonperiodic TxFIFO empty
  38141. mask</description>
  38142. <bitOffset>5</bitOffset>
  38143. <bitWidth>1</bitWidth>
  38144. <access>read-write</access>
  38145. </field>
  38146. <field> <name>GINAKEFFM</name>
  38147. <description>Global nonperiodic IN NAK effective
  38148. mask</description>
  38149. <bitOffset>6</bitOffset>
  38150. <bitWidth>1</bitWidth>
  38151. <access>read-write</access>
  38152. </field>
  38153. <field> <name>GONAKEFFM</name>
  38154. <description>Global OUT NAK effective
  38155. mask</description>
  38156. <bitOffset>7</bitOffset>
  38157. <bitWidth>1</bitWidth>
  38158. <access>read-write</access>
  38159. </field>
  38160. <field> <name>ESUSPM</name>
  38161. <description>Early suspend mask</description>
  38162. <bitOffset>10</bitOffset>
  38163. <bitWidth>1</bitWidth>
  38164. <access>read-write</access>
  38165. </field>
  38166. <field> <name>USBSUSPM</name>
  38167. <description>USB suspend mask</description>
  38168. <bitOffset>11</bitOffset>
  38169. <bitWidth>1</bitWidth>
  38170. <access>read-write</access>
  38171. </field>
  38172. <field> <name>USBRST</name>
  38173. <description>USB reset mask</description>
  38174. <bitOffset>12</bitOffset>
  38175. <bitWidth>1</bitWidth>
  38176. <access>read-write</access>
  38177. </field>
  38178. <field> <name>ENUMDNEM</name>
  38179. <description>Enumeration done mask</description>
  38180. <bitOffset>13</bitOffset>
  38181. <bitWidth>1</bitWidth>
  38182. <access>read-write</access>
  38183. </field>
  38184. <field> <name>ISOODRPM</name>
  38185. <description>Isochronous OUT packet dropped interrupt
  38186. mask</description>
  38187. <bitOffset>14</bitOffset>
  38188. <bitWidth>1</bitWidth>
  38189. <access>read-write</access>
  38190. </field>
  38191. <field> <name>EOPFM</name>
  38192. <description>End of periodic frame interrupt
  38193. mask</description>
  38194. <bitOffset>15</bitOffset>
  38195. <bitWidth>1</bitWidth>
  38196. <access>read-write</access>
  38197. </field>
  38198. <field> <name>EPMISM</name>
  38199. <description>Endpoint mismatch interrupt
  38200. mask</description>
  38201. <bitOffset>17</bitOffset>
  38202. <bitWidth>1</bitWidth>
  38203. <access>read-write</access>
  38204. </field>
  38205. <field> <name>IEPINT</name>
  38206. <description>IN endpoints interrupt
  38207. mask</description>
  38208. <bitOffset>18</bitOffset>
  38209. <bitWidth>1</bitWidth>
  38210. <access>read-write</access>
  38211. </field>
  38212. <field> <name>OEPINT</name>
  38213. <description>OUT endpoints interrupt
  38214. mask</description>
  38215. <bitOffset>19</bitOffset>
  38216. <bitWidth>1</bitWidth>
  38217. <access>read-write</access>
  38218. </field>
  38219. <field> <name>IISOIXFRM</name>
  38220. <description>Incomplete isochronous IN transfer
  38221. mask</description>
  38222. <bitOffset>20</bitOffset>
  38223. <bitWidth>1</bitWidth>
  38224. <access>read-write</access>
  38225. </field>
  38226. <field> <name>PXFRM_IISOOXFRM</name>
  38227. <description>Incomplete periodic transfer
  38228. mask</description>
  38229. <bitOffset>21</bitOffset>
  38230. <bitWidth>1</bitWidth>
  38231. <access>read-write</access>
  38232. </field>
  38233. <field> <name>FSUSPM</name>
  38234. <description>Data fetch suspended mask</description>
  38235. <bitOffset>22</bitOffset>
  38236. <bitWidth>1</bitWidth>
  38237. <access>read-write</access>
  38238. </field>
  38239. <field> <name>PRTIM</name>
  38240. <description>Host port interrupt mask</description>
  38241. <bitOffset>24</bitOffset>
  38242. <bitWidth>1</bitWidth>
  38243. <access>read-only</access>
  38244. </field>
  38245. <field> <name>HCIM</name>
  38246. <description>Host channels interrupt
  38247. mask</description>
  38248. <bitOffset>25</bitOffset>
  38249. <bitWidth>1</bitWidth>
  38250. <access>read-write</access>
  38251. </field>
  38252. <field> <name>PTXFEM</name>
  38253. <description>Periodic TxFIFO empty mask</description>
  38254. <bitOffset>26</bitOffset>
  38255. <bitWidth>1</bitWidth>
  38256. <access>read-write</access>
  38257. </field>
  38258. <field> <name>CIDSCHGM</name>
  38259. <description>Connector ID status change
  38260. mask</description>
  38261. <bitOffset>28</bitOffset>
  38262. <bitWidth>1</bitWidth>
  38263. <access>read-write</access>
  38264. </field>
  38265. <field> <name>DISCINT</name>
  38266. <description>Disconnect detected interrupt
  38267. mask</description>
  38268. <bitOffset>29</bitOffset>
  38269. <bitWidth>1</bitWidth>
  38270. <access>read-write</access>
  38271. </field>
  38272. <field> <name>SRQIM</name>
  38273. <description>Session request/new session detected
  38274. interrupt mask</description>
  38275. <bitOffset>30</bitOffset>
  38276. <bitWidth>1</bitWidth>
  38277. <access>read-write</access>
  38278. </field>
  38279. <field> <name>WUIM</name>
  38280. <description>Resume/remote wakeup detected interrupt
  38281. mask</description>
  38282. <bitOffset>31</bitOffset>
  38283. <bitWidth>1</bitWidth>
  38284. <access>read-write</access>
  38285. </field>
  38286. </fields>
  38287. </register>
  38288. <register> <name>OTG_HS_GRXSTSR_Host</name>
  38289. <displayName>OTG_HS_GRXSTSR_Host</displayName>
  38290. <description>OTG_HS Receive status debug read register
  38291. (host mode)</description>
  38292. <addressOffset>0x1C</addressOffset>
  38293. <size>32</size>
  38294. <access>read-only</access>
  38295. <resetValue>0x0</resetValue>
  38296. <fields>
  38297. <field> <name>CHNUM</name>
  38298. <description>Channel number</description>
  38299. <bitOffset>0</bitOffset>
  38300. <bitWidth>4</bitWidth>
  38301. </field>
  38302. <field> <name>BCNT</name>
  38303. <description>Byte count</description>
  38304. <bitOffset>4</bitOffset>
  38305. <bitWidth>11</bitWidth>
  38306. </field>
  38307. <field> <name>DPID</name>
  38308. <description>Data PID</description>
  38309. <bitOffset>15</bitOffset>
  38310. <bitWidth>2</bitWidth>
  38311. </field>
  38312. <field> <name>PKTSTS</name>
  38313. <description>Packet status</description>
  38314. <bitOffset>17</bitOffset>
  38315. <bitWidth>4</bitWidth>
  38316. </field>
  38317. </fields>
  38318. </register>
  38319. <register> <name>OTG_HS_GRXSTSP_Host</name>
  38320. <displayName>OTG_HS_GRXSTSP_Host</displayName>
  38321. <description>OTG_HS status read and pop register (host
  38322. mode)</description>
  38323. <addressOffset>0x20</addressOffset>
  38324. <size>32</size>
  38325. <access>read-only</access>
  38326. <resetValue>0x0</resetValue>
  38327. <fields>
  38328. <field> <name>CHNUM</name>
  38329. <description>Channel number</description>
  38330. <bitOffset>0</bitOffset>
  38331. <bitWidth>4</bitWidth>
  38332. </field>
  38333. <field> <name>BCNT</name>
  38334. <description>Byte count</description>
  38335. <bitOffset>4</bitOffset>
  38336. <bitWidth>11</bitWidth>
  38337. </field>
  38338. <field> <name>DPID</name>
  38339. <description>Data PID</description>
  38340. <bitOffset>15</bitOffset>
  38341. <bitWidth>2</bitWidth>
  38342. </field>
  38343. <field> <name>PKTSTS</name>
  38344. <description>Packet status</description>
  38345. <bitOffset>17</bitOffset>
  38346. <bitWidth>4</bitWidth>
  38347. </field>
  38348. </fields>
  38349. </register>
  38350. <register> <name>OTG_HS_GRXFSIZ</name>
  38351. <displayName>OTG_HS_GRXFSIZ</displayName>
  38352. <description>OTG_HS Receive FIFO size
  38353. register</description>
  38354. <addressOffset>0x24</addressOffset>
  38355. <size>32</size>
  38356. <access>read-write</access>
  38357. <resetValue>0x00000200</resetValue>
  38358. <fields>
  38359. <field> <name>RXFD</name>
  38360. <description>RxFIFO depth</description>
  38361. <bitOffset>0</bitOffset>
  38362. <bitWidth>16</bitWidth>
  38363. </field>
  38364. </fields>
  38365. </register>
  38366. <register> <name>OTG_HS_GNPTXFSIZ_Host</name>
  38367. <displayName>OTG_HS_GNPTXFSIZ_Host</displayName>
  38368. <description>OTG_HS nonperiodic transmit FIFO size
  38369. register (host mode)</description>
  38370. <addressOffset>0x28</addressOffset>
  38371. <size>32</size>
  38372. <access>read-write</access>
  38373. <resetValue>0x00000200</resetValue>
  38374. <fields>
  38375. <field> <name>NPTXFSA</name>
  38376. <description>Nonperiodic transmit RAM start
  38377. address</description>
  38378. <bitOffset>0</bitOffset>
  38379. <bitWidth>16</bitWidth>
  38380. </field>
  38381. <field> <name>NPTXFD</name>
  38382. <description>Nonperiodic TxFIFO depth</description>
  38383. <bitOffset>16</bitOffset>
  38384. <bitWidth>16</bitWidth>
  38385. </field>
  38386. </fields>
  38387. </register>
  38388. <register> <name>OTG_HS_TX0FSIZ_Peripheral</name>
  38389. <displayName>OTG_HS_TX0FSIZ_Peripheral</displayName>
  38390. <description>Endpoint 0 transmit FIFO size (peripheral
  38391. mode)</description>
  38392. <alternateRegister>OTG_HS_GNPTXFSIZ_Host</alternateRegister>
  38393. <addressOffset>0x28</addressOffset>
  38394. <size>32</size>
  38395. <access>read-write</access>
  38396. <resetValue>0x00000200</resetValue>
  38397. <fields>
  38398. <field> <name>TX0FSA</name>
  38399. <description>Endpoint 0 transmit RAM start
  38400. address</description>
  38401. <bitOffset>0</bitOffset>
  38402. <bitWidth>16</bitWidth>
  38403. </field>
  38404. <field> <name>TX0FD</name>
  38405. <description>Endpoint 0 TxFIFO depth</description>
  38406. <bitOffset>16</bitOffset>
  38407. <bitWidth>16</bitWidth>
  38408. </field>
  38409. </fields>
  38410. </register>
  38411. <register> <name>OTG_HS_GNPTXSTS</name>
  38412. <displayName>OTG_HS_GNPTXSTS</displayName>
  38413. <description>OTG_HS nonperiodic transmit FIFO/queue
  38414. status register</description>
  38415. <addressOffset>0x2C</addressOffset>
  38416. <size>32</size>
  38417. <access>read-only</access>
  38418. <resetValue>0x00080200</resetValue>
  38419. <fields>
  38420. <field> <name>NPTXFSAV</name>
  38421. <description>Nonperiodic TxFIFO space
  38422. available</description>
  38423. <bitOffset>0</bitOffset>
  38424. <bitWidth>16</bitWidth>
  38425. </field>
  38426. <field> <name>NPTQXSAV</name>
  38427. <description>Nonperiodic transmit request queue space
  38428. available</description>
  38429. <bitOffset>16</bitOffset>
  38430. <bitWidth>8</bitWidth>
  38431. </field>
  38432. <field> <name>NPTXQTOP</name>
  38433. <description>Top of the nonperiodic transmit request
  38434. queue</description>
  38435. <bitOffset>24</bitOffset>
  38436. <bitWidth>7</bitWidth>
  38437. </field>
  38438. </fields>
  38439. </register>
  38440. <register> <name>OTG_HS_GCCFG</name>
  38441. <displayName>OTG_HS_GCCFG</displayName>
  38442. <description>OTG_HS general core configuration
  38443. register</description>
  38444. <addressOffset>0x38</addressOffset>
  38445. <size>32</size>
  38446. <access>read-write</access>
  38447. <resetValue>0x0</resetValue>
  38448. <fields>
  38449. <field> <name>PWRDWN</name>
  38450. <description>Power down</description>
  38451. <bitOffset>16</bitOffset>
  38452. <bitWidth>1</bitWidth>
  38453. </field>
  38454. <field> <name>I2CPADEN</name>
  38455. <description>Enable I2C bus connection for the
  38456. external I2C PHY interface</description>
  38457. <bitOffset>17</bitOffset>
  38458. <bitWidth>1</bitWidth>
  38459. </field>
  38460. <field> <name>VBUSASEN</name>
  38461. <description>Enable the VBUS sensing
  38462. device</description>
  38463. <bitOffset>18</bitOffset>
  38464. <bitWidth>1</bitWidth>
  38465. </field>
  38466. <field> <name>VBUSBSEN</name>
  38467. <description>Enable the VBUS sensing device</description>
  38468. <bitOffset>19</bitOffset>
  38469. <bitWidth>1</bitWidth>
  38470. </field>
  38471. <field> <name>SOFOUTEN</name>
  38472. <description>SOF output enable</description>
  38473. <bitOffset>20</bitOffset>
  38474. <bitWidth>1</bitWidth>
  38475. </field>
  38476. <field> <name>NOVBUSSENS</name>
  38477. <description>VBUS sensing disable
  38478. option</description>
  38479. <bitOffset>21</bitOffset>
  38480. <bitWidth>1</bitWidth>
  38481. </field>
  38482. </fields>
  38483. </register>
  38484. <register> <name>OTG_HS_CID</name>
  38485. <displayName>OTG_HS_CID</displayName>
  38486. <description>OTG_HS core ID register</description>
  38487. <addressOffset>0x3C</addressOffset>
  38488. <size>32</size>
  38489. <access>read-write</access>
  38490. <resetValue>0x00001200</resetValue>
  38491. <fields>
  38492. <field> <name>PRODUCT_ID</name>
  38493. <description>Product ID field</description>
  38494. <bitOffset>0</bitOffset>
  38495. <bitWidth>32</bitWidth>
  38496. </field>
  38497. </fields>
  38498. </register>
  38499. <register> <name>OTG_HS_HPTXFSIZ</name>
  38500. <displayName>OTG_HS_HPTXFSIZ</displayName>
  38501. <description>OTG_HS Host periodic transmit FIFO size
  38502. register</description>
  38503. <addressOffset>0x100</addressOffset>
  38504. <size>32</size>
  38505. <access>read-write</access>
  38506. <resetValue>0x02000600</resetValue>
  38507. <fields>
  38508. <field> <name>PTXSA</name>
  38509. <description>Host periodic TxFIFO start
  38510. address</description>
  38511. <bitOffset>0</bitOffset>
  38512. <bitWidth>16</bitWidth>
  38513. </field>
  38514. <field> <name>PTXFD</name>
  38515. <description>Host periodic TxFIFO depth</description>
  38516. <bitOffset>16</bitOffset>
  38517. <bitWidth>16</bitWidth>
  38518. </field>
  38519. </fields>
  38520. </register>
  38521. <register> <name>OTG_HS_DIEPTXF1</name>
  38522. <displayName>OTG_HS_DIEPTXF1</displayName>
  38523. <description>OTG_HS device IN endpoint transmit FIFO size
  38524. register</description>
  38525. <addressOffset>0x104</addressOffset>
  38526. <size>32</size>
  38527. <access>read-write</access>
  38528. <resetValue>0x02000400</resetValue>
  38529. <fields>
  38530. <field> <name>INEPTXSA</name>
  38531. <description>IN endpoint FIFOx transmit RAM start
  38532. address</description>
  38533. <bitOffset>0</bitOffset>
  38534. <bitWidth>16</bitWidth>
  38535. </field>
  38536. <field> <name>INEPTXFD</name>
  38537. <description>IN endpoint TxFIFO depth</description>
  38538. <bitOffset>16</bitOffset>
  38539. <bitWidth>16</bitWidth>
  38540. </field>
  38541. </fields>
  38542. </register>
  38543. <register> <name>OTG_HS_DIEPTXF2</name>
  38544. <displayName>OTG_HS_DIEPTXF2</displayName>
  38545. <description>OTG_HS device IN endpoint transmit FIFO size
  38546. register</description>
  38547. <addressOffset>0x108</addressOffset>
  38548. <size>32</size>
  38549. <access>read-write</access>
  38550. <resetValue>0x02000400</resetValue>
  38551. <fields>
  38552. <field> <name>INEPTXSA</name>
  38553. <description>IN endpoint FIFOx transmit RAM start
  38554. address</description>
  38555. <bitOffset>0</bitOffset>
  38556. <bitWidth>16</bitWidth>
  38557. </field>
  38558. <field> <name>INEPTXFD</name>
  38559. <description>IN endpoint TxFIFO depth</description>
  38560. <bitOffset>16</bitOffset>
  38561. <bitWidth>16</bitWidth>
  38562. </field>
  38563. </fields>
  38564. </register>
  38565. <register> <name>OTG_HS_DIEPTXF3</name>
  38566. <displayName>OTG_HS_DIEPTXF3</displayName>
  38567. <description>OTG_HS device IN endpoint transmit FIFO size
  38568. register</description>
  38569. <addressOffset>0x11C</addressOffset>
  38570. <size>32</size>
  38571. <access>read-write</access>
  38572. <resetValue>0x02000400</resetValue>
  38573. <fields>
  38574. <field> <name>INEPTXSA</name>
  38575. <description>IN endpoint FIFOx transmit RAM start
  38576. address</description>
  38577. <bitOffset>0</bitOffset>
  38578. <bitWidth>16</bitWidth>
  38579. </field>
  38580. <field> <name>INEPTXFD</name>
  38581. <description>IN endpoint TxFIFO depth</description>
  38582. <bitOffset>16</bitOffset>
  38583. <bitWidth>16</bitWidth>
  38584. </field>
  38585. </fields>
  38586. </register>
  38587. <register> <name>OTG_HS_DIEPTXF4</name>
  38588. <displayName>OTG_HS_DIEPTXF4</displayName>
  38589. <description>OTG_HS device IN endpoint transmit FIFO size
  38590. register</description>
  38591. <addressOffset>0x120</addressOffset>
  38592. <size>32</size>
  38593. <access>read-write</access>
  38594. <resetValue>0x02000400</resetValue>
  38595. <fields>
  38596. <field> <name>INEPTXSA</name>
  38597. <description>IN endpoint FIFOx transmit RAM start
  38598. address</description>
  38599. <bitOffset>0</bitOffset>
  38600. <bitWidth>16</bitWidth>
  38601. </field>
  38602. <field> <name>INEPTXFD</name>
  38603. <description>IN endpoint TxFIFO depth</description>
  38604. <bitOffset>16</bitOffset>
  38605. <bitWidth>16</bitWidth>
  38606. </field>
  38607. </fields>
  38608. </register>
  38609. <register> <name>OTG_HS_DIEPTXF5</name>
  38610. <displayName>OTG_HS_DIEPTXF5</displayName>
  38611. <description>OTG_HS device IN endpoint transmit FIFO size
  38612. register</description>
  38613. <addressOffset>0x124</addressOffset>
  38614. <size>32</size>
  38615. <access>read-write</access>
  38616. <resetValue>0x02000400</resetValue>
  38617. <fields>
  38618. <field> <name>INEPTXSA</name>
  38619. <description>IN endpoint FIFOx transmit RAM start
  38620. address</description>
  38621. <bitOffset>0</bitOffset>
  38622. <bitWidth>16</bitWidth>
  38623. </field>
  38624. <field> <name>INEPTXFD</name>
  38625. <description>IN endpoint TxFIFO depth</description>
  38626. <bitOffset>16</bitOffset>
  38627. <bitWidth>16</bitWidth>
  38628. </field>
  38629. </fields>
  38630. </register>
  38631. <register> <name>OTG_HS_DIEPTXF6</name>
  38632. <displayName>OTG_HS_DIEPTXF6</displayName>
  38633. <description>OTG_HS device IN endpoint transmit FIFO size
  38634. register</description>
  38635. <addressOffset>0x128</addressOffset>
  38636. <size>32</size>
  38637. <access>read-write</access>
  38638. <resetValue>0x02000400</resetValue>
  38639. <fields>
  38640. <field> <name>INEPTXSA</name>
  38641. <description>IN endpoint FIFOx transmit RAM start
  38642. address</description>
  38643. <bitOffset>0</bitOffset>
  38644. <bitWidth>16</bitWidth>
  38645. </field>
  38646. <field> <name>INEPTXFD</name>
  38647. <description>IN endpoint TxFIFO depth</description>
  38648. <bitOffset>16</bitOffset>
  38649. <bitWidth>16</bitWidth>
  38650. </field>
  38651. </fields>
  38652. </register>
  38653. <register> <name>OTG_HS_DIEPTXF7</name>
  38654. <displayName>OTG_HS_DIEPTXF7</displayName>
  38655. <description>OTG_HS device IN endpoint transmit FIFO size
  38656. register</description>
  38657. <addressOffset>0x12C</addressOffset>
  38658. <size>32</size>
  38659. <access>read-write</access>
  38660. <resetValue>0x02000400</resetValue>
  38661. <fields>
  38662. <field> <name>INEPTXSA</name>
  38663. <description>IN endpoint FIFOx transmit RAM start
  38664. address</description>
  38665. <bitOffset>0</bitOffset>
  38666. <bitWidth>16</bitWidth>
  38667. </field>
  38668. <field> <name>INEPTXFD</name>
  38669. <description>IN endpoint TxFIFO depth</description>
  38670. <bitOffset>16</bitOffset>
  38671. <bitWidth>16</bitWidth>
  38672. </field>
  38673. </fields>
  38674. </register>
  38675. <register> <name>OTG_HS_GRXSTSR_Peripheral</name>
  38676. <displayName>OTG_HS_GRXSTSR_Peripheral</displayName>
  38677. <description>OTG_HS Receive status debug read register
  38678. (peripheral mode mode)</description>
  38679. <alternateRegister>OTG_HS_GRXSTSR_Host</alternateRegister>
  38680. <addressOffset>0x1C</addressOffset>
  38681. <size>32</size>
  38682. <access>read-only</access>
  38683. <resetValue>0x0</resetValue>
  38684. <fields>
  38685. <field> <name>EPNUM</name>
  38686. <description>Endpoint number</description>
  38687. <bitOffset>0</bitOffset>
  38688. <bitWidth>4</bitWidth>
  38689. </field>
  38690. <field> <name>BCNT</name>
  38691. <description>Byte count</description>
  38692. <bitOffset>4</bitOffset>
  38693. <bitWidth>11</bitWidth>
  38694. </field>
  38695. <field> <name>DPID</name>
  38696. <description>Data PID</description>
  38697. <bitOffset>15</bitOffset>
  38698. <bitWidth>2</bitWidth>
  38699. </field>
  38700. <field> <name>PKTSTS</name>
  38701. <description>Packet status</description>
  38702. <bitOffset>17</bitOffset>
  38703. <bitWidth>4</bitWidth>
  38704. </field>
  38705. <field> <name>FRMNUM</name>
  38706. <description>Frame number</description>
  38707. <bitOffset>21</bitOffset>
  38708. <bitWidth>4</bitWidth>
  38709. </field>
  38710. </fields>
  38711. </register>
  38712. <register> <name>OTG_HS_GRXSTSP_Peripheral</name>
  38713. <displayName>OTG_HS_GRXSTSP_Peripheral</displayName>
  38714. <description>OTG_HS status read and pop register
  38715. (peripheral mode)</description>
  38716. <alternateRegister>OTG_HS_GRXSTSP_Host</alternateRegister>
  38717. <addressOffset>0x20</addressOffset>
  38718. <size>32</size>
  38719. <access>read-only</access>
  38720. <resetValue>0x0</resetValue>
  38721. <fields>
  38722. <field> <name>EPNUM</name>
  38723. <description>Endpoint number</description>
  38724. <bitOffset>0</bitOffset>
  38725. <bitWidth>4</bitWidth>
  38726. </field>
  38727. <field> <name>BCNT</name>
  38728. <description>Byte count</description>
  38729. <bitOffset>4</bitOffset>
  38730. <bitWidth>11</bitWidth>
  38731. </field>
  38732. <field> <name>DPID</name>
  38733. <description>Data PID</description>
  38734. <bitOffset>15</bitOffset>
  38735. <bitWidth>2</bitWidth>
  38736. </field>
  38737. <field> <name>PKTSTS</name>
  38738. <description>Packet status</description>
  38739. <bitOffset>17</bitOffset>
  38740. <bitWidth>4</bitWidth>
  38741. </field>
  38742. <field> <name>FRMNUM</name>
  38743. <description>Frame number</description>
  38744. <bitOffset>21</bitOffset>
  38745. <bitWidth>4</bitWidth>
  38746. </field>
  38747. </fields>
  38748. </register>
  38749. </registers>
  38750. </peripheral>
  38751. <peripheral> <name>OTG_HS_HOST</name>
  38752. <description>USB on the go high speed</description>
  38753. <groupName>USB_OTG_HS</groupName>
  38754. <baseAddress>0x40040400</baseAddress>
  38755. <addressBlock>
  38756. <offset>0x0</offset>
  38757. <size>0x400</size>
  38758. <usage>registers</usage>
  38759. </addressBlock>
  38760. <registers>
  38761. <register> <name>OTG_HS_HCFG</name>
  38762. <displayName>OTG_HS_HCFG</displayName>
  38763. <description>OTG_HS host configuration
  38764. register</description>
  38765. <addressOffset>0x0</addressOffset>
  38766. <size>32</size>
  38767. <resetValue>0x0</resetValue>
  38768. <fields>
  38769. <field> <name>FSLSPCS</name>
  38770. <description>FS/LS PHY clock select</description>
  38771. <bitOffset>0</bitOffset>
  38772. <bitWidth>2</bitWidth>
  38773. <access>read-write</access>
  38774. </field>
  38775. <field> <name>FSLSS</name>
  38776. <description>FS- and LS-only support</description>
  38777. <bitOffset>2</bitOffset>
  38778. <bitWidth>1</bitWidth>
  38779. <access>read-only</access>
  38780. </field>
  38781. </fields>
  38782. </register>
  38783. <register> <name>OTG_HS_HFIR</name>
  38784. <displayName>OTG_HS_HFIR</displayName>
  38785. <description>OTG_HS Host frame interval
  38786. register</description>
  38787. <addressOffset>0x4</addressOffset>
  38788. <size>32</size>
  38789. <access>read-write</access>
  38790. <resetValue>0x0000EA60</resetValue>
  38791. <fields>
  38792. <field> <name>FRIVL</name>
  38793. <description>Frame interval</description>
  38794. <bitOffset>0</bitOffset>
  38795. <bitWidth>16</bitWidth>
  38796. </field>
  38797. </fields>
  38798. </register>
  38799. <register> <name>OTG_HS_HFNUM</name>
  38800. <displayName>OTG_HS_HFNUM</displayName>
  38801. <description>OTG_HS host frame number/frame time
  38802. remaining register</description>
  38803. <addressOffset>0x8</addressOffset>
  38804. <size>32</size>
  38805. <access>read-only</access>
  38806. <resetValue>0x00003FFF</resetValue>
  38807. <fields>
  38808. <field> <name>FRNUM</name>
  38809. <description>Frame number</description>
  38810. <bitOffset>0</bitOffset>
  38811. <bitWidth>16</bitWidth>
  38812. </field>
  38813. <field> <name>FTREM</name>
  38814. <description>Frame time remaining</description>
  38815. <bitOffset>16</bitOffset>
  38816. <bitWidth>16</bitWidth>
  38817. </field>
  38818. </fields>
  38819. </register>
  38820. <register> <name>OTG_HS_HPTXSTS</name>
  38821. <displayName>OTG_HS_HPTXSTS</displayName>
  38822. <description>OTG_HS_Host periodic transmit FIFO/queue
  38823. status register</description>
  38824. <addressOffset>0x10</addressOffset>
  38825. <size>32</size>
  38826. <resetValue>0x00080100</resetValue>
  38827. <fields>
  38828. <field> <name>PTXFSAVL</name>
  38829. <description>Periodic transmit data FIFO space
  38830. available</description>
  38831. <bitOffset>0</bitOffset>
  38832. <bitWidth>16</bitWidth>
  38833. <access>read-write</access>
  38834. </field>
  38835. <field> <name>PTXQSAV</name>
  38836. <description>Periodic transmit request queue space
  38837. available</description>
  38838. <bitOffset>16</bitOffset>
  38839. <bitWidth>8</bitWidth>
  38840. <access>read-only</access>
  38841. </field>
  38842. <field> <name>PTXQTOP</name>
  38843. <description>Top of the periodic transmit request
  38844. queue</description>
  38845. <bitOffset>24</bitOffset>
  38846. <bitWidth>8</bitWidth>
  38847. <access>read-only</access>
  38848. </field>
  38849. </fields>
  38850. </register>
  38851. <register> <name>OTG_HS_HAINT</name>
  38852. <displayName>OTG_HS_HAINT</displayName>
  38853. <description>OTG_HS Host all channels interrupt
  38854. register</description>
  38855. <addressOffset>0x14</addressOffset>
  38856. <size>32</size>
  38857. <access>read-only</access>
  38858. <resetValue>0x0</resetValue>
  38859. <fields>
  38860. <field> <name>HAINT</name>
  38861. <description>Channel interrupts</description>
  38862. <bitOffset>0</bitOffset>
  38863. <bitWidth>16</bitWidth>
  38864. </field>
  38865. </fields>
  38866. </register>
  38867. <register> <name>OTG_HS_HAINTMSK</name>
  38868. <displayName>OTG_HS_HAINTMSK</displayName>
  38869. <description>OTG_HS host all channels interrupt mask
  38870. register</description>
  38871. <addressOffset>0x18</addressOffset>
  38872. <size>32</size>
  38873. <access>read-write</access>
  38874. <resetValue>0x0</resetValue>
  38875. <fields>
  38876. <field> <name>HAINTM</name>
  38877. <description>Channel interrupt mask</description>
  38878. <bitOffset>0</bitOffset>
  38879. <bitWidth>16</bitWidth>
  38880. </field>
  38881. </fields>
  38882. </register>
  38883. <register> <name>OTG_HS_HPRT</name>
  38884. <displayName>OTG_HS_HPRT</displayName>
  38885. <description>OTG_HS host port control and status
  38886. register</description>
  38887. <addressOffset>0x40</addressOffset>
  38888. <size>32</size>
  38889. <resetValue>0x0</resetValue>
  38890. <fields>
  38891. <field> <name>PCSTS</name>
  38892. <description>Port connect status</description>
  38893. <bitOffset>0</bitOffset>
  38894. <bitWidth>1</bitWidth>
  38895. <access>read-only</access>
  38896. </field>
  38897. <field> <name>PCDET</name>
  38898. <description>Port connect detected</description>
  38899. <bitOffset>1</bitOffset>
  38900. <bitWidth>1</bitWidth>
  38901. <access>read-write</access>
  38902. </field>
  38903. <field> <name>PENA</name>
  38904. <description>Port enable</description>
  38905. <bitOffset>2</bitOffset>
  38906. <bitWidth>1</bitWidth>
  38907. <access>read-write</access>
  38908. </field>
  38909. <field> <name>PENCHNG</name>
  38910. <description>Port enable/disable change</description>
  38911. <bitOffset>3</bitOffset>
  38912. <bitWidth>1</bitWidth>
  38913. <access>read-write</access>
  38914. </field>
  38915. <field> <name>POCA</name>
  38916. <description>Port overcurrent active</description>
  38917. <bitOffset>4</bitOffset>
  38918. <bitWidth>1</bitWidth>
  38919. <access>read-only</access>
  38920. </field>
  38921. <field> <name>POCCHNG</name>
  38922. <description>Port overcurrent change</description>
  38923. <bitOffset>5</bitOffset>
  38924. <bitWidth>1</bitWidth>
  38925. <access>read-write</access>
  38926. </field>
  38927. <field> <name>PRES</name>
  38928. <description>Port resume</description>
  38929. <bitOffset>6</bitOffset>
  38930. <bitWidth>1</bitWidth>
  38931. <access>read-write</access>
  38932. </field>
  38933. <field> <name>PSUSP</name>
  38934. <description>Port suspend</description>
  38935. <bitOffset>7</bitOffset>
  38936. <bitWidth>1</bitWidth>
  38937. <access>read-write</access>
  38938. </field>
  38939. <field> <name>PRST</name>
  38940. <description>Port reset</description>
  38941. <bitOffset>8</bitOffset>
  38942. <bitWidth>1</bitWidth>
  38943. <access>read-write</access>
  38944. </field>
  38945. <field> <name>PLSTS</name>
  38946. <description>Port line status</description>
  38947. <bitOffset>10</bitOffset>
  38948. <bitWidth>2</bitWidth>
  38949. <access>read-only</access>
  38950. </field>
  38951. <field> <name>PPWR</name>
  38952. <description>Port power</description>
  38953. <bitOffset>12</bitOffset>
  38954. <bitWidth>1</bitWidth>
  38955. <access>read-write</access>
  38956. </field>
  38957. <field> <name>PTCTL</name>
  38958. <description>Port test control</description>
  38959. <bitOffset>13</bitOffset>
  38960. <bitWidth>4</bitWidth>
  38961. <access>read-write</access>
  38962. </field>
  38963. <field> <name>PSPD</name>
  38964. <description>Port speed</description>
  38965. <bitOffset>17</bitOffset>
  38966. <bitWidth>2</bitWidth>
  38967. <access>read-only</access>
  38968. </field>
  38969. </fields>
  38970. </register>
  38971. <register> <name>OTG_HS_HCCHAR0</name>
  38972. <displayName>OTG_HS_HCCHAR0</displayName>
  38973. <description>OTG_HS host channel-0 characteristics
  38974. register</description>
  38975. <addressOffset>0x100</addressOffset>
  38976. <size>32</size>
  38977. <access>read-write</access>
  38978. <resetValue>0x0</resetValue>
  38979. <fields>
  38980. <field> <name>MPSIZ</name>
  38981. <description>Maximum packet size</description>
  38982. <bitOffset>0</bitOffset>
  38983. <bitWidth>11</bitWidth>
  38984. </field>
  38985. <field> <name>EPNUM</name>
  38986. <description>Endpoint number</description>
  38987. <bitOffset>11</bitOffset>
  38988. <bitWidth>4</bitWidth>
  38989. </field>
  38990. <field> <name>EPDIR</name>
  38991. <description>Endpoint direction</description>
  38992. <bitOffset>15</bitOffset>
  38993. <bitWidth>1</bitWidth>
  38994. </field>
  38995. <field> <name>LSDEV</name>
  38996. <description>Low-speed device</description>
  38997. <bitOffset>17</bitOffset>
  38998. <bitWidth>1</bitWidth>
  38999. </field>
  39000. <field> <name>EPTYP</name>
  39001. <description>Endpoint type</description>
  39002. <bitOffset>18</bitOffset>
  39003. <bitWidth>2</bitWidth>
  39004. </field>
  39005. <field> <name>MC</name>
  39006. <description>Multi Count (MC) / Error Count
  39007. (EC)</description>
  39008. <bitOffset>20</bitOffset>
  39009. <bitWidth>2</bitWidth>
  39010. </field>
  39011. <field> <name>DAD</name>
  39012. <description>Device address</description>
  39013. <bitOffset>22</bitOffset>
  39014. <bitWidth>7</bitWidth>
  39015. </field>
  39016. <field> <name>ODDFRM</name>
  39017. <description>Odd frame</description>
  39018. <bitOffset>29</bitOffset>
  39019. <bitWidth>1</bitWidth>
  39020. </field>
  39021. <field> <name>CHDIS</name>
  39022. <description>Channel disable</description>
  39023. <bitOffset>30</bitOffset>
  39024. <bitWidth>1</bitWidth>
  39025. </field>
  39026. <field> <name>CHENA</name>
  39027. <description>Channel enable</description>
  39028. <bitOffset>31</bitOffset>
  39029. <bitWidth>1</bitWidth>
  39030. </field>
  39031. </fields>
  39032. </register>
  39033. <register> <name>OTG_HS_HCCHAR1</name>
  39034. <displayName>OTG_HS_HCCHAR1</displayName>
  39035. <description>OTG_HS host channel-1 characteristics
  39036. register</description>
  39037. <addressOffset>0x120</addressOffset>
  39038. <size>32</size>
  39039. <access>read-write</access>
  39040. <resetValue>0x0</resetValue>
  39041. <fields>
  39042. <field> <name>MPSIZ</name>
  39043. <description>Maximum packet size</description>
  39044. <bitOffset>0</bitOffset>
  39045. <bitWidth>11</bitWidth>
  39046. </field>
  39047. <field> <name>EPNUM</name>
  39048. <description>Endpoint number</description>
  39049. <bitOffset>11</bitOffset>
  39050. <bitWidth>4</bitWidth>
  39051. </field>
  39052. <field> <name>EPDIR</name>
  39053. <description>Endpoint direction</description>
  39054. <bitOffset>15</bitOffset>
  39055. <bitWidth>1</bitWidth>
  39056. </field>
  39057. <field> <name>LSDEV</name>
  39058. <description>Low-speed device</description>
  39059. <bitOffset>17</bitOffset>
  39060. <bitWidth>1</bitWidth>
  39061. </field>
  39062. <field> <name>EPTYP</name>
  39063. <description>Endpoint type</description>
  39064. <bitOffset>18</bitOffset>
  39065. <bitWidth>2</bitWidth>
  39066. </field>
  39067. <field> <name>MC</name>
  39068. <description>Multi Count (MC) / Error Count
  39069. (EC)</description>
  39070. <bitOffset>20</bitOffset>
  39071. <bitWidth>2</bitWidth>
  39072. </field>
  39073. <field> <name>DAD</name>
  39074. <description>Device address</description>
  39075. <bitOffset>22</bitOffset>
  39076. <bitWidth>7</bitWidth>
  39077. </field>
  39078. <field> <name>ODDFRM</name>
  39079. <description>Odd frame</description>
  39080. <bitOffset>29</bitOffset>
  39081. <bitWidth>1</bitWidth>
  39082. </field>
  39083. <field> <name>CHDIS</name>
  39084. <description>Channel disable</description>
  39085. <bitOffset>30</bitOffset>
  39086. <bitWidth>1</bitWidth>
  39087. </field>
  39088. <field> <name>CHENA</name>
  39089. <description>Channel enable</description>
  39090. <bitOffset>31</bitOffset>
  39091. <bitWidth>1</bitWidth>
  39092. </field>
  39093. </fields>
  39094. </register>
  39095. <register> <name>OTG_HS_HCCHAR2</name>
  39096. <displayName>OTG_HS_HCCHAR2</displayName>
  39097. <description>OTG_HS host channel-2 characteristics
  39098. register</description>
  39099. <addressOffset>0x140</addressOffset>
  39100. <size>32</size>
  39101. <access>read-write</access>
  39102. <resetValue>0x0</resetValue>
  39103. <fields>
  39104. <field> <name>MPSIZ</name>
  39105. <description>Maximum packet size</description>
  39106. <bitOffset>0</bitOffset>
  39107. <bitWidth>11</bitWidth>
  39108. </field>
  39109. <field> <name>EPNUM</name>
  39110. <description>Endpoint number</description>
  39111. <bitOffset>11</bitOffset>
  39112. <bitWidth>4</bitWidth>
  39113. </field>
  39114. <field> <name>EPDIR</name>
  39115. <description>Endpoint direction</description>
  39116. <bitOffset>15</bitOffset>
  39117. <bitWidth>1</bitWidth>
  39118. </field>
  39119. <field> <name>LSDEV</name>
  39120. <description>Low-speed device</description>
  39121. <bitOffset>17</bitOffset>
  39122. <bitWidth>1</bitWidth>
  39123. </field>
  39124. <field> <name>EPTYP</name>
  39125. <description>Endpoint type</description>
  39126. <bitOffset>18</bitOffset>
  39127. <bitWidth>2</bitWidth>
  39128. </field>
  39129. <field> <name>MC</name>
  39130. <description>Multi Count (MC) / Error Count
  39131. (EC)</description>
  39132. <bitOffset>20</bitOffset>
  39133. <bitWidth>2</bitWidth>
  39134. </field>
  39135. <field> <name>DAD</name>
  39136. <description>Device address</description>
  39137. <bitOffset>22</bitOffset>
  39138. <bitWidth>7</bitWidth>
  39139. </field>
  39140. <field> <name>ODDFRM</name>
  39141. <description>Odd frame</description>
  39142. <bitOffset>29</bitOffset>
  39143. <bitWidth>1</bitWidth>
  39144. </field>
  39145. <field> <name>CHDIS</name>
  39146. <description>Channel disable</description>
  39147. <bitOffset>30</bitOffset>
  39148. <bitWidth>1</bitWidth>
  39149. </field>
  39150. <field> <name>CHENA</name>
  39151. <description>Channel enable</description>
  39152. <bitOffset>31</bitOffset>
  39153. <bitWidth>1</bitWidth>
  39154. </field>
  39155. </fields>
  39156. </register>
  39157. <register> <name>OTG_HS_HCCHAR3</name>
  39158. <displayName>OTG_HS_HCCHAR3</displayName>
  39159. <description>OTG_HS host channel-3 characteristics
  39160. register</description>
  39161. <addressOffset>0x160</addressOffset>
  39162. <size>32</size>
  39163. <access>read-write</access>
  39164. <resetValue>0x0</resetValue>
  39165. <fields>
  39166. <field> <name>MPSIZ</name>
  39167. <description>Maximum packet size</description>
  39168. <bitOffset>0</bitOffset>
  39169. <bitWidth>11</bitWidth>
  39170. </field>
  39171. <field> <name>EPNUM</name>
  39172. <description>Endpoint number</description>
  39173. <bitOffset>11</bitOffset>
  39174. <bitWidth>4</bitWidth>
  39175. </field>
  39176. <field> <name>EPDIR</name>
  39177. <description>Endpoint direction</description>
  39178. <bitOffset>15</bitOffset>
  39179. <bitWidth>1</bitWidth>
  39180. </field>
  39181. <field> <name>LSDEV</name>
  39182. <description>Low-speed device</description>
  39183. <bitOffset>17</bitOffset>
  39184. <bitWidth>1</bitWidth>
  39185. </field>
  39186. <field> <name>EPTYP</name>
  39187. <description>Endpoint type</description>
  39188. <bitOffset>18</bitOffset>
  39189. <bitWidth>2</bitWidth>
  39190. </field>
  39191. <field> <name>MC</name>
  39192. <description>Multi Count (MC) / Error Count
  39193. (EC)</description>
  39194. <bitOffset>20</bitOffset>
  39195. <bitWidth>2</bitWidth>
  39196. </field>
  39197. <field> <name>DAD</name>
  39198. <description>Device address</description>
  39199. <bitOffset>22</bitOffset>
  39200. <bitWidth>7</bitWidth>
  39201. </field>
  39202. <field> <name>ODDFRM</name>
  39203. <description>Odd frame</description>
  39204. <bitOffset>29</bitOffset>
  39205. <bitWidth>1</bitWidth>
  39206. </field>
  39207. <field> <name>CHDIS</name>
  39208. <description>Channel disable</description>
  39209. <bitOffset>30</bitOffset>
  39210. <bitWidth>1</bitWidth>
  39211. </field>
  39212. <field> <name>CHENA</name>
  39213. <description>Channel enable</description>
  39214. <bitOffset>31</bitOffset>
  39215. <bitWidth>1</bitWidth>
  39216. </field>
  39217. </fields>
  39218. </register>
  39219. <register> <name>OTG_HS_HCCHAR4</name>
  39220. <displayName>OTG_HS_HCCHAR4</displayName>
  39221. <description>OTG_HS host channel-4 characteristics
  39222. register</description>
  39223. <addressOffset>0x180</addressOffset>
  39224. <size>32</size>
  39225. <access>read-write</access>
  39226. <resetValue>0x0</resetValue>
  39227. <fields>
  39228. <field> <name>MPSIZ</name>
  39229. <description>Maximum packet size</description>
  39230. <bitOffset>0</bitOffset>
  39231. <bitWidth>11</bitWidth>
  39232. </field>
  39233. <field> <name>EPNUM</name>
  39234. <description>Endpoint number</description>
  39235. <bitOffset>11</bitOffset>
  39236. <bitWidth>4</bitWidth>
  39237. </field>
  39238. <field> <name>EPDIR</name>
  39239. <description>Endpoint direction</description>
  39240. <bitOffset>15</bitOffset>
  39241. <bitWidth>1</bitWidth>
  39242. </field>
  39243. <field> <name>LSDEV</name>
  39244. <description>Low-speed device</description>
  39245. <bitOffset>17</bitOffset>
  39246. <bitWidth>1</bitWidth>
  39247. </field>
  39248. <field> <name>EPTYP</name>
  39249. <description>Endpoint type</description>
  39250. <bitOffset>18</bitOffset>
  39251. <bitWidth>2</bitWidth>
  39252. </field>
  39253. <field> <name>MC</name>
  39254. <description>Multi Count (MC) / Error Count
  39255. (EC)</description>
  39256. <bitOffset>20</bitOffset>
  39257. <bitWidth>2</bitWidth>
  39258. </field>
  39259. <field> <name>DAD</name>
  39260. <description>Device address</description>
  39261. <bitOffset>22</bitOffset>
  39262. <bitWidth>7</bitWidth>
  39263. </field>
  39264. <field> <name>ODDFRM</name>
  39265. <description>Odd frame</description>
  39266. <bitOffset>29</bitOffset>
  39267. <bitWidth>1</bitWidth>
  39268. </field>
  39269. <field> <name>CHDIS</name>
  39270. <description>Channel disable</description>
  39271. <bitOffset>30</bitOffset>
  39272. <bitWidth>1</bitWidth>
  39273. </field>
  39274. <field> <name>CHENA</name>
  39275. <description>Channel enable</description>
  39276. <bitOffset>31</bitOffset>
  39277. <bitWidth>1</bitWidth>
  39278. </field>
  39279. </fields>
  39280. </register>
  39281. <register> <name>OTG_HS_HCCHAR5</name>
  39282. <displayName>OTG_HS_HCCHAR5</displayName>
  39283. <description>OTG_HS host channel-5 characteristics
  39284. register</description>
  39285. <addressOffset>0x1A0</addressOffset>
  39286. <size>32</size>
  39287. <access>read-write</access>
  39288. <resetValue>0x0</resetValue>
  39289. <fields>
  39290. <field> <name>MPSIZ</name>
  39291. <description>Maximum packet size</description>
  39292. <bitOffset>0</bitOffset>
  39293. <bitWidth>11</bitWidth>
  39294. </field>
  39295. <field> <name>EPNUM</name>
  39296. <description>Endpoint number</description>
  39297. <bitOffset>11</bitOffset>
  39298. <bitWidth>4</bitWidth>
  39299. </field>
  39300. <field> <name>EPDIR</name>
  39301. <description>Endpoint direction</description>
  39302. <bitOffset>15</bitOffset>
  39303. <bitWidth>1</bitWidth>
  39304. </field>
  39305. <field> <name>LSDEV</name>
  39306. <description>Low-speed device</description>
  39307. <bitOffset>17</bitOffset>
  39308. <bitWidth>1</bitWidth>
  39309. </field>
  39310. <field> <name>EPTYP</name>
  39311. <description>Endpoint type</description>
  39312. <bitOffset>18</bitOffset>
  39313. <bitWidth>2</bitWidth>
  39314. </field>
  39315. <field> <name>MC</name>
  39316. <description>Multi Count (MC) / Error Count
  39317. (EC)</description>
  39318. <bitOffset>20</bitOffset>
  39319. <bitWidth>2</bitWidth>
  39320. </field>
  39321. <field> <name>DAD</name>
  39322. <description>Device address</description>
  39323. <bitOffset>22</bitOffset>
  39324. <bitWidth>7</bitWidth>
  39325. </field>
  39326. <field> <name>ODDFRM</name>
  39327. <description>Odd frame</description>
  39328. <bitOffset>29</bitOffset>
  39329. <bitWidth>1</bitWidth>
  39330. </field>
  39331. <field> <name>CHDIS</name>
  39332. <description>Channel disable</description>
  39333. <bitOffset>30</bitOffset>
  39334. <bitWidth>1</bitWidth>
  39335. </field>
  39336. <field> <name>CHENA</name>
  39337. <description>Channel enable</description>
  39338. <bitOffset>31</bitOffset>
  39339. <bitWidth>1</bitWidth>
  39340. </field>
  39341. </fields>
  39342. </register>
  39343. <register> <name>OTG_HS_HCCHAR6</name>
  39344. <displayName>OTG_HS_HCCHAR6</displayName>
  39345. <description>OTG_HS host channel-6 characteristics
  39346. register</description>
  39347. <addressOffset>0x1C0</addressOffset>
  39348. <size>32</size>
  39349. <access>read-write</access>
  39350. <resetValue>0x0</resetValue>
  39351. <fields>
  39352. <field> <name>MPSIZ</name>
  39353. <description>Maximum packet size</description>
  39354. <bitOffset>0</bitOffset>
  39355. <bitWidth>11</bitWidth>
  39356. </field>
  39357. <field> <name>EPNUM</name>
  39358. <description>Endpoint number</description>
  39359. <bitOffset>11</bitOffset>
  39360. <bitWidth>4</bitWidth>
  39361. </field>
  39362. <field> <name>EPDIR</name>
  39363. <description>Endpoint direction</description>
  39364. <bitOffset>15</bitOffset>
  39365. <bitWidth>1</bitWidth>
  39366. </field>
  39367. <field> <name>LSDEV</name>
  39368. <description>Low-speed device</description>
  39369. <bitOffset>17</bitOffset>
  39370. <bitWidth>1</bitWidth>
  39371. </field>
  39372. <field> <name>EPTYP</name>
  39373. <description>Endpoint type</description>
  39374. <bitOffset>18</bitOffset>
  39375. <bitWidth>2</bitWidth>
  39376. </field>
  39377. <field> <name>MC</name>
  39378. <description>Multi Count (MC) / Error Count
  39379. (EC)</description>
  39380. <bitOffset>20</bitOffset>
  39381. <bitWidth>2</bitWidth>
  39382. </field>
  39383. <field> <name>DAD</name>
  39384. <description>Device address</description>
  39385. <bitOffset>22</bitOffset>
  39386. <bitWidth>7</bitWidth>
  39387. </field>
  39388. <field> <name>ODDFRM</name>
  39389. <description>Odd frame</description>
  39390. <bitOffset>29</bitOffset>
  39391. <bitWidth>1</bitWidth>
  39392. </field>
  39393. <field> <name>CHDIS</name>
  39394. <description>Channel disable</description>
  39395. <bitOffset>30</bitOffset>
  39396. <bitWidth>1</bitWidth>
  39397. </field>
  39398. <field> <name>CHENA</name>
  39399. <description>Channel enable</description>
  39400. <bitOffset>31</bitOffset>
  39401. <bitWidth>1</bitWidth>
  39402. </field>
  39403. </fields>
  39404. </register>
  39405. <register> <name>OTG_HS_HCCHAR7</name>
  39406. <displayName>OTG_HS_HCCHAR7</displayName>
  39407. <description>OTG_HS host channel-7 characteristics
  39408. register</description>
  39409. <addressOffset>0x1E0</addressOffset>
  39410. <size>32</size>
  39411. <access>read-write</access>
  39412. <resetValue>0x0</resetValue>
  39413. <fields>
  39414. <field> <name>MPSIZ</name>
  39415. <description>Maximum packet size</description>
  39416. <bitOffset>0</bitOffset>
  39417. <bitWidth>11</bitWidth>
  39418. </field>
  39419. <field> <name>EPNUM</name>
  39420. <description>Endpoint number</description>
  39421. <bitOffset>11</bitOffset>
  39422. <bitWidth>4</bitWidth>
  39423. </field>
  39424. <field> <name>EPDIR</name>
  39425. <description>Endpoint direction</description>
  39426. <bitOffset>15</bitOffset>
  39427. <bitWidth>1</bitWidth>
  39428. </field>
  39429. <field> <name>LSDEV</name>
  39430. <description>Low-speed device</description>
  39431. <bitOffset>17</bitOffset>
  39432. <bitWidth>1</bitWidth>
  39433. </field>
  39434. <field> <name>EPTYP</name>
  39435. <description>Endpoint type</description>
  39436. <bitOffset>18</bitOffset>
  39437. <bitWidth>2</bitWidth>
  39438. </field>
  39439. <field> <name>MC</name>
  39440. <description>Multi Count (MC) / Error Count
  39441. (EC)</description>
  39442. <bitOffset>20</bitOffset>
  39443. <bitWidth>2</bitWidth>
  39444. </field>
  39445. <field> <name>DAD</name>
  39446. <description>Device address</description>
  39447. <bitOffset>22</bitOffset>
  39448. <bitWidth>7</bitWidth>
  39449. </field>
  39450. <field> <name>ODDFRM</name>
  39451. <description>Odd frame</description>
  39452. <bitOffset>29</bitOffset>
  39453. <bitWidth>1</bitWidth>
  39454. </field>
  39455. <field> <name>CHDIS</name>
  39456. <description>Channel disable</description>
  39457. <bitOffset>30</bitOffset>
  39458. <bitWidth>1</bitWidth>
  39459. </field>
  39460. <field> <name>CHENA</name>
  39461. <description>Channel enable</description>
  39462. <bitOffset>31</bitOffset>
  39463. <bitWidth>1</bitWidth>
  39464. </field>
  39465. </fields>
  39466. </register>
  39467. <register> <name>OTG_HS_HCCHAR8</name>
  39468. <displayName>OTG_HS_HCCHAR8</displayName>
  39469. <description>OTG_HS host channel-8 characteristics
  39470. register</description>
  39471. <addressOffset>0x200</addressOffset>
  39472. <size>32</size>
  39473. <access>read-write</access>
  39474. <resetValue>0x0</resetValue>
  39475. <fields>
  39476. <field> <name>MPSIZ</name>
  39477. <description>Maximum packet size</description>
  39478. <bitOffset>0</bitOffset>
  39479. <bitWidth>11</bitWidth>
  39480. </field>
  39481. <field> <name>EPNUM</name>
  39482. <description>Endpoint number</description>
  39483. <bitOffset>11</bitOffset>
  39484. <bitWidth>4</bitWidth>
  39485. </field>
  39486. <field> <name>EPDIR</name>
  39487. <description>Endpoint direction</description>
  39488. <bitOffset>15</bitOffset>
  39489. <bitWidth>1</bitWidth>
  39490. </field>
  39491. <field> <name>LSDEV</name>
  39492. <description>Low-speed device</description>
  39493. <bitOffset>17</bitOffset>
  39494. <bitWidth>1</bitWidth>
  39495. </field>
  39496. <field> <name>EPTYP</name>
  39497. <description>Endpoint type</description>
  39498. <bitOffset>18</bitOffset>
  39499. <bitWidth>2</bitWidth>
  39500. </field>
  39501. <field> <name>MC</name>
  39502. <description>Multi Count (MC) / Error Count
  39503. (EC)</description>
  39504. <bitOffset>20</bitOffset>
  39505. <bitWidth>2</bitWidth>
  39506. </field>
  39507. <field> <name>DAD</name>
  39508. <description>Device address</description>
  39509. <bitOffset>22</bitOffset>
  39510. <bitWidth>7</bitWidth>
  39511. </field>
  39512. <field> <name>ODDFRM</name>
  39513. <description>Odd frame</description>
  39514. <bitOffset>29</bitOffset>
  39515. <bitWidth>1</bitWidth>
  39516. </field>
  39517. <field> <name>CHDIS</name>
  39518. <description>Channel disable</description>
  39519. <bitOffset>30</bitOffset>
  39520. <bitWidth>1</bitWidth>
  39521. </field>
  39522. <field> <name>CHENA</name>
  39523. <description>Channel enable</description>
  39524. <bitOffset>31</bitOffset>
  39525. <bitWidth>1</bitWidth>
  39526. </field>
  39527. </fields>
  39528. </register>
  39529. <register> <name>OTG_HS_HCCHAR9</name>
  39530. <displayName>OTG_HS_HCCHAR9</displayName>
  39531. <description>OTG_HS host channel-9 characteristics
  39532. register</description>
  39533. <addressOffset>0x220</addressOffset>
  39534. <size>32</size>
  39535. <access>read-write</access>
  39536. <resetValue>0x0</resetValue>
  39537. <fields>
  39538. <field> <name>MPSIZ</name>
  39539. <description>Maximum packet size</description>
  39540. <bitOffset>0</bitOffset>
  39541. <bitWidth>11</bitWidth>
  39542. </field>
  39543. <field> <name>EPNUM</name>
  39544. <description>Endpoint number</description>
  39545. <bitOffset>11</bitOffset>
  39546. <bitWidth>4</bitWidth>
  39547. </field>
  39548. <field> <name>EPDIR</name>
  39549. <description>Endpoint direction</description>
  39550. <bitOffset>15</bitOffset>
  39551. <bitWidth>1</bitWidth>
  39552. </field>
  39553. <field> <name>LSDEV</name>
  39554. <description>Low-speed device</description>
  39555. <bitOffset>17</bitOffset>
  39556. <bitWidth>1</bitWidth>
  39557. </field>
  39558. <field> <name>EPTYP</name>
  39559. <description>Endpoint type</description>
  39560. <bitOffset>18</bitOffset>
  39561. <bitWidth>2</bitWidth>
  39562. </field>
  39563. <field> <name>MC</name>
  39564. <description>Multi Count (MC) / Error Count
  39565. (EC)</description>
  39566. <bitOffset>20</bitOffset>
  39567. <bitWidth>2</bitWidth>
  39568. </field>
  39569. <field> <name>DAD</name>
  39570. <description>Device address</description>
  39571. <bitOffset>22</bitOffset>
  39572. <bitWidth>7</bitWidth>
  39573. </field>
  39574. <field> <name>ODDFRM</name>
  39575. <description>Odd frame</description>
  39576. <bitOffset>29</bitOffset>
  39577. <bitWidth>1</bitWidth>
  39578. </field>
  39579. <field> <name>CHDIS</name>
  39580. <description>Channel disable</description>
  39581. <bitOffset>30</bitOffset>
  39582. <bitWidth>1</bitWidth>
  39583. </field>
  39584. <field> <name>CHENA</name>
  39585. <description>Channel enable</description>
  39586. <bitOffset>31</bitOffset>
  39587. <bitWidth>1</bitWidth>
  39588. </field>
  39589. </fields>
  39590. </register>
  39591. <register> <name>OTG_HS_HCCHAR10</name>
  39592. <displayName>OTG_HS_HCCHAR10</displayName>
  39593. <description>OTG_HS host channel-10 characteristics
  39594. register</description>
  39595. <addressOffset>0x240</addressOffset>
  39596. <size>32</size>
  39597. <access>read-write</access>
  39598. <resetValue>0x0</resetValue>
  39599. <fields>
  39600. <field> <name>MPSIZ</name>
  39601. <description>Maximum packet size</description>
  39602. <bitOffset>0</bitOffset>
  39603. <bitWidth>11</bitWidth>
  39604. </field>
  39605. <field> <name>EPNUM</name>
  39606. <description>Endpoint number</description>
  39607. <bitOffset>11</bitOffset>
  39608. <bitWidth>4</bitWidth>
  39609. </field>
  39610. <field> <name>EPDIR</name>
  39611. <description>Endpoint direction</description>
  39612. <bitOffset>15</bitOffset>
  39613. <bitWidth>1</bitWidth>
  39614. </field>
  39615. <field> <name>LSDEV</name>
  39616. <description>Low-speed device</description>
  39617. <bitOffset>17</bitOffset>
  39618. <bitWidth>1</bitWidth>
  39619. </field>
  39620. <field> <name>EPTYP</name>
  39621. <description>Endpoint type</description>
  39622. <bitOffset>18</bitOffset>
  39623. <bitWidth>2</bitWidth>
  39624. </field>
  39625. <field> <name>MC</name>
  39626. <description>Multi Count (MC) / Error Count
  39627. (EC)</description>
  39628. <bitOffset>20</bitOffset>
  39629. <bitWidth>2</bitWidth>
  39630. </field>
  39631. <field> <name>DAD</name>
  39632. <description>Device address</description>
  39633. <bitOffset>22</bitOffset>
  39634. <bitWidth>7</bitWidth>
  39635. </field>
  39636. <field> <name>ODDFRM</name>
  39637. <description>Odd frame</description>
  39638. <bitOffset>29</bitOffset>
  39639. <bitWidth>1</bitWidth>
  39640. </field>
  39641. <field> <name>CHDIS</name>
  39642. <description>Channel disable</description>
  39643. <bitOffset>30</bitOffset>
  39644. <bitWidth>1</bitWidth>
  39645. </field>
  39646. <field> <name>CHENA</name>
  39647. <description>Channel enable</description>
  39648. <bitOffset>31</bitOffset>
  39649. <bitWidth>1</bitWidth>
  39650. </field>
  39651. </fields>
  39652. </register>
  39653. <register> <name>OTG_HS_HCCHAR11</name>
  39654. <displayName>OTG_HS_HCCHAR11</displayName>
  39655. <description>OTG_HS host channel-11 characteristics
  39656. register</description>
  39657. <addressOffset>0x260</addressOffset>
  39658. <size>32</size>
  39659. <access>read-write</access>
  39660. <resetValue>0x0</resetValue>
  39661. <fields>
  39662. <field> <name>MPSIZ</name>
  39663. <description>Maximum packet size</description>
  39664. <bitOffset>0</bitOffset>
  39665. <bitWidth>11</bitWidth>
  39666. </field>
  39667. <field> <name>EPNUM</name>
  39668. <description>Endpoint number</description>
  39669. <bitOffset>11</bitOffset>
  39670. <bitWidth>4</bitWidth>
  39671. </field>
  39672. <field> <name>EPDIR</name>
  39673. <description>Endpoint direction</description>
  39674. <bitOffset>15</bitOffset>
  39675. <bitWidth>1</bitWidth>
  39676. </field>
  39677. <field> <name>LSDEV</name>
  39678. <description>Low-speed device</description>
  39679. <bitOffset>17</bitOffset>
  39680. <bitWidth>1</bitWidth>
  39681. </field>
  39682. <field> <name>EPTYP</name>
  39683. <description>Endpoint type</description>
  39684. <bitOffset>18</bitOffset>
  39685. <bitWidth>2</bitWidth>
  39686. </field>
  39687. <field> <name>MC</name>
  39688. <description>Multi Count (MC) / Error Count
  39689. (EC)</description>
  39690. <bitOffset>20</bitOffset>
  39691. <bitWidth>2</bitWidth>
  39692. </field>
  39693. <field> <name>DAD</name>
  39694. <description>Device address</description>
  39695. <bitOffset>22</bitOffset>
  39696. <bitWidth>7</bitWidth>
  39697. </field>
  39698. <field> <name>ODDFRM</name>
  39699. <description>Odd frame</description>
  39700. <bitOffset>29</bitOffset>
  39701. <bitWidth>1</bitWidth>
  39702. </field>
  39703. <field> <name>CHDIS</name>
  39704. <description>Channel disable</description>
  39705. <bitOffset>30</bitOffset>
  39706. <bitWidth>1</bitWidth>
  39707. </field>
  39708. <field> <name>CHENA</name>
  39709. <description>Channel enable</description>
  39710. <bitOffset>31</bitOffset>
  39711. <bitWidth>1</bitWidth>
  39712. </field>
  39713. </fields>
  39714. </register>
  39715. <register> <name>OTG_HS_HCSPLT0</name>
  39716. <displayName>OTG_HS_HCSPLT0</displayName>
  39717. <description>OTG_HS host channel-0 split control
  39718. register</description>
  39719. <addressOffset>0x104</addressOffset>
  39720. <size>32</size>
  39721. <access>read-write</access>
  39722. <resetValue>0x0</resetValue>
  39723. <fields>
  39724. <field> <name>PRTADDR</name>
  39725. <description>Port address</description>
  39726. <bitOffset>0</bitOffset>
  39727. <bitWidth>7</bitWidth>
  39728. </field>
  39729. <field> <name>HUBADDR</name>
  39730. <description>Hub address</description>
  39731. <bitOffset>7</bitOffset>
  39732. <bitWidth>7</bitWidth>
  39733. </field>
  39734. <field> <name>XACTPOS</name>
  39735. <description>XACTPOS</description>
  39736. <bitOffset>14</bitOffset>
  39737. <bitWidth>2</bitWidth>
  39738. </field>
  39739. <field> <name>COMPLSPLT</name>
  39740. <description>Do complete split</description>
  39741. <bitOffset>16</bitOffset>
  39742. <bitWidth>1</bitWidth>
  39743. </field>
  39744. <field> <name>SPLITEN</name>
  39745. <description>Split enable</description>
  39746. <bitOffset>31</bitOffset>
  39747. <bitWidth>1</bitWidth>
  39748. </field>
  39749. </fields>
  39750. </register>
  39751. <register> <name>OTG_HS_HCSPLT1</name>
  39752. <displayName>OTG_HS_HCSPLT1</displayName>
  39753. <description>OTG_HS host channel-1 split control
  39754. register</description>
  39755. <addressOffset>0x124</addressOffset>
  39756. <size>32</size>
  39757. <access>read-write</access>
  39758. <resetValue>0x0</resetValue>
  39759. <fields>
  39760. <field> <name>PRTADDR</name>
  39761. <description>Port address</description>
  39762. <bitOffset>0</bitOffset>
  39763. <bitWidth>7</bitWidth>
  39764. </field>
  39765. <field> <name>HUBADDR</name>
  39766. <description>Hub address</description>
  39767. <bitOffset>7</bitOffset>
  39768. <bitWidth>7</bitWidth>
  39769. </field>
  39770. <field> <name>XACTPOS</name>
  39771. <description>XACTPOS</description>
  39772. <bitOffset>14</bitOffset>
  39773. <bitWidth>2</bitWidth>
  39774. </field>
  39775. <field> <name>COMPLSPLT</name>
  39776. <description>Do complete split</description>
  39777. <bitOffset>16</bitOffset>
  39778. <bitWidth>1</bitWidth>
  39779. </field>
  39780. <field> <name>SPLITEN</name>
  39781. <description>Split enable</description>
  39782. <bitOffset>31</bitOffset>
  39783. <bitWidth>1</bitWidth>
  39784. </field>
  39785. </fields>
  39786. </register>
  39787. <register> <name>OTG_HS_HCSPLT2</name>
  39788. <displayName>OTG_HS_HCSPLT2</displayName>
  39789. <description>OTG_HS host channel-2 split control
  39790. register</description>
  39791. <addressOffset>0x144</addressOffset>
  39792. <size>32</size>
  39793. <access>read-write</access>
  39794. <resetValue>0x0</resetValue>
  39795. <fields>
  39796. <field> <name>PRTADDR</name>
  39797. <description>Port address</description>
  39798. <bitOffset>0</bitOffset>
  39799. <bitWidth>7</bitWidth>
  39800. </field>
  39801. <field> <name>HUBADDR</name>
  39802. <description>Hub address</description>
  39803. <bitOffset>7</bitOffset>
  39804. <bitWidth>7</bitWidth>
  39805. </field>
  39806. <field> <name>XACTPOS</name>
  39807. <description>XACTPOS</description>
  39808. <bitOffset>14</bitOffset>
  39809. <bitWidth>2</bitWidth>
  39810. </field>
  39811. <field> <name>COMPLSPLT</name>
  39812. <description>Do complete split</description>
  39813. <bitOffset>16</bitOffset>
  39814. <bitWidth>1</bitWidth>
  39815. </field>
  39816. <field> <name>SPLITEN</name>
  39817. <description>Split enable</description>
  39818. <bitOffset>31</bitOffset>
  39819. <bitWidth>1</bitWidth>
  39820. </field>
  39821. </fields>
  39822. </register>
  39823. <register> <name>OTG_HS_HCSPLT3</name>
  39824. <displayName>OTG_HS_HCSPLT3</displayName>
  39825. <description>OTG_HS host channel-3 split control
  39826. register</description>
  39827. <addressOffset>0x164</addressOffset>
  39828. <size>32</size>
  39829. <access>read-write</access>
  39830. <resetValue>0x0</resetValue>
  39831. <fields>
  39832. <field> <name>PRTADDR</name>
  39833. <description>Port address</description>
  39834. <bitOffset>0</bitOffset>
  39835. <bitWidth>7</bitWidth>
  39836. </field>
  39837. <field> <name>HUBADDR</name>
  39838. <description>Hub address</description>
  39839. <bitOffset>7</bitOffset>
  39840. <bitWidth>7</bitWidth>
  39841. </field>
  39842. <field> <name>XACTPOS</name>
  39843. <description>XACTPOS</description>
  39844. <bitOffset>14</bitOffset>
  39845. <bitWidth>2</bitWidth>
  39846. </field>
  39847. <field> <name>COMPLSPLT</name>
  39848. <description>Do complete split</description>
  39849. <bitOffset>16</bitOffset>
  39850. <bitWidth>1</bitWidth>
  39851. </field>
  39852. <field> <name>SPLITEN</name>
  39853. <description>Split enable</description>
  39854. <bitOffset>31</bitOffset>
  39855. <bitWidth>1</bitWidth>
  39856. </field>
  39857. </fields>
  39858. </register>
  39859. <register> <name>OTG_HS_HCSPLT4</name>
  39860. <displayName>OTG_HS_HCSPLT4</displayName>
  39861. <description>OTG_HS host channel-4 split control
  39862. register</description>
  39863. <addressOffset>0x184</addressOffset>
  39864. <size>32</size>
  39865. <access>read-write</access>
  39866. <resetValue>0x0</resetValue>
  39867. <fields>
  39868. <field> <name>PRTADDR</name>
  39869. <description>Port address</description>
  39870. <bitOffset>0</bitOffset>
  39871. <bitWidth>7</bitWidth>
  39872. </field>
  39873. <field> <name>HUBADDR</name>
  39874. <description>Hub address</description>
  39875. <bitOffset>7</bitOffset>
  39876. <bitWidth>7</bitWidth>
  39877. </field>
  39878. <field> <name>XACTPOS</name>
  39879. <description>XACTPOS</description>
  39880. <bitOffset>14</bitOffset>
  39881. <bitWidth>2</bitWidth>
  39882. </field>
  39883. <field> <name>COMPLSPLT</name>
  39884. <description>Do complete split</description>
  39885. <bitOffset>16</bitOffset>
  39886. <bitWidth>1</bitWidth>
  39887. </field>
  39888. <field> <name>SPLITEN</name>
  39889. <description>Split enable</description>
  39890. <bitOffset>31</bitOffset>
  39891. <bitWidth>1</bitWidth>
  39892. </field>
  39893. </fields>
  39894. </register>
  39895. <register> <name>OTG_HS_HCSPLT5</name>
  39896. <displayName>OTG_HS_HCSPLT5</displayName>
  39897. <description>OTG_HS host channel-5 split control
  39898. register</description>
  39899. <addressOffset>0x1A4</addressOffset>
  39900. <size>32</size>
  39901. <access>read-write</access>
  39902. <resetValue>0x0</resetValue>
  39903. <fields>
  39904. <field> <name>PRTADDR</name>
  39905. <description>Port address</description>
  39906. <bitOffset>0</bitOffset>
  39907. <bitWidth>7</bitWidth>
  39908. </field>
  39909. <field> <name>HUBADDR</name>
  39910. <description>Hub address</description>
  39911. <bitOffset>7</bitOffset>
  39912. <bitWidth>7</bitWidth>
  39913. </field>
  39914. <field> <name>XACTPOS</name>
  39915. <description>XACTPOS</description>
  39916. <bitOffset>14</bitOffset>
  39917. <bitWidth>2</bitWidth>
  39918. </field>
  39919. <field> <name>COMPLSPLT</name>
  39920. <description>Do complete split</description>
  39921. <bitOffset>16</bitOffset>
  39922. <bitWidth>1</bitWidth>
  39923. </field>
  39924. <field> <name>SPLITEN</name>
  39925. <description>Split enable</description>
  39926. <bitOffset>31</bitOffset>
  39927. <bitWidth>1</bitWidth>
  39928. </field>
  39929. </fields>
  39930. </register>
  39931. <register> <name>OTG_HS_HCSPLT6</name>
  39932. <displayName>OTG_HS_HCSPLT6</displayName>
  39933. <description>OTG_HS host channel-6 split control
  39934. register</description>
  39935. <addressOffset>0x1C4</addressOffset>
  39936. <size>32</size>
  39937. <access>read-write</access>
  39938. <resetValue>0x0</resetValue>
  39939. <fields>
  39940. <field> <name>PRTADDR</name>
  39941. <description>Port address</description>
  39942. <bitOffset>0</bitOffset>
  39943. <bitWidth>7</bitWidth>
  39944. </field>
  39945. <field> <name>HUBADDR</name>
  39946. <description>Hub address</description>
  39947. <bitOffset>7</bitOffset>
  39948. <bitWidth>7</bitWidth>
  39949. </field>
  39950. <field> <name>XACTPOS</name>
  39951. <description>XACTPOS</description>
  39952. <bitOffset>14</bitOffset>
  39953. <bitWidth>2</bitWidth>
  39954. </field>
  39955. <field> <name>COMPLSPLT</name>
  39956. <description>Do complete split</description>
  39957. <bitOffset>16</bitOffset>
  39958. <bitWidth>1</bitWidth>
  39959. </field>
  39960. <field> <name>SPLITEN</name>
  39961. <description>Split enable</description>
  39962. <bitOffset>31</bitOffset>
  39963. <bitWidth>1</bitWidth>
  39964. </field>
  39965. </fields>
  39966. </register>
  39967. <register> <name>OTG_HS_HCSPLT7</name>
  39968. <displayName>OTG_HS_HCSPLT7</displayName>
  39969. <description>OTG_HS host channel-7 split control
  39970. register</description>
  39971. <addressOffset>0x1E4</addressOffset>
  39972. <size>32</size>
  39973. <access>read-write</access>
  39974. <resetValue>0x0</resetValue>
  39975. <fields>
  39976. <field> <name>PRTADDR</name>
  39977. <description>Port address</description>
  39978. <bitOffset>0</bitOffset>
  39979. <bitWidth>7</bitWidth>
  39980. </field>
  39981. <field> <name>HUBADDR</name>
  39982. <description>Hub address</description>
  39983. <bitOffset>7</bitOffset>
  39984. <bitWidth>7</bitWidth>
  39985. </field>
  39986. <field> <name>XACTPOS</name>
  39987. <description>XACTPOS</description>
  39988. <bitOffset>14</bitOffset>
  39989. <bitWidth>2</bitWidth>
  39990. </field>
  39991. <field> <name>COMPLSPLT</name>
  39992. <description>Do complete split</description>
  39993. <bitOffset>16</bitOffset>
  39994. <bitWidth>1</bitWidth>
  39995. </field>
  39996. <field> <name>SPLITEN</name>
  39997. <description>Split enable</description>
  39998. <bitOffset>31</bitOffset>
  39999. <bitWidth>1</bitWidth>
  40000. </field>
  40001. </fields>
  40002. </register>
  40003. <register> <name>OTG_HS_HCSPLT8</name>
  40004. <displayName>OTG_HS_HCSPLT8</displayName>
  40005. <description>OTG_HS host channel-8 split control
  40006. register</description>
  40007. <addressOffset>0x204</addressOffset>
  40008. <size>32</size>
  40009. <access>read-write</access>
  40010. <resetValue>0x0</resetValue>
  40011. <fields>
  40012. <field> <name>PRTADDR</name>
  40013. <description>Port address</description>
  40014. <bitOffset>0</bitOffset>
  40015. <bitWidth>7</bitWidth>
  40016. </field>
  40017. <field> <name>HUBADDR</name>
  40018. <description>Hub address</description>
  40019. <bitOffset>7</bitOffset>
  40020. <bitWidth>7</bitWidth>
  40021. </field>
  40022. <field> <name>XACTPOS</name>
  40023. <description>XACTPOS</description>
  40024. <bitOffset>14</bitOffset>
  40025. <bitWidth>2</bitWidth>
  40026. </field>
  40027. <field> <name>COMPLSPLT</name>
  40028. <description>Do complete split</description>
  40029. <bitOffset>16</bitOffset>
  40030. <bitWidth>1</bitWidth>
  40031. </field>
  40032. <field> <name>SPLITEN</name>
  40033. <description>Split enable</description>
  40034. <bitOffset>31</bitOffset>
  40035. <bitWidth>1</bitWidth>
  40036. </field>
  40037. </fields>
  40038. </register>
  40039. <register> <name>OTG_HS_HCSPLT9</name>
  40040. <displayName>OTG_HS_HCSPLT9</displayName>
  40041. <description>OTG_HS host channel-9 split control
  40042. register</description>
  40043. <addressOffset>0x224</addressOffset>
  40044. <size>32</size>
  40045. <access>read-write</access>
  40046. <resetValue>0x0</resetValue>
  40047. <fields>
  40048. <field> <name>PRTADDR</name>
  40049. <description>Port address</description>
  40050. <bitOffset>0</bitOffset>
  40051. <bitWidth>7</bitWidth>
  40052. </field>
  40053. <field> <name>HUBADDR</name>
  40054. <description>Hub address</description>
  40055. <bitOffset>7</bitOffset>
  40056. <bitWidth>7</bitWidth>
  40057. </field>
  40058. <field> <name>XACTPOS</name>
  40059. <description>XACTPOS</description>
  40060. <bitOffset>14</bitOffset>
  40061. <bitWidth>2</bitWidth>
  40062. </field>
  40063. <field> <name>COMPLSPLT</name>
  40064. <description>Do complete split</description>
  40065. <bitOffset>16</bitOffset>
  40066. <bitWidth>1</bitWidth>
  40067. </field>
  40068. <field> <name>SPLITEN</name>
  40069. <description>Split enable</description>
  40070. <bitOffset>31</bitOffset>
  40071. <bitWidth>1</bitWidth>
  40072. </field>
  40073. </fields>
  40074. </register>
  40075. <register> <name>OTG_HS_HCSPLT10</name>
  40076. <displayName>OTG_HS_HCSPLT10</displayName>
  40077. <description>OTG_HS host channel-10 split control
  40078. register</description>
  40079. <addressOffset>0x244</addressOffset>
  40080. <size>32</size>
  40081. <access>read-write</access>
  40082. <resetValue>0x0</resetValue>
  40083. <fields>
  40084. <field> <name>PRTADDR</name>
  40085. <description>Port address</description>
  40086. <bitOffset>0</bitOffset>
  40087. <bitWidth>7</bitWidth>
  40088. </field>
  40089. <field> <name>HUBADDR</name>
  40090. <description>Hub address</description>
  40091. <bitOffset>7</bitOffset>
  40092. <bitWidth>7</bitWidth>
  40093. </field>
  40094. <field> <name>XACTPOS</name>
  40095. <description>XACTPOS</description>
  40096. <bitOffset>14</bitOffset>
  40097. <bitWidth>2</bitWidth>
  40098. </field>
  40099. <field> <name>COMPLSPLT</name>
  40100. <description>Do complete split</description>
  40101. <bitOffset>16</bitOffset>
  40102. <bitWidth>1</bitWidth>
  40103. </field>
  40104. <field> <name>SPLITEN</name>
  40105. <description>Split enable</description>
  40106. <bitOffset>31</bitOffset>
  40107. <bitWidth>1</bitWidth>
  40108. </field>
  40109. </fields>
  40110. </register>
  40111. <register> <name>OTG_HS_HCSPLT11</name>
  40112. <displayName>OTG_HS_HCSPLT11</displayName>
  40113. <description>OTG_HS host channel-11 split control
  40114. register</description>
  40115. <addressOffset>0x264</addressOffset>
  40116. <size>32</size>
  40117. <access>read-write</access>
  40118. <resetValue>0x0</resetValue>
  40119. <fields>
  40120. <field> <name>PRTADDR</name>
  40121. <description>Port address</description>
  40122. <bitOffset>0</bitOffset>
  40123. <bitWidth>7</bitWidth>
  40124. </field>
  40125. <field> <name>HUBADDR</name>
  40126. <description>Hub address</description>
  40127. <bitOffset>7</bitOffset>
  40128. <bitWidth>7</bitWidth>
  40129. </field>
  40130. <field> <name>XACTPOS</name>
  40131. <description>XACTPOS</description>
  40132. <bitOffset>14</bitOffset>
  40133. <bitWidth>2</bitWidth>
  40134. </field>
  40135. <field> <name>COMPLSPLT</name>
  40136. <description>Do complete split</description>
  40137. <bitOffset>16</bitOffset>
  40138. <bitWidth>1</bitWidth>
  40139. </field>
  40140. <field> <name>SPLITEN</name>
  40141. <description>Split enable</description>
  40142. <bitOffset>31</bitOffset>
  40143. <bitWidth>1</bitWidth>
  40144. </field>
  40145. </fields>
  40146. </register>
  40147. <register> <name>OTG_HS_HCINT0</name>
  40148. <displayName>OTG_HS_HCINT0</displayName>
  40149. <description>OTG_HS host channel-11 interrupt
  40150. register</description>
  40151. <addressOffset>0x108</addressOffset>
  40152. <size>32</size>
  40153. <access>read-write</access>
  40154. <resetValue>0x0</resetValue>
  40155. <fields>
  40156. <field> <name>XFRC</name>
  40157. <description>Transfer completed</description>
  40158. <bitOffset>0</bitOffset>
  40159. <bitWidth>1</bitWidth>
  40160. </field>
  40161. <field> <name>CHH</name>
  40162. <description>Channel halted</description>
  40163. <bitOffset>1</bitOffset>
  40164. <bitWidth>1</bitWidth>
  40165. </field>
  40166. <field> <name>AHBERR</name>
  40167. <description>AHB error</description>
  40168. <bitOffset>2</bitOffset>
  40169. <bitWidth>1</bitWidth>
  40170. </field>
  40171. <field> <name>STALL</name>
  40172. <description>STALL response received
  40173. interrupt</description>
  40174. <bitOffset>3</bitOffset>
  40175. <bitWidth>1</bitWidth>
  40176. </field>
  40177. <field> <name>NAK</name>
  40178. <description>NAK response received
  40179. interrupt</description>
  40180. <bitOffset>4</bitOffset>
  40181. <bitWidth>1</bitWidth>
  40182. </field>
  40183. <field> <name>ACK</name>
  40184. <description>ACK response received/transmitted
  40185. interrupt</description>
  40186. <bitOffset>5</bitOffset>
  40187. <bitWidth>1</bitWidth>
  40188. </field>
  40189. <field> <name>NYET</name>
  40190. <description>Response received
  40191. interrupt</description>
  40192. <bitOffset>6</bitOffset>
  40193. <bitWidth>1</bitWidth>
  40194. </field>
  40195. <field> <name>TXERR</name>
  40196. <description>Transaction error</description>
  40197. <bitOffset>7</bitOffset>
  40198. <bitWidth>1</bitWidth>
  40199. </field>
  40200. <field> <name>BBERR</name>
  40201. <description>Babble error</description>
  40202. <bitOffset>8</bitOffset>
  40203. <bitWidth>1</bitWidth>
  40204. </field>
  40205. <field> <name>FRMOR</name>
  40206. <description>Frame overrun</description>
  40207. <bitOffset>9</bitOffset>
  40208. <bitWidth>1</bitWidth>
  40209. </field>
  40210. <field> <name>DTERR</name>
  40211. <description>Data toggle error</description>
  40212. <bitOffset>10</bitOffset>
  40213. <bitWidth>1</bitWidth>
  40214. </field>
  40215. </fields>
  40216. </register>
  40217. <register> <name>OTG_HS_HCINT1</name>
  40218. <displayName>OTG_HS_HCINT1</displayName>
  40219. <description>OTG_HS host channel-1 interrupt
  40220. register</description>
  40221. <addressOffset>0x128</addressOffset>
  40222. <size>32</size>
  40223. <access>read-write</access>
  40224. <resetValue>0x0</resetValue>
  40225. <fields>
  40226. <field> <name>XFRC</name>
  40227. <description>Transfer completed</description>
  40228. <bitOffset>0</bitOffset>
  40229. <bitWidth>1</bitWidth>
  40230. </field>
  40231. <field> <name>CHH</name>
  40232. <description>Channel halted</description>
  40233. <bitOffset>1</bitOffset>
  40234. <bitWidth>1</bitWidth>
  40235. </field>
  40236. <field> <name>AHBERR</name>
  40237. <description>AHB error</description>
  40238. <bitOffset>2</bitOffset>
  40239. <bitWidth>1</bitWidth>
  40240. </field>
  40241. <field> <name>STALL</name>
  40242. <description>STALL response received
  40243. interrupt</description>
  40244. <bitOffset>3</bitOffset>
  40245. <bitWidth>1</bitWidth>
  40246. </field>
  40247. <field> <name>NAK</name>
  40248. <description>NAK response received
  40249. interrupt</description>
  40250. <bitOffset>4</bitOffset>
  40251. <bitWidth>1</bitWidth>
  40252. </field>
  40253. <field> <name>ACK</name>
  40254. <description>ACK response received/transmitted
  40255. interrupt</description>
  40256. <bitOffset>5</bitOffset>
  40257. <bitWidth>1</bitWidth>
  40258. </field>
  40259. <field> <name>NYET</name>
  40260. <description>Response received
  40261. interrupt</description>
  40262. <bitOffset>6</bitOffset>
  40263. <bitWidth>1</bitWidth>
  40264. </field>
  40265. <field> <name>TXERR</name>
  40266. <description>Transaction error</description>
  40267. <bitOffset>7</bitOffset>
  40268. <bitWidth>1</bitWidth>
  40269. </field>
  40270. <field> <name>BBERR</name>
  40271. <description>Babble error</description>
  40272. <bitOffset>8</bitOffset>
  40273. <bitWidth>1</bitWidth>
  40274. </field>
  40275. <field> <name>FRMOR</name>
  40276. <description>Frame overrun</description>
  40277. <bitOffset>9</bitOffset>
  40278. <bitWidth>1</bitWidth>
  40279. </field>
  40280. <field> <name>DTERR</name>
  40281. <description>Data toggle error</description>
  40282. <bitOffset>10</bitOffset>
  40283. <bitWidth>1</bitWidth>
  40284. </field>
  40285. </fields>
  40286. </register>
  40287. <register> <name>OTG_HS_HCINT2</name>
  40288. <displayName>OTG_HS_HCINT2</displayName>
  40289. <description>OTG_HS host channel-2 interrupt
  40290. register</description>
  40291. <addressOffset>0x148</addressOffset>
  40292. <size>32</size>
  40293. <access>read-write</access>
  40294. <resetValue>0x0</resetValue>
  40295. <fields>
  40296. <field> <name>XFRC</name>
  40297. <description>Transfer completed</description>
  40298. <bitOffset>0</bitOffset>
  40299. <bitWidth>1</bitWidth>
  40300. </field>
  40301. <field> <name>CHH</name>
  40302. <description>Channel halted</description>
  40303. <bitOffset>1</bitOffset>
  40304. <bitWidth>1</bitWidth>
  40305. </field>
  40306. <field> <name>AHBERR</name>
  40307. <description>AHB error</description>
  40308. <bitOffset>2</bitOffset>
  40309. <bitWidth>1</bitWidth>
  40310. </field>
  40311. <field> <name>STALL</name>
  40312. <description>STALL response received
  40313. interrupt</description>
  40314. <bitOffset>3</bitOffset>
  40315. <bitWidth>1</bitWidth>
  40316. </field>
  40317. <field> <name>NAK</name>
  40318. <description>NAK response received
  40319. interrupt</description>
  40320. <bitOffset>4</bitOffset>
  40321. <bitWidth>1</bitWidth>
  40322. </field>
  40323. <field> <name>ACK</name>
  40324. <description>ACK response received/transmitted
  40325. interrupt</description>
  40326. <bitOffset>5</bitOffset>
  40327. <bitWidth>1</bitWidth>
  40328. </field>
  40329. <field> <name>NYET</name>
  40330. <description>Response received
  40331. interrupt</description>
  40332. <bitOffset>6</bitOffset>
  40333. <bitWidth>1</bitWidth>
  40334. </field>
  40335. <field> <name>TXERR</name>
  40336. <description>Transaction error</description>
  40337. <bitOffset>7</bitOffset>
  40338. <bitWidth>1</bitWidth>
  40339. </field>
  40340. <field> <name>BBERR</name>
  40341. <description>Babble error</description>
  40342. <bitOffset>8</bitOffset>
  40343. <bitWidth>1</bitWidth>
  40344. </field>
  40345. <field> <name>FRMOR</name>
  40346. <description>Frame overrun</description>
  40347. <bitOffset>9</bitOffset>
  40348. <bitWidth>1</bitWidth>
  40349. </field>
  40350. <field> <name>DTERR</name>
  40351. <description>Data toggle error</description>
  40352. <bitOffset>10</bitOffset>
  40353. <bitWidth>1</bitWidth>
  40354. </field>
  40355. </fields>
  40356. </register>
  40357. <register> <name>OTG_HS_HCINT3</name>
  40358. <displayName>OTG_HS_HCINT3</displayName>
  40359. <description>OTG_HS host channel-3 interrupt
  40360. register</description>
  40361. <addressOffset>0x168</addressOffset>
  40362. <size>32</size>
  40363. <access>read-write</access>
  40364. <resetValue>0x0</resetValue>
  40365. <fields>
  40366. <field> <name>XFRC</name>
  40367. <description>Transfer completed</description>
  40368. <bitOffset>0</bitOffset>
  40369. <bitWidth>1</bitWidth>
  40370. </field>
  40371. <field> <name>CHH</name>
  40372. <description>Channel halted</description>
  40373. <bitOffset>1</bitOffset>
  40374. <bitWidth>1</bitWidth>
  40375. </field>
  40376. <field> <name>AHBERR</name>
  40377. <description>AHB error</description>
  40378. <bitOffset>2</bitOffset>
  40379. <bitWidth>1</bitWidth>
  40380. </field>
  40381. <field> <name>STALL</name>
  40382. <description>STALL response received
  40383. interrupt</description>
  40384. <bitOffset>3</bitOffset>
  40385. <bitWidth>1</bitWidth>
  40386. </field>
  40387. <field> <name>NAK</name>
  40388. <description>NAK response received
  40389. interrupt</description>
  40390. <bitOffset>4</bitOffset>
  40391. <bitWidth>1</bitWidth>
  40392. </field>
  40393. <field> <name>ACK</name>
  40394. <description>ACK response received/transmitted
  40395. interrupt</description>
  40396. <bitOffset>5</bitOffset>
  40397. <bitWidth>1</bitWidth>
  40398. </field>
  40399. <field> <name>NYET</name>
  40400. <description>Response received
  40401. interrupt</description>
  40402. <bitOffset>6</bitOffset>
  40403. <bitWidth>1</bitWidth>
  40404. </field>
  40405. <field> <name>TXERR</name>
  40406. <description>Transaction error</description>
  40407. <bitOffset>7</bitOffset>
  40408. <bitWidth>1</bitWidth>
  40409. </field>
  40410. <field> <name>BBERR</name>
  40411. <description>Babble error</description>
  40412. <bitOffset>8</bitOffset>
  40413. <bitWidth>1</bitWidth>
  40414. </field>
  40415. <field> <name>FRMOR</name>
  40416. <description>Frame overrun</description>
  40417. <bitOffset>9</bitOffset>
  40418. <bitWidth>1</bitWidth>
  40419. </field>
  40420. <field> <name>DTERR</name>
  40421. <description>Data toggle error</description>
  40422. <bitOffset>10</bitOffset>
  40423. <bitWidth>1</bitWidth>
  40424. </field>
  40425. </fields>
  40426. </register>
  40427. <register> <name>OTG_HS_HCINT4</name>
  40428. <displayName>OTG_HS_HCINT4</displayName>
  40429. <description>OTG_HS host channel-4 interrupt
  40430. register</description>
  40431. <addressOffset>0x188</addressOffset>
  40432. <size>32</size>
  40433. <access>read-write</access>
  40434. <resetValue>0x0</resetValue>
  40435. <fields>
  40436. <field> <name>XFRC</name>
  40437. <description>Transfer completed</description>
  40438. <bitOffset>0</bitOffset>
  40439. <bitWidth>1</bitWidth>
  40440. </field>
  40441. <field> <name>CHH</name>
  40442. <description>Channel halted</description>
  40443. <bitOffset>1</bitOffset>
  40444. <bitWidth>1</bitWidth>
  40445. </field>
  40446. <field> <name>AHBERR</name>
  40447. <description>AHB error</description>
  40448. <bitOffset>2</bitOffset>
  40449. <bitWidth>1</bitWidth>
  40450. </field>
  40451. <field> <name>STALL</name>
  40452. <description>STALL response received
  40453. interrupt</description>
  40454. <bitOffset>3</bitOffset>
  40455. <bitWidth>1</bitWidth>
  40456. </field>
  40457. <field> <name>NAK</name>
  40458. <description>NAK response received
  40459. interrupt</description>
  40460. <bitOffset>4</bitOffset>
  40461. <bitWidth>1</bitWidth>
  40462. </field>
  40463. <field> <name>ACK</name>
  40464. <description>ACK response received/transmitted
  40465. interrupt</description>
  40466. <bitOffset>5</bitOffset>
  40467. <bitWidth>1</bitWidth>
  40468. </field>
  40469. <field> <name>NYET</name>
  40470. <description>Response received
  40471. interrupt</description>
  40472. <bitOffset>6</bitOffset>
  40473. <bitWidth>1</bitWidth>
  40474. </field>
  40475. <field> <name>TXERR</name>
  40476. <description>Transaction error</description>
  40477. <bitOffset>7</bitOffset>
  40478. <bitWidth>1</bitWidth>
  40479. </field>
  40480. <field> <name>BBERR</name>
  40481. <description>Babble error</description>
  40482. <bitOffset>8</bitOffset>
  40483. <bitWidth>1</bitWidth>
  40484. </field>
  40485. <field> <name>FRMOR</name>
  40486. <description>Frame overrun</description>
  40487. <bitOffset>9</bitOffset>
  40488. <bitWidth>1</bitWidth>
  40489. </field>
  40490. <field> <name>DTERR</name>
  40491. <description>Data toggle error</description>
  40492. <bitOffset>10</bitOffset>
  40493. <bitWidth>1</bitWidth>
  40494. </field>
  40495. </fields>
  40496. </register>
  40497. <register> <name>OTG_HS_HCINT5</name>
  40498. <displayName>OTG_HS_HCINT5</displayName>
  40499. <description>OTG_HS host channel-5 interrupt
  40500. register</description>
  40501. <addressOffset>0x1A8</addressOffset>
  40502. <size>32</size>
  40503. <access>read-write</access>
  40504. <resetValue>0x0</resetValue>
  40505. <fields>
  40506. <field> <name>XFRC</name>
  40507. <description>Transfer completed</description>
  40508. <bitOffset>0</bitOffset>
  40509. <bitWidth>1</bitWidth>
  40510. </field>
  40511. <field> <name>CHH</name>
  40512. <description>Channel halted</description>
  40513. <bitOffset>1</bitOffset>
  40514. <bitWidth>1</bitWidth>
  40515. </field>
  40516. <field> <name>AHBERR</name>
  40517. <description>AHB error</description>
  40518. <bitOffset>2</bitOffset>
  40519. <bitWidth>1</bitWidth>
  40520. </field>
  40521. <field> <name>STALL</name>
  40522. <description>STALL response received
  40523. interrupt</description>
  40524. <bitOffset>3</bitOffset>
  40525. <bitWidth>1</bitWidth>
  40526. </field>
  40527. <field> <name>NAK</name>
  40528. <description>NAK response received
  40529. interrupt</description>
  40530. <bitOffset>4</bitOffset>
  40531. <bitWidth>1</bitWidth>
  40532. </field>
  40533. <field> <name>ACK</name>
  40534. <description>ACK response received/transmitted
  40535. interrupt</description>
  40536. <bitOffset>5</bitOffset>
  40537. <bitWidth>1</bitWidth>
  40538. </field>
  40539. <field> <name>NYET</name>
  40540. <description>Response received
  40541. interrupt</description>
  40542. <bitOffset>6</bitOffset>
  40543. <bitWidth>1</bitWidth>
  40544. </field>
  40545. <field> <name>TXERR</name>
  40546. <description>Transaction error</description>
  40547. <bitOffset>7</bitOffset>
  40548. <bitWidth>1</bitWidth>
  40549. </field>
  40550. <field> <name>BBERR</name>
  40551. <description>Babble error</description>
  40552. <bitOffset>8</bitOffset>
  40553. <bitWidth>1</bitWidth>
  40554. </field>
  40555. <field> <name>FRMOR</name>
  40556. <description>Frame overrun</description>
  40557. <bitOffset>9</bitOffset>
  40558. <bitWidth>1</bitWidth>
  40559. </field>
  40560. <field> <name>DTERR</name>
  40561. <description>Data toggle error</description>
  40562. <bitOffset>10</bitOffset>
  40563. <bitWidth>1</bitWidth>
  40564. </field>
  40565. </fields>
  40566. </register>
  40567. <register> <name>OTG_HS_HCINT6</name>
  40568. <displayName>OTG_HS_HCINT6</displayName>
  40569. <description>OTG_HS host channel-6 interrupt
  40570. register</description>
  40571. <addressOffset>0x1C8</addressOffset>
  40572. <size>32</size>
  40573. <access>read-write</access>
  40574. <resetValue>0x0</resetValue>
  40575. <fields>
  40576. <field> <name>XFRC</name>
  40577. <description>Transfer completed</description>
  40578. <bitOffset>0</bitOffset>
  40579. <bitWidth>1</bitWidth>
  40580. </field>
  40581. <field> <name>CHH</name>
  40582. <description>Channel halted</description>
  40583. <bitOffset>1</bitOffset>
  40584. <bitWidth>1</bitWidth>
  40585. </field>
  40586. <field> <name>AHBERR</name>
  40587. <description>AHB error</description>
  40588. <bitOffset>2</bitOffset>
  40589. <bitWidth>1</bitWidth>
  40590. </field>
  40591. <field> <name>STALL</name>
  40592. <description>STALL response received
  40593. interrupt</description>
  40594. <bitOffset>3</bitOffset>
  40595. <bitWidth>1</bitWidth>
  40596. </field>
  40597. <field> <name>NAK</name>
  40598. <description>NAK response received
  40599. interrupt</description>
  40600. <bitOffset>4</bitOffset>
  40601. <bitWidth>1</bitWidth>
  40602. </field>
  40603. <field> <name>ACK</name>
  40604. <description>ACK response received/transmitted
  40605. interrupt</description>
  40606. <bitOffset>5</bitOffset>
  40607. <bitWidth>1</bitWidth>
  40608. </field>
  40609. <field> <name>NYET</name>
  40610. <description>Response received
  40611. interrupt</description>
  40612. <bitOffset>6</bitOffset>
  40613. <bitWidth>1</bitWidth>
  40614. </field>
  40615. <field> <name>TXERR</name>
  40616. <description>Transaction error</description>
  40617. <bitOffset>7</bitOffset>
  40618. <bitWidth>1</bitWidth>
  40619. </field>
  40620. <field> <name>BBERR</name>
  40621. <description>Babble error</description>
  40622. <bitOffset>8</bitOffset>
  40623. <bitWidth>1</bitWidth>
  40624. </field>
  40625. <field> <name>FRMOR</name>
  40626. <description>Frame overrun</description>
  40627. <bitOffset>9</bitOffset>
  40628. <bitWidth>1</bitWidth>
  40629. </field>
  40630. <field> <name>DTERR</name>
  40631. <description>Data toggle error</description>
  40632. <bitOffset>10</bitOffset>
  40633. <bitWidth>1</bitWidth>
  40634. </field>
  40635. </fields>
  40636. </register>
  40637. <register> <name>OTG_HS_HCINT7</name>
  40638. <displayName>OTG_HS_HCINT7</displayName>
  40639. <description>OTG_HS host channel-7 interrupt
  40640. register</description>
  40641. <addressOffset>0x1E8</addressOffset>
  40642. <size>32</size>
  40643. <access>read-write</access>
  40644. <resetValue>0x0</resetValue>
  40645. <fields>
  40646. <field> <name>XFRC</name>
  40647. <description>Transfer completed</description>
  40648. <bitOffset>0</bitOffset>
  40649. <bitWidth>1</bitWidth>
  40650. </field>
  40651. <field> <name>CHH</name>
  40652. <description>Channel halted</description>
  40653. <bitOffset>1</bitOffset>
  40654. <bitWidth>1</bitWidth>
  40655. </field>
  40656. <field> <name>AHBERR</name>
  40657. <description>AHB error</description>
  40658. <bitOffset>2</bitOffset>
  40659. <bitWidth>1</bitWidth>
  40660. </field>
  40661. <field> <name>STALL</name>
  40662. <description>STALL response received
  40663. interrupt</description>
  40664. <bitOffset>3</bitOffset>
  40665. <bitWidth>1</bitWidth>
  40666. </field>
  40667. <field> <name>NAK</name>
  40668. <description>NAK response received
  40669. interrupt</description>
  40670. <bitOffset>4</bitOffset>
  40671. <bitWidth>1</bitWidth>
  40672. </field>
  40673. <field> <name>ACK</name>
  40674. <description>ACK response received/transmitted
  40675. interrupt</description>
  40676. <bitOffset>5</bitOffset>
  40677. <bitWidth>1</bitWidth>
  40678. </field>
  40679. <field> <name>NYET</name>
  40680. <description>Response received
  40681. interrupt</description>
  40682. <bitOffset>6</bitOffset>
  40683. <bitWidth>1</bitWidth>
  40684. </field>
  40685. <field> <name>TXERR</name>
  40686. <description>Transaction error</description>
  40687. <bitOffset>7</bitOffset>
  40688. <bitWidth>1</bitWidth>
  40689. </field>
  40690. <field> <name>BBERR</name>
  40691. <description>Babble error</description>
  40692. <bitOffset>8</bitOffset>
  40693. <bitWidth>1</bitWidth>
  40694. </field>
  40695. <field> <name>FRMOR</name>
  40696. <description>Frame overrun</description>
  40697. <bitOffset>9</bitOffset>
  40698. <bitWidth>1</bitWidth>
  40699. </field>
  40700. <field> <name>DTERR</name>
  40701. <description>Data toggle error</description>
  40702. <bitOffset>10</bitOffset>
  40703. <bitWidth>1</bitWidth>
  40704. </field>
  40705. </fields>
  40706. </register>
  40707. <register> <name>OTG_HS_HCINT8</name>
  40708. <displayName>OTG_HS_HCINT8</displayName>
  40709. <description>OTG_HS host channel-8 interrupt
  40710. register</description>
  40711. <addressOffset>0x208</addressOffset>
  40712. <size>32</size>
  40713. <access>read-write</access>
  40714. <resetValue>0x0</resetValue>
  40715. <fields>
  40716. <field> <name>XFRC</name>
  40717. <description>Transfer completed</description>
  40718. <bitOffset>0</bitOffset>
  40719. <bitWidth>1</bitWidth>
  40720. </field>
  40721. <field> <name>CHH</name>
  40722. <description>Channel halted</description>
  40723. <bitOffset>1</bitOffset>
  40724. <bitWidth>1</bitWidth>
  40725. </field>
  40726. <field> <name>AHBERR</name>
  40727. <description>AHB error</description>
  40728. <bitOffset>2</bitOffset>
  40729. <bitWidth>1</bitWidth>
  40730. </field>
  40731. <field> <name>STALL</name>
  40732. <description>STALL response received
  40733. interrupt</description>
  40734. <bitOffset>3</bitOffset>
  40735. <bitWidth>1</bitWidth>
  40736. </field>
  40737. <field> <name>NAK</name>
  40738. <description>NAK response received
  40739. interrupt</description>
  40740. <bitOffset>4</bitOffset>
  40741. <bitWidth>1</bitWidth>
  40742. </field>
  40743. <field> <name>ACK</name>
  40744. <description>ACK response received/transmitted
  40745. interrupt</description>
  40746. <bitOffset>5</bitOffset>
  40747. <bitWidth>1</bitWidth>
  40748. </field>
  40749. <field> <name>NYET</name>
  40750. <description>Response received
  40751. interrupt</description>
  40752. <bitOffset>6</bitOffset>
  40753. <bitWidth>1</bitWidth>
  40754. </field>
  40755. <field> <name>TXERR</name>
  40756. <description>Transaction error</description>
  40757. <bitOffset>7</bitOffset>
  40758. <bitWidth>1</bitWidth>
  40759. </field>
  40760. <field> <name>BBERR</name>
  40761. <description>Babble error</description>
  40762. <bitOffset>8</bitOffset>
  40763. <bitWidth>1</bitWidth>
  40764. </field>
  40765. <field> <name>FRMOR</name>
  40766. <description>Frame overrun</description>
  40767. <bitOffset>9</bitOffset>
  40768. <bitWidth>1</bitWidth>
  40769. </field>
  40770. <field> <name>DTERR</name>
  40771. <description>Data toggle error</description>
  40772. <bitOffset>10</bitOffset>
  40773. <bitWidth>1</bitWidth>
  40774. </field>
  40775. </fields>
  40776. </register>
  40777. <register> <name>OTG_HS_HCINT9</name>
  40778. <displayName>OTG_HS_HCINT9</displayName>
  40779. <description>OTG_HS host channel-9 interrupt
  40780. register</description>
  40781. <addressOffset>0x228</addressOffset>
  40782. <size>32</size>
  40783. <access>read-write</access>
  40784. <resetValue>0x0</resetValue>
  40785. <fields>
  40786. <field> <name>XFRC</name>
  40787. <description>Transfer completed</description>
  40788. <bitOffset>0</bitOffset>
  40789. <bitWidth>1</bitWidth>
  40790. </field>
  40791. <field> <name>CHH</name>
  40792. <description>Channel halted</description>
  40793. <bitOffset>1</bitOffset>
  40794. <bitWidth>1</bitWidth>
  40795. </field>
  40796. <field> <name>AHBERR</name>
  40797. <description>AHB error</description>
  40798. <bitOffset>2</bitOffset>
  40799. <bitWidth>1</bitWidth>
  40800. </field>
  40801. <field> <name>STALL</name>
  40802. <description>STALL response received
  40803. interrupt</description>
  40804. <bitOffset>3</bitOffset>
  40805. <bitWidth>1</bitWidth>
  40806. </field>
  40807. <field> <name>NAK</name>
  40808. <description>NAK response received
  40809. interrupt</description>
  40810. <bitOffset>4</bitOffset>
  40811. <bitWidth>1</bitWidth>
  40812. </field>
  40813. <field> <name>ACK</name>
  40814. <description>ACK response received/transmitted
  40815. interrupt</description>
  40816. <bitOffset>5</bitOffset>
  40817. <bitWidth>1</bitWidth>
  40818. </field>
  40819. <field> <name>NYET</name>
  40820. <description>Response received
  40821. interrupt</description>
  40822. <bitOffset>6</bitOffset>
  40823. <bitWidth>1</bitWidth>
  40824. </field>
  40825. <field> <name>TXERR</name>
  40826. <description>Transaction error</description>
  40827. <bitOffset>7</bitOffset>
  40828. <bitWidth>1</bitWidth>
  40829. </field>
  40830. <field> <name>BBERR</name>
  40831. <description>Babble error</description>
  40832. <bitOffset>8</bitOffset>
  40833. <bitWidth>1</bitWidth>
  40834. </field>
  40835. <field> <name>FRMOR</name>
  40836. <description>Frame overrun</description>
  40837. <bitOffset>9</bitOffset>
  40838. <bitWidth>1</bitWidth>
  40839. </field>
  40840. <field> <name>DTERR</name>
  40841. <description>Data toggle error</description>
  40842. <bitOffset>10</bitOffset>
  40843. <bitWidth>1</bitWidth>
  40844. </field>
  40845. </fields>
  40846. </register>
  40847. <register> <name>OTG_HS_HCINT10</name>
  40848. <displayName>OTG_HS_HCINT10</displayName>
  40849. <description>OTG_HS host channel-10 interrupt
  40850. register</description>
  40851. <addressOffset>0x248</addressOffset>
  40852. <size>32</size>
  40853. <access>read-write</access>
  40854. <resetValue>0x0</resetValue>
  40855. <fields>
  40856. <field> <name>XFRC</name>
  40857. <description>Transfer completed</description>
  40858. <bitOffset>0</bitOffset>
  40859. <bitWidth>1</bitWidth>
  40860. </field>
  40861. <field> <name>CHH</name>
  40862. <description>Channel halted</description>
  40863. <bitOffset>1</bitOffset>
  40864. <bitWidth>1</bitWidth>
  40865. </field>
  40866. <field> <name>AHBERR</name>
  40867. <description>AHB error</description>
  40868. <bitOffset>2</bitOffset>
  40869. <bitWidth>1</bitWidth>
  40870. </field>
  40871. <field> <name>STALL</name>
  40872. <description>STALL response received
  40873. interrupt</description>
  40874. <bitOffset>3</bitOffset>
  40875. <bitWidth>1</bitWidth>
  40876. </field>
  40877. <field> <name>NAK</name>
  40878. <description>NAK response received
  40879. interrupt</description>
  40880. <bitOffset>4</bitOffset>
  40881. <bitWidth>1</bitWidth>
  40882. </field>
  40883. <field> <name>ACK</name>
  40884. <description>ACK response received/transmitted
  40885. interrupt</description>
  40886. <bitOffset>5</bitOffset>
  40887. <bitWidth>1</bitWidth>
  40888. </field>
  40889. <field> <name>NYET</name>
  40890. <description>Response received
  40891. interrupt</description>
  40892. <bitOffset>6</bitOffset>
  40893. <bitWidth>1</bitWidth>
  40894. </field>
  40895. <field> <name>TXERR</name>
  40896. <description>Transaction error</description>
  40897. <bitOffset>7</bitOffset>
  40898. <bitWidth>1</bitWidth>
  40899. </field>
  40900. <field> <name>BBERR</name>
  40901. <description>Babble error</description>
  40902. <bitOffset>8</bitOffset>
  40903. <bitWidth>1</bitWidth>
  40904. </field>
  40905. <field> <name>FRMOR</name>
  40906. <description>Frame overrun</description>
  40907. <bitOffset>9</bitOffset>
  40908. <bitWidth>1</bitWidth>
  40909. </field>
  40910. <field> <name>DTERR</name>
  40911. <description>Data toggle error</description>
  40912. <bitOffset>10</bitOffset>
  40913. <bitWidth>1</bitWidth>
  40914. </field>
  40915. </fields>
  40916. </register>
  40917. <register> <name>OTG_HS_HCINT11</name>
  40918. <displayName>OTG_HS_HCINT11</displayName>
  40919. <description>OTG_HS host channel-11 interrupt
  40920. register</description>
  40921. <addressOffset>0x268</addressOffset>
  40922. <size>32</size>
  40923. <access>read-write</access>
  40924. <resetValue>0x0</resetValue>
  40925. <fields>
  40926. <field> <name>XFRC</name>
  40927. <description>Transfer completed</description>
  40928. <bitOffset>0</bitOffset>
  40929. <bitWidth>1</bitWidth>
  40930. </field>
  40931. <field> <name>CHH</name>
  40932. <description>Channel halted</description>
  40933. <bitOffset>1</bitOffset>
  40934. <bitWidth>1</bitWidth>
  40935. </field>
  40936. <field> <name>AHBERR</name>
  40937. <description>AHB error</description>
  40938. <bitOffset>2</bitOffset>
  40939. <bitWidth>1</bitWidth>
  40940. </field>
  40941. <field> <name>STALL</name>
  40942. <description>STALL response received
  40943. interrupt</description>
  40944. <bitOffset>3</bitOffset>
  40945. <bitWidth>1</bitWidth>
  40946. </field>
  40947. <field> <name>NAK</name>
  40948. <description>NAK response received
  40949. interrupt</description>
  40950. <bitOffset>4</bitOffset>
  40951. <bitWidth>1</bitWidth>
  40952. </field>
  40953. <field> <name>ACK</name>
  40954. <description>ACK response received/transmitted
  40955. interrupt</description>
  40956. <bitOffset>5</bitOffset>
  40957. <bitWidth>1</bitWidth>
  40958. </field>
  40959. <field> <name>NYET</name>
  40960. <description>Response received
  40961. interrupt</description>
  40962. <bitOffset>6</bitOffset>
  40963. <bitWidth>1</bitWidth>
  40964. </field>
  40965. <field> <name>TXERR</name>
  40966. <description>Transaction error</description>
  40967. <bitOffset>7</bitOffset>
  40968. <bitWidth>1</bitWidth>
  40969. </field>
  40970. <field> <name>BBERR</name>
  40971. <description>Babble error</description>
  40972. <bitOffset>8</bitOffset>
  40973. <bitWidth>1</bitWidth>
  40974. </field>
  40975. <field> <name>FRMOR</name>
  40976. <description>Frame overrun</description>
  40977. <bitOffset>9</bitOffset>
  40978. <bitWidth>1</bitWidth>
  40979. </field>
  40980. <field> <name>DTERR</name>
  40981. <description>Data toggle error</description>
  40982. <bitOffset>10</bitOffset>
  40983. <bitWidth>1</bitWidth>
  40984. </field>
  40985. </fields>
  40986. </register>
  40987. <register> <name>OTG_HS_HCINTMSK0</name>
  40988. <displayName>OTG_HS_HCINTMSK0</displayName>
  40989. <description>OTG_HS host channel-11 interrupt mask
  40990. register</description>
  40991. <addressOffset>0x10C</addressOffset>
  40992. <size>32</size>
  40993. <access>read-write</access>
  40994. <resetValue>0x0</resetValue>
  40995. <fields>
  40996. <field> <name>XFRCM</name>
  40997. <description>Transfer completed mask</description>
  40998. <bitOffset>0</bitOffset>
  40999. <bitWidth>1</bitWidth>
  41000. </field>
  41001. <field> <name>CHHM</name>
  41002. <description>Channel halted mask</description>
  41003. <bitOffset>1</bitOffset>
  41004. <bitWidth>1</bitWidth>
  41005. </field>
  41006. <field> <name>AHBERR</name>
  41007. <description>AHB error</description>
  41008. <bitOffset>2</bitOffset>
  41009. <bitWidth>1</bitWidth>
  41010. </field>
  41011. <field> <name>STALLM</name>
  41012. <description>STALL response received interrupt
  41013. mask</description>
  41014. <bitOffset>3</bitOffset>
  41015. <bitWidth>1</bitWidth>
  41016. </field>
  41017. <field> <name>NAKM</name>
  41018. <description>NAK response received interrupt
  41019. mask</description>
  41020. <bitOffset>4</bitOffset>
  41021. <bitWidth>1</bitWidth>
  41022. </field>
  41023. <field> <name>ACKM</name>
  41024. <description>ACK response received/transmitted
  41025. interrupt mask</description>
  41026. <bitOffset>5</bitOffset>
  41027. <bitWidth>1</bitWidth>
  41028. </field>
  41029. <field> <name>NYET</name>
  41030. <description>response received interrupt
  41031. mask</description>
  41032. <bitOffset>6</bitOffset>
  41033. <bitWidth>1</bitWidth>
  41034. </field>
  41035. <field> <name>TXERRM</name>
  41036. <description>Transaction error mask</description>
  41037. <bitOffset>7</bitOffset>
  41038. <bitWidth>1</bitWidth>
  41039. </field>
  41040. <field> <name>BBERRM</name>
  41041. <description>Babble error mask</description>
  41042. <bitOffset>8</bitOffset>
  41043. <bitWidth>1</bitWidth>
  41044. </field>
  41045. <field> <name>FRMORM</name>
  41046. <description>Frame overrun mask</description>
  41047. <bitOffset>9</bitOffset>
  41048. <bitWidth>1</bitWidth>
  41049. </field>
  41050. <field> <name>DTERRM</name>
  41051. <description>Data toggle error mask</description>
  41052. <bitOffset>10</bitOffset>
  41053. <bitWidth>1</bitWidth>
  41054. </field>
  41055. </fields>
  41056. </register>
  41057. <register> <name>OTG_HS_HCINTMSK1</name>
  41058. <displayName>OTG_HS_HCINTMSK1</displayName>
  41059. <description>OTG_HS host channel-1 interrupt mask
  41060. register</description>
  41061. <addressOffset>0x12C</addressOffset>
  41062. <size>32</size>
  41063. <access>read-write</access>
  41064. <resetValue>0x0</resetValue>
  41065. <fields>
  41066. <field> <name>XFRCM</name>
  41067. <description>Transfer completed mask</description>
  41068. <bitOffset>0</bitOffset>
  41069. <bitWidth>1</bitWidth>
  41070. </field>
  41071. <field> <name>CHHM</name>
  41072. <description>Channel halted mask</description>
  41073. <bitOffset>1</bitOffset>
  41074. <bitWidth>1</bitWidth>
  41075. </field>
  41076. <field> <name>AHBERR</name>
  41077. <description>AHB error</description>
  41078. <bitOffset>2</bitOffset>
  41079. <bitWidth>1</bitWidth>
  41080. </field>
  41081. <field> <name>STALLM</name>
  41082. <description>STALL response received interrupt
  41083. mask</description>
  41084. <bitOffset>3</bitOffset>
  41085. <bitWidth>1</bitWidth>
  41086. </field>
  41087. <field> <name>NAKM</name>
  41088. <description>NAK response received interrupt
  41089. mask</description>
  41090. <bitOffset>4</bitOffset>
  41091. <bitWidth>1</bitWidth>
  41092. </field>
  41093. <field> <name>ACKM</name>
  41094. <description>ACK response received/transmitted
  41095. interrupt mask</description>
  41096. <bitOffset>5</bitOffset>
  41097. <bitWidth>1</bitWidth>
  41098. </field>
  41099. <field> <name>NYET</name>
  41100. <description>response received interrupt
  41101. mask</description>
  41102. <bitOffset>6</bitOffset>
  41103. <bitWidth>1</bitWidth>
  41104. </field>
  41105. <field> <name>TXERRM</name>
  41106. <description>Transaction error mask</description>
  41107. <bitOffset>7</bitOffset>
  41108. <bitWidth>1</bitWidth>
  41109. </field>
  41110. <field> <name>BBERRM</name>
  41111. <description>Babble error mask</description>
  41112. <bitOffset>8</bitOffset>
  41113. <bitWidth>1</bitWidth>
  41114. </field>
  41115. <field> <name>FRMORM</name>
  41116. <description>Frame overrun mask</description>
  41117. <bitOffset>9</bitOffset>
  41118. <bitWidth>1</bitWidth>
  41119. </field>
  41120. <field> <name>DTERRM</name>
  41121. <description>Data toggle error mask</description>
  41122. <bitOffset>10</bitOffset>
  41123. <bitWidth>1</bitWidth>
  41124. </field>
  41125. </fields>
  41126. </register>
  41127. <register> <name>OTG_HS_HCINTMSK2</name>
  41128. <displayName>OTG_HS_HCINTMSK2</displayName>
  41129. <description>OTG_HS host channel-2 interrupt mask
  41130. register</description>
  41131. <addressOffset>0x14C</addressOffset>
  41132. <size>32</size>
  41133. <access>read-write</access>
  41134. <resetValue>0x0</resetValue>
  41135. <fields>
  41136. <field> <name>XFRCM</name>
  41137. <description>Transfer completed mask</description>
  41138. <bitOffset>0</bitOffset>
  41139. <bitWidth>1</bitWidth>
  41140. </field>
  41141. <field> <name>CHHM</name>
  41142. <description>Channel halted mask</description>
  41143. <bitOffset>1</bitOffset>
  41144. <bitWidth>1</bitWidth>
  41145. </field>
  41146. <field> <name>AHBERR</name>
  41147. <description>AHB error</description>
  41148. <bitOffset>2</bitOffset>
  41149. <bitWidth>1</bitWidth>
  41150. </field>
  41151. <field> <name>STALLM</name>
  41152. <description>STALL response received interrupt
  41153. mask</description>
  41154. <bitOffset>3</bitOffset>
  41155. <bitWidth>1</bitWidth>
  41156. </field>
  41157. <field> <name>NAKM</name>
  41158. <description>NAK response received interrupt
  41159. mask</description>
  41160. <bitOffset>4</bitOffset>
  41161. <bitWidth>1</bitWidth>
  41162. </field>
  41163. <field> <name>ACKM</name>
  41164. <description>ACK response received/transmitted
  41165. interrupt mask</description>
  41166. <bitOffset>5</bitOffset>
  41167. <bitWidth>1</bitWidth>
  41168. </field>
  41169. <field> <name>NYET</name>
  41170. <description>response received interrupt
  41171. mask</description>
  41172. <bitOffset>6</bitOffset>
  41173. <bitWidth>1</bitWidth>
  41174. </field>
  41175. <field> <name>TXERRM</name>
  41176. <description>Transaction error mask</description>
  41177. <bitOffset>7</bitOffset>
  41178. <bitWidth>1</bitWidth>
  41179. </field>
  41180. <field> <name>BBERRM</name>
  41181. <description>Babble error mask</description>
  41182. <bitOffset>8</bitOffset>
  41183. <bitWidth>1</bitWidth>
  41184. </field>
  41185. <field> <name>FRMORM</name>
  41186. <description>Frame overrun mask</description>
  41187. <bitOffset>9</bitOffset>
  41188. <bitWidth>1</bitWidth>
  41189. </field>
  41190. <field> <name>DTERRM</name>
  41191. <description>Data toggle error mask</description>
  41192. <bitOffset>10</bitOffset>
  41193. <bitWidth>1</bitWidth>
  41194. </field>
  41195. </fields>
  41196. </register>
  41197. <register> <name>OTG_HS_HCINTMSK3</name>
  41198. <displayName>OTG_HS_HCINTMSK3</displayName>
  41199. <description>OTG_HS host channel-3 interrupt mask
  41200. register</description>
  41201. <addressOffset>0x16C</addressOffset>
  41202. <size>32</size>
  41203. <access>read-write</access>
  41204. <resetValue>0x0</resetValue>
  41205. <fields>
  41206. <field> <name>XFRCM</name>
  41207. <description>Transfer completed mask</description>
  41208. <bitOffset>0</bitOffset>
  41209. <bitWidth>1</bitWidth>
  41210. </field>
  41211. <field> <name>CHHM</name>
  41212. <description>Channel halted mask</description>
  41213. <bitOffset>1</bitOffset>
  41214. <bitWidth>1</bitWidth>
  41215. </field>
  41216. <field> <name>AHBERR</name>
  41217. <description>AHB error</description>
  41218. <bitOffset>2</bitOffset>
  41219. <bitWidth>1</bitWidth>
  41220. </field>
  41221. <field> <name>STALLM</name>
  41222. <description>STALL response received interrupt
  41223. mask</description>
  41224. <bitOffset>3</bitOffset>
  41225. <bitWidth>1</bitWidth>
  41226. </field>
  41227. <field> <name>NAKM</name>
  41228. <description>NAK response received interrupt
  41229. mask</description>
  41230. <bitOffset>4</bitOffset>
  41231. <bitWidth>1</bitWidth>
  41232. </field>
  41233. <field> <name>ACKM</name>
  41234. <description>ACK response received/transmitted
  41235. interrupt mask</description>
  41236. <bitOffset>5</bitOffset>
  41237. <bitWidth>1</bitWidth>
  41238. </field>
  41239. <field> <name>NYET</name>
  41240. <description>response received interrupt
  41241. mask</description>
  41242. <bitOffset>6</bitOffset>
  41243. <bitWidth>1</bitWidth>
  41244. </field>
  41245. <field> <name>TXERRM</name>
  41246. <description>Transaction error mask</description>
  41247. <bitOffset>7</bitOffset>
  41248. <bitWidth>1</bitWidth>
  41249. </field>
  41250. <field> <name>BBERRM</name>
  41251. <description>Babble error mask</description>
  41252. <bitOffset>8</bitOffset>
  41253. <bitWidth>1</bitWidth>
  41254. </field>
  41255. <field> <name>FRMORM</name>
  41256. <description>Frame overrun mask</description>
  41257. <bitOffset>9</bitOffset>
  41258. <bitWidth>1</bitWidth>
  41259. </field>
  41260. <field> <name>DTERRM</name>
  41261. <description>Data toggle error mask</description>
  41262. <bitOffset>10</bitOffset>
  41263. <bitWidth>1</bitWidth>
  41264. </field>
  41265. </fields>
  41266. </register>
  41267. <register> <name>OTG_HS_HCINTMSK4</name>
  41268. <displayName>OTG_HS_HCINTMSK4</displayName>
  41269. <description>OTG_HS host channel-4 interrupt mask
  41270. register</description>
  41271. <addressOffset>0x18C</addressOffset>
  41272. <size>32</size>
  41273. <access>read-write</access>
  41274. <resetValue>0x0</resetValue>
  41275. <fields>
  41276. <field> <name>XFRCM</name>
  41277. <description>Transfer completed mask</description>
  41278. <bitOffset>0</bitOffset>
  41279. <bitWidth>1</bitWidth>
  41280. </field>
  41281. <field> <name>CHHM</name>
  41282. <description>Channel halted mask</description>
  41283. <bitOffset>1</bitOffset>
  41284. <bitWidth>1</bitWidth>
  41285. </field>
  41286. <field> <name>AHBERR</name>
  41287. <description>AHB error</description>
  41288. <bitOffset>2</bitOffset>
  41289. <bitWidth>1</bitWidth>
  41290. </field>
  41291. <field> <name>STALLM</name>
  41292. <description>STALL response received interrupt
  41293. mask</description>
  41294. <bitOffset>3</bitOffset>
  41295. <bitWidth>1</bitWidth>
  41296. </field>
  41297. <field> <name>NAKM</name>
  41298. <description>NAK response received interrupt
  41299. mask</description>
  41300. <bitOffset>4</bitOffset>
  41301. <bitWidth>1</bitWidth>
  41302. </field>
  41303. <field> <name>ACKM</name>
  41304. <description>ACK response received/transmitted
  41305. interrupt mask</description>
  41306. <bitOffset>5</bitOffset>
  41307. <bitWidth>1</bitWidth>
  41308. </field>
  41309. <field> <name>NYET</name>
  41310. <description>response received interrupt
  41311. mask</description>
  41312. <bitOffset>6</bitOffset>
  41313. <bitWidth>1</bitWidth>
  41314. </field>
  41315. <field> <name>TXERRM</name>
  41316. <description>Transaction error mask</description>
  41317. <bitOffset>7</bitOffset>
  41318. <bitWidth>1</bitWidth>
  41319. </field>
  41320. <field> <name>BBERRM</name>
  41321. <description>Babble error mask</description>
  41322. <bitOffset>8</bitOffset>
  41323. <bitWidth>1</bitWidth>
  41324. </field>
  41325. <field> <name>FRMORM</name>
  41326. <description>Frame overrun mask</description>
  41327. <bitOffset>9</bitOffset>
  41328. <bitWidth>1</bitWidth>
  41329. </field>
  41330. <field> <name>DTERRM</name>
  41331. <description>Data toggle error mask</description>
  41332. <bitOffset>10</bitOffset>
  41333. <bitWidth>1</bitWidth>
  41334. </field>
  41335. </fields>
  41336. </register>
  41337. <register> <name>OTG_HS_HCINTMSK5</name>
  41338. <displayName>OTG_HS_HCINTMSK5</displayName>
  41339. <description>OTG_HS host channel-5 interrupt mask
  41340. register</description>
  41341. <addressOffset>0x1AC</addressOffset>
  41342. <size>32</size>
  41343. <access>read-write</access>
  41344. <resetValue>0x0</resetValue>
  41345. <fields>
  41346. <field> <name>XFRCM</name>
  41347. <description>Transfer completed mask</description>
  41348. <bitOffset>0</bitOffset>
  41349. <bitWidth>1</bitWidth>
  41350. </field>
  41351. <field> <name>CHHM</name>
  41352. <description>Channel halted mask</description>
  41353. <bitOffset>1</bitOffset>
  41354. <bitWidth>1</bitWidth>
  41355. </field>
  41356. <field> <name>AHBERR</name>
  41357. <description>AHB error</description>
  41358. <bitOffset>2</bitOffset>
  41359. <bitWidth>1</bitWidth>
  41360. </field>
  41361. <field> <name>STALLM</name>
  41362. <description>STALL response received interrupt
  41363. mask</description>
  41364. <bitOffset>3</bitOffset>
  41365. <bitWidth>1</bitWidth>
  41366. </field>
  41367. <field> <name>NAKM</name>
  41368. <description>NAK response received interrupt
  41369. mask</description>
  41370. <bitOffset>4</bitOffset>
  41371. <bitWidth>1</bitWidth>
  41372. </field>
  41373. <field> <name>ACKM</name>
  41374. <description>ACK response received/transmitted
  41375. interrupt mask</description>
  41376. <bitOffset>5</bitOffset>
  41377. <bitWidth>1</bitWidth>
  41378. </field>
  41379. <field> <name>NYET</name>
  41380. <description>response received interrupt
  41381. mask</description>
  41382. <bitOffset>6</bitOffset>
  41383. <bitWidth>1</bitWidth>
  41384. </field>
  41385. <field> <name>TXERRM</name>
  41386. <description>Transaction error mask</description>
  41387. <bitOffset>7</bitOffset>
  41388. <bitWidth>1</bitWidth>
  41389. </field>
  41390. <field> <name>BBERRM</name>
  41391. <description>Babble error mask</description>
  41392. <bitOffset>8</bitOffset>
  41393. <bitWidth>1</bitWidth>
  41394. </field>
  41395. <field> <name>FRMORM</name>
  41396. <description>Frame overrun mask</description>
  41397. <bitOffset>9</bitOffset>
  41398. <bitWidth>1</bitWidth>
  41399. </field>
  41400. <field> <name>DTERRM</name>
  41401. <description>Data toggle error mask</description>
  41402. <bitOffset>10</bitOffset>
  41403. <bitWidth>1</bitWidth>
  41404. </field>
  41405. </fields>
  41406. </register>
  41407. <register> <name>OTG_HS_HCINTMSK6</name>
  41408. <displayName>OTG_HS_HCINTMSK6</displayName>
  41409. <description>OTG_HS host channel-6 interrupt mask
  41410. register</description>
  41411. <addressOffset>0x1CC</addressOffset>
  41412. <size>32</size>
  41413. <access>read-write</access>
  41414. <resetValue>0x0</resetValue>
  41415. <fields>
  41416. <field> <name>XFRCM</name>
  41417. <description>Transfer completed mask</description>
  41418. <bitOffset>0</bitOffset>
  41419. <bitWidth>1</bitWidth>
  41420. </field>
  41421. <field> <name>CHHM</name>
  41422. <description>Channel halted mask</description>
  41423. <bitOffset>1</bitOffset>
  41424. <bitWidth>1</bitWidth>
  41425. </field>
  41426. <field> <name>AHBERR</name>
  41427. <description>AHB error</description>
  41428. <bitOffset>2</bitOffset>
  41429. <bitWidth>1</bitWidth>
  41430. </field>
  41431. <field> <name>STALLM</name>
  41432. <description>STALL response received interrupt
  41433. mask</description>
  41434. <bitOffset>3</bitOffset>
  41435. <bitWidth>1</bitWidth>
  41436. </field>
  41437. <field> <name>NAKM</name>
  41438. <description>NAK response received interrupt
  41439. mask</description>
  41440. <bitOffset>4</bitOffset>
  41441. <bitWidth>1</bitWidth>
  41442. </field>
  41443. <field> <name>ACKM</name>
  41444. <description>ACK response received/transmitted
  41445. interrupt mask</description>
  41446. <bitOffset>5</bitOffset>
  41447. <bitWidth>1</bitWidth>
  41448. </field>
  41449. <field> <name>NYET</name>
  41450. <description>response received interrupt
  41451. mask</description>
  41452. <bitOffset>6</bitOffset>
  41453. <bitWidth>1</bitWidth>
  41454. </field>
  41455. <field> <name>TXERRM</name>
  41456. <description>Transaction error mask</description>
  41457. <bitOffset>7</bitOffset>
  41458. <bitWidth>1</bitWidth>
  41459. </field>
  41460. <field> <name>BBERRM</name>
  41461. <description>Babble error mask</description>
  41462. <bitOffset>8</bitOffset>
  41463. <bitWidth>1</bitWidth>
  41464. </field>
  41465. <field> <name>FRMORM</name>
  41466. <description>Frame overrun mask</description>
  41467. <bitOffset>9</bitOffset>
  41468. <bitWidth>1</bitWidth>
  41469. </field>
  41470. <field> <name>DTERRM</name>
  41471. <description>Data toggle error mask</description>
  41472. <bitOffset>10</bitOffset>
  41473. <bitWidth>1</bitWidth>
  41474. </field>
  41475. </fields>
  41476. </register>
  41477. <register> <name>OTG_HS_HCINTMSK7</name>
  41478. <displayName>OTG_HS_HCINTMSK7</displayName>
  41479. <description>OTG_HS host channel-7 interrupt mask
  41480. register</description>
  41481. <addressOffset>0x1EC</addressOffset>
  41482. <size>32</size>
  41483. <access>read-write</access>
  41484. <resetValue>0x0</resetValue>
  41485. <fields>
  41486. <field> <name>XFRCM</name>
  41487. <description>Transfer completed mask</description>
  41488. <bitOffset>0</bitOffset>
  41489. <bitWidth>1</bitWidth>
  41490. </field>
  41491. <field> <name>CHHM</name>
  41492. <description>Channel halted mask</description>
  41493. <bitOffset>1</bitOffset>
  41494. <bitWidth>1</bitWidth>
  41495. </field>
  41496. <field> <name>AHBERR</name>
  41497. <description>AHB error</description>
  41498. <bitOffset>2</bitOffset>
  41499. <bitWidth>1</bitWidth>
  41500. </field>
  41501. <field> <name>STALLM</name>
  41502. <description>STALL response received interrupt
  41503. mask</description>
  41504. <bitOffset>3</bitOffset>
  41505. <bitWidth>1</bitWidth>
  41506. </field>
  41507. <field> <name>NAKM</name>
  41508. <description>NAK response received interrupt
  41509. mask</description>
  41510. <bitOffset>4</bitOffset>
  41511. <bitWidth>1</bitWidth>
  41512. </field>
  41513. <field> <name>ACKM</name>
  41514. <description>ACK response received/transmitted
  41515. interrupt mask</description>
  41516. <bitOffset>5</bitOffset>
  41517. <bitWidth>1</bitWidth>
  41518. </field>
  41519. <field> <name>NYET</name>
  41520. <description>response received interrupt
  41521. mask</description>
  41522. <bitOffset>6</bitOffset>
  41523. <bitWidth>1</bitWidth>
  41524. </field>
  41525. <field> <name>TXERRM</name>
  41526. <description>Transaction error mask</description>
  41527. <bitOffset>7</bitOffset>
  41528. <bitWidth>1</bitWidth>
  41529. </field>
  41530. <field> <name>BBERRM</name>
  41531. <description>Babble error mask</description>
  41532. <bitOffset>8</bitOffset>
  41533. <bitWidth>1</bitWidth>
  41534. </field>
  41535. <field> <name>FRMORM</name>
  41536. <description>Frame overrun mask</description>
  41537. <bitOffset>9</bitOffset>
  41538. <bitWidth>1</bitWidth>
  41539. </field>
  41540. <field> <name>DTERRM</name>
  41541. <description>Data toggle error mask</description>
  41542. <bitOffset>10</bitOffset>
  41543. <bitWidth>1</bitWidth>
  41544. </field>
  41545. </fields>
  41546. </register>
  41547. <register> <name>OTG_HS_HCINTMSK8</name>
  41548. <displayName>OTG_HS_HCINTMSK8</displayName>
  41549. <description>OTG_HS host channel-8 interrupt mask
  41550. register</description>
  41551. <addressOffset>0x20C</addressOffset>
  41552. <size>32</size>
  41553. <access>read-write</access>
  41554. <resetValue>0x0</resetValue>
  41555. <fields>
  41556. <field> <name>XFRCM</name>
  41557. <description>Transfer completed mask</description>
  41558. <bitOffset>0</bitOffset>
  41559. <bitWidth>1</bitWidth>
  41560. </field>
  41561. <field> <name>CHHM</name>
  41562. <description>Channel halted mask</description>
  41563. <bitOffset>1</bitOffset>
  41564. <bitWidth>1</bitWidth>
  41565. </field>
  41566. <field> <name>AHBERR</name>
  41567. <description>AHB error</description>
  41568. <bitOffset>2</bitOffset>
  41569. <bitWidth>1</bitWidth>
  41570. </field>
  41571. <field> <name>STALLM</name>
  41572. <description>STALL response received interrupt
  41573. mask</description>
  41574. <bitOffset>3</bitOffset>
  41575. <bitWidth>1</bitWidth>
  41576. </field>
  41577. <field> <name>NAKM</name>
  41578. <description>NAK response received interrupt
  41579. mask</description>
  41580. <bitOffset>4</bitOffset>
  41581. <bitWidth>1</bitWidth>
  41582. </field>
  41583. <field> <name>ACKM</name>
  41584. <description>ACK response received/transmitted
  41585. interrupt mask</description>
  41586. <bitOffset>5</bitOffset>
  41587. <bitWidth>1</bitWidth>
  41588. </field>
  41589. <field> <name>NYET</name>
  41590. <description>response received interrupt
  41591. mask</description>
  41592. <bitOffset>6</bitOffset>
  41593. <bitWidth>1</bitWidth>
  41594. </field>
  41595. <field> <name>TXERRM</name>
  41596. <description>Transaction error mask</description>
  41597. <bitOffset>7</bitOffset>
  41598. <bitWidth>1</bitWidth>
  41599. </field>
  41600. <field> <name>BBERRM</name>
  41601. <description>Babble error mask</description>
  41602. <bitOffset>8</bitOffset>
  41603. <bitWidth>1</bitWidth>
  41604. </field>
  41605. <field> <name>FRMORM</name>
  41606. <description>Frame overrun mask</description>
  41607. <bitOffset>9</bitOffset>
  41608. <bitWidth>1</bitWidth>
  41609. </field>
  41610. <field> <name>DTERRM</name>
  41611. <description>Data toggle error mask</description>
  41612. <bitOffset>10</bitOffset>
  41613. <bitWidth>1</bitWidth>
  41614. </field>
  41615. </fields>
  41616. </register>
  41617. <register> <name>OTG_HS_HCINTMSK9</name>
  41618. <displayName>OTG_HS_HCINTMSK9</displayName>
  41619. <description>OTG_HS host channel-9 interrupt mask
  41620. register</description>
  41621. <addressOffset>0x22C</addressOffset>
  41622. <size>32</size>
  41623. <access>read-write</access>
  41624. <resetValue>0x0</resetValue>
  41625. <fields>
  41626. <field> <name>XFRCM</name>
  41627. <description>Transfer completed mask</description>
  41628. <bitOffset>0</bitOffset>
  41629. <bitWidth>1</bitWidth>
  41630. </field>
  41631. <field> <name>CHHM</name>
  41632. <description>Channel halted mask</description>
  41633. <bitOffset>1</bitOffset>
  41634. <bitWidth>1</bitWidth>
  41635. </field>
  41636. <field> <name>AHBERR</name>
  41637. <description>AHB error</description>
  41638. <bitOffset>2</bitOffset>
  41639. <bitWidth>1</bitWidth>
  41640. </field>
  41641. <field> <name>STALLM</name>
  41642. <description>STALL response received interrupt
  41643. mask</description>
  41644. <bitOffset>3</bitOffset>
  41645. <bitWidth>1</bitWidth>
  41646. </field>
  41647. <field> <name>NAKM</name>
  41648. <description>NAK response received interrupt
  41649. mask</description>
  41650. <bitOffset>4</bitOffset>
  41651. <bitWidth>1</bitWidth>
  41652. </field>
  41653. <field> <name>ACKM</name>
  41654. <description>ACK response received/transmitted
  41655. interrupt mask</description>
  41656. <bitOffset>5</bitOffset>
  41657. <bitWidth>1</bitWidth>
  41658. </field>
  41659. <field> <name>NYET</name>
  41660. <description>response received interrupt
  41661. mask</description>
  41662. <bitOffset>6</bitOffset>
  41663. <bitWidth>1</bitWidth>
  41664. </field>
  41665. <field> <name>TXERRM</name>
  41666. <description>Transaction error mask</description>
  41667. <bitOffset>7</bitOffset>
  41668. <bitWidth>1</bitWidth>
  41669. </field>
  41670. <field> <name>BBERRM</name>
  41671. <description>Babble error mask</description>
  41672. <bitOffset>8</bitOffset>
  41673. <bitWidth>1</bitWidth>
  41674. </field>
  41675. <field> <name>FRMORM</name>
  41676. <description>Frame overrun mask</description>
  41677. <bitOffset>9</bitOffset>
  41678. <bitWidth>1</bitWidth>
  41679. </field>
  41680. <field> <name>DTERRM</name>
  41681. <description>Data toggle error mask</description>
  41682. <bitOffset>10</bitOffset>
  41683. <bitWidth>1</bitWidth>
  41684. </field>
  41685. </fields>
  41686. </register>
  41687. <register> <name>OTG_HS_HCINTMSK10</name>
  41688. <displayName>OTG_HS_HCINTMSK10</displayName>
  41689. <description>OTG_HS host channel-10 interrupt mask
  41690. register</description>
  41691. <addressOffset>0x24C</addressOffset>
  41692. <size>32</size>
  41693. <access>read-write</access>
  41694. <resetValue>0x0</resetValue>
  41695. <fields>
  41696. <field> <name>XFRCM</name>
  41697. <description>Transfer completed mask</description>
  41698. <bitOffset>0</bitOffset>
  41699. <bitWidth>1</bitWidth>
  41700. </field>
  41701. <field> <name>CHHM</name>
  41702. <description>Channel halted mask</description>
  41703. <bitOffset>1</bitOffset>
  41704. <bitWidth>1</bitWidth>
  41705. </field>
  41706. <field> <name>AHBERR</name>
  41707. <description>AHB error</description>
  41708. <bitOffset>2</bitOffset>
  41709. <bitWidth>1</bitWidth>
  41710. </field>
  41711. <field> <name>STALLM</name>
  41712. <description>STALL response received interrupt
  41713. mask</description>
  41714. <bitOffset>3</bitOffset>
  41715. <bitWidth>1</bitWidth>
  41716. </field>
  41717. <field> <name>NAKM</name>
  41718. <description>NAK response received interrupt
  41719. mask</description>
  41720. <bitOffset>4</bitOffset>
  41721. <bitWidth>1</bitWidth>
  41722. </field>
  41723. <field> <name>ACKM</name>
  41724. <description>ACK response received/transmitted
  41725. interrupt mask</description>
  41726. <bitOffset>5</bitOffset>
  41727. <bitWidth>1</bitWidth>
  41728. </field>
  41729. <field> <name>NYET</name>
  41730. <description>response received interrupt
  41731. mask</description>
  41732. <bitOffset>6</bitOffset>
  41733. <bitWidth>1</bitWidth>
  41734. </field>
  41735. <field> <name>TXERRM</name>
  41736. <description>Transaction error mask</description>
  41737. <bitOffset>7</bitOffset>
  41738. <bitWidth>1</bitWidth>
  41739. </field>
  41740. <field> <name>BBERRM</name>
  41741. <description>Babble error mask</description>
  41742. <bitOffset>8</bitOffset>
  41743. <bitWidth>1</bitWidth>
  41744. </field>
  41745. <field> <name>FRMORM</name>
  41746. <description>Frame overrun mask</description>
  41747. <bitOffset>9</bitOffset>
  41748. <bitWidth>1</bitWidth>
  41749. </field>
  41750. <field> <name>DTERRM</name>
  41751. <description>Data toggle error mask</description>
  41752. <bitOffset>10</bitOffset>
  41753. <bitWidth>1</bitWidth>
  41754. </field>
  41755. </fields>
  41756. </register>
  41757. <register> <name>OTG_HS_HCINTMSK11</name>
  41758. <displayName>OTG_HS_HCINTMSK11</displayName>
  41759. <description>OTG_HS host channel-11 interrupt mask
  41760. register</description>
  41761. <addressOffset>0x26C</addressOffset>
  41762. <size>32</size>
  41763. <access>read-write</access>
  41764. <resetValue>0x0</resetValue>
  41765. <fields>
  41766. <field> <name>XFRCM</name>
  41767. <description>Transfer completed mask</description>
  41768. <bitOffset>0</bitOffset>
  41769. <bitWidth>1</bitWidth>
  41770. </field>
  41771. <field> <name>CHHM</name>
  41772. <description>Channel halted mask</description>
  41773. <bitOffset>1</bitOffset>
  41774. <bitWidth>1</bitWidth>
  41775. </field>
  41776. <field> <name>AHBERR</name>
  41777. <description>AHB error</description>
  41778. <bitOffset>2</bitOffset>
  41779. <bitWidth>1</bitWidth>
  41780. </field>
  41781. <field> <name>STALLM</name>
  41782. <description>STALL response received interrupt
  41783. mask</description>
  41784. <bitOffset>3</bitOffset>
  41785. <bitWidth>1</bitWidth>
  41786. </field>
  41787. <field> <name>NAKM</name>
  41788. <description>NAK response received interrupt
  41789. mask</description>
  41790. <bitOffset>4</bitOffset>
  41791. <bitWidth>1</bitWidth>
  41792. </field>
  41793. <field> <name>ACKM</name>
  41794. <description>ACK response received/transmitted
  41795. interrupt mask</description>
  41796. <bitOffset>5</bitOffset>
  41797. <bitWidth>1</bitWidth>
  41798. </field>
  41799. <field> <name>NYET</name>
  41800. <description>response received interrupt
  41801. mask</description>
  41802. <bitOffset>6</bitOffset>
  41803. <bitWidth>1</bitWidth>
  41804. </field>
  41805. <field> <name>TXERRM</name>
  41806. <description>Transaction error mask</description>
  41807. <bitOffset>7</bitOffset>
  41808. <bitWidth>1</bitWidth>
  41809. </field>
  41810. <field> <name>BBERRM</name>
  41811. <description>Babble error mask</description>
  41812. <bitOffset>8</bitOffset>
  41813. <bitWidth>1</bitWidth>
  41814. </field>
  41815. <field> <name>FRMORM</name>
  41816. <description>Frame overrun mask</description>
  41817. <bitOffset>9</bitOffset>
  41818. <bitWidth>1</bitWidth>
  41819. </field>
  41820. <field> <name>DTERRM</name>
  41821. <description>Data toggle error mask</description>
  41822. <bitOffset>10</bitOffset>
  41823. <bitWidth>1</bitWidth>
  41824. </field>
  41825. </fields>
  41826. </register>
  41827. <register> <name>OTG_HS_HCTSIZ0</name>
  41828. <displayName>OTG_HS_HCTSIZ0</displayName>
  41829. <description>OTG_HS host channel-11 transfer size
  41830. register</description>
  41831. <addressOffset>0x110</addressOffset>
  41832. <size>32</size>
  41833. <access>read-write</access>
  41834. <resetValue>0x0</resetValue>
  41835. <fields>
  41836. <field> <name>XFRSIZ</name>
  41837. <description>Transfer size</description>
  41838. <bitOffset>0</bitOffset>
  41839. <bitWidth>19</bitWidth>
  41840. </field>
  41841. <field> <name>PKTCNT</name>
  41842. <description>Packet count</description>
  41843. <bitOffset>19</bitOffset>
  41844. <bitWidth>10</bitWidth>
  41845. </field>
  41846. <field> <name>DPID</name>
  41847. <description>Data PID</description>
  41848. <bitOffset>29</bitOffset>
  41849. <bitWidth>2</bitWidth>
  41850. </field>
  41851. </fields>
  41852. </register>
  41853. <register> <name>OTG_HS_HCTSIZ1</name>
  41854. <displayName>OTG_HS_HCTSIZ1</displayName>
  41855. <description>OTG_HS host channel-1 transfer size
  41856. register</description>
  41857. <addressOffset>0x130</addressOffset>
  41858. <size>32</size>
  41859. <access>read-write</access>
  41860. <resetValue>0x0</resetValue>
  41861. <fields>
  41862. <field> <name>XFRSIZ</name>
  41863. <description>Transfer size</description>
  41864. <bitOffset>0</bitOffset>
  41865. <bitWidth>19</bitWidth>
  41866. </field>
  41867. <field> <name>PKTCNT</name>
  41868. <description>Packet count</description>
  41869. <bitOffset>19</bitOffset>
  41870. <bitWidth>10</bitWidth>
  41871. </field>
  41872. <field> <name>DPID</name>
  41873. <description>Data PID</description>
  41874. <bitOffset>29</bitOffset>
  41875. <bitWidth>2</bitWidth>
  41876. </field>
  41877. </fields>
  41878. </register>
  41879. <register> <name>OTG_HS_HCTSIZ2</name>
  41880. <displayName>OTG_HS_HCTSIZ2</displayName>
  41881. <description>OTG_HS host channel-2 transfer size
  41882. register</description>
  41883. <addressOffset>0x150</addressOffset>
  41884. <size>32</size>
  41885. <access>read-write</access>
  41886. <resetValue>0x0</resetValue>
  41887. <fields>
  41888. <field> <name>XFRSIZ</name>
  41889. <description>Transfer size</description>
  41890. <bitOffset>0</bitOffset>
  41891. <bitWidth>19</bitWidth>
  41892. </field>
  41893. <field> <name>PKTCNT</name>
  41894. <description>Packet count</description>
  41895. <bitOffset>19</bitOffset>
  41896. <bitWidth>10</bitWidth>
  41897. </field>
  41898. <field> <name>DPID</name>
  41899. <description>Data PID</description>
  41900. <bitOffset>29</bitOffset>
  41901. <bitWidth>2</bitWidth>
  41902. </field>
  41903. </fields>
  41904. </register>
  41905. <register> <name>OTG_HS_HCTSIZ3</name>
  41906. <displayName>OTG_HS_HCTSIZ3</displayName>
  41907. <description>OTG_HS host channel-3 transfer size
  41908. register</description>
  41909. <addressOffset>0x170</addressOffset>
  41910. <size>32</size>
  41911. <access>read-write</access>
  41912. <resetValue>0x0</resetValue>
  41913. <fields>
  41914. <field> <name>XFRSIZ</name>
  41915. <description>Transfer size</description>
  41916. <bitOffset>0</bitOffset>
  41917. <bitWidth>19</bitWidth>
  41918. </field>
  41919. <field> <name>PKTCNT</name>
  41920. <description>Packet count</description>
  41921. <bitOffset>19</bitOffset>
  41922. <bitWidth>10</bitWidth>
  41923. </field>
  41924. <field> <name>DPID</name>
  41925. <description>Data PID</description>
  41926. <bitOffset>29</bitOffset>
  41927. <bitWidth>2</bitWidth>
  41928. </field>
  41929. </fields>
  41930. </register>
  41931. <register> <name>OTG_HS_HCTSIZ4</name>
  41932. <displayName>OTG_HS_HCTSIZ4</displayName>
  41933. <description>OTG_HS host channel-4 transfer size
  41934. register</description>
  41935. <addressOffset>0x190</addressOffset>
  41936. <size>32</size>
  41937. <access>read-write</access>
  41938. <resetValue>0x0</resetValue>
  41939. <fields>
  41940. <field> <name>XFRSIZ</name>
  41941. <description>Transfer size</description>
  41942. <bitOffset>0</bitOffset>
  41943. <bitWidth>19</bitWidth>
  41944. </field>
  41945. <field> <name>PKTCNT</name>
  41946. <description>Packet count</description>
  41947. <bitOffset>19</bitOffset>
  41948. <bitWidth>10</bitWidth>
  41949. </field>
  41950. <field> <name>DPID</name>
  41951. <description>Data PID</description>
  41952. <bitOffset>29</bitOffset>
  41953. <bitWidth>2</bitWidth>
  41954. </field>
  41955. </fields>
  41956. </register>
  41957. <register> <name>OTG_HS_HCTSIZ5</name>
  41958. <displayName>OTG_HS_HCTSIZ5</displayName>
  41959. <description>OTG_HS host channel-5 transfer size
  41960. register</description>
  41961. <addressOffset>0x1B0</addressOffset>
  41962. <size>32</size>
  41963. <access>read-write</access>
  41964. <resetValue>0x0</resetValue>
  41965. <fields>
  41966. <field> <name>XFRSIZ</name>
  41967. <description>Transfer size</description>
  41968. <bitOffset>0</bitOffset>
  41969. <bitWidth>19</bitWidth>
  41970. </field>
  41971. <field> <name>PKTCNT</name>
  41972. <description>Packet count</description>
  41973. <bitOffset>19</bitOffset>
  41974. <bitWidth>10</bitWidth>
  41975. </field>
  41976. <field> <name>DPID</name>
  41977. <description>Data PID</description>
  41978. <bitOffset>29</bitOffset>
  41979. <bitWidth>2</bitWidth>
  41980. </field>
  41981. </fields>
  41982. </register>
  41983. <register> <name>OTG_HS_HCTSIZ6</name>
  41984. <displayName>OTG_HS_HCTSIZ6</displayName>
  41985. <description>OTG_HS host channel-6 transfer size
  41986. register</description>
  41987. <addressOffset>0x1D0</addressOffset>
  41988. <size>32</size>
  41989. <access>read-write</access>
  41990. <resetValue>0x0</resetValue>
  41991. <fields>
  41992. <field> <name>XFRSIZ</name>
  41993. <description>Transfer size</description>
  41994. <bitOffset>0</bitOffset>
  41995. <bitWidth>19</bitWidth>
  41996. </field>
  41997. <field> <name>PKTCNT</name>
  41998. <description>Packet count</description>
  41999. <bitOffset>19</bitOffset>
  42000. <bitWidth>10</bitWidth>
  42001. </field>
  42002. <field> <name>DPID</name>
  42003. <description>Data PID</description>
  42004. <bitOffset>29</bitOffset>
  42005. <bitWidth>2</bitWidth>
  42006. </field>
  42007. </fields>
  42008. </register>
  42009. <register> <name>OTG_HS_HCTSIZ7</name>
  42010. <displayName>OTG_HS_HCTSIZ7</displayName>
  42011. <description>OTG_HS host channel-7 transfer size
  42012. register</description>
  42013. <addressOffset>0x1F0</addressOffset>
  42014. <size>32</size>
  42015. <access>read-write</access>
  42016. <resetValue>0x0</resetValue>
  42017. <fields>
  42018. <field> <name>XFRSIZ</name>
  42019. <description>Transfer size</description>
  42020. <bitOffset>0</bitOffset>
  42021. <bitWidth>19</bitWidth>
  42022. </field>
  42023. <field> <name>PKTCNT</name>
  42024. <description>Packet count</description>
  42025. <bitOffset>19</bitOffset>
  42026. <bitWidth>10</bitWidth>
  42027. </field>
  42028. <field> <name>DPID</name>
  42029. <description>Data PID</description>
  42030. <bitOffset>29</bitOffset>
  42031. <bitWidth>2</bitWidth>
  42032. </field>
  42033. </fields>
  42034. </register>
  42035. <register> <name>OTG_HS_HCTSIZ8</name>
  42036. <displayName>OTG_HS_HCTSIZ8</displayName>
  42037. <description>OTG_HS host channel-8 transfer size
  42038. register</description>
  42039. <addressOffset>0x210</addressOffset>
  42040. <size>32</size>
  42041. <access>read-write</access>
  42042. <resetValue>0x0</resetValue>
  42043. <fields>
  42044. <field> <name>XFRSIZ</name>
  42045. <description>Transfer size</description>
  42046. <bitOffset>0</bitOffset>
  42047. <bitWidth>19</bitWidth>
  42048. </field>
  42049. <field> <name>PKTCNT</name>
  42050. <description>Packet count</description>
  42051. <bitOffset>19</bitOffset>
  42052. <bitWidth>10</bitWidth>
  42053. </field>
  42054. <field> <name>DPID</name>
  42055. <description>Data PID</description>
  42056. <bitOffset>29</bitOffset>
  42057. <bitWidth>2</bitWidth>
  42058. </field>
  42059. </fields>
  42060. </register>
  42061. <register> <name>OTG_HS_HCTSIZ9</name>
  42062. <displayName>OTG_HS_HCTSIZ9</displayName>
  42063. <description>OTG_HS host channel-9 transfer size
  42064. register</description>
  42065. <addressOffset>0x230</addressOffset>
  42066. <size>32</size>
  42067. <access>read-write</access>
  42068. <resetValue>0x0</resetValue>
  42069. <fields>
  42070. <field> <name>XFRSIZ</name>
  42071. <description>Transfer size</description>
  42072. <bitOffset>0</bitOffset>
  42073. <bitWidth>19</bitWidth>
  42074. </field>
  42075. <field> <name>PKTCNT</name>
  42076. <description>Packet count</description>
  42077. <bitOffset>19</bitOffset>
  42078. <bitWidth>10</bitWidth>
  42079. </field>
  42080. <field> <name>DPID</name>
  42081. <description>Data PID</description>
  42082. <bitOffset>29</bitOffset>
  42083. <bitWidth>2</bitWidth>
  42084. </field>
  42085. </fields>
  42086. </register>
  42087. <register> <name>OTG_HS_HCTSIZ10</name>
  42088. <displayName>OTG_HS_HCTSIZ10</displayName>
  42089. <description>OTG_HS host channel-10 transfer size
  42090. register</description>
  42091. <addressOffset>0x250</addressOffset>
  42092. <size>32</size>
  42093. <access>read-write</access>
  42094. <resetValue>0x0</resetValue>
  42095. <fields>
  42096. <field> <name>XFRSIZ</name>
  42097. <description>Transfer size</description>
  42098. <bitOffset>0</bitOffset>
  42099. <bitWidth>19</bitWidth>
  42100. </field>
  42101. <field> <name>PKTCNT</name>
  42102. <description>Packet count</description>
  42103. <bitOffset>19</bitOffset>
  42104. <bitWidth>10</bitWidth>
  42105. </field>
  42106. <field> <name>DPID</name>
  42107. <description>Data PID</description>
  42108. <bitOffset>29</bitOffset>
  42109. <bitWidth>2</bitWidth>
  42110. </field>
  42111. </fields>
  42112. </register>
  42113. <register> <name>OTG_HS_HCTSIZ11</name>
  42114. <displayName>OTG_HS_HCTSIZ11</displayName>
  42115. <description>OTG_HS host channel-11 transfer size
  42116. register</description>
  42117. <addressOffset>0x270</addressOffset>
  42118. <size>32</size>
  42119. <access>read-write</access>
  42120. <resetValue>0x0</resetValue>
  42121. <fields>
  42122. <field> <name>XFRSIZ</name>
  42123. <description>Transfer size</description>
  42124. <bitOffset>0</bitOffset>
  42125. <bitWidth>19</bitWidth>
  42126. </field>
  42127. <field> <name>PKTCNT</name>
  42128. <description>Packet count</description>
  42129. <bitOffset>19</bitOffset>
  42130. <bitWidth>10</bitWidth>
  42131. </field>
  42132. <field> <name>DPID</name>
  42133. <description>Data PID</description>
  42134. <bitOffset>29</bitOffset>
  42135. <bitWidth>2</bitWidth>
  42136. </field>
  42137. </fields>
  42138. </register>
  42139. <register> <name>OTG_HS_HCDMA0</name>
  42140. <displayName>OTG_HS_HCDMA0</displayName>
  42141. <description>OTG_HS host channel-0 DMA address
  42142. register</description>
  42143. <addressOffset>0x114</addressOffset>
  42144. <size>32</size>
  42145. <access>read-write</access>
  42146. <resetValue>0x0</resetValue>
  42147. <fields>
  42148. <field> <name>DMAADDR</name>
  42149. <description>DMA address</description>
  42150. <bitOffset>0</bitOffset>
  42151. <bitWidth>32</bitWidth>
  42152. </field>
  42153. </fields>
  42154. </register>
  42155. <register> <name>OTG_HS_HCDMA1</name>
  42156. <displayName>OTG_HS_HCDMA1</displayName>
  42157. <description>OTG_HS host channel-1 DMA address
  42158. register</description>
  42159. <addressOffset>0x134</addressOffset>
  42160. <size>32</size>
  42161. <access>read-write</access>
  42162. <resetValue>0x0</resetValue>
  42163. <fields>
  42164. <field> <name>DMAADDR</name>
  42165. <description>DMA address</description>
  42166. <bitOffset>0</bitOffset>
  42167. <bitWidth>32</bitWidth>
  42168. </field>
  42169. </fields>
  42170. </register>
  42171. <register> <name>OTG_HS_HCDMA2</name>
  42172. <displayName>OTG_HS_HCDMA2</displayName>
  42173. <description>OTG_HS host channel-2 DMA address
  42174. register</description>
  42175. <addressOffset>0x154</addressOffset>
  42176. <size>32</size>
  42177. <access>read-write</access>
  42178. <resetValue>0x0</resetValue>
  42179. <fields>
  42180. <field> <name>DMAADDR</name>
  42181. <description>DMA address</description>
  42182. <bitOffset>0</bitOffset>
  42183. <bitWidth>32</bitWidth>
  42184. </field>
  42185. </fields>
  42186. </register>
  42187. <register> <name>OTG_HS_HCDMA3</name>
  42188. <displayName>OTG_HS_HCDMA3</displayName>
  42189. <description>OTG_HS host channel-3 DMA address
  42190. register</description>
  42191. <addressOffset>0x174</addressOffset>
  42192. <size>32</size>
  42193. <access>read-write</access>
  42194. <resetValue>0x0</resetValue>
  42195. <fields>
  42196. <field> <name>DMAADDR</name>
  42197. <description>DMA address</description>
  42198. <bitOffset>0</bitOffset>
  42199. <bitWidth>32</bitWidth>
  42200. </field>
  42201. </fields>
  42202. </register>
  42203. <register> <name>OTG_HS_HCDMA4</name>
  42204. <displayName>OTG_HS_HCDMA4</displayName>
  42205. <description>OTG_HS host channel-4 DMA address
  42206. register</description>
  42207. <addressOffset>0x194</addressOffset>
  42208. <size>32</size>
  42209. <access>read-write</access>
  42210. <resetValue>0x0</resetValue>
  42211. <fields>
  42212. <field> <name>DMAADDR</name>
  42213. <description>DMA address</description>
  42214. <bitOffset>0</bitOffset>
  42215. <bitWidth>32</bitWidth>
  42216. </field>
  42217. </fields>
  42218. </register>
  42219. <register> <name>OTG_HS_HCDMA5</name>
  42220. <displayName>OTG_HS_HCDMA5</displayName>
  42221. <description>OTG_HS host channel-5 DMA address
  42222. register</description>
  42223. <addressOffset>0x1B4</addressOffset>
  42224. <size>32</size>
  42225. <access>read-write</access>
  42226. <resetValue>0x0</resetValue>
  42227. <fields>
  42228. <field> <name>DMAADDR</name>
  42229. <description>DMA address</description>
  42230. <bitOffset>0</bitOffset>
  42231. <bitWidth>32</bitWidth>
  42232. </field>
  42233. </fields>
  42234. </register>
  42235. <register> <name>OTG_HS_HCDMA6</name>
  42236. <displayName>OTG_HS_HCDMA6</displayName>
  42237. <description>OTG_HS host channel-6 DMA address
  42238. register</description>
  42239. <addressOffset>0x1D4</addressOffset>
  42240. <size>32</size>
  42241. <access>read-write</access>
  42242. <resetValue>0x0</resetValue>
  42243. <fields>
  42244. <field> <name>DMAADDR</name>
  42245. <description>DMA address</description>
  42246. <bitOffset>0</bitOffset>
  42247. <bitWidth>32</bitWidth>
  42248. </field>
  42249. </fields>
  42250. </register>
  42251. <register> <name>OTG_HS_HCDMA7</name>
  42252. <displayName>OTG_HS_HCDMA7</displayName>
  42253. <description>OTG_HS host channel-7 DMA address
  42254. register</description>
  42255. <addressOffset>0x1F4</addressOffset>
  42256. <size>32</size>
  42257. <access>read-write</access>
  42258. <resetValue>0x0</resetValue>
  42259. <fields>
  42260. <field> <name>DMAADDR</name>
  42261. <description>DMA address</description>
  42262. <bitOffset>0</bitOffset>
  42263. <bitWidth>32</bitWidth>
  42264. </field>
  42265. </fields>
  42266. </register>
  42267. <register> <name>OTG_HS_HCDMA8</name>
  42268. <displayName>OTG_HS_HCDMA8</displayName>
  42269. <description>OTG_HS host channel-8 DMA address
  42270. register</description>
  42271. <addressOffset>0x214</addressOffset>
  42272. <size>32</size>
  42273. <access>read-write</access>
  42274. <resetValue>0x0</resetValue>
  42275. <fields>
  42276. <field> <name>DMAADDR</name>
  42277. <description>DMA address</description>
  42278. <bitOffset>0</bitOffset>
  42279. <bitWidth>32</bitWidth>
  42280. </field>
  42281. </fields>
  42282. </register>
  42283. <register> <name>OTG_HS_HCDMA9</name>
  42284. <displayName>OTG_HS_HCDMA9</displayName>
  42285. <description>OTG_HS host channel-9 DMA address
  42286. register</description>
  42287. <addressOffset>0x234</addressOffset>
  42288. <size>32</size>
  42289. <access>read-write</access>
  42290. <resetValue>0x0</resetValue>
  42291. <fields>
  42292. <field> <name>DMAADDR</name>
  42293. <description>DMA address</description>
  42294. <bitOffset>0</bitOffset>
  42295. <bitWidth>32</bitWidth>
  42296. </field>
  42297. </fields>
  42298. </register>
  42299. <register> <name>OTG_HS_HCDMA10</name>
  42300. <displayName>OTG_HS_HCDMA10</displayName>
  42301. <description>OTG_HS host channel-10 DMA address
  42302. register</description>
  42303. <addressOffset>0x254</addressOffset>
  42304. <size>32</size>
  42305. <access>read-write</access>
  42306. <resetValue>0x0</resetValue>
  42307. <fields>
  42308. <field> <name>DMAADDR</name>
  42309. <description>DMA address</description>
  42310. <bitOffset>0</bitOffset>
  42311. <bitWidth>32</bitWidth>
  42312. </field>
  42313. </fields>
  42314. </register>
  42315. <register> <name>OTG_HS_HCDMA11</name>
  42316. <displayName>OTG_HS_HCDMA11</displayName>
  42317. <description>OTG_HS host channel-11 DMA address
  42318. register</description>
  42319. <addressOffset>0x274</addressOffset>
  42320. <size>32</size>
  42321. <access>read-write</access>
  42322. <resetValue>0x0</resetValue>
  42323. <fields>
  42324. <field> <name>DMAADDR</name>
  42325. <description>DMA address</description>
  42326. <bitOffset>0</bitOffset>
  42327. <bitWidth>32</bitWidth>
  42328. </field>
  42329. </fields>
  42330. </register>
  42331. </registers>
  42332. </peripheral>
  42333. <peripheral> <name>OTG_HS_DEVICE</name>
  42334. <description>USB on the go high speed</description>
  42335. <groupName>USB_OTG_HS</groupName>
  42336. <baseAddress>0x40040800</baseAddress>
  42337. <addressBlock>
  42338. <offset>0x0</offset>
  42339. <size>0x400</size>
  42340. <usage>registers</usage>
  42341. </addressBlock>
  42342. <registers>
  42343. <register> <name>OTG_HS_DCFG</name>
  42344. <displayName>OTG_HS_DCFG</displayName>
  42345. <description>OTG_HS device configuration
  42346. register</description>
  42347. <addressOffset>0x0</addressOffset>
  42348. <size>32</size>
  42349. <access>read-write</access>
  42350. <resetValue>0x02200000</resetValue>
  42351. <fields>
  42352. <field> <name>DSPD</name>
  42353. <description>Device speed</description>
  42354. <bitOffset>0</bitOffset>
  42355. <bitWidth>2</bitWidth>
  42356. </field>
  42357. <field> <name>NZLSOHSK</name>
  42358. <description>Nonzero-length status OUT
  42359. handshake</description>
  42360. <bitOffset>2</bitOffset>
  42361. <bitWidth>1</bitWidth>
  42362. </field>
  42363. <field> <name>DAD</name>
  42364. <description>Device address</description>
  42365. <bitOffset>4</bitOffset>
  42366. <bitWidth>7</bitWidth>
  42367. </field>
  42368. <field> <name>PFIVL</name>
  42369. <description>Periodic (micro)frame
  42370. interval</description>
  42371. <bitOffset>11</bitOffset>
  42372. <bitWidth>2</bitWidth>
  42373. </field>
  42374. <field> <name>PERSCHIVL</name>
  42375. <description>Periodic scheduling
  42376. interval</description>
  42377. <bitOffset>24</bitOffset>
  42378. <bitWidth>2</bitWidth>
  42379. </field>
  42380. </fields>
  42381. </register>
  42382. <register> <name>OTG_HS_DCTL</name>
  42383. <displayName>OTG_HS_DCTL</displayName>
  42384. <description>OTG_HS device control register</description>
  42385. <addressOffset>0x4</addressOffset>
  42386. <size>32</size>
  42387. <resetValue>0x0</resetValue>
  42388. <fields>
  42389. <field> <name>RWUSIG</name>
  42390. <description>Remote wakeup signaling</description>
  42391. <bitOffset>0</bitOffset>
  42392. <bitWidth>1</bitWidth>
  42393. <access>read-write</access>
  42394. </field>
  42395. <field> <name>SDIS</name>
  42396. <description>Soft disconnect</description>
  42397. <bitOffset>1</bitOffset>
  42398. <bitWidth>1</bitWidth>
  42399. <access>read-write</access>
  42400. </field>
  42401. <field> <name>GINSTS</name>
  42402. <description>Global IN NAK status</description>
  42403. <bitOffset>2</bitOffset>
  42404. <bitWidth>1</bitWidth>
  42405. <access>read-only</access>
  42406. </field>
  42407. <field> <name>GONSTS</name>
  42408. <description>Global OUT NAK status</description>
  42409. <bitOffset>3</bitOffset>
  42410. <bitWidth>1</bitWidth>
  42411. <access>read-only</access>
  42412. </field>
  42413. <field> <name>TCTL</name>
  42414. <description>Test control</description>
  42415. <bitOffset>4</bitOffset>
  42416. <bitWidth>3</bitWidth>
  42417. <access>read-write</access>
  42418. </field>
  42419. <field> <name>SGINAK</name>
  42420. <description>Set global IN NAK</description>
  42421. <bitOffset>7</bitOffset>
  42422. <bitWidth>1</bitWidth>
  42423. <access>write-only</access>
  42424. </field>
  42425. <field> <name>CGINAK</name>
  42426. <description>Clear global IN NAK</description>
  42427. <bitOffset>8</bitOffset>
  42428. <bitWidth>1</bitWidth>
  42429. <access>write-only</access>
  42430. </field>
  42431. <field> <name>SGONAK</name>
  42432. <description>Set global OUT NAK</description>
  42433. <bitOffset>9</bitOffset>
  42434. <bitWidth>1</bitWidth>
  42435. <access>write-only</access>
  42436. </field>
  42437. <field> <name>CGONAK</name>
  42438. <description>Clear global OUT NAK</description>
  42439. <bitOffset>10</bitOffset>
  42440. <bitWidth>1</bitWidth>
  42441. <access>write-only</access>
  42442. </field>
  42443. <field> <name>POPRGDNE</name>
  42444. <description>Power-on programming done</description>
  42445. <bitOffset>11</bitOffset>
  42446. <bitWidth>1</bitWidth>
  42447. <access>read-write</access>
  42448. </field>
  42449. </fields>
  42450. </register>
  42451. <register> <name>OTG_HS_DSTS</name>
  42452. <displayName>OTG_HS_DSTS</displayName>
  42453. <description>OTG_HS device status register</description>
  42454. <addressOffset>0x8</addressOffset>
  42455. <size>32</size>
  42456. <access>read-only</access>
  42457. <resetValue>0x00000010</resetValue>
  42458. <fields>
  42459. <field> <name>SUSPSTS</name>
  42460. <description>Suspend status</description>
  42461. <bitOffset>0</bitOffset>
  42462. <bitWidth>1</bitWidth>
  42463. </field>
  42464. <field> <name>ENUMSPD</name>
  42465. <description>Enumerated speed</description>
  42466. <bitOffset>1</bitOffset>
  42467. <bitWidth>2</bitWidth>
  42468. </field>
  42469. <field> <name>EERR</name>
  42470. <description>Erratic error</description>
  42471. <bitOffset>3</bitOffset>
  42472. <bitWidth>1</bitWidth>
  42473. </field>
  42474. <field> <name>FNSOF</name>
  42475. <description>Frame number of the received
  42476. SOF</description>
  42477. <bitOffset>8</bitOffset>
  42478. <bitWidth>14</bitWidth>
  42479. </field>
  42480. </fields>
  42481. </register>
  42482. <register> <name>OTG_HS_DIEPMSK</name>
  42483. <displayName>OTG_HS_DIEPMSK</displayName>
  42484. <description>OTG_HS device IN endpoint common interrupt
  42485. mask register</description>
  42486. <addressOffset>0x10</addressOffset>
  42487. <size>32</size>
  42488. <access>read-write</access>
  42489. <resetValue>0x0</resetValue>
  42490. <fields>
  42491. <field> <name>XFRCM</name>
  42492. <description>Transfer completed interrupt
  42493. mask</description>
  42494. <bitOffset>0</bitOffset>
  42495. <bitWidth>1</bitWidth>
  42496. </field>
  42497. <field> <name>EPDM</name>
  42498. <description>Endpoint disabled interrupt
  42499. mask</description>
  42500. <bitOffset>1</bitOffset>
  42501. <bitWidth>1</bitWidth>
  42502. </field>
  42503. <field> <name>TOM</name>
  42504. <description>Timeout condition mask (nonisochronous
  42505. endpoints)</description>
  42506. <bitOffset>3</bitOffset>
  42507. <bitWidth>1</bitWidth>
  42508. </field>
  42509. <field> <name>ITTXFEMSK</name>
  42510. <description>IN token received when TxFIFO empty
  42511. mask</description>
  42512. <bitOffset>4</bitOffset>
  42513. <bitWidth>1</bitWidth>
  42514. </field>
  42515. <field> <name>INEPNMM</name>
  42516. <description>IN token received with EP mismatch
  42517. mask</description>
  42518. <bitOffset>5</bitOffset>
  42519. <bitWidth>1</bitWidth>
  42520. </field>
  42521. <field> <name>INEPNEM</name>
  42522. <description>IN endpoint NAK effective
  42523. mask</description>
  42524. <bitOffset>6</bitOffset>
  42525. <bitWidth>1</bitWidth>
  42526. </field>
  42527. <field> <name>TXFURM</name>
  42528. <description>FIFO underrun mask</description>
  42529. <bitOffset>8</bitOffset>
  42530. <bitWidth>1</bitWidth>
  42531. </field>
  42532. <field> <name>BIM</name>
  42533. <description>BNA interrupt mask</description>
  42534. <bitOffset>9</bitOffset>
  42535. <bitWidth>1</bitWidth>
  42536. </field>
  42537. </fields>
  42538. </register>
  42539. <register> <name>OTG_HS_DOEPMSK</name>
  42540. <displayName>OTG_HS_DOEPMSK</displayName>
  42541. <description>OTG_HS device OUT endpoint common interrupt
  42542. mask register</description>
  42543. <addressOffset>0x14</addressOffset>
  42544. <size>32</size>
  42545. <access>read-write</access>
  42546. <resetValue>0x0</resetValue>
  42547. <fields>
  42548. <field> <name>XFRCM</name>
  42549. <description>Transfer completed interrupt
  42550. mask</description>
  42551. <bitOffset>0</bitOffset>
  42552. <bitWidth>1</bitWidth>
  42553. </field>
  42554. <field> <name>EPDM</name>
  42555. <description>Endpoint disabled interrupt
  42556. mask</description>
  42557. <bitOffset>1</bitOffset>
  42558. <bitWidth>1</bitWidth>
  42559. </field>
  42560. <field> <name>STUPM</name>
  42561. <description>SETUP phase done mask</description>
  42562. <bitOffset>3</bitOffset>
  42563. <bitWidth>1</bitWidth>
  42564. </field>
  42565. <field> <name>OTEPDM</name>
  42566. <description>OUT token received when endpoint
  42567. disabled mask</description>
  42568. <bitOffset>4</bitOffset>
  42569. <bitWidth>1</bitWidth>
  42570. </field>
  42571. <field> <name>B2BSTUP</name>
  42572. <description>Back-to-back SETUP packets received
  42573. mask</description>
  42574. <bitOffset>6</bitOffset>
  42575. <bitWidth>1</bitWidth>
  42576. </field>
  42577. <field> <name>OPEM</name>
  42578. <description>OUT packet error mask</description>
  42579. <bitOffset>8</bitOffset>
  42580. <bitWidth>1</bitWidth>
  42581. </field>
  42582. <field> <name>BOIM</name>
  42583. <description>BNA interrupt mask</description>
  42584. <bitOffset>9</bitOffset>
  42585. <bitWidth>1</bitWidth>
  42586. </field>
  42587. </fields>
  42588. </register>
  42589. <register> <name>OTG_HS_DAINT</name>
  42590. <displayName>OTG_HS_DAINT</displayName>
  42591. <description>OTG_HS device all endpoints interrupt
  42592. register</description>
  42593. <addressOffset>0x18</addressOffset>
  42594. <size>32</size>
  42595. <access>read-only</access>
  42596. <resetValue>0x0</resetValue>
  42597. <fields>
  42598. <field> <name>IEPINT</name>
  42599. <description>IN endpoint interrupt bits</description>
  42600. <bitOffset>0</bitOffset>
  42601. <bitWidth>16</bitWidth>
  42602. </field>
  42603. <field> <name>OEPINT</name>
  42604. <description>OUT endpoint interrupt
  42605. bits</description>
  42606. <bitOffset>16</bitOffset>
  42607. <bitWidth>16</bitWidth>
  42608. </field>
  42609. </fields>
  42610. </register>
  42611. <register> <name>OTG_HS_DAINTMSK</name>
  42612. <displayName>OTG_HS_DAINTMSK</displayName>
  42613. <description>OTG_HS all endpoints interrupt mask
  42614. register</description>
  42615. <addressOffset>0x1C</addressOffset>
  42616. <size>32</size>
  42617. <access>read-write</access>
  42618. <resetValue>0x0</resetValue>
  42619. <fields>
  42620. <field> <name>IEPM</name>
  42621. <description>IN EP interrupt mask bits</description>
  42622. <bitOffset>0</bitOffset>
  42623. <bitWidth>16</bitWidth>
  42624. </field>
  42625. <field> <name>OEPM</name>
  42626. <description>OUT EP interrupt mask bits</description>
  42627. <bitOffset>16</bitOffset>
  42628. <bitWidth>16</bitWidth>
  42629. </field>
  42630. </fields>
  42631. </register>
  42632. <register> <name>OTG_HS_DVBUSDIS</name>
  42633. <displayName>OTG_HS_DVBUSDIS</displayName>
  42634. <description>OTG_HS device VBUS discharge time
  42635. register</description>
  42636. <addressOffset>0x28</addressOffset>
  42637. <size>32</size>
  42638. <access>read-write</access>
  42639. <resetValue>0x000017D7</resetValue>
  42640. <fields>
  42641. <field> <name>VBUSDT</name>
  42642. <description>Device VBUS discharge time</description>
  42643. <bitOffset>0</bitOffset>
  42644. <bitWidth>16</bitWidth>
  42645. </field>
  42646. </fields>
  42647. </register>
  42648. <register> <name>OTG_HS_DVBUSPULSE</name>
  42649. <displayName>OTG_HS_DVBUSPULSE</displayName>
  42650. <description>OTG_HS device VBUS pulsing time
  42651. register</description>
  42652. <addressOffset>0x2C</addressOffset>
  42653. <size>32</size>
  42654. <access>read-write</access>
  42655. <resetValue>0x000005B8</resetValue>
  42656. <fields>
  42657. <field> <name>DVBUSP</name>
  42658. <description>Device VBUS pulsing time</description>
  42659. <bitOffset>0</bitOffset>
  42660. <bitWidth>12</bitWidth>
  42661. </field>
  42662. </fields>
  42663. </register>
  42664. <register> <name>OTG_HS_DTHRCTL</name>
  42665. <displayName>OTG_HS_DTHRCTL</displayName>
  42666. <description>OTG_HS Device threshold control
  42667. register</description>
  42668. <addressOffset>0x30</addressOffset>
  42669. <size>32</size>
  42670. <access>read-write</access>
  42671. <resetValue>0x0</resetValue>
  42672. <fields>
  42673. <field> <name>NONISOTHREN</name>
  42674. <description>Nonisochronous IN endpoints threshold
  42675. enable</description>
  42676. <bitOffset>0</bitOffset>
  42677. <bitWidth>1</bitWidth>
  42678. </field>
  42679. <field> <name>ISOTHREN</name>
  42680. <description>ISO IN endpoint threshold
  42681. enable</description>
  42682. <bitOffset>1</bitOffset>
  42683. <bitWidth>1</bitWidth>
  42684. </field>
  42685. <field> <name>TXTHRLEN</name>
  42686. <description>Transmit threshold length</description>
  42687. <bitOffset>2</bitOffset>
  42688. <bitWidth>9</bitWidth>
  42689. </field>
  42690. <field> <name>RXTHREN</name>
  42691. <description>Receive threshold enable</description>
  42692. <bitOffset>16</bitOffset>
  42693. <bitWidth>1</bitWidth>
  42694. </field>
  42695. <field> <name>RXTHRLEN</name>
  42696. <description>Receive threshold length</description>
  42697. <bitOffset>17</bitOffset>
  42698. <bitWidth>9</bitWidth>
  42699. </field>
  42700. <field> <name>ARPEN</name>
  42701. <description>Arbiter parking enable</description>
  42702. <bitOffset>27</bitOffset>
  42703. <bitWidth>1</bitWidth>
  42704. </field>
  42705. </fields>
  42706. </register>
  42707. <register> <name>OTG_HS_DIEPEMPMSK</name>
  42708. <displayName>OTG_HS_DIEPEMPMSK</displayName>
  42709. <description>OTG_HS device IN endpoint FIFO empty
  42710. interrupt mask register</description>
  42711. <addressOffset>0x34</addressOffset>
  42712. <size>32</size>
  42713. <access>read-write</access>
  42714. <resetValue>0x0</resetValue>
  42715. <fields>
  42716. <field> <name>INEPTXFEM</name>
  42717. <description>IN EP Tx FIFO empty interrupt mask
  42718. bits</description>
  42719. <bitOffset>0</bitOffset>
  42720. <bitWidth>16</bitWidth>
  42721. </field>
  42722. </fields>
  42723. </register>
  42724. <register> <name>OTG_HS_DEACHINT</name>
  42725. <displayName>OTG_HS_DEACHINT</displayName>
  42726. <description>OTG_HS device each endpoint interrupt
  42727. register</description>
  42728. <addressOffset>0x38</addressOffset>
  42729. <size>32</size>
  42730. <access>read-write</access>
  42731. <resetValue>0x0</resetValue>
  42732. <fields>
  42733. <field> <name>IEP1INT</name>
  42734. <description>IN endpoint 1interrupt bit</description>
  42735. <bitOffset>1</bitOffset>
  42736. <bitWidth>1</bitWidth>
  42737. </field>
  42738. <field> <name>OEP1INT</name>
  42739. <description>OUT endpoint 1 interrupt
  42740. bit</description>
  42741. <bitOffset>17</bitOffset>
  42742. <bitWidth>1</bitWidth>
  42743. </field>
  42744. </fields>
  42745. </register>
  42746. <register> <name>OTG_HS_DEACHINTMSK</name>
  42747. <displayName>OTG_HS_DEACHINTMSK</displayName>
  42748. <description>OTG_HS device each endpoint interrupt
  42749. register mask</description>
  42750. <addressOffset>0x3C</addressOffset>
  42751. <size>32</size>
  42752. <access>read-write</access>
  42753. <resetValue>0x0</resetValue>
  42754. <fields>
  42755. <field> <name>IEP1INTM</name>
  42756. <description>IN Endpoint 1 interrupt mask
  42757. bit</description>
  42758. <bitOffset>1</bitOffset>
  42759. <bitWidth>1</bitWidth>
  42760. </field>
  42761. <field> <name>OEP1INTM</name>
  42762. <description>OUT Endpoint 1 interrupt mask
  42763. bit</description>
  42764. <bitOffset>17</bitOffset>
  42765. <bitWidth>1</bitWidth>
  42766. </field>
  42767. </fields>
  42768. </register>
  42769. <register> <name>OTG_HS_DIEPEACHMSK1</name>
  42770. <displayName>OTG_HS_DIEPEACHMSK1</displayName>
  42771. <description>OTG_HS device each in endpoint-1 interrupt
  42772. register</description>
  42773. <addressOffset>0x40</addressOffset>
  42774. <size>32</size>
  42775. <access>read-write</access>
  42776. <resetValue>0x0</resetValue>
  42777. <fields>
  42778. <field> <name>XFRCM</name>
  42779. <description>Transfer completed interrupt
  42780. mask</description>
  42781. <bitOffset>0</bitOffset>
  42782. <bitWidth>1</bitWidth>
  42783. </field>
  42784. <field> <name>EPDM</name>
  42785. <description>Endpoint disabled interrupt
  42786. mask</description>
  42787. <bitOffset>1</bitOffset>
  42788. <bitWidth>1</bitWidth>
  42789. </field>
  42790. <field> <name>TOM</name>
  42791. <description>Timeout condition mask (nonisochronous
  42792. endpoints)</description>
  42793. <bitOffset>3</bitOffset>
  42794. <bitWidth>1</bitWidth>
  42795. </field>
  42796. <field> <name>ITTXFEMSK</name>
  42797. <description>IN token received when TxFIFO empty
  42798. mask</description>
  42799. <bitOffset>4</bitOffset>
  42800. <bitWidth>1</bitWidth>
  42801. </field>
  42802. <field> <name>INEPNMM</name>
  42803. <description>IN token received with EP mismatch
  42804. mask</description>
  42805. <bitOffset>5</bitOffset>
  42806. <bitWidth>1</bitWidth>
  42807. </field>
  42808. <field> <name>INEPNEM</name>
  42809. <description>IN endpoint NAK effective
  42810. mask</description>
  42811. <bitOffset>6</bitOffset>
  42812. <bitWidth>1</bitWidth>
  42813. </field>
  42814. <field> <name>TXFURM</name>
  42815. <description>FIFO underrun mask</description>
  42816. <bitOffset>8</bitOffset>
  42817. <bitWidth>1</bitWidth>
  42818. </field>
  42819. <field> <name>BIM</name>
  42820. <description>BNA interrupt mask</description>
  42821. <bitOffset>9</bitOffset>
  42822. <bitWidth>1</bitWidth>
  42823. </field>
  42824. <field> <name>NAKM</name>
  42825. <description>NAK interrupt mask</description>
  42826. <bitOffset>13</bitOffset>
  42827. <bitWidth>1</bitWidth>
  42828. </field>
  42829. </fields>
  42830. </register>
  42831. <register> <name>OTG_HS_DOEPEACHMSK1</name>
  42832. <displayName>OTG_HS_DOEPEACHMSK1</displayName>
  42833. <description>OTG_HS device each OUT endpoint-1 interrupt
  42834. register</description>
  42835. <addressOffset>0x80</addressOffset>
  42836. <size>32</size>
  42837. <access>read-write</access>
  42838. <resetValue>0x0</resetValue>
  42839. <fields>
  42840. <field> <name>XFRCM</name>
  42841. <description>Transfer completed interrupt
  42842. mask</description>
  42843. <bitOffset>0</bitOffset>
  42844. <bitWidth>1</bitWidth>
  42845. </field>
  42846. <field> <name>EPDM</name>
  42847. <description>Endpoint disabled interrupt
  42848. mask</description>
  42849. <bitOffset>1</bitOffset>
  42850. <bitWidth>1</bitWidth>
  42851. </field>
  42852. <field> <name>TOM</name>
  42853. <description>Timeout condition mask</description>
  42854. <bitOffset>3</bitOffset>
  42855. <bitWidth>1</bitWidth>
  42856. </field>
  42857. <field> <name>ITTXFEMSK</name>
  42858. <description>IN token received when TxFIFO empty
  42859. mask</description>
  42860. <bitOffset>4</bitOffset>
  42861. <bitWidth>1</bitWidth>
  42862. </field>
  42863. <field> <name>INEPNMM</name>
  42864. <description>IN token received with EP mismatch
  42865. mask</description>
  42866. <bitOffset>5</bitOffset>
  42867. <bitWidth>1</bitWidth>
  42868. </field>
  42869. <field> <name>INEPNEM</name>
  42870. <description>IN endpoint NAK effective
  42871. mask</description>
  42872. <bitOffset>6</bitOffset>
  42873. <bitWidth>1</bitWidth>
  42874. </field>
  42875. <field> <name>TXFURM</name>
  42876. <description>OUT packet error mask</description>
  42877. <bitOffset>8</bitOffset>
  42878. <bitWidth>1</bitWidth>
  42879. </field>
  42880. <field> <name>BIM</name>
  42881. <description>BNA interrupt mask</description>
  42882. <bitOffset>9</bitOffset>
  42883. <bitWidth>1</bitWidth>
  42884. </field>
  42885. <field> <name>BERRM</name>
  42886. <description>Bubble error interrupt
  42887. mask</description>
  42888. <bitOffset>12</bitOffset>
  42889. <bitWidth>1</bitWidth>
  42890. </field>
  42891. <field> <name>NAKM</name>
  42892. <description>NAK interrupt mask</description>
  42893. <bitOffset>13</bitOffset>
  42894. <bitWidth>1</bitWidth>
  42895. </field>
  42896. <field> <name>NYETM</name>
  42897. <description>NYET interrupt mask</description>
  42898. <bitOffset>14</bitOffset>
  42899. <bitWidth>1</bitWidth>
  42900. </field>
  42901. </fields>
  42902. </register>
  42903. <register> <name>OTG_HS_DIEPCTL0</name>
  42904. <displayName>OTG_HS_DIEPCTL0</displayName>
  42905. <description>OTG device endpoint-0 control
  42906. register</description>
  42907. <addressOffset>0x100</addressOffset>
  42908. <size>32</size>
  42909. <resetValue>0x0</resetValue>
  42910. <fields>
  42911. <field> <name>MPSIZ</name>
  42912. <description>Maximum packet size</description>
  42913. <bitOffset>0</bitOffset>
  42914. <bitWidth>11</bitWidth>
  42915. <access>read-write</access>
  42916. </field>
  42917. <field> <name>USBAEP</name>
  42918. <description>USB active endpoint</description>
  42919. <bitOffset>15</bitOffset>
  42920. <bitWidth>1</bitWidth>
  42921. <access>read-write</access>
  42922. </field>
  42923. <field> <name>EONUM_DPID</name>
  42924. <description>Even/odd frame</description>
  42925. <bitOffset>16</bitOffset>
  42926. <bitWidth>1</bitWidth>
  42927. <access>read-only</access>
  42928. </field>
  42929. <field> <name>NAKSTS</name>
  42930. <description>NAK status</description>
  42931. <bitOffset>17</bitOffset>
  42932. <bitWidth>1</bitWidth>
  42933. <access>read-only</access>
  42934. </field>
  42935. <field> <name>EPTYP</name>
  42936. <description>Endpoint type</description>
  42937. <bitOffset>18</bitOffset>
  42938. <bitWidth>2</bitWidth>
  42939. <access>read-write</access>
  42940. </field>
  42941. <field> <name>Stall</name>
  42942. <description>STALL handshake</description>
  42943. <bitOffset>21</bitOffset>
  42944. <bitWidth>1</bitWidth>
  42945. <access>read-write</access>
  42946. </field>
  42947. <field> <name>TXFNUM</name>
  42948. <description>TxFIFO number</description>
  42949. <bitOffset>22</bitOffset>
  42950. <bitWidth>4</bitWidth>
  42951. <access>read-write</access>
  42952. </field>
  42953. <field> <name>CNAK</name>
  42954. <description>Clear NAK</description>
  42955. <bitOffset>26</bitOffset>
  42956. <bitWidth>1</bitWidth>
  42957. <access>write-only</access>
  42958. </field>
  42959. <field> <name>SNAK</name>
  42960. <description>Set NAK</description>
  42961. <bitOffset>27</bitOffset>
  42962. <bitWidth>1</bitWidth>
  42963. <access>write-only</access>
  42964. </field>
  42965. <field> <name>SD0PID_SEVNFRM</name>
  42966. <description>Set DATA0 PID</description>
  42967. <bitOffset>28</bitOffset>
  42968. <bitWidth>1</bitWidth>
  42969. <access>write-only</access>
  42970. </field>
  42971. <field> <name>SODDFRM</name>
  42972. <description>Set odd frame</description>
  42973. <bitOffset>29</bitOffset>
  42974. <bitWidth>1</bitWidth>
  42975. <access>write-only</access>
  42976. </field>
  42977. <field> <name>EPDIS</name>
  42978. <description>Endpoint disable</description>
  42979. <bitOffset>30</bitOffset>
  42980. <bitWidth>1</bitWidth>
  42981. <access>read-write</access>
  42982. </field>
  42983. <field> <name>EPENA</name>
  42984. <description>Endpoint enable</description>
  42985. <bitOffset>31</bitOffset>
  42986. <bitWidth>1</bitWidth>
  42987. <access>read-write</access>
  42988. </field>
  42989. </fields>
  42990. </register>
  42991. <register> <name>OTG_HS_DIEPCTL1</name>
  42992. <displayName>OTG_HS_DIEPCTL1</displayName>
  42993. <description>OTG device endpoint-1 control
  42994. register</description>
  42995. <addressOffset>0x120</addressOffset>
  42996. <size>32</size>
  42997. <resetValue>0x0</resetValue>
  42998. <fields>
  42999. <field> <name>MPSIZ</name>
  43000. <description>Maximum packet size</description>
  43001. <bitOffset>0</bitOffset>
  43002. <bitWidth>11</bitWidth>
  43003. <access>read-write</access>
  43004. </field>
  43005. <field> <name>USBAEP</name>
  43006. <description>USB active endpoint</description>
  43007. <bitOffset>15</bitOffset>
  43008. <bitWidth>1</bitWidth>
  43009. <access>read-write</access>
  43010. </field>
  43011. <field> <name>EONUM_DPID</name>
  43012. <description>Even/odd frame</description>
  43013. <bitOffset>16</bitOffset>
  43014. <bitWidth>1</bitWidth>
  43015. <access>read-only</access>
  43016. </field>
  43017. <field> <name>NAKSTS</name>
  43018. <description>NAK status</description>
  43019. <bitOffset>17</bitOffset>
  43020. <bitWidth>1</bitWidth>
  43021. <access>read-only</access>
  43022. </field>
  43023. <field> <name>EPTYP</name>
  43024. <description>Endpoint type</description>
  43025. <bitOffset>18</bitOffset>
  43026. <bitWidth>2</bitWidth>
  43027. <access>read-write</access>
  43028. </field>
  43029. <field> <name>Stall</name>
  43030. <description>STALL handshake</description>
  43031. <bitOffset>21</bitOffset>
  43032. <bitWidth>1</bitWidth>
  43033. <access>read-write</access>
  43034. </field>
  43035. <field> <name>TXFNUM</name>
  43036. <description>TxFIFO number</description>
  43037. <bitOffset>22</bitOffset>
  43038. <bitWidth>4</bitWidth>
  43039. <access>read-write</access>
  43040. </field>
  43041. <field> <name>CNAK</name>
  43042. <description>Clear NAK</description>
  43043. <bitOffset>26</bitOffset>
  43044. <bitWidth>1</bitWidth>
  43045. <access>write-only</access>
  43046. </field>
  43047. <field> <name>SNAK</name>
  43048. <description>Set NAK</description>
  43049. <bitOffset>27</bitOffset>
  43050. <bitWidth>1</bitWidth>
  43051. <access>write-only</access>
  43052. </field>
  43053. <field> <name>SD0PID_SEVNFRM</name>
  43054. <description>Set DATA0 PID</description>
  43055. <bitOffset>28</bitOffset>
  43056. <bitWidth>1</bitWidth>
  43057. <access>write-only</access>
  43058. </field>
  43059. <field> <name>SODDFRM</name>
  43060. <description>Set odd frame</description>
  43061. <bitOffset>29</bitOffset>
  43062. <bitWidth>1</bitWidth>
  43063. <access>write-only</access>
  43064. </field>
  43065. <field> <name>EPDIS</name>
  43066. <description>Endpoint disable</description>
  43067. <bitOffset>30</bitOffset>
  43068. <bitWidth>1</bitWidth>
  43069. <access>read-write</access>
  43070. </field>
  43071. <field> <name>EPENA</name>
  43072. <description>Endpoint enable</description>
  43073. <bitOffset>31</bitOffset>
  43074. <bitWidth>1</bitWidth>
  43075. <access>read-write</access>
  43076. </field>
  43077. </fields>
  43078. </register>
  43079. <register> <name>OTG_HS_DIEPCTL2</name>
  43080. <displayName>OTG_HS_DIEPCTL2</displayName>
  43081. <description>OTG device endpoint-2 control
  43082. register</description>
  43083. <addressOffset>0x140</addressOffset>
  43084. <size>32</size>
  43085. <resetValue>0x0</resetValue>
  43086. <fields>
  43087. <field> <name>MPSIZ</name>
  43088. <description>Maximum packet size</description>
  43089. <bitOffset>0</bitOffset>
  43090. <bitWidth>11</bitWidth>
  43091. <access>read-write</access>
  43092. </field>
  43093. <field> <name>USBAEP</name>
  43094. <description>USB active endpoint</description>
  43095. <bitOffset>15</bitOffset>
  43096. <bitWidth>1</bitWidth>
  43097. <access>read-write</access>
  43098. </field>
  43099. <field> <name>EONUM_DPID</name>
  43100. <description>Even/odd frame</description>
  43101. <bitOffset>16</bitOffset>
  43102. <bitWidth>1</bitWidth>
  43103. <access>read-only</access>
  43104. </field>
  43105. <field> <name>NAKSTS</name>
  43106. <description>NAK status</description>
  43107. <bitOffset>17</bitOffset>
  43108. <bitWidth>1</bitWidth>
  43109. <access>read-only</access>
  43110. </field>
  43111. <field> <name>EPTYP</name>
  43112. <description>Endpoint type</description>
  43113. <bitOffset>18</bitOffset>
  43114. <bitWidth>2</bitWidth>
  43115. <access>read-write</access>
  43116. </field>
  43117. <field> <name>Stall</name>
  43118. <description>STALL handshake</description>
  43119. <bitOffset>21</bitOffset>
  43120. <bitWidth>1</bitWidth>
  43121. <access>read-write</access>
  43122. </field>
  43123. <field> <name>TXFNUM</name>
  43124. <description>TxFIFO number</description>
  43125. <bitOffset>22</bitOffset>
  43126. <bitWidth>4</bitWidth>
  43127. <access>read-write</access>
  43128. </field>
  43129. <field> <name>CNAK</name>
  43130. <description>Clear NAK</description>
  43131. <bitOffset>26</bitOffset>
  43132. <bitWidth>1</bitWidth>
  43133. <access>write-only</access>
  43134. </field>
  43135. <field> <name>SNAK</name>
  43136. <description>Set NAK</description>
  43137. <bitOffset>27</bitOffset>
  43138. <bitWidth>1</bitWidth>
  43139. <access>write-only</access>
  43140. </field>
  43141. <field> <name>SD0PID_SEVNFRM</name>
  43142. <description>Set DATA0 PID</description>
  43143. <bitOffset>28</bitOffset>
  43144. <bitWidth>1</bitWidth>
  43145. <access>write-only</access>
  43146. </field>
  43147. <field> <name>SODDFRM</name>
  43148. <description>Set odd frame</description>
  43149. <bitOffset>29</bitOffset>
  43150. <bitWidth>1</bitWidth>
  43151. <access>write-only</access>
  43152. </field>
  43153. <field> <name>EPDIS</name>
  43154. <description>Endpoint disable</description>
  43155. <bitOffset>30</bitOffset>
  43156. <bitWidth>1</bitWidth>
  43157. <access>read-write</access>
  43158. </field>
  43159. <field> <name>EPENA</name>
  43160. <description>Endpoint enable</description>
  43161. <bitOffset>31</bitOffset>
  43162. <bitWidth>1</bitWidth>
  43163. <access>read-write</access>
  43164. </field>
  43165. </fields>
  43166. </register>
  43167. <register> <name>OTG_HS_DIEPCTL3</name>
  43168. <displayName>OTG_HS_DIEPCTL3</displayName>
  43169. <description>OTG device endpoint-3 control
  43170. register</description>
  43171. <addressOffset>0x160</addressOffset>
  43172. <size>32</size>
  43173. <resetValue>0x0</resetValue>
  43174. <fields>
  43175. <field> <name>MPSIZ</name>
  43176. <description>Maximum packet size</description>
  43177. <bitOffset>0</bitOffset>
  43178. <bitWidth>11</bitWidth>
  43179. <access>read-write</access>
  43180. </field>
  43181. <field> <name>USBAEP</name>
  43182. <description>USB active endpoint</description>
  43183. <bitOffset>15</bitOffset>
  43184. <bitWidth>1</bitWidth>
  43185. <access>read-write</access>
  43186. </field>
  43187. <field> <name>EONUM_DPID</name>
  43188. <description>Even/odd frame</description>
  43189. <bitOffset>16</bitOffset>
  43190. <bitWidth>1</bitWidth>
  43191. <access>read-only</access>
  43192. </field>
  43193. <field> <name>NAKSTS</name>
  43194. <description>NAK status</description>
  43195. <bitOffset>17</bitOffset>
  43196. <bitWidth>1</bitWidth>
  43197. <access>read-only</access>
  43198. </field>
  43199. <field> <name>EPTYP</name>
  43200. <description>Endpoint type</description>
  43201. <bitOffset>18</bitOffset>
  43202. <bitWidth>2</bitWidth>
  43203. <access>read-write</access>
  43204. </field>
  43205. <field> <name>Stall</name>
  43206. <description>STALL handshake</description>
  43207. <bitOffset>21</bitOffset>
  43208. <bitWidth>1</bitWidth>
  43209. <access>read-write</access>
  43210. </field>
  43211. <field> <name>TXFNUM</name>
  43212. <description>TxFIFO number</description>
  43213. <bitOffset>22</bitOffset>
  43214. <bitWidth>4</bitWidth>
  43215. <access>read-write</access>
  43216. </field>
  43217. <field> <name>CNAK</name>
  43218. <description>Clear NAK</description>
  43219. <bitOffset>26</bitOffset>
  43220. <bitWidth>1</bitWidth>
  43221. <access>write-only</access>
  43222. </field>
  43223. <field> <name>SNAK</name>
  43224. <description>Set NAK</description>
  43225. <bitOffset>27</bitOffset>
  43226. <bitWidth>1</bitWidth>
  43227. <access>write-only</access>
  43228. </field>
  43229. <field> <name>SD0PID_SEVNFRM</name>
  43230. <description>Set DATA0 PID</description>
  43231. <bitOffset>28</bitOffset>
  43232. <bitWidth>1</bitWidth>
  43233. <access>write-only</access>
  43234. </field>
  43235. <field> <name>SODDFRM</name>
  43236. <description>Set odd frame</description>
  43237. <bitOffset>29</bitOffset>
  43238. <bitWidth>1</bitWidth>
  43239. <access>write-only</access>
  43240. </field>
  43241. <field> <name>EPDIS</name>
  43242. <description>Endpoint disable</description>
  43243. <bitOffset>30</bitOffset>
  43244. <bitWidth>1</bitWidth>
  43245. <access>read-write</access>
  43246. </field>
  43247. <field> <name>EPENA</name>
  43248. <description>Endpoint enable</description>
  43249. <bitOffset>31</bitOffset>
  43250. <bitWidth>1</bitWidth>
  43251. <access>read-write</access>
  43252. </field>
  43253. </fields>
  43254. </register>
  43255. <register> <name>OTG_HS_DIEPCTL4</name>
  43256. <displayName>OTG_HS_DIEPCTL4</displayName>
  43257. <description>OTG device endpoint-4 control
  43258. register</description>
  43259. <addressOffset>0x180</addressOffset>
  43260. <size>32</size>
  43261. <resetValue>0x0</resetValue>
  43262. <fields>
  43263. <field> <name>MPSIZ</name>
  43264. <description>Maximum packet size</description>
  43265. <bitOffset>0</bitOffset>
  43266. <bitWidth>11</bitWidth>
  43267. <access>read-write</access>
  43268. </field>
  43269. <field> <name>USBAEP</name>
  43270. <description>USB active endpoint</description>
  43271. <bitOffset>15</bitOffset>
  43272. <bitWidth>1</bitWidth>
  43273. <access>read-write</access>
  43274. </field>
  43275. <field> <name>EONUM_DPID</name>
  43276. <description>Even/odd frame</description>
  43277. <bitOffset>16</bitOffset>
  43278. <bitWidth>1</bitWidth>
  43279. <access>read-only</access>
  43280. </field>
  43281. <field> <name>NAKSTS</name>
  43282. <description>NAK status</description>
  43283. <bitOffset>17</bitOffset>
  43284. <bitWidth>1</bitWidth>
  43285. <access>read-only</access>
  43286. </field>
  43287. <field> <name>EPTYP</name>
  43288. <description>Endpoint type</description>
  43289. <bitOffset>18</bitOffset>
  43290. <bitWidth>2</bitWidth>
  43291. <access>read-write</access>
  43292. </field>
  43293. <field> <name>Stall</name>
  43294. <description>STALL handshake</description>
  43295. <bitOffset>21</bitOffset>
  43296. <bitWidth>1</bitWidth>
  43297. <access>read-write</access>
  43298. </field>
  43299. <field> <name>TXFNUM</name>
  43300. <description>TxFIFO number</description>
  43301. <bitOffset>22</bitOffset>
  43302. <bitWidth>4</bitWidth>
  43303. <access>read-write</access>
  43304. </field>
  43305. <field> <name>CNAK</name>
  43306. <description>Clear NAK</description>
  43307. <bitOffset>26</bitOffset>
  43308. <bitWidth>1</bitWidth>
  43309. <access>write-only</access>
  43310. </field>
  43311. <field> <name>SNAK</name>
  43312. <description>Set NAK</description>
  43313. <bitOffset>27</bitOffset>
  43314. <bitWidth>1</bitWidth>
  43315. <access>write-only</access>
  43316. </field>
  43317. <field> <name>SD0PID_SEVNFRM</name>
  43318. <description>Set DATA0 PID</description>
  43319. <bitOffset>28</bitOffset>
  43320. <bitWidth>1</bitWidth>
  43321. <access>write-only</access>
  43322. </field>
  43323. <field> <name>SODDFRM</name>
  43324. <description>Set odd frame</description>
  43325. <bitOffset>29</bitOffset>
  43326. <bitWidth>1</bitWidth>
  43327. <access>write-only</access>
  43328. </field>
  43329. <field> <name>EPDIS</name>
  43330. <description>Endpoint disable</description>
  43331. <bitOffset>30</bitOffset>
  43332. <bitWidth>1</bitWidth>
  43333. <access>read-write</access>
  43334. </field>
  43335. <field> <name>EPENA</name>
  43336. <description>Endpoint enable</description>
  43337. <bitOffset>31</bitOffset>
  43338. <bitWidth>1</bitWidth>
  43339. <access>read-write</access>
  43340. </field>
  43341. </fields>
  43342. </register>
  43343. <register> <name>OTG_HS_DIEPCTL5</name>
  43344. <displayName>OTG_HS_DIEPCTL5</displayName>
  43345. <description>OTG device endpoint-5 control
  43346. register</description>
  43347. <addressOffset>0x1A0</addressOffset>
  43348. <size>32</size>
  43349. <resetValue>0x0</resetValue>
  43350. <fields>
  43351. <field> <name>MPSIZ</name>
  43352. <description>Maximum packet size</description>
  43353. <bitOffset>0</bitOffset>
  43354. <bitWidth>11</bitWidth>
  43355. <access>read-write</access>
  43356. </field>
  43357. <field> <name>USBAEP</name>
  43358. <description>USB active endpoint</description>
  43359. <bitOffset>15</bitOffset>
  43360. <bitWidth>1</bitWidth>
  43361. <access>read-write</access>
  43362. </field>
  43363. <field> <name>EONUM_DPID</name>
  43364. <description>Even/odd frame</description>
  43365. <bitOffset>16</bitOffset>
  43366. <bitWidth>1</bitWidth>
  43367. <access>read-only</access>
  43368. </field>
  43369. <field> <name>NAKSTS</name>
  43370. <description>NAK status</description>
  43371. <bitOffset>17</bitOffset>
  43372. <bitWidth>1</bitWidth>
  43373. <access>read-only</access>
  43374. </field>
  43375. <field> <name>EPTYP</name>
  43376. <description>Endpoint type</description>
  43377. <bitOffset>18</bitOffset>
  43378. <bitWidth>2</bitWidth>
  43379. <access>read-write</access>
  43380. </field>
  43381. <field> <name>Stall</name>
  43382. <description>STALL handshake</description>
  43383. <bitOffset>21</bitOffset>
  43384. <bitWidth>1</bitWidth>
  43385. <access>read-write</access>
  43386. </field>
  43387. <field> <name>TXFNUM</name>
  43388. <description>TxFIFO number</description>
  43389. <bitOffset>22</bitOffset>
  43390. <bitWidth>4</bitWidth>
  43391. <access>read-write</access>
  43392. </field>
  43393. <field> <name>CNAK</name>
  43394. <description>Clear NAK</description>
  43395. <bitOffset>26</bitOffset>
  43396. <bitWidth>1</bitWidth>
  43397. <access>write-only</access>
  43398. </field>
  43399. <field> <name>SNAK</name>
  43400. <description>Set NAK</description>
  43401. <bitOffset>27</bitOffset>
  43402. <bitWidth>1</bitWidth>
  43403. <access>write-only</access>
  43404. </field>
  43405. <field> <name>SD0PID_SEVNFRM</name>
  43406. <description>Set DATA0 PID</description>
  43407. <bitOffset>28</bitOffset>
  43408. <bitWidth>1</bitWidth>
  43409. <access>write-only</access>
  43410. </field>
  43411. <field> <name>SODDFRM</name>
  43412. <description>Set odd frame</description>
  43413. <bitOffset>29</bitOffset>
  43414. <bitWidth>1</bitWidth>
  43415. <access>write-only</access>
  43416. </field>
  43417. <field> <name>EPDIS</name>
  43418. <description>Endpoint disable</description>
  43419. <bitOffset>30</bitOffset>
  43420. <bitWidth>1</bitWidth>
  43421. <access>read-write</access>
  43422. </field>
  43423. <field> <name>EPENA</name>
  43424. <description>Endpoint enable</description>
  43425. <bitOffset>31</bitOffset>
  43426. <bitWidth>1</bitWidth>
  43427. <access>read-write</access>
  43428. </field>
  43429. </fields>
  43430. </register>
  43431. <register> <name>OTG_HS_DIEPCTL6</name>
  43432. <displayName>OTG_HS_DIEPCTL6</displayName>
  43433. <description>OTG device endpoint-6 control
  43434. register</description>
  43435. <addressOffset>0x1C0</addressOffset>
  43436. <size>32</size>
  43437. <resetValue>0x0</resetValue>
  43438. <fields>
  43439. <field> <name>MPSIZ</name>
  43440. <description>Maximum packet size</description>
  43441. <bitOffset>0</bitOffset>
  43442. <bitWidth>11</bitWidth>
  43443. <access>read-write</access>
  43444. </field>
  43445. <field> <name>USBAEP</name>
  43446. <description>USB active endpoint</description>
  43447. <bitOffset>15</bitOffset>
  43448. <bitWidth>1</bitWidth>
  43449. <access>read-write</access>
  43450. </field>
  43451. <field> <name>EONUM_DPID</name>
  43452. <description>Even/odd frame</description>
  43453. <bitOffset>16</bitOffset>
  43454. <bitWidth>1</bitWidth>
  43455. <access>read-only</access>
  43456. </field>
  43457. <field> <name>NAKSTS</name>
  43458. <description>NAK status</description>
  43459. <bitOffset>17</bitOffset>
  43460. <bitWidth>1</bitWidth>
  43461. <access>read-only</access>
  43462. </field>
  43463. <field> <name>EPTYP</name>
  43464. <description>Endpoint type</description>
  43465. <bitOffset>18</bitOffset>
  43466. <bitWidth>2</bitWidth>
  43467. <access>read-write</access>
  43468. </field>
  43469. <field> <name>Stall</name>
  43470. <description>STALL handshake</description>
  43471. <bitOffset>21</bitOffset>
  43472. <bitWidth>1</bitWidth>
  43473. <access>read-write</access>
  43474. </field>
  43475. <field> <name>TXFNUM</name>
  43476. <description>TxFIFO number</description>
  43477. <bitOffset>22</bitOffset>
  43478. <bitWidth>4</bitWidth>
  43479. <access>read-write</access>
  43480. </field>
  43481. <field> <name>CNAK</name>
  43482. <description>Clear NAK</description>
  43483. <bitOffset>26</bitOffset>
  43484. <bitWidth>1</bitWidth>
  43485. <access>write-only</access>
  43486. </field>
  43487. <field> <name>SNAK</name>
  43488. <description>Set NAK</description>
  43489. <bitOffset>27</bitOffset>
  43490. <bitWidth>1</bitWidth>
  43491. <access>write-only</access>
  43492. </field>
  43493. <field> <name>SD0PID_SEVNFRM</name>
  43494. <description>Set DATA0 PID</description>
  43495. <bitOffset>28</bitOffset>
  43496. <bitWidth>1</bitWidth>
  43497. <access>write-only</access>
  43498. </field>
  43499. <field> <name>SODDFRM</name>
  43500. <description>Set odd frame</description>
  43501. <bitOffset>29</bitOffset>
  43502. <bitWidth>1</bitWidth>
  43503. <access>write-only</access>
  43504. </field>
  43505. <field> <name>EPDIS</name>
  43506. <description>Endpoint disable</description>
  43507. <bitOffset>30</bitOffset>
  43508. <bitWidth>1</bitWidth>
  43509. <access>read-write</access>
  43510. </field>
  43511. <field> <name>EPENA</name>
  43512. <description>Endpoint enable</description>
  43513. <bitOffset>31</bitOffset>
  43514. <bitWidth>1</bitWidth>
  43515. <access>read-write</access>
  43516. </field>
  43517. </fields>
  43518. </register>
  43519. <register> <name>OTG_HS_DIEPCTL7</name>
  43520. <displayName>OTG_HS_DIEPCTL7</displayName>
  43521. <description>OTG device endpoint-7 control
  43522. register</description>
  43523. <addressOffset>0x1E0</addressOffset>
  43524. <size>32</size>
  43525. <resetValue>0x0</resetValue>
  43526. <fields>
  43527. <field> <name>MPSIZ</name>
  43528. <description>Maximum packet size</description>
  43529. <bitOffset>0</bitOffset>
  43530. <bitWidth>11</bitWidth>
  43531. <access>read-write</access>
  43532. </field>
  43533. <field> <name>USBAEP</name>
  43534. <description>USB active endpoint</description>
  43535. <bitOffset>15</bitOffset>
  43536. <bitWidth>1</bitWidth>
  43537. <access>read-write</access>
  43538. </field>
  43539. <field> <name>EONUM_DPID</name>
  43540. <description>Even/odd frame</description>
  43541. <bitOffset>16</bitOffset>
  43542. <bitWidth>1</bitWidth>
  43543. <access>read-only</access>
  43544. </field>
  43545. <field> <name>NAKSTS</name>
  43546. <description>NAK status</description>
  43547. <bitOffset>17</bitOffset>
  43548. <bitWidth>1</bitWidth>
  43549. <access>read-only</access>
  43550. </field>
  43551. <field> <name>EPTYP</name>
  43552. <description>Endpoint type</description>
  43553. <bitOffset>18</bitOffset>
  43554. <bitWidth>2</bitWidth>
  43555. <access>read-write</access>
  43556. </field>
  43557. <field> <name>Stall</name>
  43558. <description>STALL handshake</description>
  43559. <bitOffset>21</bitOffset>
  43560. <bitWidth>1</bitWidth>
  43561. <access>read-write</access>
  43562. </field>
  43563. <field> <name>TXFNUM</name>
  43564. <description>TxFIFO number</description>
  43565. <bitOffset>22</bitOffset>
  43566. <bitWidth>4</bitWidth>
  43567. <access>read-write</access>
  43568. </field>
  43569. <field> <name>CNAK</name>
  43570. <description>Clear NAK</description>
  43571. <bitOffset>26</bitOffset>
  43572. <bitWidth>1</bitWidth>
  43573. <access>write-only</access>
  43574. </field>
  43575. <field> <name>SNAK</name>
  43576. <description>Set NAK</description>
  43577. <bitOffset>27</bitOffset>
  43578. <bitWidth>1</bitWidth>
  43579. <access>write-only</access>
  43580. </field>
  43581. <field> <name>SD0PID_SEVNFRM</name>
  43582. <description>Set DATA0 PID</description>
  43583. <bitOffset>28</bitOffset>
  43584. <bitWidth>1</bitWidth>
  43585. <access>write-only</access>
  43586. </field>
  43587. <field> <name>SODDFRM</name>
  43588. <description>Set odd frame</description>
  43589. <bitOffset>29</bitOffset>
  43590. <bitWidth>1</bitWidth>
  43591. <access>write-only</access>
  43592. </field>
  43593. <field> <name>EPDIS</name>
  43594. <description>Endpoint disable</description>
  43595. <bitOffset>30</bitOffset>
  43596. <bitWidth>1</bitWidth>
  43597. <access>read-write</access>
  43598. </field>
  43599. <field> <name>EPENA</name>
  43600. <description>Endpoint enable</description>
  43601. <bitOffset>31</bitOffset>
  43602. <bitWidth>1</bitWidth>
  43603. <access>read-write</access>
  43604. </field>
  43605. </fields>
  43606. </register>
  43607. <register> <name>OTG_HS_DIEPINT0</name>
  43608. <displayName>OTG_HS_DIEPINT0</displayName>
  43609. <description>OTG device endpoint-0 interrupt
  43610. register</description>
  43611. <addressOffset>0x108</addressOffset>
  43612. <size>32</size>
  43613. <resetValue>0x00000080</resetValue>
  43614. <fields>
  43615. <field> <name>XFRC</name>
  43616. <description>Transfer completed
  43617. interrupt</description>
  43618. <bitOffset>0</bitOffset>
  43619. <bitWidth>1</bitWidth>
  43620. <access>read-write</access>
  43621. </field>
  43622. <field> <name>EPDISD</name>
  43623. <description>Endpoint disabled
  43624. interrupt</description>
  43625. <bitOffset>1</bitOffset>
  43626. <bitWidth>1</bitWidth>
  43627. <access>read-write</access>
  43628. </field>
  43629. <field> <name>TOC</name>
  43630. <description>Timeout condition</description>
  43631. <bitOffset>3</bitOffset>
  43632. <bitWidth>1</bitWidth>
  43633. <access>read-write</access>
  43634. </field>
  43635. <field> <name>ITTXFE</name>
  43636. <description>IN token received when TxFIFO is
  43637. empty</description>
  43638. <bitOffset>4</bitOffset>
  43639. <bitWidth>1</bitWidth>
  43640. <access>read-write</access>
  43641. </field>
  43642. <field> <name>INEPNE</name>
  43643. <description>IN endpoint NAK effective</description>
  43644. <bitOffset>6</bitOffset>
  43645. <bitWidth>1</bitWidth>
  43646. <access>read-write</access>
  43647. </field>
  43648. <field> <name>TXFE</name>
  43649. <description>Transmit FIFO empty</description>
  43650. <bitOffset>7</bitOffset>
  43651. <bitWidth>1</bitWidth>
  43652. <access>read-only</access>
  43653. </field>
  43654. <field> <name>TXFIFOUDRN</name>
  43655. <description>Transmit Fifo Underrun</description>
  43656. <bitOffset>8</bitOffset>
  43657. <bitWidth>1</bitWidth>
  43658. <access>read-write</access>
  43659. </field>
  43660. <field> <name>BNA</name>
  43661. <description>Buffer not available
  43662. interrupt</description>
  43663. <bitOffset>9</bitOffset>
  43664. <bitWidth>1</bitWidth>
  43665. <access>read-write</access>
  43666. </field>
  43667. <field> <name>PKTDRPSTS</name>
  43668. <description>Packet dropped status</description>
  43669. <bitOffset>11</bitOffset>
  43670. <bitWidth>1</bitWidth>
  43671. <access>read-write</access>
  43672. </field>
  43673. <field> <name>BERR</name>
  43674. <description>Babble error interrupt</description>
  43675. <bitOffset>12</bitOffset>
  43676. <bitWidth>1</bitWidth>
  43677. <access>read-write</access>
  43678. </field>
  43679. <field> <name>NAK</name>
  43680. <description>NAK interrupt</description>
  43681. <bitOffset>13</bitOffset>
  43682. <bitWidth>1</bitWidth>
  43683. <access>read-write</access>
  43684. </field>
  43685. </fields>
  43686. </register>
  43687. <register> <name>OTG_HS_DIEPINT1</name>
  43688. <displayName>OTG_HS_DIEPINT1</displayName>
  43689. <description>OTG device endpoint-1 interrupt
  43690. register</description>
  43691. <addressOffset>0x128</addressOffset>
  43692. <size>32</size>
  43693. <resetValue>0x0</resetValue>
  43694. <fields>
  43695. <field> <name>XFRC</name>
  43696. <description>Transfer completed
  43697. interrupt</description>
  43698. <bitOffset>0</bitOffset>
  43699. <bitWidth>1</bitWidth>
  43700. <access>read-write</access>
  43701. </field>
  43702. <field> <name>EPDISD</name>
  43703. <description>Endpoint disabled
  43704. interrupt</description>
  43705. <bitOffset>1</bitOffset>
  43706. <bitWidth>1</bitWidth>
  43707. <access>read-write</access>
  43708. </field>
  43709. <field> <name>TOC</name>
  43710. <description>Timeout condition</description>
  43711. <bitOffset>3</bitOffset>
  43712. <bitWidth>1</bitWidth>
  43713. <access>read-write</access>
  43714. </field>
  43715. <field> <name>ITTXFE</name>
  43716. <description>IN token received when TxFIFO is
  43717. empty</description>
  43718. <bitOffset>4</bitOffset>
  43719. <bitWidth>1</bitWidth>
  43720. <access>read-write</access>
  43721. </field>
  43722. <field> <name>INEPNE</name>
  43723. <description>IN endpoint NAK effective</description>
  43724. <bitOffset>6</bitOffset>
  43725. <bitWidth>1</bitWidth>
  43726. <access>read-write</access>
  43727. </field>
  43728. <field> <name>TXFE</name>
  43729. <description>Transmit FIFO empty</description>
  43730. <bitOffset>7</bitOffset>
  43731. <bitWidth>1</bitWidth>
  43732. <access>read-only</access>
  43733. </field>
  43734. <field> <name>TXFIFOUDRN</name>
  43735. <description>Transmit Fifo Underrun</description>
  43736. <bitOffset>8</bitOffset>
  43737. <bitWidth>1</bitWidth>
  43738. <access>read-write</access>
  43739. </field>
  43740. <field> <name>BNA</name>
  43741. <description>Buffer not available
  43742. interrupt</description>
  43743. <bitOffset>9</bitOffset>
  43744. <bitWidth>1</bitWidth>
  43745. <access>read-write</access>
  43746. </field>
  43747. <field> <name>PKTDRPSTS</name>
  43748. <description>Packet dropped status</description>
  43749. <bitOffset>11</bitOffset>
  43750. <bitWidth>1</bitWidth>
  43751. <access>read-write</access>
  43752. </field>
  43753. <field> <name>BERR</name>
  43754. <description>Babble error interrupt</description>
  43755. <bitOffset>12</bitOffset>
  43756. <bitWidth>1</bitWidth>
  43757. <access>read-write</access>
  43758. </field>
  43759. <field> <name>NAK</name>
  43760. <description>NAK interrupt</description>
  43761. <bitOffset>13</bitOffset>
  43762. <bitWidth>1</bitWidth>
  43763. <access>read-write</access>
  43764. </field>
  43765. </fields>
  43766. </register>
  43767. <register> <name>OTG_HS_DIEPINT2</name>
  43768. <displayName>OTG_HS_DIEPINT2</displayName>
  43769. <description>OTG device endpoint-2 interrupt
  43770. register</description>
  43771. <addressOffset>0x148</addressOffset>
  43772. <size>32</size>
  43773. <resetValue>0x0</resetValue>
  43774. <fields>
  43775. <field> <name>XFRC</name>
  43776. <description>Transfer completed
  43777. interrupt</description>
  43778. <bitOffset>0</bitOffset>
  43779. <bitWidth>1</bitWidth>
  43780. <access>read-write</access>
  43781. </field>
  43782. <field> <name>EPDISD</name>
  43783. <description>Endpoint disabled
  43784. interrupt</description>
  43785. <bitOffset>1</bitOffset>
  43786. <bitWidth>1</bitWidth>
  43787. <access>read-write</access>
  43788. </field>
  43789. <field> <name>TOC</name>
  43790. <description>Timeout condition</description>
  43791. <bitOffset>3</bitOffset>
  43792. <bitWidth>1</bitWidth>
  43793. <access>read-write</access>
  43794. </field>
  43795. <field> <name>ITTXFE</name>
  43796. <description>IN token received when TxFIFO is
  43797. empty</description>
  43798. <bitOffset>4</bitOffset>
  43799. <bitWidth>1</bitWidth>
  43800. <access>read-write</access>
  43801. </field>
  43802. <field> <name>INEPNE</name>
  43803. <description>IN endpoint NAK effective</description>
  43804. <bitOffset>6</bitOffset>
  43805. <bitWidth>1</bitWidth>
  43806. <access>read-write</access>
  43807. </field>
  43808. <field> <name>TXFE</name>
  43809. <description>Transmit FIFO empty</description>
  43810. <bitOffset>7</bitOffset>
  43811. <bitWidth>1</bitWidth>
  43812. <access>read-only</access>
  43813. </field>
  43814. <field> <name>TXFIFOUDRN</name>
  43815. <description>Transmit Fifo Underrun</description>
  43816. <bitOffset>8</bitOffset>
  43817. <bitWidth>1</bitWidth>
  43818. <access>read-write</access>
  43819. </field>
  43820. <field> <name>BNA</name>
  43821. <description>Buffer not available
  43822. interrupt</description>
  43823. <bitOffset>9</bitOffset>
  43824. <bitWidth>1</bitWidth>
  43825. <access>read-write</access>
  43826. </field>
  43827. <field> <name>PKTDRPSTS</name>
  43828. <description>Packet dropped status</description>
  43829. <bitOffset>11</bitOffset>
  43830. <bitWidth>1</bitWidth>
  43831. <access>read-write</access>
  43832. </field>
  43833. <field> <name>BERR</name>
  43834. <description>Babble error interrupt</description>
  43835. <bitOffset>12</bitOffset>
  43836. <bitWidth>1</bitWidth>
  43837. <access>read-write</access>
  43838. </field>
  43839. <field> <name>NAK</name>
  43840. <description>NAK interrupt</description>
  43841. <bitOffset>13</bitOffset>
  43842. <bitWidth>1</bitWidth>
  43843. <access>read-write</access>
  43844. </field>
  43845. </fields>
  43846. </register>
  43847. <register> <name>OTG_HS_DIEPINT3</name>
  43848. <displayName>OTG_HS_DIEPINT3</displayName>
  43849. <description>OTG device endpoint-3 interrupt
  43850. register</description>
  43851. <addressOffset>0x168</addressOffset>
  43852. <size>32</size>
  43853. <resetValue>0x0</resetValue>
  43854. <fields>
  43855. <field> <name>XFRC</name>
  43856. <description>Transfer completed
  43857. interrupt</description>
  43858. <bitOffset>0</bitOffset>
  43859. <bitWidth>1</bitWidth>
  43860. <access>read-write</access>
  43861. </field>
  43862. <field> <name>EPDISD</name>
  43863. <description>Endpoint disabled
  43864. interrupt</description>
  43865. <bitOffset>1</bitOffset>
  43866. <bitWidth>1</bitWidth>
  43867. <access>read-write</access>
  43868. </field>
  43869. <field> <name>TOC</name>
  43870. <description>Timeout condition</description>
  43871. <bitOffset>3</bitOffset>
  43872. <bitWidth>1</bitWidth>
  43873. <access>read-write</access>
  43874. </field>
  43875. <field> <name>ITTXFE</name>
  43876. <description>IN token received when TxFIFO is
  43877. empty</description>
  43878. <bitOffset>4</bitOffset>
  43879. <bitWidth>1</bitWidth>
  43880. <access>read-write</access>
  43881. </field>
  43882. <field> <name>INEPNE</name>
  43883. <description>IN endpoint NAK effective</description>
  43884. <bitOffset>6</bitOffset>
  43885. <bitWidth>1</bitWidth>
  43886. <access>read-write</access>
  43887. </field>
  43888. <field> <name>TXFE</name>
  43889. <description>Transmit FIFO empty</description>
  43890. <bitOffset>7</bitOffset>
  43891. <bitWidth>1</bitWidth>
  43892. <access>read-only</access>
  43893. </field>
  43894. <field> <name>TXFIFOUDRN</name>
  43895. <description>Transmit Fifo Underrun</description>
  43896. <bitOffset>8</bitOffset>
  43897. <bitWidth>1</bitWidth>
  43898. <access>read-write</access>
  43899. </field>
  43900. <field> <name>BNA</name>
  43901. <description>Buffer not available
  43902. interrupt</description>
  43903. <bitOffset>9</bitOffset>
  43904. <bitWidth>1</bitWidth>
  43905. <access>read-write</access>
  43906. </field>
  43907. <field> <name>PKTDRPSTS</name>
  43908. <description>Packet dropped status</description>
  43909. <bitOffset>11</bitOffset>
  43910. <bitWidth>1</bitWidth>
  43911. <access>read-write</access>
  43912. </field>
  43913. <field> <name>BERR</name>
  43914. <description>Babble error interrupt</description>
  43915. <bitOffset>12</bitOffset>
  43916. <bitWidth>1</bitWidth>
  43917. <access>read-write</access>
  43918. </field>
  43919. <field> <name>NAK</name>
  43920. <description>NAK interrupt</description>
  43921. <bitOffset>13</bitOffset>
  43922. <bitWidth>1</bitWidth>
  43923. <access>read-write</access>
  43924. </field>
  43925. </fields>
  43926. </register>
  43927. <register> <name>OTG_HS_DIEPINT4</name>
  43928. <displayName>OTG_HS_DIEPINT4</displayName>
  43929. <description>OTG device endpoint-4 interrupt
  43930. register</description>
  43931. <addressOffset>0x188</addressOffset>
  43932. <size>32</size>
  43933. <resetValue>0x0</resetValue>
  43934. <fields>
  43935. <field> <name>XFRC</name>
  43936. <description>Transfer completed
  43937. interrupt</description>
  43938. <bitOffset>0</bitOffset>
  43939. <bitWidth>1</bitWidth>
  43940. <access>read-write</access>
  43941. </field>
  43942. <field> <name>EPDISD</name>
  43943. <description>Endpoint disabled
  43944. interrupt</description>
  43945. <bitOffset>1</bitOffset>
  43946. <bitWidth>1</bitWidth>
  43947. <access>read-write</access>
  43948. </field>
  43949. <field> <name>TOC</name>
  43950. <description>Timeout condition</description>
  43951. <bitOffset>3</bitOffset>
  43952. <bitWidth>1</bitWidth>
  43953. <access>read-write</access>
  43954. </field>
  43955. <field> <name>ITTXFE</name>
  43956. <description>IN token received when TxFIFO is
  43957. empty</description>
  43958. <bitOffset>4</bitOffset>
  43959. <bitWidth>1</bitWidth>
  43960. <access>read-write</access>
  43961. </field>
  43962. <field> <name>INEPNE</name>
  43963. <description>IN endpoint NAK effective</description>
  43964. <bitOffset>6</bitOffset>
  43965. <bitWidth>1</bitWidth>
  43966. <access>read-write</access>
  43967. </field>
  43968. <field> <name>TXFE</name>
  43969. <description>Transmit FIFO empty</description>
  43970. <bitOffset>7</bitOffset>
  43971. <bitWidth>1</bitWidth>
  43972. <access>read-only</access>
  43973. </field>
  43974. <field> <name>TXFIFOUDRN</name>
  43975. <description>Transmit Fifo Underrun</description>
  43976. <bitOffset>8</bitOffset>
  43977. <bitWidth>1</bitWidth>
  43978. <access>read-write</access>
  43979. </field>
  43980. <field> <name>BNA</name>
  43981. <description>Buffer not available
  43982. interrupt</description>
  43983. <bitOffset>9</bitOffset>
  43984. <bitWidth>1</bitWidth>
  43985. <access>read-write</access>
  43986. </field>
  43987. <field> <name>PKTDRPSTS</name>
  43988. <description>Packet dropped status</description>
  43989. <bitOffset>11</bitOffset>
  43990. <bitWidth>1</bitWidth>
  43991. <access>read-write</access>
  43992. </field>
  43993. <field> <name>BERR</name>
  43994. <description>Babble error interrupt</description>
  43995. <bitOffset>12</bitOffset>
  43996. <bitWidth>1</bitWidth>
  43997. <access>read-write</access>
  43998. </field>
  43999. <field> <name>NAK</name>
  44000. <description>NAK interrupt</description>
  44001. <bitOffset>13</bitOffset>
  44002. <bitWidth>1</bitWidth>
  44003. <access>read-write</access>
  44004. </field>
  44005. </fields>
  44006. </register>
  44007. <register> <name>OTG_HS_DIEPINT5</name>
  44008. <displayName>OTG_HS_DIEPINT5</displayName>
  44009. <description>OTG device endpoint-5 interrupt
  44010. register</description>
  44011. <addressOffset>0x1A8</addressOffset>
  44012. <size>32</size>
  44013. <resetValue>0x0</resetValue>
  44014. <fields>
  44015. <field> <name>XFRC</name>
  44016. <description>Transfer completed
  44017. interrupt</description>
  44018. <bitOffset>0</bitOffset>
  44019. <bitWidth>1</bitWidth>
  44020. <access>read-write</access>
  44021. </field>
  44022. <field> <name>EPDISD</name>
  44023. <description>Endpoint disabled
  44024. interrupt</description>
  44025. <bitOffset>1</bitOffset>
  44026. <bitWidth>1</bitWidth>
  44027. <access>read-write</access>
  44028. </field>
  44029. <field> <name>TOC</name>
  44030. <description>Timeout condition</description>
  44031. <bitOffset>3</bitOffset>
  44032. <bitWidth>1</bitWidth>
  44033. <access>read-write</access>
  44034. </field>
  44035. <field> <name>ITTXFE</name>
  44036. <description>IN token received when TxFIFO is
  44037. empty</description>
  44038. <bitOffset>4</bitOffset>
  44039. <bitWidth>1</bitWidth>
  44040. <access>read-write</access>
  44041. </field>
  44042. <field> <name>INEPNE</name>
  44043. <description>IN endpoint NAK effective</description>
  44044. <bitOffset>6</bitOffset>
  44045. <bitWidth>1</bitWidth>
  44046. <access>read-write</access>
  44047. </field>
  44048. <field> <name>TXFE</name>
  44049. <description>Transmit FIFO empty</description>
  44050. <bitOffset>7</bitOffset>
  44051. <bitWidth>1</bitWidth>
  44052. <access>read-only</access>
  44053. </field>
  44054. <field> <name>TXFIFOUDRN</name>
  44055. <description>Transmit Fifo Underrun</description>
  44056. <bitOffset>8</bitOffset>
  44057. <bitWidth>1</bitWidth>
  44058. <access>read-write</access>
  44059. </field>
  44060. <field> <name>BNA</name>
  44061. <description>Buffer not available
  44062. interrupt</description>
  44063. <bitOffset>9</bitOffset>
  44064. <bitWidth>1</bitWidth>
  44065. <access>read-write</access>
  44066. </field>
  44067. <field> <name>PKTDRPSTS</name>
  44068. <description>Packet dropped status</description>
  44069. <bitOffset>11</bitOffset>
  44070. <bitWidth>1</bitWidth>
  44071. <access>read-write</access>
  44072. </field>
  44073. <field> <name>BERR</name>
  44074. <description>Babble error interrupt</description>
  44075. <bitOffset>12</bitOffset>
  44076. <bitWidth>1</bitWidth>
  44077. <access>read-write</access>
  44078. </field>
  44079. <field> <name>NAK</name>
  44080. <description>NAK interrupt</description>
  44081. <bitOffset>13</bitOffset>
  44082. <bitWidth>1</bitWidth>
  44083. <access>read-write</access>
  44084. </field>
  44085. </fields>
  44086. </register>
  44087. <register> <name>OTG_HS_DIEPINT6</name>
  44088. <displayName>OTG_HS_DIEPINT6</displayName>
  44089. <description>OTG device endpoint-6 interrupt
  44090. register</description>
  44091. <addressOffset>0x1C8</addressOffset>
  44092. <size>32</size>
  44093. <resetValue>0x0</resetValue>
  44094. <fields>
  44095. <field> <name>XFRC</name>
  44096. <description>Transfer completed
  44097. interrupt</description>
  44098. <bitOffset>0</bitOffset>
  44099. <bitWidth>1</bitWidth>
  44100. <access>read-write</access>
  44101. </field>
  44102. <field> <name>EPDISD</name>
  44103. <description>Endpoint disabled
  44104. interrupt</description>
  44105. <bitOffset>1</bitOffset>
  44106. <bitWidth>1</bitWidth>
  44107. <access>read-write</access>
  44108. </field>
  44109. <field> <name>TOC</name>
  44110. <description>Timeout condition</description>
  44111. <bitOffset>3</bitOffset>
  44112. <bitWidth>1</bitWidth>
  44113. <access>read-write</access>
  44114. </field>
  44115. <field> <name>ITTXFE</name>
  44116. <description>IN token received when TxFIFO is
  44117. empty</description>
  44118. <bitOffset>4</bitOffset>
  44119. <bitWidth>1</bitWidth>
  44120. <access>read-write</access>
  44121. </field>
  44122. <field> <name>INEPNE</name>
  44123. <description>IN endpoint NAK effective</description>
  44124. <bitOffset>6</bitOffset>
  44125. <bitWidth>1</bitWidth>
  44126. <access>read-write</access>
  44127. </field>
  44128. <field> <name>TXFE</name>
  44129. <description>Transmit FIFO empty</description>
  44130. <bitOffset>7</bitOffset>
  44131. <bitWidth>1</bitWidth>
  44132. <access>read-only</access>
  44133. </field>
  44134. <field> <name>TXFIFOUDRN</name>
  44135. <description>Transmit Fifo Underrun</description>
  44136. <bitOffset>8</bitOffset>
  44137. <bitWidth>1</bitWidth>
  44138. <access>read-write</access>
  44139. </field>
  44140. <field> <name>BNA</name>
  44141. <description>Buffer not available
  44142. interrupt</description>
  44143. <bitOffset>9</bitOffset>
  44144. <bitWidth>1</bitWidth>
  44145. <access>read-write</access>
  44146. </field>
  44147. <field> <name>PKTDRPSTS</name>
  44148. <description>Packet dropped status</description>
  44149. <bitOffset>11</bitOffset>
  44150. <bitWidth>1</bitWidth>
  44151. <access>read-write</access>
  44152. </field>
  44153. <field> <name>BERR</name>
  44154. <description>Babble error interrupt</description>
  44155. <bitOffset>12</bitOffset>
  44156. <bitWidth>1</bitWidth>
  44157. <access>read-write</access>
  44158. </field>
  44159. <field> <name>NAK</name>
  44160. <description>NAK interrupt</description>
  44161. <bitOffset>13</bitOffset>
  44162. <bitWidth>1</bitWidth>
  44163. <access>read-write</access>
  44164. </field>
  44165. </fields>
  44166. </register>
  44167. <register> <name>OTG_HS_DIEPINT7</name>
  44168. <displayName>OTG_HS_DIEPINT7</displayName>
  44169. <description>OTG device endpoint-7 interrupt
  44170. register</description>
  44171. <addressOffset>0x1E8</addressOffset>
  44172. <size>32</size>
  44173. <resetValue>0x0</resetValue>
  44174. <fields>
  44175. <field> <name>XFRC</name>
  44176. <description>Transfer completed
  44177. interrupt</description>
  44178. <bitOffset>0</bitOffset>
  44179. <bitWidth>1</bitWidth>
  44180. <access>read-write</access>
  44181. </field>
  44182. <field> <name>EPDISD</name>
  44183. <description>Endpoint disabled
  44184. interrupt</description>
  44185. <bitOffset>1</bitOffset>
  44186. <bitWidth>1</bitWidth>
  44187. <access>read-write</access>
  44188. </field>
  44189. <field> <name>TOC</name>
  44190. <description>Timeout condition</description>
  44191. <bitOffset>3</bitOffset>
  44192. <bitWidth>1</bitWidth>
  44193. <access>read-write</access>
  44194. </field>
  44195. <field> <name>ITTXFE</name>
  44196. <description>IN token received when TxFIFO is
  44197. empty</description>
  44198. <bitOffset>4</bitOffset>
  44199. <bitWidth>1</bitWidth>
  44200. <access>read-write</access>
  44201. </field>
  44202. <field> <name>INEPNE</name>
  44203. <description>IN endpoint NAK effective</description>
  44204. <bitOffset>6</bitOffset>
  44205. <bitWidth>1</bitWidth>
  44206. <access>read-write</access>
  44207. </field>
  44208. <field> <name>TXFE</name>
  44209. <description>Transmit FIFO empty</description>
  44210. <bitOffset>7</bitOffset>
  44211. <bitWidth>1</bitWidth>
  44212. <access>read-only</access>
  44213. </field>
  44214. <field> <name>TXFIFOUDRN</name>
  44215. <description>Transmit Fifo Underrun</description>
  44216. <bitOffset>8</bitOffset>
  44217. <bitWidth>1</bitWidth>
  44218. <access>read-write</access>
  44219. </field>
  44220. <field> <name>BNA</name>
  44221. <description>Buffer not available
  44222. interrupt</description>
  44223. <bitOffset>9</bitOffset>
  44224. <bitWidth>1</bitWidth>
  44225. <access>read-write</access>
  44226. </field>
  44227. <field> <name>PKTDRPSTS</name>
  44228. <description>Packet dropped status</description>
  44229. <bitOffset>11</bitOffset>
  44230. <bitWidth>1</bitWidth>
  44231. <access>read-write</access>
  44232. </field>
  44233. <field> <name>BERR</name>
  44234. <description>Babble error interrupt</description>
  44235. <bitOffset>12</bitOffset>
  44236. <bitWidth>1</bitWidth>
  44237. <access>read-write</access>
  44238. </field>
  44239. <field> <name>NAK</name>
  44240. <description>NAK interrupt</description>
  44241. <bitOffset>13</bitOffset>
  44242. <bitWidth>1</bitWidth>
  44243. <access>read-write</access>
  44244. </field>
  44245. </fields>
  44246. </register>
  44247. <register> <name>OTG_HS_DIEPTSIZ0</name>
  44248. <displayName>OTG_HS_DIEPTSIZ0</displayName>
  44249. <description>OTG_HS device IN endpoint 0 transfer size
  44250. register</description>
  44251. <addressOffset>0x110</addressOffset>
  44252. <size>32</size>
  44253. <access>read-write</access>
  44254. <resetValue>0x0</resetValue>
  44255. <fields>
  44256. <field> <name>XFRSIZ</name>
  44257. <description>Transfer size</description>
  44258. <bitOffset>0</bitOffset>
  44259. <bitWidth>7</bitWidth>
  44260. </field>
  44261. <field> <name>PKTCNT</name>
  44262. <description>Packet count</description>
  44263. <bitOffset>19</bitOffset>
  44264. <bitWidth>2</bitWidth>
  44265. </field>
  44266. </fields>
  44267. </register>
  44268. <register> <name>OTG_HS_DIEPDMA1</name>
  44269. <displayName>OTG_HS_DIEPDMA1</displayName>
  44270. <description>OTG_HS device endpoint-1 DMA address
  44271. register</description>
  44272. <addressOffset>0x114</addressOffset>
  44273. <size>32</size>
  44274. <access>read-write</access>
  44275. <resetValue>0x0</resetValue>
  44276. <fields>
  44277. <field> <name>DMAADDR</name>
  44278. <description>DMA address</description>
  44279. <bitOffset>0</bitOffset>
  44280. <bitWidth>32</bitWidth>
  44281. </field>
  44282. </fields>
  44283. </register>
  44284. <register> <name>OTG_HS_DIEPDMA2</name>
  44285. <displayName>OTG_HS_DIEPDMA2</displayName>
  44286. <description>OTG_HS device endpoint-2 DMA address
  44287. register</description>
  44288. <addressOffset>0x134</addressOffset>
  44289. <size>32</size>
  44290. <access>read-write</access>
  44291. <resetValue>0x0</resetValue>
  44292. <fields>
  44293. <field> <name>DMAADDR</name>
  44294. <description>DMA address</description>
  44295. <bitOffset>0</bitOffset>
  44296. <bitWidth>32</bitWidth>
  44297. </field>
  44298. </fields>
  44299. </register>
  44300. <register> <name>OTG_HS_DIEPDMA3</name>
  44301. <displayName>OTG_HS_DIEPDMA3</displayName>
  44302. <description>OTG_HS device endpoint-3 DMA address
  44303. register</description>
  44304. <addressOffset>0x154</addressOffset>
  44305. <size>32</size>
  44306. <access>read-write</access>
  44307. <resetValue>0x0</resetValue>
  44308. <fields>
  44309. <field> <name>DMAADDR</name>
  44310. <description>DMA address</description>
  44311. <bitOffset>0</bitOffset>
  44312. <bitWidth>32</bitWidth>
  44313. </field>
  44314. </fields>
  44315. </register>
  44316. <register> <name>OTG_HS_DIEPDMA4</name>
  44317. <displayName>OTG_HS_DIEPDMA4</displayName>
  44318. <description>OTG_HS device endpoint-4 DMA address
  44319. register</description>
  44320. <addressOffset>0x174</addressOffset>
  44321. <size>32</size>
  44322. <access>read-write</access>
  44323. <resetValue>0x0</resetValue>
  44324. <fields>
  44325. <field> <name>DMAADDR</name>
  44326. <description>DMA address</description>
  44327. <bitOffset>0</bitOffset>
  44328. <bitWidth>32</bitWidth>
  44329. </field>
  44330. </fields>
  44331. </register>
  44332. <register> <name>OTG_HS_DIEPDMA5</name>
  44333. <displayName>OTG_HS_DIEPDMA5</displayName>
  44334. <description>OTG_HS device endpoint-5 DMA address
  44335. register</description>
  44336. <addressOffset>0x194</addressOffset>
  44337. <size>32</size>
  44338. <access>read-write</access>
  44339. <resetValue>0x0</resetValue>
  44340. <fields>
  44341. <field> <name>DMAADDR</name>
  44342. <description>DMA address</description>
  44343. <bitOffset>0</bitOffset>
  44344. <bitWidth>32</bitWidth>
  44345. </field>
  44346. </fields>
  44347. </register>
  44348. <register> <name>OTG_HS_DTXFSTS0</name>
  44349. <displayName>OTG_HS_DTXFSTS0</displayName>
  44350. <description>OTG_HS device IN endpoint transmit FIFO
  44351. status register</description>
  44352. <addressOffset>0x118</addressOffset>
  44353. <size>32</size>
  44354. <access>read-only</access>
  44355. <resetValue>0x0</resetValue>
  44356. <fields>
  44357. <field> <name>INEPTFSAV</name>
  44358. <description>IN endpoint TxFIFO space
  44359. avail</description>
  44360. <bitOffset>0</bitOffset>
  44361. <bitWidth>16</bitWidth>
  44362. </field>
  44363. </fields>
  44364. </register>
  44365. <register> <name>OTG_HS_DTXFSTS1</name>
  44366. <displayName>OTG_HS_DTXFSTS1</displayName>
  44367. <description>OTG_HS device IN endpoint transmit FIFO
  44368. status register</description>
  44369. <addressOffset>0x138</addressOffset>
  44370. <size>32</size>
  44371. <access>read-only</access>
  44372. <resetValue>0x0</resetValue>
  44373. <fields>
  44374. <field> <name>INEPTFSAV</name>
  44375. <description>IN endpoint TxFIFO space
  44376. avail</description>
  44377. <bitOffset>0</bitOffset>
  44378. <bitWidth>16</bitWidth>
  44379. </field>
  44380. </fields>
  44381. </register>
  44382. <register> <name>OTG_HS_DTXFSTS2</name>
  44383. <displayName>OTG_HS_DTXFSTS2</displayName>
  44384. <description>OTG_HS device IN endpoint transmit FIFO
  44385. status register</description>
  44386. <addressOffset>0x158</addressOffset>
  44387. <size>32</size>
  44388. <access>read-only</access>
  44389. <resetValue>0x0</resetValue>
  44390. <fields>
  44391. <field> <name>INEPTFSAV</name>
  44392. <description>IN endpoint TxFIFO space
  44393. avail</description>
  44394. <bitOffset>0</bitOffset>
  44395. <bitWidth>16</bitWidth>
  44396. </field>
  44397. </fields>
  44398. </register>
  44399. <register> <name>OTG_HS_DTXFSTS3</name>
  44400. <displayName>OTG_HS_DTXFSTS3</displayName>
  44401. <description>OTG_HS device IN endpoint transmit FIFO
  44402. status register</description>
  44403. <addressOffset>0x178</addressOffset>
  44404. <size>32</size>
  44405. <access>read-only</access>
  44406. <resetValue>0x0</resetValue>
  44407. <fields>
  44408. <field> <name>INEPTFSAV</name>
  44409. <description>IN endpoint TxFIFO space
  44410. avail</description>
  44411. <bitOffset>0</bitOffset>
  44412. <bitWidth>16</bitWidth>
  44413. </field>
  44414. </fields>
  44415. </register>
  44416. <register> <name>OTG_HS_DTXFSTS4</name>
  44417. <displayName>OTG_HS_DTXFSTS4</displayName>
  44418. <description>OTG_HS device IN endpoint transmit FIFO
  44419. status register</description>
  44420. <addressOffset>0x198</addressOffset>
  44421. <size>32</size>
  44422. <access>read-only</access>
  44423. <resetValue>0x0</resetValue>
  44424. <fields>
  44425. <field> <name>INEPTFSAV</name>
  44426. <description>IN endpoint TxFIFO space
  44427. avail</description>
  44428. <bitOffset>0</bitOffset>
  44429. <bitWidth>16</bitWidth>
  44430. </field>
  44431. </fields>
  44432. </register>
  44433. <register> <name>OTG_HS_DTXFSTS5</name>
  44434. <displayName>OTG_HS_DTXFSTS5</displayName>
  44435. <description>OTG_HS device IN endpoint transmit FIFO
  44436. status register</description>
  44437. <addressOffset>0x1B8</addressOffset>
  44438. <size>32</size>
  44439. <access>read-only</access>
  44440. <resetValue>0x0</resetValue>
  44441. <fields>
  44442. <field> <name>INEPTFSAV</name>
  44443. <description>IN endpoint TxFIFO space
  44444. avail</description>
  44445. <bitOffset>0</bitOffset>
  44446. <bitWidth>16</bitWidth>
  44447. </field>
  44448. </fields>
  44449. </register>
  44450. <register> <name>OTG_HS_DIEPTSIZ1</name>
  44451. <displayName>OTG_HS_DIEPTSIZ1</displayName>
  44452. <description>OTG_HS device endpoint transfer size
  44453. register</description>
  44454. <addressOffset>0x130</addressOffset>
  44455. <size>32</size>
  44456. <access>read-write</access>
  44457. <resetValue>0x0</resetValue>
  44458. <fields>
  44459. <field> <name>XFRSIZ</name>
  44460. <description>Transfer size</description>
  44461. <bitOffset>0</bitOffset>
  44462. <bitWidth>19</bitWidth>
  44463. </field>
  44464. <field> <name>PKTCNT</name>
  44465. <description>Packet count</description>
  44466. <bitOffset>19</bitOffset>
  44467. <bitWidth>10</bitWidth>
  44468. </field>
  44469. <field> <name>MCNT</name>
  44470. <description>Multi count</description>
  44471. <bitOffset>29</bitOffset>
  44472. <bitWidth>2</bitWidth>
  44473. </field>
  44474. </fields>
  44475. </register>
  44476. <register> <name>OTG_HS_DIEPTSIZ2</name>
  44477. <displayName>OTG_HS_DIEPTSIZ2</displayName>
  44478. <description>OTG_HS device endpoint transfer size
  44479. register</description>
  44480. <addressOffset>0x150</addressOffset>
  44481. <size>32</size>
  44482. <access>read-write</access>
  44483. <resetValue>0x0</resetValue>
  44484. <fields>
  44485. <field> <name>XFRSIZ</name>
  44486. <description>Transfer size</description>
  44487. <bitOffset>0</bitOffset>
  44488. <bitWidth>19</bitWidth>
  44489. </field>
  44490. <field> <name>PKTCNT</name>
  44491. <description>Packet count</description>
  44492. <bitOffset>19</bitOffset>
  44493. <bitWidth>10</bitWidth>
  44494. </field>
  44495. <field> <name>MCNT</name>
  44496. <description>Multi count</description>
  44497. <bitOffset>29</bitOffset>
  44498. <bitWidth>2</bitWidth>
  44499. </field>
  44500. </fields>
  44501. </register>
  44502. <register> <name>OTG_HS_DIEPTSIZ3</name>
  44503. <displayName>OTG_HS_DIEPTSIZ3</displayName>
  44504. <description>OTG_HS device endpoint transfer size
  44505. register</description>
  44506. <addressOffset>0x170</addressOffset>
  44507. <size>32</size>
  44508. <access>read-write</access>
  44509. <resetValue>0x0</resetValue>
  44510. <fields>
  44511. <field> <name>XFRSIZ</name>
  44512. <description>Transfer size</description>
  44513. <bitOffset>0</bitOffset>
  44514. <bitWidth>19</bitWidth>
  44515. </field>
  44516. <field> <name>PKTCNT</name>
  44517. <description>Packet count</description>
  44518. <bitOffset>19</bitOffset>
  44519. <bitWidth>10</bitWidth>
  44520. </field>
  44521. <field> <name>MCNT</name>
  44522. <description>Multi count</description>
  44523. <bitOffset>29</bitOffset>
  44524. <bitWidth>2</bitWidth>
  44525. </field>
  44526. </fields>
  44527. </register>
  44528. <register> <name>OTG_HS_DIEPTSIZ4</name>
  44529. <displayName>OTG_HS_DIEPTSIZ4</displayName>
  44530. <description>OTG_HS device endpoint transfer size
  44531. register</description>
  44532. <addressOffset>0x190</addressOffset>
  44533. <size>32</size>
  44534. <access>read-write</access>
  44535. <resetValue>0x0</resetValue>
  44536. <fields>
  44537. <field> <name>XFRSIZ</name>
  44538. <description>Transfer size</description>
  44539. <bitOffset>0</bitOffset>
  44540. <bitWidth>19</bitWidth>
  44541. </field>
  44542. <field> <name>PKTCNT</name>
  44543. <description>Packet count</description>
  44544. <bitOffset>19</bitOffset>
  44545. <bitWidth>10</bitWidth>
  44546. </field>
  44547. <field> <name>MCNT</name>
  44548. <description>Multi count</description>
  44549. <bitOffset>29</bitOffset>
  44550. <bitWidth>2</bitWidth>
  44551. </field>
  44552. </fields>
  44553. </register>
  44554. <register> <name>OTG_HS_DIEPTSIZ5</name>
  44555. <displayName>OTG_HS_DIEPTSIZ5</displayName>
  44556. <description>OTG_HS device endpoint transfer size
  44557. register</description>
  44558. <addressOffset>0x1B0</addressOffset>
  44559. <size>32</size>
  44560. <access>read-write</access>
  44561. <resetValue>0x0</resetValue>
  44562. <fields>
  44563. <field> <name>XFRSIZ</name>
  44564. <description>Transfer size</description>
  44565. <bitOffset>0</bitOffset>
  44566. <bitWidth>19</bitWidth>
  44567. </field>
  44568. <field> <name>PKTCNT</name>
  44569. <description>Packet count</description>
  44570. <bitOffset>19</bitOffset>
  44571. <bitWidth>10</bitWidth>
  44572. </field>
  44573. <field> <name>MCNT</name>
  44574. <description>Multi count</description>
  44575. <bitOffset>29</bitOffset>
  44576. <bitWidth>2</bitWidth>
  44577. </field>
  44578. </fields>
  44579. </register>
  44580. <register> <name>OTG_HS_DOEPCTL0</name>
  44581. <displayName>OTG_HS_DOEPCTL0</displayName>
  44582. <description>OTG_HS device control OUT endpoint 0 control
  44583. register</description>
  44584. <addressOffset>0x300</addressOffset>
  44585. <size>32</size>
  44586. <resetValue>0x00008000</resetValue>
  44587. <fields>
  44588. <field> <name>MPSIZ</name>
  44589. <description>Maximum packet size</description>
  44590. <bitOffset>0</bitOffset>
  44591. <bitWidth>2</bitWidth>
  44592. <access>read-only</access>
  44593. </field>
  44594. <field> <name>USBAEP</name>
  44595. <description>USB active endpoint</description>
  44596. <bitOffset>15</bitOffset>
  44597. <bitWidth>1</bitWidth>
  44598. <access>read-only</access>
  44599. </field>
  44600. <field> <name>NAKSTS</name>
  44601. <description>NAK status</description>
  44602. <bitOffset>17</bitOffset>
  44603. <bitWidth>1</bitWidth>
  44604. <access>read-only</access>
  44605. </field>
  44606. <field> <name>EPTYP</name>
  44607. <description>Endpoint type</description>
  44608. <bitOffset>18</bitOffset>
  44609. <bitWidth>2</bitWidth>
  44610. <access>read-only</access>
  44611. </field>
  44612. <field> <name>SNPM</name>
  44613. <description>Snoop mode</description>
  44614. <bitOffset>20</bitOffset>
  44615. <bitWidth>1</bitWidth>
  44616. <access>read-write</access>
  44617. </field>
  44618. <field> <name>Stall</name>
  44619. <description>STALL handshake</description>
  44620. <bitOffset>21</bitOffset>
  44621. <bitWidth>1</bitWidth>
  44622. <access>read-write</access>
  44623. </field>
  44624. <field> <name>CNAK</name>
  44625. <description>Clear NAK</description>
  44626. <bitOffset>26</bitOffset>
  44627. <bitWidth>1</bitWidth>
  44628. <access>write-only</access>
  44629. </field>
  44630. <field> <name>SNAK</name>
  44631. <description>Set NAK</description>
  44632. <bitOffset>27</bitOffset>
  44633. <bitWidth>1</bitWidth>
  44634. <access>write-only</access>
  44635. </field>
  44636. <field> <name>EPDIS</name>
  44637. <description>Endpoint disable</description>
  44638. <bitOffset>30</bitOffset>
  44639. <bitWidth>1</bitWidth>
  44640. <access>read-only</access>
  44641. </field>
  44642. <field> <name>EPENA</name>
  44643. <description>Endpoint enable</description>
  44644. <bitOffset>31</bitOffset>
  44645. <bitWidth>1</bitWidth>
  44646. <access>write-only</access>
  44647. </field>
  44648. </fields>
  44649. </register>
  44650. <register> <name>OTG_HS_DOEPCTL1</name>
  44651. <displayName>OTG_HS_DOEPCTL1</displayName>
  44652. <description>OTG device endpoint-1 control
  44653. register</description>
  44654. <addressOffset>0x320</addressOffset>
  44655. <size>32</size>
  44656. <resetValue>0x0</resetValue>
  44657. <fields>
  44658. <field> <name>MPSIZ</name>
  44659. <description>Maximum packet size</description>
  44660. <bitOffset>0</bitOffset>
  44661. <bitWidth>11</bitWidth>
  44662. <access>read-write</access>
  44663. </field>
  44664. <field> <name>USBAEP</name>
  44665. <description>USB active endpoint</description>
  44666. <bitOffset>15</bitOffset>
  44667. <bitWidth>1</bitWidth>
  44668. <access>read-write</access>
  44669. </field>
  44670. <field> <name>EONUM_DPID</name>
  44671. <description>Even odd frame/Endpoint data
  44672. PID</description>
  44673. <bitOffset>16</bitOffset>
  44674. <bitWidth>1</bitWidth>
  44675. <access>read-only</access>
  44676. </field>
  44677. <field> <name>NAKSTS</name>
  44678. <description>NAK status</description>
  44679. <bitOffset>17</bitOffset>
  44680. <bitWidth>1</bitWidth>
  44681. <access>read-only</access>
  44682. </field>
  44683. <field> <name>EPTYP</name>
  44684. <description>Endpoint type</description>
  44685. <bitOffset>18</bitOffset>
  44686. <bitWidth>2</bitWidth>
  44687. <access>read-write</access>
  44688. </field>
  44689. <field> <name>SNPM</name>
  44690. <description>Snoop mode</description>
  44691. <bitOffset>20</bitOffset>
  44692. <bitWidth>1</bitWidth>
  44693. <access>read-write</access>
  44694. </field>
  44695. <field> <name>Stall</name>
  44696. <description>STALL handshake</description>
  44697. <bitOffset>21</bitOffset>
  44698. <bitWidth>1</bitWidth>
  44699. <access>read-write</access>
  44700. </field>
  44701. <field> <name>CNAK</name>
  44702. <description>Clear NAK</description>
  44703. <bitOffset>26</bitOffset>
  44704. <bitWidth>1</bitWidth>
  44705. <access>write-only</access>
  44706. </field>
  44707. <field> <name>SNAK</name>
  44708. <description>Set NAK</description>
  44709. <bitOffset>27</bitOffset>
  44710. <bitWidth>1</bitWidth>
  44711. <access>write-only</access>
  44712. </field>
  44713. <field> <name>SD0PID_SEVNFRM</name>
  44714. <description>Set DATA0 PID/Set even
  44715. frame</description>
  44716. <bitOffset>28</bitOffset>
  44717. <bitWidth>1</bitWidth>
  44718. <access>write-only</access>
  44719. </field>
  44720. <field> <name>SODDFRM</name>
  44721. <description>Set odd frame</description>
  44722. <bitOffset>29</bitOffset>
  44723. <bitWidth>1</bitWidth>
  44724. <access>write-only</access>
  44725. </field>
  44726. <field> <name>EPDIS</name>
  44727. <description>Endpoint disable</description>
  44728. <bitOffset>30</bitOffset>
  44729. <bitWidth>1</bitWidth>
  44730. <access>read-write</access>
  44731. </field>
  44732. <field> <name>EPENA</name>
  44733. <description>Endpoint enable</description>
  44734. <bitOffset>31</bitOffset>
  44735. <bitWidth>1</bitWidth>
  44736. <access>read-write</access>
  44737. </field>
  44738. </fields>
  44739. </register>
  44740. <register> <name>OTG_HS_DOEPCTL2</name>
  44741. <displayName>OTG_HS_DOEPCTL2</displayName>
  44742. <description>OTG device endpoint-2 control
  44743. register</description>
  44744. <addressOffset>0x340</addressOffset>
  44745. <size>32</size>
  44746. <resetValue>0x0</resetValue>
  44747. <fields>
  44748. <field> <name>MPSIZ</name>
  44749. <description>Maximum packet size</description>
  44750. <bitOffset>0</bitOffset>
  44751. <bitWidth>11</bitWidth>
  44752. <access>read-write</access>
  44753. </field>
  44754. <field> <name>USBAEP</name>
  44755. <description>USB active endpoint</description>
  44756. <bitOffset>15</bitOffset>
  44757. <bitWidth>1</bitWidth>
  44758. <access>read-write</access>
  44759. </field>
  44760. <field> <name>EONUM_DPID</name>
  44761. <description>Even odd frame/Endpoint data
  44762. PID</description>
  44763. <bitOffset>16</bitOffset>
  44764. <bitWidth>1</bitWidth>
  44765. <access>read-only</access>
  44766. </field>
  44767. <field> <name>NAKSTS</name>
  44768. <description>NAK status</description>
  44769. <bitOffset>17</bitOffset>
  44770. <bitWidth>1</bitWidth>
  44771. <access>read-only</access>
  44772. </field>
  44773. <field> <name>EPTYP</name>
  44774. <description>Endpoint type</description>
  44775. <bitOffset>18</bitOffset>
  44776. <bitWidth>2</bitWidth>
  44777. <access>read-write</access>
  44778. </field>
  44779. <field> <name>SNPM</name>
  44780. <description>Snoop mode</description>
  44781. <bitOffset>20</bitOffset>
  44782. <bitWidth>1</bitWidth>
  44783. <access>read-write</access>
  44784. </field>
  44785. <field> <name>Stall</name>
  44786. <description>STALL handshake</description>
  44787. <bitOffset>21</bitOffset>
  44788. <bitWidth>1</bitWidth>
  44789. <access>read-write</access>
  44790. </field>
  44791. <field> <name>CNAK</name>
  44792. <description>Clear NAK</description>
  44793. <bitOffset>26</bitOffset>
  44794. <bitWidth>1</bitWidth>
  44795. <access>write-only</access>
  44796. </field>
  44797. <field> <name>SNAK</name>
  44798. <description>Set NAK</description>
  44799. <bitOffset>27</bitOffset>
  44800. <bitWidth>1</bitWidth>
  44801. <access>write-only</access>
  44802. </field>
  44803. <field> <name>SD0PID_SEVNFRM</name>
  44804. <description>Set DATA0 PID/Set even
  44805. frame</description>
  44806. <bitOffset>28</bitOffset>
  44807. <bitWidth>1</bitWidth>
  44808. <access>write-only</access>
  44809. </field>
  44810. <field> <name>SODDFRM</name>
  44811. <description>Set odd frame</description>
  44812. <bitOffset>29</bitOffset>
  44813. <bitWidth>1</bitWidth>
  44814. <access>write-only</access>
  44815. </field>
  44816. <field> <name>EPDIS</name>
  44817. <description>Endpoint disable</description>
  44818. <bitOffset>30</bitOffset>
  44819. <bitWidth>1</bitWidth>
  44820. <access>read-write</access>
  44821. </field>
  44822. <field> <name>EPENA</name>
  44823. <description>Endpoint enable</description>
  44824. <bitOffset>31</bitOffset>
  44825. <bitWidth>1</bitWidth>
  44826. <access>read-write</access>
  44827. </field>
  44828. </fields>
  44829. </register>
  44830. <register> <name>OTG_HS_DOEPCTL3</name>
  44831. <displayName>OTG_HS_DOEPCTL3</displayName>
  44832. <description>OTG device endpoint-3 control
  44833. register</description>
  44834. <addressOffset>0x360</addressOffset>
  44835. <size>32</size>
  44836. <resetValue>0x0</resetValue>
  44837. <fields>
  44838. <field> <name>MPSIZ</name>
  44839. <description>Maximum packet size</description>
  44840. <bitOffset>0</bitOffset>
  44841. <bitWidth>11</bitWidth>
  44842. <access>read-write</access>
  44843. </field>
  44844. <field> <name>USBAEP</name>
  44845. <description>USB active endpoint</description>
  44846. <bitOffset>15</bitOffset>
  44847. <bitWidth>1</bitWidth>
  44848. <access>read-write</access>
  44849. </field>
  44850. <field> <name>EONUM_DPID</name>
  44851. <description>Even odd frame/Endpoint data
  44852. PID</description>
  44853. <bitOffset>16</bitOffset>
  44854. <bitWidth>1</bitWidth>
  44855. <access>read-only</access>
  44856. </field>
  44857. <field> <name>NAKSTS</name>
  44858. <description>NAK status</description>
  44859. <bitOffset>17</bitOffset>
  44860. <bitWidth>1</bitWidth>
  44861. <access>read-only</access>
  44862. </field>
  44863. <field> <name>EPTYP</name>
  44864. <description>Endpoint type</description>
  44865. <bitOffset>18</bitOffset>
  44866. <bitWidth>2</bitWidth>
  44867. <access>read-write</access>
  44868. </field>
  44869. <field> <name>SNPM</name>
  44870. <description>Snoop mode</description>
  44871. <bitOffset>20</bitOffset>
  44872. <bitWidth>1</bitWidth>
  44873. <access>read-write</access>
  44874. </field>
  44875. <field> <name>Stall</name>
  44876. <description>STALL handshake</description>
  44877. <bitOffset>21</bitOffset>
  44878. <bitWidth>1</bitWidth>
  44879. <access>read-write</access>
  44880. </field>
  44881. <field> <name>CNAK</name>
  44882. <description>Clear NAK</description>
  44883. <bitOffset>26</bitOffset>
  44884. <bitWidth>1</bitWidth>
  44885. <access>write-only</access>
  44886. </field>
  44887. <field> <name>SNAK</name>
  44888. <description>Set NAK</description>
  44889. <bitOffset>27</bitOffset>
  44890. <bitWidth>1</bitWidth>
  44891. <access>write-only</access>
  44892. </field>
  44893. <field> <name>SD0PID_SEVNFRM</name>
  44894. <description>Set DATA0 PID/Set even
  44895. frame</description>
  44896. <bitOffset>28</bitOffset>
  44897. <bitWidth>1</bitWidth>
  44898. <access>write-only</access>
  44899. </field>
  44900. <field> <name>SODDFRM</name>
  44901. <description>Set odd frame</description>
  44902. <bitOffset>29</bitOffset>
  44903. <bitWidth>1</bitWidth>
  44904. <access>write-only</access>
  44905. </field>
  44906. <field> <name>EPDIS</name>
  44907. <description>Endpoint disable</description>
  44908. <bitOffset>30</bitOffset>
  44909. <bitWidth>1</bitWidth>
  44910. <access>read-write</access>
  44911. </field>
  44912. <field> <name>EPENA</name>
  44913. <description>Endpoint enable</description>
  44914. <bitOffset>31</bitOffset>
  44915. <bitWidth>1</bitWidth>
  44916. <access>read-write</access>
  44917. </field>
  44918. </fields>
  44919. </register>
  44920. <register> <name>OTG_HS_DOEPINT0</name>
  44921. <displayName>OTG_HS_DOEPINT0</displayName>
  44922. <description>OTG_HS device endpoint-0 interrupt
  44923. register</description>
  44924. <addressOffset>0x308</addressOffset>
  44925. <size>32</size>
  44926. <access>read-write</access>
  44927. <resetValue>0x00000080</resetValue>
  44928. <fields>
  44929. <field> <name>XFRC</name>
  44930. <description>Transfer completed
  44931. interrupt</description>
  44932. <bitOffset>0</bitOffset>
  44933. <bitWidth>1</bitWidth>
  44934. </field>
  44935. <field> <name>EPDISD</name>
  44936. <description>Endpoint disabled
  44937. interrupt</description>
  44938. <bitOffset>1</bitOffset>
  44939. <bitWidth>1</bitWidth>
  44940. </field>
  44941. <field> <name>STUP</name>
  44942. <description>SETUP phase done</description>
  44943. <bitOffset>3</bitOffset>
  44944. <bitWidth>1</bitWidth>
  44945. </field>
  44946. <field> <name>OTEPDIS</name>
  44947. <description>OUT token received when endpoint
  44948. disabled</description>
  44949. <bitOffset>4</bitOffset>
  44950. <bitWidth>1</bitWidth>
  44951. </field>
  44952. <field> <name>B2BSTUP</name>
  44953. <description>Back-to-back SETUP packets
  44954. received</description>
  44955. <bitOffset>6</bitOffset>
  44956. <bitWidth>1</bitWidth>
  44957. </field>
  44958. <field> <name>NYET</name>
  44959. <description>NYET interrupt</description>
  44960. <bitOffset>14</bitOffset>
  44961. <bitWidth>1</bitWidth>
  44962. </field>
  44963. </fields>
  44964. </register>
  44965. <register> <name>OTG_HS_DOEPINT1</name>
  44966. <displayName>OTG_HS_DOEPINT1</displayName>
  44967. <description>OTG_HS device endpoint-1 interrupt
  44968. register</description>
  44969. <addressOffset>0x328</addressOffset>
  44970. <size>32</size>
  44971. <access>read-write</access>
  44972. <resetValue>0x0</resetValue>
  44973. <fields>
  44974. <field> <name>XFRC</name>
  44975. <description>Transfer completed
  44976. interrupt</description>
  44977. <bitOffset>0</bitOffset>
  44978. <bitWidth>1</bitWidth>
  44979. </field>
  44980. <field> <name>EPDISD</name>
  44981. <description>Endpoint disabled
  44982. interrupt</description>
  44983. <bitOffset>1</bitOffset>
  44984. <bitWidth>1</bitWidth>
  44985. </field>
  44986. <field> <name>STUP</name>
  44987. <description>SETUP phase done</description>
  44988. <bitOffset>3</bitOffset>
  44989. <bitWidth>1</bitWidth>
  44990. </field>
  44991. <field> <name>OTEPDIS</name>
  44992. <description>OUT token received when endpoint
  44993. disabled</description>
  44994. <bitOffset>4</bitOffset>
  44995. <bitWidth>1</bitWidth>
  44996. </field>
  44997. <field> <name>B2BSTUP</name>
  44998. <description>Back-to-back SETUP packets
  44999. received</description>
  45000. <bitOffset>6</bitOffset>
  45001. <bitWidth>1</bitWidth>
  45002. </field>
  45003. <field> <name>NYET</name>
  45004. <description>NYET interrupt</description>
  45005. <bitOffset>14</bitOffset>
  45006. <bitWidth>1</bitWidth>
  45007. </field>
  45008. </fields>
  45009. </register>
  45010. <register> <name>OTG_HS_DOEPINT2</name>
  45011. <displayName>OTG_HS_DOEPINT2</displayName>
  45012. <description>OTG_HS device endpoint-2 interrupt
  45013. register</description>
  45014. <addressOffset>0x348</addressOffset>
  45015. <size>32</size>
  45016. <access>read-write</access>
  45017. <resetValue>0x0</resetValue>
  45018. <fields>
  45019. <field> <name>XFRC</name>
  45020. <description>Transfer completed
  45021. interrupt</description>
  45022. <bitOffset>0</bitOffset>
  45023. <bitWidth>1</bitWidth>
  45024. </field>
  45025. <field> <name>EPDISD</name>
  45026. <description>Endpoint disabled
  45027. interrupt</description>
  45028. <bitOffset>1</bitOffset>
  45029. <bitWidth>1</bitWidth>
  45030. </field>
  45031. <field> <name>STUP</name>
  45032. <description>SETUP phase done</description>
  45033. <bitOffset>3</bitOffset>
  45034. <bitWidth>1</bitWidth>
  45035. </field>
  45036. <field> <name>OTEPDIS</name>
  45037. <description>OUT token received when endpoint
  45038. disabled</description>
  45039. <bitOffset>4</bitOffset>
  45040. <bitWidth>1</bitWidth>
  45041. </field>
  45042. <field> <name>B2BSTUP</name>
  45043. <description>Back-to-back SETUP packets
  45044. received</description>
  45045. <bitOffset>6</bitOffset>
  45046. <bitWidth>1</bitWidth>
  45047. </field>
  45048. <field> <name>NYET</name>
  45049. <description>NYET interrupt</description>
  45050. <bitOffset>14</bitOffset>
  45051. <bitWidth>1</bitWidth>
  45052. </field>
  45053. </fields>
  45054. </register>
  45055. <register> <name>OTG_HS_DOEPINT3</name>
  45056. <displayName>OTG_HS_DOEPINT3</displayName>
  45057. <description>OTG_HS device endpoint-3 interrupt
  45058. register</description>
  45059. <addressOffset>0x368</addressOffset>
  45060. <size>32</size>
  45061. <access>read-write</access>
  45062. <resetValue>0x0</resetValue>
  45063. <fields>
  45064. <field> <name>XFRC</name>
  45065. <description>Transfer completed
  45066. interrupt</description>
  45067. <bitOffset>0</bitOffset>
  45068. <bitWidth>1</bitWidth>
  45069. </field>
  45070. <field> <name>EPDISD</name>
  45071. <description>Endpoint disabled
  45072. interrupt</description>
  45073. <bitOffset>1</bitOffset>
  45074. <bitWidth>1</bitWidth>
  45075. </field>
  45076. <field> <name>STUP</name>
  45077. <description>SETUP phase done</description>
  45078. <bitOffset>3</bitOffset>
  45079. <bitWidth>1</bitWidth>
  45080. </field>
  45081. <field> <name>OTEPDIS</name>
  45082. <description>OUT token received when endpoint
  45083. disabled</description>
  45084. <bitOffset>4</bitOffset>
  45085. <bitWidth>1</bitWidth>
  45086. </field>
  45087. <field> <name>B2BSTUP</name>
  45088. <description>Back-to-back SETUP packets
  45089. received</description>
  45090. <bitOffset>6</bitOffset>
  45091. <bitWidth>1</bitWidth>
  45092. </field>
  45093. <field> <name>NYET</name>
  45094. <description>NYET interrupt</description>
  45095. <bitOffset>14</bitOffset>
  45096. <bitWidth>1</bitWidth>
  45097. </field>
  45098. </fields>
  45099. </register>
  45100. <register> <name>OTG_HS_DOEPINT4</name>
  45101. <displayName>OTG_HS_DOEPINT4</displayName>
  45102. <description>OTG_HS device endpoint-4 interrupt
  45103. register</description>
  45104. <addressOffset>0x388</addressOffset>
  45105. <size>32</size>
  45106. <access>read-write</access>
  45107. <resetValue>0x0</resetValue>
  45108. <fields>
  45109. <field> <name>XFRC</name>
  45110. <description>Transfer completed
  45111. interrupt</description>
  45112. <bitOffset>0</bitOffset>
  45113. <bitWidth>1</bitWidth>
  45114. </field>
  45115. <field> <name>EPDISD</name>
  45116. <description>Endpoint disabled
  45117. interrupt</description>
  45118. <bitOffset>1</bitOffset>
  45119. <bitWidth>1</bitWidth>
  45120. </field>
  45121. <field> <name>STUP</name>
  45122. <description>SETUP phase done</description>
  45123. <bitOffset>3</bitOffset>
  45124. <bitWidth>1</bitWidth>
  45125. </field>
  45126. <field> <name>OTEPDIS</name>
  45127. <description>OUT token received when endpoint
  45128. disabled</description>
  45129. <bitOffset>4</bitOffset>
  45130. <bitWidth>1</bitWidth>
  45131. </field>
  45132. <field> <name>B2BSTUP</name>
  45133. <description>Back-to-back SETUP packets
  45134. received</description>
  45135. <bitOffset>6</bitOffset>
  45136. <bitWidth>1</bitWidth>
  45137. </field>
  45138. <field> <name>NYET</name>
  45139. <description>NYET interrupt</description>
  45140. <bitOffset>14</bitOffset>
  45141. <bitWidth>1</bitWidth>
  45142. </field>
  45143. </fields>
  45144. </register>
  45145. <register> <name>OTG_HS_DOEPINT5</name>
  45146. <displayName>OTG_HS_DOEPINT5</displayName>
  45147. <description>OTG_HS device endpoint-5 interrupt
  45148. register</description>
  45149. <addressOffset>0x3A8</addressOffset>
  45150. <size>32</size>
  45151. <access>read-write</access>
  45152. <resetValue>0x0</resetValue>
  45153. <fields>
  45154. <field> <name>XFRC</name>
  45155. <description>Transfer completed
  45156. interrupt</description>
  45157. <bitOffset>0</bitOffset>
  45158. <bitWidth>1</bitWidth>
  45159. </field>
  45160. <field> <name>EPDISD</name>
  45161. <description>Endpoint disabled
  45162. interrupt</description>
  45163. <bitOffset>1</bitOffset>
  45164. <bitWidth>1</bitWidth>
  45165. </field>
  45166. <field> <name>STUP</name>
  45167. <description>SETUP phase done</description>
  45168. <bitOffset>3</bitOffset>
  45169. <bitWidth>1</bitWidth>
  45170. </field>
  45171. <field> <name>OTEPDIS</name>
  45172. <description>OUT token received when endpoint
  45173. disabled</description>
  45174. <bitOffset>4</bitOffset>
  45175. <bitWidth>1</bitWidth>
  45176. </field>
  45177. <field> <name>B2BSTUP</name>
  45178. <description>Back-to-back SETUP packets
  45179. received</description>
  45180. <bitOffset>6</bitOffset>
  45181. <bitWidth>1</bitWidth>
  45182. </field>
  45183. <field> <name>NYET</name>
  45184. <description>NYET interrupt</description>
  45185. <bitOffset>14</bitOffset>
  45186. <bitWidth>1</bitWidth>
  45187. </field>
  45188. </fields>
  45189. </register>
  45190. <register> <name>OTG_HS_DOEPINT6</name>
  45191. <displayName>OTG_HS_DOEPINT6</displayName>
  45192. <description>OTG_HS device endpoint-6 interrupt
  45193. register</description>
  45194. <addressOffset>0x3C8</addressOffset>
  45195. <size>32</size>
  45196. <access>read-write</access>
  45197. <resetValue>0x0</resetValue>
  45198. <fields>
  45199. <field> <name>XFRC</name>
  45200. <description>Transfer completed
  45201. interrupt</description>
  45202. <bitOffset>0</bitOffset>
  45203. <bitWidth>1</bitWidth>
  45204. </field>
  45205. <field> <name>EPDISD</name>
  45206. <description>Endpoint disabled
  45207. interrupt</description>
  45208. <bitOffset>1</bitOffset>
  45209. <bitWidth>1</bitWidth>
  45210. </field>
  45211. <field> <name>STUP</name>
  45212. <description>SETUP phase done</description>
  45213. <bitOffset>3</bitOffset>
  45214. <bitWidth>1</bitWidth>
  45215. </field>
  45216. <field> <name>OTEPDIS</name>
  45217. <description>OUT token received when endpoint
  45218. disabled</description>
  45219. <bitOffset>4</bitOffset>
  45220. <bitWidth>1</bitWidth>
  45221. </field>
  45222. <field> <name>B2BSTUP</name>
  45223. <description>Back-to-back SETUP packets
  45224. received</description>
  45225. <bitOffset>6</bitOffset>
  45226. <bitWidth>1</bitWidth>
  45227. </field>
  45228. <field> <name>NYET</name>
  45229. <description>NYET interrupt</description>
  45230. <bitOffset>14</bitOffset>
  45231. <bitWidth>1</bitWidth>
  45232. </field>
  45233. </fields>
  45234. </register>
  45235. <register> <name>OTG_HS_DOEPINT7</name>
  45236. <displayName>OTG_HS_DOEPINT7</displayName>
  45237. <description>OTG_HS device endpoint-7 interrupt
  45238. register</description>
  45239. <addressOffset>0x3E8</addressOffset>
  45240. <size>32</size>
  45241. <access>read-write</access>
  45242. <resetValue>0x0</resetValue>
  45243. <fields>
  45244. <field> <name>XFRC</name>
  45245. <description>Transfer completed
  45246. interrupt</description>
  45247. <bitOffset>0</bitOffset>
  45248. <bitWidth>1</bitWidth>
  45249. </field>
  45250. <field> <name>EPDISD</name>
  45251. <description>Endpoint disabled
  45252. interrupt</description>
  45253. <bitOffset>1</bitOffset>
  45254. <bitWidth>1</bitWidth>
  45255. </field>
  45256. <field> <name>STUP</name>
  45257. <description>SETUP phase done</description>
  45258. <bitOffset>3</bitOffset>
  45259. <bitWidth>1</bitWidth>
  45260. </field>
  45261. <field> <name>OTEPDIS</name>
  45262. <description>OUT token received when endpoint
  45263. disabled</description>
  45264. <bitOffset>4</bitOffset>
  45265. <bitWidth>1</bitWidth>
  45266. </field>
  45267. <field> <name>B2BSTUP</name>
  45268. <description>Back-to-back SETUP packets
  45269. received</description>
  45270. <bitOffset>6</bitOffset>
  45271. <bitWidth>1</bitWidth>
  45272. </field>
  45273. <field> <name>NYET</name>
  45274. <description>NYET interrupt</description>
  45275. <bitOffset>14</bitOffset>
  45276. <bitWidth>1</bitWidth>
  45277. </field>
  45278. </fields>
  45279. </register>
  45280. <register> <name>OTG_HS_DOEPTSIZ0</name>
  45281. <displayName>OTG_HS_DOEPTSIZ0</displayName>
  45282. <description>OTG_HS device endpoint-1 transfer size
  45283. register</description>
  45284. <addressOffset>0x310</addressOffset>
  45285. <size>32</size>
  45286. <access>read-write</access>
  45287. <resetValue>0x0</resetValue>
  45288. <fields>
  45289. <field> <name>XFRSIZ</name>
  45290. <description>Transfer size</description>
  45291. <bitOffset>0</bitOffset>
  45292. <bitWidth>7</bitWidth>
  45293. </field>
  45294. <field> <name>PKTCNT</name>
  45295. <description>Packet count</description>
  45296. <bitOffset>19</bitOffset>
  45297. <bitWidth>1</bitWidth>
  45298. </field>
  45299. <field> <name>STUPCNT</name>
  45300. <description>SETUP packet count</description>
  45301. <bitOffset>29</bitOffset>
  45302. <bitWidth>2</bitWidth>
  45303. </field>
  45304. </fields>
  45305. </register>
  45306. <register> <name>OTG_HS_DOEPTSIZ1</name>
  45307. <displayName>OTG_HS_DOEPTSIZ1</displayName>
  45308. <description>OTG_HS device endpoint-2 transfer size
  45309. register</description>
  45310. <addressOffset>0x330</addressOffset>
  45311. <size>32</size>
  45312. <access>read-write</access>
  45313. <resetValue>0x0</resetValue>
  45314. <fields>
  45315. <field> <name>XFRSIZ</name>
  45316. <description>Transfer size</description>
  45317. <bitOffset>0</bitOffset>
  45318. <bitWidth>19</bitWidth>
  45319. </field>
  45320. <field> <name>PKTCNT</name>
  45321. <description>Packet count</description>
  45322. <bitOffset>19</bitOffset>
  45323. <bitWidth>10</bitWidth>
  45324. </field>
  45325. <field> <name>RXDPID_STUPCNT</name>
  45326. <description>Received data PID/SETUP packet
  45327. count</description>
  45328. <bitOffset>29</bitOffset>
  45329. <bitWidth>2</bitWidth>
  45330. </field>
  45331. </fields>
  45332. </register>
  45333. <register> <name>OTG_HS_DOEPTSIZ2</name>
  45334. <displayName>OTG_HS_DOEPTSIZ2</displayName>
  45335. <description>OTG_HS device endpoint-3 transfer size
  45336. register</description>
  45337. <addressOffset>0x350</addressOffset>
  45338. <size>32</size>
  45339. <access>read-write</access>
  45340. <resetValue>0x0</resetValue>
  45341. <fields>
  45342. <field> <name>XFRSIZ</name>
  45343. <description>Transfer size</description>
  45344. <bitOffset>0</bitOffset>
  45345. <bitWidth>19</bitWidth>
  45346. </field>
  45347. <field> <name>PKTCNT</name>
  45348. <description>Packet count</description>
  45349. <bitOffset>19</bitOffset>
  45350. <bitWidth>10</bitWidth>
  45351. </field>
  45352. <field> <name>RXDPID_STUPCNT</name>
  45353. <description>Received data PID/SETUP packet
  45354. count</description>
  45355. <bitOffset>29</bitOffset>
  45356. <bitWidth>2</bitWidth>
  45357. </field>
  45358. </fields>
  45359. </register>
  45360. <register> <name>OTG_HS_DOEPTSIZ3</name>
  45361. <displayName>OTG_HS_DOEPTSIZ3</displayName>
  45362. <description>OTG_HS device endpoint-4 transfer size
  45363. register</description>
  45364. <addressOffset>0x370</addressOffset>
  45365. <size>32</size>
  45366. <access>read-write</access>
  45367. <resetValue>0x0</resetValue>
  45368. <fields>
  45369. <field> <name>XFRSIZ</name>
  45370. <description>Transfer size</description>
  45371. <bitOffset>0</bitOffset>
  45372. <bitWidth>19</bitWidth>
  45373. </field>
  45374. <field> <name>PKTCNT</name>
  45375. <description>Packet count</description>
  45376. <bitOffset>19</bitOffset>
  45377. <bitWidth>10</bitWidth>
  45378. </field>
  45379. <field> <name>RXDPID_STUPCNT</name>
  45380. <description>Received data PID/SETUP packet
  45381. count</description>
  45382. <bitOffset>29</bitOffset>
  45383. <bitWidth>2</bitWidth>
  45384. </field>
  45385. </fields>
  45386. </register>
  45387. <register> <name>OTG_HS_DOEPTSIZ4</name>
  45388. <displayName>OTG_HS_DOEPTSIZ4</displayName>
  45389. <description>OTG_HS device endpoint-5 transfer size
  45390. register</description>
  45391. <addressOffset>0x390</addressOffset>
  45392. <size>32</size>
  45393. <access>read-write</access>
  45394. <resetValue>0x0</resetValue>
  45395. <fields>
  45396. <field> <name>XFRSIZ</name>
  45397. <description>Transfer size</description>
  45398. <bitOffset>0</bitOffset>
  45399. <bitWidth>19</bitWidth>
  45400. </field>
  45401. <field> <name>PKTCNT</name>
  45402. <description>Packet count</description>
  45403. <bitOffset>19</bitOffset>
  45404. <bitWidth>10</bitWidth>
  45405. </field>
  45406. <field> <name>RXDPID_STUPCNT</name>
  45407. <description>Received data PID/SETUP packet
  45408. count</description>
  45409. <bitOffset>29</bitOffset>
  45410. <bitWidth>2</bitWidth>
  45411. </field>
  45412. </fields>
  45413. </register>
  45414. </registers>
  45415. </peripheral>
  45416. <peripheral> <name>OTG_HS_PWRCLK</name>
  45417. <description>USB on the go high speed</description>
  45418. <groupName>USB_OTG_HS</groupName>
  45419. <baseAddress>0x40040E00</baseAddress>
  45420. <addressBlock>
  45421. <offset>0x0</offset>
  45422. <size>0x3F200</size>
  45423. <usage>registers</usage>
  45424. </addressBlock>
  45425. <addressBlock>
  45426. <offset>0x3F200</offset>
  45427. <size>0xFFFC1200</size>
  45428. <usage>reserved</usage>
  45429. </addressBlock>
  45430. <registers>
  45431. <register> <name>OTG_HS_PCGCR</name>
  45432. <displayName>OTG_HS_PCGCR</displayName>
  45433. <description>Power and clock gating control
  45434. register</description>
  45435. <addressOffset>0x0</addressOffset>
  45436. <size>32</size>
  45437. <access>read-write</access>
  45438. <resetValue>0x0</resetValue>
  45439. <fields>
  45440. <field> <name>STPPCLK</name>
  45441. <description>Stop PHY clock</description>
  45442. <bitOffset>0</bitOffset>
  45443. <bitWidth>1</bitWidth>
  45444. </field>
  45445. <field> <name>GATEHCLK</name>
  45446. <description>Gate HCLK</description>
  45447. <bitOffset>1</bitOffset>
  45448. <bitWidth>1</bitWidth>
  45449. </field>
  45450. <field> <name>PHYSUSP</name>
  45451. <description>PHY suspended</description>
  45452. <bitOffset>4</bitOffset>
  45453. <bitWidth>1</bitWidth>
  45454. </field>
  45455. </fields>
  45456. </register>
  45457. </registers>
  45458. </peripheral>
  45459. <peripheral> <name>NVIC</name>
  45460. <description>Nested Vectored Interrupt
  45461. Controller</description>
  45462. <groupName>NVIC</groupName>
  45463. <baseAddress>0xE000E000</baseAddress>
  45464. <addressBlock>
  45465. <offset>0x0</offset>
  45466. <size>0x1001</size>
  45467. <usage>registers</usage>
  45468. </addressBlock>
  45469. <addressBlock>
  45470. <offset>0x1001</offset>
  45471. <size>0xFFFFF3FF</size>
  45472. <usage>reserved</usage>
  45473. </addressBlock>
  45474. <registers>
  45475. <register> <name>ICTR</name>
  45476. <displayName>ICTR</displayName>
  45477. <description>Interrupt Controller Type
  45478. Register</description>
  45479. <addressOffset>0x4</addressOffset>
  45480. <size>0x20</size>
  45481. <access>read-only</access>
  45482. <resetValue>0x00000000</resetValue>
  45483. <fields>
  45484. <field> <name>INTLINESNUM</name>
  45485. <description>Total number of interrupt lines in
  45486. groups</description>
  45487. <bitOffset>0</bitOffset>
  45488. <bitWidth>4</bitWidth>
  45489. </field>
  45490. </fields>
  45491. </register>
  45492. <register> <name>STIR</name>
  45493. <displayName>STIR</displayName>
  45494. <description>Software Triggered Interrupt
  45495. Register</description>
  45496. <addressOffset>0xF00</addressOffset>
  45497. <size>0x20</size>
  45498. <access>write-only</access>
  45499. <resetValue>0x00000000</resetValue>
  45500. <fields>
  45501. <field> <name>INTID</name>
  45502. <description>interrupt to be triggered</description>
  45503. <bitOffset>0</bitOffset>
  45504. <bitWidth>9</bitWidth>
  45505. </field>
  45506. </fields>
  45507. </register>
  45508. <register> <name>ISER0</name>
  45509. <displayName>ISER0</displayName>
  45510. <description>Interrupt Set-Enable Register</description>
  45511. <addressOffset>0x100</addressOffset>
  45512. <size>0x20</size>
  45513. <access>read-write</access>
  45514. <resetValue>0x00000000</resetValue>
  45515. <fields>
  45516. <field> <name>SETENA</name>
  45517. <description>SETENA</description>
  45518. <bitOffset>0</bitOffset>
  45519. <bitWidth>32</bitWidth>
  45520. </field>
  45521. </fields>
  45522. </register>
  45523. <register> <name>ISER1</name>
  45524. <displayName>ISER1</displayName>
  45525. <description>Interrupt Set-Enable Register</description>
  45526. <addressOffset>0x104</addressOffset>
  45527. <size>0x20</size>
  45528. <access>read-write</access>
  45529. <resetValue>0x00000000</resetValue>
  45530. <fields>
  45531. <field> <name>SETENA</name>
  45532. <description>SETENA</description>
  45533. <bitOffset>0</bitOffset>
  45534. <bitWidth>32</bitWidth>
  45535. </field>
  45536. </fields>
  45537. </register>
  45538. <register> <name>ISER2</name>
  45539. <displayName>ISER2</displayName>
  45540. <description>Interrupt Set-Enable Register</description>
  45541. <addressOffset>0x108</addressOffset>
  45542. <size>0x20</size>
  45543. <access>read-write</access>
  45544. <resetValue>0x00000000</resetValue>
  45545. <fields>
  45546. <field> <name>SETENA</name>
  45547. <description>SETENA</description>
  45548. <bitOffset>0</bitOffset>
  45549. <bitWidth>32</bitWidth>
  45550. </field>
  45551. </fields>
  45552. </register>
  45553. <register> <name>ICER0</name>
  45554. <displayName>ICER0</displayName>
  45555. <description>Interrupt Clear-Enable
  45556. Register</description>
  45557. <addressOffset>0x180</addressOffset>
  45558. <size>0x20</size>
  45559. <access>read-write</access>
  45560. <resetValue>0x00000000</resetValue>
  45561. <fields>
  45562. <field> <name>CLRENA</name>
  45563. <description>CLRENA</description>
  45564. <bitOffset>0</bitOffset>
  45565. <bitWidth>32</bitWidth>
  45566. </field>
  45567. </fields>
  45568. </register>
  45569. <register> <name>ICER1</name>
  45570. <displayName>ICER1</displayName>
  45571. <description>Interrupt Clear-Enable
  45572. Register</description>
  45573. <addressOffset>0x184</addressOffset>
  45574. <size>0x20</size>
  45575. <access>read-write</access>
  45576. <resetValue>0x00000000</resetValue>
  45577. <fields>
  45578. <field> <name>CLRENA</name>
  45579. <description>CLRENA</description>
  45580. <bitOffset>0</bitOffset>
  45581. <bitWidth>32</bitWidth>
  45582. </field>
  45583. </fields>
  45584. </register>
  45585. <register> <name>ICER2</name>
  45586. <displayName>ICER2</displayName>
  45587. <description>Interrupt Clear-Enable
  45588. Register</description>
  45589. <addressOffset>0x188</addressOffset>
  45590. <size>0x20</size>
  45591. <access>read-write</access>
  45592. <resetValue>0x00000000</resetValue>
  45593. <fields>
  45594. <field> <name>CLRENA</name>
  45595. <description>CLRENA</description>
  45596. <bitOffset>0</bitOffset>
  45597. <bitWidth>32</bitWidth>
  45598. </field>
  45599. </fields>
  45600. </register>
  45601. <register> <name>ISPR0</name>
  45602. <displayName>ISPR0</displayName>
  45603. <description>Interrupt Set-Pending Register</description>
  45604. <addressOffset>0x200</addressOffset>
  45605. <size>0x20</size>
  45606. <access>read-write</access>
  45607. <resetValue>0x00000000</resetValue>
  45608. <fields>
  45609. <field> <name>SETPEND</name>
  45610. <description>SETPEND</description>
  45611. <bitOffset>0</bitOffset>
  45612. <bitWidth>32</bitWidth>
  45613. </field>
  45614. </fields>
  45615. </register>
  45616. <register> <name>ISPR1</name>
  45617. <displayName>ISPR1</displayName>
  45618. <description>Interrupt Set-Pending Register</description>
  45619. <addressOffset>0x204</addressOffset>
  45620. <size>0x20</size>
  45621. <access>read-write</access>
  45622. <resetValue>0x00000000</resetValue>
  45623. <fields>
  45624. <field> <name>SETPEND</name>
  45625. <description>SETPEND</description>
  45626. <bitOffset>0</bitOffset>
  45627. <bitWidth>32</bitWidth>
  45628. </field>
  45629. </fields>
  45630. </register>
  45631. <register> <name>ISPR2</name>
  45632. <displayName>ISPR2</displayName>
  45633. <description>Interrupt Set-Pending Register</description>
  45634. <addressOffset>0x208</addressOffset>
  45635. <size>0x20</size>
  45636. <access>read-write</access>
  45637. <resetValue>0x00000000</resetValue>
  45638. <fields>
  45639. <field> <name>SETPEND</name>
  45640. <description>SETPEND</description>
  45641. <bitOffset>0</bitOffset>
  45642. <bitWidth>32</bitWidth>
  45643. </field>
  45644. </fields>
  45645. </register>
  45646. <register> <name>ICPR0</name>
  45647. <displayName>ICPR0</displayName>
  45648. <description>Interrupt Clear-Pending
  45649. Register</description>
  45650. <addressOffset>0x280</addressOffset>
  45651. <size>0x20</size>
  45652. <access>read-write</access>
  45653. <resetValue>0x00000000</resetValue>
  45654. <fields>
  45655. <field> <name>CLRPEND</name>
  45656. <description>CLRPEND</description>
  45657. <bitOffset>0</bitOffset>
  45658. <bitWidth>32</bitWidth>
  45659. </field>
  45660. </fields>
  45661. </register>
  45662. <register> <name>ICPR1</name>
  45663. <displayName>ICPR1</displayName>
  45664. <description>Interrupt Clear-Pending
  45665. Register</description>
  45666. <addressOffset>0x284</addressOffset>
  45667. <size>0x20</size>
  45668. <access>read-write</access>
  45669. <resetValue>0x00000000</resetValue>
  45670. <fields>
  45671. <field> <name>CLRPEND</name>
  45672. <description>CLRPEND</description>
  45673. <bitOffset>0</bitOffset>
  45674. <bitWidth>32</bitWidth>
  45675. </field>
  45676. </fields>
  45677. </register>
  45678. <register> <name>ICPR2</name>
  45679. <displayName>ICPR2</displayName>
  45680. <description>Interrupt Clear-Pending
  45681. Register</description>
  45682. <addressOffset>0x288</addressOffset>
  45683. <size>0x20</size>
  45684. <access>read-write</access>
  45685. <resetValue>0x00000000</resetValue>
  45686. <fields>
  45687. <field> <name>CLRPEND</name>
  45688. <description>CLRPEND</description>
  45689. <bitOffset>0</bitOffset>
  45690. <bitWidth>32</bitWidth>
  45691. </field>
  45692. </fields>
  45693. </register>
  45694. <register> <name>IABR0</name>
  45695. <displayName>IABR0</displayName>
  45696. <description>Interrupt Active Bit Register</description>
  45697. <addressOffset>0x300</addressOffset>
  45698. <size>0x20</size>
  45699. <access>read-only</access>
  45700. <resetValue>0x00000000</resetValue>
  45701. <fields>
  45702. <field> <name>ACTIVE</name>
  45703. <description>ACTIVE</description>
  45704. <bitOffset>0</bitOffset>
  45705. <bitWidth>32</bitWidth>
  45706. </field>
  45707. </fields>
  45708. </register>
  45709. <register> <name>IABR1</name>
  45710. <displayName>IABR1</displayName>
  45711. <description>Interrupt Active Bit Register</description>
  45712. <addressOffset>0x304</addressOffset>
  45713. <size>0x20</size>
  45714. <access>read-only</access>
  45715. <resetValue>0x00000000</resetValue>
  45716. <fields>
  45717. <field> <name>ACTIVE</name>
  45718. <description>ACTIVE</description>
  45719. <bitOffset>0</bitOffset>
  45720. <bitWidth>32</bitWidth>
  45721. </field>
  45722. </fields>
  45723. </register>
  45724. <register> <name>IABR2</name>
  45725. <displayName>IABR2</displayName>
  45726. <description>Interrupt Active Bit Register</description>
  45727. <addressOffset>0x308</addressOffset>
  45728. <size>0x20</size>
  45729. <access>read-only</access>
  45730. <resetValue>0x00000000</resetValue>
  45731. <fields>
  45732. <field> <name>ACTIVE</name>
  45733. <description>ACTIVE</description>
  45734. <bitOffset>0</bitOffset>
  45735. <bitWidth>32</bitWidth>
  45736. </field>
  45737. </fields>
  45738. </register>
  45739. <register> <name>IPR0</name>
  45740. <displayName>IPR0</displayName>
  45741. <description>Interrupt Priority Register</description>
  45742. <addressOffset>0x400</addressOffset>
  45743. <size>0x20</size>
  45744. <access>read-write</access>
  45745. <resetValue>0x00000000</resetValue>
  45746. <fields>
  45747. <field> <name>IPR_N0</name>
  45748. <description>IPR_N0</description>
  45749. <bitOffset>0</bitOffset>
  45750. <bitWidth>8</bitWidth>
  45751. </field>
  45752. <field> <name>IPR_N1</name>
  45753. <description>IPR_N1</description>
  45754. <bitOffset>8</bitOffset>
  45755. <bitWidth>8</bitWidth>
  45756. </field>
  45757. <field> <name>IPR_N2</name>
  45758. <description>IPR_N2</description>
  45759. <bitOffset>16</bitOffset>
  45760. <bitWidth>8</bitWidth>
  45761. </field>
  45762. <field> <name>IPR_N3</name>
  45763. <description>IPR_N3</description>
  45764. <bitOffset>24</bitOffset>
  45765. <bitWidth>8</bitWidth>
  45766. </field>
  45767. </fields>
  45768. </register>
  45769. <register> <name>IPR1</name>
  45770. <displayName>IPR1</displayName>
  45771. <description>Interrupt Priority Register</description>
  45772. <addressOffset>0x404</addressOffset>
  45773. <size>0x20</size>
  45774. <access>read-write</access>
  45775. <resetValue>0x00000000</resetValue>
  45776. <fields>
  45777. <field> <name>IPR_N0</name>
  45778. <description>IPR_N0</description>
  45779. <bitOffset>0</bitOffset>
  45780. <bitWidth>8</bitWidth>
  45781. </field>
  45782. <field> <name>IPR_N1</name>
  45783. <description>IPR_N1</description>
  45784. <bitOffset>8</bitOffset>
  45785. <bitWidth>8</bitWidth>
  45786. </field>
  45787. <field> <name>IPR_N2</name>
  45788. <description>IPR_N2</description>
  45789. <bitOffset>16</bitOffset>
  45790. <bitWidth>8</bitWidth>
  45791. </field>
  45792. <field> <name>IPR_N3</name>
  45793. <description>IPR_N3</description>
  45794. <bitOffset>24</bitOffset>
  45795. <bitWidth>8</bitWidth>
  45796. </field>
  45797. </fields>
  45798. </register>
  45799. <register> <name>IPR2</name>
  45800. <displayName>IPR2</displayName>
  45801. <description>Interrupt Priority Register</description>
  45802. <addressOffset>0x408</addressOffset>
  45803. <size>0x20</size>
  45804. <access>read-write</access>
  45805. <resetValue>0x00000000</resetValue>
  45806. <fields>
  45807. <field> <name>IPR_N0</name>
  45808. <description>IPR_N0</description>
  45809. <bitOffset>0</bitOffset>
  45810. <bitWidth>8</bitWidth>
  45811. </field>
  45812. <field> <name>IPR_N1</name>
  45813. <description>IPR_N1</description>
  45814. <bitOffset>8</bitOffset>
  45815. <bitWidth>8</bitWidth>
  45816. </field>
  45817. <field> <name>IPR_N2</name>
  45818. <description>IPR_N2</description>
  45819. <bitOffset>16</bitOffset>
  45820. <bitWidth>8</bitWidth>
  45821. </field>
  45822. <field> <name>IPR_N3</name>
  45823. <description>IPR_N3</description>
  45824. <bitOffset>24</bitOffset>
  45825. <bitWidth>8</bitWidth>
  45826. </field>
  45827. </fields>
  45828. </register>
  45829. <register> <name>IPR3</name>
  45830. <displayName>IPR3</displayName>
  45831. <description>Interrupt Priority Register</description>
  45832. <addressOffset>0x40C</addressOffset>
  45833. <size>0x20</size>
  45834. <access>read-write</access>
  45835. <resetValue>0x00000000</resetValue>
  45836. <fields>
  45837. <field> <name>IPR_N0</name>
  45838. <description>IPR_N0</description>
  45839. <bitOffset>0</bitOffset>
  45840. <bitWidth>8</bitWidth>
  45841. </field>
  45842. <field> <name>IPR_N1</name>
  45843. <description>IPR_N1</description>
  45844. <bitOffset>8</bitOffset>
  45845. <bitWidth>8</bitWidth>
  45846. </field>
  45847. <field> <name>IPR_N2</name>
  45848. <description>IPR_N2</description>
  45849. <bitOffset>16</bitOffset>
  45850. <bitWidth>8</bitWidth>
  45851. </field>
  45852. <field> <name>IPR_N3</name>
  45853. <description>IPR_N3</description>
  45854. <bitOffset>24</bitOffset>
  45855. <bitWidth>8</bitWidth>
  45856. </field>
  45857. </fields>
  45858. </register>
  45859. <register> <name>IPR4</name>
  45860. <displayName>IPR4</displayName>
  45861. <description>Interrupt Priority Register</description>
  45862. <addressOffset>0x410</addressOffset>
  45863. <size>0x20</size>
  45864. <access>read-write</access>
  45865. <resetValue>0x00000000</resetValue>
  45866. <fields>
  45867. <field> <name>IPR_N0</name>
  45868. <description>IPR_N0</description>
  45869. <bitOffset>0</bitOffset>
  45870. <bitWidth>8</bitWidth>
  45871. </field>
  45872. <field> <name>IPR_N1</name>
  45873. <description>IPR_N1</description>
  45874. <bitOffset>8</bitOffset>
  45875. <bitWidth>8</bitWidth>
  45876. </field>
  45877. <field> <name>IPR_N2</name>
  45878. <description>IPR_N2</description>
  45879. <bitOffset>16</bitOffset>
  45880. <bitWidth>8</bitWidth>
  45881. </field>
  45882. <field> <name>IPR_N3</name>
  45883. <description>IPR_N3</description>
  45884. <bitOffset>24</bitOffset>
  45885. <bitWidth>8</bitWidth>
  45886. </field>
  45887. </fields>
  45888. </register>
  45889. <register> <name>IPR5</name>
  45890. <displayName>IPR5</displayName>
  45891. <description>Interrupt Priority Register</description>
  45892. <addressOffset>0x414</addressOffset>
  45893. <size>0x20</size>
  45894. <access>read-write</access>
  45895. <resetValue>0x00000000</resetValue>
  45896. <fields>
  45897. <field> <name>IPR_N0</name>
  45898. <description>IPR_N0</description>
  45899. <bitOffset>0</bitOffset>
  45900. <bitWidth>8</bitWidth>
  45901. </field>
  45902. <field> <name>IPR_N1</name>
  45903. <description>IPR_N1</description>
  45904. <bitOffset>8</bitOffset>
  45905. <bitWidth>8</bitWidth>
  45906. </field>
  45907. <field> <name>IPR_N2</name>
  45908. <description>IPR_N2</description>
  45909. <bitOffset>16</bitOffset>
  45910. <bitWidth>8</bitWidth>
  45911. </field>
  45912. <field> <name>IPR_N3</name>
  45913. <description>IPR_N3</description>
  45914. <bitOffset>24</bitOffset>
  45915. <bitWidth>8</bitWidth>
  45916. </field>
  45917. </fields>
  45918. </register>
  45919. <register> <name>IPR6</name>
  45920. <displayName>IPR6</displayName>
  45921. <description>Interrupt Priority Register</description>
  45922. <addressOffset>0x418</addressOffset>
  45923. <size>0x20</size>
  45924. <access>read-write</access>
  45925. <resetValue>0x00000000</resetValue>
  45926. <fields>
  45927. <field> <name>IPR_N0</name>
  45928. <description>IPR_N0</description>
  45929. <bitOffset>0</bitOffset>
  45930. <bitWidth>8</bitWidth>
  45931. </field>
  45932. <field> <name>IPR_N1</name>
  45933. <description>IPR_N1</description>
  45934. <bitOffset>8</bitOffset>
  45935. <bitWidth>8</bitWidth>
  45936. </field>
  45937. <field> <name>IPR_N2</name>
  45938. <description>IPR_N2</description>
  45939. <bitOffset>16</bitOffset>
  45940. <bitWidth>8</bitWidth>
  45941. </field>
  45942. <field> <name>IPR_N3</name>
  45943. <description>IPR_N3</description>
  45944. <bitOffset>24</bitOffset>
  45945. <bitWidth>8</bitWidth>
  45946. </field>
  45947. </fields>
  45948. </register>
  45949. <register> <name>IPR7</name>
  45950. <displayName>IPR7</displayName>
  45951. <description>Interrupt Priority Register</description>
  45952. <addressOffset>0x41C</addressOffset>
  45953. <size>0x20</size>
  45954. <access>read-write</access>
  45955. <resetValue>0x00000000</resetValue>
  45956. <fields>
  45957. <field> <name>IPR_N0</name>
  45958. <description>IPR_N0</description>
  45959. <bitOffset>0</bitOffset>
  45960. <bitWidth>8</bitWidth>
  45961. </field>
  45962. <field> <name>IPR_N1</name>
  45963. <description>IPR_N1</description>
  45964. <bitOffset>8</bitOffset>
  45965. <bitWidth>8</bitWidth>
  45966. </field>
  45967. <field> <name>IPR_N2</name>
  45968. <description>IPR_N2</description>
  45969. <bitOffset>16</bitOffset>
  45970. <bitWidth>8</bitWidth>
  45971. </field>
  45972. <field> <name>IPR_N3</name>
  45973. <description>IPR_N3</description>
  45974. <bitOffset>24</bitOffset>
  45975. <bitWidth>8</bitWidth>
  45976. </field>
  45977. </fields>
  45978. </register>
  45979. <register> <name>IPR8</name>
  45980. <displayName>IPR8</displayName>
  45981. <description>Interrupt Priority Register</description>
  45982. <addressOffset>0x420</addressOffset>
  45983. <size>0x20</size>
  45984. <access>read-write</access>
  45985. <resetValue>0x00000000</resetValue>
  45986. <fields>
  45987. <field> <name>IPR_N0</name>
  45988. <description>IPR_N0</description>
  45989. <bitOffset>0</bitOffset>
  45990. <bitWidth>8</bitWidth>
  45991. </field>
  45992. <field> <name>IPR_N1</name>
  45993. <description>IPR_N1</description>
  45994. <bitOffset>8</bitOffset>
  45995. <bitWidth>8</bitWidth>
  45996. </field>
  45997. <field> <name>IPR_N2</name>
  45998. <description>IPR_N2</description>
  45999. <bitOffset>16</bitOffset>
  46000. <bitWidth>8</bitWidth>
  46001. </field>
  46002. <field> <name>IPR_N3</name>
  46003. <description>IPR_N3</description>
  46004. <bitOffset>24</bitOffset>
  46005. <bitWidth>8</bitWidth>
  46006. </field>
  46007. </fields>
  46008. </register>
  46009. <register> <name>IPR9</name>
  46010. <displayName>IPR9</displayName>
  46011. <description>Interrupt Priority Register</description>
  46012. <addressOffset>0x424</addressOffset>
  46013. <size>0x20</size>
  46014. <access>read-write</access>
  46015. <resetValue>0x00000000</resetValue>
  46016. <fields>
  46017. <field> <name>IPR_N0</name>
  46018. <description>IPR_N0</description>
  46019. <bitOffset>0</bitOffset>
  46020. <bitWidth>8</bitWidth>
  46021. </field>
  46022. <field> <name>IPR_N1</name>
  46023. <description>IPR_N1</description>
  46024. <bitOffset>8</bitOffset>
  46025. <bitWidth>8</bitWidth>
  46026. </field>
  46027. <field> <name>IPR_N2</name>
  46028. <description>IPR_N2</description>
  46029. <bitOffset>16</bitOffset>
  46030. <bitWidth>8</bitWidth>
  46031. </field>
  46032. <field> <name>IPR_N3</name>
  46033. <description>IPR_N3</description>
  46034. <bitOffset>24</bitOffset>
  46035. <bitWidth>8</bitWidth>
  46036. </field>
  46037. </fields>
  46038. </register>
  46039. <register> <name>IPR10</name>
  46040. <displayName>IPR10</displayName>
  46041. <description>Interrupt Priority Register</description>
  46042. <addressOffset>0x428</addressOffset>
  46043. <size>0x20</size>
  46044. <access>read-write</access>
  46045. <resetValue>0x00000000</resetValue>
  46046. <fields>
  46047. <field> <name>IPR_N0</name>
  46048. <description>IPR_N0</description>
  46049. <bitOffset>0</bitOffset>
  46050. <bitWidth>8</bitWidth>
  46051. </field>
  46052. <field> <name>IPR_N1</name>
  46053. <description>IPR_N1</description>
  46054. <bitOffset>8</bitOffset>
  46055. <bitWidth>8</bitWidth>
  46056. </field>
  46057. <field> <name>IPR_N2</name>
  46058. <description>IPR_N2</description>
  46059. <bitOffset>16</bitOffset>
  46060. <bitWidth>8</bitWidth>
  46061. </field>
  46062. <field> <name>IPR_N3</name>
  46063. <description>IPR_N3</description>
  46064. <bitOffset>24</bitOffset>
  46065. <bitWidth>8</bitWidth>
  46066. </field>
  46067. </fields>
  46068. </register>
  46069. <register> <name>IPR11</name>
  46070. <displayName>IPR11</displayName>
  46071. <description>Interrupt Priority Register</description>
  46072. <addressOffset>0x42C</addressOffset>
  46073. <size>0x20</size>
  46074. <access>read-write</access>
  46075. <resetValue>0x00000000</resetValue>
  46076. <fields>
  46077. <field> <name>IPR_N0</name>
  46078. <description>IPR_N0</description>
  46079. <bitOffset>0</bitOffset>
  46080. <bitWidth>8</bitWidth>
  46081. </field>
  46082. <field> <name>IPR_N1</name>
  46083. <description>IPR_N1</description>
  46084. <bitOffset>8</bitOffset>
  46085. <bitWidth>8</bitWidth>
  46086. </field>
  46087. <field> <name>IPR_N2</name>
  46088. <description>IPR_N2</description>
  46089. <bitOffset>16</bitOffset>
  46090. <bitWidth>8</bitWidth>
  46091. </field>
  46092. <field> <name>IPR_N3</name>
  46093. <description>IPR_N3</description>
  46094. <bitOffset>24</bitOffset>
  46095. <bitWidth>8</bitWidth>
  46096. </field>
  46097. </fields>
  46098. </register>
  46099. <register> <name>IPR12</name>
  46100. <displayName>IPR12</displayName>
  46101. <description>Interrupt Priority Register</description>
  46102. <addressOffset>0x430</addressOffset>
  46103. <size>0x20</size>
  46104. <access>read-write</access>
  46105. <resetValue>0x00000000</resetValue>
  46106. <fields>
  46107. <field> <name>IPR_N0</name>
  46108. <description>IPR_N0</description>
  46109. <bitOffset>0</bitOffset>
  46110. <bitWidth>8</bitWidth>
  46111. </field>
  46112. <field> <name>IPR_N1</name>
  46113. <description>IPR_N1</description>
  46114. <bitOffset>8</bitOffset>
  46115. <bitWidth>8</bitWidth>
  46116. </field>
  46117. <field> <name>IPR_N2</name>
  46118. <description>IPR_N2</description>
  46119. <bitOffset>16</bitOffset>
  46120. <bitWidth>8</bitWidth>
  46121. </field>
  46122. <field> <name>IPR_N3</name>
  46123. <description>IPR_N3</description>
  46124. <bitOffset>24</bitOffset>
  46125. <bitWidth>8</bitWidth>
  46126. </field>
  46127. </fields>
  46128. </register>
  46129. <register> <name>IPR13</name>
  46130. <displayName>IPR13</displayName>
  46131. <description>Interrupt Priority Register</description>
  46132. <addressOffset>0x434</addressOffset>
  46133. <size>0x20</size>
  46134. <access>read-write</access>
  46135. <resetValue>0x00000000</resetValue>
  46136. <fields>
  46137. <field> <name>IPR_N0</name>
  46138. <description>IPR_N0</description>
  46139. <bitOffset>0</bitOffset>
  46140. <bitWidth>8</bitWidth>
  46141. </field>
  46142. <field> <name>IPR_N1</name>
  46143. <description>IPR_N1</description>
  46144. <bitOffset>8</bitOffset>
  46145. <bitWidth>8</bitWidth>
  46146. </field>
  46147. <field> <name>IPR_N2</name>
  46148. <description>IPR_N2</description>
  46149. <bitOffset>16</bitOffset>
  46150. <bitWidth>8</bitWidth>
  46151. </field>
  46152. <field> <name>IPR_N3</name>
  46153. <description>IPR_N3</description>
  46154. <bitOffset>24</bitOffset>
  46155. <bitWidth>8</bitWidth>
  46156. </field>
  46157. </fields>
  46158. </register>
  46159. <register> <name>IPR14</name>
  46160. <displayName>IPR14</displayName>
  46161. <description>Interrupt Priority Register</description>
  46162. <addressOffset>0x438</addressOffset>
  46163. <size>0x20</size>
  46164. <access>read-write</access>
  46165. <resetValue>0x00000000</resetValue>
  46166. <fields>
  46167. <field> <name>IPR_N0</name>
  46168. <description>IPR_N0</description>
  46169. <bitOffset>0</bitOffset>
  46170. <bitWidth>8</bitWidth>
  46171. </field>
  46172. <field> <name>IPR_N1</name>
  46173. <description>IPR_N1</description>
  46174. <bitOffset>8</bitOffset>
  46175. <bitWidth>8</bitWidth>
  46176. </field>
  46177. <field> <name>IPR_N2</name>
  46178. <description>IPR_N2</description>
  46179. <bitOffset>16</bitOffset>
  46180. <bitWidth>8</bitWidth>
  46181. </field>
  46182. <field> <name>IPR_N3</name>
  46183. <description>IPR_N3</description>
  46184. <bitOffset>24</bitOffset>
  46185. <bitWidth>8</bitWidth>
  46186. </field>
  46187. </fields>
  46188. </register>
  46189. <register> <name>IPR15</name>
  46190. <displayName>IPR15</displayName>
  46191. <description>Interrupt Priority Register</description>
  46192. <addressOffset>0x43C</addressOffset>
  46193. <size>0x20</size>
  46194. <access>read-write</access>
  46195. <resetValue>0x00000000</resetValue>
  46196. <fields>
  46197. <field> <name>IPR_N0</name>
  46198. <description>IPR_N0</description>
  46199. <bitOffset>0</bitOffset>
  46200. <bitWidth>8</bitWidth>
  46201. </field>
  46202. <field> <name>IPR_N1</name>
  46203. <description>IPR_N1</description>
  46204. <bitOffset>8</bitOffset>
  46205. <bitWidth>8</bitWidth>
  46206. </field>
  46207. <field> <name>IPR_N2</name>
  46208. <description>IPR_N2</description>
  46209. <bitOffset>16</bitOffset>
  46210. <bitWidth>8</bitWidth>
  46211. </field>
  46212. <field> <name>IPR_N3</name>
  46213. <description>IPR_N3</description>
  46214. <bitOffset>24</bitOffset>
  46215. <bitWidth>8</bitWidth>
  46216. </field>
  46217. </fields>
  46218. </register>
  46219. <register> <name>IPR16</name>
  46220. <displayName>IPR16</displayName>
  46221. <description>Interrupt Priority Register</description>
  46222. <addressOffset>0x440</addressOffset>
  46223. <size>0x20</size>
  46224. <access>read-write</access>
  46225. <resetValue>0x00000000</resetValue>
  46226. <fields>
  46227. <field> <name>IPR_N0</name>
  46228. <description>IPR_N0</description>
  46229. <bitOffset>0</bitOffset>
  46230. <bitWidth>8</bitWidth>
  46231. </field>
  46232. <field> <name>IPR_N1</name>
  46233. <description>IPR_N1</description>
  46234. <bitOffset>8</bitOffset>
  46235. <bitWidth>8</bitWidth>
  46236. </field>
  46237. <field> <name>IPR_N2</name>
  46238. <description>IPR_N2</description>
  46239. <bitOffset>16</bitOffset>
  46240. <bitWidth>8</bitWidth>
  46241. </field>
  46242. <field> <name>IPR_N3</name>
  46243. <description>IPR_N3</description>
  46244. <bitOffset>24</bitOffset>
  46245. <bitWidth>8</bitWidth>
  46246. </field>
  46247. </fields>
  46248. </register>
  46249. <register> <name>IPR17</name>
  46250. <displayName>IPR17</displayName>
  46251. <description>Interrupt Priority Register</description>
  46252. <addressOffset>0x444</addressOffset>
  46253. <size>0x20</size>
  46254. <access>read-write</access>
  46255. <resetValue>0x00000000</resetValue>
  46256. <fields>
  46257. <field> <name>IPR_N0</name>
  46258. <description>IPR_N0</description>
  46259. <bitOffset>0</bitOffset>
  46260. <bitWidth>8</bitWidth>
  46261. </field>
  46262. <field> <name>IPR_N1</name>
  46263. <description>IPR_N1</description>
  46264. <bitOffset>8</bitOffset>
  46265. <bitWidth>8</bitWidth>
  46266. </field>
  46267. <field> <name>IPR_N2</name>
  46268. <description>IPR_N2</description>
  46269. <bitOffset>16</bitOffset>
  46270. <bitWidth>8</bitWidth>
  46271. </field>
  46272. <field> <name>IPR_N3</name>
  46273. <description>IPR_N3</description>
  46274. <bitOffset>24</bitOffset>
  46275. <bitWidth>8</bitWidth>
  46276. </field>
  46277. </fields>
  46278. </register>
  46279. <register> <name>IPR18</name>
  46280. <displayName>IPR18</displayName>
  46281. <description>Interrupt Priority Register</description>
  46282. <addressOffset>0x448</addressOffset>
  46283. <size>0x20</size>
  46284. <access>read-write</access>
  46285. <resetValue>0x00000000</resetValue>
  46286. <fields>
  46287. <field> <name>IPR_N0</name>
  46288. <description>IPR_N0</description>
  46289. <bitOffset>0</bitOffset>
  46290. <bitWidth>8</bitWidth>
  46291. </field>
  46292. <field> <name>IPR_N1</name>
  46293. <description>IPR_N1</description>
  46294. <bitOffset>8</bitOffset>
  46295. <bitWidth>8</bitWidth>
  46296. </field>
  46297. <field> <name>IPR_N2</name>
  46298. <description>IPR_N2</description>
  46299. <bitOffset>16</bitOffset>
  46300. <bitWidth>8</bitWidth>
  46301. </field>
  46302. <field> <name>IPR_N3</name>
  46303. <description>IPR_N3</description>
  46304. <bitOffset>24</bitOffset>
  46305. <bitWidth>8</bitWidth>
  46306. </field>
  46307. </fields>
  46308. </register>
  46309. <register> <name>IPR19</name>
  46310. <displayName>IPR19</displayName>
  46311. <description>Interrupt Priority Register</description>
  46312. <addressOffset>0x44C</addressOffset>
  46313. <size>0x20</size>
  46314. <access>read-write</access>
  46315. <resetValue>0x00000000</resetValue>
  46316. <fields>
  46317. <field> <name>IPR_N0</name>
  46318. <description>IPR_N0</description>
  46319. <bitOffset>0</bitOffset>
  46320. <bitWidth>8</bitWidth>
  46321. </field>
  46322. <field> <name>IPR_N1</name>
  46323. <description>IPR_N1</description>
  46324. <bitOffset>8</bitOffset>
  46325. <bitWidth>8</bitWidth>
  46326. </field>
  46327. <field> <name>IPR_N2</name>
  46328. <description>IPR_N2</description>
  46329. <bitOffset>16</bitOffset>
  46330. <bitWidth>8</bitWidth>
  46331. </field>
  46332. <field> <name>IPR_N3</name>
  46333. <description>IPR_N3</description>
  46334. <bitOffset>24</bitOffset>
  46335. <bitWidth>8</bitWidth>
  46336. </field>
  46337. </fields>
  46338. </register>
  46339. </registers>
  46340. </peripheral>
  46341. </peripherals>
  46342. </device>