startup_stm32f427x.s 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457
  1. ;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f427x.s
  3. ;* Author : MCD Application Team
  4. ;* @version : V1.5.0
  5. ;* @date : 06-March-2015
  6. ;* Description : STM32F427xx/437xx devices vector table for MDK-ARM toolchain.
  7. ;* Same as startup_stm32f427_437xx.s and maintained for legacy purpose
  8. ;* This module performs:
  9. ;* - Set the initial SP
  10. ;* - Set the initial PC == Reset_Handler
  11. ;* - Set the vector table entries with the exceptions ISR address
  12. ;* - Configure the system clock and the external SRAM/SDRAM mounted
  13. ;* on STM324x9I-EVAL/STM324x7I-EVALs board to be used as data memory
  14. ;* (optional, to be enabled by user)
  15. ;* - Branches to __main in the C library (which eventually
  16. ;* calls main()).
  17. ;* After Reset the CortexM4 processor is in Thread mode,
  18. ;* priority is Privileged, and the Stack is set to Main.
  19. ;* <<< Use Configuration Wizard in Context Menu >>>
  20. ;*******************************************************************************
  21. ;
  22. ; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  23. ; You may not use this file except in compliance with the License.
  24. ; You may obtain a copy of the License at:
  25. ;
  26. ; http://www.st.com/software_license_agreement_liberty_v2
  27. ;
  28. ; Unless required by applicable law or agreed to in writing, software
  29. ; distributed under the License is distributed on an "AS IS" BASIS,
  30. ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  31. ; See the License for the specific language governing permissions and
  32. ; limitations under the License.
  33. ;
  34. ;*******************************************************************************
  35. ; Amount of memory (in bytes) allocated for Stack
  36. ; Tailor this value to your application needs
  37. ; <h> Stack Configuration
  38. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  39. ; </h>
  40. Stack_Size EQU 0x00000400
  41. AREA STACK, NOINIT, READWRITE, ALIGN=3
  42. Stack_Mem SPACE Stack_Size
  43. __initial_sp
  44. ; <h> Heap Configuration
  45. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  46. ; </h>
  47. Heap_Size EQU 0x00000200
  48. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  49. __heap_base
  50. Heap_Mem SPACE Heap_Size
  51. __heap_limit
  52. PRESERVE8
  53. THUMB
  54. ; Vector Table Mapped to Address 0 at Reset
  55. AREA RESET, DATA, READONLY
  56. EXPORT __Vectors
  57. EXPORT __Vectors_End
  58. EXPORT __Vectors_Size
  59. __Vectors DCD __initial_sp ; Top of Stack
  60. DCD Reset_Handler ; Reset Handler
  61. DCD NMI_Handler ; NMI Handler
  62. DCD HardFault_Handler ; Hard Fault Handler
  63. DCD MemManage_Handler ; MPU Fault Handler
  64. DCD BusFault_Handler ; Bus Fault Handler
  65. DCD UsageFault_Handler ; Usage Fault Handler
  66. DCD 0 ; Reserved
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD 0 ; Reserved
  70. DCD SVC_Handler ; SVCall Handler
  71. DCD DebugMon_Handler ; Debug Monitor Handler
  72. DCD 0 ; Reserved
  73. DCD PendSV_Handler ; PendSV Handler
  74. DCD SysTick_Handler ; SysTick Handler
  75. ; External Interrupts
  76. DCD WWDG_IRQHandler ; Window WatchDog
  77. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  78. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  79. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  80. DCD FLASH_IRQHandler ; FLASH
  81. DCD RCC_IRQHandler ; RCC
  82. DCD EXTI0_IRQHandler ; EXTI Line0
  83. DCD EXTI1_IRQHandler ; EXTI Line1
  84. DCD EXTI2_IRQHandler ; EXTI Line2
  85. DCD EXTI3_IRQHandler ; EXTI Line3
  86. DCD EXTI4_IRQHandler ; EXTI Line4
  87. DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
  88. DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
  89. DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
  90. DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
  91. DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
  92. DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
  93. DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
  94. DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
  95. DCD CAN1_TX_IRQHandler ; CAN1 TX
  96. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  97. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  98. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  99. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  100. DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
  101. DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
  102. DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
  103. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  104. DCD TIM2_IRQHandler ; TIM2
  105. DCD TIM3_IRQHandler ; TIM3
  106. DCD TIM4_IRQHandler ; TIM4
  107. DCD I2C1_EV_IRQHandler ; I2C1 Event
  108. DCD I2C1_ER_IRQHandler ; I2C1 Error
  109. DCD I2C2_EV_IRQHandler ; I2C2 Event
  110. DCD I2C2_ER_IRQHandler ; I2C2 Error
  111. DCD SPI1_IRQHandler ; SPI1
  112. DCD SPI2_IRQHandler ; SPI2
  113. DCD USART1_IRQHandler ; USART1
  114. DCD USART2_IRQHandler ; USART2
  115. DCD USART3_IRQHandler ; USART3
  116. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  117. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  118. DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
  119. DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
  120. DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
  121. DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
  122. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
  123. DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
  124. DCD FMC_IRQHandler ; FMC
  125. DCD SDIO_IRQHandler ; SDIO
  126. DCD TIM5_IRQHandler ; TIM5
  127. DCD SPI3_IRQHandler ; SPI3
  128. DCD UART4_IRQHandler ; UART4
  129. DCD UART5_IRQHandler ; UART5
  130. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
  131. DCD TIM7_IRQHandler ; TIM7
  132. DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
  133. DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
  134. DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
  135. DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
  136. DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
  137. DCD ETH_IRQHandler ; Ethernet
  138. DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
  139. DCD CAN2_TX_IRQHandler ; CAN2 TX
  140. DCD CAN2_RX0_IRQHandler ; CAN2 RX0
  141. DCD CAN2_RX1_IRQHandler ; CAN2 RX1
  142. DCD CAN2_SCE_IRQHandler ; CAN2 SCE
  143. DCD OTG_FS_IRQHandler ; USB OTG FS
  144. DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
  145. DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
  146. DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
  147. DCD USART6_IRQHandler ; USART6
  148. DCD I2C3_EV_IRQHandler ; I2C3 event
  149. DCD I2C3_ER_IRQHandler ; I2C3 error
  150. DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
  151. DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
  152. DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
  153. DCD OTG_HS_IRQHandler ; USB OTG HS
  154. DCD DCMI_IRQHandler ; DCMI
  155. DCD CRYP_IRQHandler ; CRYP crypto
  156. DCD HASH_RNG_IRQHandler ; Hash and Rng
  157. DCD FPU_IRQHandler ; FPU
  158. DCD UART7_IRQHandler ; UART7
  159. DCD UART8_IRQHandler ; UART8
  160. DCD SPI4_IRQHandler ; SPI4
  161. DCD SPI5_IRQHandler ; SPI5
  162. DCD SPI6_IRQHandler ; SPI6
  163. DCD SAI1_IRQHandler ; SAI1
  164. DCD 0 ; Reserved
  165. DCD 0 ; Reserved
  166. DCD DMA2D_IRQHandler ; DMA2D
  167. __Vectors_End
  168. __Vectors_Size EQU __Vectors_End - __Vectors
  169. AREA |.text|, CODE, READONLY
  170. ; Reset handler
  171. Reset_Handler PROC
  172. EXPORT Reset_Handler [WEAK]
  173. IMPORT SystemInit
  174. IMPORT __main
  175. LDR R0, =SystemInit
  176. BLX R0
  177. LDR R0, =__main
  178. BX R0
  179. ENDP
  180. ; Dummy Exception Handlers (infinite loops which can be modified)
  181. NMI_Handler PROC
  182. EXPORT NMI_Handler [WEAK]
  183. B .
  184. ENDP
  185. HardFault_Handler\
  186. PROC
  187. EXPORT HardFault_Handler [WEAK]
  188. B .
  189. ENDP
  190. MemManage_Handler\
  191. PROC
  192. EXPORT MemManage_Handler [WEAK]
  193. B .
  194. ENDP
  195. BusFault_Handler\
  196. PROC
  197. EXPORT BusFault_Handler [WEAK]
  198. B .
  199. ENDP
  200. UsageFault_Handler\
  201. PROC
  202. EXPORT UsageFault_Handler [WEAK]
  203. B .
  204. ENDP
  205. SVC_Handler PROC
  206. EXPORT SVC_Handler [WEAK]
  207. B .
  208. ENDP
  209. DebugMon_Handler\
  210. PROC
  211. EXPORT DebugMon_Handler [WEAK]
  212. B .
  213. ENDP
  214. PendSV_Handler PROC
  215. EXPORT PendSV_Handler [WEAK]
  216. B .
  217. ENDP
  218. SysTick_Handler PROC
  219. EXPORT SysTick_Handler [WEAK]
  220. B .
  221. ENDP
  222. Default_Handler PROC
  223. EXPORT WWDG_IRQHandler [WEAK]
  224. EXPORT PVD_IRQHandler [WEAK]
  225. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  226. EXPORT RTC_WKUP_IRQHandler [WEAK]
  227. EXPORT FLASH_IRQHandler [WEAK]
  228. EXPORT RCC_IRQHandler [WEAK]
  229. EXPORT EXTI0_IRQHandler [WEAK]
  230. EXPORT EXTI1_IRQHandler [WEAK]
  231. EXPORT EXTI2_IRQHandler [WEAK]
  232. EXPORT EXTI3_IRQHandler [WEAK]
  233. EXPORT EXTI4_IRQHandler [WEAK]
  234. EXPORT DMA1_Stream0_IRQHandler [WEAK]
  235. EXPORT DMA1_Stream1_IRQHandler [WEAK]
  236. EXPORT DMA1_Stream2_IRQHandler [WEAK]
  237. EXPORT DMA1_Stream3_IRQHandler [WEAK]
  238. EXPORT DMA1_Stream4_IRQHandler [WEAK]
  239. EXPORT DMA1_Stream5_IRQHandler [WEAK]
  240. EXPORT DMA1_Stream6_IRQHandler [WEAK]
  241. EXPORT ADC_IRQHandler [WEAK]
  242. EXPORT CAN1_TX_IRQHandler [WEAK]
  243. EXPORT CAN1_RX0_IRQHandler [WEAK]
  244. EXPORT CAN1_RX1_IRQHandler [WEAK]
  245. EXPORT CAN1_SCE_IRQHandler [WEAK]
  246. EXPORT EXTI9_5_IRQHandler [WEAK]
  247. EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
  248. EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
  249. EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
  250. EXPORT TIM1_CC_IRQHandler [WEAK]
  251. EXPORT TIM2_IRQHandler [WEAK]
  252. EXPORT TIM3_IRQHandler [WEAK]
  253. EXPORT TIM4_IRQHandler [WEAK]
  254. EXPORT I2C1_EV_IRQHandler [WEAK]
  255. EXPORT I2C1_ER_IRQHandler [WEAK]
  256. EXPORT I2C2_EV_IRQHandler [WEAK]
  257. EXPORT I2C2_ER_IRQHandler [WEAK]
  258. EXPORT SPI1_IRQHandler [WEAK]
  259. EXPORT SPI2_IRQHandler [WEAK]
  260. EXPORT USART1_IRQHandler [WEAK]
  261. EXPORT USART2_IRQHandler [WEAK]
  262. EXPORT USART3_IRQHandler [WEAK]
  263. EXPORT EXTI15_10_IRQHandler [WEAK]
  264. EXPORT RTC_Alarm_IRQHandler [WEAK]
  265. EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
  266. EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
  267. EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
  268. EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
  269. EXPORT TIM8_CC_IRQHandler [WEAK]
  270. EXPORT DMA1_Stream7_IRQHandler [WEAK]
  271. EXPORT FMC_IRQHandler [WEAK]
  272. EXPORT SDIO_IRQHandler [WEAK]
  273. EXPORT TIM5_IRQHandler [WEAK]
  274. EXPORT SPI3_IRQHandler [WEAK]
  275. EXPORT UART4_IRQHandler [WEAK]
  276. EXPORT UART5_IRQHandler [WEAK]
  277. EXPORT TIM6_DAC_IRQHandler [WEAK]
  278. EXPORT TIM7_IRQHandler [WEAK]
  279. EXPORT DMA2_Stream0_IRQHandler [WEAK]
  280. EXPORT DMA2_Stream1_IRQHandler [WEAK]
  281. EXPORT DMA2_Stream2_IRQHandler [WEAK]
  282. EXPORT DMA2_Stream3_IRQHandler [WEAK]
  283. EXPORT DMA2_Stream4_IRQHandler [WEAK]
  284. EXPORT ETH_IRQHandler [WEAK]
  285. EXPORT ETH_WKUP_IRQHandler [WEAK]
  286. EXPORT CAN2_TX_IRQHandler [WEAK]
  287. EXPORT CAN2_RX0_IRQHandler [WEAK]
  288. EXPORT CAN2_RX1_IRQHandler [WEAK]
  289. EXPORT CAN2_SCE_IRQHandler [WEAK]
  290. EXPORT OTG_FS_IRQHandler [WEAK]
  291. EXPORT DMA2_Stream5_IRQHandler [WEAK]
  292. EXPORT DMA2_Stream6_IRQHandler [WEAK]
  293. EXPORT DMA2_Stream7_IRQHandler [WEAK]
  294. EXPORT USART6_IRQHandler [WEAK]
  295. EXPORT I2C3_EV_IRQHandler [WEAK]
  296. EXPORT I2C3_ER_IRQHandler [WEAK]
  297. EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
  298. EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
  299. EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
  300. EXPORT OTG_HS_IRQHandler [WEAK]
  301. EXPORT DCMI_IRQHandler [WEAK]
  302. EXPORT CRYP_IRQHandler [WEAK]
  303. EXPORT HASH_RNG_IRQHandler [WEAK]
  304. EXPORT FPU_IRQHandler [WEAK]
  305. EXPORT UART7_IRQHandler [WEAK]
  306. EXPORT UART8_IRQHandler [WEAK]
  307. EXPORT SPI4_IRQHandler [WEAK]
  308. EXPORT SPI5_IRQHandler [WEAK]
  309. EXPORT SPI6_IRQHandler [WEAK]
  310. EXPORT SAI1_IRQHandler [WEAK]
  311. EXPORT DMA2D_IRQHandler [WEAK]
  312. WWDG_IRQHandler
  313. PVD_IRQHandler
  314. TAMP_STAMP_IRQHandler
  315. RTC_WKUP_IRQHandler
  316. FLASH_IRQHandler
  317. RCC_IRQHandler
  318. EXTI0_IRQHandler
  319. EXTI1_IRQHandler
  320. EXTI2_IRQHandler
  321. EXTI3_IRQHandler
  322. EXTI4_IRQHandler
  323. DMA1_Stream0_IRQHandler
  324. DMA1_Stream1_IRQHandler
  325. DMA1_Stream2_IRQHandler
  326. DMA1_Stream3_IRQHandler
  327. DMA1_Stream4_IRQHandler
  328. DMA1_Stream5_IRQHandler
  329. DMA1_Stream6_IRQHandler
  330. ADC_IRQHandler
  331. CAN1_TX_IRQHandler
  332. CAN1_RX0_IRQHandler
  333. CAN1_RX1_IRQHandler
  334. CAN1_SCE_IRQHandler
  335. EXTI9_5_IRQHandler
  336. TIM1_BRK_TIM9_IRQHandler
  337. TIM1_UP_TIM10_IRQHandler
  338. TIM1_TRG_COM_TIM11_IRQHandler
  339. TIM1_CC_IRQHandler
  340. TIM2_IRQHandler
  341. TIM3_IRQHandler
  342. TIM4_IRQHandler
  343. I2C1_EV_IRQHandler
  344. I2C1_ER_IRQHandler
  345. I2C2_EV_IRQHandler
  346. I2C2_ER_IRQHandler
  347. SPI1_IRQHandler
  348. SPI2_IRQHandler
  349. USART1_IRQHandler
  350. USART2_IRQHandler
  351. USART3_IRQHandler
  352. EXTI15_10_IRQHandler
  353. RTC_Alarm_IRQHandler
  354. OTG_FS_WKUP_IRQHandler
  355. TIM8_BRK_TIM12_IRQHandler
  356. TIM8_UP_TIM13_IRQHandler
  357. TIM8_TRG_COM_TIM14_IRQHandler
  358. TIM8_CC_IRQHandler
  359. DMA1_Stream7_IRQHandler
  360. FMC_IRQHandler
  361. SDIO_IRQHandler
  362. TIM5_IRQHandler
  363. SPI3_IRQHandler
  364. UART4_IRQHandler
  365. UART5_IRQHandler
  366. TIM6_DAC_IRQHandler
  367. TIM7_IRQHandler
  368. DMA2_Stream0_IRQHandler
  369. DMA2_Stream1_IRQHandler
  370. DMA2_Stream2_IRQHandler
  371. DMA2_Stream3_IRQHandler
  372. DMA2_Stream4_IRQHandler
  373. ETH_IRQHandler
  374. ETH_WKUP_IRQHandler
  375. CAN2_TX_IRQHandler
  376. CAN2_RX0_IRQHandler
  377. CAN2_RX1_IRQHandler
  378. CAN2_SCE_IRQHandler
  379. OTG_FS_IRQHandler
  380. DMA2_Stream5_IRQHandler
  381. DMA2_Stream6_IRQHandler
  382. DMA2_Stream7_IRQHandler
  383. USART6_IRQHandler
  384. I2C3_EV_IRQHandler
  385. I2C3_ER_IRQHandler
  386. OTG_HS_EP1_OUT_IRQHandler
  387. OTG_HS_EP1_IN_IRQHandler
  388. OTG_HS_WKUP_IRQHandler
  389. OTG_HS_IRQHandler
  390. DCMI_IRQHandler
  391. CRYP_IRQHandler
  392. HASH_RNG_IRQHandler
  393. FPU_IRQHandler
  394. UART7_IRQHandler
  395. UART8_IRQHandler
  396. SPI4_IRQHandler
  397. SPI5_IRQHandler
  398. SPI6_IRQHandler
  399. SAI1_IRQHandler
  400. DMA2D_IRQHandler
  401. B .
  402. ENDP
  403. ALIGN
  404. ;*******************************************************************************
  405. ; User Stack and Heap initialization
  406. ;*******************************************************************************
  407. IF :DEF:__MICROLIB
  408. EXPORT __initial_sp
  409. EXPORT __heap_base
  410. EXPORT __heap_limit
  411. ELSE
  412. IMPORT __use_two_region_memory
  413. EXPORT __user_initial_stackheap
  414. __user_initial_stackheap
  415. LDR R0, = Heap_Mem
  416. LDR R1, =(Stack_Mem + Stack_Size)
  417. LDR R2, = (Heap_Mem + Heap_Size)
  418. LDR R3, = Stack_Mem
  419. BX LR
  420. ALIGN
  421. ENDIF
  422. END
  423. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****